PXI8504 User`s Manual
Contents
1. 17 2 iio E92 DATION RR ERR E E E E E E E 17 NS eet eee E E E E A m 17 Products Rapid Installation and Selc eee eoceecanem uet aset tetased tamen cedes easet E ud Rees DEM eres EAE 19 TRO S MR IE MAPS BT NR NR Em 19 stud Je 19 Delete Wrong Tas MG CU OI sooo diede std o idis ese utes E ated saepe ett ete sud saepe ett gunLaud asta acess n Tun sRd Casp o LR Sud eue 19 PXI8504 Synchronic Data Acquisition V6 017 Chapter I Overview In the fields of Real time Signal Processing Digital Image Processing and others high speed and high precision data acquisition modules are demanded ART PXI8504 data acquisition module which brings in advantages of similar products that produced in china and other countries 1s convenient for use high cost and stable performance Unpacking Checklist Check the shipping carton for any damage If the shipping carton and contents are damaged notify the local dealer or sales for a replacement Retain the shipping carton and packing material for inspection by the dealer Check for the following items in the package If there are any missing items contact your local dealer or sales gt PXI8504Data Acquisition Board ART Disk a user s manual pdf b drive c catalog Warranty Card FEATURES Analog Input Input Range 5V x1 V x500mV 200mV 100mV can be customized 14 bit resolution sampling Rate up to 40MHz2. ch Input Channels 4 synchronous inputs Analog Input Mode Single ended input Data Read Mode inquire and DMA mode Memory Size 256MB DDR2 The memory of each channel is 64MB Clock Source PXI bus clock TRIGO TRIGI TRIG2 TRIG3 TRIG4 TRIGS TRIG6 TRIG7 PXI STAR signal and external clock VV ON ON ON ON VV WV Trigger Mode middle trigger post trigger pre trigger and delay trigger Trigger Source software ATR DTR Trigger Signal Multi card Synchronization Trigger Direction falling edge rising edge falling and rising edge trigger Trigger Level decided by the input range Analog Trigger Source ATR each analog input can be used as the analog trigger source VV ON No WV WV Analog Trigger Source ATR Input Range the trigger level can be calculated with the 12 bit resolution please see the ATR Trigger Trigger Source DTR Input Range standard TTL level Coupling DC AC Auto calibration Analog Input Impedance 1MQ 50Q can be selected Operating Temperature Range 0 C 50 C VV VV V WV Storage Temperature Range 20 C 70 C BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 3 PXI8504 Synchronic Data Acquisition V6 017 Other Features Board Clock Oscillation 40MHz Non linear error 2LSB Maximum System Measurement Accuracy 0 05 System Noise 1 73LSBrms Harmonic Distortion THD 77 1 dB signal to Noise Ratio SNR 65 7 dB Spurious Free Dynamic Range SFD
3. oantiatuna NTS 8 Chapter 4 The Instruction of the Functions cccccccsccccccccccccsceecceccceeeeeeeeeseeeceeeeeeeeeseeeeeeeeaaaeeeeeeeceeeaaaasseeeeeeeesaaaaeseeeeseesaaaaeeeeees 10 S RIG Oe OMB e E 10 SPAM atu ihre d PR m 11 2 2 POSE a E S E A E E E E AAE 11 4 2 2 Pro trigger ACQUISITION ence cvencnedecensnenscencueddcandnendcendueddcendnundesedusddieepdesndeendneddieenedscWeiacwtWesnededoupasineauelastndeanieseaivs 11 4 2 3 Middle trigger ACQUISITION ocean iiccsneensinesnssnawasawansicaendeduacawsnduduaaidhusdetaxkandetndastuedanaandudindaaincednnabausiodiandetnceandesionace 12 AD A We aya Sei COIS TEE 12 Ao PA Mia WAN ye ON i IR Rio Tm 13 4 4 AD External Trigger Mode cccccccccccccssseseeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 13 LN TR beu o acectecoceaorecaeaadeauatenorece aade ausececodestaasonussaaastee nadonuasdenenys aadeausedeseus aadedusedaceues addectsecaceeestaadecusnceceress 13 d2 DIR MA ecco each eect a cere 15 A mud sii A m E S E E 15 Chapter 5 Methods of using AD Internal and External Clock Function eese ener eene eene enne n nnns 16 5 1 Internal Clock Function of b 16 32 Bxternal lock Tanchonol AD erna E E cu tu pU cu Es 16 Chapter o Notes Galbration and Wairani y FOCI istante in ts tanetturi ut E uas bu eias inei ite enst E 17 mu
4. or damaged serial numbers are not entitled to our service 4 Customers are responsible for shipping costs to transport damaged products to our company or sales office 5 To ensure the speed and quality of product repair please download an RMA application form from our company website PXI8504 Synchronic Data Acquisition V6 017 Products Rapid Installation and Self check Rapid Installation Product driven procedure is the operating system adaptive installation mode After inserting the disc you can select the appropriate board type on the pop up interface click the button driver installation or select CD ROM drive in Resource Explorer locate the product catalog and enter into the APP folder and implement Setup exe file After the installation pop up CD ROM shut off your computer insert the PCI card If it is a USB product it can be directly inserted into the device When the system prompts that it finds a new hardware you do not specify a drive path the operating system can automatically look up it from the system directory and then you can complete the installation Self check At this moment there should be installation information of the installed device in the Device Manager when the device does not work you can check this item Open Start Programs gt ART Demonstration Monitoring and Control System gt Corresponding Board gt Advanced Testing Presentation System the program is a standard testing procedu
5. when the trigger event occurs If the trigger event occurs after the specified amount of data has been acquired the system only stores the data before the trigger event with the specified amount as illustrated in Figure PXI8504 Synchronic Data Acquisition V6 017 Trigger event is occurring it will transmit the data after finish the sampling Operation Start Time Trigger Signal Data The number of the data N i A P Only the required data N can RS Data is ignored j be transmitted to the system However if the trigger event occurs before the specified amount of data has been acquired the system can either stop the acquisition immediately which implies the stored data will be less then the amount you specified or ignore the trigger signal until the specified amount of data has been acquired which assures the user can get the specified amount of data These can be set by software and are illustrated in Figure Trigger signals that occur before Trigger even is Occurring the specified amount of data has it will transmit the data been acquired will be ignored after finish the sampling Trigger Signal Data d4 x The number of the data N Collected the X data before trigger event X lt N 4 2 3 Middle trigger Acquisition Use middle trigger acquisition when you want to collect data before and after the trigger event The amount of stored da
6. PXI8504 Synchronic Data Acquisition V6 017 PXIS504 User s Manual 9 Beijing ART Technology Development Co Ltd PXI8504 Synchronic Data Acquisition V6 017 Contents BOUIURmTRCTPTTE X H Z BU DES 3 Chapter 2 Components Layout Diagram and a Brief Description eese eese nnnn nnn nnne sensns 5 21 The Min componen Layout Dia gta susce dusuuodoi duet duo uot aut uos Jus E EETA E E A E A TEE 5 PAPA Block Diara NR RRRRRRRREER mA m MM 6 2 3 The Function Description for the Main Component ccccccccesesssseeseesseseeeeeeeeeeeeeeeeeeeeeeeeeeeeseseeeeeeeeeeeeeeeees 6 Chapter 3 Conneciion Ways FOr Each Si onal otice xcoslsnstousnardattansnncatineesosteueavadstedienstasiniuannsee tesa adtsussvaadelienatsalsiuawecssdemsaarlsugnensdedenetiandes 7 Dall mal Osa C OSC OM seisnes E E E E E E 7 3 2 External Clock Input Signal Connection lllliiiiiiiiiiiiiilliieeeeeeeese sensn aiaa iaa aa 7 3 3 ATR Trigger Signal COnMe Ct On ERROR u Em 7 SADIR Tie Cer oi Oil Cote COM eon cece sntontaanstepteaestomaseracteauaceceectarectucnoeecepchorectecuaranoeemaccestanduncoeateractecnocuepceccoeet 7 2 5 VMI Les Ins ite bis VG AT OMIA Oss oateceebantecuas atate
7. R 76 8 dB significant Bits ENOB 10 2 3db bandwidth typically 25MHz max 35MHz Test Conditions sampling frequency 40MS s using 200K Hz sine wave input the 95 of full scale amplitude VV ON No ON ON VV WV 4 PXI8504 Synchronic Data Acquisition V6 017 Chapter 2 Components Layout Diagram and a Brief Description 2 1 The Main Component Layout Diagram i pia s WS j E Se cui iN LU Exi Nu PEN i AR a E E rm he i EL E d Ew CH2 IN BITE In i cHa iN DU CLK IS UM M NU ZIFILI HT hs ama 3 Bu s le ne i R x ugiat a DTR IX a L 3331 us 24 c i d e H saanko eet rm gahe CH3 IN fe end m 1 EM mrs 2 us H AL e E in trf PXIB504 s aca cii WDR coy M J aik ms s ME Vu innt s TE i Vut d L rj LE d I E y s E x T m nri TUM 1 i 5 4 TEM ERARAS Es wr ES a wi T T ME 1 s p z et me 1 PXI8504 Synchronic Data Acquisition V6 017 2 2 Block Diagram CLK IN a mini DTR_IN 1min ontro Li Ul Analog Trigger Circuit CHI L Analog Input Il 14 bit AD ITI m m nalog Input 14 bit AD rr j i chia he reine 2 3 The Function Description for the Main Component 32 bit 33MHz Controller J1 AIO analog input port J2 AII analog input port J3 AI2 analog input port J4 AI3 analog input port J5 CLK IN clock input port J6 DTR IN digital trigger signal inpu
8. er 6 Notes Calibration and Warranty Policy 6 1 Notes In our products packing user can find a user manual a PXI8504 module and a quality guarantee card Users must keep quality guarantee card carefully if the products have some problems and need repairing please send products together with quality guarantee card to ART we will provide good after sale service and solve the problem as quickly as we can When using PXI8504 in order to prevent the IC chip from electrostatic harm please do not touch IC chip in the front panel of PXI8504 module 6 2 Auto calibration By using the auto calibration feature of the PXI8504 the calibration software can measure and correct almost all the calibration errors without any external signal connections reference voltages or measurement de vices Automatic calibration is complete the calibration constants are stored in EEPROM The default calibration constants are stored in fixed storage area Time and temperature will affect the error so when install PXI8504 in the new environment we should recalibrate it NOTE 1 Before auto calibration procedure starts it is recommended to warn up the card for at least 15 minutes 2 Please remove the cable before an auto calibration procedure is initiated because the calibration factor outputs would be changed in the process of the calibration 6 3 Warranty Policy Thank you for choosing ART To understand your rights and enjoy all the after sales ser
9. ernal hardware It also can be interpreted as the software trigger As for the specific process please see the figure below the cycle of the AD work pulse is decided by the sampling frequency AD Start Pulse MES The first working pulse after the AD start pulse Figure4 1 Internal Trigger Mode fosososcocseccccsceccccecceccecceceececcecceceececscec 4 4 AD External Trigger Mode When AD is in the initialization if the AD hardware parameter ADPara TriggerMode PXI8504 TRIGMODE POST we can achieve the external trigger acquisition In this function when calling the StartDeviceProAD function AD will not immediately access to the conversion process but wait for the external trigger source signals accord with the condition then start converting the data It also can be interpreted as the hardware trigger Trigger source includes the DTR Digital Trigger Source and ATR Analog Trigger Source 4 4 1 ATR Trigger When the trigger signal is the analog signal using the ATR trigger source Trigger level needs to be set when using the ATR trigger source There are two trigger types edge trigger and level trigger The trigger level can be calculated with the 12 bit resolution BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 13 PXI8504 Synchronic Data Acquisition V6 017 OxFFF 4997 55mV 999 5 mV 4995 11mV 099 5 mV Result Comparer Trigger Level Figure 4 2 Analog compare When ADPara T
10. master and slave card connection the master card and slave card use the same TRIG signal it is the same as the Master slave card cascade PXI8504 Synchronic Data Acquisition V6 017 Chapter 5 Methods of using AD Internal and External Clock Function 5 1 Internal Clock Function of AD Internal Clock Function refers to the use of on board clock oscillator and the clock signals which are produced by the user specified frequency to trigger the AD conversion regularly To use the clock function the hardware parameters ADPara ClockSource PXI8504_ CLOCKSRC IN should be installed in the software The frequency of the clock in the software depends on the hardware parameters ADPara Frequency For example if Frequency 100000 that means AD work frequency is 100000Hz that is 100 KHz 10 us point 5 2 External Clock Function of AD External Clock Function refers to the use of the outside clock signals to trigger the AD conversion regularly The clock signals are provide by the CLKOUT pin The external clock can be provided by clock frequency generators and so on To use the external clock function the hardware parameters ADPara ClockSource PXI8504 CLOCKSRC OUT should be set in the software The clock frequency depends on the frequency of the external clock and the clock frequency on board is invalid the sampling frequency of the AD 1s fully controlled by the external clock frequency PXI8504 Synchronic Data Acquisition V6 017 Chapt
11. n V6 017 Chapter 4 The Instruction of the Functions 4 1 Trigger Source The PXI8504 support internal trigger source external analog trigger external digital trigger TRGO TRG7 trigger And we can set the trigger mode by the software The following is the trigger diagram Software Trigger Digital Trigger DTR_IN oy 2 EE Analog Input CHI OO Internal Selection Circuit Analog Input CH2 O D Analog Input CH3 O Analog Input CH4 Trigger Bus TRG Interface PXI8504 Synchronic Data Acquisition V6 017 4 2 Trigger Mode Middle trigger post trigger pre trigger and delay trigger modes are available to acquire data around the trigger event trigger e trigger 7 trigger Digital Analog Tgger Event M N Lk EH NIEEENNIZER Delay Trigger Pre Trigger Middle Trigger eem E Post Irigger 4 2 1 Post trigger Acquisition Use post trigger acquisition when you want to collect data after the trigger event as illustrated in figure Transmit the data after D finish the sampling Operation Start 000 Y O gt Time Trigger Signal Data The number of the data N 4 2 2 Pre trigger Acquisition Use pre trigger acquisition to collect data before the trigger event The acquisition starts once specified function calls are executed to begin the pre trigger operation and it stops
12. ng the common external trigger please make sure all parameters of different PXI8504 are the same At first configure hardware parameters and use analog or digital signal triggering ATR or DTR then connect the signal that will be sampled by PXI8504 input triggering signal from ART pin or DTR pin then click Start Sampling button at this time PXI8504 does not sample any signal but waits for external trigger signal When each module is waiting for external trigger signal use the common external trigger signal to startup modules at last we can realize synchronization data acquisition in this way See the following figure External Trigger Signal ART DTR j ae TE PXI8504 gA DIR gt PXI8504 Tamon p PXI8504 When using the common external clock trigger please make sure all parameters of different PXI8504 are the same At first configure hardware parameters and use external clock then connect the signal that will be sampled by PXI8504 then click Start Sampling button at this time PXI8504 does not sample any signal but wait for external clock signal 8 PXI8504 Synchronic Data Acquisition V6 017 When each module is waiting for external clock signal use the common external clock signal to startup modules at last we realize synchronization data acquisition in this way See the following figure PXI8504 External clock signal CLKIN PX1I8504 PXI8504 PXI8504 Synchronic Data Acquisitio
13. re Based on the specification of Pin definition connect the signal acquisition data and test whether AD is normal or not Connect the input pins to the corresponding output pins and use the testing procedure to test whether the switch is normal or not Delete Wrong Installation When you select the wrong drive or viruses lead to driver error you can carry out the following operations In Resource Explorer open CD ROM drive run Others gt SUPPORT gt PCI bat procedures and delete the hardware information that relevant to our boards and then carry out the process of section I all over again we can complete the new installation
14. riggerDir PXI8504_TRIGDIR NEGATIVE choose the trigger mode as the falling edge trigger That is when the ATR trigger signal is on the falling edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition AD Start Pulse The first working pulse AD Working Pulse after triggered i HULU ATR emen 5 N E The waiting time aie d ON The falling edge The first falling edge after the before the AD started AD started is valid T ivaka 5 0 0 SSesasseetoseteeesececccsscosseossesssooesesesesecooccoosecececect Mososecsssosesecoseseccccscecsocceccesoccecccecoct Figure 4 3 Falling edge Trigger When ADPara TriggerDir PXI8504_TRIGDIR POSITIVE choose the trigger mode as rising edge trigger That is when the ATR trigger signal is on the rising edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition When ADPara TriggerDir PXI8504 TRIGDIR POSIT NEGAT choose the trigger mode as rising or falling edge trigger That is when the ATR trigger signal is on the rising or falling edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition This function can be used in the case that the acquisition will occur if the exoteric signal changes BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 14 PXI8504 Synch
15. ronic Data Acquisition V6 017 4 2 2 DTR Trigger When ADPara TriggerDir PXI8504_TRIGDIR NEGATIVE choose the trigger mode as the falling edge trigger That is when the DTR trigger signal 1s on the falling edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition AD Start Pulse Digital Trigger Signal eeeeoseseocceecececeeeeeeoesoos 0 00 55 Aeg Ba f gee 0000000000000 eeeeeeececececececsccesecesecessososee The falling edge before The waiting time gt The first falling edge after the the AD started is AD started is valid invalid Mc 3 AD working pulse Aa OPEM ge U Figure 4 4 Falling edge Trigger When ADPara TriggerDir PXI8504_TRIGDIR POSITIVE choose the trigger mode as rising edge trigger That is when the DTR trigger signal is on the rising edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition When ADPara TriggerDir PXI8504 TRIGDIR POSIT NEGAT choose the trigger mode as rising or falling edge trigger That 1s when the DTR trigger signal is on the rising or falling edge AD will immediately access to the conversion process and its follow up changes have no effect on AD acquisition This function can be used in the case that the acquisition will occur if the exoteric signal changes 4 5 PXI Bus Trigger When using the PXI trigger bus signal use the method of
16. t port PXI8504 Synchronic Data Acquisition V6 017 Chapter 3 Connection Ways for Each Signal 3 1 Analog Signal Connection Analog Input Signal 3 2 External Clock Input Signal Connection CLK IN External Clock Signal 3 3 ATR Trigger Signal Connection Analog Trigger Signal 3 4 DTR Trigger Signal Connection External Trigger Signal 7 PXI8504 Synchronic Data Acquisition V6 017 3 5 Multiple Instrument Synchronization Three methods can realize the synchronization for the PXI8504 the first method is using the Master slave card cascade the second one is using the common external trigger and the last one is using the common external clock When using master slave cascade card programs the master card and slave card use the same TRIG signal general the master card uses internal clock source the slave card uses external clock source after the master card and slave card are initialized first start the all slave cards because the main card has not been started so there 1s no output clock signal then the slave cards into a wait state until the master card is activated at this time all slave cards are started Then we achieve synchronization data acquisition See the following figure IHgger Master Card Trigger Slave Card Slave Card When you need to sample more than channels of a card you could consider using the multi card cascaded model to expand the number of channels When usi
17. ta before and after the trigger can be set individually M and N as illustrated in Figure Operation Trigger Transmit the data after Start Event finish the sampling Time Trigger Signal Data 4 X M Data X N Data Like pre trigger mode the stored data may be less than the amount specified if the trigger event occurs before the specified amount of data M has been acquired Users can also set by program to ignore trigger signals until the specified amount of data M has been acquired 4 2 4 Delay trigger Acquisition Use delay trigger acquisition to delay the data collection after the trigger event as illustrated in Figure 4 11 If the trigger BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 12 PXI8504 Synchronic Data Acquisition V6 017 event starts it will delay M then starts to acquire the data with the specified amount N Transmit the data after Operation start Trigger Event Acquisition Start finish the sampling Delay M Time Trigger Signal Data N Data 4 3 AD Internal Trigger Function When AD is in the initialization if the AD hardware parameter ADPara TriggerMode PXI8504 TRIGMODE SOFT we can achieve the internal trigger acquisition In this function when calling the StartDeviceProAD function it will generate AD start pulse AD immediately access to the conversion process and not wait for the conditions of any other ext
18. vices we offer please read the following carefully 1 Before using ART s products please read the user manual and follow the instructions exactly When sending in damaged products for repair please attach an RMA application form which can be downloaded from www art control com 2 All ART products come with a limited two year warranty gt The warranty period starts on the day the product is shipped from ART s factory gt For products containing storage devices hard drives flash cards etc please back up your data before sending them for repair ART is not responsible for any loss of data gt Please ensure the use of properly licensed software with our systems ART does not condone the use of pirated software and will not service systems using such software ART will not be held legally responsible for products shipped with unlicensed software installed by the user 3 Our repair service is not covered by ART s guarantee in the following situations gt Damage caused by not following instructions in the User s Manual Damage caused by carelessness on the user s part during product transportation BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 17 PXI8504 Synchronic Data Acquisition V6 017 Damage caused by unsuitable storage environments 1 e high temperatures high humidity or volatile chemicals Damage from improper repair by unauthorized ART technicians Products with altered and
Download Pdf Manuals
Related Search