Evaluation Board User Guide
Contents
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3. 11 Ordering Information ane 23 Bill of Materials aid 23 ICH 28 Rev 0 Page 2 of 28 EVALUATION BOARD HARDWARE The evaluation board for the AD9276 and AD9277 provides all of the support circuitry required to operate the AD9276 and AD9277 in their various modes and configurations Figure 2 shows the typical bench characterization setup used to evaluate the performance of the AD9276 and AD9277 It is critical that the signal sources used for the analog input and clock have very low phase noise 1 ps rms jitter to realize the optimum performance of the signal chain Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance see the AD9276 or AD9277 data sheet See the Evaluation Board Software Quick Start Procedures section to get started and Figure 21 to Figure 32 for the complete schematics and layout diagrams that demonstrate the routing and grounding techniques that should be applied at the system level POWER SUPPLIES This evaluation board comes with a wall mountable switching power supply that provides a 6 V 2 5 A maximum output Connect the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to 63 Hz The other end is a2 1 mm inner diameter jack that connects to the PCB at P601 Once on the PC board the 6 V supply is fused and conditioned before connecting to low d
4. MARKER 1 T1 RBW 100Hz RF ATT 30dB REF Lv1 1 91dBm VBW 100Hz OdBm 13 38605210kHz 4 SWT 12 5s UNIT dBm A 10 20 30 40 1SA 100 110 120 08282 032 START 20Hz 2 498kHz STOP 25kHz Figure 19 Typical Spectrum Analyzer Display of CWD Output SAMPLE TEK RUN 2 50MS s C3 FREQ 12 330kHz UNSTABLE HISTOGRAM C3 p p 576mV 08282 033 M20 0us CH3 S 8mV 100mVO Figure 20 Typical Oscilloscope Display of CWD Output Rev 0 Page 10 of 28 EVALUATION BOARD SCHEMATICS AND ARTWORK UND UNO 020 28280 pay S TNO ND A E eii ING 359 Tv aA D a751 dde KHF ee STTO SH p zata E STTY S E 5 a co d EN atta SP TOTI G II are ESOS e INANI TINNGHI INANI Gd I3NNUHO O M501 nabi JnT dol AM H aeu T aon asta iD S X UNS JUIN ONI GND UNO UNO oo ant UNO n E sli i ING 358v IVOTHH J 1 P SE om e21 Sch GE AE 9013 SBTI an S z EI i TN ANG ae gero Cor KOR INANI 9 I3NNUHO Su INANI Y TINNYHI AED SW Y MS01 ve SETA L TA INC a ING ant BEN am nag T 2701 Bal d EE S d SETA Tei 2919 8 X LNA JUIN I U STINNYHO GINMANT DO TONG Figure 21 DUT Analog Input Circuits Rev 0 Page 11 of 28 g A A A S DN UND U
5. If you are using an encode rate 28 MSPS select Octal Low Speed bin If you are using an encode rate gt 28 MSPS select Octal High Speed bin Next click Program the DONE LED in the HSC ADC EVALCZ board should then turn on If more than two channels are required to be displayed select High Speed Octal synchronous capture bin This canvas allows the user to display all the channels at once The drawback is that each FFT display is only 8k points Exit the ADC Data Capture Settings box by clicking OK Set Up the SPI Controller After the ADC data capture board setup has been completed set up the SPI Controller 1 OpentheSPI Controller software by going to the Start menu or double clicking the SPI Controller software desktop icon If prompted for a configuration file select the appropriate one If not check the title bar at the top of the SPI Controller window to determine which configuration is loaded If necessary choose Cfg Open from the File menu and select the appropriate configuration Note that the CHIP ID 1 field should be filled to indicate whether the correct SPI Controller configuration file is loaded see Figure 8 MH Q 2 70 e e a 2 we ER nG ji 08282 008 Figure 8 SPI Controller CHIP ID 1 Box 2 Clickthe New DUT button in the SPI Controller see Figure 9 Kam 0 42 3 USB Ezusb 0 CS 1 AD9272_12Bit_BOMSspiRO3 clg z AD9272 12Bit BOMSspiROJ cal en DUT
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7. Application Note and the AN 877 Application Note for reference SPIController 1 0 46 3 USB Ezusb 0 CS 1 AD9276 12Bit 80M Na CO ale El Global ADCBase 0 Chan A Chan B Chan C Chan D Chan E Chan F Chant VREF 18 Select External CLOCK 3 JW Duty Cycle Stabilizer Intemal LNA v CHIP GRADH2 40MSPS v 15kOhms nd LVDS ANSI C LVDS IEEE ADCINPUT F LPF Cutoff Freq OUTPUT PHASE 16 10 V 3 Fs v 180 y Degrees 08282 011 Figure 11 SPI Controller HIGHPASS 2B 5 In the Chan A tab of SPI Controller find the OFFSET 10 box Use the drop down list box labeled Offset Adj to perform an offset correction to the LNA if the LNA power setting BIAS CURR A 12 is set low The default value is 32 Obs Clem Der A Chan don Due D Ge Dom o on O 000 bati bo Gra Ou Al Eer B om ron D ako OUTPUT weg SENA Cast raren Cu JA DEWOD mom Nd 08282 012 Figure 12 SPI Controller OFFSET 10 6 Click the Run button in the VisualAnalog toolbar e RUN BUTTON Figure 13 VisualAnalog Window Toolbar Run Button 08282 013 Rev 0 Page 8 of 28 Adjust the Amplitude of the Input Signal Next adjust the amplitude of the input signal for each channel as follows 1 Adjust the amplitude of the input signal so that the fundamental is at the desired level examine the Fund Power reading in the left panel of the VisualAnalog FFT window If the g
8. BUTTON gu OB Gebel ADCBsse 0 ADCA ADCB Anc C aoco ADCE ADCF aca Anc Fco 000 CHIP PORT CFG DEVICE INDEXA Apr AUX F 158 Fest eset Contralor wil siso ba ad RO edad bom DUT we reo c Ress ud ADSZ72 12 ba 45580 MSPS FE oct VGA ADC lom noise FF NG CHiPID jj 08282 009 Figure 9 SPI Controller New DUT Button Rev 0 Page 7 of 28 In the ADCBase 0 tab of the SPI Controller find the CHIP GRADE 2 box Use the drop down list box to select the correct speed mode if necessary See the AD9276 or AD9277 data sheet the AN 878 Application Note and the AN 877 Application Note for reference SPIController 1 0 46 3 USB Ezusb 0 CS 1 AD9276 12Bit 80M File Config Help BE ci ale El Global ADCBase 0 Chan A Chan B Chan C Chan D Chan E Chan F Chant VREF 18 Select External a lv a Cycle Stabilizer Intemal LNA 15kOhms x GAIN 11 LNA Gain Adj e LVDS ANSI 21 6dB C LVDS IEEE PGA Gain Adj Data F 24dB v e Offset Binary HIGHPASS 2B C 2s Complement Manual Tune a HPF Cutoff Freg STENE d na z None v Ohms ADCINPUT F LPF Cutoff Frea OUTPUT PHASH16 10 1 3 Fs v 180 el Degrees 08282 010 Figure 10 SPI Controller CHIP GRADE 2 In the ADCBase 0 tab of the SPI Controller find the HIGHPASS 2B box Click the Manual Tune button to calibrate the antialiasing filter See the AD9276 or AD9277 data sheet the AN 878
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10. LNA Gain Adj guisa 21648 y C LVDS IEEE PGA Gain Adj Deis Formel 24dB el e Offset Binary HIGHPASS 2B Ze Complement Manual Tune OPO 5 TONER OutputDriverTermination KR E None v Ohms Sd ADC INPUT F pae LPF Cutoff Freq OUTPUT PHASE 16 10 1 43 Fs v 180 y Degrees 08282 017 Figure 17 SPI Controller MODES 8 Box 5 In the Chan X tab of the SPI Controller where X is the channel to which an analog input is applied find the CW IO DEMOD PH 2D box Select the CW Channel Enabl check box to enable the channel Then select the phase rotation of the channel using the I Q Demoduator Phase drop down menu ka sPIController 1 0 46 3 USB Ezusb 0 CS 1 AD9276 12Bit BOMSspiengR02 cfg AD9276 12Bit 80M Pie Config Help DI DE as Global ADCBase 0 Chan A Chan B Chan C Chan D Chan E Chan Chan G Can H CO DCO Engo Eng 1 OUTPUTMODE M SERIALCHANSTATOZ TESTIO D CW IQ DEMOD PH20 7 Output Invert Power Down Output Test Mode V CW Channel Enabi Reset jef T NG Demoduator Phase I OFFSET 10 User Test Hoge Offset adi ge la si Alternate Single Once Alternate Once 08282 018 Figure 18 SPI Controller CW IQ DEMOD PH 2D Box An example of the CW Doppler output as shown in Figure 19 and Figure 20 can be seen in the frequency and time domain respectively Make sure to set the analog input level appro priately to achieve full scale throughout the signal chain
11. Open VisualAnalog on a PC AD9276 or AD9277 should be listed in the status bar of the New Canvas window Select the template that corresponds to the type of testing to be performed see Figure 3 VisualAnalog New Canvas New Existing Recent Categories Templates drm Bp E P E C Single AverageFFT Two T A ge wo Tone werage 2 0 Dual Two Tone a C Quad DEE oo E B C3 AD9222 Samples Logic C3 AD9252 C3 AD9271 Ca AD9272 CI AD9273 Ca AD9275 AD9276 C3 AD9277 C MFE Check for Updates Open AD9276 12 Bit 40 65 80 MSPS Octal VGA UO Demod device found 08282 003 Figure 3 VisualAnalog New Canvas Dialog Box 2 After the template is selected a message box opens asking if the default configuration can be used to program the FPGA see Figure 4 Click Yes and the window closes If a different program is desired follow Step 3 VisualAnalog i VisualAnalog will now attempt to program the on board FPGA with a default file for the AD9276 Please click Yes to program the FPGA If you prefer to use the current FPGA configuration click No Before clicking Yes please make sure the HSC ADC EVALC is powered with the correct supply and that the board is connected to the computer Also make sure the dipswitch U4 on the HSC ADC EVALC is set to the following configuration MO ON M1 OFF M2 OFF If the configuration is successful you will see the DONE li
12. R453 R455 1 16 W 196 R456 R457 R458 R460 R462 R535 8 R107 R121 R136 R151 R207 R221 R236 R251 Resistor 348 Q 0402 Panasonic ERJ 2RKF3480X 1 16 W 196 10 R301 R302 R305 R441 R442 R443 R405 R417 R449 R450 Resistor 1 00 kQ 0402 Panasonic ERJ 2RKF1001X 1 16 W 1 20 R303 R304 R306 R403 R415 R444 R445 R446 R466 R467 R501 Resistor 10 0 kO 0402 Panasonic ERJ 2RKF1002X R502 R514 R515 R516 R538 R539 R602 R615 1 16 W 1 6 R407 R409 R410 R419 R421 R422 Resistor 20 0 kO 0402 Panasonic ERJ 2GEJ203X 1 16 W 5 6 R307 R308 R309 R310 R321 R517 Resistor 5 1 kO 0402 Panasonic ERJ 2GEJ512X 1 16 W 5 5 R427 R429 R520 R521 R528 Resistor 200 O 0402 Panasonic ERJ 2RKF2000X 1 16 W 1 2 R428 R430 Resistor 221 Q 0402 Panasonic ERJ 2RKF2210X 1 16 W 196 3 R440 R522 R523 Resistor 100 0 0402 Panasonic ERJ 2GEJ101X 1 16 W 196 2 R431 R432 Resistor 24 0 0402 Panasonic ERJ 2RKF24ROX 1 16 W 196 2 R534 R536 Resistor 24 9 0 0402 Panasonic ERJ 2RKF24R9X 1 16 W 196 4 R401 R404 R413 R416 Resistor 2 00 kO 0402 Panasonic ERJ 2RKF2001X 1 16 W 1 1 R447 Resistor 27 Q 0402 Panasonic ERJ 2RKF27ROX 1 16 W 196 1 R433 Resistor 33 kO 0402 Panasonic ERJ 2GEJ333X 1 16 W 596 1 R434 Resistor 10 5 kO 0402 Panasonic ERJ 2RKF1052X 1 16 W 196 1 R437 Resistor 8 66 kO 0402 Panasonic ERJ 2RKF8661X 1 16 W 196 1 R439 Potentiometer 10 kOsq Copal CT94EW103 cermet top 1 R518 Resistor
13. 30 C131 Capacitor 0 1 uF 0402 Panasonic ECJ OEB1A104K C136 C201 C202 C206 C210 C211 C215 C220 C221 C225 C230 X5R ceramic 10 V C231 C236 C302 C303 C304 C307 C308 C309 C310 C311 C312 C313 C314 C315 C316 C317 C318 C319 C320 C326 C327 C328 C329 C330 C404 C413 C415 C418 C419 C420 C421 C422 C423 C424 C431 C437 C439 C442 C443 C444 C445 C446 C447 C448 C450 C451 C453 C454 C455 C456 C457 C458 C459 C462 C463 C501 C502 C503 C504 C505 C506 C507 C510 C518 C519 C520 C521 C522 C523 C527 C530 C531 C532 C533 C534 C615 C617 C619 C621 C627 C629 4 C624 C625 C634 C635 Capacitor 1 uF 0402 Panasonic ECJ OEBOJ105M 6 3 V ceramic X5R 1 C509 Capacitor 0 22 uF 0402 Panasonic ECJ OEBOJ224K 6 3 V ceramic 1 C636 Capacitor 100 pF 0402 Murata GRM1555C1H101JD01B 50 V Ceramic 2 C449 C452 Capacitor 1000 pF 0402 Panasonic ECJ 0EB1H102K 50 V ceramic X7R 5 C401 C407 C425 C430 C630 Capacitor 1500 pF 0402 Panasonic ECJ 0EB1E152K 25 V ceramic X7R 6 C408 C409 C410 C432 C433 C434 Capacitor 150 pF 0402 Panasonic ECJ 0EB1H151K 25 V ceramic X7R 4 C411 C412 C435 C436 Capacitor 2700 pF 0402 Panasonic ECJ 0EB1E272K 25 V ceramic X7R 1 C515 Capacitor 3900 pF 0402 Panasonic ECJ 0EB1E392K 25 V ceramic X7R 1 C631 Capacitor 33 pF 0402 Panasonic ECJ 0EC1H330J 25 V ceramic X7R 4 C403 C405 C427 C428 Capacitor 5 pF 0603 50V Yageo CC0603CRN
14. 4 12 kO 0402 Panasonic ERJ 2RKF4121X 1 16 W 196 Rev 0 Page 24 of 28 Qty Reference Designator Description Manufacturer Part Number 3 R540 R541 R601 Resistor 249 O 0402 Panasonic ERJ 2RKF2490X 1 16 W 196 1 R603 Resistor 1 91 kO 0402 Panasonic ERJ 2RKF1911X 1 16 W 196 1 R614 Resistor 64 9 kO 0402 Panasonic ERJ 2RKF6492X 1 R616 Resistor 0 047 0 0805 Susumu RL1220T R047 1 4 W 296 1 R617 Resistor 16 9 kQ 0402 Panasonic ERJ 2RKF1692X 12 L403 L404 L405 L406 L407 L408 L409 L410 L411 L412 L413 L414 Resistor 0 O 0603 Panasonic ERJ 3GEYOROOV 1 10 W 5 2 T301 T501 Transformer RF 1 1 Minicircuits ADT1 1WT 2 U403 U408 IC amp low PWR noise ADI ADA4841 2YRZ distortion SO8 1 U304 IC voltage REF precision ADI ADR130BUJZ series SOT23 6 4 U401 U402 U406 U407 IC amp low noise high ADI AD8021ARZ speed SO8 2 U404 U409 IC ADC 18 bit 1 MSPS ADI AD7982BRMZ PuLSAR 7 0 mW RM10 2 U405 U410 IC VREF prec micropwr ADI ADR434ARZ low dropout SO8 1 U411 IC ADC driver ultra low ADI ADA4938 1 ACPZ R7 distortion diff LFCSP16 1 U501 IC clock gen 14 output ADI AD9516 0BCPZ 2 8 GHZ VCO OFN64 1 U601 IC regulator 3 3 V low ADI ADP1706ARDZ 3 3 R7 dropout CMOS SO8 1 U602 IC regulator 3 0 V low ADI ADP1706ARDZ 3 0 R7 dropout CMOS SO8 2 U603 U604 IC regulator 1 8 V low ADI ADP1706ARDZ 1 8 R7 dropout CMOS SO8 1 U605 IC regulator 0 8 V to ADI ADP1708A
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16. ANALOG DEVICES Evaluation Board User Guide UG 016 One Technology Way P O Box 9106 Norwood MA 02062 9106 U S A Tel 781 329 4700 Fax 781 461 3113 www analog com Evaluating the AD9276 and AD9277 Octal LNA VGA AAF 12 14 Bit ADCs and CW UO Demodulators FEATURES Full featured evaluation board for the AD9276 and the AD9277 SPI and alternate clock options Internal and external reference options VisualAnalog and SPI Controller software interfaces EQUIPMENT NEEDED Analog signal source and antialiasing filter 2 switching power supplies 6 0 V 2 5 A CUI EPS060250UH PHP SZ provided Linear bench top dc voltage source 0 V to 1 6 V not required for CW Doppler mode PC running Windows 98 2nd edition Windows 2000 Windows ME or Windows XP USB 2 0 port recommended USB 1 1 compatible AD9276 and AD9277 evaluation board HSC ADC EVALCZ FPGA based data capture kit For CW Doppler mode spectrum analyzer DOCUMENTS NEEDED AD9276 and AD9277 data sheets HSC ADC EVALCZ data sheet High Speed Converter Evaluation Platform FPGA based data capture kit AN 905 Application Note VisualAnalog Converter Evaluation Tool Version 1 0 User Manual AN 878 Application Note High Speed ADC SPI Control Software AN 877 Application Note Interface to High Speed ADCs via SPI SOFTWARE NEEDED VisualAnalog SPI Controller GENERAL DESCRIPTION This document describes the evaluation board for the AD9276 and AD9277
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18. ND UND 2 DN ONO SS Gel noT a ING mo HDI adir KI KH eer 4791 d oe SH See ve a DU rk Sta JE E eb be de We 7 3711 i weza reu vezi ara eger ke INANI H TJNNHH m T are JE are INANI 4 TANNAHO TS A IER _ XT S H udi ant H 01 M T 4701 VW eza TEZO aec far A A A ONI ONI UND UND oo NS A JSBVTVOHEHH ant 9791 by 391 adi BESSE E 902 502 o 9 1 3 Il INANI 9 TINNYHOI INANI 3 NM 9 MS0 Y MS01 9 01 3707 AW SECH Tea H 3 S HNNUHO SlfldNI 90 JUNG Tea 262 Figure 22 DUT Analog Input Circuits Continued Rev 0 Page 12 of 28 220 28280 UC JJ 242604 153141 dHl 311 3H UIMOHS T EN ASONN AYd 3 A S8 NId 16 NId 98 NId Ina mo 3NT nT dNT Eu E dNT ge ezeo 6TEI esco bgo I Seco STE na gang gt 1 ING OL 1xN 1na euang A ANG Ol 1x3N SYOLIIYdHI DNI IdNODJO ING Dm 0 9 88 0T MsL Ca in m D L kt 2389 HIT3Hd 942609 s J a Odd Cs ded SNLYLS SINIOd 1S31 amor mm indino odo FA Lag To Cet lam zeessen sol CT eeoa SOd 16317c0d5 spe am E INDO ARO T Er Ser pon seed ina oras Seven ns ES 1ng gs S 9 80 201 MmS1 pelis LEM os Sia Maxi N5 EE EE Cd A esp is wis wis paka beer u u ER SM X POEMS nr M 1na aane ula RTS KID RPS RTS SNS ia 38 sod oM2 ven E Soe TOED zen 25 Ale o o o o AE KI Ke o9 so SINN ANTES 0 A38 Bai uy SOd NIH 887 NIJS NENA eS SON 8 0
19. PO9BN5RO ceramic NPO 4 C603 C606 C609 C612 Capacitor 10000 pF Panasonic ECJ 0EB1C103K 0402 16 V ceramic X7R 1 C516 Capacitor 22000 pF Panasonic ECJ 0EF1E223Z 0402 25 V ceramic Y5V 1 C301 Capacitor 1 pF 0603 Panasonic ECJ BVB1C105M 16 V ceramic X5R 10 C602 C604 C605 C607 C608 C610 C611 C613 C622 C623 Capacitor 4 7 uF 0603 Panasonic ECJ 1VB0J475M 6 3 V ceramic X5R 10 C414 C416 C438 C440 C614 C616 C618 C620 C626 C628 Capacitor 10 pF 0603 Panasonic ECJ 1VB0J106M 6 3 V ceramic X5R 1 C632 Capacitor 4 7 uF 0805 Murata GRM21BR61E475KA12L 6 3 V ceramic X5R 1 C633 Capacitor 47 uF 0805 Taiyo Yuden JMK212BJ476MG T 6 3 V Ceramic X5R 6 C402 C406 C426 C429 C460 C461 Capacitor 22 uF 0805 Panasonic ECJ 2FB0J226M 6 3 V ceramic X5R 1 C601 Capacitor 10 uF 6032 28 Kemet T491C106K016AT tantalum SMT 16 V 10 5 CR301 CR302 CR303 CR304 CR601 LED 0603 green Panasonic LNJ314G8TRA 10 D101 D102 D103 D104 D201 D202 D203 D204 D301 D501 Diode Schottky GP LN Fairchild MMBD4148SE 20 V SOT 23 200 mA SS 5 D601 D602 D603 D604 D605 Diode silicon rectifier Microcommerical S2A TP D606 D607 F601 SMBJ 2 A 50 V MOSFET P CH 30V 3 1 A SOT 23 Diode Schottky 2 A 20 V Polyswitch 1 10 A reset fuse SMD Vishay Diodes Inc Tyco Raychem SI2343DS TI E3 DFLS220L 7 NANOSMDC110F 2 Rev 0 Page 23 of 28 Qty Reference Designator Description Manufacturer
20. Part Number 15 J101 J102 J103 J104 J201 J202 J203 J204 J401 J402 J403 J303 SMA end launch coax Samtec SMA J P H ST EM1 J503 J504 J505 1 J305 Header 4 pin double row Samtec TSW 104 07 G D male 100 mil straight 1 J404 Header 5 pin double row Samtec TSW 105 07 G D male 100 mil straight 1 J501 Header 3 pin single row Samtec TSW 103 07 G S male 100 mil straight 1 J502 Header 3 pin double row Samtec TSW 103 07 G D male 100 mil straight 2 J301 TP501 Header 2 pin double row Samtec TSW 102 07 G D male 100 mil straight 1 J304 Header 2 pin single row Samtec TSW 102 07 G S male 100 mil straight 1 P601 Power supply connector Switchcraft RAPC722X 2 P604 P605 Connector 60 pin RA Tyco 6469169 1 3 P602 P603 P606 Terminal block 4 pin ST Weiland Z5 531 3425 0 14 L401 L402 L602 L603 L604 L605 L606 L607 L608 L609 L610 L611 Inductor ferrite bead Muarata BLM31PG500SN1L L612 L613 5003A 1206 1 L601 EMI filter LC block choke Murata BNX016 01 coil 1 L614 Inductor 4 7 uH Coilcraft LPS5015 472MLB shielded power 1 OSC501 Clock oscillator ACMOS Valpey Fisher VFAC3H L 40MHz LSTTL compatible 15 R101 R115 R130 R145 R201 R215 R230 R245 R319 R425 R498 Resistor 49 9 Q 0402 Panasonic ERJ 2RKF49R9X R499 R504 R531 R532 1 16 W 1 28 R102 R116 R131 R146 R202 R216 R231 R246 R503 R505 R506 Resistor 0 O 0402 Panasonic ERJ 2GEOROOX R507 R508 R509 R510 R511 R519 R526 R527 R451
21. RDZ R7 5 0 V low dropout CMOS SO8 1 U608 IC ADI high ACC 500 mA ADI ADP3335ACPZ 2 5R7 anycap low drop 2 5 V reg 1 U412 IC buffer tinylogic UHS FAIRCHILD NC7WZO7P6X dual SC70 1 U413 IC buffer tinylogic UHS FAIRCHILD NC7WZ16P6X dual SC70 1 U606 IC regulator 500 mA Linear LT1175CST 5 PBF neg LDO Technology 1 U607 IC ADI current mode ADI ADP1864AUJZ R7 step down dc to dc controller 1 U302 IC ADI ultrafast SIGe ECL ADI ADCLK905 clock data buffers 1 U301 IC ADI AD9276BSVZ 10 MP101 MP102 MP103 MP104 MP105 MP106 MP107 MP108 Part of assembly Place into J404 100 mil jumpers MP109 MP110 Pin 1 2 3 4 5 6 7 8 9 10 J301 Pin 1 2 3 4 J304 Pin 1 2 J502 Pins 3 4 J501 Pins 2 3 4 MP111 MP112 MP113 MP114 Part of assembly Insert Snap into 14 mm height dual the large holes locking standoffs for from the bottom circuit board support side of board Do Not Install 20 C305 C306 C511 C512 C513 C514 C528 C529 C464 C465 C466 Capacitor 0 1 uF 0402 Panasonic ECJ 0EB1A104K C467 C468 C469 C470 C471 C472 C473 C474 C475 X5R ceramic 10 V 3 C524 C525 C526 Capacitor 100 pF 0402 Panasonic ECJ 0EB1H101K 50 V ceramic X7R Rev 0 Page 25 of 28 Qty Reference Designator Description Manufacturer Part Number 8 C105 C114 C124 C135 C205 C214 C224 C235 Capacitor 47 pF 0402 Panasonic ECJ 0EC1H470J X5R ceramic 50 V 2 C417 C441 Capacitor 1 uF 0805 P
22. SL mg KUW Uc DUNG KTM gen een Sueveers INANI A lddNS daMOd LYUM IUM ve gema 7 WA Ac Sa Lo dba LOZETTA EEG re 9T9H Bama A lcgit E as Od Figure 26 Power Supply Digital Output Interface Rev 0 Page 16 of 28 R539 R538 C532 C533 13534 og o oy c o o A Osten Figure 27 Top Side Rev 0 Page 17 of 28 08282 026 Evaluation Board User Guide 90 0 o e 0 888 e 08282 027 Figure 28 Ground Plane Layer 2 Rev 0 Page 18 of 28 ES a mA a D S E S Figure 29 Power Plane Layer 3 Rev 0 Page 19 of 28 Figure 30 Power Plane Layer 4 Rev 0 Page 20 of 28 08282 029 O O e ie SE O DOO OO O O O O 8 Oo OO Qoooo CO OOo OO OX Oo CO a Figure 31 Ground Plane Layer 5 Rev 0 Page 21 of 28 08282 030 SEDA easy DEAA bA habi Figure 32 Bottom Side Rev 0 Page 22 of 28 E ag 8090 CEO DOTE 8 aan z o 10 a Am 000000 z 021 MITTETTL 2058295 NAAT oy 00000 243420 39495 220218 TONGE 000000 o SC 000000 000000 k EX 2e Eder lo 08282 031 ORDERING INFORMATION BILL OF MATERIALS Table 1 Qty Reference Designator Description Manufacturer Part Number 103 C101 C102 C106 C110 C111 C115 C120 C121 C125 C1
23. ain pin voltage is too low it is not possible to reach full scale without distortion Use a higher gain setting or a lower input level to avoid distortion This also depends on the PGA gain setting which can be 30 dB 27 dB 24 dB default or 21 dB See Figure 14 and Figure 15 08282 014 08282 015 2 Figure 15 VisualAnalog FFT Graph Gain lt 1 6 V If another channel needs to be evaluated change the channel setting within the ADC Data Capture block Channels A and B are the default displayed channels ADC Data Capture Settings box under the General tab Clock Frequency and the number of samples can also be changed Rev 0 Page 9 of 28 3 Click the disk icon within the Graph box to save the performance plot See Figure 16 0 fin 5MHz O 1dBFS LNA 21 6dB 220 PGA 24dB VGAIN z 1 6V 40 LPF lt 1 x 1 3 x FsampLE o HPF F p 20 7 L D 2 60 ul a B E 80 n z 100 120 140 0 5 10 15 20 08282 016 FREQUENCY MHz Figure 16 Typical FFT AD9276 and AD9277 USING THE INTEGRATED I O DEMODULATOR CW DOPPLER MODE To examine the spectrum of the CW Doppler integrated I Q demodulator output use the following procedure 1 Complete the steps in the Configuring the Board and Using the Software for Testing sections to ensure that the evaluation board is set up correctly Optionally remove the voltage source from the gain pin J401 It does not affect th
24. anasonic ECJ 2VF1C105Z 16 V ceramic Y5V 3 L501 L502 L503 Inductor 10 nH SMT Coilcraft 0603CS 10NXJLW L7144 12 R106 R120 R135 R150 R213 R220 R235 R250 R408 R420 R452 Resistor 1 00 kQ 0402 Panasonic ERJ 2RKF1001X R454 1 16 W 1 2 R402 R414 Resistor 10 0 kO 0402 Panasonic ERJ 2RKF1002X 1 16 W 1 9 R320 R426 R435 R436 R438 R464 R465 R533 R537 Resistor O Q 0402 Panasonic ERJ 2GEOROOX 1 16 W 1 13 R604 R605 R606 R607 R608 R609 R610 R611 R612 R613 R329 Resistor 100 O 0402 Panasonic ERJ 2GEJ101X R459 R463 1 16 W 1 2 R406 R418 Resistor 10 0 kO 0402 1 16 W 1 1 R513 Resistor 49 9 O 0402 1 16 W 196 4 R411 R412 R423 R424 Resistor 20 0 0402 Panasonic ERJ 2RKF20R0X 1 16 W 1 4 TP1 TP2 TP3 TP4 Conn PCB test point blk Keystone 5001 Electronics Corp Rev 0 Page 26 of 28 NOTES Rev 0 Page 27 of 28 NOTES ESD CAUTION ESD electrostatic discharge sensitive device Charged devices and circuit boards can discharge A without detection Although this product features patented or proprietary protection circuitry damage dy 4 may occur on devices subjected to high energy ESD Therefore proper ESD precautions should be taken to avoid performance degradation or loss of functionality Evaluation boards are only intended for device evaluation and not for production purposes Evaluation boards are supplied as is and without warranties of a
25. e CW Doppler output Use a 1 meter shielded RG 58 50 Q coaxial cable to connect the spectrum analyzer to J402 and or J403 Connect a 20 MHz signal source to J303 4LO input Use a clean signal generator with low phase noise to provide an input clock signal Use a 1 meter shielded RG 58 50 Q coaxial cable to connect the signal generator Connect an analog input signal 5 0123 MHz for example to ChA J101 Usea clean signal generator with low phase noise to provide an input signal to the desired channel Use a 1 meter shielded RG 58 50 Q coaxial cable to connect the signal generator For best results use a narrow band band pass filter with 50 O terminations and an appropriate center frequency Analog Devices uses TTE Allen Avionics and K amp L band pass filters In the ADCBase 0 tab of the SPI Controller find the MODES 8 box Select the CW Mode option see Figure 17 Kc SPIController 1 0 46 3 USB Ezusb 0 CS 1 AD9276 12Bit 80M File Config Help Bi o ala Global ADCBase 0 Chan A Chan B Chan C Chan D Chan E Chan F Chant MODES 8 BIAS CURR A 12 VREF 18 Int Pwr Dn Mode LNA Power Select External Chip Run Hg y Vref Adi Full Pwr Dn VGA Power 1 000V v Standby Max x Chip Reset CW Mode m CLOCK un v LNA Bypass V Duty Cycle Stabilizer Intemal LNA z CHIP GRADE 2 40MSPS v RES OUTPUT MODE 14 15kOhms A GAIN 11 levd Opton
26. eZGN ggio Mia A g 8 ged EE ie oes of 036 NYD ES murino ver nei Zen Roe x seus nr i ls lo ele RS SEU P anag m rn x o raca E 280 3 SEIT E Fu Baso 8 CS RS Ke ever oe EN Ter TERM o GEN eis inom vm SE Senis PIE HIGA KWA e EE E Wal JE INANI Ob TWNOILdO SL se pareado A P saco Zoe Weitere E S an Tat En sa 5 tasn KEN PRI ES ET O SINIOd 1531 aded eu gen se ae ano ano ano ano ja po s pa ZONJNJJIH MD 2 SLINONID 520710 IHNOLIJO HOLUTII2SO MOTO ano E INO 259185 zer sagot L scoot L sagot L Se m nay OI d A Geen Ses na ma YEE TECH Gu vod S anra INA ang anra z 337dd0u 65r HNOT HNOT HNOT ana T 440 Y Aen ino w amer z Ja NS Ser 260 icd Cen zasi Tasa aso E SH T Eno a tasoso Tesr sesti ING H31114 MO di ano ano ane ant am L 2 PENSA me 2059 Taso e een auo 6259 m nean E sasa gt kk mt a pt a lH mo kej De m D 6 ATE tasa E a saga a x IDANI HID ula am INANI 15 Pur gasa T s gasa ds tod ma anto aria 1 gaso Rev 0 Page 15 of 28
27. ght 1 Do not show this message again 08282 004 Figure 4 VisualAnalog New Canvas Message Box 3 To view different channels or change features to settings other than the default settings click the Expand Display button located on the top right corner of the VisualAnalog window as shown in Figure 5 and Figure 6 This process is described in the AN 905 Application Note VisualAnalog Converter Evaluation Tool Version 1 0 User Manual After you are finished click the Collapse Display button sa upan s EXPAND DISPLAY BUTTON me 08282 005 Figure 5 VisualAnalog Window Toolbar Expand Display Button Rev 0 Page 6 of 28 08282 006 Figure 6 VisualAnalog Main Window Expanded Display 4 Program the FPGA of the HSC ADC EVALCZ board to a setting other than the default setting as described in Step 3 Then expand the VisualAnalog display and click the Settings button in the ADC Data Capture block see Figure 6 The ADC Data Capture Settings box opens see Figure 7 ADC Data Capture Settings General Board Settings FIFO Fill Poll Full Flag Fill Delay ms po FPGA Maximum Poll Time ms Program File es VisualAnalog Hardware HSC_ADC_EVALC EPIG Browse Capture data from RAM iv Auto control FPGA data capture mode 08282 007 Figure 7 ADC Data Capture Settings Board Settings Tab 5 Select the Board Settings tab and browse to the appropriate programming file
28. hat using other than a 10 kQ 1 resistor for RBIAS may degrade the performance of the device depending on the resistor chosen Clock Circuitry The default clock input circuitry is derived from a simple transformer coupled circuit using a high bandwidth 1 1 impedance ratio transformer T501 that adds a very low amount of jitter to the clock path The clock input is 50 Q terminated and ac coupled to handle single ended sine wave types of inputs The transformer converts the single ended input to a differential signal that is clipped before entering the ADC clock inputs The evaluation board is already set up to be clocked from the crystal oscillator OSC501 This oscillator is a low phase noise oscillator from Valpey Fisher VFAC3HL 40M HZ If a different clock source is desired remove R503 set Jumper J501 to disable the oscillator from running and connect the external clock source to the SMA connector J503 A differential LVPECL clock driver can also be used to clock the ADC input using the AD9516 U501 Populate C528 and C529 with 0 1 UF capacitors and remove C506 and C507 to disconnect the default clock path inputs In addition populate C511 and C512 with a 0 1 uF capacitor The AD9516 has many SPI selectable options that are set to a default mode of operation Consult the AD9516 data sheet for more information about these and other options PDWN To enable the power down feature short P301 Pin 3 to Pin 4 to the on positio
29. he desired frequency and amplitude refer to the specifications in the AD9276 or AD9277 data sheet In the default condition the evaluation board is set up to clock the ADC from the crystal oscillator OSC501 when in the TGC mode If a different or external ADC clock source is desired follow the instructions in the Clock section Typically most Analog Devices Inc evaluation boards can accept 2 8 V p p or 13 dBm sine wave input for the clock When connecting the analog input source it is recommended to use a multipole narrow band band pass filter with 50 O terminations Analog Devices uses TTE and K amp L Microwave Inc band pass filters The filter should be connected directly to the evaluation board OUTPUT SIGNALS The default TGC setup uses the FIFO5 high speed dual channel FIFO data capture board HSC ADC EVALCZ Two of the eight TGC channels can then be evaluated at the same time For more information on channel settings on these boards and their optional settings visit http www analog com fifo The default I Q demodulator setup uses two AD8021 amplifiers for I V conversion and two ADA4841 amplifiers for gain and filtering The analog outputs can be evaluated using an oscilloscope or spectrum analyzer Rev 0 Page 3 of 28 WALL OUTLET 100V TO 240V AC 47Hz TO 63Hz SWITCHING POWER SUPPLY SWITCHING aa ev oc 2A MAX SIGNAL SYNTHESIZER vees Ki 4LO INPUT ANALOG INPUT NE me e m
30. mm 1 L e SIGNAL SYNTHESIZER AGILENT dit Ze PC POWER SUPPLY Li li RUNNING ADC ill ii ANALYZER OPTIONAL m OR VISUAL ANALOG CLOCK OUTPUTS SPECTRUM TETE INPUT ANALYZER OSCILLOSCOPE W there zet GAIN CONTROL INPUT SIGNAL SYNTHESIZER 08282 002 Figure 2 Evaluation Board Connection Rev 0 Page 4 of 28 DEFAULT OPERATION AND JUMPER SELECTION SETTINGS This section explains the default and optional settings or modes allowed on the evaluation board for the AD9276 and AD9277 Power Circuitry Connect the switching power supply that is supplied in the evaluation kit between a rated 100 V ac to 240 V ac wall outlet at 47 Hz to 63 Hz and P601 Analog Input Front End Circuit The evaluation board is set up for single ended Kelvin connection analog input with an optimum 50 Q impedance match of 18 MHz of bandwidth For a different bandwidth response use the manual tune feature and antialiasing filter settings VREF VREF is set to 1 0 V This causes the ADC to operate with the internal reference in the 2 0 V p p full scale range A separate external reference option using the ADR130 is also included on the evaluation board Populate R320 with a 0 Q resistor and remove C301 Note that ADC full scale ranges less than 2 0 V p p are not supported by the AD9276 and AD9277 RBIAS RBIAS has a default setting of 10 kO R304 to ground and is used to set the ADC core bias current However note t
31. n AVDD on the PDWN pin STBY To enable the standby feature short P301 Pin 1 to Pin 2 to the on position AVDD on the STBY pin GAIN GAIN To change the VGA attenuation drive the GAIN pin from 0 V to 1 6 V on J401 using a linear supply This uses the single ended method to change the VGA gain from 0 dB to 42 dB U411 is available for users who wish to drive the gain pins GAIN differentially Install R426 R435 and R436 and remove C456 C457 and R440 to connect the amplifier correctly In differential mode a linear supply from 0 8 V to 40 8 V on J401 is required to change the VGA gain from 0 dB to 42 dB If an external source is not available remove R425 and install R438 to use the on board resistive divider R439 for gain adjustment in the single ended case CWI Q CWI Q To view the CWI CWI and or CWQ CWQ outputs configure the AD9276 and AD9277 to bein CW mode and enable each channel via the SPI Controller program Apply a 13 dBm 20 MHz reference clock 4LO on J303 Each enabled channel is summed and is available through J402 J403 DOUTx DOUTx If an alternative data capture method to the setup described in Figure 2 is used optional receiver terminations R604 to R613 can be installed next to the high speed backplane connector P604 Rev 0 Page 5 of 28 EVALUATION BOARD SOFTWARE QUICK START PROCEDURES This section provides quick start procedures for using the AD9276 and AD9277 either
32. ny kind express implied or statutory including but not limited to any implied warranty of merchantability or fitness for a particular purpose No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringements of patents or other rights of third parties that may result from its use Analog Devices reserves the right to change devices or specifications at any time without notice Trademarks and registered trademarks are the property of their respective owners Evaluation boards are not authorized to be used in life support devices or systems 2009 Analog Devices Inc All rights reserved Trademarks and registered trademarks are the property of their respective owners ANALOG UG08282 0 10 09 0 DEVICES Rev 0 Page 28 of 28 www analog com
33. on the evaluation board or at the system level design Both the default and optional settings are described CONFIGURING THE BOARD FOR TGC MODE Before using the software for testing configure the evaluation board as follows 1 Connect the evaluation board and the HSC ADC EVALCZ as shown in Figure 1 and Figure 2 2 Connect one 6 V 2 5 A switching power supply such as the CUL Inc EPS060250UH PHP SZ supplied to the evaluation board 3 Connect one 6 V 2 5 A switching power supply such as the CUI EPS060250UH PHP SZ supplied to the HSC ADC EVALCZ board 4 Connect the USB cable to J6 on the HSC ADC EVALCZ board to the PC 5 On the evaluation board place jumpers on all five pin pairs of J404 to connect the SPI bus 6 On the evaluation board ensure that J501 OSC EN is jumpered to the OFF setting to use the on board 40 MHz Valpey Fisher V FAC3 oscillator 7 Onthe evaluation board use a clean signal generator with low phase noise to provide an input signal to the desired channel Use a 1 meter shielded RG 58 50 coaxial cable to connect the signal generator For best results use a narrow band band pass filter with 50 O terminations and an appropriate center frequency Analog Devices uses TTE Allen Avionics and K amp L band pass filters USING THE SOFTWARE FOR TESTING Set Up the ADC Data Capture Block After configuring the evaluation board set up the ADC data capture block using the following steps 1
34. ropout linear regulators that supply the proper bias to each of the various sections on the board When operating the evaluation board in a nondefault condition L602 L603 L604 L605 L606 L607 L608 and L609 can be removed to disconnect the switching power supply This enables the user to bias each section of the board individually Use P602 P603 and P606 to connect a different supply for each section At least one 1 8 V supply is needed with a 1 A current capability for 1 8 V AVDD and 1 8 V DRVDD however it is recommended that separate supplies be used for both analog and digital domains An additional supply is also required to supply 3 0 V to the DUT 3 0 V AVDD2 This should also have a 1 A current capability To operate the evaluation board using the SPI and alternate clock options a separate 3 3 V analog supply is needed in addition to the other supplies The 3 3 V supply or 3 3 V AVDD should have a 1 A current capability To bias the CW I Q demodulator section and differential gain drive circuitry separate 5 V and 5 V supplies are required at P606 These should each have 1 A current capability INPUT SIGNALS When connecting the TGC time gain compensation ADC clock 4LO and analog source use clean signal generators with low phase noise such as Rohde and Schwarz SMA or HP8644B signal generators or the equivalent Use a 1 meter shielded RG 58 50 O coaxial cable for making connections to the evaluation board Enter t
35. which provides all of the support circuitry required to operate the AD9276 and AD9277 in their various modes and configurations The application software used to interface with the devices is also described The AD9276 and AD9277 data sheets available at www analog com provide additional information and should be consulted when using the evaluation board All documents and software tools are available at http www analog com fifo For any questions send an email to highspeed converters analog com TYPICAL MEASUREMENT SETUP 08282 001 Figure 1 AD9276 65EBZ AD9276 80KITZ AD9277 50EBZ Evaluation Board and HSC ADC EVALCZ Data Capture Board See the last page for an important warning and disclaimers Rev 0 Page 1 of 28 TABLE OF CONTENTS EE Equipment Needed ivan sto ee ene eec Documents Needed iai et petite bed dlani Software Needed nani General Description ENEE Typical Measurement Setup sse Evaluation Board Hardware see Power Supplies tette rete aka Input Signals dara Output Signals a a AE AAN 10 09 Revision 0 Initial Version Default Operation and Jumper Selection Settings 5 Evaluation Board Software Quick Start Procedures 6 Configuring the Board For TGC MODE sse 6 Using the Software for Testing sse 6 Using the Integrated I Q Demodulator EW Doppler Mode tr itte tite 9 Evaluation Board Schematics and Artwork
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