User Manual
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1. 4000000 a0 VME baseaddress STR725 5000000 a1 VSB offsetregister STR725 A24 1 f0000000 d0 VSB address to be accessed 3000 a2 internal memory address on VME CPU move b 20 d2 loop counter define VSB offset address un 90 set VSB write to VSB kkkkkkkkkkkkkkkkkkkkkkk WR_LOOP move a2 a0 access to VSB subi b 1 d2 decrement counter tst b d2 end of write loop beq WR_LOOP 6 5 STARTUP After power on the module is doing it s configuration and the LED I SEL CONF is on for a few seconds When configured this LED turns off and the LED VME should illuminate to indicate that the board is able to operate now 6 6 LEDs Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 13 V 1 21 On the front panel the LED User 1 is illuminated when data is written to the offset register The LED User 2 is illuminated when data is written to or read from VSB 7 VME SLAVE 16 BIT VSB MASTER 32 BIT MODE On the VSB side no arbitration is generated to get bus mastership single master 7 1 SELECTING THE DESIGN In this mode on VME side slave interface can be accessed only by 16 bit transfers in VME standard mode allowed address modifiers are 39 3A 3D 3E On VSB side the master interface reads writes only aligned 32 bit To generate one VSB cycle it is necessary to access VME slave with two 16 bit2. Y STIAN Elektronik f r High End Messtechnik Bastian Technology 16 12 99 09 33 16 12 99 725_ doc STR725 VME VSB or VSB VME Coupler Diese Dokumentation darf ohne Genehmigung der Fa Bastian Technology GmbH Co KG weder ganz noch teilweise in irgendeiner Form reproduziert werden O 1998 Fa Bastian Technology GmbH Co KG Tangstedt rights reserved No part of this document may be reproduced transmitted transcribed stored in a retrieval system or translated into any form O 1998 Fa Bastian Technology GmbH Co KG Tangstedt Bastian Technology Phone 49 0 4109 55 0 E mail sales batech de GmbH 8 KG 49 0 4109 55 133 support batech de B ckerbarg 6 Internet http www batech de D 22889 Tangstedt Project STR725 VME VSB Coupler A Author Version First issue Last modification Released on Status 4 Filename Serial number Released by Bastian Technology GmbH amp KG page 2 V 1 21 VME VSB Coupler STR725 T H T E OGK March 1993 November 1998 725_Nov98 doc JASTIAN Bastian Technology Bastian Technology GmbH 8 Co KG B ckerbarg 6 D 22889 Tangstedt Germany Phone 49 0 4109 55 0 Fax 49 0 4109 55 133 E mail sales batech
3. 16 12 99 Project STR725 VME VSB Coupler page 15 V 1 21 7 4 EXAMPLE 2 An example in 68xxx assembler which uses 400 0000 as selected VME baseaddress The VME CPU accesses via STR725 1 and a VDB connection a second STR725 2 in a second VME rack STR725 1 is the VME slave VSB master and STR725 2 acts as VSB slave VME master STR725 2 is jumpered to crate address 1 gt 25 0 A24 0 23 1 see example 1 in the main manual VME VSB Coupler 400 0000 a0 baseaddress STR725 1 85500 0000 1 VSB offset register STR725 1 A24 1 0002 00 internal offset register STR725 2 90 0000 d1 VME destination address to be accessed in the second VME rack C0 0000 42 declare access mode for second VME rack in STR725 2 VME extended non priv data acc 3000 a2 internal memory source address on VME CPU move b 20 d2 loop counter define VME offset address on STR725 2 move d0 a1 write internal offset address of STR725 2 into offset register of STR725 1 d1 a0 configure STR725 2 with dest address in second VME rack define VME cycles in second VME rack on STR725 2 move l d2 a1 write VME access mode for STR725 2 into offset register of STR725 1 end of configuration STR725 1 2 kkkkkkkkkkkkkkkkkkkkkkk write data block to second VME crate WR_LOOP move a2 a0 acce
4. 1 16 2 15 13 14 14 13 5 12 6 11 7 10 8 9 Jumper No no no no no 2 Example selected address bits are only A25 A24 A23 Crate address 4 25 A24 A23 Jumper Positions 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 Jumper no No no no no no yes yes Jumper J2 Positions 1 16 2 15 13 14 14 13 5 12 6 11 7 10 8 9 Jumper no no no no yes Jumper J3 Positions 1 16 2 15 13 14 14 13 5 12 6 11 7 10 8 9 Jumper yes No no no no no Jumper 14 Positions 1 16 2 15 13 14 4 13 5 12 6 11 7 10 8 9 Jumper yes No no no no no no no Jumper J5 VME Master Requester Level Level 3 20 11 O O O O O O O O O O O O O O O O 1 10 Level 2 20 11 Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 8 V 1 21 O O O O O O O O O O O O O O O O O O O O 1 10 Level 1 20 11 O O O O O O O O O O O O O O O O O O O O 1 10 Level 0 20 11 O O O O O O O O O O l l l l O O O O O O O O O 1 10 Jumper J6 VME Arbiter Type and Enable Disable VME System Controller Position 1 4 Requester Modus open ROR Release on Request closed RWD Release when done Position 2 3 System Controller open Disabled closed Enabled Jumper J7 VME IACKIN IACKOUT Daisy Chain Driver Positio
5. AAA AA 14 7 5 E ONO 15 A A ANNAN 15 Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 4 V 1 21 1 INTRODUCTION The STR725 is a versatile Interface module between the VSB and the VMEbus The used configuration EPROM Jumper defines the interfacing mode VME Slave VSB Master Mode or VSB Slave VME Master Mode Depending on the jumpered configuration this VME module uses the connectors P1 and or P2 All VSB lines using connector P2 and nearly all extended VME lines A32 D32 using connectors and 2 are linked through the specified drivers to STR725 Logic The buffered protocol lines of the VSBbus and the VMEbus and the control lines of the address data drivers are in connection with the programmable logic LCA Logic Cell Array The EPROM configures this LCA logic at starting up time It is possible to store 64 different LCA designs in one EPROM The required LCA design can be selected by jumper setting The module can work either in VME Slave VSB Master mode RDY_VSB LCA Design or in VSB Slave VME Master mode RDY_VME LCA Design The 5 725 can be prepared by software LCA for a multitude of interface tasks and so it is a wizard among the interfaces Only a few possibilities of designing for the VSB VME mode can be listed here In Uni Master mode in a VME crate arbitration in the VME crate 15 not necessary In VSB Blocktransfer mode the VME address can be automatically
6. de support batech de Internet http www batech de Print 16 12 99 Project STR725 VME VSB Coupler page 3 V 1 21 CONTENTS 1 5178725 INTRODUCTION J J 4 2 HARDWARE CONMNPONENTS J 5 3 JUMPER FUNCTION AND JUMPER 6 4 LEDS daa n iaii 9 5 VSB SLAVE VME MASTER MODE entente aaa 9 5 1 VSB Slave VME Master mode LCA Design 9 6 VME SLAVE 32 BIT VSB MASTER 32 MODE 11 6 1 Selecting CAD CSS Cd RR 11 6 2 Selecting VME Base address 12 6 3 EE O oh OE Ep 12 n MENO cnn etre 12 M E 13 6 6 A NA 13 7 VME SLAVE 16 BIT VSB MASTER 32 MODE 13 74 Selecting the Design wiccisscsccsccsssssscenceasccassadcossssovcesssssvensagsbiscesosvensssesssassessvensonstcsncessevesdessoeseseseouasdes 13 7 2 Selecting VME Base address susoussossssnssonsnnssnsnnssnssossnnsonsnnsnnsnnssnnsnssnnsonsnnssnsnnssnnsonsnnsnnsnnee 13 7 3 13 7 4
7. incremented Timing adaptation on a slave without VME Standard is possible In Read mode LCA logic can activate the Read cycle before 1 15 demanded by the VSB prefetching Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 5 V 1 21 2 HARDWARE COMPONENTS Block Diagram STR725 Latches over IAD 31 16 ES AS AD 31 16 AD 15 0 AR Latches Driver 3E Ce Compara tor IA 15 0 9 46 N VALID 3p 2 LCA Logic Protocol Lines VME System Controller Disable Enable VSB ANA 3 JUMPER FUNCTION AND JUMPER SETTINGS Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 6 V 1 21 JUMPER FUNCTION Address selection Selection Address bits 31 24 J2 Address selection Enable Address bits 31 24 J3 Address selection Selection Address bits 23 16 J4 Address selection Enable Address bits 23 16 15 Selection of VME Requester Level J6 VME Arbiter Type and Enable Disable VME System Controller 17 VME IACKIN IACKOUT Daisy Chain Driver 18 VSB Arbitration Daisy Chain only VSB Master Mode J9 Selection of LCA Design JUMPER SETTING J1 J3 If a Jumper is inserted in this array the selected address bit will be used for address decoding J2 J4 Jumpers in the array J2 J4 define the level of the selected address bits for a valid addres
8. VSB VME Al AO 1050 DSI LWORD 50 bl b2 b3 0 0 H L x B2 x x x 0 1 L H x x B3 x x 1 0 H L x x x B2 x 1 1 L H x x x x B3 VSB Byte Transfer VME Extended 32 Bit VSB VME Al AO 1050 DSI LWORD b0 bl b2 b3 0 0 H L H x x BO x 0 1 L H H x x x Bl 1 0 H L H x x B2 x 1 1 L H H x X X B3 VSB Word Transfer VME Standard 16 Bit VSB VME AI AO 1050 DSI LWORD 50 bl b2 b3 0 0 L L x B2 B3 x x 1 0 L L x x x B2 B3 VSB Word Transfer VME Extended 32 Bit VSB VME Al AO 1050 DSI LWORD 50 bl b2 b3 0 0 1 L H x BO 1 0 L L H x X B2 B3 Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 11 V 1 21 VSB Longword Transfer VME Standard 16 Bit one VSB Cycle two VME Cycles VSB VME Al AO 080 DSI LWORD 0 bl t2 b3 0 0 L L x 1821 1 B22 B30 1 1 Cycle with A120 2 2 Cylce with Al 1 VSB Longword Transfer VME Extended 32 Bit VSB VME Al 0 080 051 LWORD 0 bl b2 3 1 0 0 L L L B2 B3 6 VME SLAVE 32 BIT VSB MASTER 32 MODE VSB side arbitration is generated to get bus mastership single master Restrictions This mode requires a special chip set of Xilinx LCAs The two Xilinx devices should be as XC3030 100 and the EPROM on the board should be labeled as STR725 201 6 1 SELECTING THE DESIGN In this mode on and VSB side only aligned 32 bit transfers are allowed For this design only th
9. a Access AM 09 1 0 1 VME Extended Supervisor Data Access AM 0D 1 1 0 used internal AM Register only 1 VME Cycle 1 1 1 STR725 internal addressing Internal Addresses Offset R W Function 2 W write internal VME Offset address register Bits 31 20 2 R read internal VME Offset address register and address Register Bits 31 0 4 W write internal SIZE and AM Register Bit 9 0 6 W write internal IRQ Enable Register Bit 31 24 6 R read internal IRQ Enable Register Bit 31 24 8 R Version Register C R read VME IRQs Bit 31 24 E R generate VME IRQ Ackn Cycle SIZE AM Register Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 10 V 1 21 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Adress increment Led User2 LED Userl SIZE1 SIZEO disable 5 4 Bit 3 Bit 2 Bit 1 Bit 0 AM5 AM4 AM2 AMI AMO VSB Slave VME Master Register Convention Table Bus Bits 31 24 Bits 23 16 Bits 15 8 Bits 7 0 VSB Bus 32 50 51 b2 b3 VME Standard Bus 16 B2 B3 VME Extended Bus 32 Bl B2 B3 VSB Size Bit SIZE 1 Bit SIZE 0 Size of Data Transfer Write Data into SIZE and AM Register 0 0 Longword 32 0 1 0 Word 16 80 0 1 Byte 8 40 Data Transfer only aligned transfer allowed VSB Byte Transfer VME Standard 16 Bit
10. cycles For this design only the jumper areas J3 14 J7 and 19 are relevant The jumper configuration of J9 for using this design is shown here 1 16 Set 2 15 unset 3 14 set 4 13 set 5 12 set Jumper setting J9 6 11 set 7 10 set 8 9 set 7 2 SELECTING VME BASE ADDRESS For adjusting the base address of the VME slave refer to chapter 3 only jumpers J3 and J4 The jumper areas 71 and J2 should be left open when working in A24 address space they will be used only in A32 mode Only the jumper position 4 13 on J1 and J2 has to be open Jumper J6 should be open and at J7 position 1 2 should be closed Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 14 V 1 21 7 3 OPERATION The VME addresses 1 19 are directly mapped into the VSB address range The upper VSB address bits A20 A31 are settable in an address offset register To access the offset register only one 16 bit cycle is necessary The flow of VME VSB cycles appears as follows Write to 5 725 via VME In the first 16 bit VME cycle the address A19 A1 and the data word high word are latched on the board At this point there is no action on VSB side In the second 16 bit VME cycle the data low word is stored on the module and the latched VME address from first VME cycle 15 combined with the value in the offset register and written to VSB side as a valid address After the address phase
11. e jumper areas J1 J4 J7 and 19 are relevant The jumper configuration of J9 for using this design is shown here 1 16 set 2 15 set 3 14 set 4 13 set 5 12 set Jumper setting J9 6 11 set 7 10 set 8 9 set In this mode only extended 32 Bit VME transfers incl blocktransfers from and to the STR725 are allowed 6 2 SELECTING VME BASE ADDRESS For adjusting the base address of the VME slave refer to chapter 3 only jumper J1 to J4 Jumper J6 should be open and at J7 position 1 2 should be closed 6 3 OPERATION Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 12 V 1 21 The VME addresses 1 19 are directly mapped into the VSB address range The upper VSB address bits A20 A31 are settable in an address offset register To write to the offset register the following VME address is necessary VME base address A23 1 Offset Register Writing an address to the offset register the data bits D20 D31 represent the upper VSB address An access to the module via VME generates VSB cycles with following addresses VME base address offset Register D20 D31 VSB address The VSB address offset register cannot be read back Note STR725 is shipped with address for offset register 500 0000 and base address ist 400 0000 6 4 EXAMPLE 1 An example in 68xxx assembler which uses 400 0000 as selected VME baseaddress The VME CPU accesses STR725 directly
12. is finished both stored data words high and low word are transferred to VSB The second VME cycle wraps the VSB action in the sense that the VME cycle will be terminated when the complete VSB access has done Read from STR725 via VME In the first VME cycle the contents of the VSB address offset register 15 appended to the VME address and written to VSB A 32 bit read action is done on VSB side the low data word D15 D0 is stored on the board and the high data word D31 D16 is presented on the VME data lines After the VSB cycle is terminated this first VME cycle is acknowledged The second VME access runs without VSB action The stored low data word D15 DO is fetched To write to the offset register the following VME address is used VME base address A20 1 Offset Register Writing an address to the offset register the data bits D20 D31 represent the upper VSB address The bit positions D16 D19 are dont care they are part of the present VME address Address offset register Bit positions 16 bit within offset register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 12 bit VSB address offset don t care 31 30 29 28 27 26 25 24 23 22 21 20 X X X X An access to the module via VME generates VSB cycles with following addresses Accessed VME address A1 A19 offset register D20 D31 VSB address The VSB address offset register cannot be read back Bastian Technology GmbH amp Co KG Print
13. n 1 2 closed if STR725 is not a VME System Controller Position 2 3 closed if STR725 is a VME System Controller 4 LED s O RDY VSB green indicates the VSB Slave VME Master mode Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 9 V 1 21 O RDY VME green indicates the VME Slave VSB Master mode O LSEL CONF yellow indicates selection and configuration O VSB ACT red indicates own activities on the VSB side O VME ACT red indicates own activities on the VME side O VME ENSYS green indicates that VME System controller is enabled O USERI red user definable O USER2 red user definable During configuration of the LCAs the LED I SEL CONF is on and the both LED s RDY VSB and RDY VME are off After configuration one of the LED s RDY VSB and 15 and in case of VME master VSB slave the LED I SEL CONF is on when selecting the STR725 5 VSB SLAVE VME MASTER MODE 5 1 VSB SLAvE VME MASTER MODE LCA DESIGN All Jumpers of J9 have to be inserted 1 Design The address bits 25 24 23 form the Crate address Jumpers J1 J2 J3 J4 Addressing Bits 25 24 23 gt Crate Address Bit 22 Bit 21 Bit20 Function 0 0 0 VME Short Non Privileged Data Access AM 29 0 0 1 VME Short Supervisor Data Access 2 0 1 0 VME Standard Non Privileged Data Access AM 39 0 1 1 VME Standard Supervisor Data Access AM 3D 1 0 0 VME Extended Non Privileged Dat
14. s window Open Jumper positions on J1 J3 have to be open also on J2 J4 Jumper Positions 1 16 2 15 13 14 4 13 15 18 6 11 7 10 Address bit 31 130 129 128 27 26 125 124 open not selected close selected Jumper J2 Positions 1 16 2 15 13 14 4 13 15 18 6 11 7 10 decoded bit 31 130 29 28 27 26 125 124 open decoded as 1 close decoded as 0 Jumper J3 Positions 1 16 2 15 13 14 4 13 5 12 6 11 7 10 Address bit 23 22 21 120 19 18 17 116 open not selected close selected Jumper J4 Positions 1 16 2 15 13 14 4 13 5 12 6 11 7 10 decoded bit 23 22 21 120 19 18 17 116 open decoded as 1 close decoded as 0 1 Example selected address bits are only A25 A24 A23 address 1 25 24 A23 Jumper Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 7 V 1 21 Positions 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 Jumper yes yes Jumper J2 Positions 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 Jumper no No no no no no yes yes Jumper J3 Positions 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 Jumper yes No no no no no no no Jumper 14 Positions
15. ss to VSB subi b 1 d2 decrement counter tst b d2 end of write loop beq WR_LOOP Bastian Technology GmbH amp Co KG Print 16 12 99 Project STR725 VME VSB Coupler page 16 V 1 21 7 5 STARTUP After power on the module is doing it s configuration and the LED I SEL CONF is on for a few seconds When configured this LED turns off and the LED VME should illuminate to indicate that the board 15 able to operate now 7 6 LED s On the front panel the LED User 1 is illuminated when data is written to the address offset register The LED User 2 is illuminated when data is written to or read from VSB Anderungen Changes Name Bemerkungen OGK Bastian Technology GmbH amp Co KG Print 16 12 99
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