eZ80F91 Modular Development Kit User Manual
Contents
1. P 2 FSI 1 Eu C BH EH EH Hg n H psl 1 HH x EH EH e MES EB Hi E yee HH eat ae E H eg E BH Sh se E i ge ra aa lt att R14 9e ue m 44 _ s p mm M mm c EH 1 3 ES 4 EH j 4 n Edi E EB to 8 e Tiu A ES TU CBE _ 2 ZDI T Ez EH EH EH EH EH EH H eD p 5 x 0 100 i FABRICATION NOTE EF Jn a mpo a 2 00 1 ICE 12 2 BE PLATED WITH 0003 fin LEAD s lt COLOR MATT BLACK OVER BARE SID2. GND F91 Wi 91 WP ror R1 SN74LVC2G04 7 HEADER2 VCC 33v JP F91 WE R4 R5 68R 2RT MMA 0204 2 IRDA SD 4 PD1 3 6 GND SN74LVC2G04 Schematics gt A 0 23 MII_TXD3 TXD2 TXD1 TXDO TXEN MI TXER MDC PA7 PWM3 PA6 PWMZ EC1 PA5 PWM1 TOUT PA4 PWMO TOUTO PA3 PWM3 OC3 PA2 PWM2 OC2 PA1 PWM1 OC1 PA0 PWMO PB7 MOSI PB6 MISO 5 ICB3 PB4_ICA2 PB3_SCK PB2_SS PB1 IC1 PBO IC0 PC7 RIT PC6 DCD1 PC5 DSR1 PC3 CTS1 PC2 RTS1 PC1 RXD1 PCO_TXD1 PD7 RIO PD6 DCDO PD5 DSRO PD4 PD3 CTSO PD2 RTSO PD1 RXDO IRRXD PD TXDO IRTXD HALT SLP PHI INSTRD TDO TRIGOUT SCLY Wesco IICSDA PA7 gt gt gt PA O 7 PD 0 7 pM9 SHALT SLP B11 _____________SSezsocLk E48 TRIGOUT us Do 01 02 03 04 05 06 07 R12 war gt gt WATT d Wart VCC 33v BUSREQ MZd BUSREG 10K Sy ML dec i TMS We TMS TCK TCK TDI TDI TRSTN IRSIN 1108 TRSTN RST RESET F91_wp yy t9 WP WP ERS DA ier AH MIL COL H MI RXER A SN RXD3 MI RXDS RXD2 Ds d MI RXD2 0 056uF R18 RXDO E MI RADO op 499 REK cs MII RXCLK c TXCLK FIL
3. connector 2 Figure 8 eZ80Acclaim MDS B Schematic Diagram 1 of 2 J9 2 1 2 2 at 2 DIS IRDA ea E 1 2 PAT PAG vec aw vcc_33v 3 4 1 tara AU 52 TRSTN PAZ 0 4 Ls HEADER2 7 8 PAT z 8 PAU a DIS IRDA GND 2 10 _ 33V EN s GND GND GND PBT Yer 10 R14 AT PBS PB4 22 gt PB6 RES ia w HRD Por 4 CUST VCC SRAM GND 15 Hever aov PBS 127 He PB CRI 04 18 18 D wj 4 A 1 der 4 PBT 19 19 20 DE 19 GND GND HEADER 1 T5 24 22 Ata POS 21 22 PCS ow 21 GND Peo 18 24 23 24 18 19 POS fe ros R15 A8 28 GND PC2 25 28 PCI FC 5 pes SRAM VCC 33V 8 PCO 27 28 PO 220 s CS3 GND GND o Ar AS PDS m DEN 32 1 33 PD7 32 31 Rt Di 33 3 AU su 34 PD2 pp2 032 3 3 Di E PDS LEDYEL VOU SV 2015510 Tor e as D ere Emma u x Agta VOCs TUO 37 TOI GND 37 T 7 22 39 40 GND 39 40 TRIGOUT ATIP D7 OD 4 3 GND CS0 4 42 CSI TCK 41 42 TMS WR
4. TxD VDDRX 31 7553 TXD2 PD p30 R15 4k 2 LED3 NWAYEN 29 lt as coum LED2 DUPLEX EEED GND22 CRS RMII LED1 SPD100 noFEF 27 DNK GND LEDO TEST SSN 24 INT vec INTIPHYADDO Wn Ak KS8721BL Make sure that power connections DDC e and nets VDD PLL VDDC have gt the shortest route possible 14 c15 16 c19 O 1uF O 1uF 47uF Header 1 33V JP2 4 4 c17 cia c20 veg 33v O 1uF 0 00108 47uF GND C21 0 1uF TX TX RX R20 49 9 RX P1 33V 1 TXCT t R22 195 x De R21 49 9 R23 R24 4 VCC 33V 5 T 220 220 4 6 X R25 499 8 VCC 33 OND 9 AN1 324 cri AN2 12 c2 LEDLNK HFJTI 2450E SPEED C25 C26 c27 C28 C29 C30 C31 C32 C33 0 001 0 001uF 0 001uF 0 001uF O 001uF O 001uF 0 001uF O 001uF 0 001uF 5 GND C38 C39 C40 cat O 1uF O tuF O tuF 0 1uF VCC 33V VCC 33V 9 00 399 CPU amp PHY OND eno GND Figure 11 eZ80F91 Module Schematic 2 of 2 Schematics Figure 12 indicates the physical dimensions of the eZ80F91 Ethernet Module R 0 10 190 4 PLCS 1 250 MOUNTING REF HOLES MOUNTING Pw eZ80F91 Modular Development Kit User Manual wn BIXYS ompar FABRICATION NOTES TRACE WIDTH TOLERANCE 12 FINISH EXPOSED COPPER TO BE
5. PDT TK 5552 s 44 D0 RTC_VDU3 44 EZBOCLK 44 43 AZ POU a4 TDI Di 45 46 D2 JICSCL 45 AS 45 M4 Do i Por 330 D3 47 48 D4 TICSDA 4 48 GND 5 8 47 GND oro L D5 49 50 GND FLASH woo 4g MHCSCL 50 45 DIS ROA 51 DI 5 52 D6 os 82 DIS_IRDA A 15 TICSDA WAT PB3 155 52 9ND MREG 53 54 JORE RST 54 om e E 2 53 RET GND 5 6 RD 56 GND veo Sem S L3 voc 33V 56 55 VOT 33V SW PUSHBUTTON WR sr 58 NSTRD HALT SUP 57 58 MMI Em TEST BUSACK 59 60 HBUSREQ 33 59 50 CT HEADER 28x2 HEADER 28x2 HEADER 30x2 SM HEADER 30x2 SM MINI MODULE CONNECTORS E ut LF n2 GND 22 S8D GND o afm ED 5 lt a At F Do z 82 m2 L ar po H2S rpi I vec sv EUER ee F ESTE vos 185 10 E 2 02 22 Eb gere 05 Pu 1 05 En ae Fo HEADER 2 2 DS iL 2a2 282 16 A 42 L D EM OTe ons Nu p 44 Em 10K a GPRS MODEM Er GND 2 4 2B4 GND A1 as 08 2 5 285 AWO ag 32 CONNECTORS a al zi VCC 33V AZ a A10 D10 34 H4 TOE vcc A At 22 pa FLASHLEN 22 ei ZDI my D12 38 Fa QO OotuF 5 INTERFACE ms at Fi ci GND VCC_33V z PRSTn 76 24 ae AO 1 1 pp ao La HEADER 2 CS3 GND 23 4p TDI E A16 KE SS q5 AT AIT AM m 16 la an 22 10K Header 3x
6. LEDs D1 and D2 that function as follows Pressing the Test pushbutton S1 pulls PB3 Low The yellow LED D1 is controlled by PB5 active Low The green LED D2 is illuminated when power is applied to the board UMO017010 0112 eZ80Acclaim MDS Adapter Board Test Switch and LEDs 21 eZ80F91 Modular Development Kit User Manual 21109 22 eZ80F91 Module This section describes the eZ80F91 Module hardware and its interfaces and key components including the CPU real time clock and memory Functional Description The eZ80F91 Module is a compact and high performance module that has been designed for the rapid development and deployment of embedded systems Despite its small footprint the eZ80F91 Module provides a CPU Ethernet interface SRAM and real time clock This module is pow ered by the eZ80F91 microcontroller a member of the eZ80Acclaim product family eZ80F91 Module Operational Description As a feature of the eZ80F91 Modular Development Kit the purpose of the eZ80F91 Module is to provide a design platform to enable the use of such eZ80F91 device features as on chip EMAC SRAM and Flash Static RAM The eZ80F91 Module features 128KB of fast SRAM Access speed is typically 12ns allowing zero wait state operation at 50MHz With the CPU operating at 50M Hz SRAM can be accessed with zero wait states in eZ80 Mode CS1_CTL CS1 can be set to 08h no wait states The eZ80F91 Mini Enet Module is sh
7. ede aad dae eee wee 1 Kit Features cos ee ae eae q 1 Safesuards IR Sa ea eee ne pa s din 2 eZ80F91 Modular Development Kit Overview 3 eZ80Acclaim MDS Adapter Board 5 eZ80F91 Module Interface 5 Peripheral Bus Mini Module Connector Jl 5 Mini Module Connector J2 9 Peripheral and I O External Interface 12 Peripheral Bus External Connector JP 12 External Connector JP2 16 GPRS Wireless Modem Interface 18 eZ80Acclaim MDS Adapter Board Jumper Settings 20 eZ80Acclaim MDS Adapter Board Test Switch and LEDs 21 eZ80F91 Module cei ee ee tr eee siis ERR as 22 Functional Description uuu ee rerea s ee A RAE UR n 22 eZ80F91 Module Operational Description 22 Statie RAM hee EC RR Rae dure da 22 On Chip Flash Memory 23 External Flash Memory 23 PHY scp eee beer mut Ie eel Reo deiode 24 IrDA Tr nscetyer sto Red epa e xd E Re nada eed ce a 24 Programming On Chip Flash Memory 26 Flash Loader Utility scies eR ea ds 27 UM017010 0112 Table o
8. oF RTSO dE 4 12 T2OUT T2IN PD1 o RxDO PD3 ot 16 RiouT H vec 33V 6 CTSO 2 10 ga R2IN R20UT J T DB9 F MALE EN bi usa J8 11 4 ne 2 11 SHDN 1 1 NC SHON 2 74LV05 74LV05 SND RS232 1 DIS GND usc UB 74LV05 1 43 4 GND Hi lt PB6 74LV05 74LV05 R10 R11 R12 R13 10K 10K 10K GND 10K VCC 33V Figure 9 eZ80Acclaim MDS Adapter Board Schematic 2 of 2 UM01 7010 0112 Schematics Figures 10 and 11 show schematic diagrams of the eZ80F91 Module 23 A 0 23 gt D 0 7 gt 5 0 3 gt VCC 33V R2 R3 4 7 4 7K IICSDA connector 1 IICSDA IICSDA asb 2 IICSCL 4 IICSCL HALT SLP yy HALT SUP RTC_VDD NDD eZ80CLK eZ80CLK gt gt PD 0 7 PD O 7 PT 33V R7 2 2 10K R9 10K 10K TDI TCK TDI TCK TRIGOUT TMS TDO TRSTN TRIGOUT VCC 33V o vcc aav 33 9 0 UM017009 0708 connector 2 J1 VCC33V 2 1 VCC 33V AO a 2 6 5 AT A1 8 Z 10 9 A10 GND 12 11 GND D5 14 13 RD D4 46 15 D1 D2 18 i7 DO D6 20 19 GND 22 21 GND AT8 24 23 A19 A20 26 25 A21 A22 28 27
9. 25 GND GND La CK 44 43 TDI 45 GND 48 47 HCSCL 50 49 DIS_IRDA ICSDA s2 51 WAIT E 54 53 RST VCC 33V 56 55 VCC 33V LUT Figure 4 eZ80Acclaim MDS Adapter Board I O Mini Module Connector J2 Table 2 eZ80Acclaim MDS Adapter Board I O Mini Module Connector J2 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 PA3 Bidirectional n a Yes 2 PA4 Bidirectional n a Yes Notes 1 To simplify interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UM017010 0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual Zi An BIXYS Table 2 eZ80Acclaim MDS Adapter Board I O Mini Module Connector J2 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 3 PA7 Bidirectional n a Yes 4 PA5 Bidirectional n a Yes 5 PB5 Bidirectional n a Yes 6 PAO Bidirectional n a Yes 7 PB6 Bidirectional n a Yes 8 PA1 Bidirectional n a Yes 10 EZ80CLK Output n a Yes 11 PB1 Bidirectional n a Yes 12 PB7 Bidirectional n a Yes 13 PC4 Bidirectional n a Yes 14 PB3 Bidirectional n a Yes 15 PA6 Bidirectional n a Yes 16 PC7 Bidirectional n a Yes 17 PB4 Bidirectional n a Yes 18 PA2 Bidirec
10. AnBIIXYS Comp 20 eZ80Acclaim MDS Adapter Board Jumper Settings The eZ80Acclaim MDS Adapter Board contains four jumpers that are listed in Table 7 Table 7 eZ80Acclaim MDS Adapter Board Jumper Settings Jumper Name Affected Device Position Function J4 FL EN On board Flash IN Default On board Flash is enabled when installed OyT On board Flash is disabled J6 FL WEN On board Flash IN On board Flash is disabled for writing when installed QUT On board Flash is enabled for writing J8 RS 232 1 DB9 connector P2 IN RS 232 output on connector P2 is DIS disabled PB6 Don t Care OUT When PB 6 0 the RS 232 output on connector P2 is disabled When PB 6 1 the RS 232 output on connector P2 is enabled In all cases the RS 232 input on connector P2 is enabled J9 IRDA 0152 IrDA transceiver IN Default IrDA transceiver on eZ80F91 Mini when installed Enet Module is disabled OUT IrDA transceiver on eZ80F91 Mini Enet Module is enabled Notes 1 If AM29LV160 is used J6 and R6 should be OUT If AT49BV162 is used R6 should be IN and J6 should be OUT 2 Jumper J9 functions only when you have installed IrDA transceiver on eZ80F91 Mini Enet Module UM017010 0112 eZ80Acclaim MDS Adapter Board Jumper Settings eZ80F91 Modular Development Kit User Manual zilog An TXYS eZ80Acclaim MDS Adapter Board Test Switch and LEDs The MDS Adapter Board contains a Test pushbutton switch S1 and two
11. PLATED WITH INCH OF IMMERSION GOLD OVER 150u INCHES ELECTROLESS NICKEL PER IPC 4552 SOLDERMASK Popes MATT BLACK OVER BARE COPPER BOTH SIDES HOLE SIZES ARE FINISHED TOL 001 4 002 LAMINATE IS UL APPROV FRA 062 THICK oz COPPER CLAD SILKSCREEN BOTH SIDES YELLOW DRILL ACCORDING TO SUPPLIED DRILL FILE FABRICATE PER IPC A 600C PCB MFG SPEC LAYER 1 COMPONENT SIDE LAYER 2 PUE E SIGNAL 1 LAYER 3 VCC PLANE LAYER 4 GROUND PLANE LAYER 5 INTERNAL SIGNAL 2 LAYER 6 SOLDER SIDE Figure 12 Physical Dimensions eZ80F91 Ethernet Module UM017009 0708 Schematics eZ80F91 Modular Development Kit User Manual Eo AnBIXYS c Figure 13 indicates the physical dimensions for the eZ80Acclaim Platform
12. internal Flash memory refer to the eZ80F91 ASSP Product Specification PS0270 External Flash Memory The eZ80F91 MDS Adapter Board provides a footprint for 2 MB of exter nal Flash memory The eZ80F91 Mini Enet Module supports this external UM017010 0112 eZ80F91 Module Operational Description eZ80F91 Modular Development Kit User Manual IIA r ILU U UU y AnDIXYS Company 24 Flash via the full system bus which is available on the expansion inter face connectors PHY Circuit The PHY KS8721 circuit has been extensively tested However for new designs Zilog recommends that you refer to the following documentation on the Micrel website KS8721BL SL 3 3 V Single Power Supply 10 100Base TX EX MII Physical Layer Transceiver Data Sheet KS8721BL KS8721CL KS8001L Design Guide for Interchangeabil ity Application Note 134 IrDA Transceiver The eZ80F91 Mini Enet Module is shipped without an IrDA transceiver installed If you install an on board transceiver such as Zilog s ZHX1810 it connects to PDO TX PD1 RX and PD2 Shutdown IR_SD The IrDA transceiver is of the LED type 870nm Class 1 The IrDA transceiver is accessible via the IrDA Controller attached to UARTO on the eZ80F91 device To save power or to use the UARTO as a console the transceiver can be disabled by the software or by an off board signal when using the proper jumper selection The transceiver is disabled by setting PD2 IRDA_S
13. 1 Flash Memory Not Installed External 60 pin Interface Headers Two GPRS Headers External 56 pin Mini Module Headers Two Power Supply Figure 1 eZ80Acclaim MDS Adapter Board Block Diagram UM017010 0112 eZ80F91 Modular Development Kit Overview eZ80F91 Modular Development Kit User Manual 2100 9 Figure 2 displays a block diagram of the eZ80F91 Module 128KB SRAM 5 F91 Bus consists of 24 bits of Ethernet PHY MII eZ80F91 address 8 bits of data 32 bits ul gt of GPIO and control signals 56 pin Mini Module Connectors two SIR IrDA not installed Figure 2 eZ80F91 Mini Enet Module Block Diagram Schematics for the eZ80F91 Module and eZ80Acclaim MDS Adapter Board are provided in the Schematics chapter on page 30 UM017010 0112 eZ80F91 Modular Development Kit Overview eZ80F91 Modular Development Kit User Manual ZILOg An TXYS eZ80Acclaim MDS Adapter Board This chapter describes the functions of the eZ80Acclaim MDS Adapter Board eZ80F91 Module Interface The eZ80F91 Module interface on the eZ80Acclaim MDS Adapter Board consists of two 56 pin mini module receptacles Almost all of these receptacles signals are connected directly to the CPU Three input signals offer options by disabling certain functions of the eZ80F91 Module These three input signals are Disable IrDA DIS IrDA Used only if you have installed an external SIR IrDA transc
14. 2 9 5 NC 13 24 a 18 NC RST 24 GND RST 2 51 et R6 RESET mv 18 F EOE DCUT re RST VCC_33V 14 RYBY vec 33V 6 28 Pos ME Nee HEADER 9 28 PCS DSR PCS RD 284 oe C2 ca 28 VCC 33V 10K 95 30 m RESET FLASHEN 26 ce au or 3 1 44 ua s WR GND 48 1 155g 2 GND o o R7 GND HEADER 32 2 33V BYTE Am29LV160D vec 33V Toratycus JTAG N lt 10K GND p INTERFACE GND R8 TDI 4 1K TDO 1 2 TC74LVT125 TCK E E GND TVCC_RESETn 1 E TMS CC 35 PRSTR 12 13 14 HEADER2 Schematics eZ80F91 Modular Development Kit User Manual Jr F1 5v VCC 5V ESI SNA 33V ol RXE160 F c4 1 als PWR JACK o1 75 22uF z iid 05 TC74LVCOB 4 U3B GND a 34 GND t VN VoUr 33V C 33V Vcc 33v TC74LVT125 5 GND 171086 3 3 70220 u TC74LVCOB 9 ot GREEN 3 3 OK T gt gt GND 39 U4D TC74LVT125 3 TC74LVCOB POWER sUppLy 8 VCC 33V GND M 0 tuF g ue cs MAX3222 4 8 eu ELO Sp SND ci 4 sd TC7ALVT125 pu 9 O 4uF 7 6 0 1uF v 2 P2 N 74LV05 oH x 17 TtouT 33 PDO
15. 2 4 sv 5 L6 Eam Ls HEADER 2 9 10 11 GPRS MODEM 12 i3 CONNECTORS 14 15 L18 Liz iB 419 L20 J11 a 22 2p Ea GN 1 PC4_DIRI PC4 7 26 CTSi HEADER 9 58 1 29 _ 7 PC7 30 31 PCT RXD1 32 HEADER 32 Figure 7 eZ80Acclaim MDS Adapter Board GPRS Wireless Modem Connectors J3 J11 and J12 UM017010 0112 GPRS Wireless Modem Interface eZ80F91 Modular Development Kit User Manual Z An TXYS Note The pins on Connector J12 are not connected to any MDS board signals Table 5 eZ80Acclaim MDS Adapter Board GPRS Wireless Modem Connector J3 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 unused n a n a n a 2 GND n a n a Yes 3 unused n a n a n a 4 VCC 5V n a n a No 5 23 unused n a n a n a 24 GND n a n a Yes 25 PC4 DTR1 Output Low Yes 26 PC6 DCD1 Input Low Yes 27 CTS1 Input Low Yes 28 PC5_DSR1 Input Low Yes 29 PC7_RI1 Input Low Yes 30 PCO_TXD1 Output n a Yes 31 PC1_RXD1 Input n a Yes 32 PC2_RTS1 Output Low Yes Table 6 eZ80Acclaim MDS Adapter Board GPRS Wireless Modem Connector J11 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 RST Output Low Yes 2 GND n a n a Yes UMO017010 0112 GPRS Wireless Modem Interface 19 eZ80F91 Modular Development Kit User Manual
16. Bidirectional n a Yes 45 A14 Bidirectional n a Yes 46 A9 Bidirectional n a Yes 49 A16 Bidirectional n a Yes 50 A5 Bidirectional n a Yes 51 A15 Bidirectional n a Yes 52 A4 Bidirectional n a Yes Notes 1 To simplify the interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 External capacitive loads on RD WR IORQ MREQ 00 07 and 0 23 should be below 10pF to satisfy the timing requirements for the 280 CPU All unused inputs should be pulled to either Vpp or GND depending on their inactive levels to reduce power consumption and to reduce noise sensitivity To prevent EMI the EZ80CLK output can be deactivated via software in the eZ80F91 MCU s Peripheral Power Down Register UMO17010 0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 2110 Og A BIXYS lt Mini Module Connector J2 Figure 4 displays the pin layout of the 56 pin Peripheral Bus Mini Mod ule Connector J2 on the eZ80Acclaim MDS Adapter Board Table 2 lists the pins and their functions J2 PA4 2 1 PAS 4 3 PAT 6 5 PB5 8 1 EZ80CLK 10 9 VCC 33V 587 12 11 rer 14 13 PCT 16 15 PAG 20 19 Pe E PC6 PCI 24 23 PCT PCO 5g 27 2 29 GND PD 32 Lai PD5 34 aa PD4 PD3 THIGOUT S
17. Bidirectional n a Yes 31 A4 Bidirectional n a Yes 32 A20 Bidirectional n a Yes 33 A5 Bidirectional n a Yes 34 A17 Bidirectional n a Yes 36 DIS FLASH Input Low No 37 A21 Bidirectional n a Yes 39 A22 Bidirectional n a Yes 40 A23 Bidirectional n a Yes 41 CSO Output Low Yes 42 CS1 Output Low Yes 43 CS2 Output Low Yes Notes 1 To simplify interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UMO17010 0112 Peripheral and I O External Interface eZ80F91 Modular Development Kit User Manual Z AnDTXYS Table 3 eZ80Acclaim MDS Adapter Board Peripheral Bus External Connector JP1 Identification Continued Pin Symbol Signal Direction Active Level eZ80F91 Signal 44 49 D 0 5 Bidirectional n a Yes 51 D7 Bidirectional n a Yes 52 D6 Bidirectional n a Yes 53 MREQ Output Low Yes 54 IOREQ Output Low Yes 56 RD Output Low Yes 57 WR Output Low Yes 58 INSTRD Output Low Yes 59 BUSACK Output Low Yes 60 BUSREQ Input Low Yes Notes 1 To simplify interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UMO17010 0112 Perip
18. D High or by pulling the DIS_IRDA pin on the I O connector Low The shutdown feature is used to save power To enable the IrDA transceiver DIS_IRDA remains floating and PD2 is pulled Low The RxD and TxD signals on the transceiver perform the same functions as a standard RS 232 port However these signals are processed as IrDA 3 16 coding pulses sometimes called IrDA encoder decoder pulses When the IrDA function is enabled the final output to the RxD and TxD pins are routed through the 3 16 pulse generator UM017010 0112 eZ80F91 Module Operational Description eZ80F91 Modular Development Kit User Manual Zilod wBIXYSCcompn 25 Another signal that is used in the eZ80F91 Module s IrDA system is Shut_Down SD The SD pin is connected to PD2 on the eZ80F91 Mod ule The IrDA control software on the user s wireless device must enable this pin to wake the IrDA transceiver The SD pin must be set Low to enable the IrDA transceiver On eZ80F91 Module a two input OR gate is used to allow an external pin to shut down the IrDA transceiver Both pins must be set Low to enable this function The eZ80F91 Module features an Infrared Encoder Decoder register that configures the IrDA function This register is located at address 0BFh in the internal I O register map The Infrared Encoder Decoder register contains three control bits Bit 0 Enables or disables the IrDA encoder decoder block Bit 1 If set this bit enables received data
19. D6 Bidirectional n a Yes 23 A19 Bidirectional n a Yes 24 A18 Bidirectional n a Yes 25 A21 Bidirectional n a Yes 26 A20 Bidirectional n a Yes 27 A23 Bidirectional n a Yes 28 A22 Bidirectional n a Yes Notes 1 To simplify the interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 External capacitive loads on RD WR IORQ MREQ 00 07 and 0 23 should be below 10pF to satisfy the timing requirements for the 280 CPU All unused inputs should be pulled to either Vpp or GND depending on their inactive levels to reduce power consumption and to reduce noise sensitivity To prevent EMI the EZ80CLK output can be deactivated via software in the eZ80F91 MCU s Peripheral Power Down Register UMO017010 0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual Zii AnDTXYS Table 1 eZ80Acclaim MDS Adapter Board Peripheral Bus Connector J1 Identification Continued Pin Symbol Signal Direction Active Level eZ80F91 Signal Note 29 CS3 Output Low Yes 30 CSO Output Low Yes 33 F91 WE Input Low No Jumper on board 34 CS2 Output Low Yes 35 D3 Bidirectional n a Yes 36 RTC Vpp Input n a Yes 39 D7 Bidirectional n a Yes 40 HALT SLP Output Low Yes 41 A13 Bidirectional n a Yes 42 WR Output Low Yes 43 A12 Bidirectional n a Yes 44 A11
20. ECHNOLOGY DESCRIBED IN THIS DOCUMENT ZILOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION DEVICES OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE The information contained within this document has been verified according to the general principles of electrical and mechanical engineering eZ80 and eZ80Acclaim are registered trademarks of Zilog Inc All other product or service names are the property of their respective owners UMO017010 0112 eZ80F91 Modular Development Kit User Manual Zil AnBIIXYS Com III Revision History Each instance in the table below reflects a change to this document from its previous edition For more details refer to the corresponding pages and appropriate links in the table below Revision Date Level Description Page Jan 10 Modified references to eZ80F91 Modular Development Kit 1 23 24 2012 and supporting documentation added PHY section 34 35 updated physical dimensions Figures 12 and 13 Jul 09 Updated Figures 12 and 13 34 35 2008 May 08 Updated Table 1 Mini Module Connector J2 section 6 9 9 2008 updated Table 2 Peripheral Bus External Connector JP1 12 34 section added Figures 12 and 13 updated for style 35 All UM017010 0112 Revision History eZ80F91 Modular Development Kit User Manual zilog An TXYS Table of Contents Revision History 1 0 0 0 ccc eee hh ii Ionen
21. ES 01 4 003 4 THICK HOLE SPECIFICATIO n 2m SIZE COUNT SYMBOL _ E B MFG SPEC 2 2 EE LAYER IDE 5 LAYER T LAYER 3 3b LAYER 4 150 4 p CO TOOL 40 NOT PLATED THROUGH Figure 13 Physical Dimensions eZ80Acclaim Development Platform UM017009 0708 Schematics eZ80F91 Modular Development Kit User Manual A nEITXYS pany 36 Customer Support To share comments get your technical questions answered or report issues you may be experiencing with our products please visit Zilog s Technical Support page at http support zilog com To learn more about this product find additional documentation or to dis cover other facets about Zilog product offerings please visit the Zilog Knowledge Base at http zilog com kb or consider participating in the Zilog Forum at http zilog com forum This publication is subject to replacement by a later edition To determine whether a later edition exists please visit the Zilog website at http www zilog com UMO017010 0112 Customer Support
22. IRDA Xmit Disable receive Output a byte to the uart0 port Programming On Chip Flash Memory To program the 32 K boot block on the internal on chip Flash memory shunt JP1 on the eZ80F91 Mini Enet Module must be installed Table 8 lists the settings for shunt JP1 Symbol Jumper Name JP1 F91 WE Table 8 Shunt JP1 eZ80F91 Module Shunt Status Function Affected Device In Default On chip Flash is enabled for On chip Flash writing to boot block Out On chip Flash memory boot On chip Flash block is write protected UMO017010 0112 Programming On Chip Flash Memory eZ80F91 Modular Development Kit User Manual zilog y Note Shunt JP2 labeled INT on the eZ80F91 Mini Enet Module schematic is unpopulated It is connected to pin 25 of the Ethernet PHY KS8721 and can be used for test purposes Flash Loader Utility The Flash Loader utility integrated within ZDSII allows a convenient way to program on chip Flash memory Refer to the Zilog Developer Stu dio II eZ80Acclaim User Manual UM0144 for more details UMO17010 0112 Flash Loader Utility eZ80F91 Modular Development Kit User Manual idle rt ILU U UU UJ w xYscom 28 ZDSII The Zilog Developer Studio II Integrated Development Environment ZDSII IDE is a complete stand alone system that provides a state of the art development environment Based on the Windows Vista Win 7 WinXP Professional user interfaces ZDSII integrat
23. T_IN 101 FILT_IN XIN H1l yin Ji XOUT O H12 xor R19 33 _ PLL VDD R27 100K vop 92 18pH VDD 18pF VoD VDD VDD VDD VDD VCC 33 PLL VSS vss vss a vss vss vss vss vss vss vss RTC_VDD RIC VDD VSS vss VSS vss vss vss vss 1 32 768KHz 3 res Yop F 8 RTC XIN c5 CB Z2pF Z2pF GND SE eZ80F91 UM017009 0708 eZ80F91 Modular Development Kit User Manual C5 22pF VCC 33V ae t eens w ipe E MDIO RST MDC MDIO RST 01 VDD PLL M MDC VDDPLL 4 To 25MHz2pF XDI RXD3 PHYAD1 xi _4 GND RXD1 s RXD2 PHYAD2 xo 45 D HXDU J RXD1 PHYAD3 GND 5 GND EN RXDO PHYAD4 GND VOC Sav GND 8 NE bris 41 TX R13 649 1 RXDV 9 40 TX VDDC RXCLK RXDV PCS LPBK Tx 42 GND FB1 Ber H RNC GND 1 ER aa th RXER ISO VDDRCV 3 rz VDDC 13 GND ROT Lae GND c7 FeriteBead C9 Ferrite Bead TXER 35 GND _ TXCLK TXER GND D Paur IR 0 1 lt XEN H TXC REFCLK FXSD FXEN RX 10uF TXEN 3 ka GND DXDi I DXDO RX 32
24. _ A23 CS0 30 29 CS3 33V 32 31 VCC 33V CS2 34 33 F9 WE RTC VDD 36 35 D3 GND 37 OND HALT SLP 40 39 D7 WR 42 41 A13 11 44 43 A12 Ag 46 45 A14 GND 48 47 GND A5 50 49 A16 A4 52 51 15 GND 54 53 VCC SRAM 56 55 SRAM r HEADER 28x2 VCC 33V 33V R11 10K DIS_IRDA 1 f 1 PD2 IR SD 2 SN74LVC2G04 GND J2 PA4 2 1 PA3 4 3 PAT 6 5 PBS PAI 1 PBG EZB CLK 10 9 VCC 33V PBT 12 11 PBi PB3 44 433 PC7 16 15 PAG PAZ 17_ PB4 GND 20 19 GND PB0 PBZ PCS 24 23 PC6 PCT 26 25 PC3 PCO 28 27 PC2 GND 30 29 GND 32 TMS PD5 34 33 PD6 PD4 36 35 PD3 TRIGOUT 3g az TRSTN GND 40 39 _ GND 42 414 TCK 44 43 TDI TDO PDZ GND 48 47 lICSCL 50 49 DIS IRDA lICSDA 2 51 WAT NMI 54 sa RST VCC 33V 56 55 VCC 33V HEADER 28x2 0 lao s D E 2JA1 voi z 1 02 HQ 4 11 D6 A D7 Aan 43 104 AS 14 4 104 23 03 A5 5 Do A 15 26 D00 E A6 06 bi ee o A5 Tate 48 AS 19 L A2 20 AD A M A A12 Ato 29 Tas Aii x 14 15 _ 6 32 A6 vce 2 _ WR _ 51 DE 62 cs 0 001uF 0 1uF GND GND IDT71V124S SO zu u4 IRDA SD SN74AHC1G32 Figure 10 eZ80F91 Module Schematic 1 of 2 eZ80F91 Modular Development Kit User Manual U1B
25. eiver onto the eZ80F91 Module When the DIS IrDA input signal is pulled Low the IrDA transceiver located on the eZ80F91 Mod ule is disabled As a result UARTO can be used with RS 232 or RS 485 interfaces on the eZ80 development platform F91 WE When the F91 WE signal is active Low internal Flash on the eZ80F91 chip is enabled for writing This signal is inverted from the F9 WP signal on the eZ80F91 chip RTC VDD Test point for the Real Time Clock power supply Peripheral Bus Mini Module Connector J1 Figure 3 displays the pin layout of 56 pin Peripheral Bus Mini Module Connector J1 on the eZ80Acclaim MDS Adapter Board Table 1 lists the pins and their functions UM017010 0112 eZ80Acclaim MDS Adapter Board eZ80F91 Modular Development Kit User Manual zilog AnEITXYS Com J1 Cro VCC 332V 2 1 VCC 33V AO 4 3 AG A2 6 5 AT A3 10 9 A10 GND 12 11 GND D5 1 RD 01 14 pe 18 iz P 20 19 GND 55 21 GND A18 24 23 A19 22 2n 25 A23 28 27 CS0 30 29g CS3 VCC 33V 32 31 _ VCC 33V 2 23 RTC VDD 36 35 D3 D a7 GND HALT SLP 4 D7 WR 42 vr Att 44 43 A12 Ag 46 45 14 GND 48 47 GND AS 50 49 A16 A4 A15 54 53 VCC_SRAM 56 55 _5 L T HEADER 28x2 Figure 3 eZ80Acclaim MDS Adapter Board Peripheral Bus Mini Module Connector J1 Pin Configuration Table 1 eZ80Acclaim MDS Adapter Board Peripheral Bus Connector J1 Ide
26. es 38 TDI 40 TRIGOUT Output n a Yes 41 TCK Input n a Yes 42 TMS Input n a Yes 43 RTC Vpp Input n a Yes 44 EZ80CLK Output n a Yes 45 IICSCL Yes 47 IICSDA Yes 49 FLASHWE Input Low No 51 CS3 Output Low Yes 52 DIS IRDA Input Low No 53 RST y o Low Yes 54 WAIT Input Low Yes 57 HALT SLP Output Low Yes 58 NMI Input Low Yes 60 unused n a n a n a Notes 1 To simplify interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UMO17010 0112 Peripheral and I O External Interface eZ80F91 Modular Development Kit User Manual zilog AnBIXYSC y 18 GPRS Wireless Modem Interface The MDS Adapter Board includes connectors for adding a MultiTech SocketModem GSM GPRS data fax wireless modem module part num bers MTSMC G F1 900 1800MHz or MTSMC G F2 850 1900 MHz This interface is implemented on the UART1 PCx interface and consists of connectors J3 J11 and J12 For information about the MultiTech mod ule refer to the Multitech website Figure 7 displays the pin layout of the three GPRS module connectors on the eZ80Acclaim MDS Adapter Board Table 5 lists connector J3 pins and functions Table 6 lists connector J11 pins and functions DI J12 L2 CND GND
27. es a language sensi tive editor project manager C Compiler assembler linker librarian and source level symbolic debugger that supports the eZ80F91 device For more information about ZDSII refer to the Zilog Developer Studio eZ80Acclaim User Manual UM0144 UM017010 0112 ZDSII eZ80F91 Modular Development Kit User Manual 21109 29 Troubleshooting Before contacting Zilog Customer Support to submit a problem report follow the simple steps outlined on this page If a hardware failure is sus pected contact a local Zilog representative for assistance IrDA Port Not Working If you are using the IrDA transceiver on the eZ80F91 Module ensure that the hardware is set up as follows 1 UMO017010 0112 to enable the control gate that drives the IrDA device turn OFF Jumper J9 on the eZ80Acclaim MDS Adapter Board Set port pin PD2 Low When this port pin and Jumper J9 are turned OFF the IrDA device is enabled Disable the RS 232 output by installing a shunt on jumper J8 on the eZ80Acclaim MDS Adapter Board Troubleshooting Schematics eZ80F91 Modular Development Kit User Manual Figures 8 and 9 show schematic diagrams of the eZ80Acclaim MDS Adapter Board In these diagrams Flash memory chip U2 is not installed it is shown for reference only When U2 is installed it is accessed using CS3 UM017010 0112 33V connector 1
28. f Contents eZ80F91 Modular Development Kit User Manual zilog An TXYS ZDSIL cist acacia tg eheu ube cian ahd edad aia 28 Troubleshooting lese I 29 IrDA Port Not Working eeeeeeee III 29 Scleim liCs 2 pb REG HL RS NO Pav iaa a aba na u 30 Customer sese esse ea ete eee kas 36 UMO17010 0112 Table of Contents eZ80F91 Modular Development Kit User Manual Ns r ILU U AnDTXYS Introduction Zilog s eZ80F91 Modular Development Kit represented by part numbers eZ80F910100KITG and eZ80F910200KITG provides a general purpose platform for creating a design based on an eZ80F91 microcontroller The eZ80F91 MCU is a member of Zilog s eZ80Acclaim product family which offers an on chip Flash capability The eZ80F91 Modular Develop ment Kit contains an eZ80F91 Module which features the eZ80F91 MCU plus an eZ80Acclaim MDS Adapter Board The eZ80F91 Module is mounted onto the eZ80Acclaim MDS Adapter Board Kit Features The key features of the eZ80F91 Modular Development Kit are eZ80F91 Module eZ80F9 device operating at 50MHz with 256KB of internal Flash memory and 8KB of internal SRAM memory 128KB of off chip SRAM memory On chip Ethernet Media Access Controller EMAC Ethernet port and PHY Real Time Clock support Footprint for an SIR IrDA transceiver Two 56 pin mini module connectors for attachment t
29. heral and I O External Interface eZ80F91 Modular Development Kit User Manual zilog AnQIIXYS Co 16 l O External Connector JP2 Figure 6 displays the pin layout of the I O Connector in the 60 pin header on the eZ80Acclaim MDS Adapter Board Table 4 lists the pins and their functions JP2 PA 1 2 P PRS 3 4 PR 5 8 VEL 9 10 GND PB 11 12 PB6 PB5 13 14 PB4 PB 15 16 PB2 PBI 17 18 PB GNO 19 20 PC PC6 21 22 PCS PC4 23 24 PC2 25 26 PCI PCO 27 28 PD ED 29 30 GNO E 15 31 22 E 14 E 13 33 34 E 2 POL 35 28 POO TOO 37 38 TDI GND 39 40 TRIGOUT TCk 41 42 TMS D 44 EZSDCLK 45 46 48 GND 50 52 DIS IRDA 54 WAIT 56 GND 58 Nhl 60 _ HEADER 30x2 SM Figure 6 eZ80Acclaim MDS Adapter Board I O External Connector JP2 UN Caution The FLASWE signal is disconnected and unavailable on pin 49 UM017010 0112 Peripheral and I O External Interface eZ80F91 Modular Development Kit User Manual Z AnDTXYS Table 4 eZ80Acclaim MDS Adapter Board I O External Connector JP2 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 8 PA7 to PAO Bidirectional n a Yes 11 18 PB7 to PBO Bidirectional n a Yes 20 27 PC7 to PCO Bidirectional n a Yes 28 29 PD7 PD6 Bidirectional n a Yes 31 36 PD5 to PDO Bidirectional n a Yes 37 TDO Output n a Y
30. ipped with SRAM powered from the same power supply as the eZ80F91 device The SRAM can also be powered separately with a battery To power SRAM from a battery observe the following brief procedure 1 Remove R15 UMO17010 0112 eZ80F91 Module eZ80F91 Modular Development Kit User Manual il rir ILU U UU UJ AnDIXYS Company 23 2 Ensure that R14 is in place 3 Connect the negative battery lead to GND 4 Connect the positive 4 battery lead to J10 On Chip Flash Memory The eZ80F91 MCU on the eZ80F91 Module features 256KB of on chip Flash memory which can be programmed a single byte at a time or in bursts of up to 256 bytes Write operations can be performed using either memory or I O instructions Erasing bytes in Flash memory returns them to a value of FFh Both the MASS ERASE and PAGE ERASE operations are self timed by the Flash controller leaving the CPU free to execute other operations in parallel Upon power up on chip Flash memory is located in the address range 000000h 03FFFFh Four wait states are programmed in Flash Control Register F8h On chip Flash memory is prioritized over all external chip selects can be enabled or disabled power on enabled and can be programmed within any 256KB address space in the 16MB address range The eZ80F91 Module features the following memory configurations 8KB on chip SRAM 128KB off chip SRAM 256 on chip Flash To learn more about the programming of
31. n36 DIS FLASH Pin 42 CS1 Pin 53 MREQ Pin 54 IOREQ Pin 58 INSTRD Pin 59 BUSACK Pin 60 BUSREQ Table 3 eZ80Acclaim MDS Adapter Board Peripheral Bus External Connector JP1 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 1 4 6 Unused n a n a n a 8 35 5 TRSTN Input Low Yes 11 A6 Bidirectional n a Yes 12 AO Bidirectional n a Yes 13 A10 Bidirectional n a Yes 14 A3 Bidirectional n a Yes 17 A8 Bidirectional n a Yes 18 7 Bidirectional n a Yes 1 To simplify interface description Power and Ground nets omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UM017010 0112 Peripheral and I O External Interface eZ80F91 Modular Development Kit User Manual Z AnDTXYS Table 3 eZ80Acclaim MDS Adapter Board Peripheral Bus External Connector JP1 Identification Continued Pin Symbol Signal Direction Active Level eZ80F91 Signal 19 A13 Bidirectional n a Yes 20 A9 Bidirectional n a Yes 21 A15 Bidirectional n a Yes 22 A14 Bidirectional n a Yes 23 A18 Bidirectional n a Yes 24 A16 Bidirectional n a Yes 25 A19 Bidirectional n a Yes 27 A2 Bidirectional n a Yes 28 A1 Bidirectional n a Yes 29 A11 Bidirectional n a Yes 30 A12
32. ntification 2 Pin Symbol Signal Direction Active Level eZ80F91 Signal Note 3 A6 Bidirectional n a Yes 4 A0 Bidirectional n a Yes Notes 1 To simplify the interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 External capacitive loads on RD WR IORQ MREQ 00 07 and A0 A23 should be below 10pF to satisfy the timing requirements for the 280 CPU All unused inputs should be pulled to either Vpp or GND depending on their inactive levels to reduce power consumption and to reduce noise sensitivity To prevent the EZ80CLK output can be deactivated via software in the eZ80F91 MCU s Peripheral Power Down Register UMO17010 0112 eZ80F91 Module Interface 6 eZ80F91 Modular Development Kit User Manual Zii AnDTXYS Table 1 eZ80Acclaim MDS Adapter Board Peripheral Bus Connector J1 Identification Continued Pin Symbol Signal Direction Active Level eZ80F91 Signal Note 5 A7 Bidirectional n a Yes 6 A2 Bidirectional n a Yes 7 A8 Bidirectional n a Yes 8 A1 Bidirectional n a Yes 9 A10 Bidirectional n a Yes 10 A3 Bidirectional n a Yes 13 RD Output Low Yes 14 D5 Bidirectional n a Yes 15 D1 Bidirectional n a Yes 16 D4 Bidirectional n a Yes 17 DO Bidirectional n a Yes 18 D2 Bidirectional n a Yes 19 A17 Bidirectional n a Yes 20
33. o the eZ80Acclaim MDS Adapter Board eZ80Acclaim MDS Adapter Board Footprint for 2 M x 8 external Flash memory such as AM29LV160D Footprint for 10 bit bus switch such as 74CBTLV3384 to support external Flash UMO17010 0112 Introduction eZ80F91 Modular Development Kit User Manual Zilog AnQIIXYS RS 232 connector with interface circuit for UARTO ZDI and JTAG debug connectors Two 56 pin mini module connectors Two 60 pin interface connectors for connection to an external application or development board not supplied 32 pin header and footprint for a GPRS modem on UARTI One green 3 3 OK LED yellow Test LED and pushbutton 5 VDC external power supply USB Smart Cable eZ80Acclaim software and documentation CD ROM Schematics for the eZ80F91 Mini Enet Module and eZ80Acclaim MDS Adapter Board Safeguards The following precautions must be taken while working with the devices described in this document Caution Always use a grounding strap to prevent damage resulting from electro static discharge ESD UMO017010 0112 Kit Features eZ80F91 Modular Development Kit User Manual An TXYS eZ80F91 Modular Development Kit Overview The purpose of the eZ80F91 Modular Development Kit is to provide a set of tools for designing an application based on the eZ80F91 microcon troller A block diagram of the eZ80Acclaim MDS Adapter Board is dis played in Figure
34. s table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UMO17010 0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual 2100 9 12 Peripheral and I O External Interface The Peripheral and I O external interface on the eZ80Acclaim MDS Adapter Board consists of two 60 pin mini module receptacles Peripheral Bus External Connector JP1 Figure 5 displays the pin layout of Peripheral Bus External Connector JP1 in the 60 pin header on the eZ80Acclaim MDS Adapter Board Table 3 lists the pins and their functions 0 1 L2 p em 3 L4 gn TRSTN 5 3T W 7 8 n ND 9 10 A PG 11 12 Q 13 14 A ND 15 16 78 1 18 Alo 19 ATS 21 ALB 23 RI 27 ATT 29 31 6 33 35 ASH 21 37 A22 39 50 41 52 43 01 45 03 47 48 05 40 D 51 52 06 53 54 IDREQ GND 55 56 RD WR 57 58 INSTRD BUSACK 59 60 BUSREO C HEADER 30x2 SM Figure 5 eZ80Acclaim MDS Adapter Board Peripheral Bus External Connector JP1 UM017010 0112 Peripheral and I O External Interface eZ80F91 Modular Development Kit User Manual Z AnQIIXYS 1 3 AN Caution The following signals are not connected and are unavailable on the as sociated pins Pi
35. tional n a Yes 21 PB2 Bidirectional n a Yes 22 PBO Bidirectional n a Yes 23 PC6 Bidirectional n a Yes 24 PC5 Bidirectional n a Yes 25 PC3 Bidirectional n a Yes 26 PC1 Bidirectional n a Yes 27 PC2 Bidirectional n a Yes Notes 1 To simplify interface description Power and Ground nets are omitted from this table The entire interface is represented in the eZ80Acclaim MDS Adapter Board schematics see Figures 8 and 9 2 The Power and Ground nets are connected directly to the eZ80F91 device UMO17010 0112 eZ80F91 Module Interface eZ80F91 Modular Development Kit User Manual Zi An BIXYS Table 2 eZ80Acclaim MDS Adapter Board I O Mini Module Connector J2 Identification Pin Symbol Signal Direction Active Level eZ80F91 Signal 28 PC Bidrecioa ma 31 TMS Input n a Yes 32 PD7 Bidirectional n a Yes 33 PD6 Bidirectional n a Yes 34 PD5 Bidirectional n a Yes 35 PD3 Bidirectional n a Yes 36 PD4 Bidirectional n a Yes 37 TRSTN Input Low Yes 38 TRIGOUT Output n a Yes 41 TCK Input n a Yes 42 PD1 Bidirectional n a Yes 43 TDI Bidirectional n a Yes 44 PDO Bidirectional n a Yes 45 PD2 Bidirectional n a Yes 46 TDO Output n a Yes 49 DIS IRDA Input Low No 50 IICSCL Yes 51 WAIT Input Low Yes 52 IICSDA Yes 53 RST Low Yes 54 NMI Input Low Yes Notes 1 To simplify interface description Power and Ground nets are omitted from thi
36. to pass into the UARTO Receive FIFO data buffer Bit 2 A test function that provides a loopback sequence from the TxD pin to the RxD input Bit 1 the Receive Enable bit is used to block data from filling up the Receive FIFO when the eZ80F91 Module is transmitting data Because air is the transmission medium that the the IrDA signal passes through the transmitted data can also be received the Receive Enable bit prevents this data from being received After the eZ80F91 Module completes transmitting this bit is changed to allow for incoming messages The code that follows provides an example of how this function is enabled on the eZ80F91 Module UM017010 0112 eZ80F91 Module Operational Description Init IRDA Make sure to first set PD2 as a port bit an output and set it Low PD ALT 2 PD ALT1 amp OxFC 0x03 UART_LCTLO 0x80 generator BRG DLRL0 20x2F BRG DLRH0 0x00 UART LCTL0 20x00 UART_FCTLO 0xC7 UART LCTL0 20x03 IR CTL 0x03 IR CTL 0x01 Putchar 0xb0 eZ80F91 Modular Development Kit User Manual zilog wBIXYSconpy 26 PDO uartOtx PD1 uartO0 rx Enable alternate function Select dlab to access baud rate Baud rate Masterclock 16 baudrate High byte of baud rate Disable dlab Clear tx fifo enable fifo 8bit N 1 stop enable IRDA Encode decode and Receiv enable bit
37. zilog Embedded in Life Company eZ80Acclaim Microcontrollers eZ80F91 Modular Development Kit User Manual UM017010 0112 Copyright 2012 Zilog Inc All rights reserved www zilog com eZ80F91 Modular Development Kit User Manual IL V G An ITXYS N Warning DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS LIFE SUPPORT POLICY ZILOG S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION As used herein Life support devices or systems are devices which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Document Disclaimer 2012 Zilog Inc All rights reserved Information in this publication concerning the devices applications or technology described is intended to suggest possible uses and may be superseded ZILOG INC DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION DEVICES OR T
Download Pdf Manuals
Related Search