SH1WH User`s Manual
Contents
1. g o Ji L E O 5 Z u4c30_ O NMI U13 i X2 RESET o CLA SERTA T 43 3 6 5 mm max height Q J4 Cl m m AI J2 a N US C C28 7 a cis u L E B1 C24 E BR1225 FR m U2 i c35 625 i Q te CIB a 3 5 mm max height R5 cab te c 8EZ east nT Le os bi Clc W 2 C39 Etto O 3 8 13U 4 ne V D Le m 6 5 mm max height i EN c40 RA O l ax heig r 5 aa lt 81 5 Cmm 1 8 id Total mated clearance board surface to board surface 7 mm 3 6 Cmm NOTES Scale 3 2 All dimensions within 0 1 mm Important test points highlighted in gray Figure 6 Top silkscreen and physical dimenions SH 1 Embedded Workhorse User s Manual 12 Xtreme Ideas Technology Development GND Embedded Workhorse v1 0 ea C16 0 mm max height u3 Wa c4 US c2 Us D4 _ except near J3 and J5 A 1 I Ti LJ J5 7 C27 H cra 30 mm total 13 around centerline 2 2 mm max height 1 usr 1 tg cal 5 cat E alll C26 J i Ci ld 2 Ja CIC C C23 Lj EAST ClO R3 C32 L3 x u2 c _ F Hoon Xtreme Ideas Fl 255 amp SN 2 i 0 mm max height bunnie mit edu GND _ except near J3 and J5 NOTES Scale 3 2 All dimensions 02. etc e hardware programmable timing patter n gener ator e two RS 232 serial ports up to 250Kbaud RTC Vin 3 8 13V High Efficiency Vout 3 3V sysmon Switchmode gt shutdown DC DC 2x Serial a SH 1 Ports rm 12 MHz RS 232 Level Converter D A Multimode dai moesson ff PWM Timer DMA Interrupt A D Digital I O power management watchdog and wakeup timers power supply monitor protects against data corruption during power dropouts high efficiency switching regulator input voltage range from 3 8V to 13V drop in solution compatible with many battery chemistries low power less than 100 mA typ lt 2 mA sleep plus zero power shutdown mode easy to use vertically expansion bus built in temperature sensor low profile 7 mm minimum board to board clearance in vertical stack tiny 2 02 x 3 2 footprint smaller than a credit card programming support with popular and free GNU tools stacking 3V Li Battery SRAM 128K FLASH 1MB DRAM 8MB Expansion Connectors Figure 1 SH 1 Workhorse system block diagram SH 1 Embedded Workhorse User s Manual Xtreme Ideas Technology Development 2 Table of Contents 1 FEATURE SUMMARY 2 TABLE OF CONTENTS 3 DESCRIPTIVE SPECIFICATIONS 3 1 Power Supply 3 1 1 Powering via unregulated power input 3 1 2 Powe
3. tied low with a 10K resistor wakeout O This is an alarm clock output that functions regardless of the state of Vcc Its polarity and trigger time is programmable It is internally connected to the NMI of the processor 2 3 2 5 Power Vutil NC This is a utility voltage pin provided on the expansion headers for use by expansion cards It is not connected on the SH1 WH DGND PWR Digital signal ground PGND PWR Power ground high current return path for system power Vbatt PWR System power Nominally provided by a battery but any unregulated DC input between 3 8 and 13V is acceptable 2 3 2 6 Miscellaneous NC WNC Internally not connected For use by expansion cards 2 4 Miscellaneous Test Points The SH1WH is equipped with a few test points to aid debugging The important test points are highlighted in gray in Figure 6 and Figure 7 The PCLK test point has the same signal as the CLK pin in the expansion header GND and 3 3V test points are tied to the internal power and ground planes The SPO and SP1 pads are connected to SH 1 pins that can either be software configured to be simple I Os or auxiliary PWM interval counter or timing pattern generator I Os Wires are attached to test points either by probe contact or soldering 2 5 Temperature Sensor The SHIWH has a built in temperature sensor for detecting the ambient operating temperature near the center of the bottom side It is provided for the detection of hazardous thermal cond
4. 1 mm Important test points highlighted in gray Figure 7 Bottom silkscreen and physical dimensions 2 8 Memory Map The SH1WH has several memory mapped peripherals A general memory map is provided in Figure 9 SRAM Memon Map Power On Configuration Area 0x0200000 0x0204EFF Power on Flags po 0x0205000 User Code Start Adr 0300AU User Program Area 0x0204F08 Ox020FFFF Reserved 0x0210000 OxO0204FFF User Data Area OxO21FFFF Figure 8 Recommended SRAM footprint SH 1 Embedded Workhorse User s Manual 13 Xtreme Ideas Technology Development a 0x000 Ox00F 0x020 0x021 Ox5FF Ox5FF 0x600 0x600 0x600 0x600 0x700 0x700 0x900 0x980 0xA00 0xE00 0xE00 0xF00 OxF00 0000 FFFF 0000 PREF FEOO FFEF 0000 OOFF 4000 40FF 0000 OOFF 0000 0000 0000 0000 OOFF 0000 1FFF FLASH ROM 8 bit _ SRAM 8 bit Memory mapped peripheral area Muxed Adr Data Expansion Space 8 bit See SH 1 User s Manual for full info SS eee Muxed Adr Data Expansion Space 16 bit Unmuxed Adr Data cs7 Expansion Space 8 bit CS6 DRAM 16 bit EN DIR digital I O register 16 bit Unmuxed Adr Data Expansion 16 bit Program managed cache Figure 9 SH1WH memory map Note that gray areas should not be accessed at any time The memory map is heavily aliased and accesses to gray areas may cause unpre
5. ANCLK O Clock signal to D A converter ANDIN O Serial data to D A converter ANCS O Chip select output to D A converter RTCCLK O Clock signal to real time clock chip RTCCS O Chip select to real time clock chip RTCIO I O Data to and from real time clock chip SER_INV_N I Invalid serial data input Serial line driver automatically shuts down when no valid serial signals are present RxD 1 0 I Receive data from serial interface TxD 1 0 O Transmit data to serial interface SH1WH name SH 1 pin name SH 1 pin number WDKICK PA7 BACK ee FLASH_RYBY PA8 BREQ ANCLK PB13 TP13 IRQ5 SCK1 o m JANDIN PB14 TPIMIRQ6 O J 1 ANCS PB15 TP15 IRQ7 O 2 RTCCLK _ PBO TP6 TOCXA4 TCLKC_ O J 1 RTCCS_ PB7 TPT TOCXB4 TCLKD O 105 a RTCIO TxDI PB9 TP9 TxD0 O 18 TxD2 CT PBUITPIWTxDI _ O uno Table 3 Mapping of SH1WH internal signal names to SH 1 signals SH 1 Embedded Workhorse User s Manual 19 Xtreme Ideas Technology Development NOTES SH 1 Embedded Workhorse User s Manual 20
6. SH 1 Embedded Workhorse User Manual Version 1 0 January 1999 Xtreme Ideas Technology Development Xtreme Ideas Technology Development a NOTICE This document is subject to change without notice Neither Xtreme Ideas Technology Development nor the inventor Andrew Huang will be held responsible for any damage to the user or user s assets that may result from accidents or any other reasons during operation of the user s unit according to this document No license is granted by implication or otherwise under any patents or other rights of any third party or Xtreme Ideas Technology Devolpment or Andrew Huang This product is not authorized for use in medical applications including but not limited to life support systems 1998 Andrew Huang All Rights Reserved The Xtreme Ideas logo is a trademark of Xtreme Ideas Technology Development SH 1 Embedded Workhorse User s Manual 2 Xtreme Ideas Technology Development 1 Feature Summary e 12 MHz Hitachi Super H 32 bit RISC engine e 8 MB of Fast Page DRAM 128K of battery backed SRAM 1 MB of in circuit programmable FLASH e 8K of fast SRAM user managed cache Y2K compliant real time clock eight 10 bit A D channels with S H 11 2 us conversion time e two 12 bit D A channels settling time up to 5 hardware PWM channels up to 20 digital outputs up to 10 digital inputs 14 us up to 5 hardware interval counter channels for shaft encoders tachs
7. and alone mode on bootup by setting bit 0 at location 0x204F00 to 0 or 1 respectively 4 1 1 Booting In host mode the SHI1WH runs an interactive monitor which is pre loaded into the FLASH ROM The interactive monitor has provisions for checking and setting memory locations copying blocks of data uploading data changing the program counter and programming the FLASH ROM Thus the intended application development cycle consists of writing the code of the host machine uploading it to SH1WH RAM and testing it Once the code is tested the user has two options The user may recompile the code to link in the interrupt vector tables and basic initialization routines and burn that over the existing boot code thus destroying the code for host mode not recommended The other option is that the user may simply copy the code into one of the data sectors of FLASH ROM and set a pointer to it in the SH 1 Embedded Workhorse User s Manual 17 Xtreme Ideas Technology Development a battery backed SRAM at location 0x204F04 and toggle the host stand alone mode bit in the SRAM The next time the system is rebooted it will complete the built in initialization sequence and jump to the user code if interaction in host mode is desired at any time the user may depress the RESET button while holding down the NMI button to force a reboot into host mode The default host mode requires a host terminal running at 38400 N 8 1 for interactive operation The hos
8. dictable behavior The SRAM and FLASH ROM spaces also have recommended memory maps if your application is to be compatible with the monitor it should use only the free spaces designated in the memory maps of Figure 10 and Figure 8 SH 1 Embedded Workhorse User s Manual 14 Xtreme Ideas Technology Development a 0x0000000 Vector Table 0x0000000 Boot Sectors 0x00003FF 0 1 2 3 OxO00FFFF 0x0010000 User Area 4 18 OxOOFFFFF Figure 10 Recommended FLASH ROM footprint 3 Quantitative Specifications 3 1 Absolute Maximum Ratings Voltage on Vbatt relative to PGND 0 3V to 13V Voltage on 3 3V input relative to DGND 0 3V to 4 6V Operating Temperature Ta ambient 0 C to 70 C Storage Temperature 55 C to 125 C 3 2 DC Specifications 3 2 1 Power Supply Parameter Condition Symbol Min Typ Max Units Notes Unregulated supply voltage _ vsar 33 138 VM i Regulated supply voltage _ vcc 314 83 345 v Power supply current normal operating mode icc 100 350 mA Power supply current sleep mode Iser 2 Juaj Standby voltage CT yw ry 2es CUT Vcc reset protection trip threshold STRIP 2 80 2 88 297 v Vcc switchover to battery backup threshold Vaeack 2 62 2 70 278 v 3 2 2 Digital I O Parameter Condition Symbol Min _ Typ Max Units Notes Input high voltage Vec 3 3V CH 23 86 v In
9. er s Manual 6 Xtreme Ideas Technology Development a OOO 0 0 0 Pin 1 Figure 2 Serial Connector J1 pin 1 orientation viewed head on from side of board Pin Function 1 GND 2 TxD1 data out of board 3 RxD1 data into board 4 GND 5 TxD2 6 RxD2 Table 1 Serial connector J1 pinout 2 3 Expansion Connectors 2 3 1 Physical Specifications There are two pairs of expansion connectors on the SH1WH They are positioned to allow the vertical stacking of peripheral cards such as break out boards SHI WH BB1 and high current motor driver cards SHI1WH MD1 The connector pinouts are designed to allow any card to be stacked above or below any other card The connectors are Harwin part numbers M60 6162022 plug top J2 and J4 and M60 6042022 socket bottom J3 and J5 They are available directly through Harwin 812 285 0055 or its distributors for about 2 per connector These particular connectors configure the SH1WH for a nominal board to board clearance of 7 mm although if additional clearance is desired a taller connector on the mating board may be chosen for a total clearance of 9 mm All of the I O signals except for the serial I O are accessed via these connectors This solution was chosen so users can design their own low profile application card for space conscious applications but can still break the signals out to convenient 0 1 spaced double row headers for prototyping via an inexpensive break out board
10. gh current and noisy signals the east connector has primarily quiet signals Note that connector pinouts are identical on the top and the bottom SH 1 Embedded Workhorse User s Manual 8 Xtreme Ideas Technology Development a 2 3 2 Signal Specifications 2 3 2 1 Direct Processor Bus Signals AD 7 0 7O A 7 0 O RD O WR O CS7 O CS6 O RES I O CLK O NMI O AH samp 7 0 Multimode address and data bus Depending on access location this bus may behave either as a multiplexed address data bus or as just a data bus This bus may also be treated as either a simple 8 bit bus or the lower byte of a 16 bit wide bus Address bits from the processor Read enable from the processor active low Write enable from the processor active low Chip select from the processor active low This CS line corresponds to 8 bit accesses with an unmultiplexed bus mode in addresses from 0x7000000 to Ox7FFFFFF Chip select from the processor active low This CS line corresponds to 8 or 16 bit wide accesses in a multiplexed address data bus mode in addresses from 0x6000000 to OX6FFFFFF if the 14 address bit is high then the bus behaves as if it were 16 bits wide if it is low then the bus behaves as if it were 8 bits wide It also corresponds to 16 bit accesses in an unmultiplexed bus mode in addresses from 0xE000000 to OXEFFFFFF Hard reset active low This signal is debounced and pulled low for 250 ms on any of the following conditions reset button de
11. itions on peripheral cards such as motor driver cards The sensor itself is accurate to 3 C and is sampled by an 8 bit A D converter 2 6 Diagnostic LED The SHIWH has a single green LED for diagnostic purposes This green LED is internally connected to the SP1 test point For power conscious applications this LED should be removed or left off at all times SH 1 Embedded Workhorse User s Manual 11 Xtreme Ideas Technology Development 2 7 Physical Dimensions Figure 6 and Figure 7 illustrate the dimensions of the SH1 WH board Note that there are strict regulations as to the maximum height of components on different regions of the board A region about 10 mm wide on the north and south sides of the board are reserved for top populated high profile components up to 6 5 mm tall In order to accommodate this provision no components are allowed to be populated within 10 mm of the north and south sides on the bottom side of the board The 30 mm strip centered about the middle of the board has the 7 mm board to board clearance evenly distributed between the top and the bottom sides at 3 5 mm per side Mating cards should keep these restrictions is mind
12. may suggest that it can be used to enable motors under PWM control this output may be used for any function EN 4 0 maps to bits 4 0 of any data written to locations ranging from 0xA000000 through OXAFFFFFF DIR 4 0 O Dedicated digital outputs While the label may suggest that it can be used to set the direction of motors under PWM control this output may be used for any function DIR 4 0 maps to bits 12 8 of any data written to locations ranging from 0xA000000 through OxAFFFFFF 2 3 2 3 Analog Signals AN 7 0 Z Input to A D converter The A D converter is a 10 bit SAR type converter Aout 1 0 O Output of D A converters The D A converters have 12 bit resolution AVreflI O Reference voltage used by the A D converter This AGND referenced voltage represents the maximum voltage that the A D converter can sample Excessive current draw from this output will affect A D converter accuracy AVrefO O Reference voltage used by the D A converter This AGND referenced voltage represents the maximum voltage output by the D A converter Excessive current draw from this output will affect D A converter accuracy AGND PWR Analog ground This is an isolated low current return path for analog signals SH 1 Embedded Workhorse User s Manual 10 Xtreme Ideas Technology Development a 2 3 2 4 Power Control shutdwn Z A high input on this pin causes the switching regulator to shut down effectively turning the board off This input is internally
13. pressed Vcc out of range 2 88V typ power on reset or watchdog timer time out if enabled A hard reset will clear processor state and is required to wake up out of deep sleep modes RES is a wired AND signal so users may pull RES low to force a reset condition 12 MHz clock signal synchronous to direct processor bus signals Non maskable interrupt output This signal is triggered when the alarm clock in the RTC times out or when the user depresses the NMI button Software configurable pin to either address hold output or A D sample trigger input Address hold is used when the expansion bus is in multiplexed address data mode A D sample trigger is optional as the sample trigger can be set by software as well SH 1 Embedded Workhorse User s Manual 9 Xtreme Ideas Technology Development a 2 3 2 2 Digital I O PA 15 11 O Programmable function digital I O ports In addition to simple digital VO PA 15 12 can also be remapped in software to function as active low interrupt lines or DMA handshaking lines PAI1 can be remapped to function as a timing pattern generator output PWM 4 0 O Pulse width modulation control output Dedicated hardware drive these lines with square waves of varying duty cycles properties of the PWM output are set by software These signals can also be configured to function as digital I O timing pattern generator outputs or as interval timer inputs EN 4 0 O Dedicated digital outputs While the label
14. put low voltage VCC 3 3V vu 03 o66 v Input leakage current EN 4 0 DIR 4 0 ued CT ST UA TT Input leakage current all other inputs poom 1i uaj SH 1 Embedded Workhorse User s Manual 15 Xtreme Ideas Technology Development a Output high and low current EN 4 0 DIR 4 0 Input capacitance 3 2 3 Analog I O Parameter Condition Symbol Min Typ Max Units Notes A D resolution loj its A D reference voltage Fs e OUT UV A D ref voltage tolerance IREFI O TT tet mV k A D ref maximum output current Iemm Ot mA A D minimum input voltage AST OB OO v A D maximum input voltage vaw 25 8S v A D input current Ft y of faf D A resolution f bits O S ond maA dof v D A output voltage code 0xFFF_ Von ee D A output current AT D ma as 3 3 AC Specifications 3 3 1 Processor Expansion Bus Parameter Condition Symbol Min Typ Max Units Notes ClKriseandfalltme SRE o ns CLK frequency TFREQ 120 MHz IRQ NMI setup time Tis S 160 ts RES pulsewidth 0 TRESPw iz d Ju Please refer to the Hitachi SH7032 7034 Hardware Manual for detailed specifications of the processor expansion bus timings The SH 1 is a highly programmable part and thus the timing explanations can be quite elaborate 3 3 2 Analog AC Performance Conditions Ta 20 to 75 C AVcc
15. regulated to within 10 Parameter Condition Symbol Min Typ Max Units Notes AD converter external trigger start delay time Trres 50 ns AD converter ime Tony us AD nonlinearity error CT HP SB AD offset error SB O AD full scale error o TSB SH 1 Embedded Workhorse User s Manual 16 Xtreme Ideas Technology Development A AD quantization error AD absolute accuracy DA converter output slew rate 100 pF 5K load DA converter settling time DA digital feedthrough DA integral nonlinearity error DA differential nonlinearity error 3 3 3 Temperature Sensor Parameter Condition Symbol Min Typ Max Units Notes 3 C Sensor inaccuracy from 25 to 125 C Output voltage ato C eh dw k Daa E E ed E E a E C o d de bits A D full scale voltage es es ve 7 AID Differential nonlinearity tos LiB A D conversion time Oooo d Jas Ju Notes 1 For applications involving 12V lead acid battery chemistries it is recommended to put at least three diode drops between the battery and the SH1WH because lead acid batteries often charge at voltage above 14V 2 There is a 2x gain stage on the output of the DAC which is referenced to VREFO 4 Applications Information 4 1 Basic Usage The SH1WH is capable of operating in both stand alone and host modes The default setting is for host mode operation users may select host mode or st
16. ring via regulated power input 3 2 Serial Interface 3 3 Expansion Connectors 3 3 1 Physical Specifications 3 3 2 Signal Specifications 3 4 Miscellaneous Test Points 3 5 Temperature Sensor 3 6 Diagnostic LED 3 7 Physical Dimensions 3 8 Memory Map 4 QUANTITATIVE SPECIFICATIONS 4 1 Absolute Maximum Ratings 4 2 DC Specifications 4 2 1 Power Supply 4 2 2 Digital I O 4 2 3 Analog I O 4 3 AC Specifications 4 3 1 Processor Expansion Bus 4 3 2 Analog AC Performance 4 3 3 Temperature Sensor 5 APPLICATIONS INFORMATION 5 1 Basic Usage 5 1 1 Booting 6 APPENDIX SH 1 INTERNAL MAPPINGS SH 1 Embedded Workhorse User s Manual 11 11 11 12 13 17 17 17 18 Xtreme Ideas Technology Development This Page Intentionally Left Blank SH 1 Embedded Workhorse User s Manual Xtreme Ideas Technology Development a Descriptive Specifications 2 1 Power Supply The SHIEW can be powered from one of two sources but never by both at the same time 2 1 1 Powering via unregulated power input There are two possible points for attaching unregulated power One may either provide power through the expansion headers or by directly soldering wires to the board A square pad in the southwest corner of the board labeled Vin is the positive input the reverse side has a pad for the GND input The unregulated input voltage may continuously range from 3 8V to 13V Input voltages can be as low as 3 3V the 0 5V margin is
17. specified to enhance noise immunity The board is PTC fuse limited to 750 mA on this input and it has reverse voltage protection Any power source connected to the board should be specified to provide up to 500 mA peak current When powered off of the unregulated power input a small amount of power may be tapped off of the regulated power output for a convenient source of 3 3V The regulator on the SHIEW is specified to provide up to 600 mA total power 2 1 2 Powering via regulated power input There is a pair of pads on the east side of the board for attaching regulated 3 3V power The 3 3V pad is on the top side the GND pad is on the bottom side Power provided at this input should be regulated to 3 3V 5 500 mA peak Use caution when connecting power to this input as there is no fuse or reverse voltage protection on this input 2 2 Serial Interface The SHIEW has two serial ports available off of J1 It is a 6 pin HRS DF3 style connector with the mating HRS part number DF3 6S 2C the socket crimp pins required by the mating connector are HRS part number DF3 2428SC They are readily available through Digi Key connector H2087 ND socket pins H2138 ND for under 3 The voltage levels are RS 232 compliant and the baud rate is user programmable The nominal rate is 38 4Kbaud but the internal baud rate generator can be cranked up to 250Kbaud Please refer to Figure 2 and Table 1 for connector pinouts SH 1 Embedded Workhorse Us
18. such as the SH1WH BB1 Connector pinouts and diagrams are available in Figure 3 Figure 4 and Figure 5 Orientation nomenclature is as follows north is the top of the board when viewed so that the silkscreen is in normal reading orientation West is the left hand side of the board when looking at the side with the switches and high profile components this is usually referred to as the top side Likewise east is the right hand side of the SH 1 Embedded Workhorse User s Manual 7 Xtreme Ideas Technology Development a board When looking at the back of the board west and east are reversed so west is on the right and east is on the left Pin 1 ALG AE hf LST fa D Figure 3 J2 and J4 pin 1 location top view of connector Ieee innit ALG GG A GG A GL a i a i oo maeh eR en ep oeh en eR eR eA oep en oen oea en oh oa oeh oa oh op en R eR n n a n BBR BRBRBRBRBEBSBEEEBe PBSRBEBRBEBRREHBaSB E E 0 0 0 0 0 0 0 0 0 0 ee 8 8 0 0 0 8 8 8 8 8 8 0 8 2 waa CUM TEM TOU oud oo Tg Pin 1 Figure 4 J3 and J5 pin 1 location top view of connector West Connector East connector Top View Top View r 2 3 4 5 6 7 8 9 OOMAONDOABRWND Figure 5 Connector pinouts The west connector has primarily hi
19. t should be connected to port 2 TxD2 RXD2 pins 5 and 6 on J1 5 Appendix SH 1 Internal Mappings Table 2 gives the mapping of SH1WH expansion lines to SH 1 signal pins per the SH7032 7034 Hardware Manual Table 3 gives the mapping of SH1WH internal lines to SH 1 signal pins per the hardware manual specification Primary operating mode of SH 1 pin is highlighted in boldface SH1WH name SH 1 pin name SH 1 pin number PWM4 PB4 TP4 TIOCA4 O 102 PAI4 PA14 IRQ2 DACK1 PA13 PA13 IRQ1 DREQ0 TCLKB PA12 PA12 IRQO DACKO TCLKA PA4 WRL WR RD PAG RD AH samp PA9 AH IRQOUT ADTRG All other signal pin names on expansion bus are identically named in the SH7032 7034 Hardware Manual except for EN 4 0 and DIR 4 0 which are driven by an external 16 bit register chip Table 2 Mapping of expansion connector signals to SH 1 signals The SH1WH has a number of internal signals for interfacing to peripherals such as the RTC and D A converter that the user should also know about A brief explanation of the internal signals is as follows SH 1 Embedded Workhorse User s Manual 18 Xtreme Ideas Technology Development a WDKICK O Watchdog kick output When the watchdog timer function is enabled in the RTC it is necessary to kick the watchdog timer periodically using this signal to prevent a watchdog reset FLASH_RYBY Flash ready busy input Used for hardware polling of FLASH ROM embedded algorithm progress for erasing and programming
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