I-8084W User Manual Version 1.0 beta1, January 2009 Service and
Contents
1. Write_Enable EEPROM Syntax int i8084W_EepWriteEnable int Slot Parameter and Return Values Slot O 7 Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 74 3 29 i8084W_EepWriteDisable Write_Disable EEPROM Syntax int i8084W_EepWriteDisable int Slot Parameter and Return Values Slot O 7 Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 75 3 30 i8084W_EepWriteWord Write 16 bit data to EEP Syntax int i8084W_EepWriteWord int Slot int Addr int Value Parameter and Return Values Slot O 7 Addr 0 39 for users 40 63 for 8084 configuration Value two bytes integer Return 0 gt OK 1 gt Address error 18084W User Manual Version 1 0 beta1 January 2009 76 3 31 i8084W_EepReadWord Read 16 bit data to EEP Syntax int i8084W_EepReadWord int Slot int Addr int Value Parameter and Return Values Slot O 7 Addr 0 39 for users 40 63 for 8084 configuration Value two bytes integer Return 0 gt OK 1 gt Address error 18084W User Manual Version 1 0 beta1 January 2009 77 4 Usage on the WinPAC 8000 WinPAC Introduction and software Development WinPAC 8000 Introduction and user rmanual 8084W can be plugged on the WinPAC 8000 Please refer to Web site http www icpdas com products PAC winpac introduction htm or view the WinPAC2. over 0 x 80000000 count Example A Over 1 count 16384 18084W User Manual Version 1 0 beta1 January 2009 53 total count 1 O x 80000000 16384 2147500032 Example B Over 1 count 8192 total count 1 0x80000000 8192 2147491840 18084W User Manual Version 1 0 beta1 January 2009 54 3 9 i8084W_ReadFreq Syntax int i8084W_ReadFreq int Slot int Channel unsigned long Freq int i8084W_ReadFreq int Slot int Channel float Freq Parameter and Return Values Slot O 7 Channel O 7 Freq Unit Hz 18084W User Manual Version 1 0 beta1 January 2009 55 3 10 i8084W_ReadCntUp Read Up Counter Syntax int i8084W_ReadCntUp int Slot int Channel unsigned long Cnt32U unsigned int OverFlow Parameter and Return Values Slot O 7 Channel O 7 Cnt32U 32 bit Up Counter Overflow number of Overflow Total count over 0x1L00000000 count ExampleA over 1 count 16384 total count 1 0x100000000 16384 4294983680 18084W User Manual Version 1 0 beta1 January 2009 56 3 11 i8084W_ClrCnt Clear Counter Syntax int i8084W_ClIrCnt int Slot int Channel Parameter and Return Values Slot O 7 Channel O 7 Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 It is due to the pulse channel is high The correct initial situation is Pulse channel is low or open dir
3. 00000002 gt 2147483647 Up counting OverflowN OverflowN 1 00000000 00000001 gt 00000002 gt 2147483648 Down counting OverflowN OverflowN 1 18084W User Manual Version 1 0 beta1 January 2009 43 3 Usage on the iPAC 8000 iPAC Introduction and Software Development 8084W can be plugged on the IPAC 8000 Please refer to the Web site http www icpdas com products PAC i 8000 ip 8x41 htm or view the iPAC 8000 User manual for getting more information http ftp icodas com pub cd 8000cd napdos ipac8000 document Software Development using C language Please refer to the Web site http ftp icodas com pub cd 8000cd napdos ipac8000 c_language_guide_eng html 8084W Demo and library for IPAC 8000 The latest library and demo as below Library http ftp icodas com pub cd 8000cd napdos ipac8000 demo basic lib Demo http ftp icodas com pub cd 8000cd napdos ipac8000 demo basic io_in_slot 8084 18084W User Manual Version 1 0 beta1 January 2009 44 3 1 i8084W_GetLibVersion Get the version number of i8084 library Hex Rev 1 0 00 Syntax int i8084W_GetLibVersion void 18084W User Manual Version 1 0 beta1 January 2009 3 2 i8084W_GetLibDate Get the date of 8084 library Sep 03 2003 Syntax Void i8084W_GetLibDate char LibDate 18084W User Manual Version 1 0 beta1 January 2009 3 3 18084W_InitDriver Configure the 8084 with the setting stored in th
4. Low Pass Filter status disable Low Pass Filter signal width 1 ms 18084W User Manual Version 1 0 beta1 January 2009 92 4 12 pac_i8084W_ReadXorRegister Syntax int pac_i8084W_ReadXorRegister int Slot int Channel int XorReg Parameter and Return Values Slot O 7 Channel O 7 XorReg 0 gt Low active signal from High to Low count changed 1 gt High acitve signal from Low to High count changed Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 93 4 13 pac_i8084W_SetXorRegister Syntax int pac_i8084W_SetXorRegister int Slot int Channel int XorReg Parameter and Return Values Slot O 7 Channel O 7 XorReg 0 gt Low active signal from High to Low count count changed 1 gt High acitve signal from Low to High count changed Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 94 4 14 pac_i8084W_ReadChannelMode Syntax int pac_I8084W_ReadChannelMode int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 gt Dir Pulse Counter 1 gt Up Down Counter 2 gt Frequency 3 gt Up Counter 18084W User Manual Version 1 0 beta1 January 2009 95 4 15 pac_i8084W_ReadLowpPassFilter Read Low Pass Filter Syntax int pac_il8084W_
5. 1 00000000 00000001 gt 00000002 gt 2147483648 Down counting OverflowN OverflowN 1 Pulse Dir Counter Counting Variable Total Counting Value Count0 Overflow0 CountO Overflow0 2147483648 Count2 Overflow2 Count2 Overflow2 2147483648 Count4 Overflow4 Count4 Overflow4 2147483648 Count6 Overflow6 Count6 Overflow6 2147483648 CountN the counter value for channel N 32bit wide from 2147483648 to 2147483647 OverflowN the counting overflow number for channel N 16bit wide from 32768 to 32767 Total Counting Value bit 32bit 16bit 48bit 18084W User Manual Version 1 0 beta1 January 2009 36 2 3 2 Mode 01 Up Down Counting The counter operation for mode 01 Up Down mode is as follows InA0 tT y OO up_count up_count up_count rs y down_count down_count down_count 18084W User Manual Version 1 0 beta1 January 2009 37 When InA0O is used as a UP_clock and InBO is used as a DOWN_clock The counter_0 will be increased by one for every falling edge of InAO and decreased by one for every falling edge of InBO 00000000 gt 00000001 gt 00000002 gt 2147483647 Up counting OverflowN OverflawN 1 00000000 gt 00000001 gt 00000002 gt 2147483648 Down counting OverflowN OverflowN 1 Up Down Counter Counting Variable Total Counting Value Count0 Overflow0 CountO Overflow0 2147483648 Count2 Overflow2 Count2 Overf
6. Digital Input 4 ch Up Down Counter Up Down 4 ch Dir Pulse Counter Bi direction 4 ch Quadrant Counting 8 ch Up Counter 8 ch Frequency Programmable Built in gate time 0 33 sec Default 1 us Counter Mode 18084W User Manual Version 1 0 beta1 January 2009 10 Digital Input 1000 Vrms 2 kV Contact for each channel LED Display 1 LED as Power Indicator 8 LEDs as Digital Input Indicators Power Power Consumption 1W Environment Operating Temperature 25 1 9 C Storage Temperature 30 85 C Humidity 5 95 RH Non condensing Dimensions 30 mm x 85 mm x 114 mm Wx Lx H 18084W User Manual Version 1 0 beta1 January 2009 11 1 2 Pin Assignment Terminal No Pin Assignment Name COA COA COB COB C1A C1A C1B C1B C2A C2A C2B C2B C3A C3A C3B C3B GND GND GND GND AAA HAAAAAAAAKA KEKEKE AEKA EE KEKEKE KEKKIA Ga a NIelej ejejlelelelej elelololo ojojo sa ssa a ala lela i 18084W User Manual Version 1 0 beta1 January 2009 1 3 I O Structure Bus Data Control Circuit 5V GND The default jumper settings are as follows NM R yO BIR Aeee E All jumpers are in the DOWN positions So the isolated signals are selected A 18084W User Manual Version 1 0 beta1 January 2009 Isolated Input EE E E E E E EE EEE E E E E E EEE EE E EE E E E E E E E E l l l Inside 80
7. Slot int Channel long Cnt32U int Overflow Parameter and Return Values Slot O 7 Channel O 7 Cnt32L 32 bit gt UpDown Counter Bit31 0 gt Up Count count gt 0 Bit31 1 gt Down Count count lt 0 Overflow number of overflow Total count over 0 x 80000000 count Example A Over 1 count 16384 18084W User Manual Version 1 0 beta1 January 2009 85 total count 1 O x 80000000 16384 2147500032 Example B Over 1 count 8192 total count 1 0x80000000 8192 2147491840 18084W User Manual Version 1 0 beta1 January 2009 86 4 7 pac_i8084W_ReadCntUpDown Read UpDown Counter Syntax int pac_i8084W_ReadCntUpDowniint Slot int Channel long Cnt32U int Overflow Parameter and Return Values Slot O 7 Channel O 7 Cnt32L 32 bit gt UpDown Counter Bit31 0 gt Up Count count gt 0 Bit31 1 gt Down Count count lt 0 Overflow number of overflow Total count over 0 x 80000000 count Example A Over 1 count 16384 18084W User Manual Version 1 0 beta1 January 2009 87 total count 1 O x 80000000 16384 2147500032 Example B Over 1 count 8192 total count 1 0x80000000 8192 2147491840 18084W User Manual Version 1 0 beta1 January 2009 88 4 8 pac_i8084W_ReadFreq Syntax int pac_i8084W_ReadFreq int Slot int Channel unsigned long Freq int pac_i8084W_ReadF
8. User manual for getting more information http ftp icodas com pub cd winpac napdos wp 8x4x_ce50 document Software Development using eMbedded Visual C or NET Both eMbedded Visual C and Visual Studio NET can develop the programon on the WinPAC 8000 Please refer to the Web site http www icpdas com products PAC winpac download winpac_8000 download_doc uments htm and select the necessary document 18084W User Manual Version 1 0 beta1 January 2009 78 8084W Demo and library for WinPAC 8000 Please refer to this page to download WinPAC 8000 demo http www icpdas com products PAC winpac download winpac_8000 download_dem o htm The latest 8084W library and demo as below Library Net ftp ftp icpdas com pub cd winpac napdos wp 8x4x_ce50 sdk io_modules dotnet eVC ftp ftp icpdas com pub cd winpac napdos wp 8x4x_ce50 sdk io_modules evc Demo NET ftp ftp icpdas com pub cd winpac napdos wp 8x4x_ce50 demo winpac dotnet c 2 3 pac_io local eVC ftp ftp icpdas com pub cd winpac napdos wp 8x4x_ce50 demo winpac evc pac_io ocal 18084W User Manual Version 1 0 beta1 January 2009 79 4 1 pac_i8084W_GetLibVersion Get the version number of i8084 library Hex Rev 1 0 00 Syntax int pac_i8084W_GetLibVersion void 18084W User Manual Version 1 0 beta1 January 2009 4 2 pac_i8084W_GetLibDate Get the date of 8084 library Sep 03 2003 Syntax Void
9. signal is high or low 18084W User Manual Version 1 0 beta1 January 2009 57 3 12 i8084W_RecoverDefaultSetting Syntax void i8084W_RecoverDefaultSetting int Slot Parameter and Return Values Slot 0 7 Remark Default settings XOR register 0 Channel mode 3 Up counter mode Frequency operate mode 0 Auto mode Frequency update time Auto mode 330 ms Low freq mode 1000 ms High freq mode 100 ms Low Pass Filter status disable Low Pass Filter signal width 1 ms 18084W User Manual Version 1 0 beta1 January 2009 58 3 13 i8084W_ReadXorRegister Syntax int i8084W_ReadXorRegister int Slot int Channel int XorReg Parameter and Return Values Slot O 7 Channel O 7 XorReg 0 gt Low active signal from High to Low count changed 1 gt High acitve signal from Low to High count changed Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 59 3 14 i8084W_SetXorRegister Syntax int i8084W_SetXorRegister int Slot int Channel int XorReg Parameter and Return Values Slot O 7 Channel O 7 XorReg 0 gt Low active signal from High to Low count count changed 1 gt High acitve signal from Low to High count changed Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 60 3
10. 0Hz signal amp 50 50 duty cycle will generate a 1000 us high amp 1000 us low as follows Agis Stop M Pos 4 040ms CURSOR Type Source CH1 Delta 2 000ms 500 0Hz Cursor 1 1 000 Cursor 2 3 000ms CHT 200 CH Zoov M4 00ms CHUZ 2807 499 999H2 Input signal 500Hz amp Low Pass Filter Disable Signal 1 input signal 500Hz 50 50 duty cycle Signal 2 input signal after Xor and Low Pass Filter now Xor 0 and Low Pass Filter is disable 18084W User Manual Version 1 0 beta1 January 2009 26 If the Low Pass Filter is disabled signal 2 will be the same as signal 1 in the above diagram If the Low Pass Filter is enabled signal 2 will be shorter than signal 1 as shown below yy Bes Stop M Pos 4 040ms CURSOR Signal 1 CHI 200V CH2 2 00 Input signal 500Hz amp Low Pass Filter Enabled 1ps Signal 1 input signal 500Hz 50 50 duty cycle Signal 2 input signal after Xor and Low Pass Filter now Xor 0 and the Low Pass Filter is enabled Nearly all pulses are passed 18084W User Manual Version 1 0 beta1 January 2009 27 Now you can find that nearly all pulses are passed If the input signal is increased to 600Hz then some of the pulses are filtered as follows Ay i Stop M Pos 4 040ms CURSOR CHI 200V CH2 2 00 M 1 00ms Input signal 600Hz amp Low Pass Filter Enabled 1ps Signal 1 input signal 600Hz 50 50 duty cycle Signal 2 input signal after Xor and
11. 1 0 beta1 January 2009 40 2 3 4 Mode 03 Up Counting The counter operation for mode 03 is as follows up count up count up count up count Counter_0 will increment by one for every falling edge of InAO Up Counting Variable Total Counting Value Count0 Overflow0 CountO Overflow0 4294967296 Count1 Overflow1 Count1 Overflowl 4294967296 Count2 Overflow2 Count2 Overflow2 4294967296 Count4 Overflow4 4294967296 Count5 Overflow5 4294967296 Count6 Overflow6 4294967296 Count7 Overflow7 4294967296 Count3 Overflow3 Count3 Overflow3 4294967296 18084W User Manual Version 1 0 beta1 January 2009 41 The counter operation is as follows 00000000 gt 00000001 gt 00000002 gt gt 4294967295 OverflowN OverflowN 1 CountN current counter value for channel N 32bit wide from 0 to 4294967295 OverflowN The counting overflow number for channel N 16bit wide from 0 to 65535 Total Counting Value CountN OverflowN 4294967296 Total Counting Bit 32bit 16bit 48bit 18084W User Manual Version 1 0 beta1 January 2009 2 3 5 Mode 04 Quadrant Counting counter 3 45 6 Quadrant Counting Mode Quadrant Counting Mode A gt A BOB When InA0O is used as a UP_clock and InBO is used as a DOWN _clock The counter_0 will be increased by one for every falling edge of InAO and decreased by one for every falling edge of InBO 00000000 gt 00000001 gt
12. 15 i8084W_ReadChannelMode Syntax int i8084W_ReadChannelMode int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 gt Dir Pulse Counter 1 gt Up Down Counter 2 gt Frequency 3 gt Up Counter 18084W User Manual Version 1 0 beta1 January 2009 61 3 16 i8084W_ReadLowpPassFilter Read Low Pass Filter Syntax int i8084W_ReadLowPassFilter_Us int Slot int Channel unsigned int Us Parameter and Return Values Slot O 7 Channel O 7 Us 1 32767 pulse width unit 0 001 ms 18084W User Manual Version 1 0 beta1 January 2009 62 3 17 i8084W_SetLowPassFilter Set Low Pass Filter Syntax int i8084W_SetLowPassFilter_Us int Slot int Channel unsigned int Us Parameter and Return Values Slot O 7 Channel O 7 Us 1 32767 pulse width unit micro second 18084W User Manual Version 1 0 beta1 January 2009 63 3 18 i8084W_ReadLowpPassFilter_Status Syntax void i8084W_ReadLowPassFilter_Status int Slot int Channel int Status Parameter and Return Values Slot O 7 Channel O 7 Status 0 disable 1 enable 18084W User Manual Version 1 0 beta1 January 2009 64 3 19 i8084W_SetLowPassFilter Status Syntax void i8084W_SetLowPassFilter_Status int Slot int Channel int Status Parameter and Return Values Slot O 7 Channel O 7 Status 0 disable 1 enable 18084W
13. 84 Vin ry n External Signal Ji is in the DOWN position meaning that the isolated input is selected XorA0 is used to invert the input signal making InA0 normal High and active Low J1 J8 are relative to AQ B3 respectively 18084W User Manual Version 1 0 beta1 January 2009 TIL Input Inside 8084 Yin External Signal Ji is in the UP position meaning that the TTL input is selected XorA0 is used to invert the input signal making InAQ normal High and active Low Ji JB are relative to AO B3 cits TCS STK CC KT KC eS a l 18084W User Manual Version 1 0 beta1 January 2009 15 Isolated or TTL input is selected by using JP1 to JP3 as indicated below J2 J3 Select A1 K e 14 J5 Select A2 Isolated input Default Setting E J7 Select A3 7 18084W User Manual Version 1 0 beta1 January 2009 J1 2 3 4 5 6 7 8 TTL input 16 1 4 Wiring Connection Counter Type a i 18084W User Manual Version 1 0 beta1 January 2009 Vin Pulse Yin Pulse Vin Dir Vin Dir Vin Up Vin Up Vin Down Vin Down Vin Up0 Vin Up0 Vin Up1 Vin Up1 Vin A0 Vin A0 Vin BO Vin BO Vin Pulse Vin Dir rol Vin Pulse and Vin Dir Vin Up Vin Down Vin Up and Vin Down Vin Up1 17 Frequency Type Vin Freq0 Vint Freq0 Vin Freq0 Vin Freq1 GND Vin Fre
14. I 8084W User Manual Version 1 0 beta1 January 2009 Service and usage information for WinPAC 8000 and iPAC 8000 Series Written by Hans Chen Edited by Anna Huang 18084W User Manual Version 1 0 beta1 January 2009 1 Warranty All products manufactured by ICP DAS are under warranty regarding defective materials for a period of one year beginning from the date of delivery to the original purchaser Warning ICP DAS assumes no liability for any damage resulting from the use of this product ICP DAS reserves the right to change this manual at any time without notice The information furnished by ICP DAS is believed to be accurate and reliable However no responsibility is assumed by ICP DAS for its use no for any infringements of patents or other rights of third parties resulting from its use Copyright Copyright 2007 by ICP DAS Co Ltd All rights are reserved Trademarks The names used in this manual are for identification purpose only and may be registered trademarks of their respective companies 18084W User Manual Version 1 0 beta1 January 2009 2 Table of Contents Table of Contents 1 Introduction to the I8084W 1 1 Specification 1 2 Pin Assignment 1 3 I O Structure 1 4 Wiring Connection 1 5 Dimensions 2 Hardware Operation Principle 2 1 Input Signal Model 2 2 Digital Low Pass Filter 2 3 Operation Mode 2 3 1 Mope 00 PULSE DIR COUNTING 2 3 2 Mop
15. Low Pass Filter now Xor 0 and Low Pass Filter is enabled Some pulses are filtered 18084W User Manual Version 1 0 beta1 January 2009 28 If the input signal is increased to 900Hz then nearly all pulses are filtered as illustrated below Ny Re Stop M Pos 4 040ms CURSOR H Input signal 900Hz amp Low Pass Filter Enabled 1pus Signal 1 input signal 900Hz 50 50 duty cycle Signal 2 input signal after Xor and Low Pass Filter now Xor 0 and the Low Pass Filter is enabled Nearly all pulses are filtered 18084W User Manual Version 1 0 beta1 January 2009 29 Because there are some frequency offset errors in the internal crystal there may be some noises when the input signal width Low Pass Filter 2 as follows Tek Age Stop M Pos 4 040ms CURSOR fi Type Source CH2 Signal 1 Delta 1 000ms _ 1 000kHz Signal 2 Cursor 1 2 400ms Cursor 2 3 400ms 2 Hi CHi 2000 Ch 2000 M2S0ms CHAT 288V lt 10Hz Input signal 1000Hz amp Low Pass Filter Enabled 1ps Signal 1 input signal 1000Hz 50 50 duty cycle a pulse width 500 us Signal 2 input signal after Xor and Low Pass Filter now Xor 0 and the Low Pass Filter is enabled Signal Pulse 500 us Low Pass Filter 2 Nearly all pulses are filtered but sometimes certain noises will not be filtered 18084W User Manual Version 1 0 beta1 January 2009 If the input signal is increased to 1100Hz then all pulses will be fi
16. ReadLowPassFilter_Us int Slot int Channel unsigned int Us Parameter and Return Values Slot O 7 Channel O 7 Us 1 32767 pulse width unit 0 001 ms 18084W User Manual Version 1 0 beta1 January 2009 96 4 16 pac_i8084W_SetLowPassFilter Set Low Pass Filter Syntax int pac_i8084W_SetLowPassFilter_Us int Slot int Channel unsigned int Us Parameter and Return Values Slot O 7 Channel O 7 Us 1 32767 pulse width unit micro second 18084W User Manual Version 1 0 beta1 January 2009 97 4 17 pac_i8084W_ReadLowPassFilter_Status Syntax void pac_i8084W_ReadLowpPassFilter_Status int Slot int Channel int Status Parameter and Return Values Slot O 7 Channel O 7 Status 0 disable 1 enable 18084W User Manual Version 1 0 beta1 January 2009 4 18 pac_i8084W_SetLowPassFilter_Status Syntax void pac_i8084W_SetLowPassFilter_Status int Slot int Channel int Status Parameter and Return Values Slot O 7 Channel O 7 Status 0 disable 1 enable 18084W User Manual Version 1 0 beta1 January 2009 99 4 19 pac_i8084W_ReadFreqMode Syntax void pac_i8084W_ReadFreqModea int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 Auto 1 Low Frequency 2 High Frequency 18084W User Manual Version 1 0 beta1 January 2009 100 4 20 pac_i8084W_SetFreqMode Syn
17. User Manual Version 1 0 beta1 January 2009 65 3 20 i8084W_ReadFreqMode Syntax void i8084W_ReadFreqModea int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 Auto 1 Low Frequency 2 High Frequency 18084W User Manual Version 1 0 beta1 January 2009 66 3 21 i8084W_SetFreqMode Syntax void i8084W_SetFreqMode int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 Auto 1 Low Frequency 2 High Frequency 18084W User Manual Version 1 0 beta1 January 2009 67 3 22 i8084W_ReadFreqUpdateTime Reads the update time used by frequency measurement algorithm Syntax void i8084W_ReadFreqUpdateTime int Slot int AutoMode_UpdateTime int LowMode_UpdateTime int HighMode_UpdateTime Parameter and Return Values Slot O 7 AutoMode_UpdateTime time period for Auto mode unit ms LowMode_UpdateTime time period for Low Frequency mode unit ms LowMode_UpdateTime time period for High Frequency mode unit ms 18084W User Manual Version 1 0 beta1 January 2009 68 3 23 i8084W_SetFreqUpdateTime Sets the update time used by frequency measurement algorithm Syntax int i8084W_SetFreqUpdateTime int Slot int AutoMode_UpdateTime int LowMode_UpdateTime int HighMode_UpdateTime Parameter and Return Values Slot O 7 AutoMode_UpdateTime time perio
18. bit counter is overflow round 145 ms To avoid the overflow situation user s code is recommended to call i8084W_AutoScan every 70 ms 18084W User Manual Version 1 0 beta1 January 2009 49 3 6 i8084W_ReadCntABPhase Syntax int i8084W_ReadCntABPhase int Slot int Channel long Cnt32U int Overflow 18084W User Manual Version 1 0 beta1 January 2009 50 3 7 i8084W_ReadCntPulseDir Read Pulse Dir Counter Syntax int i8084W_ReadCntPulseDir int Slot int Channel long Cnt32U int Overflow Parameter and Return Values Slot O 7 Channel O 7 Cnt32L 32 bit gt UpDown Counter Bit31 0 gt Up Count count gt 0 Bit31 1 gt Down Count count lt 0 Overflow number of overflow Total count over 0 x 80000000 count Example A Over 1 count 16384 18084W User Manual Version 1 0 beta1 January 2009 51 total count 1 O x 80000000 16384 2147500032 Example B Over 1 count 8192 total count 1 0x80000000 8192 2147491840 18084W User Manual Version 1 0 beta1 January 2009 52 3 8 i8084W_ReadCntUpDown Read UpDown Counter Syntax int i8084W_ReadCntUpDown int Slot int Channel long Cnt32U int Overflow Parameter and Return Values Slot O 7 Channel O 7 Cnt32L 32 bit gt UpDown Counter Bit31 0 gt Up Count count gt 0 Bit31 1 gt Down Count count lt 0 Overflow number of overflow Total count
19. d for Auto mode unit ms LowMode_UpdateTime time period for Low Frequency mode unit ms LowMode_UpdateTime time period for High Frequency mode unit ms 18084W User Manual Version 1 0 beta1 January 2009 69 3 24 i8084W_ReadFreqTimeoutValue Syntax unsigned short i8084W_ReadFreqTimeoutValue int Slot int Channel Parameter and Return Values 18084W User Manual Version 1 0 beta1 January 2009 3 25 i8084W_SetFreqTimeoutValue Syntax void i8084W_SetFreqTimeoutValue int Slot int Channel unsigned short TimeOutValue Parameter and Return Values 18084W User Manual Version 1 0 beta1 January 2009 71 3 26 i8084W_ReadDI Xor Syntax int i8084W_ReadDI Xor int Slot int DD Parameter and Return Values Slot O 7 DI BitO DI of AO after XorControl DI Bitl DI of BO after XorControl DI Bit7 DI of B3 after XorControl Return 0 gt OK lt gt 0 gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 72 3 27 i8084W_ReadDI_ XorLPF Syntax int i8084W_ReadDI_XorLPF int Slot int DI Parameter and Return Values Slot O 7 DI BitO DI of AO after XorControl amp Low Pass Filter DI Bitl DI of BO after XorControl amp Low Pass Filter DI Bit7 DI of B3 after XorControl amp Low Pass Filter Return 0 gt OK lt gt 0 gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 73 3 28 i8084W_EepWriteEnable
20. e 01 UP DOWN COUNTING 2 3 3 MODE 02 FREQUENCY MODE 18084W User Manual Version 1 0 beta1 January 2009 10 12 13 17 19 20 20 23 33 35 37 39 Table of Contents 2 3 4 MODE 03 UP COUNTING 41 2 3 5 MODE 04 QUADRANT COUNTING 43 3 Usage on the iPAC 8000 44 3 1 i8084W_GetLibVersion 45 3 2 i8084W_GetLibDate 46 3 3 1i8084W_InitDriver 47 3 4 i8084W_SetChannelMode 48 3 5 i8084W_AutoScan 49 3 6 i8084W_ReadCntABPhase 50 3 7 i8084W_ReadCntPulseDir 51 3 8 i8084W_ReadCntUpDown 53 3 9 i8084W_ReadFreq 55 3 10 i8084W_ReadCntUp 56 3 11 i8084W_ClrCnt 57 18084W User Manual Version 1 0 beta1 January 2009 4 Table of Contents i8084W_RecoverDefaultSetting i8084W_ReadXorRegister i8084W_SetXorRegister i8084W_ReadChannelMode i8084W_ReadLowPassFilter i8084W_SetLowPassFilter i8084W_ReadLowPassFilter_Status i8084W_SetLowPassFilter_Status i8084W_ReadFreqMode i8084W_SetFreqMode i8084W_ReadFreqUpdateTime i8084W_SetFreqUpdateTime i8084W_ReadFreqTimeoutValue i8084W_SetFreqTimeoutValue 18084W User Manual Version 1 0 beta1 January 2009 58 59 60 61 62 63 64 65 66 67 68 69 70 71 Table of Contents 3 26 i8084W_ReadDI_Xor 72 3 27 i8084W_ReadDI_XorLPF 73 3 28 i8084W_EepWriteEnable 74 3 29 i8084W_EepWriteDisable 75 3 30 i8084W_EepWriteWord 76 3 31 i8084W_EepReadWord 77 4 Usage on the WinPAC 8000 78 4 1 pac_i8084W_GetL
21. e EEPROM If there is no settings stored in the EEPROM the function will call i8084W_RecoverDefaultSetting Syntax int i8084W_InitDriver int Slot Parameter and Return Values Slot 0 7 Return 0 gt 0K 1 gt Module not found gt 0 gt Some Pulse Dir counters have one count offset 1 Bit0 1 O AO has one count offset 1 Bit2 1 O A1 has one count offset 1 Bit4 1 O A2 has one count offset 1 Bit6 1 O A3 has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 47 3 4 i8084W_SetChannelMode Syntax int i8084W_SetChannelMode int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 gt Dir Pulse Counter 1 gt Up Down Counter 2 gt Frequency 3 gt Up Counter Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 3 5 18084W_AutoScan Auto scan the 18084 to updates 8 channels Syntax int i8084W_AutoScan void Parameter and Return Values Remark This function is used to update the hardware counter values The hardware counter is 16 bit User s code must call the function or i8084W_ReadCntPulseDir i8084W_ReadCntUpDown i8084W_ReadFreq i8084W_ReadCntUp before the hardware counter is overflow Under very high speed signal input for example 450K Hz the 16
22. ed of the 8084 is recommended to 450K 50 50 duty cycle 18084W User Manual Version 1 0 beta1 January 2009 32 2 3 Operation Mode Operation Mode Description Dir Pulse counting mode Up Down counting mode Frequency mode Up counting mode Quadrant Counting mode 18084W User Manual Version 1 0 beta1 January 2009 Number of counter and frequency sets 4 sets 4 sets 8 sets 8 sets 4 sets 33 The input channels mapping table and working modes are indicated below Mode 00 Mode ON Mmmm Mode02 Mode03 Mode 04 o CountN the counter value for channel N 32bit wide from 2147483648 to 2147483647 OverflowN the counting overflow number for channel N 16bit wide from 32768 to 32767 Total Counting Value bit 32bit 16bit 48bit 18084W User Manual Version 1 0 beta1 January 2009 34 2 3 1 Mode 00 Pulse Dir Counting The counter operation for mode 00 Dir Pulse mode is as follows InAOd Pulse up_count up_count up_count down_count down_count down_count a InBO Dr TT When InBO is used as Dir if InBO is High counter_0 will be increased by one for every falling edge of InAO IfInBO is Low counter_0 will be decreased by one for every falling edge of InAO 18084W User Manual Version 1 0 beta1 January 2009 35 The counter operation is given as follows 00000000 gt 00000001 gt 00000002 gt 2147483647 Up counting OverflowN OverflowN
23. emoved as follows Input signal fo Filter clock ee 4 Filter signal Ifthe high width of the input signal is shorter then T it will be filtered Ifthe adjacent 2 samples are all HIGH the input signal can pass as indicated below Input signal ee ee ee Filter clock a ee P Filter signal ee A Note the filter signal is shorter than the original input signal 18084W User Manual Version 1 0 beth1 January 2009 24 Ifthe input signal is shorter than 2T it may be filtered in the following manner Input signal Filter clock Filter signal The relationship between the input signal and the filter signal is as follows if 2T lt input signal it will pass if T lt input signal lt 2T it may be filtered or passed if input signal lt T it will be filtered The software driver i8084_SetLowPassUs int Slot int Channel unsigned int Us provides an parameter Us which can be used to set the Low Pass Filter as follows ifUs land 2T 1ys thenT 0 5us and signal lt 0 5us will be removed ifUs 2and 2T 2us thenT 1 usand signal lt 1us will be removed if Us N N from 1 to Ox7fff and 2T N us then signal lt N 2 us will be removed The Low Pass Filter range can be configured from 1us to 32767us The high width of the signal lt Us 2 will be removed 18084W User Manual Version 1 0 beta1 January 2009 25 For example if you use a function generator as signal source the 50
24. i8084W_GetLibDate char LibDate 18084W User Manual Version 1 0 beta1 January 2009 4 3 pac_i8084W_InitDriver Configure the 8084 with the setting stored in the EEPROM If there is no settings stored in the EEPROM the function will call i8084W_RecoverDefaultSetting Syntax int i8084W_InitDriver int Slot Parameter and Return Values Slot 0 7 Return 0 gt 0K 1 gt Module not found gt 0 gt Some Pulse Dir counters have one count offset 1 Bit0 1 O AO has one count offset 1 Bit2 1 O A1 has one count offset 1 Bit4 1 O A2 has one count offset 1 Bit6 1 O A3 has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 82 4 4 pac_i8084W_SetChannelMode Syntax int pac_i8084W_SetChannelModea int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 gt Dir Pulse Counter 1 gt Up Down Counter 2 gt Frequency 3 gt Up Counter Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 due to the input channel is high 18084W User Manual Version 1 0 beta1 January 2009 83 4 5 pac_i8084W_ReadCntABPhase Syntax int pac_i8084W_ReadCntABPhase int Slot int Channel long Cnt32U int Overflow 18084W User Manual Version 1 0 beta1 January 2009 84 4 6 pac_i8084W_ReadCntPulseDir Read Pulse Dir Counter Syntax int pac_i8084W_ReadCntPulseDir int
25. ibVersion 80 4 2 pac_i8084W_GetLibDate 81 4 3 pac_i8084W_InitDriver 82 4 4 pac_i8084W_SetChannelMode 83 4 5 pac_i8084W_ReadCntABPhase 84 4 6 pac_i8084W_ReadCntPulseDir 85 4 7 pac_i8084W_ReadCntUpDown 87 18084W User Manual Version 1 0 beta1 January 2009 6 Table of Contents 4 8 pac_i8084W_ReadFreq 4 9 pac_i8084W_ReadCntUp 4 10 pac_i8084W_ClrCnt 4 11 pac_i8084W_RecoverDefaultSetting 4 12 pac_i8084W_ReadXorRegister 4 13 pac_i8084W_SetXorRegister 4 14 pac_i8084W_ReadChannelMode 4 15 pac_i8084W_ReadLowpPassFilter 4 16 pac_i8084W_SetLowPassFilter 4 17 pac_i8084W_ReadLowPassFilter_Status 4 18 pac_i8084W_SetLowPassFilter_Status 4 19 pac_i8084W_ReadFreqMode 4 20 pac_i8084W_SetFreqMode 4 21 pac_i8084W_ReadFreqTimeoutValue 18084W User Manual Version 1 0 beta1 January 2009 89 90 91 92 93 94 95 96 97 98 99 100 101 102 4 22 4 23 4 24 4 25 4 26 4 27 4 28 Table of Contents pac_i8084W_SetFreqTimeoutValue pac_i8084W_ReadDI_Xor pac_i8084W_ReadDI_XorLPF pac_i8084W_EepWriteEnable pac_i8084W_EepWriteDisable pac_i8084W_EepWriteWord pac_i8084W_EepReadWord 18084W User Manual Version 1 0 beta1 January 2009 103 104 105 106 107 108 109 1 Introduction to the I8084W I 8084W is a 4 8 channel Counter Frequency Module 18084W User Manual Version 1 0 beta1 January 2009 1 1 Specification
26. l Version 1 0 beta1 January 2009 105 4 25 pac_i8084W_EepWriteEnable Write_Enable EEPROM Syntax int pac_i8084W_EepWriteEnable int Slot Parameter and Return Values Slot O 7 Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 106 4 26 pac_i8084W_EepWriteDisable Write_Disable EEPROM Syntax int pac_i8084W_EepWriteDisable int Slot Parameter and Return Values Slot O 7 Return 0 gt OK Others gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 107 4 27 pac_i8084W_EepWriteWord Write 16 bit data to EEP Syntax int pac_i8084W_EepWriteWord int Slot int Addr int Value Parameter and Return Values Slot O 7 Addr 0 39 for users 40 63 for 8084 configuration Value two bytes integer Return 0 gt OK 1 gt Address error 18084W User Manual Version 1 0 beta1 January 2009 108 4 28 pac_i8084W_EepReadWord Read 16 bit data to EEP Syntax int pac_i8084W_EepReadWord int Slot int Addr int Value Parameter and Return Values Slot O 7 Addr 0 39 for users 40 63 for 8084 configuration Value two bytes integer Return 0 gt OK 1 gt Address error 18084W User Manual Version 1 0 beta1 January 2009 109
27. low2 2147483648 Count4 Overflow4 Count4 Overflow4 2147483648 Count6 Overflow6 Count6 Overflow6 2147483648 CountN the counter value for channel N 32bit wide from 2147483648 to 2147483647 OverflowN the counting overflow number for channel N 16bit wide from 32768 to 32767 Total Counting Value bit 32bit 16bit 48bit 18084W User Manual Version 1 0 beta1 January 2009 38 2 3 3 Mode 02 Frequency Mode The frequency operation for mode 02 is as follows Frequency Frequency Variable Frequency0O Frequencyl Period of update time t 0 33 second is the default setting A user defined command can be used to change the value of t for special applications Frequency Counter value Period of scan time t Assume t 0 1 seconds If count 1 a frequency 1 0 1 1 10 Hz 18084W User Manual Version 1 0 beta1 January 2009 39 If count 10 a frequency 1 0 1 10 100 Hz All frequency channels will be updated every 0 1 seconds for t 0 1 seconds The software driver provides three ways to adjust t They are Auto select Low and High Frequency The default is Auto select The default configuration data is as follows Auto Frequency the frequency channel will be updated every 330 million seconds Low Frequency the frequency channel will be updated every 1000 million seconds High Frequency the frequency channel will be updated every 100 million seconds 18084W User Manual Version
28. ltered as shown in Figure 1 12 Tek Jl E Ready M Pos 4 040ms Input signal 1100Hz amp Low Pass Filter Enabled 1ps 18084W User Manual Version 1 0 beta1 January 2009 31 In summary apply the minimum lus on Low Pass Filters The result of the signal being processed by the Low Pass Filter as follows After Low Pass Filter processing I ignal H npu aona uae All signals will be passed Figure 1 Low Pass Filter 1us I ignal 500H niput signa Spog All signals should be passed Figure 2 Low Pass Filter 1ps Input signal 600Hz Some signals will be filtered and Fi igure 3 Low Pass Filter 1ps some will be passed Input signal frequency Hz Reference Input signal 900Hz Many signals will be filtered and Fi igure 4 Low Pass Filter 1ps few will be passed I ignal 1000H ae dey i Nearly all signals are filtered Figure 5 Low Pass Filter 1ps I ignal 1100Hz gt 1k H npu Sans oe ee a All signals will be filtered Figure 6 Low Pass Filter 1us For the same reason if the signal pulse Low Pass Filter certain pulses may be filtered Therefore it is recommended to set the cycle time of Low Pass Filter about 5 less than the cycle time of input signal pulse as shown below Input pulse 1 ms 1000 us set Low Pass Filter lt 950 us if Input pulse 100 us set Low Pass Filter lt 95 us The minimum Low Pass Filter 1 us input signal lt 475K 50 50 duty cycle As a result the maximum spe
29. q1 Yin Freq1 18084W User Manual Version 1 0 beta1 January 2009 1 5 Dimensions Unit mm OODODDOODONDOOODOODO M i m e a J _ 18084W User Manual Version 1 0 beta1 January 2009 2 Hardware Operation Principle 2 1 Input Signal Model 1 Isolated Input XOR 0 The operational logic applied on the 8084 modules is the falling edge trigger Normal High and Active Low The external signal is input into an 8084 module through the isolated mechanism with the signal being reversed from the external signal This internal signal is the suggested waveform as it doesn t need to execute the XOR operation XOR 0 The solution is shown below i0060 External signal After Isolated Buffer After XOR 0 18084W User Manual Version 1 0 beta1 January 2009 20 2 TTL Input XOR 1 When an external TTL signal is input into an 8084 module through the TTL mechanism the signal will be the same as the external signal This internal signal isn tthe recommended waveform as it must execute the exclusive OR XOR 1 operation The solution is shown below External signal Se es abd eS ek After TTL Buffer een es S bee Gee aes S After XOR 1 18084W User Manual Version 1 0 beta1 January 2009 21 3 Always XOR 0 Regardless of whether the input signal is TTL or isolated XOR is always set
30. req int Slot int Channel float Freq Parameter and Return Values Slot O 7 Channel O 7 Freq Unit Hz 18084W User Manual Version 1 0 beta1 January 2009 89 4 9 pac_i8084W_ReadCntUp Read Up Counter Syntax int pac_i8084W_ReadCntUp int Slot int Channel unsigned long Cnt32U unsigned int OverFlow Parameter and Return Values Slot O 7 Channel O 7 Cnt32U 32 bit Up Counter Overflow number of Overflow Total count over 0x1L00000000 count ExampleA over 1 count 16384 total count 1 0x100000000 16384 4294983680 18084W User Manual Version 1 0 beta1 January 2009 90 4 10 pac_i8084W_ClIrCnt Clear Counter Syntax int pac_i8084W_ClrCnt int Slot int Channel Parameter and Return Values Slot O 7 Channel O 7 Return 0 gt No error 1 gt The Pulse Dir counter has one count offset 1 It is due to the pulse channel is high The correct initial situation is Pulse channel is low or open dir signal is high or low 18084W User Manual Version 1 0 beta1 January 2009 91 4 11 pac_i8084W_RecoverDefaultSetting Syntax void pac_i8084W_RecoverDefaultSetting int Slot Parameter and Return Values Slot O 7 Remark Default settings XOR register 0 Channel mode 3 Up counter mode Frequency operate mode 0 Auto mode Frequency update time Auto mode 330 ms Low freq mode 1000 ms High freq mode 100 ms
31. tax void pac_i8084W_SetFreqMode int Slot int Channel int Mode Parameter and Return Values Slot O 7 Channel O 7 Mode 0 Auto 1 Low Frequency 2 High Frequency 18084W User Manual Version 1 0 beta1 January 2009 101 4 21 pac_i8084W_ReadFreqTimeoutValue Syntax unsigned short pac_i8084W_ReadFreqTimeoutValue int Slot int Channel Parameter and Return Values 18084W User Manual Version 1 0 beta1 January 2009 102 4 22 pac_i8084W_SetFreqTimeoutValue Syntax void pac_i8084W_SetFreqTimeoutValue int Slot int Channel unsigned short TimeOutValue Parameter and Return Values 18084W User Manual Version 1 0 beta1 January 2009 103 4 23 pac_i8084W_ReadDIL_Xor Syntax int pac_i8084W_ReadDI_Xor int Slot int DI Parameter and Return Values Slot O 7 DI BitO DI of AO after XorControl DI Bitl DI of BO after XorControl DI Bit7 DI of B3 after XorControl Return 0 gt OK lt gt 0 gt Error codes 18084W User Manual Version 1 0 beta1 January 2009 104 4 24 pac_i8084W_ReadDI_XorLPF Syntax int pac_i8084W_ReadDI_XorLPF int Slot int DI Parameter and Return Values Slot O 7 DI BitO DI of AO after XorControl amp Low Pass Filter DI Bitl DI of BO after XorControl amp Low Pass Filter DI Bit7 DI of B3 after XorControl amp Low Pass Filter Return 0 gt OK lt gt 0 gt Error codes 18084W User Manua
32. to 0 and the maximum count error can only be 1 XOR 0 can be used for all cases if a 1 count error is acceptable Note When XOR 0 and the 8084 module status is OPEN status i e no signals on the input terminal regardless of whether you select the TTL or Isolated mode the signal at the C point will always be 1 Similarly if XOR 1 and the status is OPEN then the signal at the C point will always be 0 Ifthe input signal is a pulse rather than a 50 50 duty cycle square waveform then the 1 count error will not occur as the pulse width is shorter LILI LI WI Lo 18084W User Manual Version 1 0 beta1 January 2009 22 2 2 Digital Low Pass Filter The 8084 has three independent 2nd order digital noise filters LPO LP1 amp LP2 to remove noises as follows Channel Low Pass Filter Low Pass Filter 0 Low Pass Filter 0 Low Pass Filter 2 The Low Pass Filter can be either disabled or programmable from 2 us to 65535 us The Low Pass Filter will apply to all working modes counter or frequency These 3 Low Pass Filters are disabled status in the default shipping User defined program can be used to issue a command to enable or disable the filters Assume that the filter clock of the Low Pass Filter is set to T this clock is used to sample the input signal 18084W User Manual Version 1 0 beta1 January 2009 23 If one of the adjacent 2 samples is low then the input signal will be r
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