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A simplified GPS-Derived Frequency Standard QEX
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1. V Tuning Low Pass Filter Interface TTL RS232 Converter Figure 1 Block diagram of the GPS derived frequency standard 14 Sep Oct 2006 DEX Reprinted with permission copyright ARRL By averaging it over a long period a much better accuracy can be achieved This is what this project does it locks an external 10 MHz voltage controlled signal source to the 1 pps GPS signal The good work of Brooks Shera has gen erated a lot of interest within a broad commu nity of experimenters who want to increase the level of frequency accuracy available to them at low cost His system uses a PLL technique to lock an external oscillator to a GPS receiver and obtain an accurate frequency standard The project I present here provides a simpler and more modern approach to a Notes appear on page 21 GPS derived 10 MHz frequency standard Improvements found in today s technology offer the following benefits solid perfor mance more features and a reduction in the number of components This design differentiates itself from other previously published designs because e It uses a simpler frequency measurement technique as opposed to phase measure ment e It provides on board reference buffering and fan out with 50 Q output impedance e It provides the three most common refer ence frequencies of 10 MHz 5 MHz and 1 MHz e It provides full software contr
2. recommended TO 220 Compact Heat sink recommended Part Number Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey Digikey 478 2472 ND or equiv 478 2472 ND or equivalent 478 2479 ND or equiv P1176 ND or equiv MV6461A ND or equiv MV5477C ND or equiv S1012 36 ND Cut to size or equiv P51BACT ND or equiv P47KBACT ND or equiv P470BACT ND or equiv P100KBACT ND or equiv LTC1485CN8 ND 296 9199 5 ND 296 1408 5 ND PIC18F2220 I SP ND OPA2705PA ND LM7805CT ND ED3108 ND or equiv ED3116 ND or equiv ED3128 ND or equiv HS107 ND or equiv DEX Sep Oct 2006 19 Photo A The complete frequency standard system integrated into an enclosure The unit at the top left corner is the GPS board The bottom left unit is the FLL controller board and the oven controlled variable crystal oscillator is at the bottom right The RS232 converter chip and related circuitry is on the board shown at the top center Also shown in the top right corner is an 8 V regulator and dc input fuse holder QX0609 Zauh08 Measured Accuracy vs Time 1 E 09 1 E 10 Accuracy 1 E 11 1 E 12 0 8 16 24 2 25 Hour Avg period Voting Mode Oncore GT GPS 32 40 48 56 64 72 Time hours Figure 8 Frequency accuracy for a 72 hour period eraging cycles and
3. V VCXO The value of R1 should match 5 V VCXO Output impedance Decimal values of capacitance are in 8 15 V de Note 2 JP2 JP3 C17 R7 and R8 values are shown for a 0 to 5 V DAC tuning range microfarads uF others are in picofarads pF Resistances are in ohms k 1 000 M 1 000 000 Figure 2 Schematic diagram of the GPS derived frequency standard circuit QEX Sep Oct 2006 15 tors seen in commercial test instruments how ever Just to give you an idea of the type of accuracy one part in 10 represents an error of one hertz on a 10 GHz signal System Description Figure shows a block diagram of my GPS derived frequency standard The system operates a hardware firmware frequency locked loop FLL In essence the system com pares a local frequency source an external oscillator to a GPS derived reference It will adjust the local 10 MHz variable source to match the GPS derived 1 pps reference The 10 MHz source is kept aligned with respect the 1 Hz GPS reference on a real time basis by the firmware The resulting 10 MHz reference 1s fanned out frequency divided and provided to the user for high accuracy appli cations System control and monitoring are achieved using a bicolor LED and a serial port connected to a terminal PC Hardware Description Figure 2 shows the system circuit sche matic The main operation consists of count ing the number of rising edges produced by the 10 MHz voltage controll
4. a Web site where provide up dates to the project a detailed user manual source files and additional com ments Please visit www3 sympatico ca b zauhar for more details SLook for HP10544A HP10544 xxxxx HP 10811A or HP 1081 1 xxxxx Crystal Oscil lator units These units differ one from the other in their stability and tuning range but all of them should work in our application Expect to pay around 80 for a working unit when purchased on eBay GPS receivers that provide a 1 pps signal can commonly be found new on eBay for less than 50 These are OEM versions without display On such units settings are entered via a serial port S distribute high quality fully etched bare circuit boards for this project Please con tact me via e mail if you are interested in purchasing a circuit board am also mak ing the circuit board layout files available as PDF files on my Web site Printing them at a 1 1 scale will give accurate printouts The layout is made in such a way that component leads pass the signals from one layer to the other In the case of a hand made circuit board all component leads and wires should then be soldered on both sides of the board SFor those of you who cannot program Microchip PIC18F series microcontrollers make pre programmed PIC micro controllers available for purchase Please contact me via e mail for more details 7i use the carrier frequency of the 14 670 MHz CHU atomic time radio stati
5. fine DAC adjustments are required to achieve higher accuracy Figure 8 shows the measured system accu racy as a function of time for a 72 hour pe riod The reference I used for this comparison is Canada s CHU atomic time radio station The graph shows frequency accuracy as a func tion of time From the graph we can conclude that rubidium like accuracy can be reached but cannot be guaranteed This is due to several 20 Sep Oct 2006 DEX factors One of them is OCVCXO stability over time voltage temperature and vibration When shooting for atomic like accuracy the slight est disturbance on the VCXO will make it shift in frequency This is why I believe that it is difficult to obtain an accuracy better than the 10 range on OCVCXO based systems Conclusion Assuming a reasonably stuffed junkbox pessas eeaeeee Photo B This photo shows the GPS derived frequency standard connected to an HP frequency counter you will be able to assemble and own this high accuracy 10 MHz standard for less than 200 US including VCXO and GPS receiver This represents a tiny fraction of the cost of atomic based systems While using it you will also learn a lot about frequency accuracy stability and related measurement techniques You will no longer have doubts about your transmitted frequency or your frequency counter reading Notes 1B Shera W5OJM A GPS Based Fre quency Standard QST Jul 1998 p 37 2 maintain
6. produce an accurate analog dc voltage with 2 or 1024 steps over the range A DAC of 14 bit resolution is achieved by precisely controlling the duty cycle of the PWM output This translates to a tuning granularity of 6 x 10 Hz for a VCXO that has a 1 Hz tuning range Achieving a 14 bit DAC using a 10 bit PWM requires additional firmware processing The idea is to dither the pulse width within a 16 cycle window Those 16 cycles translate into an additional 4 bit resolution For example increasing the 14 bit DAC output by one step involves in creasing the 10 bit PWM output width by one increment on one of the 16 pulses Increas ing the DAC by two steps means increasing the 10 bit PWM output width by one incre ment on two of the 16 pulses and so on To add flexibility for interfacing with vari ous VCXOs the filtering stages have a supply bypass feature that allows you to feed the operational amplifiers with different upper and lower rail voltages This is done by reconfiguring JP2 and C17 Remember though that the maximum voltage difference between upper and lower rails must be kept to 12 V or less Another feature the second stage of low pass filtering allows for additional gain using R7 R8 if the VCXO operates on a larger tuning voltage range than the more standard 5 V range A 5 V offset can also be added to the second stage using jumper JP3 This pro vides support for VCXOs that have a 5 V to 5 V tuning range Ta
7. A Simplified G PS D erived Frequency Standard Here is a simple and modern approach to a 10 MHz frequency standard Bertrand Zauhar VE2ZAZ or many reasons an accurate frequency Pessass at an Amateur Radio station is desirable For weak signal operation such as EME moonbounce at microwave 242 Robert Martial St Gatineau Qu bec J9J 2V1 Canada ve2zaz amsat org Divide by 2 or 10 10 MHz 5 MHz 1 MHZ ey Output Drivers Outputs Printed Circuit Board QxX0609 Zauh01 frequencies you must be transmitting and lis tening exactly at the right frequency other wise the narrow receive filters used will make you miss that weak signal With such a setup a 10 MHz frequency reference feeds the fre quency synthesizer that generates the radio s operating frequency An accurate 10 MHz reference is also useful for test equipment adjustment With an accurate standard you 10 MHz VCXO 10 000 MHz Input Output Ports 10 000 MHz 1PPS Divide by 16 Prescaler 16 Bit Latch i 16 Bit Counter 0100101000100001 can put frequency counters and signal gen erators on track The advent of the Global Positioning Sys tem GPS has allowed a simplified approach to time and frequency accuracy Several com mercially available GPS receiving units pro vide a pulse per second pps signal This signal typically exhibits a short term accu racy of 1 microsecond 1 ppm or 1 x10
8. be achieved since long av 5 min Avg period Summing Mode Oncore GT GPS 10 12 14 16 18 20 Time hours Figure 7 DAC behavior during FLL frequency acquisition Table 2 Parts List Component Reference Description 0 1 uF 10 V or higher radial for some other ranges See text 1 x 3 Header 0 1 inch spacing One computer jumper required Piece of wire Selects upper operational amplifier rail See text Optional do not populate for a 0 5 V VCXO tuning range See text Microchip PIC18F2220 DIP 28 0 3 inch package programmed part 5 C1 C5 C9 C16 0 1 uF 10 V or higher radial C17 Piece of wire for a 0 5 V VCXO tuning range C6 C7 1 uF 10 V or higher radial C8 10 uF electrolytic 25 V or higher D1 Bicolor Green Red LED two leads D2 Green LED JP1 JP2 JP3 Piece of wire Adds 5 V offset See text R1 51 Q 1 4 W axial Optional See text R2 R6 47 KQ VW axial R3 R9 470 Q W axial R4 R5 100 KQ 1 4 W axial R7 R8 Piece of wire for a 0 5 V VCXO tuning range See text U1 Linear Technology LTC1485 DIP 8 package U2 74HC390 DIP 16 package U3 MC3487 DIP 16 package U4 U5 Texas Instruments OPA2705 DIP 8 package VR1 Sockets for U1 U5 U2 U3 U4 Heat sink for VR1 7805 Voltage Regulator TO 220 package IC Socket 8 pin 0 3 inch spacing low profile optional IC Socket 16 pin 0 3 inch spacing low profile optional IC Socket 28 pin 0 3 inch spacing low profile
9. ble 1 lists some of the possible configu rations on the filtering stages for various VCXO tuning ranges Finally the tuning slope sign can be set in firmware to accom modate both types of VCXOs Output References The system provides up to four 10 MHz reference signals In addition it provides up to two references with a selectable frequency of either 5 MHz or 1 MHz These sub rates are produced by U2 a synchronous counter The active sub rate is selected with an on board jumper JP1 All references are of 50 Q output impedance and provide an am plitude of greater than 1 V pk pk with a square wave shape These signals are pro vided by U3 a line driver chip When the firmware feature is enabled the reference outputs are inhibited if the FLL goes into its unlocked state That protection ensures that the user does not use a reference of unknown quality LED D2 provides an indication of the reference output state FLL Status LED The system provides basic FLL status and alarm conditions with a single bicolor LED D1 The LED control is designed to allow the user to learn about the current and past FLL status in a lapse of a single second Being a combined green red LED pair in a single pack age it can produce three colors green red and amber The latter is produced when both green and red LEDs are simultaneously on Addi tionally the LED unit will flash at a 1 Hz rate to provide a pps signal sanity check Serial Por
10. default parameter values will load A few parameters must be set by the user via user commands because different GPS receivers and different VCXOs require differ ent parameter values Parameters such as the number of samples taken before updating the VCXO frequency the number of samples al lowed while in holdover state and the tuning slope sign of the VCXO must be set A de tailed description of each of these parameters is included in the systems user manual avail able on my Web site see Note 2 The system FLL will start from the un locked state and will try to acquire frequency samples automatically VCXO frequency ad justments will be made at the end of each averaging cycle After a period that may span from minutes to hours the system will tran sition to locked state Once the system is set up and in locked state it should require little maintenance Every 16 seconds and under any circum stances the firmware sends a status string that provides detailed information on the FLL acquisition process and alarm condition An example of such status string is shown here LIUVIO1 FF6I IFI67FCIO1 20IFFFDIO07DIO3 The definition of each field in the status string is available in the system user manual The user will want to accelerate the initial acquisition process by manually tuning the FLL closer to the target DAC value that yields a GPS to oscillator lock This is achieved by zero beating the 10 MHz oscillator to another k
11. ed crystal oscil lator VCXO signal over a 16 s period 16 GPS pulses If the GPS and the VCXO are at the same frequency exactly 160 000 000 pulses will be counted 1 pulse inherent to counter technology Prior to entering the microcontroller the 10 MHz VCXO signal is buffered and am plified by U1 a receiver chip An optional input termination resistor R1 can be added if the VCXO s output circuit calls for one The buffered 10 MHz reference signal is fanned out to several locations on the board U4 the Microchip PIC18F2220 micro controller has a built in 16 bit counter incremented by an external source the VCXO The counter value is latched by an other external signal rising edge the GPS 1 pps signal in our application This process is totally autonomous and independent from firmware The microcontroller s task in this process is to analyze the results and adjust the VCXO frequency accordingly VCXO Frequency Control The Microchip PIC18F2220 microcon troller does not have an integrated digital to analog converter DAC To produce an adjustable voltage source to vary the VCXO frequency the built in 10 bit pulse width modulator PWM is used instead A continu ous rectangular wave output is produced by the PWM A downstream external 1 Hz two stage low pass filter USA USB and discrete com ponents is used to recover the average dc value of the PWM output By varying the duty cycle of the PWM it is possible to
12. es if the frequency averaging cycle has reached the specified number of samples If it has the DAC output is updated to reflect the required VCXO frequency change based on the calculated average fre quency Otherwise the firmware simply starts another sample acquisition Whenever the DAC output value is changed a 16 second pause is inserted to al low the VCXO to stabilize before the next frequency averaging cycle begins FLL States and Transitions Figure 5 illustrates the various states and transitions seen during FLL operation Under normal stabilized conditions the FLL will be in locked state with occasional transitions to holdover state to reject GPS receiver timing impairments The unlocked state is seen at sys tem startup or if the holdover state extends for too long Finally the disabled state is initiated by a user command and essentially disables the FLL In this mode the FLL merely main tains the last valid DAC voltage The current FLL state can be clearly iden tified in the FLL text string sent over the serial port every 16 seconds It can also be found by assessing the LED color green for locked amber for holdover red for unlocked and dis abled These colors indicate the relative reli ability level of the 10 MHz reference output Frequency Averaging Modes Two averaging modes are available to the user I named them summing mode and vot ing mode The summing mode is more ef fective when the frequenc
13. hat better accuracy on the 1 pps out put This did not materialize in better overall system accuracy during evaluation In fact the second to second jitter on the 1 pps QX0609 Zauh04 ae eeng FLL State VCXO Frequency Sa Update Acquisition Figure 4 FLL acquisition and control cycle signal happened to be greater than on the Garmin GPS 35 while still meeting the above specification This jitter gets averaged out though by the FLL since many fre quency samples are taken before making a VCXO frequency correction For better accuracy I recommend setting the GPS unit to fixed position position pinning mode In this mode the GPS firm ware assumes a fixed location This translates into a more accurate pps signal Consult the GPS unit documentation for more details on how to set the GPS unit to this mode Printed Circuit Board I designed a double sided circuit board to integrate the hardware Figure 3 shows a top view of the circuit board assembly Its dimen sions are 2 8 x 3 5 inches IC sockets are op tional but recommended This is especially applicable to the microcontroller A fine tip soldering iron should be used I am making the circuit board design files available to the public oe as _ a i j mii m p g z Ei ee a ba SER a a LERA 0 pr Ge TARNITI al PR 6 E E ET EUR p IR Ti m HE AL The user may elect to build the circuit
14. nics Engineering degree in 1989 from Ecole Polytechnique de Montr al Since then his professional engi neering career has been spent working for Nortel at the Montr al and Ottawa locations In his current position he is an electronics hardware design engineer on optical trans mission equipment T Cel ebra i ae ee ee u m o i Pe 23 ss 7 a oe a p ia a i i ao am eee Digal Canimin te 25 Years of Digital Innovation beauty and fun i a TAPR at 972 671 8277 to moke your reservations today all Fie Come to Tucson Arizona for the 2006 TAPR ARRL Digital Communications Conference September 15 17 at the Clarion Airport Hotel Join with your fellow hams to celebrate the 25th anniversary of the founding of Tucson Amateur Packet Radio the group that pioneered amateur digital innovation Learn about new digital modes see live demonstrations and share in the camaraderie that is unique to Amateur Radio Bring your family too Tucson is a desert oasis of tioms Conteremce site on the Web ol www topr org dee or coll DEX Sep Oct 2006 21
15. nown good reference The NIST WWV WWVH or NRC CHU shortwave radio sta tions are good sources to achieve this Once the system is stabilized the user can increase the averaging cycle duration The longer the sampling cycle the more accurate the frequency measurement will be A typical longer sampling cycle will last from one to four hours This means that the system will accu mulate frequency errors for this period before making a VCXO frequency change With a good and stable VCXO the averaging cycle can be made even longer This will improve system accuracy even further To make the man machine interface even more friendly I have created a Windows pro gram to monitor and control the system A snapshot of the software screen is shown in Figure 6 The compiled Windows software is available for download on my Web site Results Figure 7 shows an FLL acquisition phase The graph illustrates the VCXO DAC value as a function of time Initially the DAC value was intentionally set 0 1 Hz below the nomi nal value to highlight the acquisition process The averaging cycle was set relatively short at five minutes between DAC value updates The QX0609 Zauh07 DAC Value vs Time 8000 7500 DAC Value 7000 6500 6000 horizontal portion of the curve indicates that the system reached an equilibrium Under these conditions the system is considered to be sta bilized At this stage though ultimate accu racy may still not
16. ol of the fre quency acquisition and control processes without DIP switches e It has fewer components and does not re quire an external DAC or external input counter chips e Itruns off only one supply voltage 5 V dc excluding the VCXO supplies Tests have shown that this system consis tently produces a short term reference accu racy in the 1 x 10 range This is derived us ing standard automotive grade GPS receivers That range of accuracy does not rival cesium based references It is much better than most of the standard built in free running oscilla QX0609 Zauh02 C11 R1 Optional a 5 V JP1 Se 5 V F 5 V 0 1 See Note 1 1 55 MHz _2POSN U2 U3 gt pag Select 74HC390 MC3487 8 T Cie 16 16 C12 1 5 MHz 0 1 Outputs 10 MHz Lf 2A VCXO Input a U1 ae LTC1485 1 2EN 3 4EN GND gt C15 10 MHz 0 1 Outputs C16 5 V C4 5V 0 1 0 1 gt U4 R2 59 PIC18F 2220 47k VDD Green LED Uover Rail MCLR T1CKI Outputs On rhe C5 upply 0 1 T PGM RC1 TX CCP2 Wire Jumper U5A Serial RX RC3 R4 OPA2705 Port 100 k ay U5B gt CCP1 RC4 100k 0 1 OPA2705 a gt VCXO VSS1 VSS2 C6 Tuning 8 19 1 T Output ta FT T GPS R6 Input gt 47k Lower Rail Supply c17 FX R7 R8 Unless otherwise indicated Wire Leave Open Wire Jumper capacitors are of 10 V minimum rating resistors are of 1 4 W type Jumper 7 y JP3 ay Wire Jumper Note 1 Green Red LED aT mG hice Resistor R1 is used to properly terminate FLL Status 5
17. on for fre quency measurement purpose basically add zero beat a signal generator syn chronized off the GPS derived 10 MHz standard with the CHU signal into a short wave receiver From the duration between two signal nulls derive the frequency dif ference compute accuracy using the fol lowing formula Accuracy 1 T hull null 14 67 x 106 The National Research Council of Canada maintains three atomic clocks and the CHU carrier frequency is derived from them Carrier frequency ac curacy is guaranteed at 5 x 10712 or bet ter am fortunate to live about 15 km from the transmitters With such a small station to station distance the propagation mode is ground wave and most certainly surface wave Since surface wave propagation is very stable no phase distortion can consider the received CHU carrier fre quency and phase to be virtually as good as the 5x107 they guarantee at their an tenna and at least one order of magnitude better than the level of accuracy am trying to measure Bertrand Zauhar has been a radio amateur as VE2ZAZ since 1984 He holds an advanced amateur license Bertrand has designed for the hobby amongst other things an L band transmit converter Amsat Journal May June 2003 a 1 to 12 GHz fre quency counter prescaler a microprocessor based repeater controller several amateur satellite antennas and a RF sensing alarm 73 Amateur Radio May 1998 Bertrand received his Electro
18. stable and clean voltage supply to the board a separate 5 V dc fixed voltage regulator VR1 is used A heatsink is required on the regulator since the board could potentially draw close to 200 mA when all reference outputs are terminated This would make the voltage regulator excessively hot without a heatsink External VCXO System performance is set to a large de gree by the external 10 MHz VCXO selected for this design It is recommended that an oven controlled VCXO OCVCXO be used to provide better short term stability Good second hand Hewlett Packard OCVCXOs are readily available on eBay These should be your primary targets This project has been tested and proven with OCVCXOs that have a 1 Hz or a 10 Hz tuning range over their entire control volt age Different tuning slopes may require dif ferent firmware parameter settings to achieve optimum performance The user will want to experiment with these GPS Receiving Unit The GPS receiver used on this system must have a 1 pps TTL compatible output signal Accuracy of this signal will influence overall accuracy of the system Typical ac curacy seen on automotive grade units is in the order of 1 microsecond 1 x 10 s and this is satisfactory for our application This design has been tested with the Garmin GPS 35 and the Motorola Oncore GT GPS receivers Both meet the above mentioned accuracy The Motorola Oncore GT unit is actually specified as having a somew
19. t Since the FLL status LED only provides basic FLL status and alarm a serial port is also implemented The serial port provides com prehensive control and monitoring of the FLL and other firmware features When interfaced through a TTL to RS232 bidirectional con verter the serial port will connect to a personal computer RS 232 port Such a converter can be easily assembled using a couple of transis tors or can be made using Maxim s MAX23x series of conversion chips The Internet has several simple circuits documented It can also be purchased off the shelf The serial port is ASCII character based Table 1 Tuning Range Configuration VCXO Tuning Range R7 R8 C17 0 to 5V Leave Open Jumper wire Jumper wire Position A 0 to 8 V 100 k 62 k Jumper wire Position B 0 to 10 V 100 k 100 k Jumper wire Position B 5Vto 5V 100 k 100 k 0 1 uF Position A External positive supply required JP2 Upper Rail JP3 Offset Leave Open Position A Position A Position B This configuration is used with the HP 10544 10811 series OCVCXO s External 5 V supply required 16 Sep Oct 2006 DEX and provides standard status text strings that can be captured and analyzed by the user The serial port also interprets a series of user commands to control the FLL and other firm ware features Additional information on the text strings and user commands can be found on my Web site 5 V dc Voltage Regulator To guarantee a
20. us ing other techniques such as breadboard and point to point wiring The layout is not that critical Care should be taken in proper dc sup ply decoupling near the integrated circuits Firmware Description The firmware running on the PIC microcontroller was written in assembly lan guage It is well documented in the source file Both the firmware source code and the assembled hex code can be downloaded from my Web site Also see Note 2 Once as sembled the hex code takes about 3 kbytes of flash memory space FLL Acquisition and Control Cycle A simplified FLL acquisition and control cycle flow chart is shown in Figure 4 The pro cess starts from the left hand side and repeats indefinitely as long as the FLL is enabled The firmware samples the 10 MHz VCXO signal for a duration of 16 seconds Based on how close the sample is to the nominal frequency i CHO JS OeOb0d Fauho3 Figure 3 Circuit board pattern for the GPS derived frequency standard FLL Average End of VCXO in Locked Frequency Averaging Frequency eu ceens State Update Cycle Update abilization DEX Sep Oct 2006 17 it will update the FLL state If the sampled fre quency is within the specified limits the firm ware will add the sample to the average fre quency calculation Otherwise it will drop the sample and start another sample acquisition After updating the average frequency the firmware verifi
21. y averaging cycle is shorter for example five minutes This mode will be helpful in acquiring a lock at a faster pace The voting mode allows the de tection of a trend and is more effective when the frequency averaging cycle duration is large for example greater than 30 minutes This mode will be helpful with GPS units that put out a 1 pps signal with significant second to second jitter as the FLL does not care about the size of the frequency differ ence but merely the sign Tests have also shown that this mode yields the best accu racy The voting mode should be used in con junction with long frequency averaging cycles There are more details on how these modes operate in the user manual Operation At power up the system will display a start up prompt at the serial port including firmware version It will then reload the pre viously saved FLL parameter settings from 18 Sep Oct 2006 DEX Accumulated Frequency Difference within Locked Limit FLL Holdover QxX0609 Zauh05 Figure 5 FLL states and transitions diagram ee i mi j j ie j nee r ry re Feras TORE SE Jp lpm Fa E e tal bem Lm edt bee pretest ieg fF Figure 6 The Windows GPS Standard MontTrol software provided by the author Mi om a ET Ee er Poy Cig toy Tie ef Sede ia rT amuk mi Bs JEE data flash memory If the microcontroller is powered up for the first time after program ming
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