onproject Programmable analog
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1. gain of 4 processing a with a programmable corner frequency of 34 to 470 kHz THD N meas urements show congru ent l1 and 20 kHz plot 02 lines when the antialias ing filter is disengaged the blue and green plots in Figure 5 At 1 kHz 0 4 the THD N penalty is small for a 34 kHz input filter magenta but as signal components ap 1 proach the corner frequency the dis tortion products rise with signal amplitudes as small as 20 dBV red Fixed amplitude spec tral sweeps fill in the picture Figure 6 Compared with the baseline measure ment at 0 dBV with no antialiasing blue the THD N penalty is about 10 dB for adding a 400 kHz filter on the in put red Dropping the input to 6 dB reduces the THD N with the 400 kHz filter to the same relative level that the 0 dBV nonfiltered case gives magenta Note that the ver tical scale is decibels relative to input level With the input held at 6 dBV and the filter corner tuned down to 34 kHz the THD N level increases an other 5 dB or so and exhibits a rising characteristic as the signal approaches the corner frequency Considering these traits you should operate the 0 6 0 4 0 2 0 6 0 8 FOR MORE INFORMATION You can reach Technical Editor Joshua Israelsohn at 1 617 558 4427 fax 1 617 558 4470 e mail jisraelsohn edn com2. Configuring the FPAA from a laptop computer through the devel opment environment imposes a signal processing interruption of about 110 msec CAM cells at the fastest clock rates you can to push out the Nyquist frequency and reduce the need for close in filter corners Also use the input filter only af ter paying due consideration to your ex pected signal levels and bandwidths and consider a simple external filter if you need to accommodate high amplitudes with a low frequency corner The output cells also come with lowpass filters associated with their voltage output mode The cell cascades a pair of simi larly tuned single pole sections and is intended as a recon struction filter to remove switching artifacts Tuned to a relatively open 400 kHz they performed better following a simple inverting amplifier than did the raw output cell An in For more information on products such as those discussed in this article go to www edn com info and enter the reader service number When you contact any of the following manufacturers directly please let them know you read about their products in EDN Anadigm 1 408 879 6677 Www anadigm com Enter No 348 Enter No 351 Analog Devices 1 781 329 4700 www analog com Enter No 349 Enter No 352 Atmel 1 408 441 0311 www atmel com Enter No 350 Microchip Enter No 353 46 EDN JUNE 12 2003 Audio Precision 1 800 231 7350 Www audioprecision com www microchip com Z
3. Pour your own OST INDUSTRIES have their philosophical tugs of war and if only for sheer enter tainment value perhaps it is fortunate that ours has more than its share Throughout our industry s his tory and at nearly every turn engineers and technologists with strong convictions have alternatively touted the su periority of tubes or transistors discrete or integrated cir cuits reduced or complex processor instruction sets Har vard or von Neumann processor architectures CMOS or DIPOA Cir yet ts Omics Or Tune APO GORE si sstartrsversiions 39 A tional segmentation and certainly not least among these topics though broad they Finding the baseline 42 may be analog or digital circuits Though For more information 46 N the tensions have fueled many a lively con ference panel discussion taken by themselves these little battles often suffer the same conceptual defect They ar A gue an implementation technology ahead of the goal Such discussions are not however mere displays of op posing chauvinisms entirely devoid of value They help point out areas in which technologies overlap and in which engineers must choose between contending ap 0 proaches The choices are often tangled with trade offs between competing criteria and technologies that enjoy G at best orthogonal advantages Prioritizing the selection POURING ANALOG CIRCUIT DESCRIPTIONS THROUGH AN INTERFACE SOUNDS LIKE A VERSATILE WAY TO
4. high cur rent state With a regulated bench supply the board reliably achieved this high cur rent state every time I energized the sup ply as indicated by a sustainable 1 1A on the power supply s current monitor and a comparator that detects the undervolt age condition and drives a _ board mounted red LED indi cator The recommended way to deal with this ungraceful start up behavior is to pull the analog power jumper J5 before turn ing on the power supply and to fit the jumper back after the sup ply reaches regulation Although this work around might solve the problem on the bench it raises power supply management questions for your application www edn com et A A be 2 and displays the FPAA s time domain behavior as this simulation of a rudimentary class D modulator from Figure 2 shows Unfortunately the current version of the FPAA s data sheet is a preliminary draft lacking the spec tables so any insight you might hope to gain into the IC s start up behavior outside the context of the eval uation board will have to wait until Anadigm releases a complete data sheet Meanwhile you need to manage the dig ital and analog supply sequencing with in your application Also software revi sions notwithstanding until Anadigm more elegantly addresses this issue than having users pull and fit jumpers I have doubts about seeing a USB version of the evaluation board given USB
5. Because neither the screw terminals nor the banana jacks pro vide a mechanically polarized connec tion these power inputs connect to the rest of the board through a Schottky diode to prevent reverse polarity damage If your application cannot accommodate the 200 mV diode drop you can add a jumper that shunts the Schottky device The three power paths the output of the linear regulator the banana jacks and the screw terminals join at the Schott ky diode s cathode It is important there fore that you connect no more than one port at a time Also note that although the documentation states that the 5V regulated input is the default configuration the board I received had jumper J28 fitted Had I simply hooked up a 5V supply and flipped the switch I would have applied power to the output of the linear regulator while its input was at ground As an Anadigm field applica tion engineer confirms this condition could damage the 5V regulator so be sure that the jumpers are set for your power connection When the AN220D04 operates without a daughtercard its maximum supply cur rent is 350 mA except at turn on when a 1 2A peak current is typical This turn on surge is not as the board s data table suggests an inrush current The narrative portion of the manual warns that if the power supply current limit prevents the supply output from reaching 5V while satisfying the turn on current demand the board may power up in a
6. FORM FUNCTIONAL BLOCKS BUT BEFORE I HANG UP MY SOLDERING IRON I WANTED TO KNOW HOW WELL THEY WORK IN PRACTICE 38 EDN JUNE 12 2003 www edn com criteria evaluating the relative merits of de sign alternatives balancing the trade offs and optimizing a design for a set of goals are properly left as exercises each designer must work through in the context of an individ ual project guarding all the while against confusing the most familiar approach with the best one And as if that weren t enough the design world is rarely homogeneous more often than not it s a matter of one and the oth er not one or the other At minimum for example OEMs involved in ana log design commonly use shards of control logic in the form of inex pensive microcontrollers or thanks to mixed signal integra tion small cores or even homebrewed _ state machines More typically analog circuits serve as the physical interfaces for predominantly digital systems Reference 1 Rather than representing opposing disciplines as they are so often miscast the crafts of analog and digital design have act ed synergistically for decades witness the great success of mixed signal ASSPs ap plication specific standard products But despite significant strides in mixed signal design the analog discipline has not by and large evolved to include devices whose functions like digital devices are ei ther statically or sequentially determined by
7. limit the useful dynamic range for a given THD N criterion particularly if the signal bandwidth approaches the filter corner Here the 1 kHz green and 20 kHz blue plots taken with the antialiasing filters off are congruent The 1 kHz magenta and 20 kHz red plots taken with the filter corner set to 34 kHz show Ap Figure 6 band s last decade 5k 10k 20k 40k quadratic filter is tunable from 500 Hz to 400 kHz in three ranges corresponding to your selection from three available clock frequencies As you would expect of a bi quad you can select lowpass highpass bandpass and bandstop transfer func tions But unlike the biquads you make yourself from several op amps and a fist ful of resistors the biquad CAM provides only one of the four transfer functions at a time The tuning and Q controls are noninteractive but not surprisingly your choice of Q from 0 15 to 70 does lim it the gain range Figure 4 THE PLOTS THICKEN Some of the less common functions might hold the true power of an FPAA such as the multiplier or arbitrary peri odic waveform generator CAMs How ever to get a sense of how well the device works as a signal chain element I exam ined less exotic CAMs such as inverting degradation particularly with signals approaching the corner frequency Fixed amplitude spectral sweeps help fill in Figure 5 s message Here the blue plot shows a 0 dBV sweep without the antialiasing filter T
8. requiring two and three FPAAs 40 EDN JUNE 12 2003 Two chip applications route their analog signals through the daughterboard only bypassing the FPAA position on the main board The evaluation board also pro vides an extension connector for cascad ing multiple AN220D04 boards You can set up the board s analog in puts and outputs independently for ei ther balanced or unbalanced signals A differential input attaches either through a pair of SMA connectors or through a set of headers that provide direct access to all of the AN220E04 s pins Two sin gle ended signals can connect through the SMAs or through a standard s in TRS jack such as you commonly find on sound cards laptops and many con sumer audio products The AN220E04 FPAA s inputs are differential structures so the evaluation board provides a pair of Analog Devices AD8132 differential am plifiers to convert single ended input sig nals The input path also includes 500 terminations that you can connect or dis connect with jumpers J23 and J25 Be sure to check these jumpers as part of your initial setup Similarly the FPAA provides differen tial outputs that you can use directly again either through header pins or SMA connectors or through a pair of Analog Devices AD8130 differential receivers which provide single ended signals to the SMAs or another s in TRS jack The SMA connectors also provide the signal paths for cascaded boards The A
9. s 500 mA load limit UP AND RUNNING Despite the number of jumpers and connectors you need to consider while setting up the evaluation board for the first time the process takes remarkably little time or fuss It took less than an Se SE Ee Saye ee faz S a H Ea ns az se a The development environment s simulator provides virtual signal sources and probes The AnadigmDesigner2 graphical develop ment environment provides a basic drawing tool for configuring the evaluation board s FPAAs It also provides access to a simulator and support information on each of the analog array s programmable function blocks hour to load the software read through the evaluation board s manual locate and set the jumpers for my bench set up connect the control pow er and signal leads load a ba sic configuration and confirm the signal path Although con ceptually none of these tasks is a brain buster it s always grat ifying when a sophisticated product works the first time without a hitch The development environ ment gives a block diagram view of your circuit By mov ing the cursor over any func tional block you can confirm its identity and parametric settings Figure 2 Double clicking on the block opens a dialogue box wherein you can interactively modify the block s parametric behavior In addition to providing a graphical programming environment for the FPAA the development softwa
10. N220D04 s versatility extends to the evaluation board s control logic op tions as well In its default mode the board takes configuration data by way of an RS 232 serial link from your PC through the The AN220D04 which measures 4 5 X5 375 in includes a 1 9 sq in breadboard area and a host of jumpers connectors and pin headers forming a flexible development environment that s easy to use once you ve spent a few minutes with the map board s DB 9 connector The onboard 16 MHz oscillator provides the FPAA s analog clock A freestanding mode makes use of either an SPI EEPROM such as Atmel s AT25080 8 kbit device or an FPGA EEPROM such as Atmel s AT17C65 65 kbit chip In this mode the onboard clock drives the configuration process during the turn on sequence and provides the timebase for the ana log clock If yours is an embedded ap plication development you can direct ly drive the digital signals through the DIO digital I O ribbon connector Though the current software version does not support USB the board s USB capable microcontroller a Microchip PIC16C745 is wired to an unpopulat ed connector site Should Anadigm choose to include USB support in a future software revision you will need only to solder to a connector and plug in Though most of us are in the habit of hooking up a new piece of gear while the documentation is still in the shrink wrap this board offers so many options that I recomme
11. analog modules See Table 1 on the Web ver sion of this article at www edn com Consider a comparator The off the shelf part youre familiar with is an amplifier whose topology and parametric behav ior are appropriate for a nonlinear com parison response rather than linear am plification However your application circuit must provide the additional ele ments to set the reference potential and loop behavior including hysteresis The FPAA s comparator CAM includes these elements The CAM provides three programmable options for the inverting input You can refer the comparator s in verting input to any of your analog sig nals within the FPAA Alternatively you can program the CAM to refer the in inds onproject Programmable analog verting input to ground or to a dc po tential whose amplitude you specify as a CAM parameter For cases in which you would apply the threshold voltage to the comparator s noninverting input you can invert the output in lieu of revers ing the input connections Programma ble hysteresis levels include 0 10 20 and 40 mV The hysteresis function is avail able when you drive or ground the in verting input but not when you pro FINDING THE BASELINE Just looking at the antenna farm that surrounds the FPAA you can tell that the Anadigm AN220D04 evaluation board Is built to maxi mize its flexibility not to mini mize clock noise It s a reason able trade Low noise layouts are
12. ess The CMOS flatband and kT C terms are left Though could not numerically separate the two terms within the scope of this brief study comparisons with other CMOS products both dis crete and continuous time sug gest that the kT C noise likely dominates As the name makes clear this noise source Is linearly related to the reciprocal of the capacitance For a given process the capacitance Is linearly related to area as area is to cost The gains center frequencies and Q settings are managed by switch ing capacitor ratios so the CAMs tend to call upon a few elements from comparatively large capaci tor arrays naturally limiting the area usage for a given set of operating parameters The purpose of this exercise however is not to make conjec tures on the noise sources for sport but to try to come to an understanding about the range of applications that FPAAs as a category of component sult Historically high resolution applications such as profession al and high end consumer audio have implemented com plex signal processing functions either in continuous time analog circuits or in DSPs due to the kT C noise limit on discrete time switched capacitor analog designs Semiconductor process developments such as high k dielectrics could further extend switched cap techniques For the time being it appears that the technology suits a host of 14 bit applications such as sensor sig nal conditioning proce
13. etex Semiconductors 1 631 560 2222 www zetex com Enter No 354 Lattice Semiconductor 1 503 268 8000 www latticesemi com SUPER INFO NUMBER For more information on the products available from all of the vendors listed in this box enter no 355 at www edn com info 18 dBV swept sine wave produces essentially flat THD N plots over the 20 Hz to 40 kHz band Oper ating the output cell as a voltage output with a 400 kHz lowpass corner result ed ina 62 dBr THD N With the output cell in its raw configuration the per formance dropped to 52 dBr Further investigation of the output structure is certainly warranted should you choose to design with FPAAs to help identify the best operating conditions for your application The FPAA s configuration memory in cludes a shadow RAM that helps mini mize configuration time and thus the dis turbance to a signal chain that includes FPAAs Configuration changes may con stitute a complete change of the analog arrays internal resource allocation or simply cause a change in a single param eter Operating the board from a laptop computer s serial port a null configura tion change one in which the existing circuit and parameter set is simply re loaded to the part imposed an inter ruption of about 110 msec Figure 7 Applications that load configuration data from either an embedded processor or a co resident PROM can optimize the con figurat
14. evelopment package from Anadigm that I recently testdrove is a case in point The package which supports Anadigm s AN220E04 FPAA comes with an evaluation board AnadigmDesigner2 software a serial ca ble and documentation Among the doc umentation is a hard copy version of the 24 pg AN220D04 evaluation board user manual a must read that also appears with the AN220E04 user manual and the AnadigmDesigner2 user manual in elec tronic form on the CD ROM The AnadigmDesigner2 software itself con tains much information about the parts it supports and presents that information through a context sensitive help facility and help index similar to those that fa miliar Windows applications provide Notably to Anadigm s credit I was able to find answers to a greater proportion of my questions through the company s various software based help facilities and in less time that I ve experienced with office oriented software packages Though you could argue that Anadigm s application enjoys a more narrowly fo cused scope and is therefore easier to support I found the experience no less refreshing and from a productivity per spective no less important The AN220D04 evaluation board is festooned with jumpers connectors and pin headers a testament to its versatil ity Figure 1 The board facilitates nu merous signal configuration control clock and power options It includes a daughterboard connector for applica tions
15. he red plot shows the same input sweep with the antialiasing filter set to 400 kHz Reducing the input amplitude to 6 dBV and noting that the plot s amplitudes are relative to the input amplitude the magenta plot suggests that the filter s THD N degrades across the spectrum with inputs exceeding several hundred millivolts With the filter s corner tuned down to 34 kHz the 6 dBV sweep shows a sharply increasing THD N trend in the pass amplifiers biquadratic filter blocks and basic I O cells Most of this investigation employed an Audio Precision System Two Cascade dual domain analyzer for frequency response noise and THD plots The evaluation board is clearly de signed to maximize your access to the various facilities it offers It is therefore not optimized for minimum clock noise see sidebar Finding the baseline Though some care may be necessary when developing applications that make full use of the FPAA s bandwidth which extends to about 8 MHz the board should serve as a good development en vironment with little practical interfer ence from clock artifacts for lower bandwidth circuits The FPAA s data sheet limit on differ ential input signal swings is 3 8V Be care ful however if you are going to run your signals at or near the swing limit For ex www edn com ample the input cell pro verting amplifier with a vides an antialiasing filter
16. ion process to further reduce the load time O REFERENCES 1 Israelsohn Joshua Click picks EDN May 1 2003 pg 67 2 Schweber Bill Programmable ana log ICs designer s delight or dilemma EDN April 23 2000 pg 72 3 Marsh David Programmable ana logue ICs challenge spice and bread board designs EDN Europe October 2001 pg 30 ACKNOWLEDGMENTS Thanks to Anadigm field application en gineer Troy Giles for clarifications Thanks to Bob Adams of Analog Devices for the generous use of lab facilities including the AP system 2 Thanks to Audio Precision for making that rare combination a first rate analyzer that s a genuine pleasure to drive www edn com
17. nd perusing the user manual and familiarizing yourself with the jumper s functions locations and initial states before powering the product Anadigm provides a full set of board schematics at the end of the book that helped confirm my understanding of the board s architecture Unfortunately those schematics are small and you may find yourself tempted as I was to reach for a magnifying glass or low power micro scope Thanks to Adobe Acrobat s zoom and image rotation capabilities the PDF version of the manual on the CD ROM rectifies the problem Thus with the eval uation board on the lab bench the schematics on my laptop s display and the hard copy manual in my hand open to the introductory narrative I was able to familiarize myself with the board s func tions and settings in just a few minutes Most critical to review are the power supply settings and turn on behavior You can provide power from either regulated 5V or unregulated 9V supplies The 9V power port is a 2 1 mm jack that mates with common wall wart supplies You can use an unregulated supply as long as its output voltage is bounded by the board s absolute ratings of 8 and 12V minimum and maximum respectively The 9V pow er port feeds a 5V linear regulator that drives the rest of the board through a jumper J28 which you must remove if www edn com you are going to provide regulated 5V di rectly to either the banana jacks or the screw terminals
18. peculiar to their applications and tend to make many nodes diffi cult to probe By contrast as a general purpose tool the evalua tion board must support a host of external connections for appli cation circuit topologies limited only by your imagination a lay out goal that is not generally sonorous with low noise opti mization But what overall noise performance you can expect from the FPAA outside the con text of the evaluation board is a question that remains unan 70 72 74 76 78 dBV 80 82 84 86 88 90 swered by the FPAA s preliminary data sheet for anyone seriously considering the part A bit of accounting suggests that you directly can observe the FPAAs baseline noise The board s noise terms group into four categories Clock artifacts the noise elements most dependent on the pc board lay out couple capacitively by radi ation or by conduction through the power and ground systems The resulting signal disturbances should appear as spectral lines on a noise plot at the clock rates 16 8 4 and 0 25 MHz and at their harmonics Because the board uses a 16 MHz time base from which the FPAA derives the other rates it would be reasonable to expect that the P The low frequency noise plot blue suggests that kT C noise dominates It also indicates that noise can infiltrate the development environment through the serial port when connected to a computer wi
19. pice tool There is also no way to include components exter nal to the FPAA in its simulation This situa tion is similar to that which exists in many of the more sophisticated power ICs and ASSPs whose manufacturers provide limited but useful design support software gt The ugly Not much really The antialias ing filter on the FPAA s input cells can in crease distortion when set near the low fre quency extreme of its tuning range partic ularly with large amplitude signals Don t ex pect 16 bit noise performance from a 12 to 14 bit product Be careful to read the evalua tion board s manual before you apply pow er to the board JUNE 12 2003 EDN 39 i a beands onproject Programmable analog o o o SoSo o Only a few companies most no tably Zetex Lattice Semiconductor and Anadigm offer topological pro grammability within analog ICs references 2 and 3 These devices provide programmable connectivi ty as well as parametric control of analog signal processing resources and their manufacturers often compare them with FPGAs indeed Anadigm refers to its device as an FPAA field programmable analog array JUMP ER ING IN Though topologically program mable analog ICs are relatively im mature from a market acceptance perspective their manufacturers are demonstrating an increasingly so phisticated understanding of the market needs The evaluation d
20. programming not by wiring Analog IC manufacturers have used the term programmable in a variety of ways mostly in place of adjustable In such cas es the term is often adjacent to a qualifier such as pin or resistor Thus program mable gain amplifiers allow you to set the closed loop gain with a fixed resistor con tinuously variable resistor or a network of fixed resistors and switches A number of analog IC manufacturers sell op amps that are bias current programmable with re spect to gain bandwidth product slew rate and power dissipation Others offer digital ly programmable potentiometers and other R DAC based cells whose behaviors vary by a digital word acting most often on a single parameter These fixed functions though in deed useful do not offer the sort of func tional programmability you think of when you consider digital constructs any more ad vanced than simple combinatorial logic www edn com ig AT A GLANCE The good You can be up and running in no time The interface is suitably intuitive and the development tool includes a rudi mentary simulator that can speed circuit de sign The parametric ranges for most cells are impressive and reprogramming either individual parameters or the entire topolo gy on the fly is quick and easy gt The bad There is no apparent way to simulate the product on or to export simu lation data to a standard S
21. re al lows you to connect virtual signal sources and probes to drive the built in simula tion tool Figure 3 The drawing and simulation tools are simple to operate and arranged to make intuitive sense to anyone who has used schematic capture and Spice software Keep in mind how ever that for the entry price of a couple of hundred dollars you are getting a ba sic tool without many of the bells whis tles and functions that come with the five figures per seat EDA suites So for example Anadigm s simulator gives you some insight into the part s behavior in the time domain but for almost every thing else plan on learning about the part s behavior by examining real signals running through the evaluation board No apparent hooks allow you to export simulations or behavioral models to your own Spice environment and no means exist for the native tool to incorporate any external components This limitation is similar to that which you find with power ICs and ASSPs whose manufac turers provide limited support software but no means to connect to the rest of your EDA environment BUILDING BLOCKS FPAAs will take analog designers some getting used to Rather than combining diodes transistors and passives with functional blocks such as op amps and JUNE 12 2003 EDN 4l comparators the FPAA environment is entirely populated by more highly ab stracted functional blocks that Anadigm refers to as CAMs configurable
22. ss control and medical applications www edn com 20 50 100 200 500 1k 2k cyan 5 blue and 20 magenta 10 20 30 dBr A 40 50 60 70 80 90 20 50 100 200 500 1k 2k Hz gram the threshold voltage Like most FPAA CAMs the compara tor is a synchronous discrete time block You can program the comparator to sam ple its inputs on either the first or the second clock phase a concept that sim ply doesn t apply to continuous time comparators The comparator makes its decision on the following clock phase but the decision may not cause an im mediate change in the comparator s out put state You can program the output to either follow the decision as soon as it is available or force it to synchronize the state transition with either the first or the second clock phase Comparators and amplifiers are the simplest CAMs with close analogies in the world of discrete ICs Also common in the CAM list are functions that offer a higher level of abstraction moving you somewhat further away from the imple mentation details One example the bi 44 EDN JUNE 12 2003 The biquadratic filter CAM allows you to program the corner frequency gain and Q The bandpass filter plots correspond to an 8 kHz corner frequency at Qs of 0 2 green 1 dBr 5k 10k 20k 40k 60 50 40 30 20 10 0 dBV THD N plots suggest that the input cell s antialias ing filters can
23. th a noisy power supply as is common with laptops red Solution Run the laptop from batteries or disconnect the serial port when not configuring the FPAA 42 EDN JUNE 12 2003 corresponding spectral line would dominate the clock relat ed noise The spectrum of inter est for this study however extended to only about 40 kHz so the noise plot does not con tain clock related spurs Figure A The differential amplifiers at the FPAA s inputs and the differ ential receivers at the FPAA s outputs contribute flatband noise but their contribution cal culable from their data sheets is minuscule compared with the noise plot s amplitude Likewise resistors on the signal path con tribute Johnson noise e VA4kTRA where e is the resistor s noise voltage k is Boltzmann s con stant T is the temperature in Kelvin R is the resistance and A is the measurement band width But in this case the resistances are so small that their contribution is smaller than that of the amplifiers The fourth item is the FPAA noise which comprises the active devices flatband noise the active devices 1 f noise and kT C noise from the switched capacitors CMOS processes tend to exhibit 1 f corners near 10 kHz As the noise plot shows there is no sign of increasing noise with decreasing frequency suggest ing that the 1 f component is comparatively small or well sup pressed by the discrete time sig nal processing proc
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