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R-IN32M3ーCL User`s Manual

1. a a a a o a 6 a a a a a a RW R W R W R W R W R W R W RW R W R W R W RAW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W RW RW RW 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 Address 400A 3400H Initial value RPOW alaileso mu 0000 0000H N CN a f 0 CE R W RIM RN RW R W R W R W 31 to 0 Pmn RPIn Set the value of the output latch when the port is used in output mode If read the value of the output latch is read Figure 7 4 Port registers in 32 bit notation Remark 0103 0107 01 07 R18UZ0005EJ0202 Page 54 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 3 2 Port mode registers PM RPM These registers are used to set a port to input or output mode Address Initial 7 6 5 4 3 2 1 0 value PMOB 7 PM06 PM05 PM04 PM03 PM02 PM01 PM00 400A 3010H FFH PM1B PM17 PM16 PM15 PM14 PM13 PM12 PM11 PM10 400A 3011H FFH PM2B PM27 PM26 PM25 PM24 PM23 PM22 PM21 PM20 400A 3012H FFH PM3B PM37 PM36 PM35 PM34 PM33 PM32 PM31 PM30 400A 3013H FFH PM4B PM47 PM46 PM45 PM44 PM43 PM42 PM41 PM40 400A 3014H FFH PM5B PM57 PM56 PM55 PM54 PM53 PM52 PM51 PM50 400A 3015H FFH PM6B PM67 PM66 PM65 PM64 PM63 PM62 PM61 PM60 400A 3016H FFH
2. PMC 400A 3024H 57 56 55 54 53 52 51 50 47 46 45 44 43 42 41 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PMC6H PMC PMC 400 3026 77 76 75 74 7 72 71 70 67 66 65 64 63 62 61 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Rw Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPMCOH RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RPMC2H RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM C36 C35 C34 cas C32 C31 C30 C27 C26 C25 C24 C23 C22 20 4004 3422H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 15100 PMCmn Specify whether to use the port as a port or for its alternate function RPMCIn 0 Port mode The Inactive level is input to the input pin of the alternate function 1 Alternate function control mode Figure 7 9 Port mode control registers in 16 bit notation Note The initial value depends on the pin status For d
3. NIN Im TIT Tm O O O O O O gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt EA 2 ER ER ER ER le le eel RW R W R W R W R W R W R W R W R W R W RAW R W R W RAW R W R W RAW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 4 0 Address 400A 3014H Initial value PM4W LO IO tO tO sr f E SE SE o o n n a n a a R W R W R W R W RW R W RW R W R W R W R W R W R W R W R W 27 26 25 24 23 22 21 20 19 18 17 16 Address 400A 3410H Initial value 0 GSA S S S NIS IN AS FFFF FFFFH gt 22 22 5215512515515 a a a a a a a a a a CC CC R W R W RAV RAV RAV R W RAV RAV R W RAV R W R W R W R W R W R W R W R W R W R W R W R W R W
4. 31 to 0 PMmn RPMIn Set the port to input or output mode 0 Output mode output buffer is on 1 Input mode output buffer is off initial value Figure 7 7 Port mode registers in 32 bit notation Remark 0103 0 7 0 7 R18UZ0005EJ0202 Page 57 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 3 3 Port mode control register PMC RPMC These registers are used to select whether to use a port as a port or for its alternate function Address Initial 7 6 5 4 3 2 1 0 value PMCOB PMCO7 06 05 04 PMC02 PMCO1 400A 3020H 00H PMC1B PMC17 PMC16 PMC15 PMC14 PMC13 12 11 PMC10 400A 3021H PMC2B PMC27 PMC26 PMC25 PMC24 PMC23 PMC22 PMC21 PMC20 400A 3022H 0oH PMC37 PMC36 PMC35 PMC34 PMC33 PMC32 PMC31 PMC30 400A 3023H PMC4B 47 PMC46 45 44 PMC43 PMC42 PMC41 PMC40 400A 3024H 00H PMC5B PMC57 PMC56 PMC55 PMC54 PMC53 PMC52 PMC51 PMC50 400A 3025H OOH PMC6B PMC67 PMC66 PMC65 PMC64 PMC63 PMC62 PMC61 PMC60 400A 3026H 0oH PMC7B PMC77 PMC76 PMC75 PMC74 PMC73 PMC72 PMC71 PMC70 400A 3027H 00H RPMCOB RPMCO7 06 RPMCO5 4 RPMCO2 RPMCO1 RPMCOO 400A 3420H RPMC1B RPMC17 RPMC16 RPMC15 RPMC14 RPMC13 12 RPMC11 RPMC10 400A 3421H 00H RPMC2B 27 RPMC26 RPMC25 RPMC24 RPMC23 RPMC
5. 3 6 Register name Symbol Address Port function control expansion register 0 8 bits 400 3040 Port function control expansion register 1 8 bits PFCE1B 400A 3041H Port function control expansion register 2 8 bits PFCE2B 400A 3042H Port function control expansion register 3 8 bits PFCESB 400A 3043H Port function control expansion register 4 8 bits PFCE4B 400A 3044H Port function control expansion register 5 8 bits PFCE5B 400A 3045H Port function control expansion register 6 8 bits PFCE6B 400A 3046H Port function control expansion register 7 8 bits PFCE7B 400A 304 7H 16 bits PFCEOH 400A 3040H 16 bits PFCE2H 400A 3042H 16 bits PFCE4H 400A 3044H 16 bits PFCE6H 400A 3046H 32 bits PFCEOW 400A 3040H 32 bits PFCEAW 400A 3044H Port pin input register O 8 bits PINOB 400A 3050H Port pin input register 1 8 bits 400A 3051H 400A 3052H Port pin input register 3 8 bits 400A 3053H Port pin input register 4 8 bits 400A 3054H Port function control expansion register 0 Port function control expansion register 2 Port function control expansion register 4 Port function control expansion register 6 Port function control expansion register 0 ala fr fr fr fn lha fn la lha lhala Port function control expansion register 4 Port pin input register 2 8 bits Port pin input register 5 8 bits 400A 3055H 400A 3056H Port pin input register 7 8 bits 400A 3057H
6. Remark 71 00 R18UZ0005EJ0202 Page 76 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 3 Port 2 Buffer function change register DRCTLP2L DRCTLP2H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address BASE 0230H ala NIN DRCTLP2L a o iti 0 0 0 0 0 0 515 Slo Initial value ag Q 0000 9999H RAN 0 0 0 0 0 0 0 0 O 0 0 0 0 O O 0RWRW O 1 RWRW O 1 RAW R W R W R W R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 41 10 9 8 7 6 5 4 3 2 1 O Address BASE 0234H DRCTLP2H SS a iti 0 0 010 SS o 1 6 S SBS 88 1 Initial value 212 2121010121210 ea a 0000 9999 RAN 0 0 0 0 0 0 O O O O O O O O 0 0RWRW O 1 RM RW R W R W R W R W R W R W R W RW O 1 Bit position Bit name Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIOP1n Specify whether to connect a pull up or pull down resistor to the P27 to P20 pins PDIOP1n Connection of a pull up or pull down resistor PUIO PDIO to the P27 to P20 pins r Sl Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLP2n1 Specify the driving capability of the P26 to P24 and P21 and P20 pins IOLP2nO IOL1 IOLO Driving capability of P26 to P24 and P21 and P20 p
7. register must be setto 1 Remark 0103 0 7 0 7 R18UZ0005EJ0202 Page 63 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 3 5 Port function control expansion registers RPFCE These registers are used to specify which alternate expansion function is used These registers can be set in 1 bit units Address Initial 7 6 5 4 3 2 1 0 value PFCEO7 PFCEO6 PFCEO5 04 2 0 400 3040H PFCE1B 0 0 0 0 PFCE13 PFCE12 1 1 400A 3041H PFCE2B 0 26 PFCE25 24 PFCE23 PFCE22 PFCE21 PFCE20 400A3042H PFCE3B PFCE37 PFCE36 PFCE35 PFCE34 PFCE33 PFCE32 0 0 400A 3043H PFCE4B 0 0 0 0 0 PFCE42 0 0 400A 3044H 57 56 0 54 PFCE53 52 51 PFCE50 400A3045H 00H PFCE6B 0 PFCE66 PFCE65 64 PFCE63 PFCE62 0 0 400A 3046H PFCE7B 77 76 PFCE75 74 PFCE73 PFCE72 71 PFCE7O 400A 3047H 00H RPFCEOB 0 0 RPFCEO5 RPFCE04 RPFCE02 RPFCEO1 400A 3440H 999 RPFCE1B 0 0 0 0 0 0 0 0 400A 3441H 00H RPFCE2B 0 0 0 0 0 0 0 0 400A 3442H 00H 0 0 0 0 0 0 0 0 400A 3443H 00H Bit position Function 7100 PFCEmn Specify whether to use alternate functions 1 and 2
8. INTPZ16 SCL1 CCM SDLEDZ Hi Z CCS SDLEDZ With internal pull up RP01 INTPZ17 SDA1 CCM SMSTZ resistor 2 INTPZ18 CCS BS1 RPO3 INTPZ19 CCS_BS2 04 INTPZ20 CCS_BS4 RP05 INTPZ21 5_ 58 RP06 WRZ2 BENZ2 HWRZ2 HBENZ2 RP07 WRZ3 BENZ3 HWRZ3 HBENZ3 RP1 RP10 D24 HD24 Hi Z RP11 D25 HD25 With internal pull up RP12 D26 HD26 resistor RP13 D27 HD27 RP14 D28 HD28 15 029 29 RP16 D30 HD30 RP17 D31 HD31 RP2 20 BCYSTZ ADVZ HBCYSTZ Hi Z With internal pull up resistor 21 A21 Hi Z RP22 A22 With internal pull down RP23 A23 resistor RP24 A24 INTPZ25 25 25 INTPZ26 26 26 INTPZ27 RP27 A27 INTPZ28 D16 HD16 Hi Z RP31 D17 HD17 With internal pull up RP32 D18 HD18 resistor RP33 D19 HD19 RP34 D20 HD20 RP35 D21 HD21 RP36 D22 HD22 7 023 23 R18UZ0005EJ0202 Dec 25 2014 Page 13 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 5 Serial Flash ROM Interface Signals The Serial Flash ROM Interface supports Fast Read Fast Read Dual Output and Fast Read Dual I O mode Pin Name Function Shared Port Active Level during reset amp Level after reset SMSCK Serial clock output
9. Ethernet 0 Transmit enable port High Low ETHO TXER Ethernet 0 Transmit error port High Low ETHO TXDO Ethernet 0 Transmit data port Low ETHO TXD7 ETHO GE INT 1 Ethernet 0 PHY interrupt port High Low Ethernet 0 Receive clock port 1 RXDV Ethernet 0 Receive enable port High ETHO RXER Ethernet 0 Receive error port High RXDO Ethernet 0 Receive data port ETHO RXD7 ETHO CRS Ethernet 0 Carrier sense port High ETHO COL Ethernet 0 Collision port High ETH1 TXC Ethernet 1 10M 100M Transmit clock port 1 2 5MHz 25MHz ETH1_GTXC Ethernet 1 1G Transmit clock port 125MHz ETH1 TXEN Ethernet 1 Transmit enable port High Low ETH1 TXER Ethernet 1 Transmit error port High Low ETH1 TXDO O Ethernet 1 Transmit data port ETH1_TXD7 ETH1 GE INT ETH1 RXC ETH1 RXDV Ethernet 1 Receive enable port High ETH1 RXDO Ethernet 1 Receive data port ETH1 RXD7 ETH1 CRS Ethernet 1 Carrier sense port ETH1 COL Ethernet 1 Collision port Ethernet 1 PHY interrupt port High Low Ethernet 1 Receive clock port 1 _ Ethernet Serial management interface clock ETH MDIO Ethernet Serial management interface data input output Note Out put the 125MHz clock R18UZ0005EJ0202 Page 6 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 Other Signals Pin Name 1 0 Function Sh
10. Dem Te Te De SSS RW RW RW RW RW RW Initial value 0000H 14 o 10 4 0 Address 0000000000000006 Ma Initial value 0000H Bit poston PFCEmn Specify whether to use alternate functions 1 and 2 or alternate functions 3 and 4 Note 2 Note 3 RPFCEIn 0 Alternate function 1 Alternate function 2 1 Alternate function 3 2 Alternate function 47793 Figure 7 14 Port function control expansion registers in 16 bit notation Notes 1 The initial value depends on the status For details see 2 2 Port status 2 Touse alternate function 1 or 3 the bit corresponding to the function in the PFC RPFC register must be set to 0 3 Touse alternate function 2 or 4 the bit corresponding to the function in the PFC RPFC register must be set to 1 Remark 0103 0107 0107 R18UZ0005EJ0202 Page 65 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3040H Initial value PFCEOW 0 st 0 OE u 0000 0000H LL LL LL LL LL R W RIWR WR WR WR WR NW 0 0 0 0 0 0RWRW 1 1 R WR WR WR WR WR W RW 31 30 29 28 27 26 25 24 23 2 13 1211109 8 765 4 3 1 0 Address I 400 3044
11. 2 Notation of Numbers and Symbols Weight in data notation Left is high order column right is low order column Active low notation XXXZ capital letter Z after pin name or signal xxx N capital letter N after pin name or signal name or xxnx pin name or signal name contains small letter n Note explanation of Note in the text Caution Item deserving extra attention Remark Supplementary explanation to the text Numeric notation Binary xxxx xxxxB or n bxxxx n bits Decimal xxxx Hexadecimal gt lt xxxxH or n hxxxx n bits Prefixes representing powers of 2 address space memory capacity kilo 2 1024 M mega 2 1024 giga 2 10243 Data Type Word 32 bits Halfword gt lt 16 bits Byte 8 bits la 2 Contents nite Gne reete tpm a iu id ee d cold td 1 1 1 linis iure 1 1 2 COV OL VIE Wa 2 1 3 INTERNAL BLOCK DIAGRAM nent gn ERE 4 1 4 Pin Placement Top VIEW un onere ee eed na et ne doeet 3 Signals by s reo err om ro pon mon p mn mo eir ee En 6 2 1 Signals by fUNCHON aqaaqasyayak TEETE 6 2 1 1 Ethernet Signals 35234 nien ks Shh enema 6 2 1 2 External Memory Interface Signals 8 2 1 3 External MCU Interface sse enne tenerent 9 2 1 4 Port Signal Real time port 12 5
12. 10 2 1 5 Serial Flash ROM Interface Signals 14 2 1 6 DM A Interface Signals noie USO tom Soe nee get ot PARDO gestis 14 2 1 7 External Interrupt Input Signals coget heteet eet ento 15 2 1 8 Limerl OSienals ss dien edendi 15 2 1 9 Watchdog Timer Output Signal nennen nono nn nr arc tenete 15 2 1 10 Trace M 16 2 1 11 CPU Power Control Signal eiit there Ep 16 2 1 12 Serial Interface Signals sessir enini e Dente DR a pie er D BEER e 16 2 1 13 CC Link IE Field Signals Intelligent device station n nennen 17 2 1 14 CC Link Signals Intelligent device station nennen 18 2 1 15 CC Link Signals Remote device station 19 2 1 16 System PE 20 2 1 17 Test Sionainne ties a e 21 2 1 18 Operation mode Setting 510 5 eee tete esie erp 21 2 2 Port Status caso oi ge RERO DU CRUS Ada 22 2 3 Operation mode monitor functions esee 23 2 4 Buffer function conversion 23 25 Buffer Types and Recommended Connections for Unused Pins 24 2 5 1 Ethernet Signals sua ie ss eks dic iii 24 2 5 2 External MCU Inter
13. Oadn vid ar a ZIdH TId SEdH tedu sedu ved Scd zedu vZdH sedu TOWL sta cedu 0d zia Z NL WOO ZuNOd pas sa va sa 9a Do JOH smon 21959 BEEN sa OZ sv av 454 lt Sbd ZHISUM ev IN SIV od vel IDvAL ZIINN 15 19d tid 0250 ev 9v VIV ozvy ESd tad ZSd 99d 9 94d Lid vd MDsSna mM Sv ev Liv A n l d d N N 1 H E 3 q V OL dk eL vi Gl 91 ZL 81 Page 5 of 89 R18UZ0005EJ0202 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 Signals by function 2 1 Signals by function 2 1 1 Ethernet Signals 1 PHY Interface Pin Name 1 0 Function Active Level during reset amp Level after reset ETHO_TXC Ethernet 0 10M 100M Transmit clock port T 2 5MHz 25MHz GTXC Ethernet 0 1G Transmit clock port 125MHz f
14. Remark 71 00 R18UZ0005EJ0202 Dec 25 2014 Page 86 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 6 Operation of port functions The port operation differs depending on the mode setting as shown below 7 6 1 Reading and writing ports 1 In output mode If a value is written to port register n Pn or RPn the value is written to that port s output latch Pn or RPn The value of the output latch is output from the pin The value written to the output latch is held until another value is written The value of the output latch Pn or RPn can be read by reading port register n Pn or RPn To directly read the pin level read port pin input register n PINn or RPINn 2 In input mode If a value is written to port register n Pn or RPn the value is written to that port s output latch Pn or RPn However the pin status does not change because the output buffer is off The value written to the output latch is held until another value is written To read the input level read port pin input register n PINn or RPINn 7 6 2 Alternate function pin output status in control mode The port pin level can be read directly by reading port pin input register n PINn or RPINn regardless of the settings in the PMCn PMn PFCn and PFCEn registers R18UZ0005EJ0202 Page 87 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 7 Trigger synchronous ports to RP
15. 5 input mode INTPZ21 CCS BS8 6 RP06 output mode RP06 input mode WRZ2 HWRZ2 7 RP07 output mode RP07 input mode WRZ3 HWRZ3 RP10 RP10 output mode RP10 input mode D24 HD24 11 RP11 output mode RP11 input mode D25 HD25 12 RP12 output mode RP12 input mode D26 HD26 RP13 RP13 output mode RP13 input mode D27 HD27 i RP14 RP14 output mode RP14 input mode D28 HD28 15 RP15 output mode RP15 input mode D29 HD29 z 16 RP16 output mode RP16 input mode D30 HD30 RP17 RP17 output mode RP17 input mode D31 HD31 20 RP20 output mode RP20 input mode BCYSTZ HBCYSTZ RP21 RP21 output mode RP21 input mode A21 22 RP22 output mode RP22 input mode A22 RP23 RP23 output mode RP23 input mode A23 RP24 RP24 output mode RP24 input mode A24 INTPZ25 RP25 RP25 output mode RP25 input mode A25 INTPZ26 26 RP26 output mode RP26 input mode A26 INTPZ27 27 RP27 output mode 27 input mode A27 INTPZ28 RP30 output mode input mode D16 HD16 1 RP31 output mode RP31 input mode D17 HD17 RP32 RP32 output mode 2 input mode D18 HD18 RP33 RP33 output mode RP33 input mode D19 HD19 RP34 RP34 output mode RP34 input mode D20 HD20 5 RP35 output mode 5 input
16. 0016 Delay time M WAITDLY2 0 e 000b lt Delay tim PAN V V Sampling timing of data Figure 6 1 Data sampling timing example R18UZ0005EJ0202 Page 41 of 89 Dec 25 2014 R IN32M3 CL User s Manual 6 SBCC Link IE Field Intelligent device station Function 6 1 3 CC Link IE Field Intelligent device station bus size control register CIEBSC CIEBSC register set the data bus width to access CC Link IE Field Intelligent device station core This register must be fixed to 0000 5555H in case of using CC Link IE Field Intelligent device station e Access This register can be read written in 32 bit units 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 4004H CCBSC Initial Value 0000 5555H RW 000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Bit position Function This register must fixed to 0000 5555H 6 1 4 CC Link IE Field Intelligent device station bus bridge control register CIESMC CIESMC register controls to access This register must be fixed to 0000 1151H in case of using CC Link IE Field Intelligent device station e Access This register can be read written in 3
17. 62 Port function control expansion registers in 8 bit notation essere 64 Port function control expansion registers in 16 bit notation 65 Port function control expansion registers in 32 bit 66 Port pin input registers in 8 bit notation n 67 Port pin input registers in 16 bit notation 68 Configuration of Trigger Synchronous eene enne 88 Comtents 4 Contents of tables Table2 1 Operation mode setting signals that can be confirmed 23 Table4 1 interrupt list ica 34 Table 6 1 CC Link IE Field outline specifications eene nennen trennen nennen 39 Table 6 2 CC Link IE Field Intelligent device station control registers overview 39 Comtents 5 24 NE SAS R18UZ0005EJ0202 R IN32M3 CL User s Manual Dec 25 2014 1 Overview 1 1 Introduction Ethernet communication continues to spread rapidly in the field of industrial automation as manufacturers seek to improve the capability efficiency and flexibility of their organizations Modern Industrial Ethernet applications require high speed real time response low power consumption and high performance These requirements are not necessarily met by traditional methods such as hard wired Ethernet processors or dedicated high speed CPUs Renesas R IN3
18. Memo C 3 R IN32M3 Series User s Manual R IN32M3 CL 5 5 SALES OFFICES Renesas Electronics Corporation http Avww renesas com Renesas Electronics America Inc 2880 Scott Boulevard Santa Clara CA 95050 2554 U S A Tel 1 408 588 6000 Fax 1 408 588 6130 Renesas Electronics Canada Limited 1101 Nicholson Road Newmarket Ontario L3Y 9C3 Canada Tel 1 905 898 5441 Fax 1 905 898 3220 Renesas Electronics Europe Limited Dukes Meadow Millboard Road Bourne End Buckinghamshire SL8 5FH U K Tel 44 1628 651 700 Fax 44 1628 651 804 Renesas Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 49 211 65030 Fax 49 211 6503 1327 Renesas Electronics China Co Ltd 7th Floor Quantum Plaza No 27 ZhiChunLu Haidian District Beijing 100083 P R China Tel 86 10 8235 1155 Fax 86 10 8235 7679 Renesas Electronics Shanghai Co Ltd Unit 204 205 AZIA Center No 1233 Lujiazui Ring Rd Pudong District Shanghai 200120 China Tel 86 21 5877 1818 Fax 86 21 6887 7858 7898 Renesas Electronics Hong Kong Limited Unit 1601 1613 16 F Tower 2 Grand Century Place 193 Prince Edward Road West Mongkok Kowloon Hong Kong Tel 852 2886 9318 Fax 852 2886 9022 9044 Renesas Electronics Taiwan Co Ltd 13F No 363 Fu Shing North Road Taipei Taiwan Tel 886 2 8175 9600 Fax 886 2 8175 9670 Renesas Electronics Singapore Pte Ltd 80 Bendemeer Roa
19. External Memory Support 16 bit or 32 bit bus interface Page ROM ROM SRAM interface Synchronous burst memory interface Four chip selects for external SRAM 256MByte max external memory space Programmable wait function External MCU interface 16 bit or 32 bit bus interface General purpose interface for static memory Address space 2MByte Instruction RAM Data RAM Register area Serial Flash ROM Memory Controller Support serial interface compatible with SPI of the companies Support direct boot from serial memory device Support Fast Read Fast Read Dual Output Fast Read Dual mode Direct layout in memory space Interrupt 29 external interrupt ports Internal Peripheral Circuit Ports CMOS l O 96ports max System Timers R18UZ0005EJ0202 Dec 25 2014 Internal timer of Hardware RTOS internal timer of CPU 4channel timer array 32bit counter amp 32bit data register counter by external signal Page 2 of 89 R IN32M3 CL User s Manual Table1 1 Internal Peripheral Circuit 1 OBOverview Overview of R IN32M3 CL 2 2 ias Product R IN32M3 CL Watchdog Timer 1 channel Software triggered start mode Watchdog error response options Generate Non Maskable Interrupt NMI Generate Reset Asynchronous serial interface 12C Serial interface 2 channels Full duplex FIFOs 10 bit x
20. 4 2 1 400 3400 00H RP1B RP17 RP16 RP15 RP14 RP13 RP12 RP11 RP10 400A 3401H 00H RP2B RP27 RP26 RP25 RP24 RP23 RP22 RP21 RP20 400A 3402H 00H RP3B RP37 RP36 RP35 RP34 RP33 RP32 RP31 RP30 400A 3403H 00H Bit Bit position Bitname name I output latch is read Figure 7 2 Port registers in 8 bit notation Remark 120to3 mz0to7 nz0to7 R18UZ0005EJ0202 Page 52 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address e nm RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW lInitial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 55 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 55 en rer e n e m son RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW lInitial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RPOH RP17 RP16 RP15 RP14 RP13 RP12 RP11 RP10 RPO7 RPO6G RPO5 RPO04 RP03 RPO0O2 RPO1 RPOO 400A 3400H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RP2H RP37 RP36 RP35 RP34 RP33 RP32 RP31 RP30 RP27 RP26 RP25 RP24 RP23 RP22 RP21 RP20 400A 3402H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial
21. I O External Interrupt Input Signals Function 2 1BSignals by function NMIZ Non maskable external interrupt input port INTPZO INTPZ5 INTPZ6 INTPZ7 INTPZ8 INTPZ10 INTPZ11 INTPZ12 INTPZ15 INTPZ16 INTPZ21 INTPZ22 INTPZ24 INTPZ25 INTPZ28 External interrupt input port Shared Port Active Level during reset amp Level after reset Low Hi Z High level by 5 Low internal Pull up P12 P13 Low resistor P22 P24 Low P43 Low P74 P77 Low RPO0 RPO5 Low P35 P37 Low RP24 RP27 Low Hi Z With internal pull down resistor 2 1 8 Timer Signals Pin Name 1 0 Function Shared Port Active Level during reset amp Level after reset TINO TOUTO VO Timer TAUJO port P27 Hi Z TIN1 TOUT1 VO Timer TAUJ1 port P26 With internal pull up resistor TIN2 TOUT2 I O Timer TAUJ2 port P57 Hi Z With internal pull up resistor TIN3 TOUT3 1 0 Timer TAUJ3 port P52 Hi Z With internal pull down resistor 2 1 9 WDTOUTZ R18UZ0005EJ0202 Dec 25 2014 Watchdog Timer Output E With internal pull up resistor Page 15 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 10 Trace Signals Pin Name Function Active Level during reset amp Level after reset TRACECLK Trace port clock output port TRACEDATAO 2 1 11 CPU Power Cont
22. Initial value d ee Na Lu Lu Luj Lu Lu Lu Lu Lu LU LU LL 0000 0000H O O O O O O O O LL LL LL a a a a o RW R W R W R W R W RW R WR WR W O RWRWRWRWRW O 0 R WR W O RWRWRWRWRW O O O O ORWO O 18 17 16 15 14 13 12111098 765 4 3 2 1 O Address 31 30 29 28 27 26 25 24 23 22 21 20 19 400 3440H Initial value 0000 0000H RPFCEOW Co C i Co RPFCEOS R W 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 RWR WR WR WR WR W Bit poston Function PFCEmn Specify whether to use alternate functions 1 and 2 or alternate functions 3 and 4 RPFCEIn 0 Alternate function 1 Alternate function 29 1 Alternate function 3 Alternate function 4993 Figure 7 15 Port function control expansion registers in 32 bit notation Notes 1 The initial value depends on the pin status For details see 2 2 Port status 2 Touse alternate function 1 or 3 the bit corresponding to the function in the PFC RPFC register must be set to 0 3 To use alternate function 2 or 4 the bit corresponding to the function in the PFC RPFC register must be set to 1 Remark 1 0 3 0 7 0 7 R18UZ0005EJ0202 Page 66 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function
23. Exception handling function 4 3BException handling function R IN32NG use the Interrupt Controller built in to Cortex M3 Please refer to the following URL of ARM for Exceptions handling operation of Cortex M3 http infocenter arm com help topic com arm doc set cortexm index html 4 1 Ex ceptions list Exception No 1 15 is system exception of Cortex M3 CPU The interrupt from the internal hardware of R IN32M3 and External port is assigned after Exception No 16 Exception Exception type Priority Remark No 1 Reset 3 Reset port RST B input most significant Reset from Watchdog Timer Set 1 SYSRESETREQ bit of built in Cortex M3 CPU 2 NMI 2 NMI port input Generate NMI from Watchdog Timer 3 Hard fault 1 Using to the promotion of exception fault of all class that can be operated by other exceptions Memory manage fault programmable Exception from MPU Bus fault programmable Bus error of bus access to the area that is not controlled by MPU 6 Use fault programmable Error about operating instruction including undefined Reserved instruction SVCall programmable Call of system service by SVC interrupt Debug Monitor programmable Debug Monitor Reserved 14 PendSV programmable Request to system service that can be reserved 15 SysTick programmable Indication from system timer 16 R IN32M3 specific Interrupt programmable Interrupt from th
24. HERROUTZ HERROUTZ HBUSCLK HBUSCLK WRZ2 BEN notet WRZ2 BENZ HPGCSZ RPO06 HPGCSZ HWRZ2 HBENZ e RPO6 WRZ3 BEN WRZ3 BEN notet RP07 HWRZ3 27992 7 20 ADVZ HBCYSTZ HBCYSTZ RP20 024 031 024 031 RP10 RP17 HD24 HD31 RP10 RP17 D16 D23 D16 D23 RP30 RP37 HD16 HD23 RP30 RP37 Note1 When using asynchronous SRAM MEMC WRZ 3 0 and BENZ 3 0 are converted WREN register In addition when using synchronous burst MEMC WRZ 3 0 and BENZ 3 0 are converted by OPMODE register Note2 HWRZ 3 0 and HBENZ 3 0 are converted by the level of HWRZSEL port R18UZ0005EJ0202 Dec 25 2014 Page 22 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 3 Operation mode monitor functions Operation mode setting signals can confirm a setting state by operation mode monitor register Operation mode setting signals that can be confirmed are shown below Please refer to R IN32M3 User s Manual Peripheral functions edition for the detail of operation mode monitor register Table2 1 Operation mode setting signals that can be confirmed Pin Name Function BUS32EN Select bus width in case of starting external memory I F MEMIFSEL Select a kind of external memory I F HIFSYNC Set operation mode of external MCU I F HWRZSEL Select HWRZ HBENZ port of external M
25. R W 0000000000000000000000000000000 CIECLKGTD Bit position Bit name Function CIECLKGTD Stop the bus clock of the CC Link IE Field Network 0 Provide operation bus clock 1 Stop operation bus clock R18UZ0005EJ0202 Page 40 of 89 Dec 25 2014 R IN32M3 CL User s Manual 6 5BCC Link IE Field Intelligent device station Function 6 1 2 CC Link IE Field Intelligent device station wait delay register CIEWAITDLY CIEW AITDLY register is used to extend the wait period cycle to the bus of the CC Link IE Field Network Can be set up to 4 cycles from 0 cycle The setting of this register should be set before the start accessing the CC Link IE Field Network e Access This register can be read and written in 32 bit or 16 bit units 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 4001 093CH Initial Value CIEWAITDLY 0 0 0 0 0 0 010 0000 0000H WAITDLY2 WAITDLY1 WAITDLYO RIW 00 0 0 0 0 0 000000000 0 0 0 0 0 RWRWRW Bit position Bit name Function WAITDLY2 0 Sets a the wait period cycle to the bus of the CC Link IE Field Network 000 4 XHBUSCLK initial value 001 3 X HBUSCLK 010 2 X HBUSCLK 011 1 X HBUSCLK 100 0 X HBUSCLK through Other It is the forbidden BUSCLK HBUSCLK WAITDLY2 0 100b WAITDLY2 0 Delay time 011b WAITDLY2 0 010b 4 Delay time Y WAITDLY2 0
26. 0 10 n to x s 0000 0000H OI O O O gt gt gt gt gt gt gt gt gt 2 gt gt n a o RAN R W R W R W R W R W R W RW R W RW RW R W RW RW RW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8765 4 Address 400A 3420H RPMCOW MIN 3 lt inital value PMC0 5 0000909090066 0 0000 gt gt gt gt gt gt gt gt gt gt gt gt gt gt gt a a o ec E e e E CC E E CC m E RW RW RW RAN RW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W RW RW RW 31 to 0 PMCmn RPMCIn Specify whether to use the port as a port or for its alternate function 0 Port mode The Inactive level is input to the input pin of the alternate function 1 Alternate function control mode Figure 7 10 Port mode control registers in 32 bit notation Note The initial value depends on the pin status For details see 2 2 Port status Remark 120to3 mz0to7 nz0to7 R18UZ0005
27. 3BException handling function 3 4 Connection INTPZ21 INTPZ22 INTPZ21 input INTPZ22 input INTPZ23 INTPZ23 input INTPZ24 INTPZ24 input INTPZ25 INTPZ25 input INTPZ26 INTPZ26 input INTPZ27 INTPZ27 input INTPZ28 INTHWRTOS INTBRAMERR INTPZ28 input HW RTOS interrupt Buffer RAM area access error O O O O O O O O O O O O INTIICBOTIS 12C0 status interrupt INTSFLASH Serial Flash ROM controller error interrupt 95 INTIICB1TIS 12C1 status interrupt 96 Reserve INTUAJOTIS status interrupt INTUAJ1TIS INTCSIHOIRE UARTJ1 status interrupt CSIHO communication error interrupt INTCSIH1IRE CSIH1 communication error interrupt INTFCNOERR FCNO error detection INTFCN1ERR FCN1 error detection INTDERRO DMAC error response interrupt INTDERR1 RTDMAC error response interrupt INTETHTXFIFOERR INTETHRXERR TX FIFO error interrupt Ether receive flame error INTETHRXDERR MACDMA reception error interrupt INTETHTXDERR MACDMA transmission error interrupt INTBUFDMAERR Internal Buffer DMA error O O O IO O Reserve Reserve Reserve
28. HWRZO HWRZ1 HBENZO HBENZ1 HWRZ2 HWRZ3 HBENZ2 HBENZ3 HERROUTZ Effectively Byte lane strobe input port Error interrupt output port WRZO WRZ1 BENZO 21 WRZ2 WRZ3 BENZ2 BENZ3 SLEEPING Hi Z With internal pull up resistor High HBCYSTZ Caution When you use asynchronous mode please input Low into a HBUSCLK pin Bus cycle input port BCYSTZ ADVZ Hi Z With internal pull up resistor Remark External MCU interface signals operate as an External MCU interface durinug reset R18UZ0005EJ0202 Dec 25 2014 Page 9 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 4 Port Signals and Real time port Signals are configured as 12 sets of 8 bit ports Port Signal Real time port Signals They are able to realize 32 bit access by grouping 4 ports 1 e Ports 0 3 Ports 4 7 or Real time ports 0 3 1 4 Port Level during reset amp Name Mode 1 Mode 2 Mode 3 Mode 4 PE PO INTPZO CCI RUNLEDZ Hi Z P01 INTPZ1 With internal pull up P02 INTPZ2 CCI DLINKLEDZ resistor INTPZ3 ERRLEDZ CCS 5 4 INTPZ4 LERR1LEDZ CCS MON6 P05 INTPZ5 CCI LERR2LEDZ CCS MON7 P06 PHYLINKO SDLEDZ CCS MONO P07 PHYLINK1 CCI RDLEDZ CCS RESOUT P1 P10 CCS REFSTB Hi Z With internal pull up resistor P11 CCS Hi Z Wi
29. Port pin input register 0 16 bits 400A 3050H Port pin input register 2 16 bits 400A 3052H Port pin input register 4 16 bits 400A 3054H Port pin input register 6 16 bits 400A 3056H Port pin input register 0 32 bits 400A 3050H Port pin input register 4 32 bits 400A 3054H Port pin input register 6 8 bits R18UZ0005EJ0202 Page 48 of 89 Dec 25 2014 R IN32M3 CL User s Manual Register name RT port register 0 8 bits Symbol 7 6BPort function 4 6 Address 400A 3400H RT port register 1 8 bits RP1B 400A 3401H RT port register 2 8 bits RP2B 400A 3402H RT port register 3 8 bits RP3B 400A 3403H RT port register 0 16 bits RPOH 400A 3400H RT port register 2 16 bits RP2H 400A 3402H RT port register O 32 bits RPOW 400A 3400H RT port mode register 0 8 bits RPMOB 400A 3410H RT port mode register 1 8 bits RPM1B 400A 3411H RT port mode register 2 8 bits RPM2B 400A 3412H RT port mode register 3 8 bits RPM3B 400A 3413H RT port mode register 0 16 bits RPMOH 400A 3410H RT port mode register 2 16 bits RPM2H 400A 3412H RT port mode register 0 32 bits RPMOW 400A 3410H RT port mode control register 0 8 bits RPMCOB 400A 3420H RT port mode control register 1 8 bits RPMC1B 400A 3421H RT port mode control register 2 8 bits RPMC2B 400A 3422H RT port mode control register 3 8 bits RPMC3B 400A
30. a a iti CTLP5 0 0 0 0 0 0 0 0 56 55 Initial value 218 218 0000 0599 RIW 0 0 0 0 0 0 0 0 O0RMRMRMRMRM RW RM RM RW RW RW 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address BASE 024CH 5 Initial value a 0000 9000 R W 000000000000000 0RWRWO 1000000000000 Bit position Bit name Function Reserved sure to write 0 to these bits If read 0 is returned PUIOP5n Specify whether to connect a pull up or pull down resistor to the P57 and P52 to P50 pins PDIOP5n Connection of a pull up or pull down resistor PUIO PDIO to the P57 and P52 to P50 pins Do not connect pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLP5n1 Specify the driving capability of the P51 to P50 pins lt R gt IOLP5nO IOL1 IOLO Driving capability of P51 to P50 pins 12mA Other than above Setting prohibited Remark n 7to0 R18UZ0005EJ0202 Page 80 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 5 7 Port 6 Buffer function change register DRCTLP6L DRCTLP6H 7 6BPort function Bit position R W 0 0 0 0 0 0 0 0 0 0 0 RWRW 0 1 RWRW 1R Bit name 31
31. bus bridge control register CIESMC 42 Lo POr RM 43 7 1 BGatures PERRA GRE tee ela 43 7 2 Port CONAFUTA ON a sa ES SN AJ 44 7 3 dul 46 7 3 1 Port registers P RB sion DRE ANALA 52 7 3 2 Port mode registers PM RPM us a a sa as au u D DS E ADA u uu uay 55 7 3 3 Port mode control register PMC RPMO 58 7 3 4 Port function control registers PFC 61 7 3 5 Port function control expansion registers eee 64 7 3 6 Port pin input registers PIN RPIN n 67 7 4 Available combinations of alternate 70 7 5 Buffer function change registers enne nen nenne trennen trennen rennen 74 7 5 1 Port 0 buffer function change registers DRCTLPOL eee 75 7 5 2 Port 1 Buffer function change register DRCTLPIL 76 7 5 3 Port 2 Buffer function change register DRCTLP2L 2 02 TI 7 5 4 Port 3 Buffer function change register DRCTLP3L DRCTLP3H eee 78 7 9 5 Port 4 Buffer function change register DRCTLPAL eee 79 7 5 6 Port 5 Bu
32. military equipment etc You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application for which it is not intended Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the product is not intended by Renesas Electronics You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as saf
33. 16 receive and 8 bit x 16 transmit Support output of receive errors and status Character length 7 or 8 bit bit options odd even 0 none Transmit stop bits 1 or 2 bit 2 channels Operation modes normal or high speed Transfer modes single transfer mode or continuous transfer mode Transmission data length 8 bit CAN controller 2 channels Conforming to ISO11898 Support to transfer and receive normal frame and expand frame Transmission speed 1Mbps max Clock Synchronized Serial 2 channels Interface Synchronized Serial data transmission by three wire system Selectable Master mode or Slave mode Built in Baud rate generator Transmission data length 7bit 16bit CC Link Intelligent device station lt R gt Remote device station 10 100 1000Mbps Ether 1 channel Built in 2 port switch GMII MII interface CC Link IE CC Link IE Field Intelligent device station On chip debug function Select serial wire or JTAG Support Full Trace Built in ETM Internal PLL Generates various clocks from 25MHz input clock Power supply voltage 1 0 VDD33 3 3 0 3V Internal circuit VDD10 1 0 0 1V Note Please ask us about a detail for support R18UZ0005EJ0202 Dec 25 2014 Page 3 of 89 1 OBOverview R IN32M3 CL User s Manual INTERNAL BLOCK DIAGRAM 1 3 lt e lt m Timer A
34. 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 543210 Address 400A 3034H Initial value PFO4W 0 0 0 0 Na D LI LTD SI s 310000 gt LL LL LL LL LL LL LL LL LL LL LL LL a a a a a RW 0 0 0 0 0 0 0 O O 0 0 O O 0 RW O 0 R WR WR W O R WR WR WR WR WR WR WR W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 Address 400A 3430H Initial value RPFCOW 0 0 0 o 0 O 9990 0000 LL LL LL LL LL alallala 02 02 RAN 0 0 0 0 0 O 0RWRWRWRW O O ORW 0 O O O O 0 RWRW O O 0 RWRW Bit position Function 31 0 PFOmn Specify whether to use alternate functions 1 and 3 or alternate functions 2 and 4 RPFCIn 0 Alternate function 1Note 2 Alternate function 3Note 3 1 Alternate function 2Note 2 Alternate function 4Note 3 Figure 7 13 Port function control registers in 32 bit notation Notes 1 The initial value depends on the pin status For details see 2 2 Port status 2 To use alternate function 1 or 2 the bit corresponding to the function in the PFCE RPFCE register must be set to 0 3 To use alternate function 3 or 4 the bit corresponding to the function in the
35. 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 0250 lt e e DRCTLP6L 0 0 010 010 Initial value 218 218 0000 9999 RW 0 0 0 0 0 0 0 0 0 0 ORWRW O 1 O 1 RWRW O 1 O 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 Address sI ele Ar sla 0254 56 0 1 Initial value ag ag 218 218 0000 9999 2 o Function 31 to 16 Reserved Be sure to write 0 to these bits If read 0 is returned 15 14 11 PUIOP6n Specify whether to connect a pull up or pull down resistor to the P67 to P60 pins 10 7 6 3 2 PDIOP6n Do not connect a pull up or pull down resistor Connection of a pull up or pull down resistor to the P67 to P60 pins 1 1 Setting prohibited Connect a pull down resistor Connect a pull up resistor Remark 7 0 R18UZ0005EJ0202 Dec 25 2014 Page 81 of 89 R IN32M3 CL User s Manual 7 5 8 Port 7 Buffer function change register DRCTLP7L DRCTLP7H 7 6BPort function Bit position R W 0 0 0 0 0 0 0 0 0 0 0 ORWRW 1 RWRW 1R Bit name 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 321 0 Address ele 0258 DRCTLP7L 0 0 0 0 o o 55 516 Initial value
36. 3423H RT port mode control register 0 16 bits RPMCOH 400A 3420H RT port mode control register 2 16 bits RPMC2H 400A 3422H RT port mode control register O 32 bits RPMCOW 400A 3420H RT port function control register O 8 bits RPFCOB 400A 3430H RT port function control register 1 8 bits RPFC1B 400A 3431H RT port function control register 2 8 bits RPFC2B 400A 3432H RT port function control register 3 8 bits RPFC3B 400A 3433H RT port function control register 0 16 bits RPFCOH 400A 3430H RT port function control register 2 16 bits RPFC2H 400A 3432H RT port function control register 0 32 bits RPFCOW 400A 3430H R18UZ0005EJ0202 Dec 25 2014 Page 49 of 89 R IN32M3 CL User s Manual Register name Symbol 7 6BPort function Address 5 6 RT port function control expansion register 0 8 bits 400 3440 port function control expansion register 1 8 bits RPFCE1B 400A 3441H RT port function control expansion register 2 8 bits RPFCE2B 400A 3442H RT port function control expansion register 3 8 bits 400A 3443H RT port function control expansion register 0 16 bits RPFCEOH 400A 3440H RT port function control expansion register 2 16 bits RPFCE2H 400A 3442H RT port function control expansion register 0 32 bits RPFCEOW 400A 3440H RT port pin input register O 8 bits RPINOB 400A 3450H RT port pin input register 1 8 bits RPIN1B 400A 3451H RT port pin input re
37. 7 3 6 Port pin input registers PIN RPIN These are read only registers for reading the input level of port pins Address Initial 7 6 5 4 3 2 1 0 value PINOB PINO7 06 PINOS PINO4 PINO3 PINO2 PINO1 PINOO 400A 3050H Undefined PIN1B PIN17 PIN16 PIN15 PIN14 PIN13 PIN12 PIN11 PIN10 400A 3051H Undefined PIN2B PIN27 PIN26 PIN25 PIN24 PIN23 PIN22 PIN21 PIN20 400A 3052H Undefined PIN3B PIN37 PIN36 PIN35 PIN34 PIN33 PIN32 PIN31 PIN30 400A 3053H Undefined PINAB PIN47 PIN46 PIN45 PIN44 PIN43 PIN42 PIN41 PIN40 400A 3054H Undefined PIN5B PIN57 PIN56 PIN55 PIN54 PIN53 PIN52 PIN51 PIN50 400A 3055H Undefined PIN6B PIN67 PIN66 PIN65 PIN64 PIN63 PIN62 PIN61 PIN60 400A 3056H Undefined PIN7B PIN77 PIN76 PIN75 PIN74 PIN73 PIN72 PIN71 PIN7O 400A 3057H Undefined RPINOB RPINO7 RPINO6 RPINOS RPINO4 RPINO2 RPINO1 RPINOO 400A 3450H Undefined RPIN1B RPIN17 RPIN16 RPIN15 RPIN14 RPIN13 RPIN12 RPIN11 RPIN10 400A 3451H Undefined RPIN2B RPIN27 RPIN26 RPIN25 RPIN24 RPIN23 RPIN22 RPIN21 RPIN20 400A 3452H Undefined RPIN3B RPIN37 RPIN36 RPIN35 RPIN34 RPIN33 RPIN32 RPIN31 RPIN30 400A 3453H Undefined Bit Bit position Bitname name Funn 7100 PINmn Use to read the input level of the port pin RPINIn Figure 7 16 Port pin input registers in 8 bit notation Remark 0to3 m 0to7 n 0to7 R18UZ0005EJ0202 Page 67 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function Addr
38. CC Link Signals Intelligent device station Pin Name 1 0 Function Shared Active Level during reset amp Port Level after reset CCM LINKERRZ O Link error LED control port P20 Low Hi Z CCM_ERRZ Error LED control P21 Low With internal CCM RUNZ RUN LED control port P26 Low pull up resistor CCM MDINO Mode setting switch input port P62 P65 MDIN3 CCM SNINO Station No setting switch port P70 P77 SNIN7 CCM LNKRUNZ O Link RUN LED control port P50 Low Hi Z CCM RDLEDZ Receive data LED control P51 Low With internal CCM SDLEDZ Transfer data LED control port Low pull up resistor IRZ Interrupt output port P35 Low CCM WDTENZ Watchdog Timer error input port P13 Low CCM MSTZ Operation check LED port P37 Low CCM SMSTZ Stand by master LED control RPO1 Low CCM RD Data receive port 53 0 Data transfer port P54 CCM SDGCZ Transfer data amp gate control port P42 Low CCM CLK80M CC Link Clock R18UZ0005EJ0202 Page 18 of 89 R IN32M3 CL User s Manual 2 1 15 CC Link Signals Remote device station 2 1BSignals by function Caution To use a remote device station it is necessary to connect a CCS REFSTB terminal to an external interrupt terminal INTPZ Pin Name 1 0 Function Shared Active Level during reset Level after reset CCS MON1 O Monitor port P32 P34 Hi Z CC
39. Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual 2 Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified 3 Prohibition of Access to Reserved Addresses Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed 4 Clock Signals After
40. Network area 2Mbyte 256Kbyte 10 0000H 00 0000H MCU area Ps Internal AHB area FFFF FFFFH Data RAM area 512Kbyte 18 0000H 17 FFFFH Reserved 14 0000H 13 FFFFH CC Link IE Field o Network area 10 0000H 256Kbyte OF FFFFH HOSTIF registers area OF 256byte OF esse 400F C000H CC Link Slave CC Link Slave OF B000H area 4Kbyte area 4Kbyte 400F B000H OFAFFFH CC Link Master CC Link Master I O 400F AFFFH OF A000H area 4Kbyte area 4Kbyte 400F A000H 2Mbyte OF9FFFH CC Link Master momory CC Link Master memory 400F 9FFFH OF 8000H area 8Kbyte AL area 8Kbyte 400F 8000H 7FFFH 400F 7FFFH Reserved Reserved 4Gbyte 0000H 400 0000 OD FFFFH System registers area 0D 0000H 64Kbyte OC FFFFH AHB Peripheral area AHB Peripheral area 200 FFFEH OC 3000H Upper 52Kbyte Upper 52Kbyte 400A 3000H OC 0000H Reserved 0B FFFFH S V 7 as System registers area 4001 64Kbyte 4001 0000 2007 FFFFH Data RAM area 512Kbyte 2000 0000H 0000 2FFFH Reseved 000C 0000H 000B FFFFH Su Instruction RAM area 768Kbyte 0000 0000H Y Figure 3 5 External MCU interface area R18UZ0005EJ0202 Page 32 of 89 Dec 25 2014 R IN32M3 CL User s Manual 4
41. applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable ARM AMBA ARM Cortex Thumb and ARM are a trademark or a registered trademark of ARM Limited in EU and other countries Ethernet is a registered trademark of Fuji Zerox Limited IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers Inc EtherCAT is a registered trademark of Beckhoff Automation GmbH Germany CC Link and CC Link IE Field a registered trademark of CC Link Partner Association Additionally all product names and service names in this document are a trademark or a registered trademark which belongs to the respective owners Real Time OS Accelerator and Hardware Real Time OS is based on Hardware Real Time OS of ARTESSO made in KERNELON SILICON Inc How to use this manual 1 Purpose and target readers This manual is intended for users who wi
42. mode D21 HD21 RP36 RP36 output mode RP36 input mode D22 HD22 7 RP37 output mode RP37 input mode D23 HD23 Remark mz0to3 nz0to7 R18UZ0005EJ0202 Dec 25 2014 Page 73 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 5 Buffer function change registers DRCTLP For some port pins the driving capability and whether to connect a pull up or pull down resistor can be specified individually Set up the DRCTLP registers during initialization after the reset period ends After that the setting of each DRCTLP register can only be changed when the corresponding buffer function change pin is not being used For example a DRCTLP register setting can be changed at times when only a memory space is being accessed internally The DRCTLP register setting becomes valid regardless of the operating mode of the pin port mode or control mode in which an alternate function is used e Access These registers can be read and written in 32 bit or 16 bit units Cautions 1 These registers are write protected and can only be written after being protection unlocked by using a special instruction sequence initiated by using the system protection command register SYSPCMD For how to unlock protection see the description of the system protection command register SYSPCMD No special instruction sequence is required for reading these registers 2 Changing the pull up pull down resistor setting affect
43. port for serial P14 171 Hi Z flash ROM With internal SMSI 1 0 Serial data port for serial flash ROM P15 High pull up resistor Connect to SO of serial flash ROM SMSO 1 0 Serial data port for serial flash ROM P16 High Connect to SI of serial flash ROM SMCSZ O Chip select output port for serial flash P17 Low ROM 2 1 6 DMA Interface Signals There are two DMA Controllers one with four internal channels but only two external interfaces and one with one internal channel and one external interce as real time DMA controller Pin Name Function Shared Port Active Level during reset amp Level after reset RTDMAREQZ RTDMAC DMA transfer request port P62 Hi Z RTDMAACKZ RTDMAC DMA acknowledge output 6 With internal port pull up resistor RTDMATCZ RTDMAC terminal count output port P64 DMAREQZO transfer request port 0 P65 DMAACKZO acknowledge output port 0 P66 DMATCZO DMA Terminal count output port O P67 DMAREQZ1 DMA transfer request port 1 Hi Z DMAACKZ1 DMA acknowledge output port 1 With internal DMATCZ1 DMA Terminal count output port 1 pull up resistor Caution Each DMA interface is assigned to a specific DMA channel channel 0 interface 0 DMAREQZO DMAACKZO DMATCZO channel 1 interface 1 21 DMAACKZ1 DMATCZ1 DMA channels 2 3 z no external interface R18UZ0005EJ0202 Page 14 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1 7 Pin
44. value 0000H 15100 Pmn RPIn Set the value of the output latch when the port is used in output mode If read the value of the output latch is read Figure 7 3 Port registers in 16 bit notation Remark 1 0to3 mz0to7 nz0to7 R18UZ0005EJ0202 Page 53 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3000H Initial value POW 0000 0000H NI OINI TIOINIT JOIN IOINI TIOINIT JOIN TJOIN 10 TIMIN FIO CN NJ QN QN TI 8 a a a E 5 EEE ELLE 2 RW R W R W R W R W R W R W R W R W R W R W RAW RW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W RW 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 41 0 Address 400A 3004H Initial value 0000 0000H lt lt 0 2 lO LO LO LO tO st SE
45. 0 R18UZ0005EJ0202 Page 85 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 12 Real time port 3 Buffer function change register DRCTLRP3L DRCTLRP3H Bit position Bit name R W 0000000000000 0 OR 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 1110 9 8 7 6 5 4 3 2 1 0 Address SIS 5 SS Ga s s s e 8 8 s s BASE 0278H DRCTLRP3L olololololololo 0 010 P ele e initial value s m s m a a oO gt oo gt a 0000 9999H RAN 00000000000000 0 RW RW RW RW R W R W R W R W R W R W R W RW R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 43 12 11 10 9 8 7 6 54 3 2 1 0 Address olololololololololololololol olo EE 01 o ele E Initial value See See eee Siege 2 2 9 9072 2 9 09 2 2 99 0000 9999H Function Reserved Be sure to write O to these bits If read 0 is returned PUIORP3n PDIORP3n Specify whether to connect a pull up or pull down resistor to the RP37 to RP30 pins Connection of a pull up or pull down resistor PUIO PDIO ln pes to the RP37 to RP30 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLRP3n1 IOLRPS3nO Specify the driving capability of the RP37 to RP30 pins IOL1 IOLO Driving capability of RP37 to RP30 pins 12mA Other than above Setting prohibited
46. 0A 2000H control registers area 1Kbyte 4009 2000H Received QINT BUFID 4Kbyte Giga bit Ether 4Kbyte 4009 1000H 4009 0000H HW RTOS 64Kbyte Figure 3 1 Memory map ALL R18UZ0005EJ0202 Dec 25 2014 Page 29 of 89 R IN32M3 CL User s Manual 3 2BMemory Maps 4008 0000H 400A FFFFH AHB Peripheral registers area 192Kbyte APB Peripheral registers area 512Kbyte Reserved 4008 0000H 4007 FFFFH 4000 0000H Reserved 4007 4007 0000H 4004 0000H 4002 0000H 4001 0000H 4000 0700H 4000 0600H 4000 0500H 4000 0400H 4000 0300H 4000 0200H 4000 0100H 4000 0000 ETHER SWITCH control register area 64Kbyte Reserved CAN area 128Kbyte CANO area 128Kbyte System register area 64Kbyte Reserved Watchdog timer 16byte Reserved 64byte Reserved 64byte Reserved UART1 128byte Reserved UARTO 128byte CSH 256byte CSI0 256byte Timer TAUJ 256byte Figure 3 2 Memory map APB Peripheral registers area R18UZ0005EJ0202 Dec 25 2014 Page 30 of 89 R IN32M3 CL User s Manual 3 2BMemory Maps 1C00 0000H 1BFF Reserved P 2008 0000H 2007 Data RAM area 1800 0000 512Kbyte 17FF FFFFH 2000 0000H 1FFF FFF
47. 0H 259Kbyte 400F SES 400F BFFFH CC Link Slave 400F area 400F 8000H pt 400B 0000H 400A FFFFH AHB Peripheral registers 4008 0000H area 192Kbyte 4007 FFFFH APB Peripheral registers 4000 0000H area 512Kbyte Reserved 22FF FFFFH bitband alias area 16Mbyte 2200 0000H 2008 0000H RESSE 2007 FFFFH Data RAM area 512Kbyte 2000 0000H 1FFF FFFFH External memory area 256Mbyte 1000 0000H OFFF FFFFH Buffer memory area iCode dCode area CAOB EEFEH Instruction RAM mirror 0400 0000H area 768Kbyte FFFFH 128Mbyte 0800 0000H 040C 0000H Reserved Serial flash ROM area 32Mbyte 0200 0000H Go 000C 0000H Rosemead 000B FFFFH Instruction RAM area 768Kbyte 0000 0000H 400A FFFFH 4008 0000H 3 2BMemory Maps Reserved Synchronous burst access MEMC control registers area 400A 8000H 8Kbyte 400A 4800H CC Link Master Slave Bridge control registers 400 4400H 1Kbyte CC Link IE Field Network Bridge control registers 400A 4000H 1Kbyte Reserved Real time port 400A 3400H 1Kbyte GPIO 1Kbyte 400A 3000H controller 400A 2C00H control registers area 1Kbyte DMA controller 400A 2800H Control registers area 1Kbyte Serial flash ROM memory contoroller 400A 2400H control registers area 1Kbyte Asynchronous SRAM MEMC 40
48. 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RPFC2H __ 5 0 TT 0 0 0 0 0 0 0 0 RW RW RW RW 0 0 0 RW Initial value 0000H Bit position Function 15 0 PFCmn Specify whether to use alternate functions 1 and 3 or alternate functions 2 and 4 RPFCmn 0 Alternate function 1 Alternate function 39 1 Alternate function 2 Alternate function 4993 Figure 7 12 Port function control registers in 16 bit notation Notes 1 The initial value depends on the pin status For details see 2 2 Port status 2 To use alternate function 1 or 2 the bit corresponding to the function in the PFCE RPFCE register must be set to 0 3 Touse alternate function 3 or 4 the bit corresponding to the function in the PFCE RPFCE register must be set to 1 Remark 0103 0107 01 07 R18UZ0005EJ0202 Page 62 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3030H Initial value PFCOW olo 0 o o o o o o o o o olo 0000 0000 7 PFC36 PFC35 PFC34 PFC33 PFC32 PFC27 PFC26 PFC24 12 PFC11 PFC10 PFCO7 PFCO6 PFCO5 PFC04 PFC03 PFC02 z gt gt o o R W R WR WR WR WRWRW 0 0 31 30 29 28 27
49. 2 bit units 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 4008H CIESMC 1 0000 RW 0 0 0 0 0 0 1 0001 0101 000 1 310 This register must be fixed to 0000 1151H R18UZ0005EJ0202 Page 42 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 Port function 7 1 Features Number of ports 96 Can function alternately as the I O pins of other peripheral functions Input or output can be specified by bit unit R18UZ0005EJ0202 Page 43 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 2 Port configuration 7 6BPort function The R IN32M3 CL incorporates eight ports of 3 state 1 O port and four real time control ports Input or output mode can be specified for ports in 1 bit units Each port basically consists of 8 bits but ports O to 3 can also be aligned to enable reading and writing in 32 bit units The real time ports RPOO to RP37 can be used for in synchronization with interrupt signals Each port has the registers shown below each of which is used to set the I O mode and specify the use of the alternate function of the port The basic circuit configuration is shown in Figure 7 1 Register name Port registers Pn RPm Purpose and operation Read Used to read the value of the output latch Write Used to s
50. 218 218 0000 9999 RW 0 0 0 0 0 0 0 0 0 ORWRW O 1 O 1 RWRW O 1 O 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 Address ele elo ale BASE 025CH pROTLP7H 565 Initial value ag ag 218 218 0000 9999 2 o EN 2 Function 31 to 16 Reserved Be sure to write O to these bits If read 0 is returned 15 14 11 PUIOP7n Specify whether to connect a pull up or pull down resistor to the P77 to P70 pins 10 7 6 3 2 PDIOP7n Do not connect a pull up or pull down resistor Connection of a pull up or pull down resistor to the P77 to P70 pins Connect a pull down resistor Connect a pull up resistor 1 1 Setting prohibited Remark 7 0 R18UZ0005EJ0202 Dec 25 2014 Page 82 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 5 9 Real time port O Buffer function change register DRCTLRPOL DRCTLRPOH 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 43 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 385839 sss e ss sls BASE 0260H DRCTLRP0L olo olo E 9 e e s e initial value 2101002150 02 200 0000 9999H RAN 00000000000000 0 RWR WR WR WR WR WR WR WR WR WR WR WR WR WR WR W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address p
51. 22 RPMC21 RPMC20 400A 3422H 00H RPMC3B RPMC37 RPMC36 RPMC35 RPMC34 RPMC33 RPMC32 RPMC31 RPMC30 4004 3423H 00H Bit position Function 7100 PMCmn Specify whether to use the port as a port or for its alternate function RPMCIn 0 Port mode The Inactive level is input to the input pin of the alternate function 1 Alternate function control mode Figure 7 8 Port mode control registers in 8 bit notation Note The initial value depends on the pin status For details see 2 2 Port status Remark 120to3 mz0to7 nz0to7 R18UZ0005EJ0202 Page 58 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PMCOH PMC PMC PMC 400A 3020H 17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PMC2H PMC PMC PMC PMC 400A 3022H 37 36 35 34 33 32 31 30 27 26 25 24 23 22 21 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address
52. 2M3 CL of large scale integrated circuits LSI are specifically tailored to meet the demands of Industrial Ethernet applications Key features include High speed real time deterministic low latency low jitter response for real time applications Low power consumption Integrated ARM Cortex M3 core for flexibility Integrated Real Time OS Accelerator with support for LITRON version 4 0 e Integrated Gigabit Ethernet MAC Dedicated DMA controller and buffer for the network processor e High performance with low CPU usage by offloading functions to Real Time OS Accelerator Multiple timers serial interfaces general purpose I O GPIO external memory interfaces R IN32M3 CL User s Manual 1 2 Overview Table1 1 1 OBOverview Overview of R IN32M3 CL 1 2 R IN32M3 CL man Product CPU cores ARM Cortex M3 32 bit RISC CPU Real Time OS Accelerator Hardware Real Time OS HW RTOS Operating frequency 100MHz Instruction set Thumb 2 instruction ARMv7 M architecture Instruction RAM 768KByte RAM w ECC Data RAM 512KByte RAM w ECC Buffer RAM Internal System Bus 64KByte RAM w ECC 32 bit system bus at 100MHz 128 bit communication bus at 100MHz DMA Bus System Bus Side 4 channels 1 channel for Real time port Supports software and various interrupt triggered DMA Boot options Serial Flash ROM Boot External Memory Boot External MCU Boot
53. 37 The status of the 32 bit port pins RPOO to RP37 is updated in synchronization with an interrupt from an on chip peripheral function Use the RPTRGMD register to specify whether to set a port to trigger synchronous port control mode in 1 bit units To select the trigger use the RPTFRO to RPTFR3 registers For details see R IN32M3 User s Manual Peripheral Functions FORT RTGAIO Interrupt select curcuit Figure 7 18 Configuration of Trigger Synchronous Ports R18UZ0005EJ0202 Page 88 of 89 Dec 25 2014 R IN32M3 CL User s Manual 8 7BElectrical Specifications 8 Electrical Specifications Please refer to R IN32M3 series datasheet for the Electrical Specifications R18UZ0005EJ0202 Page 89 of 89 Dec 25 2014 R IN32MS series Peripheral Function Revision History REVISION R IN32M3 CL User s Manual HISTORY Rev Date Description Page Summary 1 00 Preliminary 2013 2 8 First edition issued 1 00 Apr 03 2013 Dec 09 2013 overall Modification of English expressions overall overall Change the description of CC Link IE Field CC Link IE Field Slave CC Link IE Field Intelligent device station Change the description of CC Link CC Link Slave CC Link Remote device station Modification of the contents of 1 1 Introduction Modification of the status of ETH MDC during the reset of 2 1 1 Ethernet Si
54. 3H Port mode control register 4 8 bits PMC4B 400A 3024H Port mode control register 5 8 bits PMC5B 400A 3025H Port mode control register 6 8 bits PMC6B 400A 3026H PMC7B 400A 3027H Port mode control register O 16 bits 400A 3020H Port mode control register 2 16 bits 400A 3022H Port mode control register 4 16 bits Port mode control register 6 16 bits 400A 3024H 400A 3026H Port mode control register 7 8 bits Port mode control register 0 32 bits 400A 3020H Port mode control register 4 32 bits 400A 3024H Port function control register O 8 bits 400A 3030H Port function control register 1 8 bits 400A 3031H Port function control register 2 8 bits 400A 3032H Port function control register 3 8 bits 400A 3033H Port function control register 4 8 bits 400A 3034H Port function control register 5 8 bits 400A 3035H Port function control register 6 8 bits 400A 3036H Port function control register 7 8 bits 400A 3037H Port function control register O 16 bits 400A 3030H Port function control register 2 16 bits 400A 3032H Port function control register 4 16 bits 400A 3034H Port function control register 6 16 bits 400A 3036H Port function control register O 32 bits 400A 3030H Port function control register 4 32 bits 400A 3034H R18UZ0005EJ0202 Page 47 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function
55. 6 5 4 3 2 1 0 Address SI amp ISISINININI amp SINNIZIe NINISIS 0270 DRCTLRP2L E ESA E sS SE m CER 4 Initial value mS mm a a o o gt 2 10 92 2 0 92 2 IS S 0000 5559H RIW 0 0 0 0 0 0 0 0 O 0 RW RW RW RW R W RW R W R W R W R W R W RW R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RIR _ o BASE 0274H SISSENER esas sess DRCTLRP2H clo tr Initial 01096 8161615161 5 101010 01010 ola lo ole lo O d E nitial value ale ojo gt P S S 2 2 S S 2 0000 5555H R W 000 0 0 0 0 0 OR 1 gt Bit position Bitname Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIORP2n Specify whether to connect a pull up or pull down resistor to the RP27 to RP20 pins PDIORP2n Connection of a pull up or pull down resistor to the RP27 to RP20 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLRP2n1 Specify the driving capability of the RP27 to RP20 pins IOLRP2nO IOL1 IOLO Driving capability of RP27 to RP20 pins 1 1 12mA Other than above Setting prohibited Remark 7
56. 7 6BPort function 2 3 Pin PMCmn 0 port mode 1 control mode nam PFCEmn 0 PFCEmn 1 e PMmn 0 PMmn 1 PFCmn 0 1 0 1 output port input port P30 P30 output mode P30 input mode RXD1 P31 P31 output mode P31 input mode TXD1 P32 P32 output mode P32 input mode DMAREQZ1 CCS MON1 P33 P33 output mode P33 input mode DMAACKZ1 WAITEDGEH CCS MON2 P34 P34 output mode P34 input mode DMATCZ1 WRLENH CCS MON3 P35 P35 output mode P35 input mode CSISCK1 INTPZ22 182 P36 P36 output mode P36 input mode CSISI1 INTPZ23 CCS FUSEZ P37 P37 output mode P37 input mode CSISO1 INTPZ24 CCM_MSTZ P40 P40 output mode P40 input mode 1 HA1 P41 P41 output mode P41 input mode WAITZ HWAITZ P42 P42 output mode P42 input mode SLEEPING HERROUTZ CCM_SDGCZ P43 P43 output mode P43 input mode INTPZ11 HBUSCLK P44 P44 output mode P44 input mode CSZ1 HPGCSZ P45 P45 output mode P45 input mode CSISCKO WAITZ1 P46 P46 output mode P46 input mode CSISIO WAITZ2 P47 P47 output mode P47 input mode CSISOO WAITZ3 P50 P50 output mode P50 input mode CSZ3 LNKRUNZ CCS LNKRUNZ P51 P51 output mode P51 inpu
57. 8 Contents of figures Memory map ALD siepe abite denen Hi 29 Memory map Peripheral registers area eese nennen nennen 30 Memory map External memory 31 Memory map CC Link Master cono cono eene ener trennen trennen 31 External MCU interface area eee eter ER Feo Ene 32 Data sampling timing example 41 Basic port circuit configuration 45 Port registers in 8 bit notation 52 Port registers in 16 bit 2 nono ccoo nn nro nc 53 Port registers 1m 32 bit notation 54 Port mode registers in 8 bit notation n nasua 55 Port mode registers in 16 bit notation n n nennen en nennen nnne nnne 56 Port mode registers in 32 bit notation 57 Port mode control registers in 8 bit notation 58 Port mode control registers in 16 bit notation assasi 59 Port mode control registers in 32 bit notation eene nennen nennen 60 Port function control registers in 8 bit notation eene 61 Port function control registers in 16 bit
58. A Resistor select function 50 Pull up or 50 Pull down or less 2 5 6 Operation Mode Setting Signals Pin Name BOOTO BOOT1 I O MEMIFSEL BUS32EN HIFSYNC HWRZSEL MEMCSEL ADMUXMODE Interface Input Buffer 3 3V Schmitt in 5 7 CC Link IE Field aku Intelligent device station Pin Name Interface Recommended connection when not in use Recommended connection when not in use CLK2 097M ji Input Buffer 3 3V 2 097152MHz clock input Caution This pin is needed clock input even if user does not use CC Link IE Field function CC Link mE Intelligent device station Remote device station Pin Name Interface Recommended connection when not in use CCM CLK80M Input Buffer 3 3V Connect to GND Trace Pin Name Interface Recommended connection when not in use TRACECLK Output Buffer 3 3V 6mA TRACEDATA 3 0 R18UZ0005EJ0202 Dec 25 2014 Page 28 of 89 R IN32M3 CL User s Manual 3 Memory Maps FFFF FFFFH Cortex M3 System level area 512Mbyte E000 0000H DFFF FFFFH Reserved 4400 0000H 43FF FFFFH bitband alias area 32Mbyte 4200 me 400F area 400F 9FFFH CC Link Master memory area 8Kbyte 400F AFFFH CC Link Master 400F 7FFFH Reserved System area Reserved 4014 0000H 4013 FFFFH CC Link IE Field Network area 4010 000
59. C D m 0 lt 0 gt D LENESAS R IN32M3 Series User s Manual R IN32M3 CL information of mention is things at the time of this document publication and Renesas Electronics may change the product or specifications that are listed in this document without a notice Please confirm the latest information such as shown by website of Renesas Document number R18UZ0005EJ0202 Issue date Dec 25 2014 Notice Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical inform
60. CTXD1 CCI PHYREZ1 P57 TIN2 TOUT2 CCI PHYREZO R18UZ0005EJ0202 Page 11 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 3 4 Port Level during reset amp 1 2 3 4 6 60 SCLO Hi Z P61 SDAO With internal P62 RTDMAREQZ CCM MDINO pull up resistor P63 RTDMAACKZ CCM MDIN1 P64 RTDMATCZ CCM MDIN2 P65 DMAREQZO MDIN3 P66 DMAACKZO CCI INTZ P67 DMATCZO 7 70 51 500 CCS STATION NO 0 CCM SNINO P71 CSICSO1 CCS STATION NO 1 SNIN1 P72 CSICS10 CCS STATION NO 2 CCM SNIN2 P73 CSICS11 CCS STATION 3 SNIN3 P74 INTPZ12 CCS STATION NO 4 SNIN4 P75 INTPZ13 CCS STATION NO 5 SNIN5 P76 INTPZ14 CCS STATION NO 6 SNIN6 P77 INTPZ15 CCS STATION NO 7 CCM SNIN7 R18UZ0005EJ0202 Page 12 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function RPOx RP3x are Real time ports which can transfer data via a dedicated DMA comtroller and are unaffected by bus congestion They are able to perform input and output of the port by 32 bit unit in sync with DMA transfer trigger by DMA Controller for exclusive use of the Real time port 4 4 Port Level during reset amp 1 2 3 4 Tops
61. CU I F JTAGSEL Set operation mode of JTAG port OSCTH Input High level in case of external clock input mode BOOTO BOOT1 Select boot mode MEMCSEL Selection of internal memory controller ADMUXMODE Set Multiplex of address and data 2 4 Buffer function conversion function Real time port signal and apart of port signal can select the drive capability and pulling up pull down resistor or not of interface buffer programmably This function provides stable operation in system of big load capacity by raising the drive capability Please set the buffer function conversion register DRCTL to convert the buffer function Please refer to R IN32M3 User s Manual Peripheral functions edition for the detail of buffer function conversion register DRCTL R18UZ0005EJ0202 Page 23 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 5 2 5 1 1 PHY Interface Signals Pin Name Ethernet Signals I O Interface 2 1BSignals by function Buffer Types and Recommended Connections for Unused Pins Recommended connection when not in use ETHO TXC Input Buffer 3 3V Connect to GND ETHO GTXC BUF 3 3V GMII with IOLH Control Open ETHO TXEN ETHO TXER ETHO TXDO ETHO TXD7 ETHO GE INT Input Buffer 3 3V Connect to GND ETHO RXC BID BUF 3 3V GMII MII with IOLH Control Connect to GND ETHO RXDV ETHO RXER ETHO RXDO ETHO RXD7 ETHO CRS ETHO COL ETH1 TXC
62. DRCTLRPOL 4001 0260H Buffer function change register RPOH Buffer function change register RP1L DRCTLRPOH DRCTLRP1L 4001 0264H 4001 0268H Buffer function change register RP1H DRCTLRP1H 4001 026CH Buffer function change register RP2L DRCTLRP2L 4001 0270H Buffer function change register RP2H DRCTLRP2H 4001 0274H Buffer function change register RP3L DRCTLRP3L 4001 0278H Buffer function change register RP3H R18UZ0005EJ0202 Dec 25 2014 DRCTLRP3H 4001 027CH Page 51 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 3 1 Port registers P RP The R IN32M3 EC incorporates twelve 3 state I O ports Input or output mode can be specified in 1 bit units For output ports the port register can be used to write the output level If a port register is read the value of the output latch is read Use the PINn or RPINm register to read the pin level Address Initial 7 6 5 4 3 2 1 0 value POB P07 P06 P05 4 2 1 00 400A 3000H 00H P1B P17 P16 P15 P14 P13 P12 P11 P10 400A 3001H 00H P2B P27 P26 P25 P24 P23 P22 P21 P20 400A 3002H 00H P3B P37 P36 P35 P34 P33 P32 P31 P30 400A 3003H 00H 4 47 46 45 44 43 42 41 40 400 3004 00H P5B P57 P56 P55 P54 P53 P52 P51 P50 400A 3005H 00H P6B P67 P66 P65 P64 P63 62 61 60 400 3006 00H P7B P77 P76 P75 P74 P73 P72 P71 P70 400A 3007H 00H RPOB RPO7 RP06 05
63. EJ0202 Page 60 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 3 4 Port function control registers PFC RPFC These registers are used to specify which alternate function is used These registers can be set in 1 bit units Address Initial 7 6 5 4 3 2 1 0 value PFCOB PFCO7 PFCO5 PFC04 2 0 0 400 3030 00H PFC1B 0 0 0 0 0 PFC12 11 PFC10 4004 3031H 00H PFC2B PFC27 PFC26 0 PFC24 0 0 0 0 400A 3032H ee PFC3B PFC37 PFC36 PFC35 PFC34 PFC33 PFC32 0 0 400A 3033H 9 47 46 45 44 PFC43 42 41 PFC40 400A3034H OH 5 57 0 0 54 PFC53 PFC52 0 0 400A 3035H PFC6B 0 0 0 0 0 0 0 0 400A 3036H 00H PFC7B 0 0 0 0 0 0 0 0 400A 3037H 00H RPFCO7 RPFCO6 0 0 0 0 RPFCO1 RPFCOO 400A 3430H 00H RPFC1B 0 0 0 0 0 0 0 0 400A 3431H 00H RPFC2B RPFC27 RPFC26 RPFC25 RPFC24 0 0 0 RPFC20 400A 3432H 00H 0 0 0 0 0 0 0 0 400 3433 00H Bit position Function 7100 Specify whether to use alternate functions 1 and 3 or alternate functions 2 and 4 Note 2 Note 3 RPFCmn 0 Alternate function 1 Alternate function 3 1 Alternate function 2 Alternate function 47793 Figure 7 11 Port function control registers in 8 bit notation Notes 1 The initial value depends on the pin status For details see 2 2 Port status 2 Touse alte
64. ETH1 GTXC ETH1 TXEN ETH1 TXER ETH1 TXDO ETH1 TXD7 ETH1 GE INT Input Buffer 3 3V BID BUF 3 3V GMII with IOLH Control Input Buffer 3 3V Connect to GND Connect to GND ETH1 RXC ETH1 RXDV ETH1 RXER ETH1 RXDO ETH1 RXD7 BID BUF 3 3V GMII MII with IOLH Control Connect to GND ETH1 CRS ETH1 COL Input Buffer 3 3V Connect to GND ETH MDC Output Buffer 3 3V Open ETH MDIO R18UZ0005EJ0202 Dec 25 2014 I O I O Buffer 3 3V 6mA Connect to GND Page 24 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 5 2 External Memory MCU Interface Signals Pin Name 1 0 Interface Recommended connection when not in use BUSCLK O Output Buffer 3 3 9mA Open CSZO HCSZ I O Buffer 3 3V 6mA 50 Pull up Open A2 A20 HA2 HA20 1 0 I O Buffer 3 3V 6mA 50kO Pull down Open 00 015 HDO HD15 RDZ HRDZ 1 0 I O Buffer 3 3V 6mA 50kQ Pull up Open WRSTBZ HWRSTBZ WRZO WRZ1 BENZO BENZ1 HWRZO HWRZ1 2 5 3 System Signals Pin Name Interface Recommended connection when not in use NMIZ Input Buffer 3 3V Schmitt in Connect to VDD33 3 3V 50 Pull up XT1 Oscillator with EN Connect to GND XT2 RSTOUTZ O Output Buffer 3 3V 6mA Open RESETZ Input Buffer 3 3V Schmitt in PONRZ HOTRESETZ Co
65. FH External memory area 256Mbyte 1400 0000H 1000 0000H 13FF FFFFH OFFF FFFFH Buffer memory area 128Mbyte 0800 0000H Reserved CSZ3 area 64Mbyte CSZ2 area 64Mbyte CSZ1 area 64Mbyte CSZ0 area 64Mbyte Figure 3 3 Memory map External memory area Reserved 400F A37FH 400F A100H CC Link Master 1 0 area 4Kbyte Reserved 400F 9CFFH 400F 9000H CC Link Master memory area receive buffer 3328byte Reserved Reserved 400F 8 00 CC Link Master memory area 1 256byte 400F BFFFH Reserved CC Link Slave area 4Kbyte 400F 8B9FH 400F 400F 8800H CC Link Master memory area transmit buffer2 924byte 400F AFFFH Reserved CC Link Master area 4Kbyte 400F 84FFH 400F 400F 8400H CC Link Master memory area PATO 256byte 400F 9FFFH Reserved CC Link Master memory area 8Kbyte 400F 839FH 400F 8000H 400F 8000H Reserved Figure 3 4 Memory map CC Link Master area Caution1 CC Link Master shows function block of Intelligent station CC Link Master memory area transmit buffer1 924byte 2 CC Link Slave shows function block of remote device station R18UZ0005EJ0202 Dec 25 2014 Page 31 of 89 R IN32M3 CL User s Manual 3 2BMemory Maps Internal SRAM area T FFFFH CC Link IE Field 13 FFFFH
66. M77 PM76 PM75 PM74 PM73 PM72 PM71 PM70 PM67 PM66 PM65 PM64 PM63 PM62 PM61 400A 3016H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Rw Initial value FFFFH 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 55 RPMOH RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM 400 3410H 17 16 15 14 13 12 11 10 07 06 05 04 03 02 01 00 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value FFFFH 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM RPM 400A 3412H 37 36 35 34 33 32 31 30 27 26 25 24 23 22 21 20 RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value FFFFH 15100 Set the port to input or output mode RPMIn 0 Output mode output buffer is on 1 Input mode output buffer is off initial value Figure 7 6 Port mode registers in 16 bit notation Remark 0to3 m 0to7 n 0to7 18170005 0202 56 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3010H Initial value PMOW
67. O 2121212121212 212121212 21212121212 2212 2212 Z Z 2 Z Z a a a a a a a la R W R R RR R 24 23 21 20 18 17 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3450H Initial value RPINOW 10 x nlolw ee 2222222 z 2 2 2Z 2 21212 2 Z 2 Z 2 222 2 79079 a a a a a a a a a oc ac ac c RW R R R R R R R R R Bit position Bit name Function 31to 0 PINmn RPINIn Use to read the input level of the port pin Remark 0103 0 7 0 7 R18UZ0005EJ0202 Page 69 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 4 Available combinations of alternate functions 7 6BPort function The combinations of alternate functions that can be specified by using the port related registers are shown below 1 Ports POO to P77 1 3 Pin PMCmn 0 port mode 1 control mode nam PFCEmn 0 PFCEmn 1 e PMmn 0 1 0 1 0 1 output port input port output mode POO input mode INTPZO RUNLEDZ P01 PO1 output mode PO1 input mode INTPZ1 PO2 output mode 2 input mode INTPZ2 DLINKLEDZ output mode input mode INTPZ3 ERRLEDZ CCS MON5 P04 P04 output mode PO4 inpu
68. PM7B 77 76 75 74 7 72 71 PM70 400A 3017H FFH RPMOB RPMO7 RPM06 RPM05 RPM04 2 1 400 3410 1 RPM17 RPM16 RPM15 RPM14 RPM13 RPM12 RPM11 RPM10 400A 3411H FFH RPM2B RPM27 RPM26 RPM25 RPM24 RPM23 RPM22 RPM21 RPM20 400A 3412H FFH RPM3B RPM37 RPM36 RPM35 RPM34 RPM33 RPM32 RPM31 RPM30 400A 3413H FFH Bit position Function 7100 PMmn Set the port to input or output mode RPMIn 0 Output mode output buffer is on 1 Input mode output buffer is off initial value Figure 7 5 Port mode registers in 8 bit notation Remark 0to3 m 0to7 n 0to7 R18UZ0005EJ0202 Page 55 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PMOH PM17 PM16 PM15 PM14 PM13 PM12 PM11 PM10 PMO7 PMOG PMOS PM04 PMO3 PMO2 PMO1 PMOO 400A 3010H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value FFFFH 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PM2H PM37 PM36 PM35 PM34 PM33 PM32 PM31 PM30 PM27 PM26 PM25 PM24 PM23 PM22 PM21 20 400A 3012H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value FFFFH 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PM4H PM57 PM56 PM55 PM54 PM53 PM52 PM51 PM50 PM47 PM46 PM45 PM44 PM43 PM42 PM41 400A 3014H RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value FFFFH 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PM6H P
69. RA RW RW 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11109 8 7 6 5 4 3 2 1 0 Address 0 0 gt BASE 026CH a 2 2 DRCTLRP1H tc n 1 n CC Cla la Initial value 0 0o o o o o o o o o O o S SE SS EE SS E 5 6 le ala 9 9 2 2 9 9 72 2 99 2 8 9 9 00009999H R W 0 0 0 0 0 0 0 OR 1 gt gt gt 2 Bit position Bit name Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIORP1n Specify whether to connect a pull up or pull down resistor to the RP17 to RP10 pins PDIORP1n Connection of a pull up or pull down resistor to the RP17 to RP10 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLRP1n1 Specify the driving capability of the RP17 to RP10 pins IOLRP1n0 IOL1 IOLO Driving capability of RP17 to RP10 pins 1 1 12mA Other than above Setting prohibited Remark 71 00 R18UZ0005EJ0202 Page 84 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 11 Real time port 2 Buffer function change register DRCTLRP2L DRCTLRP2H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7
70. RcTLRPOH 0 0 0 0 010 0 010 01010 0 0 e S m s ele initial value SEIS I 2 2 9 9072 2 9 09 2 8 0 9 2 0000 9999H Bit position Bit name R W 0 0 0 0 0 0 0 OR 1 Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIORPOn PDIORPOn Specify whether to connect a pull up or pull down resistor to the RPO7 to pins Connection of a pull up or pull down resistor PUIO PDIO Lap dnd NDA to the RPO7 to pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLRPOn1 IOLRPOnO Specify the driving capability of the 7 to pins IOL1 IOLO Driving capability of RPO7 to RPOO pins 12 mA Other than above Setting prohibited Remark 71 00 R18UZ0005EJ0202 Dec 25 2014 Page 83 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 5 10 Real time port 1 buffer function change registers DRCTLRP1L DRCTLRP1H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11109 8 7 6 5 4 3 2 1 0 Address o o BASE 0268H DRCTLRP1L olo olo olo 2 5 1 122 51 22 Initial val a a nitial value a a 9 9 2 2 9 92 2 9 92 0000 9999H RW 000000000 0 0 0 RW RW RA RW RW RW RW RW RAW RW RAW
71. Reserve Reserve Reserve Reserve Reserve R18UZ0005EJ0202 Dec 25 2014 Reserve Page 36 of 89 R IN32M3 CL User s Manual Cause group Reserve 4 3BException handling function 4 4 Connection INTCCISYCO 122 INTCCISYNCI CC Link IE Synco interrupt CC Link IE Synci interrupt 123 INTCCINMIZ CC Link IE NMIZ interrupt 124 INTCCIWDTZ CC Link IE WDTZ interrupt 125 INTCCIINTZ CC Link IE INTZ interrupt 126 INTCCICLKLOSSZ CC Link IE CLKLOSSZ interrupt 127 INTCCIMONO CC Link IE MONO interrupt 128 INTCCIMON1 129 INTCCIMON2 CC Link IE interrupt CC Link IE MON2 interrupt O O O 130 INTCCIMON3 CC Link IE interrupt 131 INTCCMRQ CC Link INTRQ interrupt 132 INTCCSRFSTB CC Link RFSTB interrupt 133 CC Link interrupt O O O O O Note use CC Link remote device station V2 0 INTCCSRFSTB can not used It is necessary to connect a CCS REFSTB P10 terminal to an external interrupt terminal INTPZ R18UZ0005EJ0202 Dec 25 2014 Page 37 of 89 R IN32M3 CL User s Manual 5 Periphera
72. S MONS3 With internal pull up resistor CCS MON4 Monitor port P11 Hi Z With internal pull down resistor CCS MONO O Monitor port P06 Hi Z CCS 5 Monitor port P03 P05 With internal CCS MON7 pull up resistor CCS RESOUT reset port P07 High CCS IOTENSU Initial setting port P22 CCS SENYUO Initial setting port P23 CCS SENYU1 Initial setting port P24 CCS ERRZ Operation check LED port P25 Low CCS RUNZ Operation check LED port P26 Low CCS STATION NO O I Station No setting switch port P70 P77 CCS STATION NO 7 CCS LNKRUNZ Link RUN LED control port P50 Low Hi Z CCS REFSTB Interrupt port P10 High With internal CCS WDTZ Watchdog Timer port P13 Low pull up resistor CCS RDLEDZ O Receive data LED control port P51 Low CCS RD Data receive port P53 CCS SD O Data transfer port P54 CCS SDLEDZ Operation check LED port Low CCS SDGATEON O Transfer data amp gate control port 52 High Hi Z With internal pull down resistor CCS BS1 Baud rate setting switch port RP02 Hi Z CCS BS2 Baud rate setting switch port With internal CCS BS4 Baud rate setting switch port RP04 pull up resistor CCS BS8 Baud rate setting switch port RP05 CCS FUSEZ Fuse cutting signal port P36 Low CCM CLK80M R18UZ0005EJ0202 Dec 25 2014 CC Link clock Page 19 of 89 R IN32M3 CL User s Manual 2 1 16 Pin Name 1 0 System Signals Function Crystal Oscillator
73. ared Active Level during reset 4 Port Level after reset PHYLINKO PHY Link port P06 P07 High Hi Z PHYLINK1 for EtherSwitch With internal ETHSWSECOUT EtherSwitch Event par 1sec output port P24 High pull up resistor R18UZ0005EJ0202 Page 7 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 2 External Memory Interface Signals Shared Level during Pin Name 1 0 Function Shared Signal Active port reset reset BUSCLK O Bus clock output port CSZ0 Chip select signal HCSZ Low Hi Z CSZ1 HPGCSZ P44 With internal pull up CSZ2 51 resistor CSZ3 50 1 Address output port HA1 P40 Hi Z Low With internal pull up resistor A2 A20 2 20 Hi Z A21 A27 21 With Hi Z RP27 internal With D0 D15 VO Data bus port HDO HD15 pull down internal resistor pull down resistor D16 D31 99 VO HD16 HD31 RP30 Hi Z RP37 With internal pull up RP10 resistor RP17 RDZ O Read strobe output port HRDZ Low Hi Z High WRSTBZ O Write strobe output port HWRSTBZ Low With WRZO WRZ1 O Effectively Byte lane HWRZO HWRZ1 Low internal BENZO BENZ1 strobe output port HBENZO HBENZ1 pull up WRZ2 WRZ3 O HWRZ2 HWRZ3 RPO6 resistor BENZ2 BENZ3 HBENZ2 HBENZ3 7 WAITZ Wait signal input port HWAITZ P41 Low Hi Z WAITZ1 WAITZ3 45 47 With internal pull up N
74. ation described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster Systems anti crime systems and safety equipment etc Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury artificial life support devices or systems surgical implantations etc or may cause serious property damages nuclear reactor control systems
75. d Unit 06 02 Hyflux Innovation Centre Singapore 339949 Tel 65 6213 0200 Fax 65 6213 0300 Renesas Electronics Malaysia Sdn Bhd Unit 906 Block B Menara Amcorp Amcorp Trade Centre No 18 Persiaran Barat 46050 Petaling Jaya Selangor Darul Ehsan Malaysia Tel 60 3 7955 9390 Fax 60 3 7955 9510 Renesas Electronics Korea Co Ltd 11F Samik Lavied or Bldg 720 2 Yeoksam Dong Kangnam Ku Seoul 135 080 Korea Tel 82 2 558 3737 Fax 82 2 558 5141 2013 2014 Renesas Electronics Corporation All rights reserved
76. e internal hardware of R IN32M3 and external port R18UZ0005EJ0202 Page 33 of 89 Dec 25 2014 R IN32M3 CL User s Manual 4 2 Interrupt list 4 3BException handling function These interrupts are exceptions interrupt after the Exception No 16 that are assigned NVIC of Cortex M3 CPU In R IN32M3 the interrupts from the internal hardware of R IN32M3 and external port connect to not only NVIC of Cortex M3 but also the internal Hardware Real time OS starting trigger of internal DMAC and timer R IN32M3 supports the following interrupts Table4 1 Interrupt list Cause group 1 4 Connection INTIICBOTIA IICBO transmission reception interrupt request INTIICB1TIA IICB1 transmission reception interrupt request INTFCNOREC INTFCNOTRX FCNO reception completion FCNO transmission completion INTTAUJ2IO Timer array TAUJ2 channel 0 interrupt O O O O O INTTAUJ211 Timer array TAUJ2 channel 1 interrupt O O O O O 18 INTTAUJ212 Timer array TAUJ2 channel 2 interrupt O O O O O 19 INTTAUJ2I3 Timer array TAUJ2 channel 3 interrupt O O O O O 20 INTUAJOTIT UARTJO transmission interrupt O O O O O 21 INTUAJOTIR UARTJO reception interrupt O O O O O 22 INTUAJITIT UARTJ1 transmission interrupt O O O O O 23 INTUAJ1TIR UARTJ1 reception interrupt O O O O O 24 INTCSIHOIC CSIHO communication status interrupt 25 INTCSIHOIR CSIHO reception status interr
77. e of 2 5 8 CC Link Signal Intelligent device station Remote device station Addition of the contents of Note of INTCCSRFSTB register of 4 2 Inerruput list Addition the register of 6 1 1 CC Link IE Field Intelligent device station clock gate register C 1 R IN32MS series Peripheral Function Revision History Rev Date Description Page Summary 2 00 Feb 07 2014 41 Addition the register of 6 1 2 CC Link IE Field Intelligent device station wait delay register 42 Modification of Address of 6 1 4 CC Link IE Field Intelligent device station bus bridge control register CIESMC 57 Modification of initial value of PMOW PM4W and PRMOW registers of 7 3 2 Port mode registers PM RPM 2 01 Apr 18 2014 overall Modification of CC Link Signals Remote device station 17 Addition of the contents of Note of 2 1 13 CC Link IE Field Signals Intelligent device station 28 Modification of pin setting of 2 5 7CC Link IE Field Signal Intelligent device station 71 Addition of the signals of WAITEDGEH WRLENH of 7 4 Available combinations of alternate functions 2 02 Dec 25 2014 3 Change status for Intelligent device station for CC Link in 1 3 Overview 80 Remove IOLP521 IOLP520 bit at 7 5 6 Port 5 buffer function change registers DRCTLP5L DRCTLP5H because driving capability of P52 is fixed to 6mA 2 R IN32M3 series Peripheral Function Revision History
78. egulations and follow the procedures required by such laws and regulations 10 It is the responsibility of the buyer or distributor of Renesas Electronics products who distributes disposes of or otherwise places the product with a third party to notify such third party in advance of the contents and conditions set forth in this document Renesas Electronics assumes no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products 11 This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics 12 Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics Instructions for the use of product In this section the precautions are described for over whole of CMOS device Please refer to this manual about individual precaution When there is a mention unlike the text of this manual a mention of the text takes first priority 1 Handling of Unused Pins Handle unused pins in accord with the directions given under
79. er 6 8 bits P6B 400A 3006H Port register 7 8 bits P7B 400A 3007H o la IJ Port register 0 16 bits POH 400A 3000H Port register 2 16 bits P2H 400A 3002H Port register 4 16 bits 400 3004 Port register 6 16 bits P8H 400A 3006H Port register 0 32 bits POW 400A 3000H Port mode register 6 8 bits 400A 3016H Port register 4 32 bits 400A 3004H Port mode register O 8 bits PMOB 400A 3010H Port mode register 1 8 bits PM1B 400A 3011H Port mode register 2 8 bits PM2B 400A 3012H Port mode register 3 8 bits 400 3013 Port mode register 4 8 bits PM4B 400A 3014H Port mode register 5 8 bits PM5B 400A 3015H 400A 3017H Port mode register 0 16 bits Port mode register 2 16 bits 400A 3010H 400A 3012H Port mode register 4 16 bits 400A 3014H Port mode register 6 16 bits 400A 3016H Port mode register 0 32 bits 400A 3010H Port mode register 7 8 bits Port mode register 4 32 bits R18UZ0005EJ0202 Dec 25 2014 400A 3014H Page 46 of 89 R IN32M3 CL User s Manual Register name Symbol 7 6BPort function Address 2 6 Port mode control register 0 8 bits 400A 3020H Port mode control register 1 8 bits 400A 3021H Port mode control register 2 8 bits 400A 3022H Port mode control register 3 8 bits 400A 302
80. ess PINOH 400A 3050H 14 11 PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN 17 16 15 14 13 12 11 10 07 06 05 04 02 01 00 Initial value Undefined Address PIN2H 400A 3052H Initial value Undefined Address 400 3054 Initial value Undefined Address PIN6H 400A 3056H Initial value Undefined Address RPINOH 400A 3450H Initial value Undefined 0 Address 14 RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN RPIN oa 400A 3452H 37 36 35 34 33 32 31 30 27 26 25 24 23 22 21 Initial value Undefined 15 to 0 PINmn Use to read the input level of the port pin RPINIn Figure 7 17 Port pin input registers in 16 bit notation RPIN2H Remark 0103 0107 01 07 R18UZ0005EJ0202 Page 68 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 Address 400A 3050H Initial value PINOW Undefined NIN 212 121212121212 Z Z 21212 2 Z Z Z Z Z Z Z Z Z Z Z Z Z Z a a a a a a a R W R RRRRRRRR 24 23 22 21 20 19 18 17 16 15 14 13 Address 400A 3054H Initial value PIN4W 4 2 10 Undefined LO LO L
81. et amp Port Level after reset CCI_RUNLEDZ RUN LED control port Hi Z CCI_DLINKLEDZ Cyclic communication status check With internal LED control port pull up resistor CCI ERRLEDZ O Field Network Error LED control port LERR1LEDZ O Link error LED control port 1 LERR2LEDZ O Link error LED control port 2 SDLEDZ Transfer data LED control CCI RDLEDZ O Receive data LED control port P07 Low NMIZ Output NMI interrupt to P12 Low Hi Z CCI WDTIZ Input from Watchdog Timer P13 Low With internal WAITEDGEH Note 1 0 Wait Synchronized edge setting P33 pull up resistor 0 rise edge mode 1 low edge mode CCI_WRLENH 1 0 WRL enable setting P34 0 byte write enable mode 1 byte enable mode CCI_PHYREZ1 O PHY reset output 1 port P56 Low CCI PHYREZO O PHY reset output 0 port 57 INTZ Output Interrupt signal to P66 Low CLK2 097M 2 097152MHz clock Note R18UZ0005EJ0202 Dec 25 2014 When user does boot with the external memory boot mode external serial flash ROM boot mode and instruction RAM boot mode please input high level to P33 and P34 pin during reset If you enter a low level to P33 P34 pin during reset you can not access the CC Link IE Field from the CPU of the R IN32M3 Page 17 of 89 R IN32M3 CL User s Manual 2 1BSignals by function Dec 25 2014 2 1 14
82. et a value to the output latch Port mode registers PMn RPMm Port mode control registers PMCn RPMCm Used to read whether the port is in input or output mode Used to read whether the port is used as a port or as an alternate function pin Used to set the port to input or output mode Used to specify whether to use a port as a port or for an alternate function Port function control registers PFCn RPFCm Used to read which alternate function of the port is selected if the port has more than one alternate function Used to specify which alternate function of the port to be selected if the port has more than one alternate function Port function control expansion registers PFCEn RPFCEm Port pin input registers PINn RPINm Used to read which alternate function of the port is selected if the port has more than two alternate functions Used to read the input level of the port pin Used to specify which alternate function of the port to be selected in combination with the PFCn register setting if the port has more than two alternate functions Cannot be written Caution If a port that has multiple alternate functions including external interrupt input is set to control mode by using the PMCn register and if the alternate function is used in input mode the external interrupt input is also shared Remark n 0to7 m 0 3 R18UZ0005EJ0202 Dec 25 2014 Page 44 o
83. etails see 2 2 Port status Remark 0103 0107 0107 R18UZ0005EJ0202 Page 59 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 400A 3020H Initial value PMCOW Note 1 1 Sl S S a 5 0000 0000H 101010 10101010 1010 10 10 10 O O IO OI O 2121212 2 ER ER ER ER ER ER ER eel 2 o RAN R W R W R W R W R W R W RW R W RW RW R W RW RW RAW R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 O Address 400A 3024H Initial value PMCAW Note SISISISISIRIRIR o o
84. ety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations You should not use Renesas Electronics products or technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction When exporting the Renesas Electronics products or technology described in this document you should comply with the applicable export control laws and r
85. f 89 R IN32M3 CL User s Manual 7 6BPort function inpu inpu inpu Alteri inpu PMC initial value Write PMC Read PMC Write PFCE PFCE initial value PFC initial value Write PFC Write Port Write PM Read PM ternate ternate ternate ternate Inaci Inaci Inaci Inaci ternate funci outpu Iternate func outpu unc ive unc ive unci ive unci ive ati att ternate functi at nate functi attri tion 0 Level tion 1 Level tion 2 Level ion 3 Level ion 0 ribute ion 1 ribute Read PFCEmn Read Read PIN Output alternate function 0 Output alternate function 1 Output alternate function 2 Output alternate function 3 ternate ternate ternate ternate unction 0 unction 1 unction 2 unction 3 Figure 7 1 Basic port circuit configuration R18UZ0005EJ0202 Dec 25 2014 Page 45 of 89 R IN32M3 CL User s Manual 7 3 Registers Register name 8 bits Port register 0 7 6BPort function Address 400A 3000H Port register 1 8 bits P1B 400A 3001H Port register 2 8 bits P2B 400A 3002H Port register 3 8 bits P3B 400A 3003H Port register 4 8 bits P4B 400A 3004H Port register 5 8 bits P5B 400A 3005H Port regist
86. face Signals trennen 25 2 5 3 System Signals sagaer AER 25 2 5 4 Test Signals Aid ette eere ette s ete elt ite de 26 2 5 5 Port S1gnals eva AA eme metus 27 Comtents 1 2 5 6 Operation Mode Setting Signal iiec 28 2 5 7 CC Link IE Field Signal Intelligent device station enne nennen nennen 28 2 5 8 CC Link Signal Intelligent device station Remote device station 28 2 5 0 Trace SisnalS 28 3 Memory Maps uminnelige E SNO LO ET GA A AA 29 4 Exception handling 33 41 Exceptions et orte te GR to pe er 33 4 2 Interrupt hist an 34 5 AER 38 6 CC Link IE Field Intelligent device station Function a 39 6 1 CC Link IE Field Intelligent device station control register 39 6 1 1 CC Link IE Field Intelligent device station clock gate register CIECLKGTD 40 6 1 2 CC Link IE Field Intelligent device station wait delay register CIEWAITDLY 41 6 1 3 CC Link IE Field Intelligent device station bus size control register CIEBSC 42 6 1 4 CC Link IE Field Intelligent device station
87. ffer function change register DRCTLPSL DRCTLPSH eee 80 7 5 7 Port 6 Buffer function change register DRCTLP6L eene 81 Comtents 2 7 5 8 Port 7 Buffer function change register DRCTLP7L DRCTLPT7H 82 7 5 9 Real time port 0 Buffer function change register DRCTLRPOL DRCTLRPOH 83 7 5 10 Real time port 1 buffer function change registers DRCTLRPIL 84 7 5 11 Real time port 2 Buffer function change register DRCTLRP2L DRCTLRP2H 85 7 5 12 Real time port 3 Buffer function change register DRCTLRP3L DRCTLRP3H 86 7 6 Operation of port functions eit erri e ER e cape EH pei Sama Ure e e pe ree to 87 7 6 1 Reading and writing via ports 87 7 6 2 Alternate function pin output status in control 87 7 7 Trigger synchronous ports to 7 88 9 Electrical Specificatl ns ii 89 Comtents 3 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 3 5 Figure 6 1 Figure 7 1 Figure 7 2 Figure 7 3 Figure 7 4 Figure 7 5 Figure 7 6 Figure 7 7 Figure 7 8 Figure 7 9 Figure 7 10 Figure 7 11 Figure 7 12 Figure 7 13 Figure 7 14 Figure 7 15 Figure 7 16 Figure 7 17 Figure 7 1
88. gister 2 8 bits RPIN2B 400A 3452H RT port pin input register 3 8 bits RPIN3B 400A 3453H port pin input register 0 16 bits RPINOH 400A 3450H RT port pin input register 2 16 bits RPIN2H 400A 3452H RT port pin input register 0 32 bits RPINOW 400A 3450H R18UZ0005EJ0202 Page 50 of 89 Dec 25 2014 R IN32M3 CL User s Manual Register name Symbol 7 6BPort function Address 6 6 Buffer function change register POL DRCTLPOL 4001 0220H Buffer function change register POH DRCTLPOH 4001 0224H Buffer function change register P1L DRCTLP1L 4001 0228H Buffer function change register P1H DRCTLP1H 4001 022CH Buffer function change register P2L DRCTLP2L 4001 0230H Buffer function change register P2H DRCTLP2H 4001 0234H Buffer function change register P3L DRCTLP3L 4001 0238H Buffer function change register P3H DRCTLP3H 4001 023CH Buffer function change register P4L DRCTLPAL 4001 0240H Buffer function change register P4H DRCTLP4H 4001 0244H Buffer function change register P5L Buffer function change register P5H DRCTLP5L DRCTLP5H 4001 0248H 4001 024CH Buffer function change register P6L DRCTLP6L 4001 0250H Buffer function change register DRCTLP6H 4001 0254H Buffer function change register P7L DRCTLP7L 4001 0258H Buffer function change register P7H DRCTLP7H 4001 025CH Buffer function change register RPOL
89. gnals Modification of the contents of Note of 2 1 1 Ethernet Signals Standby mode deletion Modification of the status of BUSCLK during the reset of 2 1 2 External Memory Interface Signals Addition of synchronous burst access MEMC information of 2 1 2 External Memory Interface Signals Modification of the status of HDO HD15 HBCYSTZ during the reset of 2 1 3 External MCU Interface Signals 20 Modification of PONRZ function of 2 1 16 System Signals Addition the signals of HOTRESETZ VDDQ CLKOUT25MO CLKOUT25M1 of 2 1 16 System Signals 22 overall Modification of the contents of Note1 and Note2 of 2 2Port status Modification of the supported station of CC Link Feb 07 2014 4 Modification of block diagram of 1 3 INTERNAL BLOCK DIAGRAM 6 21 Addition the status after reset timing of 2 1 Signals by function 17 Addition explanation of Function of 2 1 13 CC Link IE Field Signals 19 CLK80M pins to list of 2 1 15 CC Link Signals Remote device station 21 Modification of Boot mode select of 2 1 18 Operation mode Setting Signals 22 Addition of Synchronous burst MEMC of 2 2 Port status 25 Addition of the signals of CLKOUT25M0 CLKOUT25M1 of 2 5 3 System Signals Addition of a resistor value of Pull up down of 2 3 5 Port Signals Modification of a description of the drive current of P30 P31 P52 P61 P64 of 2 3 5 Port Signals Modification of title nam
90. ial flash ROM boot 10 External boot 11 Instruction RAM boot debugger used ONLY MEMIFSEL External Memory Interface select port 0 Slave memory Interface 1 External MCU Interface BUS32EN External Memory Interface Bus width select port 0 16bit bus 1 32bit bus HIFSYNC External MCU I F Operation mode select port 0 asynchronous SRAM Interface 1 synchronous SRAM Interface HWRZSEL External Interface HWRZ HBENZ select port 0 HBENZ use 1 HWRZ use MEMCSEL Internal Memory Controller select port 0 asynchronous SRAM MEMC 1 synchronous burst access MEMC Note ADMUXMODE Multiplex of Address Data port 0 Separate 1 Multiplex of Address Data Note ADMUXMODE port is only available when MEMCSEL port is High which selects synchronous burst access MEMC The asynchronous SRAM MEMC does not support address data multiplexing R18UZ0005EJ0202 Page 21 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 2 Port status The initial status of Port function after the reset cancellation varies according to the status of the operation mode setting signal External memory boot Asynchronous MEMC Synchronous burst MEMC External MPU boot 16bit 32bit 16bit 32bit 14 14 External Serial Flash ROM boot P15 P15 P16 P16 P17 P17 1 40 HWAITZ HWAITZ
91. ing prohibited Remark n 7to0 R18UZ0005EJ0202 Dec 25 2014 Page 75 of 89 R IN32M3 CL User s Manual 7 6BPort function 7 5 2 Port 1 Buffer function change register DRCTLP1L DRCTLP1H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address BASE 0228H olo SA DRCTLP1L a ajla ala ala iti 0 0 0 0 0 0 Slo Slo 5 8 55 Initial value SR alm ale ale 0000 9959H RAN 0 0 0 0 0 0 0 O O O 0 O O O O 0RWRW O 1 O 1 1 R W R W R W R W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 41 10 9 8 7 6 5 4 3 2 41 O Address BASE 022CH NIN cO LO LO DRCTLP1H ola ola a a a a iti O 1 Initial value E Ala alm Gm 0000 9999H R W 0000000 00000000 1 RWRW O 1 RWRW 0 1 RWRW O 4 Bit position Bit name Function Reserved Be sure to write O to these bits If read 0 is returned PUIOP1n Specify whether to connect a pull up or pull down resistor to the P17 to P10 pins PDIOP1n Connection of a pull up or pull down resistor to the P17 to P10 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLP101 Specify the driving capability of the P10 pin IOLP100 IOL1 IOLO Driving capability of P10 pin 12mA Other than above Setting prohibited
92. ins 12mA Other than above Setting prohibited Remark n 7to0 R18UZ0005EJ0202 Page 77 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 4 Port 3 Buffer function change register DRCTLP3L DRCTLP3H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address Bit position BASE 0238H DRCTLP3L a a iti 0 0 0 0 0 0 olo Initial value 218 218 0000 9999 0 0 0 0 0 0 0 0 0 O O 0 RWRW O 1 O 1 O 1 RWRW O 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 43 12 41 10 9 8 7 6 5 4 3 2 1 0 55 BASE 023CH Bit name 0 1 Initial value 0000 9999H IOLP371 IOLP370 PUIOP35 PUIOP34 Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIOP3n PDIOP3n Specify whether to connect a pull up or pull down resistor to the P37 to P30 pins Connection of a pull up or pull down resistor to the P37 to P30 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLP371 IOLP370 Specify the driving capability of the P37 pin IOL1 IOLO Driving capability of P37 pin 12mA Other than above Setting prohibited Remark n 7400 R18UZ0005EJ0202 Dec 25 2014 Page 78 of 89 R IN32M3 CL User s Manual 7 6BPo
93. l function functions Clock function CPU Bus structure Hardware Real time OS Giga bit Ethernet I F Asynchronous SRAM MEMC Synchronous burst access MEMC Serial Flash ROM MEMC DMA function Timer Array Unit J TAUJ Window Watchdog Timer A WDTA Asynchronous Serial Interface J UARTJ Clocked Serial Interface H CSIH PC BUS CAN Controller FCN CC Link Intelligent device station CC Link Remote device station Other I F control Debug function R18UZ0005EJ0202 Dec 25 2014 5 4BPeripheral function Please refer to R IN32M3 User s Manual Peripheral functions edition for the detail of following peripheral Page 38 of 89 R IN32M3 CL User s Manual 6 5BCC Link IE Field Intelligent device station Function 6 CC Link IE Field Intelligent device station Function The outline specifications of CC Link IE Field are as follows Please refer to the following URL of CLPA for additional details and specifications for the CC Link IE Field core http www cc link org jp cclink cclinkie index html Table 6 1 CC Link IE Field outline specifications Item Specification Ethernet Standards IEEE802 3ab 1000BASE T compliant Communication speed 1Gbps Topology Line star ring Maximum number of connected units 254 modules total of master and slave stations Maximum station to station distance 100m 6 1 CC Link IE Field Intelligent device station control register This regi
94. n or less P30 P36 1 0 Programmable Buffer 3 3V 6mA Resistor select function 50 Pull up or 50kQ Pull down or less P37 1 0 Programmable Buffer 3 3V Load Drive select function 6mA 12mA Resistor select function 50 Pull up or 50kQ Pull down or less P40 P47 I O Programmable Buffer 3 3V 6mA Resistor select function 50 Pull up or 50 Pull down or less P50 P51 1 0 Programmable Buffer 3 3V Load Drive select function 6mA 12mA Resistor select function 50 Pull up or 50 Pull down or less P52 1 0 Programmable Buffer 3 3V 6mA Resistor select function 50 Pull up or 50 Pull down or less P53 P56 I O 5V tolerant Buffer 4mA 50 Pull up 57 60 67 R18UZ0005EJ0202 Dec 25 2014 1 0 Programmable Buffer 3 3V 6mA Resistor select function 50 Pull up or 50 Pull down or less 2 1BSignals by function 1 2 Recommended connection Open when not in use Page 27 of 89 R IN32M3 CL User s Manual 2 1BSignals by function Pin Name P70 P77 Interface Programmable Buffer 3 3V 6mA Resistor select function 50kQ Pull up or 50kO Pull down or less Q 2 Recommended connection when not in use 7 RP10 RP17 RP20 RP27 RP30 RP37 Programmable I O Buffer 3 3V Load Drive select function 6mA 12m
95. nnect to VDD33 3 3V OSCTH JTAGSEL CLKOUT25MO CLKOUT25M1 R18UZ0005EJ0202 Dec 25 2014 Input Buffer 3 3V Schmitt in 50 Pull down Output Buffer 3 3V Page 25 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 5 4 Test Signals Pin Name 1 0 Interface Required Connection when not in use TMODEO TMODE2 Input Buffer 3 3V Schmitt in Connect to GND 50 Pull down TMS 1 0 Buffer 3 3V 6mA 50 Pull up Open TDI Input Buffer 3 3V 50 Pull up Open TDO O 3 state Output Buffer 3 3V 6mA Open TRSTZ Input Buffer 3 3V Schmitt in Open 50 Pull up TCK Input Buffer 3 3V Open 50 Pull down TMC1 TMC1 Input Buffer 3 3V for Terminal Connect to GND TMC2 2 Input Buffer 3 3 Terminal Connect to GND R18UZ0005EJ0202 Page 26 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 5 5 Port Signals Pin Name P00 P07 P10 1 0 I O Interface Programmable Buffer 3 3V Load Drive select function 6mA 12mA Resistor select function 50kQ Pull up or 50 Pull down or less P11 P17 P22 P24 P27 I O Programmable Buffer 3 3V 6mA Resistor select function 50 Pull up or 50kQ Pull down or less P20 P21 P25 P26 1 0 Programmable l O Buffer 3 3V Load Drive select function 6mA 12mA Resistor select function 50 Pull up or 50kQ Pull dow
96. or alternate functions 3 and 4 RPFCEIn 0 Alternate function 1 Alternate function 27793 1 Alternate function 3779 2 Alternate function 47593 Figure 7 13 Port function control expansion registers in 8 bit notation Notes 1 The initial value depends on the pin status For details see 2 2 Port status 2 Touse alternate function 1 or 3 the bit corresponding to the function in the PFC RPFC register must be set to 0 3 Touse alternate function 2 or 4 the bit corresponding to the function in the PFC RPFC register must be set to 1 Remark 0103 0107 0107 R18UZ0005EJ0202 Page 64 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 14 11 9 8 7 6 5 4 3 2 1 0 Address FCE PE PFCE PFCE PFCE PFCE PFCE PFCE PFCE Dona 9 son soson RW RW 1 1 RW RW RW RW RW RW RW RW Initial value 0000H Address 2 400 3042 RW RW RW RW RW RW RW RW RW RW RW RW RW Initial value 0000H 15 14 7 6 5 4 3 2 1 Address 4 PFCE PFC PFCE PFCE PFCE PFCE i PFCE g 54 53 52 51 42 4005304411 RW RW RW RW RW 0 0 0 0 RW 0 0 Initial value 0000H 15 14 183 12 11 10 9 8 1 0 Address PFcEeH PFCE PFCE PFCE PFCE PFCE PFCE PFCE PFC PFCE PFCE PFCE PFCE 26 75 74 17317217117 66 65 64 63 RW RW RW RW RW RW RW RW RW RW RW RW RW 0 0 Initial value 0000H 0 Address 14 11
97. ote resistor BCYSTZ ADVZ O Address valid output HBCYSTZ RP20 Low Hi Z Note3 port With internal pull up resistor Remark External Memory Interface Signal expects BUSCLK is an input signal while the internal reset signal HRESETZ is active Note1 When using synchronous burst access MEMC this port is shared with Address port when ADMUXMODE is high 2 This port is available only when using synchronous burst access MEMC 3 This port functions as BCYSTZ when using asynchronous SRAM it functions as ADVZ when using synchronous burst access MEMC R18UZ0005EJ0202 Dec 25 2014 Page 8 of 89 R IN32M3 CL User s Manual 2 1 3 External MCU Interface Signals 2 1BSignals by function Pin Name 1 0 Function Shared Signal Shared port Active HBUSCLK Bus clock for Host MCU INTPZ11 P43 output port HCSZ Chip select signal input CSZO Low HPGCSZ port Pogrom mode Chip select signal input port HWAITZ Wait signal output port Level during reset amp Level after reset Hi Z With internal pull up resistor HA1 HA2 HA20 Address input port A2 A20 Hi Z With internal pull up resistor HDO HD15 HD16 HD31 Data bus port 00 015 016 031 Hi Z With internal pull down resistor Hi Z With internal pull up resistor HRDZ Read strobe input port RDZ HWRSTBZ Write strobe output port WRSTBZ
98. ports for system clock Oscillator output connects to X2 for direct 2 1BSignals by function Active Level during reset amp Level after reset connection RESETZ Reset input port Low HOTRESETZ Hot reset Input port Low PONRZ Internal RAM Power on reset input port Low OSCTH Input High level when external clock input mode JTAGSEL JTAG Operation mode setting port RSTOUTZ O Reset to external circuit output port Low CLKOUT25MO O PHY clock output port PLL VDD PLL power supply 1 0 PLL GND PLL power Ground supply GND VDD33 power supply 3 3V VDD10 Internal power supply 1 0V GND Ground supply GND VDDQ R18UZ0005EJ0202 Dec 25 2014 Ethernet I O power supply 3 3V Page 20 of 89 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 17 Test Signals Pin Name 1 0 Function Active Level during reset amp Level after reset TMODEO TMODE2 Test mode select port TMS 1 0 JTAG mode select port TDI JTAG serial data input port TDO O JTAG serial data output port i TRSTZ JTAG reset Low TCK JTAG clock input port TMC1 Renesas test ports TMC2 2 1 18 Operation mode Setting Signals Pin Name 1 0 Function Active Level during reset amp Level after reset BOOT1 BOOTO Boot mode select port 00 External memory boot 01 External ser
99. rnate function 1 or 2 the bit corresponding to the function in the PFCE RPFCE register must be set to 0 3 Touse alternate function 3 or 4 the bit corresponding to the function in the PFCE RPFCE register must be set to 1 Remark 0 3 0 7 0107 R18UZ0005EJ0202 Page 61 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PFG PFG PFG PFG PFC o o o Felle ar oe os 400 3030 0 0 0 0 0 RW RW RW RW RW RW RW RW RW 0 0 Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address PFG PFG PFG PFG PFG PFG PFC 36 35 34 33 32 27 26 24 400A 30324 RW RW RW RW RW RW 0 0 RW RW 0 RW 0 0 0 0 Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address pecan PFC PFC PFC PFC PFG PFG PFG PFG PFG PFG PFG PFC 400A 3034H 57 54 53 52 47 46 45 44 43 42 41 40 RW 0 0 RW RW RW 0 0 RW RW RW RW RW RW RW R W Initial value 0000H 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address o O A e 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Initial value 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address o o o o o 9 o 90 soa seson 0 0 0 0 0 0 0 0 RW RW 0 0 0 0 RW RW Initial value 0000H 15 14
100. rol Signal Pin Name Function Shared Port Active Level during reset amp Level after reset SLEEPING CPU SLEEP mode output port Hi Z With internal pull up resistor 2 1 12 Serial Interface Signals Pin Name 1 0 Function Shared Port Active Level during reset amp Level after reset TXDO O UARTO serial data output port P21 Hi Z RXDO UARTO serial data input port P20 With internal TXD1 UART1 serial data output port P31 pull up resistor RXD1 UART1 serial data input port P30 CSISCKO 1 0 CSIO serial clock port P45 CSISIO CSIO serial data input port P46 CSISOO O CSIO serial data output port P47 CSICS00 CSICSO1 O CSIO chip select 0 1 port P70 P71 Low CSISCK1 1 0 CSI1 serial clock port P35 CSISI1 CSI serial data input port P36 CSISO1 O CSI serial data output port P37 CSICS10 CSICS11 O CSI chip select 0 1 port P72 P73 Low SCLO 1 0 12C0 serial clock port P60 12C0 serial data port 12C1 serial clock port 12C1 serial data port CANO receive data port 5V Tolerant buffer CANO transfer data port 1 receive data port 5V Tolerant buffer transfer data port R18UZ0005EJ0202 Page 16 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 1 13 CC Link IE Field Signals Intelligent device station Pin Name Function Shared Active Level during res
101. rray T UART 2ch 12C x 2ch CAN x 2ch CSI x 2ch WDT Xurro9o adv abpug s s s s s s EER T AA Oo 1 9VING 2 epo ndo fepoo andd wasis ndo o 093 ax894 EIN muson uononasu wou ysely leas dOL OVA DD3 8AZLG OMEN PI214 943 31AUN 99 In so sng UOREDIUNULIOJ 1982 OQUOJ doula W m VW 1 uonounj 2JEMDJEH Jeyng sng uonouna 14821 1SOH LUOdLU OVINO 1 15 5 W x uoo Ww la TO EMNZENI Y Page 4 of 89 R18UZ0005EJ0202 Dec 25 2014 1 OBOverview R IN32M3 CL User s Manual Pin Placement Top View 1 4 oL LL ck el vi SL 9 2 81 n l N 1 M f H d 9 V SEd ZISHL odu tOdH Zed d ved OAL ZOdH ZId SAL hi in vidd
102. rrupt 56 INTETHSWSEC Ether SWITCH SEC interrupt 57 INTETHRXFIFO RX FIFO overflow 58 INTETHTXFIFO TX FIFO underflow 59 INTETHRXDMA Ether MACDMA reception completion 60 INTETHTXDMA Ether MACDMA transmission completion 61 INTMACDMARX receive frame successfully interrupt O O O O 62 INTHOSTIF External MCU I F interrupt 63 INTPZO INTPZO input 64 INTPZ1 INTPZ1 input 65 INTPZ2 INTPZ2 input 66 INTPZ3 INTPZS input 67 INTPZ4 INTPZ4 input 68 INTPZ5 INTPZ5 input 69 INTPZ6 INTPZ6 input 70 INTPZ7 INTPZ7 input INTPZ8 INTPZ8 input INTPZ9 INTPZ9 input INTPZ10 INTPZ10 input INTPZ11 INTPZ11 input INTPZ12 INTPZ12 input INTPZ13 INTPZ13 input INTPZ14 INTPZ14 input INTPZ15 INTPZ15 input INTPZ16 INTPZ16 input INTPZ17 INTPZ17 input INTPZ18 INTPZ18 input INTPZ19 INTPZ19 input O O O O O O O OO O O O O O O R18UZ0005EJ0202 Page 35 of 89 Dec 25 2014 INTPZ20 R IN32M3 CL User s Manual Cause group INTPZ20 input 4
103. rt function 7 5 5 Port 4 Buffer function change register DRCTLP4L DRCTLP4H 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address ala 0240 DRCTLP4L a a a a iti 010 010 010 Initial value 218 218 0000 9999 R W 0000000000000 0 0 ORWRW O 1 RWRW O 1 RWRW O 1 RWRW O 1 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Address BASE 0244H Su LL FI DRCTLP4H a a a a a a a iti sare oo oe roo C SIP Ee mitia value 2 a a a 2 ala 0000 9999H RIW 000 0 0 0 0 0 0 0 ORWRW 0 1 RWRW 1R 2 Bit position Bit name Function Reserved Be sure to write 0 to these bits If read 0 is returned PUIOP4n Specify whether to connect a pull up or pull down resistor to the P47 to P40 pins PDIOP4n Connection of a pull up or pull down resistor to the P47 to P40 pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited Remark 7 0 R18UZ0005EJ0202 Page 79 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 6 Port 5 Buffer function change register DRCTLP5L DRCTLP5H lt R gt 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address BASE 0248H D io Dg DRCTLP5L a
104. s the level when a pin enters a high impedance state R18UZ0005EJ0202 Page 74 of 89 Dec 25 2014 R IN32M3 CL User s Manual 7 6BPort function 7 5 1 Port 0 buffer function change registers DRCTLPOL DRCTLPOH 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 43 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 0220 335 8 DRCTLPOL a a a iti 010 010 010 Initial value ago Q 0000 9999H RAN 000000000 O O O O O 0 RWR WR WR WR WR WR WR WR WR WR WR WR WR WR WR W 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5432 1 0 Address BASE 0224H DRCTLPOH ses sess sess sss iti S 5 555 5 5 515555552 5 Initial value 2 2 10 o a So ezeo 0000 9999H Bit position Bit name R W 0 0 0 0 0 0 0 0 OR Function Reserved Be sure to write O to these bits If read 0 is returned PUIOPOn PDIOPOn Specify whether to connect a pull up or pull down resistor to the PO7 to pins Connection of a pull up or pull down resistor PUIO PDIO to the P07 to POO pins Do not connect a pull up or pull down resistor Connect a pull down resistor Connect a pull up resistor Setting prohibited IOLPOn1 IOLPOnO Specify the driving capability of the PO7 to POO pins IOL1 IOLO Driving capability of PO7 to POO pins 12mA Other than above Sett
105. sh to understand the functions of Industrial Ethernet network LSI R IN32M3 CL uPD60510F1 HN4 A for designing application of it It is assumed that the reader of this manual has general knowledge in the fields of electrical engineering logic circuits and microcontrollers Particular attention should be paid to the precautionary notes when using the manual These notes occur within the body of the text at the end of each section and in the Usage Notes section The revision history summarizes the locations of revisions and additions It does not list all revisions Refer to the text of the manual for details Literature Literature may be preliminary versions Note however that the following descriptions do not indicate Preliminary Some documents on cores were created when they were planned or still under development So they may be directed to specific customers Last four digits of document number described as indicate version information of each document Please download the latest document from our web site and refer to it The document related to R IN32M3 CL Document name Document number R IN32M3 series Datasheet R18DS0008EJ R IN32M3 EC User s Manual R18UZ0003EJ R IN32M3series User s Manual Peripheral function R18UZ0007EJ R IN32M3 Series Proguraming Manual OS edition R18UZ0011EJ R IN32M3 Series Proguraming Manual Driver edition R18UZ0009EJ R IN32M3 CL User s Manual This manual
106. ster is the control register to adjust the access timing from CPU to CC Link IE Field core Table 6 2 CC Link IE Field Intelligent device station control registers overview Register name Shortcut Address CC Link IE Field Intelligent device station clock gata register CIECLKGTD 4001 0938H CC Link IE Field Intelligent device station wait delay register CIEWAITDLY 4001 093CH CC Link IE Field Intelligent device station bus size control register CIEBSC 400A 4004H CC Link IE Field Intelligent device station bus bridge control register CIESMC 400A 4008H R18UZ0005EJ0202 Page 39 of 89 Dec 25 2014 R IN32M3 CL User s Manual 6 5BCC Link IE Field Intelligent device station Function 6 1 1 CC Link IE Field Intelligent device station clock gate register CIECLKGTD CIECLKGTD register is used to temporarily stop the supply of the bus clock to prevent a clock glitch that occurs to the bus clock switching when the CC Link IE Field Network Stop the bus clock by writing 1 to this register and then restart the bus clock by writing 0 The case of switching to enable the SRAM bus path from the external microcomputer to switch shown to first stop bus clock in this register always e Access This register can be read and written in 32 bit or 16 bit units 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 18 12 11 10 9 8 7 6 5 4 3 2 1 0 Address 4001 0938H Initial Value CIECLKGTD 010 010 010 01010 0000 0000H
107. t mode CSZ2 RDLEDZ CCS RDLEDZ P52 P52 output mode P52 input mode TINS TOUT3 CCS SDGATEON P53 P53 output mode P53 input mode CRXDO CCS RD CCM RD P54 P54 output mode P54 input mode CTXDO CCS SD CCM SD P55 P55 output mode 55 input mode CRXD1 P56 P56 output mode 56 input mode CTXD1 PHYREZ1 P57 P57 output mode P57 input mode TIN2 TOUT2 CCI PHYREZO Remark m 0to7 n 0to7 R18UZ0005EJ0202 Dec 25 2014 Page 71 of 89 R IN32M3 CL User s Manual 7 6BPort function 3 3 Pin PMCmn 0 port mode PMCmn 1 control mode nam PFCEmn 0 PFCEmn 1 e PMmn 0 PMmn 1 0 1 0 1 output port input port P60 P60 output mode P60 input mode SCLO P61 P61 output mode P61 input mode SDAO P62 P62 output mode P62 input mode RTDMAREQZ CCM MDINO P63 P63 output mode 63 input mode RTDMAACKZ MDIN1 P64 64 output mode P64 input mode RTDMATCZ CCM MDIN2 P65 P65 output mode 65 input mode DMAREQZO MDIN3 P66 P66 output mode P66 input mode DMAACKZO CCI INTZ P67 P67 output mode P67 input mode DMATCZO P70 P70 output mode P70 input mode CSICSOO CCS STATION NO 0 CCM SNINO P71 P71 o
108. t mode INTPZ4 LERRILEDZ CCS MONG P05 5 output mode 5 input mode INTPZ5 LERR2LEDZ CCS MON7 PO6 output mode PO6 input mode PHYLINKO CCI SDLEDZ CCS MONO P07 PO7 output mode 7 input mode PHYLINK1 CCIRDLEDZ CCS RESOUT P10 P10 output mode P10 input mode CCS REFSTB P11 P11 output mode P11 input mode CCS MON4 P12 P12 output mode P12 input mode INTPZ6 NMIZ P13 P13 output mode P13 input mode INTPZ7 CCI WDTIZ CCS WDTZ CCM WDTENZ P14 P14 output mode P14 input mode SMSCK P15 P15 output mode P15 input mode SMSI P16 P16 output mode P16 input mode SMSO P17 P17 output mode P17 input mode SMCSZ P20 P20 output mode P20 input mode RXDO CCM LINKERRZ P21 P21 output mode P21 input mode TXDO CCM ERRZ P22 P22 output mode P22 input mode INTPZ8 CCS IOTENSU P23 P23 output mode P23 input mode INTPZ9 CCS SENYUO P24 P24 output mode P24 input mode INTPZ10 ETHSWSECOUT CCS SENYU1 P25 P25 output mode P25 input mode WDTOUTZ CCS ERRZ P26 P26 output mode P26 input mode TIN1 TOUT1 RUNZ CCS RUNZ P27 P27 output mode P27 input mode TINO TOUTO Remark m 0to7 n 0to7 R18UZ0005EJ0202 Dec 25 2014 Page 70 of 89 R IN32M3 CL User s Manual
109. th internal pull down resistor P12 INTPZ6 NMIZ Hi Z P13 INTPZ7 WDTIZ With internal pull up CCS WDTZ resistor CCM WDTENZ P14 SMSCK P15 SMSI P16 SMSO P17 SMCSZ P2 20 RXDO CCM LINKERRZ Hi Z P21 TXDO CCM ERRZ With internal pull up P22 INTPZ8 CCS IOTENSU resistor P23 INTPZ9 CCS_SENYUO P24 INTPZ10 ETHSWSECOUT CCS SENYU1 P25 WDTOUTZ CCS ERRZ P26 TIN1 TOUT1 CCM RUNZ CCS RUNZ P27 TINO TOUTO 3 R18UZ0005EJ0202 Page 10 of 89 Dec 25 2014 R IN32M3 CL User s Manual 2 1BSignals by function 2 4 Sid Mode 1 Mode 2 Mode 3 Mode 4 jar 5 RXD1 Hi Z P31 TXD1 With internal pull up P32 DMAREQZ1 CCS_MON1 resistor P33 DMAACKZ1 WAITEDGEH CCS MON2 P34 DMATCZ1 CCI WRLENH CCS MON3 P35 CSISCK1 INTPZ22 COM IRZ P36 CSISI1 INTPZ23 CCS FUSEZ P37 CSISO1 INTPZ24 CCM MSTZ P4 40 1 HA1 Hi Z P41 WAITZ HWAITZ Pull up P42 SLEEPING HERROUTZ SDGCZ KU P43 INTPZ11 HBUSCLK VAIL P44 CSZ1 HPGCSZ P45 CSISCKO WAITZ1 P46 CSISIO WAITZ2 P47 CSISOO WAITZ3 P5 50 CSZ3 LNKRUNZ CCS LNKRUNZ P51 CSZ2 RDLEDZ CCS RDLEDZ 52 TOUT3 CCS_SDGATEON Hi Z With internal pull down resistor P53 CRXDO CCS_RD CCM RD Hi Z 54 CTXDO CCS SD CCM SD With internal pull up 55 CRXD1 resistor P56
110. upt O O O O O 26 INTCSIHOIJC CSIHO end of job interrupt O O O O O 27 INTCSIH1IC CSIH1 communication status interrupt O O O O O 28 INTCSIH1IR CSIH1 reception status interrupt O O O O O 29 INTCSIH1IJC CSIH1 end of job interrupt O O O O O O O O O O O O O O O O O O O O O O O O O O O O O O INTFCNOWUP FCNO sleep and wakeup transmission suspension INTFCN1REC FCN1 reception completion INTFCN1TRX INTFCN1WUP FCN1 transmission completion FCN1 sleep and wakeup transmission suspension INTDMAOO DMAC channel0 transfer completion interrupt INTDMAO1 channel transfer completion interrupt INTDMAO2 INTDMAO3 DMAC channel2 transfer completion interrupt DMAC channel3 transfer completion interrupt INTRTDMA RTDMAC transfer completion interrupt Reserve Reserve R18UZ0005EJ0202 Dec 25 2014 Reserve Page 34 of 89 R IN32M3 CL User s Manual 4 3BException handling function 2 4 Connection Cause group Reserve Reserve INTBUFDMA Inter Buffer DMA transfer completion INTPHYO Ether PHYinterruptO INTPHY1 Ether PHYinterrupt1 INTETHMII Ether management access completion interrupt 52 INTETHPAUSE Ether pause packet transmission completion 53 INTETHTX Ether transmission completion interrupt 54 INTETHSW Ether SWITCH interrupt 55 INTETHSWDLR Ether SWITCH DLR inte
111. utput mode P71 input mode CSICSO1 CCS STATION NO 1 CCM SNIN1 P72 P72 output mode P72 input mode CSICS10 CCS STATION NO 2 CCM SNIN2 P73 P73 output mode P73 input mode CSICS11 CCS STATION NO 3 SNIN3 P74 P74 output mode P74 input mode INTPZ12 CCS STATION NO 4 SNIN4 P75 P75 output mode P75 input mode INTPZ13 CCS STATION NO 5 CCM SNIN5 P76 P76 output mode P76 input mode INTPZ14 CCS STATION NO 6 CCM SNIN6 P77 P77 output mode P77 input mode INTPZ15 CCS STATION NO 7 CCM SNIN7 Remark 0107 0107 R18UZ0005EJ0202 Dec 25 2014 Page 72 of 89 R IN32M3 CL User s Manual 2 Real time control ports to RP37 7 6BPort function Pin PMCmn 0 port mode 1 control mode name RPFCEmn 0 RPFCEmn 1 PMmn 0 PMmn 1 RPFCmn 0 1 RPFCmn 0 RPFCmn 1 output port input port RP00 output mode input mode INTPZ16 SCL1 CCM SDLEDZ CCS SDLEDZ RPO1 RP01 output mode RPO1 input mode INTPZ17 SDA1 SMSTZ RP02 RP02 output mode RPO2 input mode INTPZ18 5_ 51 output mode input mode INTPZ19 5_ 52 4 RP04 output mode RP04 input mode INTPZ20 5_ 54 5 5 output mode

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