10Gbps Active Optical Cable
Contents
1. 31 WV GAIN RR 31 PC VISION ulis dr r E 31 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 3 of 31 Sam ec Product Specification INTRODUCTION QSFPO 40G Series The QSFPO 40G AOC is a 4 channel active optical cable assembly for QSFP applications that is designed to meet the QSFP 10Gbs x4 Pluggable Transceiver SFF 8436 specification This full duplex optical assembly offers 4 independent transmit and receive channels each capable of 10Gbps for an aggregate bandwidth of 40Gbps The cable uses standard multimode fiber cable carrying a nominal wavelength of 850nm The electrical interface is a standard QSFP 38 contact edge type connector and is electrically compliant with the SFI and PPI interface supporting Infiniband Ethernet Fiber Channel and other protocols The connector is hot pluggable and provides I C serial access via an on board microcontroller Figure 1 QSFPO Active Optical Cable The QSFPO comes pre tested and can be used as a direct replacement for traditional copper cables but with the added benefit of a lighter weight and smaller diameter solution for cable lengths from 1 to 100 meters It can also be used to replace a pair of transceivers proving equivalent performance at a lower cost QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 4 of 31 Product Features e 4 high speed full duplex channels e 40Gbs QSFP compatible e SFI and PPI electrical interface compliant e Supports Ethernet 42. Measure current SFP RX C region violat ions current minimum maximum total meas Jitter RL 4 05 ps total wfms 500 1 0 Jitter RMS 3 23ps 3 20 ps 3 45 ps 4 Setup Jitter p p 21 24 ps failed smpls 0 2 9 Jitter p p 20 32 ps 18 26 ps 20 32 ps 45 I Rise timet 75 2 ps source i i AT 45 4T 4 Fall timet 63 4 ps Y Align Fixed Volt Spiel EL M 45 5 ps 43 7 ps 45 5 ps 45 i Acq Limit Test Waveforms 500 UA Acq Limit Test Waveforms 500 Measure current SFP RX C region violat ions current SFP RX C region violat ions Jitter RMS 4 20 ps total wfms 500 1 U Jitter RMS 3 11 ps total wfms 500 1 U Jitter p p 24 12 ps failed smpls 46 68 k 2 22 74k Jitter p p 21 37 ps failed smpls 0 2 KI Rise ine 62 3 ps sour 3 0 3 23 4k Rise timet 44 8 ps sourc ce e 29 2 ps Y Align Fixed Volt 42 4 ps Y Align Fixed Volt Figure 5 Typical output eyes 739 mV amplitude settings Top 0 and 125 mV pre emphasis Bottom 175 and 325 mV pre emphasis QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 20 of 31 Table 13 Typical Power Consumption vs Rx settings Rx Output Voltage Rx Output Pre Typical Power Swing Setting mV emphasis Setting mV Consumption mW 590 890 710 The assemblies are shipped by default with 422mV amplitude 125 mV pre emphasis settings and lead to a 770 mW typical power dissipations Please contact Samtec if other defaults are desired QSFPO 40G AOC Datas
3. Samlec m 40 Gbps QSFP ACTIVE OPTICAL CABLE ASSEMBLY User Manual Covering QSFPO 40G Series November 2012 samiec Product Specification COPYRIGHTS TRADEMARKS and PAT Product names used herein are trademarks of their respective owners All information and material in this publication are property of Samtec Inc All related rights are reserved Samtec Inc does not authorize customers to make copies of the content for any use Terms of Use Use of this publication is limited to viewing the pages for evaluation or purchase No permission is granted to the user to copy print distribute transmit display in public or modify the contents of this document in any way Disclaimer The information in this publication may change without notice All materials published here are As Is and without implied or express warranties Samtec Inc does not warrant that this publication will be without error or that defects will be corrected Samtec Inc makes every effort to present our customers an excellent and useful publication but we do not warrant or represent the use of the material here in terms of their accuracy reliability or otherwise Therefore you agree that all access and use of this publication s content is at your own risk NEITHER SAMTEC INC NOR ANY PARTY INVOLVED IN CREATING PRODUCING OR DELIVERING THIS PUBLICATION SHALL BE LIABLE FOR ANY DIRECT INCIDENTAL CONSEQUENTIAL INDIRECT OR
4. C2237 2238235 read 3 bytes Firmware version H 1 14 read 16 bytes Data read from device Hag 41 49 4f 2d 51 53 46 34 38 47 2d 38 31 36 28 ZH C isTest _ E Figure 6 Sample Output from QSFPsend Note that the QSFP s firmware version must be version 0 1 14 or higher to read and write the EEPROM using QSFPsend When QSFPsend is run it outputs the firmware version as shown in Figure 6 Syntax The tool is launched by command line and takes a csv data file as its argument using the following syntax WSFPsend I r c filename csv Parameters Used only for reads Prints in long form where every read byte resides on its own line This allows the parameters to be easily saved in a csv file r Used only for writes Reads back the registers that were just written C Used for both read and writes Calculates the 2 check sums on Page00 and writes them to their proper locations in EEPROM even if Page00 was not accessed filename csv A comma delineated file detailing the parameters to read or write The format of this field is described below QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 24 of 31 Common Examples The following are examples of csv files to perform the most common tasks each example starts with describing the action to be performed and consists of 3 18 lines set Cable Length to 10m 16 ab 94 Oa set Vendor Name to Samtec Inc 16 ab 92 Oa 61 6d 74 65 6
5. GND Ground 1 1 8 LVTLL I ModSelL Module Select 3 9 LVTLL I ResetL Module Reset 3 10 Vcc Rx 3 3V Power Supply Receiver 2 2 11 LVCMOS I O SCL 2 wire serial interface clock 3 12 LVCMOS I O SDA 2 wire serial interface data 3 13 GND Ground 1 1 14 CML O Rx3p Receiver Non Inverted Data Output 3 15 CML O Rx3n Receiver Inverted Data Output 3 16 GND Ground 1 1 17 CML O Rx1p Receiver Non Inverted Data Output 3 18 CML O Rxin Receiver Inverted Data Output 3 19 GND Ground 1 1 20 GND Ground 1 1 21 CML O Rx2n Receiver Inverted Data Output 3 22 CML O Rx2p Receiver Non Inverted Data Output 3 23 GND Ground 1 1 24 CML O Rx4n Receiver Inverted Data Output 3 25 CML O Rx4p Receiver Non Inverted Data Output 3 26 GND Ground 1 1 27 LVTLL O ModPrsL Module Present 3 28 LVTLL O IntL Interrupt 3 29 Vcc Tx 3 3V Power supply transmitter 2 2 30 Vcc1 3 3V Power supply 2 2 31 LVTLL I LPMode Low Power mode 3 32 GND Ground 1 1 33 CML I Tx3p Transmitter Non Inverted Data Input 3 34 CML I Tx3n Transmitter Inverted Data Input 3 35 GND Ground 1 1 36 CML I Tx1p Transmitter Non Inverted Data Input 3 37 CML I T1xn Transmitter Inverted Data Input 3 38 GND Ground 1 1 Note 1 GND is the symbol for signal and supply power common for the Optical Engine All are common within the Optical Engine and all module voltages are referenced to this potential unless otherwise noted Connect these directly to the host board signal common ground plane Note 2 Vcc Rx Vcc1 and Vcc Tx are the
6. memwme HH uw sw f Me Ps Umwa H s s Imwa H sees ato 1 Maximum SCC22 is defined by the formulae 0 1 f 2 5 7 1 6f 2 5 lt f 11 1 3 2 Maximum SDD22 is defined by the formulae 0 1 lt f lt 4 11 12 24 f 4 11 lt f 11 1 6 3 13 log 3 Two eye masks are specified but are considered to be identical due to the differences in the hit ratio Eye Mask for Hit Ratio 1x10 Eye Mask for Hit Ratio 1x10 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 10 of 31 Interfaces Control Interface As described in the QSFP standard the electrical interface has the following low speed signals for control and status ModSelL LPMode ResetL ModPrsL IntL Their operation is described below ModSelL The ModSelL signal allows multiple QSFP modules to be on a standard C serial control bus By default this pin is held low by the host In this state the module will respond to the C interface When the ModSelL pin is pulled high by the host the module will not respond to or acknowledge any I2C query or command Care must be taken to ensure that if the ModSelL pin is used to toggle control of different modules the assert and deassert times must be taken into account to prevent communication conflicts LPMode The LPMode pin is used by the host to set the maximum power consumption by the module This is intended to protect hosts that are not designed to cool higher power
7. modules that draw more than 1 5W Since the power consumption of QSFPO 40G ACC is 0 8W maximum this pin is not used and the module is always in a low power state ResetL The AOC can be reset to its default settings by pulling this control pin to a low level for a period longer than the minimum pulse length of the 2 wire serial interface Whilst in this reset state host should disregard all status bits ModPrsL ModPrSL is used to indicate to the host that the connector is populated by the AOC In the absence of an ACC this is pulled up to the host Vcc When the AOC is inserted it completes the path to ground through a resistor on the host and pulls ModPrsL to a low state IntL This control pin is used to indicate a possible module operation fault or a status critical to the host system The IntL pin is an open collector output ad must be pulled to the Host Vcc voltage on the Host board When pulled low by the AOC the alarm is active and the AOC will identify the source of the interrupt using the 2 wire serial interface In addition there is an industry standard two wire serial interface scaled for 3 3 volt LVTTL It is implemented as a slave device Signal and timing characteristics are further defined in the Section O below and also Section O QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 11 of 31 2 Wire Serial Interface Table 5 and Figure 3 show the 2 wire timing specifications as defined by SFF 8436 Table 4 Tab
8. of an assertion of an alarm Loss of Signal LOS and Transmitter Tx fault QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 6 of 31 Receiver Block The optical receiver portion of the engine incorporates a 4 channel PIN photodiode array a 4 channel TIA array a 4 channel output buffer diagnostic monitors control and bias blocks The Receiver Output Buffer provides CML compatible differential outputs for the high speed electrical interface presenting nominal single ended output impedances of 50 Ohms to AC ground and 100 Ohms differentially that should be differentially terminated with 100 Ohms AC coupling capacitors are located on the Optical Engine and are not required on the host board Management Interface The internal optical engine provides digital diagnostics and control monitor functions as specified in SFF 8436 A micro controller which can be accessed through the 2 wire interface monitors and reports this information The functionality of the 2 wire interface is specified in the SFF 8436 specification The following Module and Channel digital diagnostic parameters are provided for monitoring o Transceiver Temperature o Transceiver Supply Voltage Also the module micro controller will generate an Interrupt Flag by asserting the IntL signal when an operational fault occurs The host can identify the source of the interrupt by reading the appropriate registers through the 2 wire interface The following Interru
9. receiver and transmitter power supplies and shall be applied concurrently Requirements defined for the host side of the Host Edge Card Connector are listed in Table 3 The connector pins are each rated for a maximum current of 500mA Table 8 Edge Connector Pin Descriptions QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 27 of 31 38 GND in i 37 TX1 un 36 TX1 n 35 GND Rng i 34 TX3 Da 33 TX3 O TX4 6 p ie gt ENE 7 31 LPMod ds W Aad ModSelL 8 g ResetL 9 29 VccTx VCCRX 10 28 IntL rm n H 27 ModPrsL g ene 5 26 GND hp G GND 13 2 k mi RX3 14 s mai RX3 15 23 GND gup 22 RX2 4 m N 21 RX2 per s 20 GND gup Top Side Bottom Side Viewed from Top Viewed from Bottom Figure 6 Edge Connector Pinout MECHANICAL CHARACTERISTICS Connector Dimensions pem 67 451 2 556 REF TYP PIN 38 LENGTH 46 88 2 OVERALL LENGTH 8 20 1 33 00 Figure 7 Connector Dimensions QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 28 of 31 Samlec Product Specification TECHNICAL INFORMATION P Regulatory amp Compliance Table 15 Regulatory and Compliance Feature Test Method JEDEC Human Body Model HBM ESD22 A114 B Electrostatic Discharge ESD to the electrical Hem tact contac JEDEC Machine Model MM JESD22 A115 A Electrostatic Discharge ESD to module case Variation of IEC 61000 4 2 15kV F 15 CENELEC EN 22 Electromagnetic Inte
10. used in special non standard applications to overcome poor electrical traces or provide more design margin at the expense of power consumption QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 19 of 31 229 C8 8 E DSS Ls Product Specification Cg Limit Test Waveforms 500 Acq Limit Test Waveforms 500 Measure 2 X Z Measure cur rent min i mum maximum total meas current SFP RX C region violat ions Jitter RMS 4 09 ps 3 83 ps 4 17 ps 52 Setup Jitter RMS 2 62 ps total wfms 500 1 825 Jitter p p 22 78 ps 20 06 ps 22 78 ps 42 amp Info Jitter p p 16 29 ps failed smpls 825 2 Rise time 61 9 ps 50 0 ps 62 2 ps 52 c Rise timet 37 4 ps source 3 Fall time 60 2 ps 54 7 ps 60 5 ps 52 all timet 38 1 ps Y Align Fixed Volt Lg Limit Test Waveforms 500 Measure current minimum maximum total meas current minimum maximum total meas Jitter RMS 2 50 ps 0 0 s 2 59 ps 4 Setup Jitter RMS 3 69 ps 1 51 ps 3 70 ps 45 Setup Jitter ppt 15 31 ps 0 05s 15 40 ps 47 amp Info Jitter p p 21 27 ps 5 13 ps 22 00 ps 45 amp Info Rise timet 35 7 ps 34 6 ps 35 7 ps 45 Rise time 33 0 ps 10 3 ps 33 4 ps 42 c Fall time 27 7 ps 22 5 ps 36 1 ps 47 Fall timet 17 2 ps 15 5 ps 18 0 ps 45 Figure 4 Typical output eyes 422 mV amplitude settings Top 0 and 125 mV pre emphasis Bottom 175 and 325 mV pre emphasis Acq Limit Test Waveforms 500 Acq Limit Test Waveforms 500 Measure
11. value 1b 1 until set assert time module power consumption enters Power Level lt T 300 a i EN the module is fully functional Note 1 Measured from falling clock edge after stop bit of write transaction Note 2 Power is defined as the instant when supply voltages reach and remain at or above the minimum level specified in Note 3 Fully functional is defined as IntL asserted due to data not ready bit bit O byte 2 de asserted The module should also meet electrical specifications Time from occurrence of condition triggering flag Flag assert time TON FLAG Time from change of state of Application or Rate Application or rate select TRATE_SEL change time specification Power over ride or power Time from P Down bit cleared value Ob until lorr PDOWN set de assert time Table 3 Note 4 Measured from falling edge after stop bit of read transaction Table 8 1 0 Timing for Squelch Specifications Symbol Unit Min Max Notes re ae Time from loss of Rx input signal until the q ON_RXSQ H squelched output condition is reached Time from resumption of Rx input signals until normal Rx output condition is reached QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 13 of 31 samiec Product Specification INITILIZATION PROCEDURE l Memory Map Introduction EEPROM Virtual Addressing The SFF 8436 specification calls for a list of cable parameters to be readable through an 12C interface commonl
12. 0 GbE e Supports Ethernet 10 GbE e Supports Infiniband QDR DDR and SDR e Infiniband Approved Integrators List e Cable lengths from 1 to 100 meters e Small 3mm diameter fiber cable e Low power consumption 0 6W typical at room temperature 0 8W typical at 75 C e Bit Error Rate better than 10 100m cable length e Oto 70 C Operating case temperature range e Proven high reliability 850nm VCSEL technology e Two Wire Serial TWS interface with maskable interrupt Applications The QSFPO 40G active optical cable complies with the standard for Infiniband QDR and Ethernet 40 GbE 40 Gigabit Ethernet applications and is listed on the Infiniband Trade Association s Approved Integrators List for lengths from 1 to 100 meters The cable ends are electrically compliant with the SFI and PPI interface and capable of supporting Infiniband Ethernet as well as Fiber Channel and other protocols The cable is hot pluggable and provides a standard C serial digital control interface via an on board micro controller The QSFPO 40G active optical cable assembly is ideal for High Performance Computing Data Center Storage Area Network Telecom Switched Network and is a direct replacement for copper cables where bandwidth distance and or cable density needs to be optimized QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 5 of 31 samiec Product Specification FUNCTIONAL DESCRIPTION E The QSFPO AOC has a miniature optical engi
13. 3 20 49 6e 63 2e 20 20 20 20 20 set Vendor OUI to 04c880h 16 ab a5 04 C8 80 set Cable Part Number to 1234567890 16 ab a8 31 32 33 34 35 36 37 38 39 30 20 20 20 20 20 20 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 25 of 31 set Part Number Revision to 1 16 ab a8 2d 31 set Cable Serial Number to 0246813579 16 ab c4 30 32 34 36 38 31 33 35 37 39 20 20 20 20 20 20 set Date Code to 4July2011 16 ab d4 31 31 30 37 30 34 set Lot Code to O01 16 ab da 30 31 set Output Amplitude 422mV and pre emphasis 125mV 16 ab 6 00 55 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 26 of 31 Samlec Product Specification INTERFACE E Electrical Figure 6 shows the contact numbering for the assembly connector The diagram shows the module from the bottom view There are 38 pins intended for high speed low speed signals power and ground connections These pins are described in Table 8 Pin Logic Symbol Description Tm Note 1 GND Ground 1 1 2 CML I Tx2n Transmitter Inverted Data Input 3 3 CML I Tx2p Transmitter Non Inverted Data Input 3 4 GND Ground 1 1 5 CML I Tx4n Transmitter Inverted Data Input 3 6 CML I Tx4p Transmitter Non Inverted Data Input 3 7
14. FFFFFFFFFFFFFFFFFFFFF FFFFFFFFFFFFFFFFFFFFFFFFFFF0001 10 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 17 of 31 Samlec Product Specification Notes to Page 00 Implementation Please see Table 11 for further clarifications of our implementation some Page 00 fields Table 11 Notes to the Memory Map Implementation nec of menen Om 3 mo Node OOO h num EM 34 41 Rx Input Power Rx input power is not supported h E s 42 49 Tx Bias Tx bias monitoring is not supported Monitoring Channel Mask 00 100 7 4 M Tx LOS Tx LOS is not supported OPHONALENENNE 03 241 3 0 Tx SQ Disable Tx squelch is not supported Controls Page 02 Page 02 bytes 128 255 are provided for end customer own use The fields are initialized to O at the factory Page 03 Table 7 Supported Page 03 Fields Default Lus TempHghAamisB 7 oo o 19 TempiowMamMSB o RR L3 ensa apn o 13 TempHghWammsMSB AX o o o o o oo 13 TempHghWammesb TR 1x TemplowWammMSB 3 o 8 O O Lus TempiowWammisB O 8 O O Lia H v o Lus WeHmh amis o La WelowAamMSB osv ooo oo o up WeiwAamis S O O Lus WcHmhWamngMSB 3388V oOo Ls WeHmhWamngis o RR O O 1 WelowWamngMSB say Ro o Hip WeiowWamnsb O o SSS Lue TxPoweHghAamMSB RR Ly WxPowr
15. HghAamisB RR O O Mo G j w a kowee MW QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 18 of 31 Output Voltage and Pre emphasis Settings The Rx output amplitude swing and pre emphasis is factory adjustable Please contact Samtec if amplitude and pre emphasis values other than the default values are required It is typically not recommended to change the default values However some reasons for requesting factory adjustment of these parameters are Permanently disabling one or more channels adjusting pre emphasis and output swing for communication over non standard or difficult electrical channels reducing output swing and pre emphasis for power savings with well behaved channels Four output voltages amplitudes settings are available 0 mV Rx channel permanently disabled 317 mV 422 mV factory default 739 mV Four pre emphasis settings are available O mV 125 mV factory default 175 mV 325 mV Figure 4 and Figure 5 show typical received eyes for some combinations of amplitude and pre emphasis settings The engines are shipped by default with 422mV amplitude 125 mV pre emphasis settings these are highlighted In addition to changing the output eye changing these settings also affect the power consumption of the optical engine as shown on Table 13 Reducing voltage and pre emphasis results in the lowest power consumption available while larger voltage and pre emphasis might be
16. PUNITIVE DAMAGES ARISING OUT OF YOUR ACCESS USE OR INABILITY TO ACCESS OR USE THIS PUBLICATION OR ANY ERRORS OR OMISSIONS IN ITS CONTENT QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 1 of 31 Product Specification TABLE OF CONTENTS Ui d S i INTRODUCTION QSFPO 40G Series o E 4 Product Features AA 5 Applications 5 FUNCTIONAL DESCRIPTION Transmitter Block eee 6 Receiver Block 2 5 5 5 5 5 9 9 5 9 9 9 9995 95 9 9 9 9 959 95 5 9 9 99h 9595 9h 9 5 5slslhohyLLLLLLLLLLLLLLLLLLLLLLLLL 7 Management Interface ssi LL LLL 7 SPECIFICATIONS E Electrical Characteristics eee 8 Interfaces Control Interface ss eee 11 2 Wire Serial Interface s s iesi it 9 9 9 95 9 9 5 12 Control Status and Monitor Interface smsen rer He 13 INITIALIZATION PROCEDURE Memory Map Interface EEPROM Virtual Address ss 222222 14 SFF Memory Map LLL 15 Page 00 Lower Memory LL LLL 16 Page 00 Upper Memory e sese eee eee 17 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 2 of 31 ee e INTERFACE POC MG zi NI RTRRRRRTRRE 27 MECHANICAL CHARACTERISTICS Connector Dimensions 9 9 9 9 9 9 9 9 9 9 9 95 9 9 5555 5h 28 TECHNICAL INFORMATION Regulatory and Compliance FOCO 29 Ordering Information amp Technical Support 30 Definitions LLL 30 Reference Documents 9 9 9 9 9 9 9 9 5 95 9h 5 hy y hh 30 bye RR ERRRRNRCRREERNEERREuu
17. RESET INIT US 2 5 the minimum reset pulse time present on the ResetL pin Time from power on 2 until module responds to Serial bus hardware ready TSERIAL ms 2000 P data transmission over the 2 wire serial bus Time from power on2 to data not ready bit 0 of Monitor data ready time t ms 2000 i Monitor data readytime tom ms 2000 Byte 2 de asserted and IntL asserted Time from rising edge on the ResetL pin until the Reset assert time TRESET ms 2000 i B i 3 p module is fully functional Time from occurrence of condition triggering IntL rt tim m 2 Time from clear on read operation of associated flag until Vout IntL Voh This includes de assert IntL de assert time tore INTL US 500 times for Rx LOS Tx Fault and other flag bits Time from Rx LOS state to Rx LOS bit set value insi ie tones o ams 1b and IntL asserted ms ms ms ms ms loN PDOWN ms ms Tol denccsspeims 200 Time from Tx Fault state to Tx Fault bit set value eee 1b and IntL asserted 200 to associated flag bit set value 1b and IntL asserted Time from mask bit set value 1b until Mask assert time t 100 i eee Mask assert time em E associated IntL assertion is inhibited Time from mask bit cleared value Ob until Mask de assert time torr MASK ms 100 l E associated IntlL operation resumes 100 Select bit until transmitter or receiver bandwidth is in conformance with appropriate Power over ride or power 100 Time from P Down bit set
18. ding features supported in our implementation Full details about the bit fields and usage can be found in the SFF 8436 specification Table 6 Supported Page 00 Lower Memory Fields 2 Default Read only roi dentfier H o w 2 smus Fstorpapdmemoy o o s memptHas l05 A RO a T terop Pegs Tad H RO 6 interrupt aas Tenn aan o TTT interrupt Flags Voltage Alarm o 2 Module Monitors Temperature mss o 233 MedweMontos TempeturelsB r 26 T Module Monitors Supply Voltage M88 o 237 MedweMontors SupplyVoltsgelB r e6 Control Transmitter Disable w s Lowrower core o o ow 100 interrupt Masks TX LOS Mask o w 101 interrupt Masks Tx Faut Mask o w 103 interrupt Masks Temperature Faut Mask 0 w 104 Interrupt Masks Voltage Fault Mask o w 119 Password Change Entry Data w 120 Password Change Entry Bars 121 Password Change Entry Data w 122 Password Change Entry Bars 123 Password entry res TRN 124 Password Entry RW 125 PasswordEntyAarea TRN 126 PasswordEntyAarea RW 127 Page Select Byte FR 1 Rx only Tx LOS not supported The engine always runs in low power mode writing to this register has no effect User settable password protection of page 02 not supported QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 16 of 31 Page 00 Upper Memory The values for the Page 00 Upper Memo
19. e and or use of Samtec products including liability or warranties relating for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right While the information contained herein is believed to be accurate such information is preliminary and should not be relied upon for accuracy or completeness and no representations or warranties of accuracy or completeness are made THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN AS IS BASIS In no event shall Samtec be liable for damages arising directly or indirectly from any use of the information contained in this document Contact your Samtec sales representative to obtain the latest specifications before placing your product order Samtec Optical Group 440 North Wolfe Rd Sunnyvale CA 94085 1 800 SAMTEC 9 Sales 408 406 4123 Technical Support 302 521 7798 QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 31 of 31
20. heet Rev 1 2 November 2012 page 21 of 31 sam ec Product Specification MODIFYING THE MEMORY MAP AND INTE A Windows based utility is available to edit the QSFPO 40G memory map values as well as modify and read various factory only internal settings This software utility is called QSFPsende exe Software Tool and Hardware Requirements The following are required to run the OSFPSend application Windows computer Total Phase Aardvark I2C SCPI Interface TP240141 http www totalphase com products aardvark i2cspi Total Phase 10 pin split cable TP249212 or TP240411 http www totalphase com categories accessor 3 3V power supply Programming cable connecting the QSFP AOC edge connector to the power supply and Aardvark This test cable should be wired as in Figure 4 iPass Connector Viewed from bottom GND 35 3V 24g 24g Black Red SCL SDA GNO Pini Pin3 Pin 2 30g 309 30g Yelow Blue Black Aardvark 10 pin connector 0 100 IDC Figure 4 QSFP programming cable At this time the Aardvark USB to I2C interface is the only supported hardware device for accessing the I2C bus via the QSFPsend utility QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 22 of 31 Installing and Connecting the Hardware Install the Aardvark software per manufacturer instructions Connect the USB side of the Aardvark to the USB port of the computer Connect the data side of the breakout cable to the I2C outputs of the Aardvark Co
21. igure 2 QSFP Filtering Scheme 1uH QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 8 of 31 The QSFP AOC is designed to work with QSFP compliant sockets The electrical requirements for input signal into the AOC are defined for the transmit side in Table 4 and for the receive side in Table 5 Table 4 AOC Electrical Input Requirements Specifications Symbol Unit Min Max Notes Sle EndedvorageToterence v 9 3 ac common Mode vara mw s WS biterentatinputs Parameter soo amp Seenotei Ra Modecom Su e f aoo eee 00 Dmame a THT aaben f 5 fe 9 J9 Jitter Tolerance J9 Notes for Table 4 1 Maximum SDD11 is defined by the formulae 0 1 lt f lt 4 11 12 2Jf 4 11 lt f 11 1 6 3 13 log f 2 The worst case electrical input is defined by the eye mask Voltage mV Normalised Time UI QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 9 of 31 Specifications Symbol Unit Min Max Notes Poataraterercramn avis oom maus Freminaion inatcnatine atm 5 output ac common mode vare w _ 75 aw aana Y ao 3a Gum QE Lx Iw M Differential Output Amplitude i In Peak to peak differential squeched state Eper eaeoe aoa w ae Tar omereniaroupusParameer soo a senor omonime stewseweencramek e 5 aam Jo uw 9 oo
22. le 5 Optical Engine 2 wire Timing Specifications Parameter symbol Unit min Typ Max Conditions onena fa kr o fofo o Flock Puce watniow tow m 3 creme eee R Time bus free before new transmission can Laur Between STOP and START start HERE HEER RER ENS ER BER mmm em o 9 e e NUNC UU RN RU RR Input Rise Time i From Vi max 0 15 to Vin min 400kHz i san 0 15 F Vitmax 0 15 to Vi STOP Set up Time ett Setup time on TEE select lines ModsSelL Setup Time HOST select setup before start of a host initiated serial bus sequence Delay from completion of a serial bus sequence to changes of module select status Delay from a host de asserting ModSelL at any Deselect_abort point in a bus sequence to the module releasing SCL and SDA ModSelL Hold Time Host_select_hold Abort Sequence Bus Release STOP START tHD SDA SDA tup DATS tsu DAT QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 12 of 31 Control Status and Monitor Interface Table 7 and Table 8 provide the specifications of the control status and monitoring interface Table 7 1 0 Timing for Control Status and Monitoring Specifications Symbol Unit Min Max Notes E Time from power on hot plug or rising edge of Initialization time tinit ms 2000 P dis a reset until the module is fully functional A reset is generated by a low level longer than Reset init assert time T
23. ne embedded into each end of the cable assembly The engines interconnect 4 independent transmit receive lanes An on board micro controller provides control diagnostic and monitoring for the cable functions as well as the external l C serial communication interface A functional block diagram of the engine is shown in Figure 2 The transmitter section consists of a 4 channel VCSEL Vertical Cavity Surface Emitting Laser array a 4 channel input buffer and laser driver The receiver section consists of a 4 channel PIN photodiode array a 4 channel TIA array and a 4 channel output buffer SCL SDA Electrical ModSelL Optical interface LPMode interface ModPrsL ResetL Figure 2 Transceiver Functional Block Diagram Transmitter Block The optical transmit portion of the engine incorporates a 4 channel VCSEL Vertical Cavity Surface Emitting Laser array a 4 channel input buffer and laser driver diagnostic monitors control and bias blocks The transmit input buffer provides CML compatible differential inputs presenting a nominal differential input impedance of 100 Ohms AC coupling capacitors are located on the Optical Engine board and are not required on the host board An LVTTL compatible Two Wire Serial or C interface is provided for module control and diagnostics Status alarm and fault information are available via the TWS interface To reduce the need for polling a hardware interrupt signal is provided to inform hosts
24. nnect the 3 3V power supply to the power input in the breakout cable Connect the QSFPO 40G AOC to the QSFP end of the breakout cable Your setup should be as in Figure 5 IFass 35 pea conmmecor Computer QE OSFFO 3 3V Power Supply Figure 5 QSFPO 40G Programming Setup Installing and Running the QSFPsend Utility Copy the QSFPsend exe program and the examples csv command files to an easily accessible location on your hard disk the following example assumes they are put in C Test QSFPsend exe is a simple command line program to read and write QSFP mapped registers and the internal EEPROM used to control the device It is run by typing a command looking generically like QSFPsend lt filename gt Where lt filename csv gt is a comma delimited file containing the data to be read or edited in the memory map Detail of the syntax of the CSV files and common examples are given below Example csv files are provided with the software Open a command window go to start run type cmd Navigate to the directory where you installed by typing cd C Test QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 23 of 31 Type the following command QSFPsend ReadVendorPN csv You should get the following output reading the part number field E Command Prompt n x C 5TIest lpenI MemIntrf exe HeadlendorPN csv lpenI MemIntry exe version 2 0 6 Parsing ReadUendorPH csu 1 devicets gt found
25. of fetching and writing the data internally from to the correct physical location Instructions for modifying the EEPROM map can be found in Section O QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 14 of 31 SFF Memory Map The structure of the SFF Memory Map as defined by SFF 8436 rev 3 8 is shown in Figure 3 For historical reasons the SFF memory map is somewhat contrived It is divided into lower and upper memory The lower memory is a block or page of 128 bytes and its bytes address are numbered 0 to 127 The upper memory is itself divided in four pages numbered page O to page 3 Each Page is also 128 bytes long block but with byte addresses numbered 128 255 for each page All QSFP are hard wired at I2C device address AOh The lower page is accessed by using the AOh address as device address and the 0 to 127 address as the byte address Upper pages are accessed by first writing the desired page number at byte in address 127 Page Select Byte Any subsequent byte read or write request in the address range 128 255 will be done from to the page that has been specified in the Page Select Byte Samtec AOCs do not use Page 02 2 wire serial address 1010000x AOh ID and Status 3 Bytes 21 Interrupt Flags 19 Bytes 33 Module Monitors 12 Bytes 81 Channel Monitors 48 Bytes 4 12 Byt Module and Channel 7 Bytes 106 Mask Password Change Entry 4 Bytes Area Optional y Password Entry Area Optional Page Selec
26. pt Flags are provided o Rx LOS provided for each channel This indicates that the optical power input into the receiver has dropped below a minimum allowed value o Tx Fault provided for each channel This indicates that a fault condition relating to either the laser or one of the optical modulators has occurred o Transceiver Temperature High and Low Alarm and High and Low Warning Transceiver Supply Voltage High and Low Alarm and High and Low Warning QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 7 of 31 samiec Product Specification SPECIFICATIONS Electrical Characteristics The QSFP AOC s maximum operating and storage conditions are shown in Table 1 Any stress beyond these maximum ratings may result in permanent damage to the device Table 1 Absolute Maximum Rating Powered case temperature Specifications listed in this documentation are only guaranteed when the QSFP AOC is operated under the recommended operating conditions listed in Table 2 Heat sink temperature Table 2 Recommended Operating Conditions In addition to the recommended operating conditions the power supply requirements are shown in Table 3 Table 3 Power Supply Requirements Notes 50 1 kHz to frequency of operation measured at Vcc host The QSFP specification recommends the use of a host board power supply filter to reduce power supply noise The recommended power supply filter is Shown in Figure 2 F
27. rference EMI Brad ps rn EMI Immunity Variation of IEC 61000 4 3 10V m 80 1000Mz EET IEC 60825 1 amendment 2 Gace y y CFR 21 section 1040 RoHS compliance RoHS 6 6 directive 2002 95 EC i amendment 4054 2005 747 EC QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 29 of 31 Ordering Information and Technical Support Part Number QSFPO 40G XXX X XX Product Category Bandwidth 40Gbps 40G QDR 56Gbps 56G FDR Fiber Length 5m 10m 100m Other length in meters Specific Product Variant Variant Description 01 Standard 02 TBD Figure 8 QSFPO 40G AOC Part Numbering Contact Samtec for Sales or Technical support 1 800 SAMTEC 9 Optical Sales 408 406 4123 Technical Support 302 521 7798 Definitions This document uses the following conditions All voltages are referred to GND unless otherwise specifically noted Currents are defined positive out of the pin Reference Documents SFF 8436 QSFP specifications document SFF 8431 SFF specifications document Please see http www sffcommittee org ie Specifications html for the most recent versions of these documents QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 30 of 31 Notice This document is made available subject to Samtec General Terms and Conditions available at http www samtec com and contains information about a product which is currently under final development The information contained in this document is ba
28. ry bytes are shown in Table Default factory programmed values for Infiniband are shown Fields that are adjusted at manufacturing time are bolded Please contact Samtec for alternate default configurations Table 10 Page 00 Upper Memory Fields factory default Infiniband Byte Description Value U Us H HT H H 129 7 6 Extended identifier values power Power Class 1 Module class 1 5W max ama 70 cbeknghGMfbe HTHH O O us 70 cekngh OMBfbe o NotAppisbe 4 70 Cable length Omafibe oo NotAppiabe us 70 Cable length Oma fiber o lNotAppiabe Transmitter technology 0000 850 nm VCSEL 164 3 0 Extended module codes InfiniBand 00111b SDR DDR amp QDR data rates iip Vedoou o h 368183 VeMorprtmmbe QHO imam __ Vendorrevsion 9 i3 0 AX output amplitude programming 0 Netmpemened i94 3 Rx squelch disable implemented 0 Notmpemened i94 1 squelch disable implemented 0 Notmpemened i9 0 Tmekhimpemened J 0 Netmpemeted 195 6 MemoypaeOipowdei 0 Notmpemened 195 4 TX disable implemented also 1 Y disable implemented disables serial output TX fault reporting implemented TX fault reporting implemented LOS and reporting implemented 0 Not Implemented 195 VYMMDD asas m fios H oo opr 224 255 All Vendor specific information FFFFFFFFFF
29. sed on design targets simulation results or early prototype test results Characteristics data and other specifications are subject to change without notice Therefore the reader is cautioned that this datasheet is preliminary The reader is advised to obtain the most recent datasheet before considering any purchase or use for design considerations Warning Samtec products are not intended for use in life support applications and any such use without written consent is therefore prohibited Revision History Table 16 Revision History Date Rev No Status comments Author Approver enna o oen ith oazon om Release vreinet w Foymgmn om Release wew eeromseon w Foy om Release Ummealzo 7 Forma os Release EEPROM Programming new par number Mr Cosa 10 oak wPo4xocReo ma oo 11 Release Convesiontosamtecformat 6 2011 Samtec Inc All rights reserved Information provided in this document is provided in connection with Samtec products All information contained in this document is subject to change without notice Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of Samtec or third parties Except as provided in Samtec s Terms and Conditions of Sale for such products Samtec assumes no liability whatsoever and Samtec disclaims any express or implied warranty relating to sal
30. t Byte 4 Bytes 1 Byte Page 00 Page 01 Page 02 Page 03 128 Base ID fields 64 Bytes 128 CC_APPS 1 Byte 128 User EEPROM Data 128 Bytes 128 ID and Status 48 Bytes 191 123 ZE 255 175 223 Extended ID 32 Bytes 129 AST Table Length TL 1 Byte 223 Interrupt Flags 48 Bytes 255 Application Code Entry 33 Vendor Specific ID 32 Bytes 131 2 Bytes 225 Module Monitors 2 Bytes Application Code Entry 133 2 Bytes 241 ID and Status 16 Bytes Application Code Entry 3 B B 255 TL 2 Bytes 255 Module Monitors 2 Bytes Figure 3 Structure of the SFF Memory Map from the SFF specification QSFPO 40G AOC Datasheet Rev 1 2 November 2012 page 15 of 31 Below is a summary description of the memory pages For more details see pages 16 18 of this product specification e Lower memory Page 00 bytes 0 127 contains status interrupt and monitoring information e Page 00 bytes 128 255 contains standardized Read Only information for the end user The data is physically mapped to the microprocessor internal EEPROM bytes 128 255 e Page 01 bytes 128 255 is optional and not supported in the Samtec AOC e Page 02 bytes 128 255 is available for the user to store and read his own data e Page 03 bytes 128 255 contains module thresholds channel thresholds and masks and optional channel controls Page 00 Lower Memory Many of the lower memory bytes are optional or not applicable to an AOC implementation Table 6 lists the bytes and correspon
31. y referred as the EEPROM parameters When the first standard revision was written all the parameters were static and they were actually stored in an on board EEPROM As revisions evolved some of the fields became dynamic such as temperature or optical power readings while others such as interrupts and alarms became Read Write R W As a result an EEPROM based implementation did not suffice anymore although the term is still used to refer to the Memory Map We will refer to this as the SFF Memory Map Consequently the Samtec current implementation although referred to as an EEPROM map does not using an actual direct EEPROM read or write Instead each I2C read or write request is interpreted by the embedded microprocessor in the optical engine The microprocessor then reads or stores data which could come from go to different sources o The processor s own internal EEPROM o The processors static dynamic RAM or register memory o Sensorsor internal chipset readings o Internal processor calculations or registers An important consequence is that EEPROM byte addresses used in I2C requests are virtual they will not always correspond to the physical address in the processor internal EEPROM or might not have a physical EEPROM location at all This is invisible to the end user who just reads and writes to the I2C as if it were an actual EEPROM according to the standard SFF memory map The processor will take care
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