LPC-E2468 User Manual
Contents
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5. TCHDOGTIMER K gt SYSTEMCONTROL fn AHB 0 BRIDGE MASTER SLAVE PORT BRIDGE PORT AHB TO APB BRIDGE __ EXTERNAL INTERRUPTS USB DEVICE HOST OTG WITH 4 RAM AND DMA gt GP DMA CONTROLLER 125 INTERFACE SPI SSPO INTERFACE SSP1 INTERFACE SD MMC CARD INTERFACE UARTO UART2 UART3 UART1 I2C0 2 1 12 2 Vss VDD DCDC 3V3 D 31 0 A 23 0 control lines VBUS port1 port2 I2SRX_CLK 25 I2SRX_WS I2STX WS I2SRX SDA I2STX_SDA SCK SCKO MOSI MOSIO MISO MISOO SSEL SSEL1 SCK1 MOSI 501 SSEL1 MCICLK MCIPWR MCICMD MCIDAT 3 0 TXDO TXD2 TXD3 RXDO RXD2 TXD1 RXD1 DTR1 51 DSR1 CTS1 DCD1 RD1 RD2 TD1 TD2 SCLO SCL1 SCL2 SDAO SDA1 SDA2 LPC2468 memory map 4 0 GB OxFFFF FFFF AHB PERIPHERALS 3 75 GB 0000 APB PERIPHERALS 3 5 GB OxE000 0000 OxDFFF FFFF EXTERNAL STATIC AND DYNAMIC MEMORY FFFF EXTERNAL ON BOARD MEMORY 16MB HEN m 2 0 GB BOOT ROM AMD BOOT FLASH BOOT FLASH REMAPPED FROM ON CHIP FLASH RESERVED ADDRESS SPACE ON CHIP STATIC RAM 1 0 GB Ox4 000 0000 SPECIAL REGISTERS OxaFFF 8000 RESERVED ADDRESS SPACE 0 0008 0000 0 0007 FFFF ON CHIP NON VOLATILE MEMORY 0 0 GB 0 0000 0000 7 36 SCHEMATIC
6. control Each PWM has an external count inputs RTC with separate power domain clock source can be the RTC oscillator or the APB clock 2 SRAM powered from the RTC power pin allowing data to be stored when the rest of the chip is powered off WatchDog Timer be clocked from the internal RC oscillator the RTC oscillator or the APB clock e Standard ARM test debug interface for compatibility with existing tools e Emulation trace module supports real time trace e Single 3 3 V power supply 3 0 V to 3 6 V e Three reduced power modes idle sleep and power down e Four external interrupt inputs configurable as edge level sensitive All pins on PORTO and PORT2 can be used as edge sensitive interrupt sources e Processor wake up from Power down mode via any interrupt able to operate during Power down mode includes external interrupts RTC interrupt USB activity Ethernet wake up interrupt CAN bus activity PORTO 2 pin interrupt e Two independent power domains allow fine tuning of power consumption based on needed features e Each peripheral has its own clock divider for further power saving These dividers help reducing active power by 20 30 e Brownout detect with separate thresholds for interrupt and forced reset e On chip power on reset On chip crystal oscillator with an operating range of 1 MHz to 24 MHz e 4 MHz internal RC oscillator trimmed to 1 accuracy that c
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8. 2008 Disclaimer 2008 Olimex Ltd All rights reserved Olimex logo and combinations thereof are registered trademarks of Olimex Ltd Other terms and product names may be trademarks of others The information in this document is provided in connection with Olimex products No license express or implied or otherwise to any intellectual property right is granted by this document or in connection with the sale of Olimex products Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder The product described in this document is subject to continuous development and improvements All particulars of the product and its use contained in this document are given by OLIMEX in good faith However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded This document is intended only to assist the reader in the use of the product OLIMEX Ltd shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product
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10. EDs named STATI1 green STAT2 red connected to LPC2468 104 P4 17 A17 LPC2468 pin101 4 16 16 Two yellow LEDs named USB 1 and USB 2 connected to LPC2468 pin 66 PI1 18 USB UP LED1 PWMI 1 CAP1 O 1 2468 pin 45 PO 13 USB UP LED2 MOSI1 ADO 7 One red LED named SD indicating that SD MMC card is powered up Power supply red LED with name PWR indicates that 3 3V is present EXTERNAL CONNECTOR DESCRIPTION PWR Signal Name PWR You should apply voltage 9 12 VDC or 6 9 VAC at the PWR pin USB D Pin Signal Name VCC USBDM USBDP GND USBDM USBDP These signals form the differential input output for the USB device depending on the direction of the data flow USB H Signal Name Signal Name USB PWRDI USB PWRD2 2 qun 6 fue a Jow oo 5 67 8 USB_PWRD1 Output USB Power 1 This signal is output from the processor and input for the USB host 1 U1D U1D This signals form the differential input output for USB host 1 depending on the direction of the data transfer USB_PWRD2 Output USB Power 2 This signal is output from the processor and input for the USB host 2 U2D U2D This signals form the differential input output for USB host 2 depending on the direction of the data transfer TAG Signal Name Signal Name 24 6 8 10 12 14 16 18 20 2 mi wp 5 ms ND mx o op TDI Input Test Dat
11. ENTS Cables USB A B cable to connect to virtual serial port on the board You will need LPT cable if you want to program the MCU with AVR JTAG You might need other cables in case of other programmers debuggers Hardware Programmer debugger AVR JTAG or any compatible tool Software The board is delivered with uC Linux pre loaded You could develop projects for the board with Eclipse IAR etc Please refer to the LPC E2468 Quickstart Guide which is on the CD for more details on the software requirements PROCESSOR FEATURES The LPC2468 processor has the following features ARM7TDMI S processor running at up to 72 MHz 512 kB on chip flash program memory with In System Programming ISP and In Application Programming IAP capabilities Flash program memory is on the ARM local bus for high performance CPU access 98 kB on chip SRAM includes 64 kB of SRAM on the ARM local bus for high performance CPU access 16 kB SRAM for Ethernet interface Can also be used as general purpose SRAM 16 kB SRAM for general purpose DMA use also accessible by the USB 2 kB SRAM data storage powered from the Real Time Clock RTC power domain Dual Advanced High performance Bus AHB system allows simultaneous Ethernet DMA USB DMA and program execution from on chip flash with no contention EMC provides support for asynchronous static memory devices such as RAM ROM and flash as well as dynamic memories such
12. Y PD EXT2 21 3 18 2 22 P3 I7 EXTI 3 PO 19 24 PO l4 2 23 P3 16 EXT2 24 2 31 25 PO 11 26 PO 10 2 25 P2 30 EXT2 26 P2 27 27 PO 9 EXTI28 PO 8 2 27 P2 26 EXT2 28 P2 25 EXTI 9 0 7 EXTI 30 PO 2 29 203 EXT2 30 2 22 1 17 VREF 18 PO 24 2 17 3 22 EXT2 18 P3 21 19 P0 23 20 22 EXT2 19 3 20 2 20 P3 19 31 PO0 5 32 PO 4 231 2 15 2 32 2 14 33 34 PO 0 233 P2 9 2 34 P2 8 1 35 4 30 EXT1 36 4 29 2 55 2 7 2 36 EXTI 37 4 28 EXT1 38 4 27 2 7 P2 5 2 38 2 EXTI 39 P3 26 40 4 15 239 2 3 2 40 MECHANICAL DIMENSIONS measures mm AVAILABLE DEMO SOFTWARE LPC E2468 is delivered pre loaded with C Linux and the sources and binaries are on the accompanying CD ORDER CODE LPC E2468 assembled and tested no kit no soldering required How to order You can order to us directly or by any of our distributors Check our web www olimex com dev for more info Pote Geer All boards produced by Olimex are RoHS compliant Revision history REV A created February
13. a In This is the serial data input for the shift register TDO OutputTest Data Out This is the serial data output for the shift register Data is shifted out of the device on the negative edge of the TCK signal TMS Input Test Mode Select The TMS pin selects the next state in the TAP state machine TCK Input Test Clock This allows shifting of the data in on the TMS and TDI pins It is a positive edge triggered clock with the TMS and TCK signals that define the internal state of the device TRSTNInput Test Reset N This signal resets the JTAG controller RTCK OutputReturn Clock This is a synchronization signal which the JTAG connector uses to acknowledge it is ready to receive transmit RSTN Input Reset This signal resets the MSU 5 T7T 9 11 13 15 JTAG is used to to program and debug the MCU UEXT Lr Signal Name Signal Name 246 8 10 SCLO 6 spao vso s 9 scx TXD1 OutputTransmit Data This is the asynchronous serial data output RS232 for the RS232 interface RXD1 Input Receive Data This is the asynchronous serial data input RS232 for the RS232 interface SCLO I O Serial Synchronization Clock This is the synchronization clock for the data transfer through I2C interface This could be either input or output depending on whether the MCU is master or slave SDAO I O Serial Data This pin is data input or output depending on the data flow direction for the I2C interfa
14. an optionally be used as the system clock When used as the CPU clock does not allow CAN and USB to run e On chip PLL allows CPU operation up to the maximum CPU rate without the need for a high frequency crystal May be run from the main oscillator the internal RC oscillator or the RTC oscillator e Boundary scan for simplified board testing e Versatile pin function selections allow more possibilities for using on chip peripheral functions BLOCK DIAGRAM PO P1 P2 P3 P4 MII RMII EINT3 to EINTO PO P2 2 CAPO CAP1 CAP2 CAP3 4 2 2 MATO 3 MAT 6 PWMO PWM1 1 PCAPO 2 1 PO P1 8 ADO AOUT VBAT power domain 2 1 2 ALARM XTAL1 XTAL2 LPC2468 64 kB 512 kB SRAM FLASH TMS TDI TRST TCK TDO trace signals RESET EXTINO DBGEN SYSTEM dos FUNCTIONS TEST DEBUG INTERFACE VDD 3V3 VDDA VDD 1V8 HIGH SPEED GPI O 160 PINS TOTAL INTERNAL CONTROLLERS ARM7TDMI S 2 5 system 5 clock gt lt wy H INTERNAL RC OSCILLATOR 1 6 0 EXTERNAL MEMORY CONTROLLER ETHERNET MAC WITH DMA CAPTURE COMPARE AHB BRIDGE TIMERO TIMER1 TIMER2 TIMER3 PWMO PWM1 LEGACY GPI O 64 PINS TOTAL ND CONVERTER D A CONVERTER 2 C gt RTC OSCILLATOR CAN1 CAN2
15. as single Data Rate SDRAM Advanced Vectored Interrupt Controller VIC supporting up to 32 vectored interrupts General Purpose AHB DMA controller GPDMA that can be used with the SSP l S bus and SD MMC interface as well as for memory to memory transfers Serial Interfaces Ethernet MAC with MII RMII interface and associated DMA controller These functions reside on an independent AHB bus USB 2 0 full speed dual port Device Host OTG Controller with on chip PHY and associated DMA controller Four UARTs with fractional baud rate generation one with modem control I O one with IrDA support all with FIFO CAN controller with two channels SPI controller Two SSP controllers with FIFO and multi protocol capabilities One is an alternate for the SPI port sharing its interrupt SSPs can be used with the GPDMA controller Three I C bus interfaces one with open drain and two with standard port pins Inter IC Sound interface for digital audio input or output It can be used with the GPDMA e Other peripherals SD MMC memory card interface 160 General purpose I O pins with configurable pull up down resistors 10 bit ADC with input multiplexing among 8 pins 10 bit DAC Four general purpose timers counters with 8 capture inputs and 10 compare outputs Each timer block has an external count input Two PWM timer blocks with support for three phase motor
16. ce MISO I O Master In Slave Out This pin could be either data input MCU is master or data output MCU is slave The signal is pat of the SPI interface MOSI I O Master Out Slave In This pin is be used for communication through SPI interface and it is either data output from the MCU when it is master or data input for the MCU when it is slave SCK I O Serial Synchronization Clock This is the synchronization clock for the data transfer through the SPI interface It could be either input or output depending on whether the MCU is master or slave SSEL I O Slave Select This is the slave select signal for the SPI interface If the MCU is master this is output If the MCU is slave this signal is input 1234 5678 RJ45 SIDE NOA Pin Signal Name Chip Side Pin Signal Name Chip Side 1 TD 5 Not Connected NC 2 TD 6 Not Connected NC 3 3 3V 7 RD 4 Not Connected NC 8 RD LED Color Usage Right Yellow Activity Left Green 100MBits s Half Full duplex TD OutputDifferential signal output This signal is output from the MCU TD OutputDifferential signal output This signal is output from the MCU RD Input Differential signal input This signal is input for the MCU RD Input Differential signal input This signal is input for the MCU SD MMC card slot HM JWW OS wee ne oce Joon MCIDATO 3 I O Memory Card I
17. is made with RC group R4 47K C20 100nF and RESET button CLOCK CIRCUIT Quartz crystal 12MHz is connected to LPC2468 pin 44 XTAL1 and pin 46 XTAL2 32 768 KHz quartz crystal is connected to LPC2468 pin 34 RTCX1 and pin 36 RTCX2 for its internal Real Time Clock JUMPER DESCRIPTION 3 3V_E m VDD1 10 pins 3 3VA E AaS VREF the VREF pin PHY PD If the jumper controls the PHY pin of the WP_E CER the SD MMC 4 NF WPE open disables CE CSI1 ES work through AB pin of the NAND flash MCU ISP E This jumper when closed supplies 3 3 V voltage to the of the MCU Default state is closed This jumper when closed supplies 3 3 V voltage to the VDDA MCU Default state is closed This jumper when closed supplies 3 3 V reference voltage to of the MCU Default state is closed This jumper controls the PHY signal of the Ethernet controller is pen the PHY is always enabled if the pin is closed the MCU Default state is open This jumper when closed inputs the Write protect signal from card to the MCU Default state is closed This jumper when closed write protects the flash and when the write protection Default state is open When 1 2 15 shorted you could select the flash memory for the Chip Select 1 signal If 2 3 is shorted the CE memory is connected to the N CE pin of the Default position is 1 2 shorted If yo
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19. nterface Data 0 4 These data lines for the SD MMC connector They could be both input and output for the MCU depending on the data flow direction MCICMD Output Memory Card Interface Command This is a command sent form the processor to the memory card and as such it is output from the processor MCICLK Output Memory Card Interface Clock This signal is output from the MCU and synchronizes the data transfer between the memory card and the MCU WP Input Write Protect This signal is input for the MCU CP Input Card Present This signal is input for the MCU EXTI amp EXT2 Pa nonoo 09 o Pin Signal Pin Signal Pin Signal Pin Signal Name Name Name Name 1 33V 2 GND 2 33V EXT22 GND EXTI 3 5V EXTI RSTN 2 3 5V EXT24 P4 23 EXTI 5 ALARM EXTI 6 1 29 EXT2 5 4 22 EXT2 6 4 21 EXTI 7 PI 28 EXTI 8 1 26 EXT2 7 P4 20 EXT2 8 P3 Bl EXTI 9 PI 25 EXTI 10 1 24 EXT2 9 P3 30 2 10 P3 29 11 P1 23 EXTI 12 EXT2 11 P3 28 EXT2 12 P3 27 13 PI 20 14 WP 2 13 P3 26 2 14 P3 25 1 15 PO 26 EXT2 16 P3 23 1 16 P0 25 2 15 P3 24 EXTI 21 PO 21 1 22 PH
20. o toy t 001 ZADAO ASNE ovid 1682 eed as LHOHAO 8808 M ino oe ZIVOION 098 a1 XAWINO 8002 2 LHOIHAdOO JSN t 01 O1VGIONW 9 as Ey em Re Vi oru Jos 9 28 E ISSA 5 O 6 ESN IG QW2 yee WN UOOL sorelvaiao D ias NEATE ATE ATE ENGON 2 xc Cog yf aN POY Kec 4 1 OWNWI OS aw AG 1257 BOARD LAYOUT power usb rs232 extension 1 extension 2 HU ethernet vo PU aE Dp RR 96 Hii du BL a Mc 2 1872181 0641 4 waa Ww 1 ut VIL iun it LPC 8 E USB host POWER SUPPLY CIRCUIT LPC E2468 can take power from power connector PWR where 9 12 VDC or 6 9 VAC external voltage source has to be applied The board could also take power from USB_D or from battery Note the battery only supplies the internal 2MB SRAM and the RTC The board power consumption is about 150 mA at 9VDC RESET CIRCUIT LPC E2468 reset circuit
21. pr lt 77 2 LPC E2468 development board Users Manual Rev B February 2008 Copyright c 2008 OLIMEX Ltd All rights reserved INTRODUCTION LPC E2468 uC Linux development prototype board with LPC2468 USB Ethernet SD MMC in credit card format BOARD FEATURES MCU LPC2468 16MB SDRAM 128 MB NAN Flash standard JTAG connector with ARM 2x10 pin layout for programming debugging with ARM JTAG Ethernet 100MBit 2x USB hosts USB to RS232 converter device connected to LPC2468 UART SD MMC card connector UEXT connector with I2C SPI RS232 and power supply for connecting add on modules like RF link MP3 etc available from Olimex trimpot connected to ADC RESET circuit with external control of Philips ISP utility via RS232 port two USER button RESET Button two on board voltage regulators and 5V with up to 800mA current Extension port connector for many of microcontrollers pins single power supply External power supply USB or JTAG connector Battery holder and connector for the RTC power supply led FR 4 1 5 mm red soldermask component print Dimensions 90x60mm 3 54 x 2 36 ELECTROSTATIC WARNING The LPC E2468 development board is shipped in protective anti static packaging The board must not be subject to high electrostatic potentials General practice for working with static sensitive devices should be applied when working with this board BOARD USE REQUIREM
22. u put this jumper you enable the ISP In System Programming UD is used when you want external software to program the LCP2478 This jumper is used in combination with the RST E jumper RST E software to program the LCP2478 This jumper is used in combination with the ISP E jumper the Reset Default state is open If you put this jumper you enable external software to control signal to the processor This is used when you want external Default state is open BDS_E DES Boundary scan enable Default state is open BAT EXT This jumper controls the input power supply for the VBAT pin If 1 2 are shorted the external battery is connected to 12 3 If 2 3 are shorted the VBAT pin is supplied by the on DENS 3 3V supply 12 3 Default state 15 2 3 shorted EXT USBD This jumper controls 3 3V power supply for the board If 1 2 are shorted the external power from the PWR DID jack and after the 5V voltage regulator is input to the 12 3 3 3V voltage regulator and supplies the board If 2 3 are shorted the USB device provides 5V to the voltage regulator and supplies the board 12 3 Default state is 1 2 shorted INPUT OUTPUT One reset button with name RESET connected to LPC2468 pin 35 RESET Two user buttons with names BUT1 connected to LPC2468 pin 102 P2 13 EINT3 MCIDAT3 I2STX_SDA and BUT2 connected to LPC2468 81 P2 21 DYCS1 Two L
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