Home

PC-TIO-10 User Manual - UCSD Department of Physics

1. The PC TIO 10 is configured at the factory to a base I O address of hex 1A0 to interrupt level 5 and to local interrupt setting No Connect and No Connect These settings shown in Table 2 1 are suitable for most systems However if your system has other hardware at this base I O address or interrupt level you need to change these settings on the PC TIO 10 as described in the following pages or on the other hardware Record your settings in the PC TIO 10 Hardware and Software Configuration Form in Appendix F Customer Communication Table 2 1 PC TIO 10 Factory Set Switch and Jumper Settings Base I O Address Hex 1A0 factory setting The black side indicates the side of the switch that is pushed down Interrupt Level Interrupt level 5 selected factory setting Local Interrupt No Connect and No Connect No Connect factory setting No Connect National Instruments Corporation 2 1 PC TIO 10 User Manual Configuration and Installation Chapter 2 Figure 2 1 PC TIO 10 Parts Locator Diagram Base I O Address Settings The base I O address for the PC TIO 10 is determined by the switches at position U12 see Figure 2 1 The switches are set at the factory for the I O address hex 1A0 With this default setting the PC TIO 10 uses the I O address space hex 1 AO through 1A7 Note Verify that this space is not already used by other equipment installed in your computer If any equipment in your computer uses this I O addre
2. continues National Instruments Corporation E 1 PC TIO 10 User Manual Switch Settings Appendix E Table E 1 Switch Settings with Corresponding Base I O Address and Base I O Address Space continued Switch Setting Base I O Address Base I O Address A9 A8 A7 A6 A5 A4 A3 hex Space Used hex OD8 ODF OEO 0E7 OES OEF OFO OF7 OF8 OFF 100 107 108 10F 110 117 118 11F 120 127 128 12F 130 137 138 13F 140 147 148 14F 150 157 158 15F 160 167 168 16F 170 177 178 17F 180 187 188 18F 190 197 198 19F 1A0 1A7 1A8 LAF 1B0 1B7 1B8 1BF 1C0 1C7 1C8 1CF 1D0 1D7 1D8 IDF 1E0 1E7 1E8 1EF 1FO 1F7 1F8 1FF 200 207 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 oo ORR RR SBR RP RRB RRP EHH HR ODOC OOOO OOOO OOOO ORR RB mm COPPER RESP R EH OOOTC OOOO ORB RRR RR HOODOO OOO ORR BR mm CREEPER OT OORP RP RRP OOO ORB HH OOO ORR RH OOO ORR HHO SCRPROORPROORP HRP OCOORHOORHOORROOHRHROORHOOHRRH OOH CROP OCOHR OR OP OR OP OH OR OH OR OR OH OR OR OH OH OFROH Note Base I O address values 000 through OFF hex are reserved for system use Base I O address values 100 through 3FF hex are available on the I O channel continues PC TIO 10 User Manual E 2 National Instruments Corporation Appendix E Switch Settings Table E 1 Switch Settings with Corresponding Base I O Address and Base I O
3. e Chapter 4 Programming describes in detail the address and function of each of the PC TIO 10 control and status registers This chapter also includes important information about programming the PC TIO 10 e Appendix A Specifications lists the specifications of the PC TIO 10 e Appendix B 7 0 Connector describes the pinout and signal names for the I O connector on the PC TIO 10 e Appendix C AMD Am9513A Data Sheet contains the manufacturer data sheet for the AMD Am9513A integrated circuit This circuit is used on the PC TIO 10 board e Appendix D Motorola MC6821 Data Sheet contains the manufacturer data sheet for the Motorola MC6821 integrated circuit This circuit is used on the PC TIO 10 board e Appendix E Switch Settings lists the possible switch settings the corresponding base I O address and the base I O address space used for that setting National Instruments Corporation v PC TIO 10 User Manual Preface e Appendix F Customer Communication contains forms for you to complete to facilitate communication with National Instruments concerning our products e The ndex alphabetically lists topics covered in this manual including the page where the topic can be found Conventions Used in This Manual The following conventions are used throughout this manual italic monospace NI DAQ PC Abbreviations Italic text denotes emphasis a cross reference or an introduction to a key concept Lowercase
4. 2 command descriptions C 29 to C 32 connection diagrams C 3 count control C 28 count source selection C 29 counter logic groups C 8 counter mode control options C 26 to C 29 counter mode descriptions C 14 to C 26 counter mode register C 11 counter mode register bit assignments C 27 counter output waveforms C 28 data bus assignments C 7 data pointer sequencing C 10 data port registers C 11 detailed description C 8 to C 11 general description C 2 hardware retriggering C 29 hold register C 11 input circuitry C 7 interface considerations C 7 interface signal summary C 7 load data pointer commands C 10 load register C 11 master mode control options C 11 to C 13 master mode register bit assignments C 12 mode waveforms C 15 to C 26 ordering information C 3 to C 5 output control C 26 to C 28 output control logic C 27 overview 3 2 pin description C 6 prefetch circuit C 10 specifications C 33 to C 38 status register C 10 to C 11 TC terminal count C 28 National Instruments Corporation Index 1 PC TIO 10 User Manual Index Am9513A Command Registers description of 4 5 register map 4 2 Am9513A Data Registers description of 4 4 register map 4 2 Am9513A Status Registers description of 4 6 register map 4 2 Am9513A STC devices programming considerations 4 10 programming example 4 10 to 4 13 B BO through B7 signals 2 8 base I O address default settings for National Instrument produ
5. 6 7 8 Po 10 47 48 Figure B 1 PC TIO 10 I O Connector Detailed signal specifications are included in Chapter 2 Configuration and Installation and in Appendix A Specifications National Instruments Corporation B 1 PC TIO 10 User Manual Appendix C AMD Am9513A Data Sheet This appendix contains the manufacturer data sheet for the AMD Am9513A integrated circuit Advanced Micro Devices Inc This circuit is used on the PC TIO 10 board Copyright Advanced Micro Devices Inc 1989 Reprinted with permission of copyright owner All rights reserved Advanced Micro Devices Inc 1990 Data Book Personal Computer Products Processors Coprocessors Video and Mass Storage National Instruments Corporation C 1 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 2 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 3 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 4 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 5 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 6 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 7 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 8 National Instruments Corporati
6. Am9513A STCs The code below lists a sample function that can be used to reset the Am9513A STCs on the PC TIO 10 In addition the code lists a sample function that can be used to generate a variable duty cycle square wave miscellaneous definitions By define cmd_port 0x0001 define data_port 0x0000 define no_err 0 define range_err 1 define stc_a 0x0000 define stc_b 0x0002 define tio_ba 0x01a0 function prototypes PC TIO 10 User Manual 4 10 National Instruments Corporation Chapter 4 void main void void reset9513 un int square_wave unsigned support function reset9513 ba unsigned int void Programming signed int unsigned int unsigned int unsigned int long unsigned int unsigned long s if se_address chip _ offset base _address chip_offset unsigned int cmd data int Cer set up the register addresses cmd base_address chip_offset cmd_ port data base address chip_offset data_ port reset the 9513 outp cmd Oxff reset the chip for ctr TL CET K 5 cert outp cmd ctr select Counter Mode Register outp data 0x00 store mode low byte outp data 0x00 store mode high byt X outp cmd ctr 8 select Counter Load Register outp data 0x03 store load low byte outp data 0x00 store load high byte outp cmd Ox5f load all counters int square _wave
7. Appendix D Motorola MC6821 Data Sheet Interrupts are enabled and disabled through the MC6821 Control Register In addition the edge that generates the interrupt is programmable through the MC6821 Control Register When an interrupt is generated as indicated when the Control Register is read the only way the interrupt can be cleared is by reading the Output Register through the Data Register of the I O port that indicated the interrupt For instance if IRQ in the Port B Control Register is set you must set DRS of the Port B Control Register to one and then you must read the Port B Data Register The data returned may not be important depending on how you are using interrupts The code that follows demonstrates how to set up the MC6821 for interrupt generation defines for the program define base_address 0x01A0 board located at address 1A0 xy define porta_offset 0x04 offset for Port A xy define portb_offset 0x06 offset for Port B 7 define data_offset 0x00 offset of Data Register define ctrl_offset 0x01 offset of Control Register define irq_channel 5 the interrupt channel set on W1 a sample structure for the interrupt service routine typedef struct unsigned int pa_ctrl pa_data pb_ctrl pb_data int done isr_ block _ type prototypes for the assembly language functions sd void far install_isr int isr_block_type far void far remove_isr void the mai
8. digital I O connector 3 3 time lapse measurements 2 10 timing signal connections 2 11 to 2 13 event counting application 2 10 frequency measurement 2 10 to 2 11 overview 2 9 pulse width measurements 2 10 specifications and ratings 2 11 to 2 12 time lapse measurements 2 10 timing and digital I O connector 3 3 timing signal relationships 2 12 U unpacking the PC TIO 10 1 4 unused bits X 4 6 National Instruments Corporation Index 7 PC TIO 10 User Manual
9. mov int pop mov mov cmp jne cmp je mov mov mov push mov mov mov int pop ax bp 6 get interrupt level al 7 check to see if it belongs to master short slave or slave interrupt chip al 008h offset for master vector list short setvec go set the vector al 068h offset for slave vector list slave_ack 1 flag for slave channel ax Save vector number for later ah 35h get current vector 21h get previous int_addr in es bx ax restore vector number CX CS prep to compare current new vectors dx es dx cx see if vector is already there short ii_0 bx offset _isr_handler short ii_ exit vector already installed exit vect_num al save vector number for remove_isr word ptr int_addr 0 bx save the address word ptr int_addr 2 es ds save the data segment ds cx copy cx cs into ds dx offset _isr_handler ds dx points to new handler ah 25h 21h install the handler in the system ds mask interrupt level in the interrupt controller register and store the original setting of the mask bit for the selected interrupt level PC TIO 10 User Manual 4 16 Chapter 4 National Instruments Corporation Chapter 4 Programming mov cx bp 6 get interrupt level mov bx 1 generate some masks shl bx cl mov cx bx cx has 1 in bit pos of int level not bx bx has 0 in bit pos of int level in al maskm get mask data from master chip jmp 2 delay wait for data transfer and cl al de
10. registers pop ds pop ax sti iret _isr_handler endp _TEXT ends end National Instruments Corporation 4 19 Programming PC TIO 10 User Manual Appendix A Specifications This appendix lists the specifications of the PC TIO 10 These specifications are typical at 25 C unless otherwise stated The operating temperature range is 0 to 70 C T O Connector Electrical Specifications T O Signal Ratings Absolute maximum voltage rating 0 3 to 7 0 V with respect to GND Input Signal Specifications Minimum Maximum Input logic high voltage all inputs 2 0 V 5 25 V Input logic low voltage all inputs 0 0 V 0 8 V Input current Am9513A 0 lt Vin lt 5 25 V 10 uA 10 HA Input current MC6821 Port A 0 lt Vin lt 0 8 V 2 4 mA Input current MC6821 Port A 2 0 lt Vin lt 5 25 V 400 uA Input current MC6821 Port B 0 4 lt Vin lt 2 4 V 10 HA Input current MC6821 EXTIRQ1 and EXTIRQ2 0 lt Vin lt 5 25 V 2 5 HA Pulse width Am9513A source inputs 70 nsec Pulse width Am9513A gate inputs 145 nsec Pulse width MC6821 EXTIRQ1 and EXTIRQ2 100 nsec Output Signal Specifications Pin 34 at 5 V 1 0 A maximum Note The total current output from pin 34 may be limited by the available current from your computer s power supply To determine the available current subtract the maximum power consumption of the board from the maximum current per slot The difference if less
11. selected These eight bits should be accessed after the eight bits of the least significant byte are accessed 7 0 D lt 7 0 gt These eight bits are the least significant byte to be loaded into or read from the Am9513A Internal Register currently selected These eight bits should be accessed before the eight bits of the most significant byte are accessed PC TIO 10 User Manual 4 4 National Instruments Corporation Chapter 4 Programming Am9513A Command Registers The Am9513A Command Registers control the overall operation of the Am9513A Counter Timer and selection of the internal registers that are accessed through the Am9513A Data Registers Address Base address 01 hex for Am9513A STC A Base address 03 hex for Am9513A STC B Type Write only Word Size 8 bit register 8 bit port Bit Map 7 6 5 4 3 2 1 0 Bit Name Description 7 0 C lt 7 0 gt These eight bits are loaded into the Am9513A Command Register See Appendix C Am9513A Data Sheet for detailed bit descriptions of the Am9513A Command Registers National Instruments Corporation 4 5 PC TIO 10 User Manual Programming Chapter 4 Am9513A Status Registers The Am9513A Status Registers give information about the output pin status of each counter in the Am9513A In addition these registers indicate the current setting of the byte pointer which indicates whether the next byte to be accessed is the most significant byte or the least significant byte Address
12. stranded that can be used with these connectors are as follows e Electronic Products Division 3M part number 3365 50 e T amp B Ansley Corporation part number 171 50 National Instruments Corporation 2 15 PC TIO 10 User Manual Chapter 3 Theory of Operation This chapter explains the basic operation of the PC TIO 10 circuitry The block diagram in Figure 3 1 illustrates the key functional components of the PC TIO 10 board 1 MHz and 5 MHz Clocks AMD source 4 Transceiver STC A AMD Channel Am9513A amp SOURCE 4 Control STC B OUT fo Ss 9 Q OU Ay 8 8 Interrupt Motorola 224 nterrup otorola Control MC6821 PortB Circuitry PIA EXTIRQ N 1A Fuse Figure 3 1 PC TIO 10 Block Diagram The PC I O channel consists of an address bus a data bus a DMA arbitration bus interrupt lines and several control and support signals National Instruments Corporation 3 1 PC TIO 10 User Manual Theory of Operation Chapter 3 Data Transceivers The data transceivers control the sending and receiving of data to and from the PC I O Channel PC I O Channel Control Circuitry The base address used by the board is determined by an onboard switch setting The address on the PC I O channel bus is monitored by the address decoder which is part of the I O channel control circuitry If the address on the bus matches the selected I O base address of the board the board is enable
13. whereas a port refers to the I O channel register through which the device must be accessed Therefore the size shown for a register indicates both the register size and the I O channel port size The digital I O ports associated with the MC6821 PIA are always referenced as Port A and Port B National Instruments Corporation 4 PC TIO 10 User Manual Programming Chapter 4 Register Map The following table lists the address map for the PC TIO 10 Table 4 1 PC TIO 10 Address Map Register Offset Address Hex Am9513A Register Group STC A Data Register i Read and write Command Register i Write only Status Register bi Read only STC B Data Register i Read and write Command Register i Write only Status Register bi Read only MC6821 Register Group PIA Port A Data Register i Read and write Port A Control Register i Read and write Port B Data Register i Read and write Port B Control Register i Read and write Register Descriptions The register descriptions for the devices on the PC TIO 10 including the Am9513A STCs and the MC6821 PIA are given on the pages that follow PC TIO 10 User Manual 4 2 National Instruments Corporation Chapter 4 Programming Register Descriptions for the Am9513A STCs Each of the two Am9513A STC devices has three registers a data register a command register and a status register The bit maps and signal definitions for each of these registers are as follows Counters 1 2 3 4 and 5
14. 0 select Hold Reg outp data unsigned int low_time send hold low byte outp data unsigned int low_time gt gt 8 send hold high byte outp cmd 0x40 0x01 lt lt counter 1 load the ctr outp cmd 0xe8 counter set output high outp cmd 0x20 0x01 lt lt counter 1 arm the ctr return no_err main function main reset both 9513s if reset9513 tio ba reset9513 tio ba start a 100 khz tio_ba sel stc_a stc_b 70 duty cycle square wave on Counter 8 lects the board s base address PC TIO 10 User Manual 8 selects the counter 0x000b selects timebase F1 or 1 MHz 7L selects a high time of 7 usec 3L selects a low time of 3 usec a total of 10 usec cycle gives a 100 kHz wave 7 clocks high out of 10 clocks gives a 70 duty cycle Rf square_wave tio_ba 8 0x000b 7L 3L 4 12 National Instruments Corporation Chapter 4 Programming Interrupt Programming Example for the MC6821 The PC TIO 10 is configured so that EXTIRQI on the I O connector is connected to CA1 on the MC6821 EXTIRQ2 on the I O connector is connected to CB1 on the MC6821 and CA2 and CB2 of the MC6821 are disabled The signal names CA1 CA2 CB1 and CB2 refer to the names of pins located on the MC6821 The names are given to clarify how the interrupt circuitry is connected on the MC6821 For more information on these signals see
15. 13A Data Sheet Appendix C PC TIO 10 User Manual C 38 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 39 PC TIO 10 User Manual Appendix D Motorola MC6821 Data Sheet This appendix contains the manufacturer data sheet for the Motorola MC6821 integrated circuit Motorola Inc This circuit is used on the PC TIO 10 board Copyright Motorola Inc 1988 Reprinted with permission of copyright owner All rights reserved Motorola Inc Q3 1988 Data Book Microprocessor Microcontroller and Peripheral Data Volume II National Instruments Corporation D 1 PC TIO 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 2 National Instruments Corporation Appendix D Motorola MC6821 Data Sheet National Instruments Corporation D 3 PC TIO 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 4 National Instruments Corporation Appendix D Motorola MC6821 Data Sheet National Instruments Corporation D 5 PC TIO 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 6 National Instruments Corporation Appendix D Motorola MC6821 Data Sheet National Instruments Corporation D 7 PC TIO 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 8 National Instruments Corporation Appendix D Motorola MC6821 Data Sheet National Instruments Corporation D 9 PC TI
16. 36F 370 377 378 37F 380 387 388 38F 390 397 398 39F 3A0 3A7 3A8 3AF 3B0 3B7 3B8 3BF 3C0 3C7 3C8 3CF 3D0 3D7 3D8 3DF 3E0 3E7 3E8 3EF 3F0 3F7 3F8 3FF 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 See ee ee ee ee ee Se ee ee ii ee eee pk pd p pd pk et it nd le pd bi nn li OO OO OOo PEPE RHEE HOO OOOO OOP RE HR HEHE mO O OD OORHR HH OOO ORE HEH OOO OHH BPREOOHRHOOHHOOHH OOHHOOHHOOHY POR OH OR OH OH OH OH OH OH OH OHOHO Note Base I O address values 000 through OFF hex are reserved for system use Base I O address values 100 through 3FF hex are available on the I O channel PC TIO 10 User Manual E 4 National Instruments Corporation Click here to comment on this document via the National Instruments at http www natinst com documentation daq Appendix F Customer Communication For your convenience this appendix contains forms to help you gather the information necessary to help us solve technical problems you might have as well as a form you can use to comment on the product documentation Filling out a copy of the Technical Support Form before contacting National Instruments helps us help you better and faster National Instruments provides comprehensive technical assistance around the world In the U S and Canada applications engineers are available Monday through Friday from 8 00 a m to 6 00 p m central time In other countries cont
17. Address Space continued Switch Setting Base I O Address Base I O Address A9 A8 A7 A6 A5 A4 A3 Space Used hex 208 20F 210 217 218 21F 220 227 228 22F 230 237 238 23F 240 247 248 24F 250 257 258 25F 260 267 268 26F 270 277 278 27F 280 287 288 28F 290 297 298 29F 2A0 2A7 2A8 2AF 2B0 2B7 2B8 2BF 2C0 2C7 2C8 2CF 2D0 2D7 2D8 2DF 2E0 2E7 2E8 2EF 2F0 2F7 2F8 2FF 300 307 308 30F 310 317 318 31F 320 327 328 32F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 nmbhnOO0OCC000000O0C000000000000000000 SOOOOCOrbnmmnhnnhhhnnmhmO 0O00000000coooce SOO0OCOCOrbnmmmbmOOOCOOOOmmmbmmmmOOCOoooco BR ODOORP RR HEH OOOCORPRP RH ODO ORR HR ODO ORR HEH OCOCO SOPKROORRPOOHRROOHRHOORPR OOH HTH OCORHOCOORHOORHOS BPORORP OR OR OP OR OR OR OR OR OR OH OR OH OR OR OHOH Note Base I O address values 000 through OFF hex are reserved for system use Base I O address values 100 through 3FF hex are available on the I O channel continues National Instruments Corporation E 3 PC TIO 10 User Manual Switch Settings Appendix E Table E 1 Switch Settings with Corresponding Base I O Address and Base I O Address Space continued Switch Setting Base I O Address Base I O Address A9 A8 A7 A6 A5 A4 A3 hex Space Used hex 330 337 338 33F 340 347 348 34F 350 357 358 35F 360 367 368
18. Base address 01 hex for Am9513A STC A Base address 03 hex for Am9513A STC B Type Read only Word Size 8 bit register 8 bit port Bit Map 7 6 5 4 3 2 1 0 Bit Name Description 7 6 X Unused bits They may be returned as 0 or 1 5 1 OUT lt 5 1 gt Each of these five bits returns the logic state of the associated counter output pin For example if the bit OUT4 is set then the output pin of Counter 4 or Counter 9 is at a logic high state 0 BYTE POINTER This bit represents the state of the Am9513A Byte Pointer Flip Flop If this bit is set the next byte to be written to or read from the Data Port is the least significant byte if this bit is clear the next byte to be written to or read from the Data Port is the most significant byte PC TIO 10 User Manual 4 6 National Instruments Corporation Chapter 4 Programming Register Descriptions for the MC6821 The MC6821 PIA has four registers Port A and Port B both have a Data Register and a Control Register The bit maps and signal definitions for each of these registers are as follows For more information on the various registers refer to Appendix D Motorola MC6821 Data Sheet National Instruments Corporation 4 7 PC TIO 10 User Manual Programming Chapter 4 MC6821 Data Registers The MC6821 Data Registers are used to read from or write to the Output Registers the I O registers for Ports A and B and the Data Direction Registers Address Base address 04
19. Click here to comment on this document via the National Instruments at http www natinst com documentation daq PC TIO 10 User Manual Timing I O Board for the PC July 1993 Edition Part Number 320292 01 Copyright 1990 1994 National Instruments Corporation All Rights Reserved National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin TX 78730 5039 512 794 0100 Technical support fax 800 328 2203 512 794 5678 Branch Offices Australia 03 879 9422 Austria 0662 435986 Belgium 02 757 00 20 Canada Ontario 519 622 9310 Canada Qu bec 514 694 8521 Denmark 45 76 26 00 Finland 90 527 2321 France 1 48 14 24 24 Germany 089 741 31 30 Italy 02 48301892 Japan 03 3788 1921 Mexico 95 800 010 0793 Netherlands 03480 33466 Norway 32 84 84 00 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 20 51 51 Taiwan 02 377 1200 U K 0635 523545 Limited Warranty The PC TIO 10 is warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a p
20. DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation Trademarks LabVIEW LabWindows and N
21. I DAQ are trademarks of National Instruments Corporation Product and company names listed are trademarks or trade names of their respective companies WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS National Instruments products are not designed with components and testing intended to ensure a level of reliability suitable for use in treatment and diagnosis of humans Applications of National Instruments products involving medical or clinical treatment can create a potential for accidental injury caused by product failure or by errors on the part of the user or application designer Any use or application of National Instruments products for or involving medical or clinical treatment must be performed by properly trained and qualified medical personnel and all traditional medical safeguards equipment and procedures that are appropriate in the particular situation to prevent serious injury or death should always continue to be used when National Instruments products are being used National Instruments products are NOT intended to be a substitute for any form of established process procedure or equipment used to monitor or safeguard human health and safety in medical or clinical treatment Preface Introduction to the PC TIO 10 This manual describes the mechanical and electrical aspects of the PC TIO 10 and contains information concerning its operation and programming The PC TIO 10 is a timing and digital I O i
22. Line 11 2CO hex AT MIO 16 Channels 6 7 Line 10 220 hex AT MIO 16D Channels 6 7 Lines 5 10 220 hex AT MIO 16F 5 Channels 6 7 Line 10 220 hex AT MIO 16X None None 220 hex AT MIO 64F 5 None None 220 hex GPIB PCII Channel 1 Line 7 2B8 hex GPIB PCIIA Channel 1 Line 7 02E1 hex GPIB PCIII Channel 1 Line 7 280 hex Lab PC Channel 3 Line 5 260 hex PC DIO 24 None Line 5 210 hex PC DIO 96 None Line 5 180 hex PC LPM 16 None Line 5 260 hex PC TIO 10 None Line 5 1A0 hex These settings are software configurable and are disabled at startup time Interrupt Level Selection There are two sets of jumpers for interrupt selection on the PC TIO 10 board W1 is used for selecting the interrupt level while W2 is used for local selection of two of the counter outputs as interrupt sources The locations of these jumpers are shown in Figure 2 1 The PC TIO 10 board can connect to any one of six interrupt lines of the PC I O Channel IRQ3 IRQ4 IRQS IRQ6 IRQ7 or IRQ9 You select the interrupt line by setting a jumper on W1 The default interrupt line is IRQ5 To change to another line remove the jumper from IRQS and place it on the pins for another request line Figure 2 3 shows the default factory setting for IRQ5 Figure 2 3 Interrupt Jumper Setting for IRQ5 Factory Setting PC TIO 10 User Manual 2 4 National Instruments Corporation Chapter 2 Configuration and Installation To disable the PC TIO 10 interrupt request line change the ju
23. O 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 10 National Instruments Corporation Appendix D Motorola MC6821 Data Sheet National Instruments Corporation D 11 PC TIO 10 User Manual Motorola MC6821 Data Sheet Appendix D PC TIO 10 User Manual D 12 National Instruments Corporation Appendix E Switch Settings Table E 1 lists the possible switch settings the corresponding base I O address and the base I O address space used for that setting Table E 1 Switch Settings with Corresponding Base I O Address and Base I O Address Space Switch Setting Base I O Address Base I O Address A9 A8 A7 A6 A5 A4 A3 hex Space Used hex 000 007 008 OOF 010 017 018 OIF 020 027 028 02F 030 037 038 03F 040 047 048 04F 050 057 058 OSF 060 067 068 06F 070 077 078 O7F 080 087 088 O8F 090 097 098 OOF OAO 0A7 OA8 OAF OBO 0B7 OB8 OBF OC0 0C7 0C8 OCF ODO 0D7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cococooocoecooocoocooeooocoeoeocooococo mR Re RRR Re OOo RRR OOOO C OC OR RP RRR Rr RF OOCCOCOCOCOCOF m SOOCOR FRPP RF OOCOOCOORFR RRP OOO OrRFR OCOC RPOOrRrFOCOOrFFrFOCOrFFOCOORFRF OCOOFrRFOCOFrRF OO DHO OnO AHORA OAR Ohn O rne DA OD an O O Note Base I O address values 000 through OFF hex are reserved for system use Base I O address values 100 through 3FF hex are available on the I O channel
24. V 0 4 V Darlington drive current Port B at VEXT 1 5 V 1 0 mA 10 0 mA Figure 2 10 depicts signal connections for three typical digital I O applications I O Connector PC TIO 10 Board Figure 2 10 Digital I O Connections In Figure 2 10 Port A is configured for digital output and Port B is configured for digital input Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch in Figure 2 10 Digital output applications include sending TTL signals and driving external devices such as the LED shown in Figure 2 10 PC TIO 10 User Manual 2 14 National Instruments Corporation Chapter 2 Configuration and Installation Power Connections Pin 34 of the I O connector is connected to the 5 V supply from the PC power supply This pin is referenced to GND and can be used to power external digital circuitry For more information on this output pin see Output Signal Specifications in Appendix A Specifications Power Rating 1 0 A at 5 V 10 Warning Under no circumstances should this 5 V power pin be connected directly to ground or to any other voltage source on the PC TIO 10 or any other device Doing so may damage the PC TIO 10 and the PC National Instruments is not liable for damage resulting from such a connection Cabling The PC TIO 10 digital I O connector is a standard 50 pin header connector which can be interfaced using 50 pin ribbon cable with appr
25. act the nearest branch office You may fax questions to us at any time Corporate Headquarters 512 795 8248 Technical support fax 800 328 2203 512 794 5678 Branch Offices Phone Number Australia 03 879 9422 Austria 0662 435986 Belgium 02 757 00 20 Denmark 45 76 26 00 Finland 90 527 2321 France 1 48 14 24 00 Germany 089 741 31 30 Italy 02 48301892 Japan 03 3788 1921 Mexico 95 800 010 0793 Netherlands 03480 33466 Norway 32 848400 Singapore 2265886 Spain 91 640 0085 Sweden 08 730 49 70 Switzerland 056 20 51 51 Taiwan 02 377 1200 U K 0635 523545 National Instruments Corporation F 1 Fax Number 03 879 9179 0662 437010 19 02 757 03 11 45 7671 11 90 502 2930 1 48 14 24 14 089 714 60 35 02 48301915 03 3788 1923 95 800 010 0793 03480 30673 32 848600 2265887 91 640 0533 08 730 43 70 056 20 51 55 02 737 4644 0635 523154 PC TIO 10 User Manual Click here to comment on this document via the National Instruments at http www natinst com documentation daq Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware and use the completed copy of this form as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently If you are using any National Instruments hardware or software
26. an EISA class computer you need to update the computer s resource allocation or configuration table by reconfiguring your computer See your computer s user manual for information about updating the configuration table The PC TIO 10 board is now installed and ready for operation Signal Connections This section includes specifications and connection instructions for the signals given on the PC TIO 10 I O connector Warning Connections that exceed any of the maximum ratings of input or output signals on the PC TIO 10 may result in damage to the PC TIO 10 board and to the PC Maximum input ratings for each signal are given in this chapter under the discussion of that signal National Instruments is not liable for any damages resulting from any such signal connections I O Connector Pin Description Figure 2 6 show the pin assignments for the PC TIO 10 I O connector PC TIO 10 User Manual 2 6 National Instruments Corporation Chapter 2 SOURCE3 OUT3 GATE4 GATES SOURCE6 OUT6 GATE7 SOURCES OUT8 GATE9 GATE10 FOUTI EXTIRQI RI R ER TR TR TG Oo fus fu lu lwfiwininiolie let Alle 0 IIo JH 1S QI HI OD B all lol allo DIR IR IA RID G2 100 JOD JO JOIN ID IN IN NR afro SYIOIDIR IN IO O DIRINIOLOID IBRIN OlOID KRINW JO GATE1 SOURCE2 OUT2 GATE3 SOURCE4 OUT4 OUTS GATE6 SOURCE7 OUT7 GATE8 SOURCE9 OUT9 OUT10 FOUT2 EXTIRQ2 5 V Al A3 AS A7 Bl B3 B5 B7 Configuration and Insta
27. ation Chapter 2 Configuration and Installation timebase clocks can be used as counting sources and these clocks have a maximum skew of 75 nsec between them The SOURCE signal shown in Figure 2 9 represents any of the signals applied at the SOURCE inputs GATE inputs or internal timebase clocks See the Am9513A data sheet in Appendix C for further details Specifications for signals at the GATE input are referenced to the signal at the SOURCE input or one of the Am9513A internally generated signals Figure 2 9 shows the GATE signal referenced to the rising edge of a source signal The gate must be valid either high or low at least 100 nsec before the rising or falling edge of a source signal for the gate to take effect at that source edge as shown by tgsy and tgh in Figure 2 9 Similarly the gate signal must be held for at least 10 nsec after the rising or falling edge of a source signal for the gate to take effect at that source edge The gate high or low period must be at least 145 nsec in duration If an internal timebase clock is used the gate signal cannot be synchronized with the clock In this case gates applied close to a source edge take effect either on that source edge or on the next one This arrangement creates an uncertainty of one source clock period with respect to unsynchronized gating sources Signals generated at the OUT pin are referenced to the signal at the SOURCE input or to one of the Am9513A internally generated clock
28. base address counter timebase high time low_time unsigned int base_address counter timebase unsigned long high_time low_time unsigned int cmd data mode check ranges if counter lt 1 counter gt 10 timebase gt 15 high_time lt 1L high_ time gt 65536L low time lt 1L low time gt 65536L return range err set up the register addresses 7 National Instruments Corporation 4 11 PC TIO 10 User Manual Programming void the Chapter 4 cmd base_address counter gt 5 stc_b stc_a cmd_port data base_address counter gt 5 stc_b stc_a data_port adjust some parameters and program the counter if counter gt 5 5 ctrs per chip counter 5 mode 0x0062 timebase lt lt 8 counter mode if high_time 65536L count of 65 536 high_time OL goes to 0 7 if low_time 65536L count of 65 536 low_time OL goes to 0 ay outp cmd 0xc0O 0x01 lt lt counter 1 disarm the ctr outp cmd counter select Mode Reg outp data mode send mode low byte outp data mode gt gt 8 send mode high byte outp cmd counter 0x08 select Load Reg outp data unsigned int high_time send load low byte outp data unsigned int high time gt gt 8 send load high byte outp cmd counter 0x1
29. cable 0 5 m 180524 05 Standard ribbon cable 1 0 m 180524 10 Shielded ribbon cable 0 5 m 180554 05 Shielded ribbon cable 1 0 m 180554 10 Refer to the Cabling section in Chapter 2 for additional information on cabling and connectors National Instruments Corporation 1 3 PC TIO 10 User Manual Introduction Chapter 1 Unpacking Your PC TIO 10 board is shipped in an antistatic package to prevent electrostatic damage to the board Several components on the board can be damaged by electrostatic discharge To avoid such damage in handling the board take the following precautions e Touch the antistatic package to a metal part of your computer chassis before removing the board from the package e Remove the board from the package and inspect the board for loose components or any other sign of damage Notify National Instruments if the board appears damaged in any way Do not install a damaged board into your computer PC TIO 10 User Manual 1 4 National Instruments Corporation Chapter 2 Configuration and Installation This chapter describes the PC TIO 10 jumper configurations installation of the PC TIO 10 board in your computer signal connections to the PC TIO 10 board and cabling instructions Board Configuration The PC TIO 10 contains one DIP switch and two jumpers to configure the base I O address and interrupts respectively The DIP switch and jumpers are shown in the parts locator diagram in Figure 2 1
30. crosoft C with SDK and Borland C for Windows NI DAQ software is on high density 5 25 in and 3 5 in diskettes PC TIO 10 User Manual 1 2 National Instruments Corporation Chapter 1 Introduction Optional Software This manual contains complete instructions for directly programming the PC TIO 10 Normally however you should not need to read the low level programming details in the user manual because the NI DAQ software package for controlling the PC TIO 10 is included with the board Using NI DAQ is quicker and easier than and as flexible as using the low level programming described in Chapter 4 Programming You can use the PC TIO 10 with LabVIEW for Windows or LabWindows for DOS LabVIEW and LabWindows are innovative program development software packages for data acquisition and control applications LabVIEW uses graphical programming whereas LabWindows enhances Microsoft C and QuickBASIC Both packages include extensive libraries for data acquisition instrument control data analysis and graphical data presentation Part numbers for these software packages are listed in the following table LabVIEW for Windows 776670 01 LabWindows Standard package 776473 01 Advanced Analysis Library 776474 01 Standard package with the Advanced Analysis Library 776475 01 Optional Equipment Equipment Part Number CB 50 I O connector block 0 5 m cable 776164 01 CB 50 I O connector block 1 0 m cable 776164 02 Standard ribbon
31. cts 2 4 factory setting 2 1 switch settings 2 2 to 2 3 switch settings with corresponding base I O address and base I O address space E 1 to E 4 board configuration See configuration BYTE POINTER bit 4 6 C C lt 7 0 gt bit 4 5 cabling 2 16 CB 50 cable 2 16 configuration base I O address factory settings 2 1 switch settings for 2 2 to 2 3 default settings for National Instrument products 2 4 interrupt level selection 2 4 to 2 5 local interrupt selection 2 5 parts locator diagram 2 2 switch and jumper factory settings 2 1 customer communication vii D D lt 7 0 gt bit 4 4 4 8 D lt 15 8 gt bit 4 4 data transceivers 3 2 digital I O signal connections 2 13 to 2 14 illustration of 2 14 specifications and ratings 2 13 to 2 14 timing and digital I O connector 3 3 PC TIO 10 User Manual Index 2 National Instruments Corporation Index DMA channel default settings 2 4 documentation abbreviations used in the manual vi to vii acronyms used in the manual vii conventions used in the manual vi related documentation vii DRS bit 4 9 E EDGE bit 4 9 equipment optional 1 3 event counting application 2 10 EXTIRQI through EXTIRQ signals 2 8 F FOUTI through FOUT2 signals 2 8 2 9 2 11 to 2 12 frequency measurement 2 10 to 2 11 G GATE through GATE10 signals 2 8 2 10 to 2 13 GND signal 2 8 I I O connector pin description 2 7 B 1 I O signal ratings See specification
32. d and the corresponding register on the PC TIO 10 is accessed In addition the I O channel control circuitry monitors and transmits the PC I O channel control and support signals The control signals identify transfers as read or write memory or I O and 8 bit 16 bit or 32 bit transfers The PC TIO 10 uses only 8 bit transfers Am9513A System Timing Controller The Am9513A STCs are the heart of the PC TIO 10 These chips have five individually controlled 16 bit counters each of which can be configured to operate in a number of different modes Therefore the PC TIO 10 can be used for applications such as rate generation FSK and pulse parameter measurement Each of the counters has its own source SOURCE gate GATE and output OUT connections Each STC has an independently controlled frequency scaler output The STCs are clocked by an onboard 1 MHz crystal oscillator to give 1 usec timing resolution In addition SOURCES and SOURCE10 are clocked at 5 MHz to give 200 nsec resolution on all timing channels Refer to Chapter 4 Programming or to Appendix C AMD Am9513A Data Sheet for more detailed information MC6821 Peripheral Interface Adapter The MC6821 PIA features sixteen bits of bit configurable digital I O In addition this device has two edge programmable interrupt inputs with which the PC TIO 10 can receive external interrupts Refer to Chapter 4 Programming or to Appendix D Motorola MC6821 Data Sheet for more detailed i
33. e bit s current state National Instruments Corporation 4 9 PC TIO 10 User Manual Programming Chapter 4 Programming Considerations for the Am9513A STCs Before using the Am9513A STC devices you must initialize them To do this perform the following steps on each of the Am9513A STC devices All writes are 8 bit write operations All values are given in hexadecimal 1 Issue a master reset by writing FF to the Am9513A Command Register 2 Initialize all five counters For ctr 1 to 5 follow these steps e Write ctr to the Am9513A Command Register select the Counter Mode Register e Write 00 to the Am9513A Data Register store the least significant byte of the counter mode value e Write 00 to the Am9513A Data Register store the most significant byte of the counter mode value e Write ctr 8 to the Am9513A Command Register select the Counter Load Register e Write 03 to the Am9513A Data Register store the least significant byte of the counter load value e Write 00 to the Am9513A Data Register store the most significant byte of the counter load value 3 Load all counters with their Counter Load Register values by writing 5F to the Am9513A Command Register Note When you initialize Am9513A STC B which contains Counters 6 through 10 ctr must range from 1 to 5 not from 6 to 10 Also each Am9513A STC must always be configured to use the 8 bit bus mode in order to function properly Programming Example for the
34. e and Model e Computer Bus XT AT ISA or EISA e Microprocessor e Clock Frequency Bus and Microprocessor e Type of Video Board Installed e DOS Version e Programming Language e Programming Language Version e Other Boards in System e Base I O Address of Other Boards e Interrupt Level of Other Boards Click here to comment on this document via the National Instruments at http www natinst com documentation daq Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products This information helps us provide quality products to meet your needs Title PC TIO 10 User Manual Edition Date July 1993 Part Number 320292 01 Please comment on the completeness clarity and organization of the manual If you find errors in the manual please record the page numbers and describe the errors Thank you for your help Name Title Company Address Phone Mail to Technical Publications Fax to Technical Publications National Instruments Corporation National Instruments Corporation 6504 Bridge Point Parkway MS 53 02 MS 53 02 Austin TX 78730 5039 512 794 5678 Index Numbers Symbols 5 V signal 2 8 2 15 A AO through A7 signals 2 8 Am9513A System Timing Controller alarm registers and comparators C 11 block diagram C 2 characteristics C
35. e functions install_isr and remove_isr is presented as follows Be sure to pass a 32 bit structure pointer to the install_isr function because the main program s data will probably be stored in a different memory segment than the one where the interrupt functions are located In addition if you call the installation function from a language besides C make sure the parameters are passed in the proper order C pushes parameters on the stack from right to left but most other languages most notably Pascal push parameters from left to right Finally be sure to make the calls to the functions using 32 bit addresses because all of the code assumes data is offset with respect to a 32 bit return address The code can be modified to use 16 bit addresses by changing far to near and decrementing all references to the base page register bp by two in install_isr and remove_isr only Do not modify isr_handler PC TIO 10 User Manual 4 14 National Instruments Corporation Chapter 4 Programming Also isr_handler should check service and clear both Port A and Port B interrupts before issuing the end of interrupt command If interrupts are still active when the end of interrupt command is issued program operation usually becomes unstable and is likely to lock up the computer assemble this file with the following command masm MX filename MX preserves case sensitivity function prototypes gt void install_isr int leve
36. e known gate period Figure 2 8 shows the connections for a frequency measurement application A second counter can also be used to generate the gate signal in this application PC TIO 10 User Manual 2 10 National Instruments Corporation Chapter 2 Configuration and Installation Counter I O Connector PC TIO 10 Board Figure 2 8 Frequency Measurement Application Two or more counters can be concatenated by connecting the OUT signal from one counter to the SOURCE signal of another counter The counters can then be treated as one 32 bit or larger counter for most counting applications It is possible to create up to a 160 bit counter in this manner The GATE SOURCE OUT and FOUT signals on the I O connector are connected directly to the Am9513A input and output pins The input and output ratings and timing specifications for the Am9513A signals are given as follows The following specifications and ratings apply to the Am9513A I O signals Absolute maximum voltage rating 0 5 to 7 0 V with respect to GND Am9513A Digital Input Specifications referenced to GND Minimum Maximum Input logic high voltage 2 0 V 5 25 V Input logic low voltage 0 0 V 0 8 V Input current 0 lt Vin lt 5 25 V 10 uA 10 uA National Instruments Corporation 2 11 PC TIO 10 User Manual Configuration and Installation Chapter 2 Am9513A Digital Output Specifications referenced to GND Minimum Maximum Output logic high voltage all out
37. ects the current status of the interrupt input for the selected Control Register If this bit is one in the Port A Control Register an interrupt request is pending on the external interrupt line EXTIRQ1 If this bit is one in the Port B Control Register an interrupt request is pending on the external interrupt line EXTIRQ2 Always write a zero to this bit 6 3 Reserved These bits are not used on the PC TIO 10 Always write a zero to each of these bits 2 DRS This is the Data Register Select bit Writing a one to this bit selects the Output Register while writing a zero to this bit selects the Data Direction Register Reading this bit shows the bit s current state Refer to the description of the Data Register for more information 1 EDGE This is the control bit for selecting the edge that will cause an interrupt Writing a one to this bit selects rising edge interrupts while writing a zero to this bit selects falling edge interrupts The Port A Control Register controls external interrupt line EXTIRQI while the Port B Control Register controls external interrupt line EXTIRQ2 Reading this bit shows the bit s current state 0 INTEN This bit enables and disables the interrupt generation capability of EXTIRQI or EXTIRQ2 Writing a one to this bit enables interrupts while writing a zero to this bit disables interrupts The Port A Control Register controls EXTIRQ1 while the Port B Control Register controls EXTIRQ2 Reading this bit shows th
38. ee Chapter 4 Programming National Instruments Corporation 2 5 PC TIO 10 User Manual Configuration and Installation Chapter 2 Installation The PC TIO 10 can be installed in any unused 8 bit 16 bit or 32 bit expansion slot in your computer After you make any necessary changes and verify the switch and jumper settings record them in the PC TIO 10 Hardware and Software Configuration Form in Appendix F Customer Communication You are now ready to install the PC TIO 10 The following are general installation instructions but consult the user manual or technical reference manual of your personal computer for specific instructions and warnings If you want to install this board in an EISA class computer you can obtain a configuration file for the board by contacting National Instruments 1 Turn off your computer 2 Remove the top cover or access port to the I O channel 3 Remove the expansion slot cover on the back panel of the computer 4 Insert the PC TIO 10 in an unused 8 bit 16 bit or 32 bit slot It may be a tight fit but do not force the board into place 5 Screw the mounting bracket of the PC TIO 10 to the back panel rail of the computer 6 Check the installation 7 Replace the cover to the computer Note If you have an ISA class computer and you are using a configurable software package such as NI DAQ you may need to reconfigure your software to reflect any changes in jumper or switch settings If you have
39. eriod of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this manual is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER
40. for data transfer or alcl OR in old mask value out maskm al send out new setting jmp 2 delay wait for data transfer in al masks get current slave mask jmp 2 delay wait for data transfer or al ch OR in old mask value out masks al send out new setting jmp 2 delay wait for data transfer mov al vect_ num al holds interrupt level mov ah 25h Ids dx int_addr ds dx points to new handler int 21h install the old vector restore saved registers ri_exit pop es pop ds pop dx pop cx pop bx pop ax sti ret _remove_isr endp isr_handler 0 _isr_handler proc far cli push ax push ds service interrupt PC TIO 10 User Manual 4 18 National Instruments Corporation Chapter 4 your code here if this was not your interrupt jump to ih_0 if this was your interrupt service it as appropriate the pointer for the data structure isr_block is stored at DATA isrb_addr to access the structure use the following steps mov ax seg_ DATA mov ds ax lds si isrb_addr you need not use ds si but be sure to save any registers you use acknowledge the interrupt ih_0 mov ax seg DATA mov ds ax mov al eoi signify end of interrupt cmp slave_ack 0 see if we need to acknowledge slave je short ih_1 jump if not out acks al send slave acknowledge jmp 2 delay wait for data transfer ih_1 out ackm al send master acknowledge restore saved
41. gure 1 1 PC TIO 10 Interface Board si icissssascateisisdeadssasiaasschcdets nanas 1 1 Figure 2 1 PC TIO 10 Parts Locator Diagram ss 2 2 Figure 2 2 Example Base I O Address Switch Settings 00 0 cee eecesseceeceeeeeeeeeeneeeaeenes 2 3 Figure 2 3 Interrupt Jumper Setting for IRQS Factory Setting cee eeeeeeeeeeeeeteeeeneees 2 4 Figure 2 4 Interrupt Jumper Setting for Disabling Interrupts eee ceeeeeeeeeneeeneeeees 2 5 Figure 2 5 Local Interrupt Jumper Setting Factory Setting 0 00 eee eeseeseeeeeeeeeeenneeees 2 5 Figure 2 6 PC TIO 10 I O Connector Pin Assignment 0 ccceeeeceeseceeceeeeeceeeeeesteeeenaees 2 7 Figure 2 7 Event Counting Application with External Switch Gating 2 10 Figure 2 8 Frequency Measurement Application ss 2 11 Figure 2 9 Timing Signal Relationships ss 2 12 Pigute 2 10 Digital VO Connections SERA TER ne ne A a te 2 14 Figure 3 1 PC TIO 10 Block Diagramme ent BA ee Nes 3 1 Figure B 1 PC TIO 10 I O Connector 0 ar Mn At Moses ten ae B 1 PC TIO 10 User Manual x National Instruments Corporation Table 2 1 Table 2 2 Table 4 1 Table E 1 Contents Tables PC TIO 10 Factory Set Switch and Jumper Settings 00 eee eeesceeesseeeenteeeenes 2 1 Default Settings of National Instruments Products for the PC e eee 2 4 PCA TIOA10 Aderess Map ss ns en needs 4 2 Switch Settings with Corresponding Base I O Address and Base I O Address Space
42. hapter 2 Figure 2 7 shows connections for a typical event counting operation where a switch is used to gate the counter on and off Counter I O Connector PC TIO 10 Board Figure 2 7 Event Counting Application with External Switch Gating To perform pulse width measurement a counter is programmed to be level gated The pulse to be measured is applied to the counter GATE input The counter is programmed to count while the signal at the GATE input is either high or low If the counter is programmed to count an internal timebase then the pulse width is equal to the counter value multiplied by the timebase period For time lapse measurement a counter is programmed to be edge gated An edge is applied to the counter GATE input to start the counter The counter can be programmed to start counting after receiving either a high to low edge or a low to high edge If the counter is programmed to count an internal timebase then the time lapse since receiving the edge is equal to the counter value multiplied by the timebase period To measure frequency a counter is programmed to be level gated and the rising or falling edges are counted in a signal applied to a SOURCE input The gate signal applied to the counter GATE input is of some known duration In this case the counter is programmed to count either rising or falling edges at the SOURCE input while the gate is applied The frequency of the input signal is then the count value divided by th
43. hex for Port A Base address 06 hex for Port B Type Read and write Word Size 8 bit register 8 bit port Bit Map 7 6 5 4 3 2 1 0 US SU Bit Name Description 7 0 D lt 7 0 gt If the Output Register is being accessed see the description of the Control Registers on the page that follows writing a value to the Data Register updates all output bits and has no effect on input bits Reading the Data Register returns the current signal value of all bits including those configured for output If the Data Direction Register is being accessed writing a zero to a bit makes the corresponding I O line an input while writing a one to a bit makes the corresponding I O line an output Reading the Data Direction Register returns the current configuration PC TIO 10 User Manual 4 8 National Instruments Corporation Chapter 4 Programming MC6821 Control Registers The MC6821 Control Registers control the overall operation of the MC6821 and the selection of the two internal registers that are accessed through each of the MC6821 Data Registers Some of the bits in the Control Registers are not used because of the design of the PC TIO 10 These bits should be set as follows Address Base address 05 hex for Port A Base address 07 hex for Port B Type Read and write Word Size 8 bit register 8 bit port Bit Map 7 6 5 4 3 2 1 0 Ro 5 0 0 0 RS EDGE INTEN Bit Name Description 7 IRQ This is a read only bit that refl
44. ioie a le Ne S 4 6 Register Descriptions for the MC6821 ssssesseesssseesseesssessessseressseesseessersseessees 4 7 MC6821 Data RegistetSsssiicmnsssrneiiniiiii eiii iiini 4 8 MC682 1 Control Registers saririsa nie a ets 4 9 Programming Considerations for the AM9513A STCS ssesssesesesessereresrersersrrrrersersreeres 4 10 National Instruments Corporation ix PC TIO 10 User Manual Contents Programming Example for the Am9513A STCS oo eeeeeeeeeeseeceseceseeeseeeeseessaeeneensees 4 10 Interrupt Programming Example for the MC6821 0 eee eeeeeeeceseeeeeeeeseecnaeenseeneees 4 13 Appendix A Specifications Lund cot ne oes tiered allel ec esta Con a E Cotas A 1 V O Connector Electrical Specifications xsca cintaesadansitawsielagetie tases Sadie A 1 1O Stenal Ran Seina a E E asco A 1 Input Signal Specificati ns ER Le E R E R ca need ea A 1 OQu tpu t Signal SpecificatonS oies ie aei TS et A 1 Operating Environment seiersen ii eenn E n EiS o Ee EEEE E OKEE A 2 Storag ENVITONM NE eusir a nn a a oan aa e ane aa ereiaro A 2 Physical Specifications sssrinin nn a ai a e ai a a an A 2 Power Requirement from PC I O Channel ss A 2 Appendix B VO CONC CUO sass GRAN RR RONG GN ROE en ne B 1 Appendix C AMD Am9513A Data Sheet C 1 Appendix D Motorola MC6821 Data Sheet D 1 Appendix E Switch S LLIRES te nm nn ne nette en a tetes d ie reste E 1 Appendix F Customer Communication F 1 MNGQOX Si A nt dd ane eke cae Index 1 Figures Fi
45. l isr_block_type far isr_block on input level indicates the interrupt level that is to be modified on input isr_block points to the data structure that will be used by the isr_handler function void isr_handler void a the isr_handler function will never be called from C void remove_isr void public _install_isr _isr_handler _remove_isr _DATA segment word public DATA declarations ackm equ 00020h acks equ 000a0h eoi equ 00020h maskm equ 00021h masks equ O00alh int_addr dd O0 int _ mask dw O0 isrb_addr dd 0 slave_ack db 0 vect num db 0 _DATA ends _TEXT segment word public CODE assume cs _TEXT ss _TEXT ds DATA install_isr bp reg at bp 0 ret addr ofs at bp 2 ret addr seg at bp 4 level at bp 6 isr_block ofs at bp 8 isr_block seg at bp 10 National Instruments Corporation 4 15 PC TIO 10 User Manual Programming _install_isr cli push mov push push push push push push mov mov proc far bp bp sp ax bx cx dx ds es ax seg DATA ds ax save the pointer for the isr_block structure used in isr_handler mov mov mov mov ax bp 8 get ofs into ax word ptr isrb_addr 0 ax save address in variable ax bp 10 get seg into ax word ptr isrb_addr 2 ax save address in variable set interrupt vector save the current vector before writing out new one mov cmp ja add jmp slave add mov setvec push
46. l Instruments Corporation Index 5 PC TIO 10 User Manual Index overview 4 1 register map 4 2 S signal connections damage caused by exceeding maximum ratings 2 6 description of 2 8 digital I O signal connections 2 13 to 2 14 T O connector pin description 2 6 B 1 power connections 2 15 timing signal connections 2 9 to 2 13 software optional 1 2 to 1 3 SOURCE signals 2 10 to 2 13 SOURCE through SOURCE4 signals 2 8 SOURCES through SOURCE signals 2 8 specifications and ratings Am9513A System Timing Controller C 33 to C 38 Am9513A digital input 2 11 Am9513A digital output 2 12 Am9513A I O signals 2 11 digital I O lines 2 13 digital input 2 13 digital output 2 14 I O connector electrical specifications A 1 to A 2 I O signal ratings A 1 input signal specifications A 1 MC6821 Peripheral Interface Adapter D 3 to D 7 operating environment A 2 output signal specifications A 1 to A 2 physical specifications A 2 power connections 2 15 power requirement A 2 storage environment A 2 storage environment specifications A 2 support technical vii switches See jumpers and switches T technical support vii theory of operation Am9513A system timing controller 3 2 block diagram 3 1 data transceivers 3 2 interrupt control circuitry 3 2 MC6821 Peripheral Interface Adapter 3 2 PC TIO 10 User Manual Index 6 National Instruments Corporation Index PC I O channel control circuitry 3 2 timing and
47. llation Figure 2 6 PC TIO 10 I O Connector Pin Assignments National Instruments Corporation 2 7 PC TIO 10 User Manual Configuration and Installation Signal Connection Descriptions Pins Signal Names 1 4 7 SOURCE lt 1 4 gt 10 15 18 SOURCE lt 6 9 gt 21 24 they 2 5 8 11 GATE lt 1 10 gt 13 16 19 22525527 3 6 9 12 OUT lt 1 10 gt 14 17 20 23 26 28 29 30 FOUT lt 1 2 gt 31 32 EXTIRQ lt 1 2 gt 33 GND 34 5 V 35 42 A lt 0 7 gt A 43 50 B lt 0 7 gt B PC TIO 10 User Manual 2 8 Chapter 2 Description These are the source inputs for Counters 1 through 4 and Counters 6 through 9 The source inputs for Counters 5 and 10 do not appear on the I O connector because are internally connected to a 5 MHz clock These are the gate inputs for Counters 1 through 10 These are the outputs for Counters 1 through 10 These are the frequency outputs of the two Am9513A devices These are the interrupt inputs for the PC TIO 10 This pin is connected to the computer s ground signal This pin is connected to the computer s 5 VDC power supply These are the eight digital I O lines on Port of the MC6821 The MSB is A7 These are the eight digital I O lines on Port of the MC6821 The MSB is B7 National Instruments Corporation Chapter 2 Configuration and Installation Timing Signal Connections Pins 1 through 30 of the I O connector are connections for timing I O sig
48. map to Counters 1 2 3 4 and 5 of STC A respectively Counters 6 7 8 9 and 10 map to Counters 1 2 3 4 and 5 of STC B respectively National Instruments Corporation 4 3 PC TIO 10 User Manual Programming Chapter 4 Am9513A Data Registers The Am9513A Data Registers are used to read from or write to any of the 18 internal registers of the Am9513A The Am9513A Command Registers must be written to in order to select the register to be accessed by the Am9513A Data Registers The internal registers accessed by the Am9513A Data Registers are as follows e Counter Mode Registers for Counters 1 2 3 4 and 5 e Counter Load Registers for Counters 1 2 3 4 and 5 e Counter Hold Registers for Counters 1 2 3 4 and 5 e Compare Registers for Counters 1 and 2 e Master Mode Register All these registers are 16 bit registers that must be accessed through an 8 bit port least significant byte first Bit descriptions for each of these registers are included in Appendix C AMD Am9513A Data Sheet Address Base address 00 hex for Am9513A STC A Base address 02 hex for Am9513A STC B Type Read and write Word Size 16 bit register 8 bit port Bit Map 7 6 5 4 3 2 if 0 pis D4 p3 D2 pu po 7 6 5 4 3 2 1 0 po DT D6 Dse 4 a e D e De e 0 Bit Name Description 7 0 D lt 15 8 gt These eight bits are the most significant byte to be loaded into or read from the Am9513A Internal Register currently
49. mper setting as shown in Figure 2 4 Figure 2 4 Interrupt Jumper Setting for Disabling Interrupts Local Interrupt Selection In addition to the jumpers for selecting the interrupt level used by the PC TIO 10 a set of jumpers W2 is used to locally connect two of the counter outputs to the interrupt generation circuitry There are four positions on this set of jumpers two No Connect positions labelled N C a position for OUT2 and a position for OUT7 The position for OUT2 connects the output of Counter 2 to the EXTIRQI input while the position for OUT7 connects the output of Counter 7 to the EXTIRQ2 input The No Connect positions are intended as storage positions for one or both of the jumpers if you do not want to use one or both of the counter outputs for interrupt purposes The default positions for the jumpers on W2 are shown in Figure 2 5 Figure 2 5 Local Interrupt Jumper Setting Factory Setting OUT2 and OUT7 can be jumpered simultaneously The interrupt for OUT2 is enabled and disabled through access to the Port A interrupt control circuitry of the MC6821 PIA OUT7 is enabled and disabled through access to the Port B interrupt control circuitry of the MC6821 PIA One or both of these interrupts can be asserted at any time if they are enabled If both interrupts are enabled simultaneously your interrupt handler must check both channels for interrupts before returning control to the foreground task For more information s
50. n e i e nant nn Mens E 1 National Instruments Corporation xi PC TIO 10 User Manual Chapter 1 Introduction This chapter describes the PC TIO 10 lists the contents of your PC TIO 10 kit lists the optional software and equipment for use with the PC TIO 10 and explains how to unpack the PC TIO 10 kit The PC TIO 10 is a timing and digital I O interface for the PC Two AMD Am9513A STCs are used for the timing interface With these chips which feature many different timing and counting modes the PC TIO 10 can perform of a wide range of pulse measurement and wave generation functions A Motorola MC6821 PIA is used for the digital I O interface each of the two 8 bit I O ports is bit configurable In addition the PC TIO 10 has two edge sensitive interrupt inputs with programmable edge selection Any external TTL signal including any of the counter outputs can be connected to these interrupt inputs Figure 1 1 shows the PC TIO 10 interface board Figure 1 1 PC TIO 10 Interface Board National Instruments Corporation 1 1 PC TIO 10 User Manual Introduction Chapter 1 The timing circuits on the board make the PC TIO 10 useful for the following operations e Wave and pulse generation e Frequency shift keying FSK e Pulse width measurement e Time of day counting and alarm generation e Event counting The digital I O lines on the PC TIO 10 interface the PC to the following e BCD compatible panel meters and test equipment e Opt
51. n program ia void main unsigned int pacers pa_data pbhectri pb_data isr_ block type isr block calculate register addresses 7 National Instruments Corporation 4 13 PC TIO 10 User Manual Programming Chapter 4 pa_ctrl base_address porta_offset ctrl_ offset pa_data base_address porta_offset data_offset pb_ctrl base_address portb_offset ctrl_ offset pb_data base_address portb_offset data_offset clear any active interrupts by reading Data Registers outp pa_ctrl 0x04 select Output Register inp pa_data clear Port A interrupts outp pb_ctrl 0x04 select Output Register inp pb_data clear Port B interrupts install the interrupt service routine Le isr_block pa_ctrl pa_ctrl initialize isr_block isr_block pa_ data pa_ data isr_block pb_ctrl pb_ctrl isr_block pb_data pb_data isr_block done 0 install_isr irq_channel amp isr block configure Ports and B for interrupts outp pa_ctrl 0x05 enable falling edge interrupts outp pb_ctrl 0x07 enable rising edge interrupts 7 wait for the process to be completed 7 while isr_block done call_foreground_code disable interrupts and remove the interrupt service routine outp pa_ctrl 0x04 inp pa_data outp pb_ctrl 0x04 inp pb_data remove_isr Sample code for th
52. nals on the two onboard Am9513A Counter Timers The timing signals include the GATE SOURCE and OUT signals for the Am9513A Counters 1 through 10 and the FOUT1 and FOUT signals generated by the Am9513A STCs Counters through 10 of the Am9513A Counter Timers can be used for general purpose applications such as pulse and square wave generation event counting and pulse width time lapse and frequency measurements For these applications SOURCE and GATE signals can be directly applied to the counters from the I O connector and the counters are programmed for various operations The Am9513A Counter Timer is described briefly in Chapter 3 Theory of Operation For detailed programming information consult Appendix C AMD Am9513A Data Sheet For detailed applications information consult the Am9513A Am9513A System Timing Controller technical manual published by Advanced Micro Devices Inc Pulses and square waves can be produced by programming a counter to generate a pulse signal at its OUT pin or to toggle the OUT signal each time the counter reaches the terminal count For event counting one of the counters is programmed to count rising or falling edges applied to any of the Am9513A SOURCE inputs The counter value can then be read to determine the number of edges that have occurred Counter operation can be gated on and off during event counting National Instruments Corporation 2 9 PC TIO 10 User Manual Configuration and Installation C
53. nformation Interrupt Control Circuitry The interrupt level used by the PC TIO 10 is selected by the onboard jumper W1 Interrupts can be generated from two different sources EXTIRQ1 and EXTIRQ2 each of which has programmable edge polarity and individual enable clear and disable commands A second set of jumpers W2 locally connects two of the counter outputs to the interrupt circuitry With these connections external wrap backs are unnecessary if you want to use a counter to generate timed interrupts Refer to Chapter 4 Programming or to Appendix D Motorola MC6821 Data Sheet for more detailed information on controlling interrupts Refer to Chapter 2 Configuration and Installation for more information on configuring the jumper settings PC TIO 10 User Manual 3 2 National Instruments Corporation Chapter 3 Theory of Operation Timing and Digital I O Connector All timing and digital I O is transmitted through a standard 50 pin male connector Pin 34 is connected to 5 V through a protection fuse F1 This 5 V supply is often required to operate T O module mounting racks Pin 33 is connected to ground See Chapter 2 Configuration and Installation for additional information National Instruments Corporation 3 3 PC TIO 10 User Manual Chapter 4 Programming This chapter describes in detail the address and function of each of the PC TIO 10 control and status registers This chapter also includes important information about
54. ni a e a e ETa 2 5 T st llati onst esris ER nn ea a a NN e EE aS akes tasa 2 6 Signal Connections shine EAEE A EE ENES TEE a 2 6 VOsConnector Pin Description senene a a E TE EN 2 6 Signal Connection Descriptions ss stainless 2 8 Timing Signal Connections eeseseseseeseesieesesresstsersstesseserestensessrertessessresrenseeseee 2 9 Digital I O Signal Connections sssssssessessseeseeesseeesstessresseesseeeesseesseessersseessees 2 13 Power Connections cossi ne e tod can cate hacen E E er et 2 15 Cablih S ssa ERA R E dd RINA SEN Ss 2 15 Chapter 3 Theory Of Operations tiens man eian kno a Ra ea 3 1 Data Transceivers oan seas e a e Ae ccs ee a ae alate ta ne ets 3 2 PC VO Channel Control Circuitry scierie stat anneau 3 2 Am9513A System Timing Controller ist tige detente hate latest 3 2 MC6821 Peripheral Interface Adapter 2 darts ann canes eras anale rte 3 2 T terr pt Control Circuitry ta eel tin eee eal M ent 3 2 Timing and Digital I O Connector nina tnt salaries 3 3 Chapter 4 PERO ATMA NAN EN nee a al Rens tr tn tte ak 4 1 Introduttion sesinin sen e ihe shies E Re RA a nent 4 1 Resister Mapo RSS En a ier a E R aT 4 2 Register Descriptions snan e r ERE REEE EER RCE E ENEA 4 2 Register Descriptions for the AM9513A STCSs 4 3 AMIS 13A Data RESISTETS naei iaso Re ERA SS 4 4 Am9513A Command Registers lt i sscecscccsissaccsdaasecedtais scackeauaeeusaspcensaeeenens 4 5 AMISTA Status RESISTETS aiee e
55. nterface for the PC Two Advanced Micro Devices AMD Am9513A System Timing Controllers STCs are used for the timing interface With these chips which feature many different timing and counting modes the PC TIO 10 can perform a wide range of pulse measurement and wave generation functions A Motorola MC6821 Peripheral Interface Adapter PIA is used for the digital I O interface each of the two 8 bit I O ports is bit configurable In addition the PC TIO 10 has two edge sensitive interrupt inputs with programmable edge selection Any external transistor transistor logic TTL signal including any of the counter outputs can be connected to these interrupt inputs This manual describes installation theory of operation and basic programming considerations for the PC TIO 10 The example programs included are written in C and assembly language Organization of This Manual This manual is divided into the following chapters and appendixes e Chapter 1 Introduction describes the PC TIO 10 lists the contents of your PC TIO 10 kit lists the optional software and equipment for use with the PC TIO 10 and explains how to unpack the PC TIO 10 kit e Chapter 2 Configuration and Installation describes the PC TIO 10 jumper configurations installation of the PC TIO 10 board in your computer signal connections to the PC TIO 10 board and cabling instructions e Chapter 3 Theory of Operation explains the basic operation of the PC TIO 10 circuitry
56. o isolated solid state relays and I O module mounting racks The PC TIO 10 turns the PC into a timing and digital I O system controller for applications in laboratory testing production testing and industrial process monitoring and control What Your Kit Should Contain The contents of the PC TIO 10 kit part number 776452 01 are listed as follows Kit Component Part Number PC TIO 10 board 181195 01 PC TIO 10 User Manual 320292 01 NI DAQ software for DOS Windows LabWindows with manuals 776250 01 NI DAQ Software Reference Manual for DOS Windows LabWindows 320498 01 NI DAQ Function Reference Manual for DOS Windows LabWindows 320499 01 If your kit is missing any of the components contact National Instruments Your PC TIO 10 is shipped with the NI DAQ software for DOS Windows Lab Windows NI DAQ has a library of functions that can be called from your application programming environment These functions include routines for analog input A D conversion buffered data acquisition high speed A D conversion analog output D A conversion waveform generation digital I O counter timer SCXI RTSI and self calibration NI DAQ maintains a consistent software interface among its different versions so you can switch between platforms with minimal modifications to your code NI DAQ comes with language interfaces for Professional BASIC Turbo Pascal Turbo C Turbo C Borland C and Microsoft C for DOS and Visual Basic Turbo Pascal Mi
57. on Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 9 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 10 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 11 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 12 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 13 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 14 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 15 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 16 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 17 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 18 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 19 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 20 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 21 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 22 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Inst
58. opriate connectors The CB 50 cable termination accessory is available from National Instruments for use with the PC TIO 10 board This kit includes a 50 conductor flat ribbon cable and a connector block Signal input and output wires can be attached to screw terminals on the connector block and are therefore connected to the PC TIO 10 I O connector The CB 50 is useful for initial prototyping of an application or in situations where PC TIO 10 interconnections are frequently changed Once a final field wiring scheme has been developed however you may want to develop your own cable This section contains information for the design of custom cables The PC TIO 10 I O connector is a 50 pin male ribbon cable header connector The manufacturers and the appropriate part numbers for this connector are as follows e Electronic Products Division 3M part number 3596 5002 e T amp B Ansley Corporation part number 609 5007 The mating connector for the PC TIO 10 is a 50 position polarized ribbon socket connector with strain relief National Instruments uses a polarized keyed connector to prevent inadvertent upside down connection to the PC TIO 10 Recommended manufacturers and the appropriate part numbers for this mating connector are as follows e Electronic Products Division 3M part number 3425 7650 e T amp B Ansley Corporation part number 609 5041CE Recommended manufacturer part numbers for the standard ribbon cable 50 conductor 28 AWG
59. products related to this problem include the configuration forms from their user manuals Include additional pages if necessary Name Company Address Fax __ Phone ___ Computer brand Model Processor Operating system Speed MHz RAM M Display adapter Mouse yes no Other adapters installed Hard disk capacity M Brand Instruments used National Instruments hardware product model Revision Configuration National Instruments software product Version Configuration The problem is List any error messages The following steps will reproduce the problem Click here to comment on this document via the National Instruments at http Awww natinst com documentation daq PC TIO 10 Hardware and Software Configuration Form Record the settings and revisions of your hardware and software on the line to the right of each item Complete a new copy of this form each time you revise your software or hardware configuration and use this form as a reference for your current configuration Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently National Instruments Products e Base I O Address of PC TIO 10 Factory Setting hex 1A0 e Interrupt Level of PC TIO 10 Factory Setting 5 e Local Interrupts of PC TIO 10 Factory Settings N C and N C e NI DAQ or LabWindows Version Other Products e Computer Mak
60. programming the PC TIO 10 The PC TIO 10 is a timing and digital I O board designed around two Am9513A integrated circuits and one MC6821 integrated circuit The Am9513A is a general purpose counter timer with five 16 bit individually controlled counters and a 4 bit frequency scaler output The MC6821 is a 16 bit bit configurable digital I O device with two interrupt inputs that are edge programmable This chapter includes programming information for the PC TIO 10 along with program examples written in C and assembly language Note If you plan to use a programming software package such as LabWindows or NI DAQ with your PC TIO 10 board you need not read this chapter Introduction Each of the two Am9513A STC devices is controlled by three different registers a data register a command register and a status register These registers are defined later in this chapter Because there are two Am9513A STC devices on the board they are referenced as STC A and STC B when differentiation is required The MC6821 PIA has four different registers that control its operation The 16 I O lines are grouped into two 8 bit ports Port A and Port B each of which has a control register and a data register associated with it These registers are defined later in this chapter For clarification both registers and ports are referenced in the sections that follow A register refers to a given 8 bit or 16 bit register on the actual Am9513A STC or MC6821 PIA
61. puts at Lout 200 HA 24 V 5 0 V Output logic low voltage all outputs at lout 3 2 mA 0 0 V 0 4 V Figure 2 9 shows the timing requirements for the GATE and SOURCE input signals and the timing specifications for the OUT signals of the Am9513A STCs tse 145 nsec Minimum tsp 7Onsec Minimum tesu 100 nsec Minimum tgh 1Onsec Minimum tew 145 nsec Minimum tour 300 nsec Maximum Figure 2 9 Timing Signal Relationships The GATE and OUT signal transitions in Figure 2 9 are referenced to the rising edge of the SOURCE signal This timing diagram assumes that the counters are programmed to count rising edges The same timing diagram with the source signal inverted and referenced to the falling edge of the source signal applies to the case in which the counter is programmed to count falling edges The signal applied ata SOURCE input can be used as a clock source by any of the Am9513A counter timers and by the Am9513A frequency division output FOUT The signal applied to a SOURCE input must not exceed a frequency of 7 MHz for proper operation of the Am9513A The Am9513A counters can be individually programmed to count rising or falling edges of signals applied at any of the Am9513A SOURCE or GATE input pins In addition to the signals applied to the SOURCE and GATE inputs the Am9513A generates five internal timebase clocks from the clock signal supplied by the PC TIO 10 The five internal PC TIO 10 User Manual 2 12 National Instruments Corpor
62. roller TTL transistor transistor logic VDC volts direct current Related Documentation The following documents contain information that you may find helpful as you read this manual e Am9513A Am9513 System Timing Controller technical manual e IBM Personal Computer XT Technical Reference manual National Instruments Corporation vii PC TIO 10 User Manual Preface Customer Communication National Instruments wants to receive your comments on our products and manuals We are interested in the applications you develop with our products and we want to help if you have problems with them To make it easy for you to contact us this manual contains comment and configuration forms for you to complete These forms are in Appendix B Customer Communication at the end of this manual PC TIO 10 User Manual viii National Instruments Corporation Contents Chapter 1 Introd ctio Er net Re dco dt Me nn 1 1 What Your Kit Should Contain 2 sun ne nn dan en ee me 1 2 Optional SOMw are iiipin dbaecyiuadanes dale daacandeddasvandocads an dev itn 1 3 Optional Quip niet asees nn ae aei dns dr nee nette are 1 3 Unpacking insensible teen 1 4 Chapter 2 Configuration and Installation 2 1 Board COMMA ULATION sccretari ta A st NE a 2 1 Base I O Address Settings 9cccisussaccaeiseessesgspackevs eisein inteni iE i Kia s 2 2 Interrupt Level Selection sea ann me e a a i 2 4 Local Interrupt Selections serne i
63. ruments Corporation C 23 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 24 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 25 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 26 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 27 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 28 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 29 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 30 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 31 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 32 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 33 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 34 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 35 PC TIO 10 User Manual AMD Am9513A Data Sheet Appendix C PC TIO 10 User Manual C 36 National Instruments Corporation Appendix C AMD Am9513A Data Sheet National Instruments Corporation C 37 PC TIO 10 User Manual AMD Am95
64. s and ratings input signal specifications A 1 installation cabling 2 16 procedure for 2 6 unpacking the PC TIO 10 1 4 INTEN bit 4 9 interrupt level default settings for National Instrument products 2 4 jumpers for interrupt level selection 2 4 to 2 5 local interrupt selection 2 5 programming example for the MC6821 4 13 to 4 19 theory of operation 3 2 IRQ bit 4 9 J jumpers and switches base I O address switch settings 2 2 to 2 3 example base I O address switch settings 2 3 National Instruments Corporation Index 3 PC TIO 10 User Manual Index factory settings 2 1 interrupt jumper settings 2 4 local interrupt jumper setting 2 5 parts locator diagram 2 2 switch settings with corresponding base I O address and base I O address space E 1 to E 4 K kit contents of 1 2 L LabWindows software 1 3 M MC6821 Control Registers description of 4 9 register map 4 2 MC6821 Data Registers description of 4 8 register map 4 2 MC6821 Peripheral Interface Adapter block diagram D 7 bus timing characteristics D 4 control registers D 9 control word format D 11 data direction access control bit D 9 to D 10 electrical characteristics D 3 to D 4 functions of D 2 initialization D 9 interface signals for MPU D 8 internal controls D 9 to D 11 maximum ratings D 3 ordering information D 10 overview 3 2 peripheral interface lines D 8 to D 9 peripheral timing characteristics D 5 to D 7 pin as
65. signals Figure 2 9 shows the OUT signal referenced to the rising edge of a source signal Any OUT signal state changes occur within 300 nsec after the source signal s rising or falling edge Digital I O Signal Connections Pins 31 32 and 35 through 50 of the I O connector are digital I O signal pins Pins 35 through 42 are connected to the digital lines A lt 0 7 gt for digital I O Port A Pins 43 through 50 are connected to the digital lines B lt 0 7 gt for digital I O Port B Pins 31 and 32 are connected to the external interrupt lines EXTIRQI and EXTIRQ2 Ports A and B can be programmed on a bitwise basis to be inputs or outputs The following specifications and ratings apply to the digital I O lines Absolute maximum voltage rating 0 3 to 7 0 V with respect to GND Digital Input Specifications referenced to GND Minimum Maximum Input logic high voltage 2 0 V 5 25 V Input logic low voltage 0 0 V 0 8 V Input current Port A 0 lt Vin lt 0 8 V 2 4 mA Input current Port A 2 0 lt Vin lt 5 25 V 400 uA Input current Port B 0 4 lt Vin lt 2 4 V 10 uA Input current EXTIRQ1 and EXTIRQ2 0 lt Vin lt 5 25 V 2 5 WA National Instruments Corporation 2 13 PC TIO 10 User Manual Configuration and Installation Chapter 2 Digital Output Specifications referenced to GND Minimum Maximum Output logic high voltage at Iout 200 HA 24 V 5 0 V Output logic low voltage at lout 3 2 mA 0 0
66. signments D 12 port A B hardware characteristics D 9 power considerations D 3 programming example 4 13 to 4 19 specifications and ratings D 3 to D 7 N NI DAQ software 1 3 PC TIO 10 User Manual Index 4 National Instruments Corporation Index O operating environment specifications A 2 operation of PC TIO 10 See theory of operation optional equipment 1 3 optional software 1 3 OUT lt 5 1 gt bit 4 6 OUT 1 through OUT10 signals 2 8 2 11 to 2 13 output signal specifications A 1 to A 2 P PC I O channel control circuitry 3 2 PC TIO 10 See also theory of operation block diagram 3 1 functions of 1 2 illustration of 1 1 overview v 1 1 physical specifications A 2 pin description Am9513A System Timing Controller C 6 MC6821 Peripheral Interface Adapter D 12 PC TIO 10 I O connector 2 7 B 1 port definition of 4 1 power connections 2 15 power requirement A 2 programming Am9513A Command Registers 4 5 Am9513A Data Registers 4 4 Am9513A Status Registers 4 6 Am9513A STC devices 4 10 to 4 13 interrupt programming example for the MC6821 4 13 to 4 19 MC6821 Control Registers 4 9 MC6821 Data Registers 4 8 overview 4 1 register map 4 2 pulse width measurements 2 10 R registers See also programming Am9513A Command Registers 4 5 Am9513A Data Registers 4 4 Am9513A Status Registers 4 6 definition of 4 1 MC6821 Control Registers 4 9 MC6821 Data Registers 4 8 Nationa
67. ss space you must change the base T O address for the PC TIO 10 or for the other device PC TIO 10 User Manual 2 2 National Instruments Corporation Chapter 2 Configuration and Installation Each switch in U12 corresponds to one of the address lines A9 through A3 Thus the range for possible base I O address settings is hex 000 through 3F8 Base I O address values hex 000 through OFF are reserved for system use Base I O values hex 100 through 3FF are available on the I O channel A2 Al and AO are used by the PC TIO 10 to decode accesses to the onboard registers On the U12 DIP switches press the side marked OFF to select a binary value of 1 for the corresponding address bit Press the other side of the switch to select a binary value of 0 for the corresponding address bit Figure 2 2 shows two possible switch settings The black side indicates the side of the switch that is pushed down A Switches Set to Default Setting Base I O Address Hex 1A0 B Switches Set to Base I O Address Hex 228 Figure 2 2 Example Base I O Address Switch Settings National Instruments Corporation 2 3 PC TIO 10 User Manual Configuration and Installation Chapter 2 Table 2 2 Default Settings of National Instruments Products for the PC DMA Channel Interrupt Level Base I O Address AT A2150 None None 120 hex AT AO 6 10 Channel 5 Lines 11 12 1C0 hex AT DIO 32F Channels 5 6 Lines 11 12 240 hex AT DSP2200 None None 120 hex AT GPIB Channel 5
68. termine setting of mask bit and al bl enable interrupts for selected level out maskm al jmp 2 delay wait for data transfer in al masks get mask data from slave chip jmp 2 delay wait for data transfer and ch al determine setting of mask bit and al bh enable interrupts for selected level out masks al mov int_mask cx save the previous value of the mask restore saved registers li_exit pop es pop ds pop dx pop cx pop bx pop ax pop bp sti ret _install_isr endp remove_isr bp reg at bp 0 ret addr ofs at bp 2 ret addr seg at bp 4 0 _remove_isr proc far cli push ax push bx push cx push dx push ds push es mov ax seg DATA mov ds ax see if our vector is installed if not do not remove the vector National Instruments Corporation 4 17 PC TIO 10 User Manual Programming Chapter 4 cmp vect_num 0 see if vect_num was ever set jz short ri_exit our vector never installed exit mov al vect_num get vector number mov ah 35h get current vector from DOS int 21h get previous int_addr in es bx mov CX CS prep to compare old current vectors mov dx es cmp dx cx see if our vector is already there jne short ri_exit different vector segment exit cmp bx offset _isr_handler jne short ri_exit different vector offset exit restore old mask and vector values mov _cx int_mask get the old mask value in al maskm get current master mask jmp 2 delay wait
69. text in this font denotes text or characters that are to be literally input from the keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions variables filenames and extensions and for statements and comments taken from program code NI DAQ is used throughout this manual to refer to the NI DAQ software for DOS Windows LabWindows unless otherwise noted PC refers to the IBM PC XT the IBM PC AT and compatible computers as well as EISA personal computers The following metric system prefixes are used with abbreviations for units of measure The following accepted abbreviations are used in this manual PC TIO 10 User Manual amperes Celsius degrees hexadecimal hertz vi National Instruments Corporation Preface Abbreviations continued in inches Tout ouput current m meters percent sec seconds V volts VEXT external volt VIH volts input high VIL volts input low Vin volts in Acronyms The following acronyms are used in this manual AMD Advanced Micro Devices AWG American Wire Gauge BCD binary coded decimal DMA direct memory access EISA Extended Industry Standard Architecture FSK frequency shift keying ISA Industry Standard Architecture LSB least significant bit MSB most significant bit PIA Peripheral Interface Adapter STC System Timing Cont
70. than 1 A is the maximum current available to pin 34 If the difference is equal to or greater than 1 A the maximum current available is restricted by the limitations of the connector as shown previously National Instruments Corporation A 1 PC TIO 10 User Manual Specifications Appendix A Minimum Maximum Output logic high voltage all outputs at Iout 200 WA 24 V 5 0 V Output logic low voltage all outputs at Iout 3 2 mA 0 0 V 0 4 V Darlington drive current MC6821 Port B at VEXT 1 5 V 1 0 mA 10 0 mA Operating Environment Temperature 0 to 70 C Relative humidity 5 to 90 noncondensing Storage Environment Temperature 55 to 150 C Relative humidity 5 to 90 noncondensing Physical Dimensions 3 9 in by 4 75 in I O connector 50 pin male ribbon cable connector Power Requirement from PC I O Channel Typical power 0 6 A at 5 VDC 5 Maximum power 1 4 A at 5 VDC 5 Note These power usage figures do not include the power used by external devices that are connected to the fused supply present on the I O connector PC TIO 10 User Manual A 2 National Instruments Corporation Appendix B I O Connector This appendix describes the pinout and signal names for the I O connector on the PC TIO 10 Figure B 1 shows the PC TIO 10 I O connector GATE1 SOURCE2 OUT2 GATE3 SOURCE4 OUT4 OUTS GATE6 SOURCE7 OUT7 GATE8 SOURCE9 OUT9 OUT10 FOUT2 EXTIRQ2 5 V Al A3 AS A7 Bl B3 B5 B7 5

PC-TIO-10 User Manual - UCSD Department of Physics

Contents

Download Pdf Manuals

Related Search

Related Contents