User`s manual
Contents
1. 5 06 X D6 0 Bidirectional data bus bit6 002 6 D5 D5 Bidirectional data bus bit 5 Bidirectional data bus bit 4 p3 45 Bidirectional data bus bit 3 Bidirectional data bus bit 2 Bidirectional data bus bit 1 11 DO E Bidirectional data bus bit O Signal ground Signalground OoOO 00 13 RSO RSTOUT OUT High impedance for about 2 ms after power up and during RESET is active otherwise connected to output of internal 3 3 V voltage regulator This signal is not affected by USB Bus Reset dll iia if not used PWR Power supply 3 0 to 45 25 V for output drivers of pins 10 12 14 16 18 25 17 GND GND PWR Signal ground EEPROM enable internal pull up of 200 kOhm during reset reset EEPROM data I O high impedance during reset PWREN OUT PWREN switched to 109 0 after the module is configured and held in log 1 during reset and sleep mode USB Suspend This signal may be used to drive P channel MOSFET which allows to connect applications draining more than 100 mA from USB 3 3 V output from internal voltage regulator this pin can source up to 5 mA NN RXF OUT Data ready if this signal is log O the data may be read by 1 0 1 sequence on RD pin If the RXF signal is log 1 the data is invalid 24 TXE TXE Transmit enabled if this signal is log O the data may be written by 0 1 0 sequence on WR pin If the TXE signal is log 1 the buffer i2. for driving P channel MOSFET for applications draining more than 100 mA from USB max 500 mA e Support for OEM application VID and PID are stored in EEPROM memory which is part of the module e Ability to use use free EEPROM capacity 64x16 bits Drivers for Windows 98 2K ME XP OS8 OS9 OS X and Linux available for free e DIP28 socket compatible PCB mountable 4 TECHNICAL REFERENCE 4 1 SCHEMATICS USEDPC USED DMT 1 innk FEDRTA 2 100N Ri RZ RESET 4 RSTOLUT RS 5 RSTOLT SOUT EO 4708 27R 1 5 HUSBDP ri R2 5 CNE 5 E GND PHREN 18 PHREN 2TR SIHI 11 SI de RF UCCIO 100K 14 RD 1 VCC 2 USBDM 3 4 5 SHIELD LSBDNC LuSBDFPC ED WF LXE E xF 2 SOUT EEDATA EE SE EES GND PRSASS FTSU245B6R Wi 3IL SESH ES ral XTINM jl xToOLIT Ci m gt 27P 27P GND SVSOUT Wt gt cs eo 100N 100N 100N 10N ND 4 2 TOP VIEW UMP2 1 Top 4 3 BOTTOM VIEW USB GND USBP UCC ADH SIHU HR 2 D D6 RAF 05 04 PHE 03 EDT D2 ESK D1 ECS Da GNO GHD VIO RSOf VCC RST 4 4 PIN DESCRIPTION GND GND PWR Signal ground 2 vcc PWR Power supply 4d to 5 25V
3. OM memory which may be used to store VID and PID identifiers for OEM applications The module connects by 2 signals directly to USB connector while the application side provides 8 bidirectional signals plus flow control From mechanical standpoint the module is arranged as DIP28 with Standard pin spacing of 0 1 inch 2 54 mm so it is possible to fit it into either common or precise DIP28 socket or to solder it directly to printed circuit board The USB connector is to be connected externally which allows the designer to choose the placement of the connector and its type or mini B or USB cable soldered directly to the board may be used This design sigificantly simplifies the development in small production series There is a separate power supply for IO pins VCCIO which allows the module to be connected to 3 0 V application easily The data transfer can be optimized by SI WU signal which controls two functions In suspend mode PWREN 1 if there is Remote WakeUp option in EEPROM turned on falling edge will wake up the device In normal operation falling edge will force immediate data transfer to PC regardless of the amount of data in the buffer otherwise the data is typically being sent in 64 byte blocks PWRENZ signal is designated to drive a P channel MOSFET for applications which drain more than 100 mA max 500 mA from USB In such case it is advisable to turn on enable pull down option in EEPROM configuration M
4. UMP2 USB to 8 bit parallel FIFO interface module User s manual CONTENTS 1 UMP2 USAGE 2 1 FIFO read cycle 2 2 FIFO write cycle FEATURES TECHNICAL REFERENCE 4 1 SCHEMATICS 4 2 TOP VIEW 4 3 BOTTOM VIEW 4 4 PIN DESCRIPTION DRIVER INSTALATION TECHNICAL SPECIFICATION 6 1 ABSOLUTE RATINGS 6 2 TYPICAL RATINGS CONTACT CONNDA ALU U Co RE E 1 UMP2 UMS2 is a module based on FT8U245BM integrated circuit manufactured by FTDI Ltd which provides with easy to use USB connectivity to PC without any need of additional knowledge about USB itself 2 USAGE UMP2 is a USB to 8 bit bidirectional parallel FIFO interface with simple flow control 2 1 FIFO read cycle RXF a 1 1 D D7 Ens max ns T1 RD Active Pulse Width 500 J T2 RD to Pre ChargeTime 450 T3 RD Active to Valid Data 30 NENNEN alid Data Hold Time from RD inactive 80 T6 inactive after RD cycle 2 2 FIFO write cycle niin 5 max ns T7 Active Pulse Width T8 WRtoWRPre ChargeTime S T9 Setup Time before WRinactive 20 T10 Data Hold Time from WRinactive 10 0 712 inactive after WR cycle BO The module is capable of data transfer rates up to 1 MB sec using direct driver and up to 3 MBd using virtual COM port driver In addition there is an EEPR
5. f full Write signal falling edge of this signal writes data to FTDI buffer 25 WR WR IN 26 RD RD IN Read data falling edge of this signal causes 1 byte of data to be read from FTDI buffer and sent to data pins 2 USBDP USBDP I O USB data signal plus It is necessary to connect resistor of 1 5 kOhm between USBDP and 3V3OUT or RSTOUT 5 DRIVER INSTALATION For Windows operating systems there are two types of drivers e Virtual COM port which can be accessed as common COM port using Win32 API e Direct driver to gain full control of the chip a DLL to interface the driver is provided Detailed description of driver installation procedure can be found on FTDI website http www ftdichip com 6 TECHNICAL SPECIFICATION 6 1 ABSOLUTE RATINGS Storage temperature max 150 C current outputs loo O1 Output current I O Io max 24 mA 6 2 TYPICAL RATINGS VCC Operating supply voltage max 5 25 V Operating supply current 4 Suspended supply current ICC 250 uA Input voltage log 1 MV min 20V Input voltage log O Input current log O 7 Address ASIX s r o Staropramenna 4 150 00 Prague Czech Republic Tel 420 257 312 378 Fax 420 257 329 116 E Mail info pic tools com support pic tools com sales pic tools com WWW www pic tools com MANUMP2 Copyright 1991 2003 ASIX s r o All trademarks used
6. in this document are properties of their respective owners This information is provided in the hope that it will be useful but without any warranty We disclaim any liability for the accuracy of this information We are not responsible for the contents of web pages referenced by this document
7. odule UMS2 can also operate BitBang mode in which the data pins act as 8 bit parallel input output This mode can be used for example to configure programmable logic array directly from PC over USB Further there is RSTOUT signal which stays in high impedance state for about 2 ms after power up and then it is connected to internal 3 3 V voltage regulator Signal RSTOUT is also in high inpedance state whenever signal is active RESET log 0 but it is not affected by reset from USB USB Bus RESET The module is equipped with 93LC56 memory of 128x16 bits Lower half of this memory is used for module s needs 64x16 bits Using EEDATA EESK and EECS the application may use upper 64x16 bits for its own purposes While the application is accessing module s EEPROM memory the RESET signal must be active RESET 7 log O Software drivers fow Windows 98 ME 2K XP Mac OS8 OS9 OS X and Linux are available for free on FTDI website http www ftdichip com 3 FEATURES e Data inputs outputs 3 0 to 5 V CMOS compatible e Powered from USB or external supply e Data transfer rates up to 1 MB sec with direct driver and up to MBd with virtual COM port driver Hardware flow control 384 byte receive buffer 128 byte transmit buffer Supports USB 1 1 protocol USB 2 0 compatible BitBang mode which allows the module to be used as 8 bit bidirectional I O signals RD WR TXE RXF are not used in this mode PWRENZ signal
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