EVBUM2240 - ON Semiconductor
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1. i I f WUT s transformer core 1s reset to provide maximum utilization of yhes y 4 krea the transformer This can be seen in Figure 9 which shows the bias winding voltage in the top trace and the switching CH1 100rVvBa M 5 00 us CH3 Z 560V MOSFET gate signal in the bottom trace CHS 1 DVBJ 10 Apr 14 10 25 161r 45kH2 Figure 6 Drain Voltage and Current at 230 V ac Input http onsemi com 5 NCL30060GEVB Tek i Acq Complete M Pos 0000s TRIGGER The voltage on the transformer bias winding remains H Type constant until the core Is demagnetized at which time the voltage begins to fall When the voltage crosses the zero Je a current detect ZCD threshold of 55 mV the gate drive CH4 DRV is issued which turns on the MOSFET The DRV signal remains high until the on time expires and then DRV sd falls to a low state turning off the MOSFET When the MOSFET turns off the bias winding voltage returns to the Mode high state i Morrnal q Typical Performance E o Figure 10 shows efficiency line regulation performance CHT EDON TEMNI ch gany for the evaluation board Figure 11 is a plot of load CH4 S 00vEy 10 Apr 14 10 35 153 059kHz regulation with 115 V ac input Note the converter enters protection modes for very low and very high output voltage Figure 9 Bias Winding and DRV in CrM Operation Power Factor and input current total harmonic distortion THDi is shown in Figure 12 for the evaluation board driving2. 33 790 2910 of I Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2240 D
3. MMSZ4689T1G s Ball DNP k C w IP eo ST gt ts a gt gt aa aa B seni U mms a AA Schmitt Buffer DNP Buffer DNP O NLITSZIT SC 88A 88A ET eee eee cord AVSN Ezg ON Semiconductor NCP431AVSNT1G Reference DNP NOTE All devices are Pb Free Microsoft Excel is a registered trademark of Microsoft Corporation ON Semiconductor and ON are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its
4. low output voltage the off time is extended as it is the product of voltage and time which demagnetizes the transformer initiating the next switching cycle in CrM operation Normal converter startup produces the same extended off times as shorted output requiring differentiation between these two events for proper protection High power factor operation further compounds detection of shorted output due to the fact the energy transfer follows the rectified sine envelope of the applied power The extended off time characteristic of a shorted output may only occur near the peaks of the sine envelope making a standard timer based solution not possible A novel asymmetrical detection method accounts for the extended off time occurring only at the peaks of the applied voltage Further details on shorted output detection can be found in the NCL30060 datasheet Shown below is the typical response of the evaluation board to a shorted output This trace shows output current flowing for about 40 ms before the shorted output detection circuit shuts off the converter After a 1 second delay the converter attempts a restart When the shorted output is removed recovery is automatic CURSOR J Tek O cq Complete M Pos 1 0005 U Type Source at 1 0205 380 4mHz ay DODY Cursor 2 1 08s 20 0m 4 CHE d Drriv lt 10Hz CH So0m ey M 250ms 3 Apr 14 16 39 Figure 15 Current Pulses during Shorted Output Dimming Functions The N
5. 12 LED load Curves for both 50 Hz and 60 Hz operation are shown 1000 90 950 89 900 88 850 87 lt 800 86 a 5 S 750 85 E Q 700 84 Hi ml A O KA K 600 na LED Current 82 550 Efficiency 81 500 80 180 210 240 2 0 300 Input Voltage Vac Figure 10 Efficiency and Line Regulation http onsemi com 6 Output Voltage V Input Current THD 50 45 40 35 30 25 20 15 10 NCL30060GEVB O O WA A E ER gy gy gt ye gy eT 0 100 200 300 400 500 600 700 Output Current mA Figure 11 Load Regulation 60HzTHDi 50 Hz THDi i m 60HzPF 90 120 150 180 210 240 270 Input Voltage Vac Figure 12 Power Factor and THDi http onsemi com 7 800 1 00 0 99 0 98 0 97 0 96 0 95 0 94 0 93 0 92 0 91 0 90 Power Factor PF NCL30060GEVB Setting Output Current The LED output current is directly sensed to provide good regulation over a wide operating range Current is sensed via a resistor R24 placed in series with the negative output lead and the voltage across this resistor is compared to a reference to generate a feedback signal The feedback signal is passed to the primary to control the on time of the NCL30060 providing closed loop operation The loop response of this single stage converter is low in order to provide h
6. CL30060 evaluation board accepts dimming control functions through screw terminal connector J31 The board is factory configured for 1 10 V control but can be easily modified for PWM dimming control by installing alternate components on the PCB The dimming interface is referenced to the secondary ground but does not share the negative lead of the LED load Do not make a connection between the negative of J31 and the negative of output connector J2 This will interfere with LED current sensing 1 10 Volt Dimming The typical 1 10 V dimming control for lighting provides full output when the dimming control is at 10 V and minimum output at 1 V or below The interface on the NCL30060 evaluation board will accept a direct connection to a voltage source such as a variable dc supply to achieve dimming over the 1 to 10 volt range Multiple LED driver http onsemi com 9 NCL30060GEVB boards can be connected in parallel allowing control of many lighting fixtures from one variable dc supply The dimming interface will also support dimming control using a potentiometer noting that the evaluation board interface is capable of sourcing 10 V Note a logarithmic taper potentiometer is suggested for more proportional light control with potentiometer setting Multiple fixtures can be connected together when using a potentiometer however the adjustment region will be more compressed This is due to multiple LED drivers where each dimming inter
7. L 01d O LO SA pZ gzu VL LO isnipy gt SHIL WLEPdON s OLY YN rat co LASININ co LASININ O ZA zia ZA ja e O Ww O gt N eo L 00PVHN 00PVHN ya za ig eynoN O gt W 7 90VLANN 8 O noe 7 1nOA y SO gt EH Pi a Sa FH ju 022 pouy LO JU Z na 2x0 BN w z si q H N i z as Z00PVHIN Z00PVHIN 0195 Ozegunn Z Vv WW Isna H L Lr ed ld Figure 3 Power Stage Schematic http onsemi com NCL30060GEVB NIH lt lt isnipy lt lt A L abe Indu uinuiluliAj INOA lt lt aoeLe U Hulwwig OA 0L L VLEVdON B zen L VI PdON en no gt 35 182 gt O ery 9OVLENW VLEVdON pa OJ O E ved Ju uuno 37 WNWIXeN S y G 88 0S 2 ZSZ2 IN vLEN e9ejioju urwa INAid LZCAIL o LA i OPA SI Indu wnwixey see OW L qu cvd LVO ON L ceu 6897ZSWNIN Led OA led A 9 0 gt mo 01607 AGG 01 z YBIH 91607 ndul ZHY S 0 ZH 00L x Niu 2 1er AM L LEr aul e ye d 992 JU uo juo le ndod indu jolluoo Figure 4 Dimming Control Schematic http onsemi com NCL30060GEVB General Behavior Waveforms Tek The evaluation board is based on a single stage flyback converter This topology provides isolation and high power factor utilizing a single power magnetic and switching she O Acq Complete M Pos 0 0005 TRIGGER Type Edge eit E SOUICE device Single stage
8. MOSFET 800 V 6 A 0 9 Q DPAK SPD06N80C3 NPN Transistor 140 V 600 mA SOT23 ON Semiconductor MMBT5550LT1G NPN Driver Transistor 80 V 500 mA SOT23 ON Semiconductor MMBTAO6LT1G R2 R6 Transformer 25 W XFMR o EFD25 Wurth Midcom 750314098 Rev01 http onsemi com 11 NCL30060GEVB Table 2 BILL OF MATERIALS continued Substi Manufacturer tution Es Description Value Tolerance Part Number Allowed Single Stage PFC LED NCL30060 No Driver SOIC7 ON Semiconductor NCL30060 i wee 1 Opto Coupler 80 V 50 mA Eee SMT4 NEC Electronics PS2513L 1 A me tt Dual Op Amp LM2904 es H soics ON Semiconductor LM2904DR2G 1 Programmable NCP431AVSN 1 SOT23 ON Semiconductor NCP431AVSNT1G No Reference 1 10 V DIMMING INTERFACE C41 C43 Ceramic COG 1 nF 50 V 0603 TOK C1608COG1H102K080AA Ceramic X7R 100 nF 50 V 0603 x TK C1608X7R1H104K080AA J31 1 2 Pin Connector 2 54MM Pitch Through On Shore OSTVN02A150 Hole Technology i 1 NPN NPN Driver Transistor 80 V 500 mA ee SOT23 ON Semiconductor MMBTAO6LT1G Resistor 1 MQ 1 10 W 1 Various Various 0 x opamp amp WU ae TSOP 5 5 ON Semiconductor Semiconductor TLV271SNITIG U42 U43 sme Programmable AA KIZA oe Semiconductor NCP431AVSNT1G s Reference lt a Ee PWM DIMMING INTERFACE DNP Ceramic X7S DNP X7S DNP 10 10nF 6 3V 6 3 V 20 il 0603 C1608X7S0J106MO80AC es ZENER low current E Semiconductor
9. NCL30060GEVB Off line Critical Conduction Mode PFC LED Driver Evaluation Board User s Manual eseription vawe um i Voltage Range 90 305 V rms Output Current aca Voltage Range Maximum upa Powa 25 wo Power Fasor inca os Introduction The NCL30060 is intended to control a high performance critical conduction mode CrM LED driver providing high power factor and low total harmonic distortion of input current utilizing constant on time control This evaluation board provides constant current CC to the load over a wide LED string voltage range The NCL30060 provides many features including high voltage start up direct drive for external power MOSFET frequency dithering to reduce the EMI profile maximum on time protection over voltage protection and short circuit protection These features work together to provide a robust LED driver solution packaged in a compact SO 7 case with one pin removed for improved creepage distance As configured this evaluation board provides 700 mA constant current at up to 25 W and directly interfaces to a string of LEDs This evaluation board supports 1 10 V and PWM dimming control signals referenced to low voltage secondary circuits The default configuration supports standard 1 10 V dimming The evaluation board will support PWM dimming by populating alternate component positions provided on the PCB An in depth description of constant on time control and perform
10. ance of a single stage flyback LED driver can be found in the datasheet of a related controller the NCL30000 This manual also addresses modifications to change the output current and output voltage ranges The NCL30060 specification contains additional information on operation of the controller Design calculations are presented in an Excel Worksheet available at onsemi com to aide in customized design applications Semiconductor Components Industries LLC 2014 May 2014 Rev 0 ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL The compact evaluation board is constructed with through hole components on the top and surface mount components on the bottom side This driver was designed to meet safety agency requirements but has not been evaluated for compliance When operating this board observe safe standard working practices High voltages are present and caution should be exercised when handling or probing various points to avoid personal injury or damage to the unit Figures and 2 illustrate the top and bottom sides of the evaluation board AC input power connects to the block labeled J1 Terminals are marked L and N representing Line and Neutral leads The LED load connects to the terminal block labeled J2 with polarity as marked The anode of the LED load should be connected to and the cathode to terminal Never connect LEDs to the driver while it is running or befor
11. arge Figure 14 below is the bias winding voltage in the top trace and the DRV in the lower trace during an open load condition Note the 1 25 ms periods of no switching and after the fourth consecutive event the controller shuts off for the extended 1 second period TRIGGER Tek Pile O Acq Complete M Pos 2 000ms Type 3 SOuUrce CH4 When Pulse Width 2005 more page 1 of 2 CH4 U 3 60 10Hz A CHI SDDVBJ Mi 1 00ms CH4 S 00VEy 10 Apr 14 15 07 Figure 14 Open Load Protection Shutdown The CS ZCD pin monitors primary current during the MOSFET on time and bias winding voltage during off time D7 is a blocking diode which allows this dual sensing Note that capacitance on the CS ZCD pin will affect converter operation Typically this pin cannot be directly monitored as probe capacitance can alter circuit timing Additionally board capacitance and recovery characteristics of D7 can affect converter operation Best performance is achieved by selecting a low capacitance diode with recovery time of less than 35 ns for D7 to avoid residual voltage on the CS ZCD pin as the converter naturally progresses from on time to off time PCB traces should be kept as short as possible to avoid parasitic capacitance Shorted Output Protection During the on time energy is stored in the flyback transformer and during the off time the energy is delivered to the secondary When the converter is operating with
12. converters require minimizing filter capacitance after the diode bridge and loop response less than 20 Hz to achieve high power factor and low THDi SEE Shown below are waveforms of Q1 switching MOSFET saa drain voltage and current as monitored across sense resistor Mode R12 The evaluation board is operating with 25 W LED nore load Note the scale factors were left unchanged between i Coupling photos to highlight the relationship between drain voltage current and operating frequency CH1 10mb M 5 00 us CH3 J BBY CH3 100vBy 10 Apr 14 10 26 G49 36kKH2 Tek alee O Acq Complete M Pos 0 0005 TRIGGER um Figure 7 Drain Voltage and Current i at 305 V ac Input Source The photo below is the drain voltage showing the envelope of the rectified sine wave input The rectified sine Shope shape provides high power factor performance Rising Tek L O Acq Complete M Pos 0 0005 CHI Made E Coupling Normal hace ee ra j eS rr F Coupling E Limit On 20MHz CH1 100mvBy MM 5 us CH3 7 3349 CH3 100vBy 10 Apr 14 10 23 21 0527 KH2 Volts Div Figure 5 Drain Voltage and Current at 90 V ac Input Tek Li O Acq Complete M Pos 0 0005 TRIGGER Type Invert Oft M 250m CH3 7 amy CHS 10DVBJ 10 Apr 14 10 27 1 57 246kHz F wikis Coupling Figure 8 Drain Voltage at 230 V ac with Slower Scan This converter operates in critical conduction mode i SDUrCE Slope Rising lee CrM where the power switch turns on as soon as the
13. culate R36 is given below _ Ros X Vua2 T K Rag eq 2 K llep X Rog Where R K Vu X eq 3 Rig R Rig For the example evaluation board with minimum LED current of 120 mA R36 is approximately 1 MQ PWM Dimming Components to support a PWM dimming input can be placed on the NCL30060 evaluation board in the designated area Components used for 1 10 V dimming must be removed when using the PWM dimming input The evaluation board converts the PWM signal to an analog level Therefore the LED current responds to the average duty factor of the PWM signal being subtracted from the full LED current For example a PWM signal which is at the high state for 10 will result in 90 of the full LED current A PWM signal which is at the high state 70 of the time will result in an LED current of 30 of maximum U31 is a Schmitt trigger buffer which receives the PWM signal providing a fixed amplitude square wave with fast rise and fall times R33 and C31 filter the PWM signal to an average level which is then impressed on R36 Since the PWM input is converted to an analog voltage to linearly dim the LED current the PWM frequency is not critical PWM frequencies from 100 Hz up to 20 kHz are acceptable The control method functions the same as with the 1 10 V dimming R31 and D31 limit the PWM dimming signal to 5 1 V protecting the input of U31 12 V is the maximum input R2 ensures if no PWM signal is applied the LED current w
14. e the output capacitors discharge after removing input power With no load connected the output capacitors charge to gt 44 V Energy stored in the output capacitance can damage or shorten the effective life of the LEDs if improperly discharged into the LEDs The schematic for the power section is shown in Figure 3 and dimming schematic is shown in Figure 4 Dimming control is accessible through the smaller connector labeled J31 Components have already been placed on the board to support standard 1 10 V dimming where a 10 V level provides full output current and 1 V or below reduces the LED current to a minimum level The response between 1 and 10 V is linear in terms of LED current This evaluation board will also support PWM dimming control by populating the board with the appropriate components as listed on the evaluation board Bill of Materials The board was not intended to support both dimming methods simultaneously therefore only components for one type of interface should be fitted at a time The dimming interfaces are optional and do not require any connections if dimming is not required This evaluation board does not support phase cut or TRIAC dimming functions Publication Order Number EVBUM2240 D NCL30060GEVB Figure 2 NCL30060G Evaluation Board Bottom Side http onsemi com 2 NCL30060GEVB epoule LO JU Z poujeo a AD le bef OLZVHEW gt eta x NLH gt OM LS Olu mol 99 old lt A
15. econdary winding is comprised of two halves The evaluation board default configuration is a series connection of the two secondary windings For LED voltage applications of 9 to 20 V the secondary windings should be changed to a parallel configuration LED string voltages below 9 V will require an alternate transformer design which provides proper secondary bias voltage The transformer secondary uses four wires Flying Leads from the magnetic to the PCB Table 1 below shows the two possible configurations for secondary windings Table 1 TRANSFORMER WIRE CONNECTIONS PCB Location for Low Voltage Parallel Default PCB Wire Location Series Transformer Wire Number Open Load Protection The evaluation board is configured as a current source therefore the output voltage will increase until the current set point of 700 mA is achieved If no load is connected the output voltage would rise excessively and must be limited to avoid damage to the output capacitors The NCL30060 ZCD input monitors the output voltage via the bias winding voltage which is related to the output voltage by the turns ratio of the transformer R7 D7 and R11 form the path from the bias winding to the ZCD input When the ZCD input reaches 6 V the controller shuts off the MOSFET preventing excessive output voltage The recommended value of R11 is 1 KQ to provide proper response of the current sense function R7 is selected to provide 6 V on the ZCD input w
16. face 1s contributing some current to the same potentiometer An alternate approach to a potentiometer is a commercial 1 10 V dimming control An example of this control is a potentiometer which has a transistor follower as a current buffer to minimize the effect of current sourced from multiple dimming interface circuits The 1 10 volt dimming interface will work with all three control methods The 1 10 volt dimming control injects a proportional signal into the current feedback loop essentially subtracting the control input proportionally from the feedback required from the LED current sense resistor This provides a stable wide range dimming control 10 volts on the input provides zero Output from the summing amplifier U41 R45 in conjunction with R44 and R46 results in zero current through R36 which means no modification to the current feedback Therefore full LED is applied to the load A voltage higher than 10 V has no effect on the feedback loop Maximum voltage at the dimming control input is 15 V As the dimming control voltage is reduced U41 amplifies the signal and raises the voltage on R36 which proportionally reduces the feedback signal from the sense resistor U42 clamps this summed signal to 2 5 V when the dimming input is lowered to 1 V Further reduction in dimming input voltage will have no effect due to the clamping of U42 The value of R36 determines the minimum current flowing through the LED load The formula to cal
17. hen the LED output voltage reaches the open load protection threshold C13 is a noise filter for ZCD operation Shown in Figure 13 below is the bias winding in the top trace and the main secondary voltage in the lower trace Note the right side showing a rising voltage when the MOSFET turns off O Acq Complete Ml e 1 460 us TRIGGER ite Source Bal sd Coupling CHI S DVBJ hi 500ns CHI 27 56 0 CHS SDDVBJ 10 Apr 14 14 23 lt 1 Hz Figure 13 Bias Winding Ringing Compared to Secondary Winding Waveform The ringing on the bias winding top trace compared to the secondary winding lower trace reveals an error http onsemi com NCL30060GEVB introduced by the transformer leakage inductance Monitoring the bias winding to detect output voltage directly would indicate a false open load condition The NCL30060 measures the ZCD pin 2 us after the MOSFET turns off to allow the ringing to subside and avoid erroneous readings caused by leakage inductance When the NCL30060 detects an open load condition the MOSFET is turned off and is held off for 1 25 ms at which time another DRV pulse is issued If the open load condition is still present the MOSFET will be turned off again for 1 25ms Should four events occur In succession the controller shuts down for 1 second to protect the system and then attempts a restart Qualifying four events avoids an interruption in operation due to disturbance such as surge or static disch
18. igh power factor and low THDi At startup the output current will overshoot until the control loop has time to respond The amount of overshoot is controlled by a second feedback loop called the fast loop This loop activates quickly at startup and limits the output current but does not provide high power factor performance After a delay the main current loop takes over regulation at the target current while maintaining high power factor The current threshold for the fast loop must be set higher than the peak of the LED ripple current to ensure optimal power factor performance Resistors R16 R17 and R18 establish the proper reference levels for the main and fast current loops As built the reference for the main loop is 70 mV and the fast loop is 100 mV The LED output current H gp is given by the formula below lep mo eq 1 The default value for R24 is 0 1 Q therefore the LED current will be 700 mA H gp can also be set by adjusting the reference dividing resistors R16 R17 and R18 Ensure that the reference level on the fast loop 1s higher than the peak of the LED ripple current to avoid degrading the power factor Adjusting Output Voltage Range The NCL30060 evaluation board was designed to cover a wide range of customer applications As delivered it is configured for 700 mA over a voltage range of 10 to 41 V Lower voltage higher current configurations can also be supported with a simple modification The transformer s
19. ill be at the maximum level R34 sets the maximum level when duty factor is 0 If R34 is omitted the maximum LED current will be slightly higher than the target value without the PWM dimming circuit Clamp There is an area on the bottom side of the PCB labeled Clamp These component locations are reserved for a future enhancement The demo board is shipped without populating this area http onsemi com NCL30060GEVB Table 2 BILL OF MATERIALS Substi Manufacturer tution Eg Description Value Tolerance Part Number Allowed Y5U X1Y1 4 7 nF 250 VAC CD16 E2GA472MYNS RE Film X1 Film X1 a sa Ceramic COG 1 nF 50 V 0603 C1608COG1H102K080AA x N C11 C12 E Aluminum Electrolytic 680 uF 63 V UPW1J681MHD6 C x CeramicNPO NPO 22 22pF 50V 50 V W 0603 C11608COG1H220J080AA H220J080AA D3 D4 D6 D7 250 V 200 mA oe SOD123 WA Semiconductor MMSD103T1G EA RECTIFIER 200 V 3 A E DPAK ON Semiconductor MURD320T4G s 70 V 200 mA SOT23 ON Semiconductor BAW56LT1G D10 ZENER Low Current SOD123 ON Semiconductor MMSZ4704T1G D12 250 V 200 mA SOD123 ON Semiconductor MMSD103T1G D13 Schottky Rectifier 10V 2A pa ON Semiconductor MBRA210LT3G Slow Blow TE5 Series 36911000440 J1 J2 2 2 Position Terminal Block Through Wiedmuller 1716020000 Hole 1 Dual Coil 6 mH 1 6 Q 0 Through Wurth Midcom 750311895 500 mA Hole 1 Drum Inductor 2 2 mH 0 Through Wurth Midcom 768772222 Hole N Channel
20. patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421
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