UM10724 - NXP Semiconductors
Contents
1. 23 Rectification section 23 Filtering section 23 TEA1720B3T section 23 Output section 23 Feedback section 23 Transient controller 24 PCB lay Oll xe EET YS 24 Bill Of Material BOM 25 Transformer design 27 Transformer schematic design and winding CONSIMUCION a uu nuc Spur naa GRO e 27 Construction 27 Specification core and bobbin 28 Points of attention 29 Legal information 30 DefinitionSs 30 Disclaimers 30 Trademarks 30 Contents camo ui ERREUR E E sm a 31 TEA1720ADB1152 10 W EVD15 demo board Please be aware that important notices concerning this document and the product s described herein have been included in section Legal information NXP B V 2014 All rights reserved For more information please visit http Awww nxp com For sales office addresses please send an email to salesaddresses nxp com Date of release 6 August 2014 Document identifier UM107242. UM10724 TEA1720ADB1152 10 W EVD15 demo board Rev 1 1 6 August 2014 User manual Document information Info Content Keywords TEA1720ADB1152 TEA1720B3T TEA1705 ultra low standby power constant output voltage constant output current primary sensing integrated high voltage start up smartphone and tablet charger 5 V 2 0 A supply SMPS transient controller Abstract This user manual describes the TEA1720ADB1152 10 W Constant Voltage Constant Current CV CC universal input power supply for tablet adapters chargers This demo board is based on the GreenChip Smart Power TEA1720B3T and the TEA1705 transient controller The TEA1720B3T and TEA1705 application enables a no load power consumption of less than 20 mW and a low external component count for cost effective applications In addition the TEA1720B3T provides advanced control modes for optimal performance The TEA1705 transient controller continuously monitors the output voltage When the output voltage drops below the detection level Vae Vcc a transient interrupt signal is generated to wake up the TEA1720B3T NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board Revision history Rev Date Description v 1 1 20140806 updated issue Modifications The text has been updated throughout the user manual v 1 20131205 first issue Contact information For more information please visit http www nxp com For sales office addr
3. Fig 14 D 0031 05 26 07 38 39 NeormiHERes M T2 CHI D 00 06 26 07 40 11 NormeHiRes ET Run TW Rurriig Waiting Bor rk 2505 5 Dr E 1 iraid i uni 25 I 1 ms i i LORS E i i Display i i LY EE een E EEE posta i ooo OT G7 i i Te HAY i i i i Trace i u 1 I 1 i id ara i a i i Phen I i i i i I PS ce ynd ed sam asua a GG ssh atum en en UN Pee S UP A REOS Wee MD s mU Trete RN UN i i i i i L i 1 i i i E i i TI i ETCH nes i Tl MET T2 Ons VI 4 350 V T2 kai vi 4 250 V Xd ZiT 1 54 0000n8 Y d 0 530 V t LSU LE I 0 530 v LAT SAXATHHE Hoo WYN i __ SMASH w I NAHIN A ir 0 eure CHE Be Ecke CC 2064 E aoe KOO V div mom 2 50 V 100 1 10 1 DC AM A aaa 009219 1 Rise time 10 gt 90 1 84 ms 1 Rise time 10 gt 90 1 88 ms 2 Rise time O gt 100 2 35 ms 2 Rise time O gt 100 2 30 ms a 90 V AC no load b 265 V AC no load D 236 25 18 47 11 Homi Res Mri AMA u X525 18 48 20 ormes ET Running Waiting bor big ORAS I Running Waiting Bor big SDS s rs Hi i Smad I ur i Smad 1 CU la Nt SON EE i Rus OURS EE Dect x hH Td T or ON AE i i i i i i i i i i i 1 d I i i H i i J i i i 1 i i i 1 i H i i 1 H i 1 1 1 I i j i i i EBA MOT IE LM ME e
4. ET AT IL ge i LEE i 1 1 H I i i i 1 I I i i TI i KWN Ti 8 5500s z 200000ms l i 42 T2 16 1 5000008 l 4y nv gt 261000 Ww i 0 530 y tad JON YI nam LAT B2 1118 Hr zu am v Li I Wae Hz st A V 0 EMITE PET E FU INPUT Hi PARIT E MN 2064 F DC NA HA f RO M d K Vidi WW 800 V d 1 00 Vidi TWW L00 1 10 1 DOM SW 100 1 1 DC394 aaa 009220 aaa 009221 Rise time 10 gt 90 16 1 ms Rise time O gt 100 19 6 ms 90 V AC 2 A load Output rise time 10 gt 90 at 2 A load 1 Rise time 10 gt 90 24 7 ms 2 Rise time 0 gt 100 29 8 ms d 265 V AC 2 A load UM10724 All information provided in this document is subject to legal disclaimers User manual Rev 1 1 6 August 2014 NXP B V 2014 All rights reserved 15 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 6 Output voltage ripple and noise performance The output voltage ripple and noise performance has been measured with an oscilloscope probe connected to the output of the demo board A probe tip was used with a very short GND connection A 100 nF ceramic capacitor and a 10 uF electrolytic capacitor are used in parallel with the probe tip to terminate the output The output voltage ripple and noise has been measured at 90 V and 265 V both at no load and 2 A load Figure 15 and Figure 16 show the results 2813 0625 15 24 14 OSS Mal 2013 06 25 15 22 34
5. NXP does not accept any liability in this respect Export control This document as well as the item s described herein may be subject to export control regulations Export might require a prior authorization from competent authorities Evaluation products This product is provided on an as is and with all faults basis for evaluation purposes only NXP Semiconductors its affiliates and their suppliers expressly disclaim all warranties whether express implied or statutory including but not limited to the implied warranties of non infringement merchantability and fitness for a particular purpose The entire risk as to the quality or arising out of the use or performance of this product remains with customer In no event shall NXP Semiconductors its affiliates or their suppliers be liable to customer for any special indirect consequential punitive or incidental damages including without limitation damages for loss of business business interruption loss of use loss of data or information and the like arising out the use of or inability to use the product whether or not based on tort including negligence strict liability breach of contract breach of warranty or any other theory even if advised of the possibility of such damages Notwithstanding any damages that customer might incur for any reason whatsoever including without limitation all damages referenced above and all direct or general damages the entire l
6. SSS lin Normal OKOGAWA fp 116 HOBE AT diw OKOGAWA 79 soss 2Zns Alie P EE 7 ET f Maing im gt gt SE Maine IH o gt P P C5 P C5 22 3167ny 20 8333mU CHS 16 1 CHS 16 Sh ee SO Omid iu n 200 m AC 2ZOMHz TEN17ZX aaa 008494 TE R172ZK aaa 009228 a 90 V AC b 265 V AC Fig 15 Output voltage ripple and noise no load cable end 0 15 Q 2013707731 12 14 00 5 Horna 2013 07 31 12 13 34 E n Normal OKOGAWA 4 38 r QKO GAMA de 18 _ 3 SOMs s ENG SOMS S Zns lis it Madea IH gt gt 4 Maint la gt gt P C5 P P 05 77 08033mu 722 9162nu CH B LHE B SO iu d EU SO iU d iu nc OHHz nc TEA172X aaa 008493 TEA172X aaa 009229 a 90 V AC b 265 V AC Fig 16 Output voltage ripple and noise 2 A load cable end 0 15 Q UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 16 of 31 NXP Semiconductors U M1 0724 UM10724 5 7 5 8 5 9 TEA1720ADB1152 10 W EVD15 demo board Inrush current The inrush current is limited in the demo board by an NTC in series with the mains Table 5 shows the value of the peak inrush current Table 5 Inrush current A peak Vin V 90 V 115 V 230 V 265 V lout OA 8 3 A peak 11 0 A peak 23 3 A peak 27 3 A peak lout 2 A 8 6 A peak 11 1 A peak 24 1 A peak 27 6 A peak
7. capacitor 10 uF 400 V ERK2GM100F12OT Aishi 8x 14 mm C3 capacitor 33 pF 50 V XR C0603 C7 capacitor 3 3 nF 50 V XR C0805 C8 capacitor 220 pF 500 V CC0805JRNPOBBN221 Yageo C0805 C10 capacitor 47 nF 50 V XR C0603 C11 capacitor 2 2 nF 50 V X7R C0603 C51 capacitor 470 uF 6 3 V RS80J471MDNASQJT Nichicon 5 x 8 mm C52 capacitor 470 uF 6 3 V RS80J471MDNASQJT Nichicon 5 x 8 mm C53 capacitor 22 uF 10 V 1206 GRM31CR71A226KE15L Murata C70 capacitor 10 uF 35 V C1206 C3216X7R1V106M160AC TDK C100 capacitor 100 pF 2000 V CD70 B2GA101KYNS TDK D1 diode 30 V BZX384 C43 BZX384 C43 NXP Semiconductors D5 diode 100 V BAS316 BAS316 NXP Semiconductors SOD323 D7 diode 50 V ES1AL SMF ES1AL Taiwan Semiconductor D8 diode 600 V S1JL S1J Taiwan Semiconductor D50 diode 45 V SBR10UA5SP5 13 Diodes Inc SBR10U45SP5 13 D51 diode 45 V SBR10U45SP5 13 Diodes Inc SBR10U45SP5 13 D101 diode 1000 V S1ML S1ML Taiwan Semiconductor D102 diode 1000 V S1ML S1ML Taiwan Semiconductor D103 diode 1000 V S1ML S1ML Taiwan Semiconductor D104 diode 1000 V S1ML S1ML Taiwan Semiconductor J3 connector USB AF DIP 094 H Gold Conn L101 inductor 100 uH 11R104C Murata L102 inductor 10 wH 0805 LBR2012T100K Taiyo Yuden Q1 NPN transistor T0 92 TB100 NXP Semiconductors R1 resistor 4 7 kO 1 96 0805 R3 resistor 4 3 KQ 1 96 0603 R5 resistor 1 Q 1 0603 R8 resistor 100 kQ 1206 UM10724 All information
8. was placed inside an encasing To avoid influence of the air flow the encasing itself is placed inside a box see Figure 22 Temperature chamber Charger casing Chamber temperature 25 C 45 C aaa 008500 Fig 22 Measurement setup temperature chamber The component temperatures are measured using thermocouples glued on the components The temperatures after 30 minutes warming up time at 2 A load are shown in Table 7 Table 7 Component temperatures at 2 A load and Tambient 25 C 45 C Chamber temperature Vin 90 V lout 2A Vin 265 V lout 2 A Temperature C Temperature C 25 45 25 45 1 EVD15 transformer 67 83 66 84 2 TB100 NPN 83 99 90 109 3 TEA1720 controller 73 89 57 65 4 D50 D51 secondary diodes 73 88 72 88 5 R770 71 72 base resistors 90 103 73 92 6 C52 output capacitor 58 75 58 75 7 C2 input capacitor 69 83 60 78 UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 21 of 31 jenuew 1 sn v LOC snDny 9 L AeH S1euure osip eba 01 100 gns si 1ueuinoop SIY u pepi oJd uomeuuoJul y L JO cC veZLOLWN panlasa SUBU IY 7L0Z NA dXN 6 Schematic L101 J1 O RF1 2AT q VRT 100 o D1 IN BZX384C43 D103 D104 N sim Asim D101 D102 AN sim ANsim J2 i5 N 10 uH Fig 23 Schematic TEA1720ADB1152 10 W EVD15 d
9. 172X aaa 008485 TEA172X aaa 009213 Red Vout Red Vout Orange lout Orange lout a 90 V AC b 265 V AC Fig 11 Load step 0 A gt 1 0 A gt 0 A at cable end 0 15 O UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 12 of 31 NXP Semiconductors UM10724 TEA1720ADB1152 10 W EVD15 demo board 2013 06 24 18 35 21 E AA asua Mil 1916 20HS s Sasi YOKOGAWA 4 LH EET mac tax OCS C5 5 59167 5 61250 in C5 in C5 4 404170 4 404170 Che 105 1 1 00 diu TEAL ZX aaa 008490 TEA172X aaa 009214 Red Vout Red Vout Orange lout Orange lout a 90 V AC b 265 V AC Fig 12 Load step 0 A gt 2 0 A gt 0 A at cable end 0 15 O UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 13 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 5 Turn on delay and output rise time Figure 13 shows the turn on the delay of the output of the supply at 90 V and 265 V with no load and 2 A load VOROGAWA 2093 06 26 07 46 29 Wormie W Ti YORDGANE 2013 06 26 07 47 48 homies Mri Running Waiting bor tri H x Running Waiting lor frig 125M amp s hir E5 h i Alires d i i EE C1 Kt SCN
10. Short circuit When the output is shorted the controller enters hiccup mode The input power and average output current is given in Table 6 Table 6 Short circuit input power and average output current Shorted output 90 V AC 265 V AC input power 0 97 W 0 87 W average output current 0 88 A 0 63 A Conducted EMI The conducted EMI is measured according to EN55022 without the secondary GND connected to the protective mains ground and from 150 kHz to 30 MHz Figure 17 and Figure 18 show the results The red crosses show the quasi peak values Philips Innovation Services EMC center CONDUCTED ENESSIONS PRES CAN Peak amp AWG Final OF amp AVG Ps M T3 so ll A I j wn Lame W Line 2 Neutral Maia NN wes 12 17 11 FM Friday Jama 21 2013 EUT i Mode TEAT 20 TDW 115V SHE aaa 008495 Fig 17 Conducted EMI 115 V no ground 2 A load All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 17 of 31 NXP Semiconductors U M1 0724 UM10724 TEA1720ADB1152 10 W EVD15 demo board Philips Innovation Services EMC center CONDUCTED EMISSIONS PRESCAN Pesk i AVG Final OF amp AvG Line 1 amp Line 2 Mautralj Maina Bulla Hm Ji 15 d Frequersy Mz 12 02 11 PM Frida June 21 2013 BUT Mode TEATTZO OW I 230v 5SOHLE aaa 008496 Fig 18 Conducted EMI 230 V no g
11. claimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 23 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 7 6 Transient controller The TEA1705 secondary side transient controller offers an excellent transient response of the TEA1720B3T controller with ultra low no load power and minimum sized output capacitors The output voltage is continuously monitored and when the output voltage is below the detection level Vge Vcc a transient interrupt signal is generated This signal is transmitted via C10 and the transformer to the primary side to wake up the TEA1720B3T This system reduces the volume of the output capacitors and makes it possible to build compact chargers 8 PCB layout eH 3 BR m 3 H u 8 A en Ze 5 g i F XM o O iin QC cu ocd Top aaa 008502 Bottom sas 009230 a op b Bottom Top aaa 008503 aaa 009231 a Top b Bottom Fig 25 Copper layers UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 24 of 31 NXP Semiconductors UM10724 9 Bill Of Material BOM TEA1720ADB1152 10 W EVD15 demo board Table 8 TEA1720ADB1152 bill of material Reference Description and values Part number Manufacturer C1 capacitor 10 uF 400 V ERK2GM100F12OT Aishi 8x 14 mm C2
12. emark This behavior of the TEA1720B3T controller is not incorrect It is only required to test it in the correct way UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 29 of 31 NXP Semiconductors UM10724 12 Legal information 121 Definitions Draft The document is a draft version only The content is still under internal review and subject to formal approval which may result in modifications or additions NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information 12 2 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable However NXP Semiconductors does not give any representations or warranties expressed or implied as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors In no event shall NXP Semiconductors be liable for any indirect incidental punitive special or consequential damages including without limitation lost profits lost savings business interruption costs related
13. emo board T1 transformer EVD15 R30 13 kO R31 200 kO FL1 D50 D t f 1 SBR10U45SP5 J3 D51 USB A flat M N gt SBR10U45SP5 R11 C11 TEA1705 SOT23 C100 100 pF 2 kv GND aaa 008501 pieog OUI9D SI QA3 M Ol cSILLEQVOcZIVAL Yeo LINN s4019npuooluioS dXN NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board UM10724 7 1 7 2 7 3 7 4 7 5 The GreenChip TEA1720ADB1152 demo board consists of a single phase full wave rectifier circuit a filtering section a switching section an output section and a feedback section The circuit diagram is shown in Figure 23 and the component list is shown in Table 8 Rectification section The bridge diodes D101 to D104 provide a single phase full wave rectifier Capacitors C1 and C2 function as reservoir capacitors for the rectified input voltage Thermistor RT1 limits inrush current Terminals J1 and J2 connect the input to the electricity utility network Swapping these two wires has no effect on the operation of the converter Filtering section Inductors L1 and L2 with capacitors C1 and C2 form r filters to attenuate conducted differential mode EMI noise TEA1720B3T section The TEA1720B3T device U1 contains the oscillator CV CC control start up control protection functions high voltage start up and emitter switch for switching the external NPN all in one IC One auxiliary winding
14. ence only The English version shall prevail in case of any discrepancy between the translated and English versions 12 3 Trademarks Notice All referenced brands product names service names and trademarks are the property of their respective owners GreenChip is a trademark of NXP Semiconductors N V NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 30 of 31 NXP Semiconductors UM10724 13 Contents 10 1 10 2 10 3 11 12 12 1 12 2 12 3 13 Introduction RR 3 Safety warning 3 Features ee 4 Power features 4 Green features 4 Protection features 4 Technical specifications 5 Performance data 6 No load input power consumption 6 V CUIVeS APA PAP 7 Me cu E ourierPRSITEAEYERSGOSSG4EeTES ES 9 Transient response TEA1720B3T 10 Turn on delay and output rise time 14 Output voltage ripple and noise performance 16 Inrush current 17 Short circuil 17 Conducted EMI 17 Radiated EMI 19 Common mode noise 20 Test description 20 Thermal measurements 21 Schematic 22 Circuit description
15. esses please send an email to salesaddresses nxp com UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 2 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 1 Introduction WARNING Lethal voltage and fire ignition hazard The non insulated high voltages that are present when operating this product constitute a risk of electric shock personal injury death and or ignition of fire This product is intended for evaluation purposes only It shall be operated in a designated test area by personnel qualified according to local requirements and labor laws to work with non insulated mains voltages and high voltage circuits This product shall never be operated unattended This user manual describes the TEA1720ADB1152 10 W Constant Voltage or Constant Current CV CC universal input power supply for tablet adapters and chargers This demo board is based on the TEA1720B3T GreenChip SP integrated circuit The TEA1720B3T GreenChip SP provides ultra low no load power consumption without using additional external components Designs are cost effective using the TEA1720B3T GreenChip SP because only a few external components are needed in a typical application The additional TEA1705 transient controller ensures excellent transient response in no load mode Remark All voltages are in V AC unles
16. hese products are for illustrative purposes only NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products and NXP Semiconductors accepts no liability for any assistance with applications or customer product design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned as well as for the planned application and use of customer s third party customer s Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products UM10724 All information provided in this document is subject to legal disclaimers TEA1720ADB1152 10 W EVD15 demo board NXP Semiconductors does not accept any liability related to any default damage costs or problem which is based on any weakness or default in the customer s applications or products or the application or use by customer s third party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer s
17. iability of NXP Semiconductors its affiliates and their suppliers and customer s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars US 5 00 The foregoing limitations exclusions and disclaimers shall apply to the maximum extent permitted by applicable law even if any remedy fails of its essential purpose Safety of high voltage evaluation products The non insulated high voltages that are present when operating this product constitute a risk of electric shock personal injury death and or ignition of fire This product is intended for evaluation purposes only It shall be operated in a designated test area by personnel that is qualified according to local requirements and labor laws to work with non insulated mains voltages and high voltage circuits The product does not comply with IEC 60950 based national or regional safety standards NXP Semiconductors does not accept any liability for damages incurred due to inappropriate use of this product or related to non insulated high voltages Any use of this product is at customer s own risk and liability The customer shall fully indemnify and hold harmless NXP Semiconductors from any liability damages and claims resulting from the use of the product Translations A non English translated version of a document is for refer
18. igure 5 shows the VI characteristics measured at the cable end aaa 008483 aaa 009144 OT IILAN IL ERR c 230 V AC d 265 V AC Fig 5 VI characteristics cable end Below Vout 2 4 V at the cable end the controller enters the hiccup mode UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 8 of 31 NXP Semiconductors UM10724 TEA1720ADB1152 10 W EVD15 demo board 5 3 Efficiency Figure 6 shows the efficiency at 90 V 115 V 230 V and 265 V ga aaa 008484 Effiency at PCB end Yo 80 ar 60 E 0 0 4 0 8 1 2 1 6 2 lout A 1 Efficiency at 90 V AC 2 Efficiency at 115 V AC 3 Efficiency at 230 V AC 4 Efficiency at 265 V AC Fig6 Efficiency as a function of output current Table4 Efficiency PCB end Vin V AC lout A Vout V Pin W efficiency 96 Average 0 5 Ato 2 0A 90 0 20 5 04 1 39 72 25 77 86 0 50 5 07 3 29 76 80 1 00 9 19 6 54 78 27 1 50 5 22 9 98 78 29 2 00 5 33 13 61 78 08 115 0 20 5 04 1 36 73 17 80 03 0 50 5 06 3 20 78 92 1 00 5 12 6 36 80 22 1 50 5 21 9 70 80 40 2 00 5 31 13 14 80 58 230 0 20 5 06 1 37 73 43 81 43 0 50 5 06 3 16 79 86 1 00 5 11 6 23 81 73 1 50 5 21 9 51 81 98 2 00 5 29 12 86 82 15 265 0 20 5 06 1 40 72 06 81 12 0 50 5 06 3 19 79 15 1 00 5 11 6 25 81 52 1 50 5 21 9 53 81 78 2 00 5 29 12 88 82 01 UM10724 All info
19. lowing pages Contact Elettronica Rossoni HK Limited for more information 11 1 CHO ET Dimensions in mm Fig 28 Physical data bobbin 17 9 aaa 008507 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved UM10724 User manual Rev 1 1 6 August 2014 28 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board t m hai Dimensions in mm aaa 008508 m 4 O 7 Fig 29 Physical data core Table 10 Core parameters Core parameters effective length Le 37 9 mm effective cross area Ae 26 1 mm effective volume Ve 990 MM3 approximate weight W 5 7 gram pair 11 Points of attention When testing the CC mode of the TEA1720B3T it is necessary to use a DC electronic load in resistive mode not in current mode The current in CC mode has a small fold back characteristic see Figure 4 and Figure 5 When current mode of a DC electronic load is used the output voltage drops immediate to zero when the maximum current is exceeded When the output voltage becomes zero causing the input voltage of the used DC electronic load to become zero as well many DC electronic loads can no longer adjust the current Using the resistive mode of the DC electronic load avoids this problem Below Vout 2 7 V at the PCB end the TEA1720B3T enters hiccup mode to limit the output power R
20. on transformer T1 is used to provide the primary sensing information for the TEA1720B3T A second auxiliary winding generates the supply voltage This voltage is half wave rectified by diode D5 and capacitor C70 C70 is charged via the current limiter resistor R5 The voltage on C70 is the supply voltage for the VCC pin of the TEA1720B3T and delivers the base current for the NPN transistor The RCD R clamp consisting of R8 C8 D8 and R9 limits drain voltage spikes caused by leakage inductance of the transformer Output section Diodes D50 and D51 Schottky barrier type diodes filtered by capacitors C51 and C52 rectify the secondary winding of transformer T1 Using a Schottky barrier type diode results in a higher efficiency of the demo board C51 and C52 must have sufficient low ESR characteristics to meet the output voltage ripple and noise requirement without adding an LC output filter Capacitor C11 damps high frequency ringing and reduces the voltage stress on the Schottky diodes Resistor R50 provides a minimum load to maintain output control in no load condition Feedback section The TEA1720B3T controls the output by current and frequency control for CV CC regulation The auxiliary winding on Transformer T1 senses the output voltage The FB pin of the TEA1720B3T senses the reflected output voltage via feedback resistors R30 R31 and R3 C3 is added for noise filtering All information provided in this document is subject to legal dis
21. provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 25 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board Table 8 TEA1720ADB1152 bill of material continued Reference Description and values Part number Manufacturer R9 resistor 180 Q 1206 R10 resistor 4 7 Q 0603 R11 resistor 0 O 0603 R30 resistor 13 kQ 1 96 0603 R31 resistor 200 kO 1 96 0603 R50 resistor 2 4 kQ 0603 R60 resistor 0 75 O 0805 ERJ6BQFR75V Panasonic R61 resistor 6 8 Q 1 96 0805 R70 resistor 430 Q 1 96 1206 R71 resistor 430 Q 1 96 1206 a R72 resistor 430 Q 1206 R102 resistor 510 Q 0603 RT1 thermistor NTC NTCLE100E3109JBO Vishay RF1 Fusistor 2 A 250 V AC MCPMP 2 A 250 V Multicomp 3 18 x 7 6 mm T1 transformer EVD15 U1 IC TEA1720B3T 700 V SO8 TEA1720B3T NXP Semiconductors U2 IC TEA1705 SOT23 TEA1705 NXP Semiconductors UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 26 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 10 Transformer design 10 1 Transformer schematic design and winding construction The transformer used in the TEA1720ADB1152 demo board has size EVD15 with bobbin EVD15 17 6 horizontal 8 pin Prim 1 46 48 turn
22. rcuit with zero current consumption under normal switching operation 3 3 Protection features UM10724 OverVoltage Protection OVP with auto restart UnderVoltage LockOut UVLO and OverVoltage Protection OVP on IC supply pin OverTemperature Protection OTP Sense pin short protection Hiccup function for automatic switch off at continuous too low output voltage Demagnetization protection for guaranteed discontinuous conduction mode operation Open and short circuit protection of the Feedback control FB pin Short circuit protection of the charger output All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 4 of 31 NXP Semiconductors UM10724 4 Technical specifications Table 1 Input specifications TEA1720ADB1152 10 W EVD15 demo board Parameter Conditions Value Remark input voltage input frequency 90 V to 265 V universal AC mains 47 Hz to 63 Hz average no load input power no load 18 mw average of 115 V and 230 V consumption Table 2 Output specifications Parameter Conditions Value Remark output voltage nominal output current nominal output power 5 0 V 20A 10 0 W LES ITI rs ie rr 26 mm n 27 5 E 18 5 mm LA aaa 008480 aaa 009140 a Top view b Bottom view Fig 2 TEA1720ADB1152 10 W EVD15 demo board UM10724 All information provided in
23. rmal Edge QH 56mA St aur u paa nb Buto Lowel ET 2 00 Vase DAT C me diy 10us div aaa 008495 Fig 21 Common mode noise EPS switching frequency component at 265 V 5 11 1 Test description The TEA1720ADB1152 demo board has been connected to a 265 V AC power source where one or the other of the AC mains is a neutral conductor It has been connected to the protected earth ground either at the upstream service transformer or locally in the laboratory environment The demo board has been loaded with a 5 Q 1 96 resistive load at the end of a 1 meter USB cable The 5 O load is located in a metal box that represents the equivalent capacitive load of a generic mobile terminal The EPS switching component has been measured with an 1 100 oscilloscope probe 50 MQ 7 5 pF between the metal box ground and the protective earth ground The level of the common mode noise is measured at the worst position which is around the mains voltage zero crossing in this case The test has been repeated with a 2 5 O resistor load The test result was equal to the 5 Q test result UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 20 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 12 Thermal measurements The component temperatures were measured using a temperature chamber The PCB
24. rmation provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 9 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 4 Transient response TEA1720B3T The transient response for the TEA1720B3T 300 mV cable compensation has been tested with load steps at 90 V and 265 V at the PCB end and at the end of the cable from e 0A 0 5A0A e 0A 1 0A0A e OA gt 20A 0A Figure 7 to Figure 9 show the load step response measured at PCB end 2013 06 24 18 44 25 TE Norna 1 2013 06 24 18 45 23 ge Horma 2045 I YOKOGAWA 2056 FH il FHo TM m H 0 500 Uzd iu 1 00 Ad ju DC HHz DE euni 5 250 U TEA17ZX aaa 008485 TEA172X aaa 009207 Red Vout Red Vout Orange lout Orange lout a 90 V AC b 265 V AC Fig 7 Load step 0 A 0 5 A gt 0 A at PCB end UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 10 of 31 NXP Semiconductors UM10724 TEA1720ADB1152 10 W EVD15 demo board 8 508 Led iu L Q Arai Dc oz C 20M TEAL 2 aaa 008486 Red Vout Orange lout a 90 V AC Fig 8 Load step 0 A 1 0 A 0 A at PCB end H id i EU 0 508 Wed iw 1 wg nad Iv Auto DC zoHHz DC 2OH0U 5 256 U TE 172X aaa 009209 Red Vout Orange lo
25. round 2 A load All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 18 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 10 Radiated EMI The radiated EMI is measured according to EN 55022 30 MHz to 1 GHz Figure 19 and Figure 20 show the measured results Philips Innovation Services EMC center RADLATED EMISSIONS PRESCAN OP amp AVERAGE MAXIMISET Horizonkal amp Vertical k Field Strength dEuVim 08 18 01 AM Friday June 21 2013 EUT Mode TEA1720 10 115M GNG aaa D05497 Fig 19 Radiated EMI at 115 V 2 A load Philips Innovation Services EMC center RADLATED EMISSIONS PRESCAN OF amp AVERAGE MAXIMISED Horizontal amp Vertical E 1 E E 3 a j a 08 55 18 AM Friday Jure 21 2043 EUT Mode TEAT720 10W 230W Sor aaa 008498 Fig 20 Radiated EMI at 230 V 2 A load UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 19 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 11 Common mode noise Figure 21 shows the result of the EPS switching freguency component of the common mode noise test The switching component is below 2 Vpp YDHIDO AW de 2013 06 26 16 48 33 No
26. s 200 um Prim 1 Flying leads 46 48 turns 200 um Bottom view EVD15 Sec Fb 6 turns 11 turns 6 x130 um PI PA 2 x 350 um 1 x 300 um Aux 17 turns 150 um z Flying leads Shield 1 1 turn b Flyingleads Flying leads aaa 008504 aaa 009232 a Schematic b Bottom view Fig 26 EVD15 Transformer schematic and bottom view 10 2 Construction aux re pim eee shield apas s i ii e fo Gw ssa Oiase pim BEEN 0 aaa 008505 Black dot Winding direction Fig 27 EVD15 construction Table 9 Winding data Layer No Color Winding Wires parallel No ofturns Wire diameter 11 orange auxiliary winding 1 17 150 um 10 black isolation tape 9 blue primary sandwich 1 46 to 48 200 um 8 black isolation tape 7 green shield 1 6 black isolation tape UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 27 of 31 UM10724 TEA1720ADB1152 10 W EVD15 demo board NXP Semiconductors Table 9 Winding data continued LayerNo Color Winding Wires parallel No ofturns Wire diameter 5 yellow secondary winding 3 6 2 x 350 um T W 1 x 300 um T W 4 black isolation tape 3 red fb winding 6 11 130 um 2 black isolation tape 1 blue primary sandwich 1 46 to 48 200 um Primary inductance 930 uH 10 3 Specification core and bobbin The specification of the core and bobbin are given on the fol
27. s otherwise stated 2 Safety warning The complete demo board application is AC mains voltage powered Avoid touching the board when power is applied An isolated housing is obligatory when used in uncontrolled non laboratory environments Always provide galvanic isolation of the mains phase using a variable transformer The following symbols identify isolated and non isolated devices 019aab173 019aab174 a Isolated b Not Isolated Fig1 Isolation symbols UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 3 of 31 NXP Semiconductors U M1 0724 3 Features TEA1720ADB1152 10 W EVD15 demo board 3 1 Power features Low component count for cost effective design Universal mains input Isolated output Highly efficient gt 80 Primary sensing for control of the output voltage without optocoupler and secondary feedback circuitry Built in emitter switch for driving low cost NPN high voltage transistor Minimizes audible noise in all operation modes Energy Star 2 0 compliant Jitter function for reduced EMI Excellent transient performance with ultra low no load power and small output Capacitors Cable compensation 0 3 V at maximum power 3 2 Green features No load power consumption lt 20 mW Very low supply current in no load condition with energy save mode Incorporates a high voltage start up ci
28. t ES i Display a rr 1 or on i Type Type bay Hay a i F Trane Trace an an i E i li I i H Mean a Pheri i n li i i Ti T2 i Ti T2 Y EE PIE MD EE en a ey i D oe I x i i A FL NWR H T2 HELLEN L 450 VJ zT 122 00000 y2 0530 i Ll i B 19673 Hr N KOY CA meu on meu DC 2084 DC 204 00 1 10 1 aaa 008491 Turn on delay time 120 ms Turn on delay time 122 ms a 90 V AC no load b 265 V AC no load VOROGAWA 2013 06 26 07 43 18 Herc Res T VOROGAMA 2013 06 26 07 44 20 Herc Res T Running j Running Waiting bor big I ds i FIT 3 amjd EON EE i Display I rn d ELE UI MED C mr rea p gt er On i i i i Type nay i I i Traci i cara i 4 i Temi i 1 a TITE adu 2 i i i i i i i here F ie w aaa 009217 Turn on delay time 135 ms Turn on delay time 144 ms c 90V AC 2 A load d 265 V AC 2 A load Fig 13 Turn on delay times at no load and 2 A load UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 14 of 31 NXP Semiconductors UM10724 TEA1720ADB1152 10 W EVD15 demo board Figure 14 shows the rise time of the output from 10 96 to 90 at 90 V and 265 V with no load and 2 A load
29. this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 5 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 Performance data 5 1 No load input power consumption The no load input power has been measured 20 minutes after switch on Table 3 and Figure 3 show the results Table3 No load input power consumption Vmains V Output voltage V Power consumption mW 90 5 213 18 8 115 5 204 18 1 230 5 178 17 5 265 5 168 18 8 28 aaa 008481 No load power mW 24 265 0 Vmains AC Fig 3 No load input power consumption UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 6 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board 5 2 VI curves Figure 4 shows the VI characteristics measured at the PCB end aaa 008482 aaa 009141 UH 0 HAI 0 0 5 1 1 5 lout A c 230 V AC d 265 V AC Fig 4 VI characteristics PCB end Below Vout 2 7 V at the PCB end the controller enters the hiccup mode UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 7 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board F
30. to the removal or replacement of any products or rework charges whether or not such damages are based on tort including negligence warranty breach of contract or any other legal theory Notwithstanding any damages that customer might incur for any reason whatsoever NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document including without limitation specifications and product descriptions at any time and without notice This document supersedes and replaces all information supplied prior to the publication hereof Suitability for use NXP Semiconductors products are not designed authorized or warranted to be suitable for use in life support life critical or safety critical systems or equipment nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury death or severe property or environmental damage NXP Semiconductors and its suppliers accept no liability for inclusion and or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and or use is at the customer s own risk Applications Applications that are described herein for any of t
31. ut b 265 V AC 2013 06 24 18 36 20 MS Normal YOKOGAWA 1894 20HS S 5nsdis EE MaimriM gt gt 2013 06 24 18 32 06 jD Norma YOKOGAWA 4 7 20HS s 5nd C Wayna in ax C5 5 53333U in C5 4 716670 CH CHG 106 1U 1 90 Ard in 6 500 way 1 00 Adi 2 nwz nc 20MHz2 nc 20MMz TEA17ZK aaa 008487 TE 172X aaa 009210 Red Vout Red Vout Orange lout Orange lout a 90 V AC b 265 V AC Fig9 Load step 0 A 2 0 A 0 A at PCB end UM10724 All information provided in this document is subject to legal disclaimers NXP B V 2014 All rights reserved User manual Rev 1 1 6 August 2014 11 of 31 NXP Semiconductors U M1 0724 TEA1720ADB1152 10 W EVD15 demo board Figure 10 to Figure 12 show the load step response measured at cable end 0 15 Q Normal 2013 06 24 Bin 8s Ch V nn Norma 0HS2s YOKOGAWA dp 2076 1 aaas 5nsAis a 8 588 Uzdiu 1 00 Rew 1 00 Adi Di 2ZOHHz zomx i TEA172X aaa 008488 did TEA172X aaa 009212 Red Vout Red Vout Orange lout Orange lout a 90 V AC b 265 V AC Fig 10 Load step 0 A 0 5 A gt 0 A at cable end 0 15 O 2013205224 18 42 03 E nn Norma 1 YOKOGAWA dp 1962 20HS2S S5nsdis a 1 LT 1 00 Adi IG eit 5 258 V TE
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