CPU-71-16 (DPD6)
Contents
1. alari 11 3 1 9 4 4 5 ach eee pit ER lee eas 11 3 1 4 Memory Address Map 12 3 1 5 GPED Internal Fiagister ii inde iaia rai 12 3 2 4 13 pn PEE a i 13 3 2 2 22 5 iaia 13 3 2 3 External Memory Interface sense 14 3 3 Communication Specifications a tede siete dence ea dut ad taa 14 93 31 oo 14 B I eo seras 15 KRMUUU te 15 3 34 Seal ATA 22212424 eed ete te De eri lode cd 15 15 3 3 6 SMBus System Management Bus 15 sag es MM UID ID MID eiu MM 16 BBB LPC 25528 E 16 2 40 o 17 3 44 17 PI 11010 VGA EE 17 2 4 3 5 6 17 4 Mechanical 5 sauce sntsecessaeescuadsncedvesteseausdancevenszeess 19 External Dimension cierre ceci iaia ia 19 LUNSOUNIECI M ere 20 43 ICAL Al E LUI 21 5 PMC Supp2. Unused Super 1 0 Unused Channel is not selected after BIOS start up Do not switch to channel 0 or channel 3 as they are unused Please refer to the PCA9544APW NXP datasheet for multiplexer setting method DPD6MAN101 15 CPU 71 16 User Manual E EUROTECH 3 3 7 PCI CPU 71 16 has a 32bit 33MHz PCI bus compliant with the PCI Local Bus Specification Revision 2 3 standard The PCI bus interface is provided by a Idt Tsi381 bridge that adapts from one x1 PCI Express lane off the QM67 and then is used to interface to the Idt Universe IID PCI bus to VMEbus controller All VMEbus Interrupts are routed to INTC on the Tsi381 Additionally it interfaces to the two optional PMC sites The signal voltage on the PCI bus is 3 3VDC only PCI devices are shown in Table 12 Table 12 List of PCI devices Bus Device Function Device Device model number number number number 0 DRAM Controller Intel Core 17 15 0 PCI Express Controller 1 Intel Core 17 15 1 PCI Express Controller 2 Intel Core 17 15 2 PCI Express Controller 3 Intel Core i7 i5 0 Integrated Graphics Device Intel Core 17 15 0 PCI Express Controller 4 Intel Core 17 15 0 Intel Management Engine Interface 1 Intel QM67 1 Intel Management Engine Interface 2 Intel QM67 2 IDE R Intel QM67 3 KT Intel QM67 0 Gigabit Ethernet Controller Intel
3. PCI C BEO to 3 LVDS VDD EN LPC ADO to 3 SUS_S3 PCI_PAR LVDS_BKLT_CTRL If your design does not conform to the above description please problems check before using to avoid any 2 DPD6MAN101 6 1 CPU 71 16 Placement Plans A photograph of the CPU 71 16 component side is shown in Fig 4 with connectors and major components labelled The solder side is shown in Fig 5 Fig 6 labels user option jumpers and LEDs PB1 J26 Fig 4 Component side Fig 5 Solder side DPDSMANIOO 8 CPU 71 16 User Manual E EUROTECH 6 2 On board Jumpers and LEDs T Fig 6 Locations of User Option Jumpers amp LEDs 6 2 1 User and Factory Option Jumpers JPx The CPU 71 16 has several user and factory only jumpers that are shown in figure 6 above of Pins Description JP1 2 Clears CMOS and BIOS settings go to default when shunted for 4 seconds while power is off Jumper JP1 must not be shunted when power is on JP2 2 JP2 will route BATLOW to Ground when shunted JP2 must be left open JP3 2 JP3 routes GPIO to GPOO when shunted JP4 2 JP4 routes GPI1 to GPO1 when shunted JP5 routes GPI2 to GPO2 when shunted Note GPO2 will reset the board when asserted low and the VMEbus will also be reset if JP19 is closed JP6 2 JP6 routes GPI3 to GPOS when shunted The CPU 71 16 will be hardware initialized to operate as a VMEbus slot 1 bus
4. Applies to the second rev DPD6 2014 Dynatem Inc E EUROTECH Table of Contents Table of Contents Document Revision History 3 epe dU ta Nits Date 2 Table of 3 1 Important User Inforimation ceret rentre iter noe reete ER a 5 1 1 Safety Notices and Warnings sise 5 1 2 Life Support PONCY 7 IESU Elgcun die 7 US TH 7 1 5 Technical ASSISTance edente tree fe re datu adus eode pecie 7 1 6 CONVENTIONS S 7 2 SUMIMALY 9 2 1 IIC 9 2 2 Block 10 3 Hardware Specifications ritorno aper E Cis 11 3 1 PIOCESSOr HL 11 3 1 1 Processor Options e eue HR eg eu D ede 11 3 1 2 Cache Memory e itii ded e e t da o
5. 31 39 47 55 63 C 71 79 87 95 103 C 111 C 119 C Active Trip Point Hi Fan Set temperature of active trip point hi fan point that OS increases the processor rotation frequency Disabled 15 C 23 C 31 C 39 47 55 63 C 71 C Default 79 C 87 95 103 111 C 119 C Active Trip Point Lo Fan Set temperature of active trip point lo fan point that OS decreases the processor rotation frequency Disabled 15 23 31 C 39 C 47 55 C Default 63 C 71 C 79 87 95 103 C 111 C 119 C Passive TC1 Value Set TC1 value to ACPI passive cooling equation Value is changed by using and key Preset value 1 16 Default 1 Passive TC2 Value Set TC2 value to ACPI passive cooling equation Value is changed by using and key Preset value 12 16 Default 5 Passive TSP Value Set TSP value to ACPI passive cooling equation When passive cooling is enabled be able to set monitoring frequency to read from OS by 1 10 second Value is changed by using and key Preset value 2 32 Only even number Default 10 Thermal Sensor Device Enable Set thermal sensor device Set TSP value to ACPI passive cooling equation Disabled Enabled Default 18 possible to set by changing Automatic Thermal Repo
6. DPD6MAN101 EUROTECH Mechanical Specifications 3 1 5 2 Status Register offset 0001h This register shows the logic of SPD Write Protect signal and input signal from carrier board Table 5 Status Register Meaning Initial Value Access RSVD RSVD 000000 BIOS_DISABLE Request signal from carrier board E THRM 1 Temperature sensor on carrier board shows a normal value 0 Temperature sensor on carrier board is shows an abnormal value BATLOW 1 battery voltage on carrier board is a normal value 0 battery voltage on carrier board is an abnormal value SPD_WP WP of EEPROM for SPD Write 0 when rewriting software 3 1 5 3 Thermal Monitor Select Register offset 0002h This register selects a thermal monitor connected to the CPLD that is being read out Table 6 Thermal status register Meaning Initial Value Access RSVD RSVD 000000 THRM_MONI_SEL Thermal monitor temperature selected from the 00 following options can be read out by thermal monitor register offset 0003h 11 RSVD 10 GBE THRM ambient temperature of GbE 82579 01 DDR3B THRM ambient temperature of DDR3 solder side 00 DDR3A THRM ambient temperature of DDR3 component side 3 1 5 4 Thermal Monitor Register offset 0003h This register displays temperature value read out by the thermal monitor Table 7 Thermal Monitor Register Meaning Initial Value Access Displays the temperature value read out from th
7. 45 Configuration Setting Setting Contents Enable Intel R Management Engine Enabling disabling of event log Disabled Enabled Default ME FW Downgrade Enable ME FW downgrade Disabled Default Enabled ME Debug Event Service Enable ME debag event service Disabled Default Enabled Enable ME debag event service for BIOS Disabled Default Enabled ME IFR Features Set Intel R ME Independent firm recovery Disabled Enabled Default DPD6MAN101 ce CPU 71 16 User Manual E EUROTECH 8 2 13 Thermal Configuration Table 46 Thermal Configuration Setting Setting Contents Platform Thermal Configuration Automatic Thermal Reporting Active Trip Point Hi Fan Active Trip Point Lo Fan Passive TC1 Value Passive TC2 Value Passive TSP Value PCH Thermal Device Thermal Sensor Device Enable PCH Temp Read Enable CPU Energy Read Enable CPU Temp Read Enable CPU2 Temp Read Enable TS On Dimm Enable Alert Enable Lock ME SMBus Thermal Reporting Automatic Thermal Reporting Automatically sets CRT 5 ACO based recommended value of BMG Thermal Reporting for Thermal Management settings Disabled Enabled Default Critical Trip Point 9 Set temperature of ACPI critical trip point point that OS shuts off system Note Target value POR with all Intel R mobile processors is 100 degrees C Default 15 23 C
8. 8 2 9 Network Configuration uses 48 8 20 EPO GOR IGUEGllOn 5 enis o teet A ase Hao Ee 48 8 2 11 SMBIOS Event D et p Opa nn ERE Ege 49 amp 82 12 ME Configuration pi t EUR ne 49 8 2 13 Thermal ConfiguraliOn irren rhone a HER RR 50 8 2 14 Configuration ciali iaia it 51 8 2 15 Intel Rapid Start Technology iier ai 52 c RcHEST e TVAE 52 GE Mame ei e i earn 52 98 53 LE AL PR EE E 53 Eurotech Worldwide Presence irrito centu ici patire 55 4 DPD6MAN101 E EUROTECH Important User Information 1 Important User Information In order to lower the risk of personal injury electric shock fire or equipment damage users must observe the following precautions as well as good technical judgment whenever this product is installed or used All reasonable efforts have been made to ensure the accuracy of this document however Eurotech assumes no liability resulting from any error omission in this document or from the use of the information contained herein Eurotech reserves the right to revise this document and to change its contents at any time without obligation to notify any person of such revision or changes Reproduction of all or part of this document without Eurotech s permission is prohibited 1 1 Safety Notices and Warnings The following general safety pre
9. DB9 connector with jack screws for mechanically securing the mating cable connector DCD RxD TxD DTR GND DSR RTS CTS RING a 8 OON 6 3 6 J26 Front Panel VGA Connector J26 is a high density DB15 VGA connector accessible from the front panel Here is the pinout for J26 1 Red Output 2 Green Output 3 Blue Output 4 NC 5 HSYNC VSYNC Return GND 6 Red Return GND 7 Green Return GND 8 Blue Return GND 9 5 10 HSYNC VSYNC Return GND 11 NC 12 DDCDAT 13 Horizontal Sync HSYNC Output 14 Vertical Sync VSYNC Output 15 DDCCLK 28 DPD6MAN101 E EUROTECH Connectors and Jumpers 6 3 7 USB1 amp USB2 Front Panel USB Ports Connectors USB1 amp USB2 provide two USB 2 0 ports that are accessible at the front panel Here is the pinout for either of the two connectors 5 VDC via 1 1 amp self resetting fuse F2 Negative Data Positive Data Signal GND Chassis GND Chassis GND Chassis GND Chassis GND 6 3 8 amp P2 amp PO VMEbus backplane connectors P1 P2 are the VMEbus connectors populated on standard off the shelf CPU 71 16 cards They are Harting 160 pin 5 row DIN connectors Table 17 has the pinout for the P1 connector P1 is VMEbus spec compliant in its pinout while P2 has custom I O routing of COM ports SATA LAN and L
10. PCH DPD6MAN101 S EUROTECH BIOS Setup Setting Contents GMCH BLC Control Select GMCH BLC control PWM Inverted Default GMBUS Inverted PWM Normal GMBUS Normal Select BIA When Auto is selected GMCH use VBT default Level n set aggressive level Disabled Level 1 Level 2 Level Level 4 Level 5 Auto Default Spread Spectrum clock chip Set SSC Off Default Hardware SSC is set by chip Software SSC is set by BIOS IGD TV Control Set IGD TV Invalid when external graphics is connected VBIOS Default Default M NTSC J NTSC 433 PAL B PAL G PAL D PAL H PAL I PAL M PAL N PAL K PAL Nc SECAM L SECAM 5 D SECAM G SECAM K HDTV STD SMPTE 240 1080159 HDTV STD SMPTE 240 1080160 HDTV STD SMPTE 295M 1080150 HDTV STD SMPTE 295M 1080p50 HDTV STD SMPTE 296M 720p50 IGD TV2 Control Set IGD TV2 Invalid when external graphics is connected VBIOS Default Default M NTSC J NTSC 433 PAL B PAL G PAL D PAL H PAL I PAL M PAL N PAL K PAL Nc SECAM L SECAM D SECAM G SECAM H SECAM HDTV STD SMPTE 240M 1080159 HDTV STD SMPTE 240M 1080160 HDTV STD SMPTE 295M 1080150 HDTV STD SMPTE 295M 1080p50 HDTV STD SMPTE 296M 720p50 IGD Active LFP Set IGD Active LFP No LVDS Default Int LVDS SVDO LVDS eDP Port A eDP Port D Set Panel Color Dep
11. QM67 USB EHCI Controller 2 Intel QM67 Intel High Definition Audio Controller Intel QM67 PCI Express Port 1 Intel QM67 1 PCI Express Port 2 Intel QM67 2 PCI Express Port 3 Intel QM67 3 PCI Express Port 4 Intel QM67 4 PCI Express Port 5 Intel QM67 5 PCI Express Port 6 Intel QM67 6 PCI Express Port 7 Intel QM67 7 PCI Express Port 8 Intel QM67 to USB EHCI Controller 1 Intel QM67 0 PCI to PCI Bridge Intel QM67 0 LPC Controller Intel QM67 2 SATA Controller 1 Intel QM67 3 SMBus Controller Intel QM67 5 SATA Controller 2 Intel QM67 6 Thermal Subsystem Intel QM67 PCI Express 4 M depends on the largest bus number shown on PCI Express 3 3 8 LPC CPU 71 16 has a port compliant with the LPC1 1 standard The LPC bus is used for communication with the LPC47M107S MS Super 1 chip This device is used by the BIOS and provides one COM port that is accessible from a DB9 connector at the front panel and a 2 COM port and an LPT1 port that are accessible from the P2 backplane connector DPD6MAN101 E EUROTECH Mechanical Specifications 3 4 I O CPU 71 16 has the following interfaces to external devices 3 4 1 GPIO CPU 71 16 has a control register and a control register The features of GPIO are shown below 3 4 1 1 GPI CPU 71 16 is equipped with 4 general inputs They can be read out from the Intel QM67 PCH register GPI is set as input pin in BIOS The register where GPI is a
12. STD1014 1987 Based on Hyper Threading technology the Intel Core i7 2710UE mobile processor enables simultaneous performance of 4 threads on dual core and is suited for applications requiring high performance Performance in single thread is improved by the Turbo Boost function It also supports dual displays with its built in High performance graphics function It speeds up encryption and decryption with its built in AES code engine Having direct mounted DDR3 1333 supporting ECC as the main memory the CPU 71 16 is suitable for embedded systems requiring high reliability and high performance Maximum memory capacity is upgradable to 8GB but ships standard OTS with 4GB The memory automatically corrects 1 bit corruption within 72 bits and can also detect 2 bit corruption The CPU 71 16 was introduced by Dynatem using part number DPD6 2 1 Features CPU 71 16 has the following features Intel Core i7 mobile processor ECC supported DDR3 1333 memory direct mounted on board maximum capacity of memory 8GB 1 port of 10 100 1000Base T Ethernet at front panel 2 ports of 10 100BaseTX Ethernet on P2 or 2 ports of 10 100 1000BaseTX Ethernet on either PO or P2 routing determined by 0 ohm resistors 1 RS232 compatible COM port is available at the front panel via a DB9 connector 1 port of Analog SVGA graphics is available at the front panel via a high density DB15 connector 2 ports of USB2 0 interface at front panel 1 RS232 COM po
13. Setting Setting Contents PCI Express Port 3 5 Set PCI Express Root Port Disabled Enabled Default 8 2 8 4 SB USB Configuration Table 19 SB USB Configuration Setting Setting Contents Set USB ECHI USB2 0 Disabled Enabled Default Set USB ECHI USB2 0 function Disabled Enabled Default USB Per Port Disable Control Set USB per Port 40 5 8 9 Disable Disabled Default Enabled xHCI Pre Boot Driver Set xHCI Pre Boot router support Disabled Enabled Default Set xHCI controller run mode Disabled Enabled Auto Smart Auto Default HS Port 1 4 Switchable Enable switch HS High Speed port with xHCI and EHCI Port is allocated to EHCI by select Disabled Corresponding SS port is enabled by allocating HS port to xHCI Disabled Enabled Default 8 2 8 5 SB Serial IRQ Config Table 20 SB Serial IRQ Configuration Setting Setting Contents Set serial IRQ mode Serial IRQ is active in quiet mode only when needed while always active in continuous mode Quiet Continuous Default Set initial start frame of serial IRQ 4 Frames 6 Frames 8 Frames DPD6MAN101 7 CPU 71 16 User Manual E EUROTECH 8 2 9 Network Configuration Table 21 Network Configuration Setting Setting Contents PCH Internal LAN Set PCH internal LAN Disabled Enabled Default LAN OPROM Selection 5 Set PCH internal LAN used for minimum configur
14. USB2 Front Panel USB Ports usine 29 6 3 8 P1 amp P2 amp PO VMEbus backplane connectors 29 7 System Specifications 31 7 1 31 6 4 em 31 I 31 7 3 Environmental Specifications 2 31 NIelxljjgm 33 8 1 Main MENU iic to es Ai Ae tende se 33 8 1 1 System Dal LEE 33 8 1 2 System ede e We ep E ME DEI laine bisi 33 8 1 3 System Informaliorn 24 da 33 8 1 4 BOOL FOALS c 34 CNN Error Manager log 34 8 2 Advanced Menu ORT 35 amp 2 1 Select Language ate a d et rui ea iano un 35 92 2 BI MIN CONNGUIAUON En 35 8 2 3 Processor Configuratioh uiae e nita ia a a FH VIRA ap Ex Ra ae 36 8 2 4 Peripheral Configuration cise sci ai Hed HERR AP MER 39 8 2 5 HDD Configuration ili alia ua e 39 8 2 6 Memory Configuration sise 40 8 2 7 System Agent SA Configuration sise 41 8 2 8 South Bridge tede red ini ian 45
15. controller when JP5 2 SPAL JP17 is shunted The CPU 71 16 will be reset by VMEbus resets when JP18 is shunted and JP22 is shunted JP18 2 between pins 2 amp 3 JP19 2 The VMEbus SYSRESET generated by the Universe IID on the CPU 71 16 will be routed to the VMEbus backplane when JP19 is shunted JP21 2 The CPU 71 16 will attempt to boot from an LPC BIOS via connector J29 when JP21 is shunted and this functionality is not supported JP21 must be left open The VMEbus SYSRESET as generated or received by the Universe IID will reset the CPU 71 16 s JP22 3 CPU and system resources when JP22 is shunted between pins 2 amp 3 Otherwise JP22 must be shunted between pins 1 amp 2 29 DPD6MAN101 E EUROTECH Connectors and Jumpers 6 2 2 On board LEDs The CPU 71 16 has LEDs that provide info on system status and are shown in figure 6 above Description LED1 Green When LEDI is lit the on board power supplies are on and the board should be running LED2 Red When is lit the on board power supplies in standby mode and the board will not run D24 Red D24 is turned on by pin PC8 LED1 from the CFast drive at connector J25 D25 Green D25 is turned on by pin PC9 LED2 from the CFast drive at connector J25 D32 Green SATA Activity LED from the CPU 71 16 PCH D33 Red Lit when THERMTRIP has been set off indicating an overheat status D34 Red Lit when the CPU amp PCH are
16. in Sleep State S4 D35 Red Lit when the CPU amp PCH are in Sleep State S5 D36 Red Lit when SUS_STAT has been asserted and the CPU amp PCH are entering a sleep state 6 3 Connector Functionality and Pinouts 6 3 1 CN1 SPI ROM programming connector CN1 is a connector for writing BIOS data to the on board SPI ROM CN3 will be removed before shipment 6 3 2 CN3 CPLD programming connector is a connector for writing data to the on board CPLD CN3 will be removed before shipment 6 3 3 J29 LPC Off Board Connector Connector 429 provides off board LPC routing for alternative BIOS Super I O and also POST code support This connector is intended for factory use Here is the pinout for J29 Odd Row Even Row 1 NC 2 3 3 VDC 3 NC 4 33 MHz Clock 5 ADO 6 AD3 7 AD1 8 FRAME 9 AD2 10 GND 11 RESET 12 N C 13 N C 14 5 VDC 15 Pullup to 3 3 VDC 16 GND 6 3 4 J1 Front Panel Gigabit Ethernet Port Connector J1 provides a 1 Gigabit second Ethernet port accessible at the front panel There are four differential pairs and they are bidirectional BI Here is the pinout for J1 BI_DA BI_DA BI_DB BI_DC DC BI_DB BI_DD BI_DD DPD6MAN101 27 ON Oa R amp D CPU 71 16 User Manual E EUROTECH 6 3 5 J27 Front Panel RS 232 COM1 Port Connector Connector J27 provides an RS 232 COM port at the front panel J27 is a male
17. middle of the board has its Interrupts offset by two so that INTA on the PMC card will be routed to INTC on the Tsi381 etc DPD6MAN 101 23 9 EUROTECH CPU 71 16 User Manual 5 2 Power Sequence 12V and 5VDC on the VMEbus have no power sequence but 12 VDC is required to switch on the on board 5 VDC which is the source for all other voltages For internal use Turn the board power off when connecting the SF100 programming tool to the CN1 connector for BIOS reprogramming Do not send the following signals when the RESET signal is being asserted Signals 2 0 to 3 LPC SERIRQ KBD A20GATE LPC_DRQ 0 to 1 SDVO_I C_DAT LVDS_I C_DAT KBD_RST LPC_AD 0 to3 Please make sure that the following signals will have no problem in your design even if voltage is applied from the CPU 71 16 while the carrier board power is OFF LPC_SERIRQ SUS_S4 Signals PCI FRAME LVDS CK LVDS DAT SUS_S5 PCI_STOP LVDS_I C_DAT VGA_ C_DAT CK PCI IRDY amp VGA HSYNC GPI 0 to 3 DAT PCI TRDY VGA VSYNC KBD_RST ATA ACT PCI SERR VGA CK KBD_A20GATE GPO 0 to 3 PCI_PERR VGA LPC_DRQ 0 to 1 THRMTRIP PCI_DEVSEL PCI CLK CB_RESET PCI GNTO to 3 PCI LOCK LPC CLK PCI RESET4 PCI ADO to 31 LVDS BKLT EN LPC_FRAME SUS_STAT
18. these should meet the requirements set out for the environment that the equipment will be deployed in Information and or Notes These will highlight important features or instructions that should be observed Protect the device from vibration and impact Do not place the product in a location where it can fall or can be subject to vibration or impact because this may cause device failure Do not modify the device For safety reasons under no circumstances should you modify the device Eurotech will not repair products that have been modified DPD6MAN101 5 CPU 71 16 User Manual E EUROTECH Protect the product from water and chemicals Contact between the product and water or chemicals can result in product failure electrocution or fire Protect the product from foreign material Make sure that foreign material does not get into the product during use storage or transport because this can result in product failure Use precautions in handling to ensure that you are not injured The sharp projections on this product may cause injury Take care in handling this product in order to avoid injury Do not disassemble the product In order to maintain guaranteed product performance do not disassemble this product under any circumstances Keep the product away from radios and TVs Do not use the product near radios television sets or other devices generating strong magnetic or electrical fields This could result in fail
19. 2 N mode 49 DPD6MAN101 3 EUROTECH BIOS Setup 8 2 7 System Agent SA Configuration 8 2 7 1 DMI Settings Table 11 DMI Setting Setting Contents DMI Link ASPM Control Enable SA ASPM Active State Power Management of DMI link Disabled Default LOS LOS and L1 Auto DMI Gen2 Support Control Enable SA ASPM Active State Power Management of DMI link Disabled Default Enabled Auto 8 2 7 2 Intel VT for Directed I O VT d Table 12 Intel VT for Directed I O VT d Setting Setting Contents Intel VT for Directed Enable Intel R Virtualization Technology VT d Disabled Default Enabled 8 2 7 3 Graphics Configuration Table 13 Graphics Configuration Setting Setting Contents Internal Graphics Set internal graphics device Invalid when external graphics is connected Disabled Enabled Auto Default Primary Display Selection Select primary display device PCI Auto Default Switchable Graphics Set IGD GTT memory size 1MB 2MB Default Set graphics aperture size 128MB 256MB Default 512MB DVMT Pre Allocated Select pre allocated graphic memory size being used internal graphic device Invalid when external graphics is connected 32MB Default 64MB 128MB DPD6MAN101 CPU 71 16 User Manual Setting EUROTECH Contents Set DVMT5 0 DVMT graph
20. 3 1 1 Processor Options Intel s Core i7 2610UE Mobile Dual Core CPU at 1 5GHz TDP 17W is the off the shelf processor preferable for embedded applications with broader temperature requirements Intel Core i7 2655LE Mobile Dual Core CPU at 2 2GHz TDP 25W is optional 3 1 2 Cache Memory CPU 71 16 has the following cache memory L1 cache 32kB for data 32kB for instruction per core L2 cache 256kB for data and instruction per core L3 cache shared by all cores o Core i7 2610UE 4MB 3 1 3 VO Address Map I O space Address Map is shown in Table 1 Table 1 VO space Address Device Address DMA Controller Interrupt Controller LPC SIO Interrupt Controller Timer Counter LPC SIO Timer Counter Microcontroller NMI Controller Microcontroller RTC Controller DMA Controller Reset Generator DMA Controller Interrupt Controller Power Management Interrupt Controller DMA Controller PCI and Master Abort Serial ATA Serial ATA Serial ATA Serial ATA Interrupt Controller Reset Generator DPD6MAN101 CPU 71 16 User Manual 9 EUROTECH 3 1 4 Memory Address Map Memory space Address Map is shown in Table 2 Table 2 Memory space Address Map Device Address Lowest 2 GB of Main Memory 0000 0000h 7FFF_FFFFh Idt Tsi381 PCI Express PCI Bridge to the 8000_0000h 9FFF FFFFh Universe IID VMEbus adapter am
21. BIOS setup procedure To enter the BIOS setup menus press the F2 key while immediately after powering up Caution If the BIOS starting screen or the BIOS setup screen is not displayed properly due to a change in the BIOS settings clear the CMOS to return to the BIOS default settings by shunting jumper JP1 while power is off see Section 6 2 The SecureCore Tiano is a Unified Extensible Firmware Interface UEFI and not actually a BIOS but it will be referred to as a BIOS in this chapter out of tradition and because their purposes are the same to initialize the CPU 71 16 and boot the OS The SecureCore Tiano takes the advantages of a UEFI faster booting less limited memory space greater boot drive size and support for local I O devices before booting and adds a parallel structure that can as an example boot the OS while still initializing other devices 8 1 Main Menu 8 1 1 System Date Table 1 System Date Menu Setting Setting Contents Sets month day year 8 1 2 System Time Table 2 System Time Menu Setting Setting Contents System Time Time setting Sets hour minute second 8 1 3 System Information Current system information is displayed DPD6MAN101 33 CPU 71 16 User Manual E EUROTECH 8 1 4 Boot Features Table 3 Boot Features Menu Setting Setting Contents NumLock Set NumLock status at start up On Default ON Off OFF QuickBoot Set QuickBoot Disable
22. CH that are accessible from the front panel An SVGA Port with a 340 4 MHz RAMDAC that supports resolutions up to 2048 x 1536 pixels 75 Hz Three 8 bit DACs provide R G and B The i7 processor provides 16 PCI Express lanes that may be used for graphics expansion Eight of these PCI Express lanes remain unrouted but the other 8 have been brought to optional XMC connector J15 XMC cards cannot be populated on off the shelf CPU 71 16 cards as they will mechanically conflict with the front panel connectors Table 8 PCI Express Graphics Link Configuration PCI Express PCI Express Link Configuration Link Configuration Link Configuration Lane 1 2 3 PCIE15 PCIE14 PCIE13 PCIE12 X8 PCIE11 unrouted PCIE10 PCIE9 PCIE8 PCIE7 PCIE6 5 4 2 1 PCIEO X8 routed to the optional XMC connector J15 NIVA do DPD6MAN101 9 EUROTECH Mechanical Specifications 3 3 2 PCI Express CPU 71 16 is compliant with PCI Express Rev2 0 standard The CPU has 16 lanes of PCI Express that were discussed in the previous section The QM67 PCH offers 8 lanes of PCI Express Table 9 shows how the 8 PCI Express lanes from the PCH are used and what devices they interface to Table 9 PCH PCI Express Configuration PCH PCI Express lane Application Idt Tsi381 PCI Express to PCI Bridge 82579 LM 1 Gbps Front Pa
23. DPD6 USER S MANUAL CPU 71 16 DPD6 Core i7 VMEbus SBC Module Second edition February 2015 DPD6MAN102 DIGITAL TECHNOLOGIES FOR A BETTER WORLD www eurotech com EU ROT EC H Preface Thank you for choosing the CPU 71 16 Please read this manual before using the CPU 71 16 so that you may obtain the greatest benefit from using the device This manual presents the specifications functions and method of use of the CPU 71 16 Eurotech has made every effort to carefully inspect each product and has taken great care to package and to ship the product In the unlikely event of the product s failure to operate normally due to problems in shipping or otherwise the company will repair or replace the product at its own responsibility If you have any questions contact your local Eurotech Sales Office See Eurotech Worldwide Presence page 55 for full contact details Trademarks All trademarks both marked and not marked appearing in this document are the property of their respective owners This document does not give permission to the implementation of patents or other rights held by Eurotech or third parties Document Revision History VERSION Brief Description of Changes Publication Number First edition May 2014 Issued First Version DPD6MAN101 Second edition February 2015 Issued Vita 31 1 Routing on PO corrected DPD6MAN102 IRQ routing for Universe and PMC sites was changed and GPO2 can reset the VMEbus and the board
24. PT1 P1 uses a 5 row connector but the two outside rows D amp Z are all no connects The P2 pinout is in Table 18 Outside rows D amp Z route the JN4 I O from optional PMC Site 1 to the backplane as shown The optional PO connector not populated on the off the shelf CPU 71 16 is shown in Table 19 Each pin on row F is connected to Ground PO Signals in red font are not in compliance with Vita 31 1 Table 17 P1 VMEbus connector Pin Pin Pin number number number BBSY D08 BCLR D09 ACFAIL D10 BGOIN D11 BGOOUT D12 BG1IN D13 BGIOUT D14 BG2IN D15 BG2OUT GND BG3IN SYSFAIL BG3OUT BERR BRO SYSRESET BR1 LWORD BR2 AM5 BR3 A23 AMO A22 AMI A21 AM2 A20 AM3 A19 GND A18 NC A17 IACKOUT NC A16 AM4 GND A15 A07 IRQ7 A14 A06 IRQ6 A13 A05 IRQ5 A12 A04 IRQ4 A11 A03 IRQ3 A10 A02 IRQ2 A09 A01 IRQ1 A08 12 VDC 5 VDC Standby 12 VDC 5 VDC 5 VDC 5 VDC DPD6MAN101 29 CPU 71 16 User Manual EUROTECH Table 18 P2 VMEbus connector USB_2N COM2 TxD USB_2P COM2 RxD USBVBUSO COM RTS USB 3N COM2 CTS USB 3P COM2 DTR USBVBUS2 COM2 DSR USB 4N COM2 USB 4P COM RI ALT BAT JN4 28 LAN2DDP Speaker Output LANSTDP 5 VDC LANSRDP LAN2RDP LANSTDN LAN2RDN LANSRDN LAN2CDP GND JN4 30 LAN2TDP LPT1 STROBE LAN2TDN LPT1 AUTOFD LAN2DDN LPT1 PDO LAN2CDN LPT1 ERR GND LPT1 PD1 LANSDDP LPT1 INI
25. T LANSCDP LPT1 PD2 LANSDDN LPT1 SLCTIN LAN3CDN LPT1 PD3 TxN LPT1 PD4 SATAO TxP LPT1 PD6 SATAO_RXN LPT1 PD6 SATAO RxP LPT1 PD7 SATA1 TxN LPT1 ACK SATA1 TxP LPT1 BUSY SATA1_RxN LPT1 PE SATA1_RxP LPT1 SLCT Table 19 VMEbus connector Row C Row D Row E Signal Signal Signal NC NC VGA Red SATA2 TxN SATA2 TxP Opt LPa DA Opt LPa DA GND VGA Green LPa_DC LPa_DC Opt LPa_DB Opt LPa_DB GND VGA Blue LPa_DD LPa_DD Opt LPb_DA Opt LPb_DA GND VGA hsync LPb_DC LPb_DC Opt LPb_DB Opt LPb_DB GND VGA vsync LPb_DD LPb_DD NC NC VGA 12C data SATA2_RxN SATA2_RxP PIO5 PIO4 PIOS PIO2 PIO1 PIO10 PIO9 PIO8 PIO7 PIO6 PIO15 PIO14 PIO13 PIO12 PIO11 PIO20 PIO19 PIO18 PIO17 PIO16 PIO25 PIO24 PIO23 PIO22 PIO21 PIO30 PIO29 PIO28 PIO27 PIO26 PIO35 PIO34 PIO33 PIO32 1 040 9 PIO38 PIO37 PIO36 PIO45 PIO44 PIO43 042 PIO41 PIO50 PIO49 PIO48 PIO47 PIO46 PIO55 PIO54 PIO53 PIO52 PIO51 PIO60 PIO59 PIO58 PIO57 PIO56 VGA 12C clock PIO64 PIO63 PIO62 PIO61 The Italicized signals on pins A02 05 and B02 B05 were corrected on the second revision of the DPD6 PWB D010 6097 002A DPD6MAN101 System Specifications 3 EUROTECH 7 S
26. The first site which also supports a x8 XMC interface is populated and supported on the CPU 71 16 as standard and there is an opening in the front panel for it The second PMC site conflicts with the two USB ports the COM1 port and the Ethernet port at the front panel The Idt Tsi381 chip bridges one PCI Express Rev 2 lane 2 5 Gbps to the 32 bit 33 MHz The PCI bus is shared between the Universe IID and the two optional PMC sites The Universe limits the PCI bus s frequency to 33 MHz Vio is fixed at 5 VDC again to be compatible with the Universe IID 5 1 2 The Tsi381 supports a signalling bus of 5 0 VDC as the PCI bus is shared with the 5 VDC only Universe IID 5 1 3 JN4 I O Expansion The first PMC site s I O may be routed through the J14 JN4 PMC functionality to the optional PO backplane connector The second site s I O may be routed through J24 to the P2 backplane connector 5 1 4 Mechanical Drawing The drawing below shows how a PMC card will sit on the CPU 71 16 Space between the PMC card and the CPU 71 16 s printed circuit board PCB is 0 370 Wip 9 0 T 5 1 5 PMC Interrupts The PMC sites were designed in compliance with IEEE Standard P1386 Draft 2 3 Please check this specification for the pinout The first PMC site s interrupts are offset by one so that the board s INTA i is routed to INTB on the Tsi381 INTB on the board goes to INTC on the Tsi381 etc The 2 site in the
27. Wire the product correctly Failure to wire the product correctly can result in malfunction or fire Read this manual and wire the product correctly 6 DPD6MAN101 E EUROTECH Important User Information Use antistatic precautions This product comprises electronic parts that are highly susceptible to static electricity Static electricity can cause the product to malfunction Take care not to touch any of the terminals connectors ICs or other parts with the hands Do not use a malfunctioning product Stop using the product if you believe it is malfunctioning Continuing to use a malfunctioning product can cause the malfunction to spread to other products and can cause short circuits or fire 1 2 Life Support Policy Eurotech products are not authorized for use as critical components in life support devices or systems without the express written approval of Eurotech 1 3 Warranty For warranty terms and conditions users should contact their local Eurotech Sales Office See Eurotech Worldwide Presence page 55 for full contact details 1 4 RoHS This device including all its components subassemblies and the consumable materials that are an integral part of the product has been manufactured in compliance with the European directive 2002 95 EC known as the RoHS directive Restrictions on the use of certain Hazardous Substances This directive targets the reduction of certain hazardous substances previously used in electrica
28. able which also known as Data Execute Prevention DEP Disabled disable Enabled Default enable Set execute BIST Built In Self Test at reset time Disabled Default disable Enabled enable Intel R Virtualization Technology VMM can use virtualization functions Disabled disable Enabled Default enable Intel R Streamer Prefetcher Enable Stream Prefetcher Disabled disable Enabled Default enable Intel R Spatial Prefetcher Enable Spatial Prefetcher Disabled disable Enabled Default enable DPD6MAN101 3 EUROTECH Table 7 Intel Speed Step R BIOS Setup 8 2 3 2 Processor Power Management Processor Power Management Setting O Set processor performance state P state Disabled disable Enabled Default enable Boot Performance mode Set performance mode for boot before handover to OS Max Performance Default Max Battery Auto Turbo Mode Enable processor Turbo mode and EMTTM Disabled disable Enabled Default enable Turbo Mode Power Limit Lock Set Turbo setting lock TURBO POWER LIMIT MSR is locked by enabling while unlocked by resetting Disabled disable Enabled Default enable Long Power Limit Set Long Time Limit Power Limit 1 of Turbo mode by watt Value setting range is from 0 to fuse value Setting 0 means fuse value Cannot set value exceed fuse TDP value Default 0 L
29. ation of Quiet Boot Disabled Enabled Default Wake on PCH LAN 5 Set wake on PCH LAN Disabled Enabled Default ASF Support 5 Set alert specification form Disabled Enabled Default 15 possible to set by changing PCH Internal LAN to Enable 8 2 10 LPC Configuration Table 22 L LPC Configuration Setting Setting Contents Onboard UART1 Onboard UART1 address control Disabled Enabled Default UART1 Base Address UART1 base address control SF8 Default 2F8 8 2E8 UART1 IRQ UARTI interrupt control IRQ 3 IRQ 4 Default Onboard CIR UART2 Onboard CIR address control Disabled Enabled Default UART2 Base Address UART2 base address control 3F8 2F8 Default 8 2E8 UART2 IRQ UART2 interrupt control IRQ 3 Default IRQ 4 16 possible to set by changing Onboard UART1 to Enable 17 possible to set by changing Onboard CIR UART2 to Enable DPD6MAN101 E EUROTECH BIOS Setup 8 2 11 SMBIOS Event Log Table 44 SMBIOS Event Log Setting Setting Contents Event Log Enable disable of event log Disabled Enabled Default View SMBIOS event log Display of SMBIOS event log Displays log with Enter Mark SMBIOS events as read Marking SMBIOS event as read Marked SMBIOS event is not displayed Clears SMBIOS events Clearing SMBIOS event 8 2 12 ME Configuration Table
30. cautions must be observed during all phases of operation service and repair of this equipment Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design manufacture and intended use of the equipment Eurotech assumes no liability for the customer s failure to comply with these requirements The safety precautions listed below represent warnings of certain dangers of which Eurotech is aware You as the user of the product should follow these warnings and all other safety precautions necessary for the safe operation of the equipment in your operating environment Alerts that can be found throughout this manual The following alerts are used within this manual and indicate potentially dangerous situations Danger electrical shock hazard Information regarding potential electrical shock hazards Personal injury or death could occur Also damage to the system connected peripheral devices or software could occur if the warnings are not carefully followed Appropriate safety precautions should always be used these should meet the requirements set out for the environment that the equipment will be deployed in Warning Information regarding potential hazards Personal injury or death could occur Also damage to the system connected peripheral devices or software could occur if the warnings are not carefully followed Appropriate safety precautions should always be used
31. d disable Enabled Default enable BIOS Level USB Select USB support to reduce boot time Disabled disable Enabled Default enable USB Legacy Select USB SMM support to use mouse keyboard mass storage by legacy OS like DOS Disabled disable Enabled Default enable Console Redirection Set to use universal console redirection Disabled Default disable Enabled enable UEFI Boot Enable UEFI Boot Disabled disable Enabled Default enable Legacy Boot Enable Legacy Boot Disabled disable Enabled Default enable Boot in Legacy Video Mode Set to boot Legacy Video mode Disabled Default disable Enabled enable Load OPROM Select all OPROM load or On Demand load according to Boot device All All OPROM load On Demand Default On Demand load 8 1 5 Error Manager Setting Contents View Error Manager Log Show Error Log by Enter Clear Error Manager Log Clear Error Log DPD6MAN101 E EUROTECH BIOS Setup 8 2 Advanced Menu 8 2 1 Select Language Table 4 Select Language Setting Setting Contents Select Language Language can be selected English Japanese French Korean Chinese 8 2 2 ACPI Configuration Table 5 ACPI Configuration Setting Setting Contents FACP RTC S4 Flag Value Set RTC S4 flag value of FACP table Only valid at ACPI Disabled disable Enabled Default enable APIC IO APIC Mo
32. de Enable APIC mode Valid for WindowsXP only Disabled disable Enable Default enable ALS Support Set ALS support Only valid at ACPI Legacy Default ALS support by IGD INT10 ACPI ALS support by ALS driver EMA Support Set to use EMA device in ACPI environment Only valid at ACPI Disabled Default disable Enabled enable MEF Support Set to support Mobile East Fork in ACPI environment Only valid at ACPI Disabled Default disable Enabled enable Enabled PTID Enable PTID Disabled Default disable Enabled enable FACP PM Timer Flag Value Set PM timer flag value of FACP table Only valid at ACPI Disabled Default disable Enabled enable DPD6MAN101 35 CPU 71 16 User Manual E EUROTECH 8 2 3 Processor Configuration 8 2 3 1 Processor Power Management Table 6 Processor Configuration Setting Contents Active Processor Cores Set number of cores to be active All Default active all cores Number different for each processor core number Intel R HT Technology Enable Hyper Threading technology When this is disabled one thread will be active per active core Disabled disable Enabled Default enable CPU Flex Ratio Override Set CPU Flex Ratio Override Disabled Default disable Enabled enable Set processor dynamic FSB switching BUS GV Disabled disable Enabled Default enable Enable Execute Dis
33. e 00000000 thermal monitor selected by THRM_MONI_SEL 0 to 255 C 1 C LSB 3 2 Memory CPU 71 16 memory is shown below 3 2 1 Main Memory The main memory of CPU 71 16 is DDR3 1333 SDRAM 4 GB capacity comes standard off the shelf but optional versions with 1GB 2GB or 8GB can be specially ordered It supports ECC automatically corrects 1 bit error and also detects 2 bit errors 3 2 2 Boot ROM This is a SPI FLASH memory directly mounted on CPU 71 16 with 8MB of capacity It stores UEFI functionally the BIOS code and configuration data DPD6MAN101 13 CPU 71 16 User Manual E EUROTECH 3 2 3 External Memory Interface CPU 71 16 has the following 2 external memory interfaces for mass storage devices and boot options Serial ATA CPU 71 16 has two 6 Gb s SATA ports SATAO and SATA1 accessible at the front panel which can boot from mass storage devices through cable connections SATA2 is a 3 Gb s port and it is routed to the optional PO connector to the backplane SATAS is also a 3 Gb s port and it is routed to a CFast connector on board that facilitates self contained OS booting USB CPU 71 16 has 5 USB ports accessible at the front panel which can boot from USB floppy or USB CD DVD ROM or a USB flash drive 3 3 Communication Specifications CPU 71 16 has the following communication specifications with external devices 3 3 1 Graphics The CPU 71 16 has two graphics ports from the QM67 P
34. es are high 1 Important GPO2 is routed to the Universe IID VMEbus interface device and will generate a reset to both the CPU 71 16 s CPU and to the VMEbus as well if it is driven low Dynatem has designed a Watch Dog Timer WDT into the power management sequence CPLD that can use to reset the entire system if it times out Users who are interested in implementing this feature should contact Dynatem for assistance 3 4 2 Analog VGA CPU 71 16 has an Analog VGA port available at front panel connector J26 3 4 3 Suspend Status CPU 71 16 routes the SUS STAT SUS S3 SUS 548 505 558 signals to LEDs See Section 6 2 for LED locations and descriptions DPD6MAN101 17 CPU 71 16 User Manual EUROTECH 9 DPD6MAN101 9 EUROTECH Mechanical Specifications 4 Mechanical Specifications CPU 71 16 is compliant with the VMEbus amp VME64 Specification Mechanical specifications are shown in Table 16 Table 15 Mechanical Specifications Characteristic Contents PC Board Form Factor 233 35mm high x 153 67mm wide x 2 31mm thick Backplane Connectors 96 pin DIN 603 2 IEC CO96Mx xxx connectors in compliance with the VME64 Draft Specification Weight 680g Including heat sink and front panel 4 1 External Dimension External dimensions of CPU 71 16 are shown in Fig 2 TEST DIMENSION 169 93 04 6 690 0015 3 535 6 0 Unit mm inches 5 Height of the mounted components o
35. et by RSDT point HPET table Disabled Enabled Default HPET Memory Map BAR Select HPET memory map BAR address FED00000 Default FED01000 FED02000 FED03000 Set the state which will be moved when power is back after G3 state State S5 Default State SO Set Native PCI Express Disabled Default Enabled 8 2 8 1 SB PCI Express Configuration Table 16 Setting PCI Express Root Port Clock Gating SB PCI Express Configuration Setting Contents Set PCI Express Root Port Clock Gating Disabled Enabled Default DMI Link ASPM Control Set DMI link ASPM Active State Power Management Disabled Default LOS L1 LOS or L1 Auto DMI Link Extended Sync Control Control of DMI link extension synchronous Disabled Default Enabled DMI Link Extended Sync Control Control of DMI link extension synchronous Disabled Default Enabled PCle USB Glitch W A Work Around to abnormal signal of PCle USB by fault device connected to the behind of PCIE PEG port Disabled Default Enabled Set PEG ASPM Disabled Default 105 Li LOs and L1 Auto De emphasis Control DPD6MAN101 45 Set PEG De emphasis value 6 dB Default 3 5 dB BIOS Setup CPU 71 16 User Manual E EUROTECH Setting Contents Gen3 Equalization Implementation of PEG Gen3 equalization procedure Disabled Enabled Default Gen3 Root Port P
36. ic memory size Invalid when external graphics is connected 128MB Default 256MB Max Render Standby Select IGD Render Standby property Disabled Enabled Default IGD Thermal Control Set IGD thermal control Disabled Default Enabled GT Turbo Mode Control Set GT Turbo Mode control Disabled Default Enabled Select video device activated during POST Invalid when external graphics is connected VBIOS Default Default EFP LFP EFP3 EFP2 2 IGD LCD Panel Type Select video device activated during POST Invalid when external graphics is connected VBIOS Default Default 640x480 LVDS Color Panel 800x600 LVDS Color Panel 1024x768 LVDS Color Panel 1280x1024 LVDS Color Panel 1400x1050 LVDS Color Panel Reduced Blanking 1400x1050 LVDS Color Panel 1600x1200 LVDS Color Panel 1200x768 LVDS Color Panel 1600x1050 LVDS Color Panel 1920x1200 LVDS Color Panel Reserved 11 Reserved 12 Reserved 13 Reserved 14 1280x800 LVDS Color Panel Reserved 15 1280x600 LVDS Color Panel Reserved 16 IGD Panel Scaling Set IGD Panel Scaling Auto Default Force Scaling off IGD Portable Mode Set IGD Portable Mode Auto Default Disabled Enabled Inverter Connection Selection of inverter connection Internal inverter from GMCH PWM or GMB Default External inverter from
37. l and electronic equipment EEE 1 5 Technical Assistance If you have any technical questions cannot isolate a problem with your device or have any enquiry about repair and returns policies contact your local Eurotech Technical Support Team For the CPU 71 16 your first point of contact for technical help should be Dynatem at 949 855 3235 or tech dynatem com See Eurotech Worldwide Presence page 55 for full contact details Transportation When transporting any module or system for any reason it should be packed using anti static material and placed in a sturdy box with enough packing material to adequately cushion it Warning Any product returned to Eurotech that is damaged due to inappropriate packaging will not be covered by the warranty 1 6 Conventions The following table describes the conventions for signal names used in this document Convention Explanation Digital ground plane Active low signal Positive signal in differential pair Negative signal in differential pair No connection Use is reserved to Eurotech DPD6MAN101 7 CPU 71 16 User Manual EUROTECH 9 DPD6MAN101 e EUROTECH Summary 2 Summary CPU 71 16 is a VMEbus Single Board Computer SBC Module based on Intel Core i7 mobile processor It is compatible with VME64 ANSI VITA 1 1994 and VME64x VITA 1 1 1997 standards which are backwards compatible to the original VMEbus Specification ANSI IEEE
38. led disable Enabled Default enable Interface Combination 3 Set operating mode of SATA controller IDE AHCI Default RAID Serial ATA port X Show Device ID connected to Port X When device is not connected a message Not Install is displayed Hot Plug Enable hot plug Note Hardware support required Disabled Default disable Enabled enable External Port 3 Set port as internal or external Disabled Default disable Enabled enable Port Topology 3 Set connection mode of SATA 6Gb s port Only port Oand port 1 support SATA 6Gb s DirectConnect CableUp Default SATA Device 3 Solid State Drive should be selected only when SSD is connected to SATA port Disk Drive Default Solid State Drive 13 possible to set by changing SATA Device to Enable DPD6MAN101 59 CPU 71 16 User Manual E EUROTECH 8 2 6 Memory Configuration Table 10 Memory Configuration Setting Setting Contents Memory Frequency Limiter Select maximum memory frequency MHz Auto Default 1067 1333 1600 1867 2133 Maximum value of TOLUD If Dynamic is selected TOLUD is set automatically based on maximum MMIO of installed graphic controller Dynamic Default 1 GB 1 25 GB 1 5 GB 1 75 GB 2 GB 2 25 GB 2 5 GB 2 75 GB GB 3 25 3 5 GB Set NMode support system Auto Default 1N mode
39. llocated is shown in Table 13 If the line s jumper is closed that GPI line will be connected to its corresponding GPO line For example if JP5 is shunted closed the will be routed to GP12 Table 13 GPI control register Intel QM67connecting pin Supporting register Bit Jumper 68 LVL3 bit 4 69 GP LVL3 bit 5 GPIO70 GP LVL3 bit 6 GPIO71 GP LVL3 bit 7 High logic level 1 is read from the register while High level voltage is applied to the input pin and Low logic level 0 is read from the register while Low level voltage is applied to the input pin Please refer to 7 2 Electrical Specifications on page 28 for electrical specifications 3 4 1 2 GPO CPU 71 16 is equipped with 4 general outputs Status can be changed by writing in the Intel QM67 PCH register GPO is set as the output pin in BIOS The register where GPO is allocated is shown in Table 14 Table 14 GPO control register Initial setting logic level Intel QM67connecting in Signal Supporting register Bit GPIO8 GP LVL bit 8 GPIO15 GP LVL bit 15 GPIO24 GP_LVL bit 24 GPIO28 GP LVL bit 28 It outputs High level voltage when High logic level 1 is written in the register while it outputs Low level voltage when Low logic level 0 is written in it Please refer to 7 2 Electrical Specifications on page 28 for electrical specifications The default output levels on these lin
40. ly setting is executed Center Down Default New SSC spread percent 0 01 Set clock spread spectrum at 0 01 Set spectrum deviation from base clock Possible range is limited at max supported SSC The change is not applicable until Apply setting is executed Preset value 0 50 0 5 Default 0 DPD6MAN101 5 CPU 71 16 User Manual EUROTECH 8 2 15 Intel Rapid Start Technology Table 48 Intel Rapid Start Technology Setting Setting Contents iRST Support Set iRST Disabled Default Enabled Entry on 53 RTC wake 29 Entry on S3 RTC wake Disabled Enabled Default Enabling RTC boot timer when enter to S3 Immediately 1 minute 2minutes 5minutes 10minutes Default 15minutes 30minutes 1hour 2hours 20 Entry after Enter S3 on Critical Battery Enable iRTS when critical battery event occur during S3 threshold Threshold Disabled Enabled Default iRST PARTITION STATUS Set critical battery threshold value of iRST Preset value 1 100 Default 15 20 possible to set by changing Onboard CIR UART2 to Enable 8 3 Security Menu Table 49 Security Menu Setting Setting Contents Set Supervisor Password Set or clearing supervisor account password Supervisor Hint String Feeding supervisor hint string with enter key Min password length Set password with 1 20 characters 8 4 Boot Menu Refe
41. n the solder side does not exceed 70 mils Fig 2 External dimensions of CPU 71 16 DPD6MAN101 19 CPU 71 16 User Manual EUROTECH 4 2 Front Panel The DPD6 s front panel uses a Rittal Part 3685 590 Ejector handle Side View 4 Fig 3 Front panel mechanical drawing 20 DPD6MAN101 EUROTECH Mechanical Specifications 4 3 Heat Sink The CPU 71 16 comes with a heat sink The heat sink mainly comes in contact with the CPU the PCH chipset and the 82571EB dual Ethernet Controller that routes to the backplane These are the on board chips with exposed dies The fins aid in airflow cooled VMEbus chasses as fans must force air from top to bottom or vice versa The fins will channel the air and add to the surface area that is exposed to forced air The units in the mechanical drawing below are in mm Table 16 Required heat resistance for cooling system Processor Type Heat resistance of cooling system Intel Core i7 2610UE Below 2 35 C W 32 862 1 299 404 62 622 121 147 122 25 DPD6MAN101 3 CPU 71 16 User Manual EUROTECH 23 DPD6MAN101 E EUROTECH Cautions for Designing a Carrier Board 5 PMC Support and Power Cycling 5 1 Optional PMC Module Support 5 1 1 General Versions of the CPU 71 16 that support both PMC sites must be special ordered because the 2 port conflicts mechanically with some front panel connectors
42. nel 1 Ethernet Port Not Used Not Used 82571EB Dual Ethernet Controller where the ports are routed to the backplane 3 3 3 USB CPU 71 16 provides two USB 2 0 ports accessible from the front panel via two A type connectors Three more USB 2 0 ports are routed to the backplane via the P2 connector 3 3 4 Serial ATA CPU 71 16 provides 4 ports of Serial ATA in total two ports SATA0 1 of Serial ATA 3 maximum transfer rate 6Gb s that are both routed to the backplane through the P2 connector and two ports SATA2 3 of Serial ATA 2 maximum transfer rate 3Gb s routed to an optional PO backplane connector and a CFast connector respectively 3 3 5 Ethernet CPU 71 16 has an Ethernet port compliant with the 10 100 1000Base T standard An 82571EB provides two 10 100Base T ports routed to the P2 backplane connector or routed to the optional PO backplane connector set at the factory at customer s request 3 3 6 SMBus System Management Bus CPU 71 16 has an multiplexer at the SMBus interface to carrier board It also has a SMBus port compliant with the SMBus 2 0 standard The SMBus address map is shown in Table 10 Table 10 SMBus Address Map Device Address Main Memory SPD channel A 1010 000b Main memory SPD channel B 1010 001b 1 C multiplexer PCA9544APW 1110 000b multiplexer channel map is shown in Table 11 Table 11 IPC multiplexer channel map Device Address Unused
43. ong Power Limit Time Set time window Power Limit 1 Time of Long Time by second Value setting range is from 0 to 56 Time window keeping TDP value is displayed Setting 0 means fuse value Default 28 Short Power Limit 7 Set Short Time Limit Power Limit 2 of Turbo mode by watt Value setting range is from 0 to fuse Setting 0 means fuse value Cannot set value exceed fuse TDP value Default 0 IA Current Limit Set IA current limit Value is represented at maximum instantaneous current value and 1 8 ampere unit Default 896 IGFX Current Limit 7 Set IGFX current limit Value is represented at maximum instantaneous current value and 1 8 ampere unit Default 368 Energy Efficient Enable Set CPU Energy Efficient P States Disabled disable Enabled Default enable Configure TDP Boot Mode Select Configure TDP Boot Mode Skip all settings by selecting Disable while dynamic cTDP operates Normal Down Default Disable 11 possible to set by changing Turbo Mode to Enable DPD6MAN101 37 CPU 71 16 User Manual Setting Lock TDP setting EUROTECH Contents Lock of TDP MSR_CONFIG_TDP_CONTROL Disabled Default disable Enabled enable TDP Custom Setting Set custom TDP Disabled Default disable Enabled enable C States Enabling standby state power saving states C States of processo
44. ort and Power 2 nine rene eric eine ninni 23 5 1 Optional PMC Module 23 DE NNCTIII I 23 9 12 MO E eL iM M ali ao 23 SINE VO EXDANSION rm 23 5 1 4 Mechanical Drawing didi tdt dinde te tarde enc dea a LA a a Ro 23 5 1 5 TRterT pls cR e ee Ee LEM 23 DPD6MAN101 3 CPU 71 16 User Manual E EUROTECH 5 2 do git de Rates ag ne ei sl 24 6 Connectors Jumpers arid dee Pa sienne entres 25 6 1 CPU 71 16 Placement Plans eee 25 6 2 On board Jumpers and 26 6 2 1 User and Factory Option Jumpers 26 6 2 1 User and Factory Option Jumpers SPX siens 26 6 22 Onboard octet co ot ested oneri an Lei uS 26 6 3 Connector Functionality and Pinouts sise 27 6 3 1 SPI ROM writing connector iris 27 6 3 2 CN3 CPLD data writing connector ie 27 6 3 3 J29 LPC Off Board 27 6 3 4 J1 Front Panel Gigabit Ethernet Port eene nnne 27 6 3 5 J27 Front Panel COMI Port Connector nennen enne nnne 28 6 3 6 J26 Front Panel VGA Connector eene nennen nnne nennen rennen 28 6 3 7 USB1 amp
45. ort it eurotech com E mail tsupport advanet jp Web www eurotech com Web www advanet co jp To find your nearest contact refer to www eurotech com contacts United Kingdom India EUROTECH EUROTECH Tel 44 0 1223 403410 Tel 91 80 43 35 71 17 Fax 44 0 1223 410457 E mail sales in eurotech com E mail sales uk eurotech com E mail support in eurotech com E mail support uk eurotech com Web www eurotech com Web www eurotech com France EUROTECH Tel 33 04 72 89 00 90 Fax 33 04 78 70 08 24 E mail sales fr eurotech com E mail support fr eurotech com Web www eurotech com Finland EUROTECH Tel 358 9 477 888 0 Fax 358 9 477 888 99 E mail sales fi eurotech com E mail support fi eurotech com Web www eurotech com e EU ROTECH www eurotech com EUROTECH HEADQUARTERS Via Fratelli Solari 3 a 33020 Amaro Udine ITALY Phone 39 0433 485 411 Fax 39 0433 485 499 For full contact details go to www eurotech com contacts
46. p the PMC Sites PCI Express Device A000 0000h BFFF_FFFFh Chipset BIOS etc E000 0000h FFFF_FFFFh Higher 2 GB of DRAM on Cards w 4 GB DRAM 1_0000_0000h 1 7FFF FFFFh or or Higher 6 GB of DRAM on Cards w 8 GB DRAM 1 0000 0000h 2 FFFFh 3 1 5 CPLD Internal Register CPLD Internal Register is shown in Table 3 Table 3 CPLD Internal Register map Register Name Address LED Control Register Status Register Thermal Monitor Select Register Thermal Monitor Register A CPLD is mounted as internal control logic and for power sequencing The CPLD s internal register is accessible by the LPC bus of 3 3 8 LPC on page 16 Its base address is 0280h The register is configured for 8 bits Both Read shown below as R and Write shown below as W operations are performed as 8 bit transfers R W Readand Write RO Read only WO Write only 3 1 5 1 LED Control Register offset 0000h This register controls LED on CPU 71 16 Table 4 LED Control Register Meaning Initial Value Access RSVD RSVD LED_EN 1 RED GRN_LED control enabled 0 RED GRN_LED control disabled RED LED 1 LED RED On 0 LED RED Off LED 1 LED GRN On 0 LED GRN Off X LED EN 0 RED LED turns on during assertion of the Platform reset that is output by PCH while GRN LED turns on during de assertion Please refer to 3 5 LED on page 18 for further details 12
47. r Disabled disable Enabled Default enable Extend C States Enable P States change combined with C States status Disabled disable Enabled Default enable C3 State 7 Enable Power Saving C3 State of processor Disabled disable Enabled Default enable C6 State 7 Enable Power Saving C6 State of processor Disabled disable Enabled Default enable C7 State 7 Enable Power Saving C7 State of processor Disabled disable Enabled Default enable C7s State Enable Power Saving C7s State of processor BIOS reports C7s instead of C7 by enabling this Disabled Default disable Enabled enable C7r State 7 Idling power consumption is reduced by enabling C7r State Disabled disable Enabled Default enable C State Auto Demotion 7 Set about C State auto demotion Disabled C1 and C3 Cpu C1C3 UnDemotion Enable Enable processor C1C3 undemotion Disabled disable Enabled Default enable 12 possible to set by changing Extend C States to Enable DPD6MAN101 E EUROTECH BIOS Setup 8 2 4 Peripheral Configuration Table 8 Peripheral Configuration Setting Setting Contents Spread Spectrum Clock Enable Spread Spectrum Clock Disabled Default disable Enabled enable 8 2 5 HDD Configuration Table 9 HDD Configuration Setting Setting Contents SATA Device Set SATA device Disab
48. r Table 50 about Boot priority order Table 50 Boot Menu Setting Setting Contents Boot Priority Order Selection Boot priority setting procedure The default is as follows 1 USB HDD 2 USB CD 3 USB FDD 4 ATAPI CD 5 ATA HDDO 6 ATA HDD1 7 ATA HDD2 8 ATA HDD3 9 Other HDD 10 PCI LAN IBA GE Slot 00 v1360 11 Internal Shell 52 DPD6MAN101 E EUROTECH BIOS Setup 8 5 Exit Menu Table 51 Exit Menu Setting Setting Contents Exit Saving Changes Exits the setup menu with saving all the changes same as F10 then resets the system automatically Exit Discarding Changes Exits the setup menu without saving the change same as Esc then resets the system automatically Load Setup Defaults Loads the setup default value same as F9 Load Optimized Defaults Loads optimized defaults by boot time and system performance DPD6MAN101 53 Eurotech Worldwide Presence 3 EUROTECH AMERICAS USA DYNATEM Tel 1 949 855 3235 Fax 1 949 770 3481 E mail sales dynatem com E mail tech dynatem com Web www dynatem com EUROTECH Toll free 1 888 941 2224 Tel Fax E mail E mail Web 1 301 490 4007 1 301 490 4582 sales us eurotech com support us eurotech com www eurotech inc com EUROPE ASIA Italy Japan EUROTECH ADVANET Tel 39 0433 485 411 Tel 81 86 245 2861 Fax 39 0433 485 499 Fax 81 86 245 2860 E mail sales it eurotech com E mail sales advanet jp E mail supp
49. reset Set Gen3 Equalization preset value for root port 1 11 Default 8 Gen3 End Port Preset Set Gen3 equalization preset value for end port 0 10 Default 7 PEG Sample Calibrate Set PEG sample calibrate Disabled Enabled Auto Default PEG Gen3 Equalization Phase2 Implementation of PEG Gen3 equalization Phase2 Disabled Default Enabled 8 2 8 2 PCI Express Port 1 Configuration PCle PCI Bridge Table 17 Express Port 1 Configuration PCle PCI Bridge Setting Setting Contents PCI Express Port 1 Set PCI Express Root Port When disable Port1 PCI will be also disabled since PCI is connected from Port1 Disabled Enabled Default PCle Speed Set PCI Express link speed Gen1 Default Gen2 Set PCI Express ASPM Active State Power Management Disabled Default LOs LOs and L1 Hot Plug 74 Set hot plug of PCI Express Disabled Default Enabled Completion Timeout Set PCI Express Completion Time out default Default 16 55ms 65 210ms 260 900ms 1 3P5s PME Interrupt Set PME interrupt of PCI Express Disabled Default Enabled PME SCI Set PME SCI of PCI Express Disabled Enabled Default 14 possible to set by changing PCI Express Port 1 to Enable DPD6MAN101 E EUROTECH BIOS Setup 8 2 8 3 PCI Express Port 3 5 Configuration Table 18 PCI Express Port 3 5 Configuration
50. rt routed to the P2 backplane connector 3 USB ports are routed to the P2 connector 2 SATA ports are routed to the P2 connector 1 port of SATA at 3 0 Gb s interface at optional CFast connector 1 port of SATA at 3 0 Gb s interface at optional PO VMEbus backplane connector The front panel SVGA port may be optionally routed to the PO connector for use in rugged systems with no front panel I O 1 PMC site with a 32 bit 33 MHz PCI with XMC connector for a x8 PCI Express interface with I O accessible from the front panel in standard configuration PN4 I O is routed to PO 2nd optional PMC site with 32 bit 33 MHz PCI I O is routed to rows d amp z of P2 Universe IID for a VMEbus interface Various OSs including Windows 7 VxWorks and Linux are supported RoHS compliant DPD6MAN101 CPU 71 16 User Manual E EUROTECH 2 2 Block Diagram CPU 71 16 Block Diagram is shown in Fig 1 Front Panel I O Puo 10 100 1000 BaseT 0 SVGA Intel Core i7 Intel QM67 CPU Sandy bridge ECC SMSC Paws 2A91C14 EE Universe 2x Gb PMC Ethernet PNA to P2 VITA 31 1 COM2 LPT A e zx Storage Site 2 VO JN4 5 E PMC XMC Site 1 YO JN4 Backplane VO VO VME P1 and P2 vme J Fig 1 Block Diagram DPD6MAN101 EUROTECH Mechanical Specifications 3 Hardware Specifications 3 1 Processor
51. rting to Disable 5 DPD6MAN101 E EUROTECH BIOS Setup Setting Contents PCH Temp Read Enable Set PCH temperature read Disabled Enabled Default PCH Temp Read Enable Set PCH temperature read Disabled Enabled Default CPU Energy Read Enable Set CPU energy read Disabled Enabled Default CPU Temp Read Enable Set CPU temperature read Disabled Enabled Default CPU2 Temp Read Enable Set CPU 2 temperature read Disabled Enabled Default TS On DIMM Enable 9 Set DIMM temperature read Disabled Default Enabled Alert Enable Lock 9 Set lock all alert activation Disabled Default Enabled ME SMBus Thermal Reporting Set SMBus thermal reporting Disabled Default Enabled 19 possible to set by changing Thermal Sensor Device Enable to Enable 8 2 14 ICC Configuration 8 2 14 1 DIV 2S A setup of the clock for BCLK DMI PEG PCle PCI33 SATA and USB3 Table 47 DIV 2S Setting Setting Contents New frequency 10KHz Set frequency in unit of 10KHz The frequency value will be rounded automatically to closest valid value Accepted range is limited by maximum minimum frequency The change is not applicable until Apply setting is executed Preset value 3850 3 85KHz 40000 40KHz Default 10000 10 2 New SSC mode Spread spectrum clock mode Set how to spread spectrum from base clock The change is not applicable until App
52. th 18 bit Default 24 bit DPD6MAN101 CPU 71 16 User Manual 8 2 7 4 PEG Port Configuration 9 EUROTECH Table 14 Port Configuration Setting Setting PEG 0 Gen X Contents Set PEGO B0 D1 F0 link speed Auto Default Geni Gen2 Gen3 PEG 1 Gen X Set B0 D1 F1 link speed PEG 2 Gen X Set PEG2 B0 D1 F2 link speed PEG 3 Gen X Set PEG3 B0 D6 F0 link speed Always Enable PEG Enable always PEG Disabled Default Enabled Set PEG ASPM Disabled Default LOs L1 LOs and 11 Auto De emphasis Control Set PEG De emphasis value 6 dB Default 3 5 dB Gen3 Equalization Implementation of PEG Gen3 equalization procedure Disabled Enabled Default Gen3 Root Port Preset Set Gen3 Equalization preset value for root port 1 11 Default 8 Gen3 End Port Preset Set Gen3 equalization preset value for end port 0 10 Default 7 PEG Sample Calibrate Set PEG sample calibrate Disabled Enabled Auto Default PEG Gen3 Equalization Phase2 Set PEG Gen3 equalization phase2 Disabled Default Enabled 4 DPD6MAN101 3 EUROTECH 8 2 8 South Bridge Configuration Table 15 Setting South Bridge Configuration Setting Contents Set HPET High Precision Event Timer When enabled corresponding enable bit will be s
53. ure or malfunction Keep the product away from flame humidity and direct sunlight Do not use or store the product in any of the following locations as this could result in product failure Places where there is fire Locations high in humidity or exposed to rain Locations exposed to direct sunlight Dusty or dirty locations Locations containing excessive water or chemical vapors Install the product in well ventilated locations Install the product in well ventilated locations to efficiently disperse heat generated by the product Remove the power plug from the receptacle when not using the product Turn off the main switch and remove the power plug from the receptacle when not using the product or when there is the risk of lightning strike Use the device within rated parameters Be sure to use the product within the ratings specified in this manual Failure to do so may result in malfunction Use care when cleaning the product If the product becomes dirty wipe it with a dry soft cloth A thinned neutral cleaner may be used if the product is particularly dirty Do not use benzene thinners or other solvents under any circumstances Ground the product in order to prevent electrocution Be sure to ground the product by connecting it to a 3 pole AC receptacle or by using an AC receptacle having a grounding terminal Dispose of the product properly Use appropriate methods for handling industrial wastes when disposing of this product
54. ystem Specifications 7 1 Power Supply Power to the CPU 71 16 is supplied through P1 amp P2 VMEbus backplane connectors pinout on pages 30 amp 31 Power supply specifications are shown in Table 20 Table 20 Power supply specifications Symbol VCC_12V VCC_5V VCC_RTC lvcc_12voc Power supply Current consumption lvcc_svoc _ 8 under benchmark test with a 45W processor 7 2 Electrical Specifications 7 2 1 GPIO Electrical specifications of GPIO are shown in Table 21 Table 21 GPIO electrical specifications Parameter High level output voltage lou 4mA Low level output voltage 4 High level input voltage Low level input voltage 7 3 Environmental Specifications Environmental specifications of the CPU 71 16 are shown in Table 22 Table 22 Environmental specifications Operating temperature range 9 Operating humidity range 10 Storage temperature range Storage humidity range 10 9 Cooling system heat sink etc is necessary for operation refer to 4 3 Heat Spreader on page 19 10 No condensation DPD6MAN101 1 CPU 71 16 User Manual EUROTECH 52 DPD6MAN101 E EUROTECH BIOS Setup 8 BIOS Setup The CPU 71 16 is equipped with the Phoenix Technologies Ltd SecureCore Tiano BIOS customized for this particular board This chapter describes the
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