dspblok™ 21469 User Manual - Danville Signal Processing, Inc.
Contents
1. ao A 11 FEDS Configuration Een nd entend a ae Rep KAD Ak 11 JAAS Power amp do vo nn de sd de de oke 11 AS JHZ Data lo 12 VAG RON RP 12 Mechanical Dimensions dspblok 21469 13 Mechanical Dimensions dspblok 21469 ICE 14 14 PROGUCE 15 ROHS Se WEEE CO eA NC leet le lela ees 16 dspblok 21469 User Manual Page C Overview Danville Signal s dspblok family of products delivers the power of digital signal processing in a small 60mm x 60mm form factor Connections are brought out to standard 2mm dual row headers The dspblok reduces development costs risk and time Danville s dspblok DSP function modules are often incorporated directly into larger custom embedded systems By taking advantage of pretested signal processing modules pc board layouts become simpler and projects are completed quickly and cost effectively Danville s dspblok DSP Engines are largely pin compatible This allows your application to take advantages of new processor technology and extended features in the future You can also create small standalone embedded applications by combining a dspblok DSP function module with other dspblok mod2. N 2 5 Note 1 Note 2 DPI4 also functions as SPIDS in SPI slave booting applications Note 3 Leave Unconnected Note 4 Boot Configuration is 001 by default SPI Master Booting Note 5 Clock Configuration is 10 by default 16 x ClkIn generally reconfigured in program code Note 6 Vd 1 1 is for power supply monitor only DSP Core supply Note 7 Vdd is externally supplied 3 3 to 5V Vin for DSP Core Switching supply Both connections must be the same voltage Note 8 Not Connected may be used for extended features by other dspbloks w a gt ga 2 oa ga TD lt gt gt a ga gt 3 gt dspblok 21469 User Manual Page 10 Connector Recommendations amp Notes Connector Specification All dspblok connectors are gold plated 2mm dual row headers Male connectors are generally mounted on the bottom side of the dspblok pc assembly The exceptions are JH3 amp JH1 which are not intended to mate to a motherboard Mating female connectors are included for your target pc board The plastic base of each male connector is 2mm The height of the female headers is 4 3mm This means that the inserted combined height of the two connectors is 6 3mm or approximately 14 inch Standard standoffs may be used to secure the dspblok to the target pc board Mounting holes are 2
3. 507 263 5854 Fax 877 230 5629 dspblok 21469 User Manual Page B Table of Contents 1 dspblok Development 1 PORT 21469 annee ant lle 1 Intended de ed ken is tk adv de ee EU cn mka 2 Getting Started Tessin nn madame asian ile dti 2 UE ob tt tt a a a a 5 ni toy te a oeil G e 5 O 7 7 Bus hi tn 7 7 DT UE D 8 M ltipro essor st Sac Re 8 EASE KAY YO 8 SIA ne 8 BOOUOPUOIS sen in ann nine sena ie ent ent Na tes 8 9 Connector Recommendations amp Notes 11 Connector SIC CIN Ca BONN 11 v 11
4. to system integrators looking for complete turnkey solutions We often work with embedded systems engineers who may not have specific expertise in digital signal processing Regardless of your background you will need the right tools We suggest one of the following Option 1 Start your development with a dspblok 21469 ICE module The ICE version incorporates an ADI Standalone Debug Agent You could also use a dspblok 21469 USB ICE assuming you have clearance for the extra header used for USB See the dspblok 21469 USB User Manual for mechanical details You can use any version of Visual DSP 5 0 for SHARC There are three basic versions The FULL paid version supports all SHARC DSPs Analog Devices standalone emulators and a simulator Once you have an Analog Devices FULL license ADI does not charge for additional maintenance or updates Of course this is between you and Analog Devices Danville is not making any claims on their behalf You should check the ADI web site for licensing details The TESTDRIVE free version is exactly the same as a FULL license except that it stops working after 90 days The KIT free version starts out as a FULL TESTDRIVE version but after 90 days requires that the dspblok 21469 ICE is connected via the ADI debug agent It will not connect to an ADI emulator simulator or support another SHARC DSP The linker restricts a user program to 27306 words of memory for code space with no restrictions
5. 2 Danville Signal Processing Inc dspblok 21469 FLASH 5 60 00 2 36 ADSP 21469 60 00 2 36 a User Manual Version 1 01 Danville Signal Processing Inc dspblok 21469 User Manual Copyright 6 2009 2010 Danville Signal Processing Inc All rights reserved Printed in the USA Under the copyright laws this manual may not be reproduced in any form without prior written permission from Danville Signal Processing Inc Danville Signal Processing Inc strives to deliver the best product to our customers As part of this goal we are constantly trying to improve our products Danville Signal Processing Inc therefore reserves the right to make changes to product specification or documentation without prior notice Updated operating manuals and product specification sheets are available at our website for downloading This manual may contain errors omissions or typo s Please send your comments suggestions and corrections to Danville Signal Processing Inc 38570 100th Avenue Cannon Falls MN 55009 5534 Trademark Notice dspblok dspstak dspFlash and dspbootloader are trademarks of Danville Signal Processing Inc VisualDSP SHARC and Blackfin are trademarks of Analog Devices Inc Contact Information Danville Signal Processing Inc 38570 100th Avenue Cannon Falls MN 55009 E mail dsp danvillesignal com Web Site http www danvillesignal com Voice
6. 3mm dia to accommodate 2 56 or M2 screws standoffs JH1 JTAG This connector is mounted the top side of the dspblok 2mm right angle header is used instead of the larger ADI JTAG header The connections on the JTAG header correspond with the connections on an ADI JTAG header In addition Vd 3 3 is also available This addition allows an active buffer circuit to be added for chaining applications Danville has an ADI JTAG adapter available P N 08153 The dspblok 21469 ICE omits JH1 since the debugger is on board If you want to use an external emulator or the Danville dspFlash Blackfin amp SHARC Programmer you may remove the ADI Debugger and use the JTAG connection provided below the debugger JH2 DAI DPI IO This connector is mounted on the bottom side of the dspblok The DAI lines are all uncommitted by the dspblok With the exception of the SPI lines the DPI can be freely assigned The alternate names in the table are dspstak I O conventions If you are using a dspstak for development it may be prudent to following these usage conventions JH3 Configuration This connector is mounted on the top side of the dspblok It provides direct access to the ADSP 21469 clock mode and boot mode configuration pins In most cases you should leave all the connections open Use shorting jumpers if you want to change the configuration Note that each shorting jumper will cause the corresponding mode pin to deviate f
7. 469 SHARC DSP operating at 450 MHz with flash EEProm and DDR2 SDRAM memory An onboard switching power supply supports the core voltage requirements of the DSP so that only 3 3V is required to power the dspblok The ADSP 21469 peripherals include SPORTS 8 SPI 2 TWI 12C UART timers PWMs JTAG an 8 bit wide data bus and LINK ports 2 All of these peripherals are available via 2mm headers on the dspblok The dspblok 21469 is also available with USB See the dspblok 21469 USB manual for specific details dspblok 21469 User Manual Page 1 Intended Audience The dspblok 21469 requires an understanding of the Analog Devices ADSP 21469 and the associated tools used for development If the dspblok 21469 is going to be integrated into larger hardware design then it is also assumed that the user is familiar with basic hardware design In most cases systems integrators DSP programmers and software engineers can create DSP embedded systems using our embedded dspblok systems or dspstak family without the need for additional hardware design and manufacturing If you do not have background with these skills you may want to check out our web site http www anvillesignal com as well as the Analog Devices web site for links to useful references Danville engineers are also available to discuss your application Getting Started Danville s customer base is quite diverse Our customers range from embedded systems hardware designers
8. I17 DAI18 DAI19 DAI20 GND GND 3 olaj 5 3 Note 7 S Note 7 NIN dspblok 21469 User Manual Description Configuration GND 3 3 3 3 2 3 3 GND CLKCFG1 Power GND Ext Clk Vd 1 1 DSP ClkOut Vd 3 3 Vd 3 3 Vdd 3 3V or 5V Vdd 3 3V or 5V GND GND Page 9 escription Pin Description Description 7 Address Bus JH6 Link Port a 2 3 NC 3 T A4 LODAB 5 ata Bus Note 8 Note 8 Note 8 Note 8 Note 8 Note 8 Note 8 Note 8 Note 8 ote 8 8 8 Fais Fa tack pate is PA REINE 14 ear Fa 15 Faro 17 uate as M li RD WR 8 MS1 MS2 MS3 RS ES l es O1 R D IG e e WININKINKNINKININKINKINKINK IN
9. S EU Directive 2002 95 EC This directive severely limits the amount of lead and 5 other substances that can be in contained in nonexempt products The directive became European law in February 2003 and took effect July 1 2006 It is likely that other countries outside the European Union and some states in the United States may adopt similar legislation There are a number of important exemptions that affect many of our customers The most important of these is Category 9 Control and Monitoring Instruments You may wish to review your situation to see if this exemption applies to you Military medical and some other products are also exempt We suggest that you make an appropriate assessment concerning your products The dspblok 21469 is RoHS compliant The dspblok 21469 is a subcomponent of a larger system therefore it is not subject to WEEE directive EU Directive 2002 96 EC dspblok 21469 User Manual Page 16
10. ard is 0 236 in The board is 1 6mm 0 062 in thick dspblok 21469 User Manual Page 13 Mechanical Dimensions dspblok 21469 ICE FLASH 5 EEPROM DDR2 55 00 2 17 5 21469 1 RESET 140 00 5 52 80 00 3 15 ADI_DEBUGGER 60 00 2 36 The dspblok 21469 ICE board has identical mounting holes and mating connections as the production dspblok 21469 Two additional mounting holes are provided for support as shown The debugger portion of the dspblok 21469 ICE is power by a separate 5V 1A power supply The connector is 5 5 2 5mm center positive coaxial power jack located on the bottom of the drawing Manual Reset is also available via a tact switch located above the ADI debugger Schematic The Distribution CD includes schematic diagrams of the dspblok 21469 dspblok 21469 User Manual Page 14 Product Warranty Danville Signal Processing Inc products carry the following warranty Danville Signal Processing products are warranted against defects in materials and workmanship If Danville Signal Processing receives notice of such defects during the warranty period Danville Signal Processing shall at its option either repair or replace hardware products which prove to defective Danville Signal Processing software and firmware products which are designated by Danville Signal Processing for use with our hardware products are warranted not to fai
11. elp you avoid simple mistakes Regardless of your situation Danville engineers are available to help you with your application We may have solutions that are not yet on our web site We also provide many solutions that are specifically tailored to customer needs Contact us about turnkey solutions We recommend that you have the documents e Analog Devices ADSP 2146x SHARC Processor Hardware Reference Manual e Analog Devices SHARC Processor Programming Reference Manual e Analog Devices VisualDSP 5 0 Manual Set We recommend that you have the tools e Analog Devices VisualDSP 5 0 for SHARC e Emulator or Debug Agent one of the following e Analog Devices HPUSB ICE and Danville JTAG Adapter P N A 08153 e Danville dspblok 21469 ICE or dspblok 21469 USB ICE Optional e Danville dspFlash Blackfin amp SHARC Programmer Our website www danvillesignal com has downloads and links to these tools and documents dspblok 21469 User Manual Page 3 The dspblok 21469 includes the following items Hardware e dspblok 21469 ICE Module e USB Cable e Debugger Power Supply 5V 1A 5 5 2 5mm coaxial center positive North American customers only Software VisualDSP 5 0 for SHARC license CD Documents CD This Manual e CAD footprints Gerber amp Altium formats e Schematics e Sample Programs e Debug Agent Driver The dspblok 21469 includes the following items Hardware e d
12. erating in a variety of configurations dspblok 21469 User Manual Page 5 Typical Power Consumption Core Continuous Mixed Mixed Continuous Mixed Mixed Clock floating point floating point floating point floating point floating point floating point operations amp DAI amp DDR2 operations amp DAI amp DDR2 operations operations operations operations Vdd 3 3V amp Vd 3 3 mA mA mA mW mW mW 100MHZ 120mA 119mA 119mA 396mW 393mW 393mW 200MHz 150mA 148mA 147mA 495mW 488mW 485mW 400MHZ 214 209 208 706mW 690mW 686mW 450MHZ 231mA 225mA 225mA 762mW 743mW 743mW Vdd 5 0V mA mA mA mW mW mW Vdd 5V Core Supply Only 100MHZ 60mA 59mA 54mA 300mW 295 270mW 200MHz 77MA 76 76mA 385mW 380mW 380mW 400MHZ 111mA 108mA 108mA 555mW 540mW 540mW 450MHz 118mA 115mA 115mA 590mW 575mW 575mW Vd 3 3 Supply Only 100MHz 35mA 35mA 35mA 116mW 116mW 116mW 200MHz 39mA 39mA 39mA 129mW 129mW 129mW 400MHZ 48mA 48mA 48mA 158mW 158mW 158mW 450MHz 50mA 51mA 51mA 165mW 168mW 168mW Composite Vdd amp Vd 3 3 100MHz 416mW 411mW 386mW 200MHZ 514mW 509mW 509mW 400MHZ 713mW 698mW 698mW 450MHz 755mW 743mW 743mW dspblok 21469 User Manual Page 6 The ADSP 21469 includes an on board DDR2 DRAM controller Unlike earlier SHARC processors DRAM interface is largely independent of the external da
13. figurations The dspblok 21469 may be used as coprocessor in larger system Perhaps the easiest way to communicate with an external host to configure the secondary SPI port as a slave The primary SPI port remains configured as an SPI master so that it can manage local resources such as flash and EE memory as well as other devices Certainly the Link Ports are available for multiprocessor systems They are ideal where fast interprocessor communications are required Since clocks and data are always driven from the same source clock skew is minimized You can also use SPORTS for interprocessor communication This can be a good approach for Blackfin SHARC combinations It also works well for multichannel applications where you might use several dspbloks to provide front end signal processing and combine into a consolidated TDM data stream The results could be routed to a central processor that manages the whole system and communicates to the outside world Reset On power up the dspblok 21469 is automatically held in reset until the 3 3V power supply is stable RESET is active low and open drain This means that an external device s may also reset the dspblok by pulling the reset line low External devices should not drive RESET high since this can cause contention with the on board reset circuit The external reset circuit is connected in a wired OR configuration using an active low open drain configuration A 74LVC125 a
14. for data space The good news is that it can be used to create bootable images loader files that can be used with the production dspblok 21469 Depending on your situation this may be all that you need dspblok 21469 User Manual Page 2 Option 2 Start your development with dspblok 21469 module In this case you will want to connect to dspblok 21469 via an external Analog Devices emulator Analog Devices offers two versions the USB ICE and the HPUSB ICE We prefer the faster HPUSB ICE which is up to 10 times faster and also supports background telemetry You will also need Danville adapter kit P N 08153 which converts the Danville JTAG 2mm header to the larger ADI JTAG connector You will also need a FULL VisualDSP 5 0 license at least after 90 days You can purchase VisualDSP 5 0 and ADI emulators from Danville We appreciate this business If you are designing your own companion board we strongly recommend that you use one of our existing I O boards and or power supply boards as an initial development platform Depending on your situation this could be dspstak system dspInstrument or a combination of dspblok and power supply modules Any of these components will give you a solid footing for development before you incorporate the dspblok into your own target If you are laying out your own pc board we can provide you with PCB footprints and schematic symbols Gerber amp Altium Designer to h
15. has 20 DAI lines and 14 DPI lines Collectively these can be thought of as two sets of crossbar switches that connect to a wealth of peripherals The dspblok 21469 maintains the flexibility of the DAI and DPI by bringing out all 20 DAI and 12 of 14 DPI lines to external connections The DAI is completely unencumbered and can be assigned to I O in an arbitrary manner The DPI is slightly restricted in that the primary SPI interface is assigned to DPI1 MOSI DPI2 MISO DPI3 SCK DPI5 Flash SS and DPI6 SS With the exception of DPI6 these connections are necessary to support SPI master booting The dspblok 21469 may also be booted from an external host using SPI slave mode In this case DPI4 is also used as the SPIDS line Data Bus The dspblok 21469 brings out the complete asynchronous data bus including all address lines with the exception of MSO which would be in conflict with the DDR2 chip select Clocks The dspblok 21469 supports both internal and external clocking options You can add a standard HC49 style crystal to the board for internal clocking or you can supply an external clock The configuration header JH3 dspblok 21469 User Manual Page 7 allows any ADSP 21469 power up clock configuration to be set Link Ports The dspblok 21469 has two link ports available that can be used to interface to additional dspblok 21469 boards or may be used to connect to other external devices such as FPGAs Multiprocessor Con
16. l to execute their programming instructions due to defects in materials and workmanship If Danville Signal Processing receives notice of such defects during the warranty period Danville Signal Processing shall at its option either repair replace software media or firmware which do not execute their programming instructions due to such defects Danville Signal Processing does not warrant that operation of the software firmware or hardware shall be uninterrupted or error free The warranty period for each product is one year from date of installation Limitation of Warranty The forgoing warranty shall not apply to defects resulting from e Improper or inadequate maintenance by the Buyer e Buyer supplied software or interfacing e Unauthorized modification or misuse e Operation outside the environmental specification of the product e Improper site preparation and maintenance Exclusive Remedies The remedies provided herein are the Buyer s sole and exclusive remedies In no event shall Danville Signal Processing Inc be liable for direct indirect special incidental or consequential damages including loss of profits whether based on contract tort or any other legal theory dspblok 21469 User Manual Page 15 RoHS amp WEEE Compliance The European Union approved directive on the restriction of the use of certain hazardous substances electrical and electronic equipment This directive is commonly known as RoH
17. n open collector drain transistor circuit are possibilities You do not need an additional pull up resistor Signal Levels The dspblok 21469 uses standard 3 3V logic levels These levels have become the defacto operating standard for many years now DO NOT use 5V logic when interfacing to the dspblok The inputs are not 5V tolerant Most external devices requiring 5V TTL levels can be safely driven by the dspblok If you have questions concerning interfacing external devices please contact Danville for suggestions Boot Options All ADSP 21469 boot options are available via the configuration and programming header JH3 These include Master SPI flash memory Slave SPI external host or Link Port The boot mode pins are pulled passively to create a default boot mode of SPI Master dspblok 21469 User Manual Page 8 Connections keu SEULE Des JH1 pme m woo pl GS ee EN AI nu EE A 5 Vd 33Mon 5 DP14 103 554 TE ML EE ni ein SAP EE EE 10 os 10 DPI9 UART Note 5 10 E ujomourrm 12 Ree Vd 3 3 Vd 3 3 DPI3 SCK DPI2 MISO Notee 3 RESET Reserved 20 DAI2 DAI3 DAI4 DAI5 DAI6 DAI7 DAI8 DAI9 DAI10 DAI11 DAI12 DAI13 DAI14 DAI15 DAI16 DA
18. on the mating pcb JH6 Link Port The Link Port connections include 33 ohm series terminators as well as pulldowns for LCLKx and LACKx The series terminators will have minimal effect when located on the receive side of a link port connection but are required on the driving end of a link port connection If you are connecting another non dspblok device to a link port make sure your circuit includes series terminators at the driving end of any connection These terminators are often available internally in FPGAs You should not supply additional terminators on the dspblok side of a connection Link ports circuits are fast so careful attention to pcb layout and or cabling is essential Consult a Danville engineer if you have questions about this topic dspblok 21469 User Manual Page 12 Mechanical Dimensions dspblok 21469 pe 46 00 1 81 mn 60 00 2 36 57 00 2 25 44 00 1 73 Law 26 00 1 02 Top Side 24 00 0 94 52 00 2 05 57 00 2 24 60 00 2 36 Holes 2 3 0 090 4 places 55 00 2 17 55 00 2 17 Bottom Side Mounting holes are equidistant from the center of the dspblok These holes are 2 3mm in diameter suitable for 2 56 or M2 screws When 4 3mm height mating female connectors are used the board will be 6 3mm 0 25 in above the target board therefore 0 250 standoffs may be used Component height above the bo
19. pply that supplies 1 1V to the ADSP 21469 DO NOT use a higher voltage supply for the core supply input H4 Vdd A single 3 3V supply is all that is required to power the dspblok 21469 but in some cases a 5V supply may be more convenient The DSP I O and Memory supply must 3 3V For example a product may already have a switching supply that converts directly to 3 3V In this case it may be desirable to supply both the DSP core and the dspblok Vd 3 3 1 O from this supply Alternatively a product might have 5V supply perhaps from an external power supply module simple LDO fixed regulator could be used to create 3 3V from this supply Most high speed devices including the ADSP 21469 draw most of their power from their core supplies In this scenario it makes no sense to power dspblok core with 3 3V since the LDO would be dissipating excess voltage as heat If the requirements are modest the power dissipation in the LDO might not be significant Power consumption is largely function of the operating clock of the ADSP 21469 and the computation tasks that are being executed on the DSP The highest consumption occurs when the DSP is performing continuous floating point operations at maximum core clock 450MHz Accessing external I O such as DRAM or other peripherals consumes less power in the benchmarks that we have performed The following table shows power consumption measurements for a typical dspblok 21469 op
20. rom the pin state of the default configuration This means that some pins are pulled high and others low Power amp Clock This connector is mounted on the bottom side of the dspblok This is the main power feed to the dspblok Vdd is the input to the core switching supply Both Vdd pins should be connected to together and fed with either 5V or 3 3V Likewise Vd 3 3 should be connected together and fed with 3 3V Vd 1 1 is current limited by a large resistor Its purpose is for diagnostics dspblok 21469 User Manual Page 11 5 7 Data Bus The data bus is split to two separate connectors for address and other for data The ADSP 21469 has an 8 bit data bus Earlier dspbloks based on the ADSP 21369 supported a 32 bit data bus This was needed primarily to support wide SDRAM interfacing The original JH6 connection on the dspblok 21369zx board was used for the extended data bus This is also why there are unused pins on 5 If you are adapting a dspblok 21369zx design to support the dspblok 21469 you should verify that these changes will not impact your design In most cases this will not be an issue The address bus is also organized so that the MS lines and the lower address lines are grouped together This allows smaller receptacle to be used when the whole address space is not required For example the dspstak 21469 uses 16 pin receptacle for JH7 This frees up board space and simplifies routing
21. spblok 21469 Module Documents CD e This Manual e CAD footprints Gerber amp Altium e Schematics e Sample Programs FLASH GORE PS EEPROM DDR2 ADSP 21469 RESET 140 00 5 52 ADI_DEBUGGER 60 00 2 36 FLASH CORE PS EEPROM DDR2 60 00 2 36 ADSP 21469 JTAG 60 00 2 36 dspblok 21469 User Manual Page 4 Hardware Overview The dspblok 21469 is small module measuring 60mm x 60mm 2 36 x 2 36 JH2 and JH7 are 2mm male headers that are installed on the bottom side of the pc assembly JH1 and JH3 are mounted on the top side of the pc assembly If mating 2mm female headers 4 3mm ht are used the pc assembly will be about 1 4 above the mating pc board This allows standard 0 250 standoffs to be used with the corner mounting holes if desired The hole size is 2 3mm suitable for 2 56 or M2 screws 1 FLASH e HI JTAG connects to external ICE GORE PS AE 2 DAI DPI I O SPI amp System DDR2 Clock amp Boot Configuration 60 00 2 36 z 4 Power amp Ext Clock ADSP 21469 e 5 7 Data Bus j e 6 Link Ports JTAG 487 1 60 00 12 361 Power Supply There are two power supply connections to the dspblok DSP core Vdd and DSP 1 0 and Memory Vd 3 3 The DSP core supply may range from 3 3V to 5V This is the input to an on board switching power su
22. ta bus On the dspblok 21469 the only overlap is 50 which is not available because its address is assigned to DDR2 CS The dspblok 21469 uses 1Gb 64M x 16 DDR2 DRAM DDR2 memory is much faster and typically much larger than older SDRAM PC board layout is non trivial The dedicated 2 interface of the ADSP 21469 has been carefully laid out with respect to trace length signal integrity and bus isolation so that the DDR2 operates reliably at maximum speed The CD includes examples of DDR2 register configuration code 16Mbit serial flash memory may be used to bootload the DSP There is a pre installed bootloader program that resides in the flash This program accepts standard ADI loader files SPI slave binary 8 bit and can be uploaded with a dspblok power supply module a dspstak 21469 or any Danville board that includes USB transceiver You can also boot via the UART If you want to manage the flash memory yourself you can overwrite the internal bootloader via the JTAG port In this case the Danville dspFlash Blackfin amp SHARC Programmer is available for fast production programming 64kbits of EEProm memory is also available as byte addressable user memory For example you might store serial numbers build versions or calibration values in this space There are other Flash EEProm combinations available via special order Contact Danville if you have special memory requirement needs DAI amp DPI The ADSP 21469
23. ules Embedded dspblok systems can be created by using dspblok power supply such as our dspblok ps usb and an module such as one of our dspblok ad96k family of audio data converter boards Each board is stacked via 2mm headers to create a low profile configuration where space is at a premium We also have combination power supply boards such as our dspblok a9238 48 high speed ADC boards for SDR applications Danville dspblok DSP Engines are the driving force behind many of Danville s standalone products such as our dspstak dsprak dspMusik and dspInstrument product lines dspblok Development Boards Most dspblok production modules have a companion developer s version which includes an Analog Devices EZ KIT style debugger These boards are physically larger 60mm x 140mm to accommodate the debugger but have a matching footprint to our production modules 60mm x 60mm Once you have developed and debugged your software you can replace the debugger module ICE version with a lower cost smaller production module The dspblok with ICE versions include the free Visual DSP KIT license and are supported by the FULL version Depending on the complexity of your application you may be able to create and support your application without ever needing to purchase additional development tools dspblok 21469 The dspblok 21469 is a highly integrated DSP module that incorporates an Analog Devices ADSP 21
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