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Series One PLC Series One/One Plus User`s Manual

1. lt t z o pos O dg v dq o 3 2 os Oci esa CH O Ka Dr H Oc Cu E o A ud 3 gh yes 035833 38887382 d EAS IA e Y c G re E S O rr ym a E 2 5 bb el o o E o e D pa O ct M O 8 Oe D lt I z a o 5 na o E au e o gt E ei NP nak O gt 8 E Ob zi A GC Dc 3 O mow d 4 m e v a ov A 4 O O qu pas Q 885 gror ome P re SEAT d 4 As 858585 s a B d ES 2 2 30707 I h6 eb 3 8 y E ZR E888 iS nd r o dc O 3 E gt 4 D Vo Q i gt vd bed M o 2 i Hat o ei o3 d Pai O B bo 2 Eh 3 my Y ES n Y z O om c2 SC ag ra oO O of 3 H6 m o 9 di ser 25 uo Bol H Bg 2 A Ze E OG o Om 5 lt b E bh Y O RW lt E C O e YO nG x ed ea 3 0 Tor con AO Es o b o BS m SADA Ow D Pa ou e H m 4 E Ci c 4 n 2 EG wy d a et ZC Q NOW B nd O eg O tv P Ha a oa x e pund er un o 9 O g G w Mw E n E paw om Sp ong A 9 y O 8 bb 4 gt AG sana 5 E 8 bi 342 3850 Owe 3 A d G IT O BECKER EC o g z rx TG i b AN O O e O Ea D re EEG ECKER a H 5 en ai O A OO d ven mg TER 3 lt g B 9 6 k p i SO 8 32 S SB SB DET Hor LAE O ESFERA SF s 58 85 y e C Mm r o E P ag he O g 0 O 3 ON N Hi o E E IA Na 5 G E po ki Ly w Y 5 O Ch O E O o Y O rel E o Q Ds O i La G 3 CA ti O E dd Ki G E E
2. 2 e y X P Lo m 4 WW d E O to A 4 3 9 3 a tc le qi e C 5 a SSES 2 M o I Lo y EA 503 le sU J S o X AEI o CEB i E Y S SE do s2896 5555 lee Ll LO Q lo wd d d Q 2209 28 D E Ste lt 3552 e ss23 n r 5 gt 7 8 d E i Q a f 3 VO D IL a H 5 a EK Z EN Sr Glo ll 686 i 3 E F 2 est r QO e o Uu Y Am y I E oO i m o ES E A u 5 B E s83 el o a e B JE di a B3 n amp A HO o POL eee 5 24048 en 8 ra pea a A Bb 0 EK 258855 om n r hd 7 ol e H d i Y E e bb on E 9 9 SE E A Zi NG 222228 J TRE sheds bisag Ge o I I jug aaa bess o Ep a P 2 d ed E SE f 33 E a S SE v Ge z e Ch 4 ea V x T RA E DE H HQ 0 t 2 OA O mg 8 E 8 9 bo R a iq 5 S SS gt ENT Q rj mod E E E D g E B x3 LA ej 3 O 5 4 a o g 2 Q S p lt lt lt E lt E Q EA du S P E o o o0 f O O e L Un De T e o B IQ ANAND AtUDUY ACCUMULATOR CWTENTO LASA I Ut e 2 GROUP REFERENCE OR 4 DIGIT CONSTANT 4 DIGIT BCD ANSWER STORED IN ACCUMULATOR PIG HEN MESE TENNIS IF ANSWER IS 0000 ZERO FLAG IS ON CARRY ZERO Pee Ak rere eee EA ae FLAG FLAG Y Ir AINOVVEN ID 3333 LAMNATY FLAG lo ON e dE IF ANSWER IS gt 9999 AND THE 4 BCD DIGITS I 9 T bee
3. t d o SE o E ull 7 2 o E T qe ni e 4 d pang E 8 3 E S 1 d lt Ki E E E g 4 8 gt z b m a is 1 a s i HE e Eb E O x d E D o mc xt Od E oe E weg ba o E S d e ba B z NT Pag O o 9 3 v 2253 E 1253 rh rh t ES ag pa HIE pu ji THEE TY Eg dp Ge 3 pA 8g 5 3 Z ss gt i G ER gt E r 0 EE 1 o ES dir Je 2 8 a E e FETE E 145558 x o dam GER EEN a EB P 9 8 5 Ex B um d a IR Q 5 3 a J LI e E 53 E 3 I w 0 O 2 2 d E N i J E S 3 E EE ojal B x 382 Z l FER E a lt a O OO no a A Sr P 5 gt E A Ge A 3 8 S 8 5 d Gg HI lx am p s O t e E t as EE E E rt e E O O a Q I t 2398 acr A gg mE a T p l E 4 on Er o lt HO 8 Re 7 amp H ns E z ar E e 8 A C D e m D CO d Vi e D a Rd N 9 d eg MC 3 2 a NG BR ed ag SES gt mg a N H p M a o df yt F mx a SBER TEEPEE SELE Q un ei Oo d di Be G E ii A O O di Q Ha e SEN h I a EXIT 0 S gg 4 8 Siche 9 E S gt O 5 rj 3 A o E 2 23 ECL gg Bh E b e suq Qa o E O p E a Q kal O CH cog gt e Ot o 9 0 EE SELLER NECE SUERO b0 Wd 5 S m Eb t rei OD A 2 d 4 34 AG Og c 5 om gu 2 m 2 d 2 7 d 9 DAT 2 E e T E Po 3 C E E s FEFE 60 ai 4 D F8 A Pu
4. UY ei Y O 4 ka O 5 5 a OE S p 66 Y 9 9d o 8 2 BOK GE e Sum e k 8 4 O a D va E Y 2 ELA PERCHES BREF TITIN MICRA 8 gor Bong gy OHE Enero ag 3 E e AG CE n 2 e O Ps e pf k dd O o J Le ka om O 2 A e e e c Uu t O y ECKER n BEE ggm 2 555 Ope Sep 9 5 Bo LACE Eg K H HES omg DOGGY OU 9 525 52 Anand PPR ad y E Oa RA Ga aeg o 3 Sab 7 Datt Ng gt bo E 4 Y O o Qo a A 8 D O 00 0 t G o d a gq G E S KKK d 9 d ui 3f SE uga SC o bb Gu E bi gt Ka ua 00 5 m RS La O q A Q O O t D a bb GORDE HH oi 528 Fea Qe f t bi rey oe O ma E pe I by ui O Ka c RA uu 28 5 8 8 92 Of aa E 025 HD B N my 4 PU n NG e ma C f q Y EB855u88P lt a FOSS DEAR eS een ur a 9 pop a Les ared between different shift re Each stage or position of ES pg JI sh 5 40 Programming GEK 90842 shift registers ring counters First In First Out or Last In First Out stacks Each shift register reference can control any number of relay contacts both normally open and normally closed Shift Register Operation To illustrate the operation of serial shift registers Figure 5 25 defines a theoretical problem using a sequential assembly machine The machine has space for a maximum of 12 parts at any one time these parts may be cups or other storage locations physically on the machine The operations are performed while the machine is stationary and
5. Es CO EP 0 Ev e Assume the data entered into the accumulator from Inputs 0040 0057 1234 e Is logically AND ed with 2222 e The resulting answer stored in the accumulator would be 0220 e 0220 is written to Outputs 0060 0077 e Accumulator and reference contents for above operation are shown below 15 Q ofofo 1 ofof1Jofofofi iJofiJo o 7 o 7 O Lojo 1s ojojoj 1 o ojoj1 ojo o 1 o 15 D jojofofofofoj rfofolof ofofofofo Programming 5 63 PPP PP res GEK 90842 DeOR DATA OR F76 The contents of the accumulator are logically bit OR ed with the contents of a specified 2 group reference or a 4 digit BCD constant The result is stored in the accumulator If the answer is 0000 the Zero flag 776 will turn ON a40879 000 014 1 O Points 070 075 I O Points 016 036 interna Coils 040 056 Shift Register Coils 400 576 Data Registers 8 bit FLAG 600 677 T C Accumulated Value Registers 16 bit 776 a 1 Loen xx GROUP REFERENCE gt 4 DIGIT CONSTANT 4 porn zt pee VALDE DeOR Sequence a40880 os 14 1312 i 10 9 8 7 6 5 4 3 2 1To cose o DeOR 2 GROUP REFERENCE 1 t REFERENCE REFERENCE Lo 8 3 2 9 1 7 OR 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 sper LOGIC SUM e Truth table for DeOR operation A Accumulator contents D Contents of reference or constant LA D RESULT o 1 1 5 64 Programming GEK 90842 e Programming example DeOR a40881 9 STR
6. d 3 Seet ue d D O e E E a q E HBBBBB I E er E E x l K e E OO DD DE a E gppnpnn F Ges lt Sto E La iL 3 i gud nd s 2 8 9 E ql Y A E u VE u c P Q BUH HEE _ 32 a b o Q p gt HEEN 9 e o E il B Q S gt E 3 3 T Ps ii 5 PAPA fal e MSC k ER o lt E 9 E oc a 36 2 E E lt 3 Ec t o 10 2 8 m Hc o a my i D E m Lt LA ER 8 3 la da S E 9 m x pa 4 p Z amp 9 0 A in 2 CEA E 3 5 e PEE Sak e ue e Bg Bi Q 4 A p E B E mi 0 8 B s o o gis ou O E et od Ai N g d SD gt P a gt 5 E S gt om gt o 8 g E ba Q qa 3 Wa OQ A gt a 9 o mU C Eb 8 8 o lt E m E E A e 4 Z P A AAR B x e e o 9 o fa D fm E 6 5 70 Programming GEK 90842 BCD Binary to BCD F86 A binary code stored in the accumulator is converted to a 4 digit BCD value If the resulting BCD value is gt 9999 the overflow flag 777 will tum on The flag coil can be used to turn on an output device as an indication of the overflow PER Hm ej a40890 e BCD conversion sequence BINARY CODE po ojrjojojs o o ofo s s o 1 sroreomree BIN ACCUMULATOR IS BCD FLA vm SARA Somme Qatar a e Programming example BCD sm se 7 e7 EF E ME GB CF COO E E CS E CJ Ds E
7. s a a A me X e m m et iE CARR am a am ee m om L o i ARE 0000 BOTH THE CARRY AND ZERO FLAGS WILL TURN ON Fw A R AD EF CAMIVIT LE 7777 2223 10000 ba na 5 m a m m A a me ru TED EI AP Mai CAMMY FLAG UN SS T CON FLAD UN e AddIUOn rrogrammung Example Example 1 4 BCD digits are loaded in accumulator from Inputs 0030 0047 en A DND at M LAM A 4 str ske 1 fent v M LC LC LJ LII F ps o fet R L3 en A e a TT NR NE EE ETE NG y L I re r1 P135 fem m1 rm rem P Basis l LJ LJ LE IJ LL LI L me aai I8 ar AAA SOS OO Ds CO Cv E DJ O e a UP nmimae m nf ados armas 4 793 gt S La PRI rm e The contents of the accumulator are added io data from Inputs 0050 0067 e The answer is stored in the accumulator and also written to Outputs 0100 0117 If D OUT is specified as a Data Register Internal coil etc the answer would be stored at that location for further use in the program Programming 5 55 GEK 90842 Example 2 This example shows more than one constant value entered in the program By closing the respective contact a different number can be selected to be added to the contents of the accumulator a40867 Hu 8 8 EEEH EEHEHE H T m T m B T D B I nn B z A Gei 0 DW O m z 4 When I1 is closed MCS is energized and does not control the logic following it The number selected by cl
8. Description of Operation There are four basic rules that govern the operation of the push down stack and they are explained in the following examples Rule Number 1 A STR X instruction pushes the contents of each position in the stack down one location The contents of location number 1 are pushed down to location number 2 the contents of location number 2 are pushed down to location number 3 and so forth The logical status of reference X is then moved into location number 1 of the stack Rule Number 2 The AND Y OR Y instruction logically ANDs ORs the status of reference Y ON OFF with the ON OFF status of location number 1 in the stack and writes the result back into location 1 AND SERIES OR PARALLEL BEFORE AFTER BEFORE AFTER LOCATION LOCATION LOCATION LOCATION Figure 5 9 Push Down Stack Logical Operations Programming 5 25 GEK 90842 Rule Number 3 The AND STR or OR STR instructions logically AND or OR location number I in the stack with location number 2 and writes the result into location number 1 In other words these instructions put one group of contacts in series or parallel with another group of contacts This instruction also moves the contents of positions 3 through 8 up one location Rule Number 4 An OUT Y instruction sets Y to reflect the status of location number 1 in the stack If the status Of location number 1 is ON 1 output Y will be turned off If the status of location number 1 is OFF 0 outp
9. ee Ma na O a ri Aa D E O c vw DP 28890 GE e e Van 8 cnou 9g 22 25 r C ud 4 rd 820238973 2 0 o g 7058 doe ZOO E om oT FS P G amp S s ua E oD j Mr ms 3 E we ka c n Y O cl AA c i qd O 95 ETRE Bo Peon 2 p 9 s 8 bn AD E pd o9 E 6 28 G li BO gt B eb qq EE ES 2528 500 BUR OPE on N 3E GER LI E P q BG ux E d N A o eent 8 K 33 Sa Zs c vw ae Bat 58852525583 dedzbdl on o H e r 6 y v S g S ert lt H H 9 o og JET N See 8 Sts 2 o a 3 1 E 9 4 Ka 5 S 4 rj O 2 E Q Q o L e t O d 3 O A La w a O O eg e GK Ze TN 1 P dd Q mo E 3 Sage oe 8 8 A p y e H 4a O a d D D 3 A np M t ST BS E O 8 o E O 4 O e D E e OH LA ES be Gr viet 4 TERETERE EE N P Ee E SkEKKEK 6 2 o o Be St E AS 5 25328505 o o 5 HG O DU V A Be Q a 2 s Eo t SA pub boga amp x 7 E m gt OM e Moe 3 gh bo d e 8 HG A d TAN E 65225945 O Y Oo D vet A mg e 5 N t gt gt 3 2 Lae eae Se SE o N AT e 5856835 o a O 3 2 E c H 3 ei n 2 p a 1 Ju O D e d e a a e dq mg 9 Ju p b ge A 4d amp ZS gt AP E uu 209007 gt q s o O z d O y a eet a Z bsg E 5d Le gt 28854885 GO 0 3 D c lt v Ny E e EH Go o HA oo gt E kb o v z N lt bs at D VD Y STD ul 230332420 Qiu M ao O OF VEDL No y q D E 2 o eo o p EoER 2 dig SLM PO 5 NG GE y 9 SEKR
10. 13 4 N E of bits shified 220 13 4 N of bits shifted 56 3 E DN DN DN DN DN DN ENCODE FUNCTION 83 ENCODE Encodes a bit in the accumulator 3 282 0 F83 to a binary code representing the position number 0 15 and places the binary code in the lower four bits of the accumulator INV F84 INVERT The 16 bits of the accumulator are inverted 1 e 1 1 63 30 3 to 0 and 0 to 1 Example 1101 1001 0110 0111 inverted to 0010 0110 1001 1000 BIN BINARY Converts a BCD value in the accumulator to a 6 3 412 2 F85 binary code BCD BINARY CODED DECIMAL Converts a binary code in the 1 6 746 0 F86 accumulator to a BCD value 3 20 EXTERNAL FAULT DIAGNOSIS Allows 63 355 3 IJO IR SR extemal amp vices to be monitored for unwanted conditions If a 114 0 Register fault occurs a preassigned 4 digit BCD number is displayed on 722 Constant the programmer Multiple fault conditions can be monitored Programming 5 7 GEK 90842 Programming Fundamentals This section provides a guide for entering and using each of the instructions The instructions are presented in groups that correspond to their functionality Table 5 4 lists the instructions grouped in this manner Table 5 4 Series One One Plus Instruction Groups BASIC INSTRUCTIONS STR STR TMR STRCNT STR NOT STR NOT TMR STR NOT CNT AND AND TMR AND CNT AND NOT AND NOT TMR ANDNOTCNT OR ORTMR ORCNT ORNOT ORNOTTMR ORNOTCNT
11. 577 Data Registers 8 bit e 5 2 HL ostra ms GROUP REFERENCE RODA DeSTRS F55 This is a 2 word instruction which when executed loads the accumulator with a BCD value from the 2 byte contents of a 16 circuit Input module a40856 REF 100 REF 16 POINT INPUT MODULE ACCUMULATOR 000 005 16 Point Input Module FEE eL fom GROUP H REFERENCE PIL JE JE 5 50 Programming GEK 90842 DeOUT F60 DeOUT Data Out is a 2 word instruction which when executed transfers the contents of the accumulator 16 bits to a specified 2 byte group reference Output Internal Relay Shift Register coils Data Registers or Timer Counter accumulate value register a40857 I O Points 070 075 I O Points 016 036 internal Coils 040 056 Shift Register Coils 400 576 Data Registers 8 bit 600 677 T C Accumulated Value Registers 16 bit e Le GROUP REFERENCE BODD E ET on zl D OUTI F61 DeQUT is a 2 word instruction which when executed will write the contents of the first 8 bits 0 7 of the accumulator to a specified reference a40858 ACCUMULATOR REFERENCE 000 015 1 0 Points 070 076 I O Points 016 037 Internal Coils 040 057 Shift Register Coils 400 577 Data Registers 8 bit DEO Hrone GROUP REFERENCE MOOD di eq i O o D co db CH st G e ka Nr gt k 5 E O
12. Loads accumulator with a binary or BCD 3 325 0 16 Point value from tbe 2 byte contents of a 16 circuit high density Input Input Module Module 329 4 YO IR SR 52 6 Register DN DATA OUT The contents of the accumulator 2 bytes are written to a specified 2 byte reference Output Internal Relay Shift Register Coils Data Register or T C Accumulate Register ON 3 DATA OUT 1 The contents of the lower byte of the accumulator are written to a specified 1 byte reference Output Internal Relay Shift Register or Data Register DATA OUT 2 The contents of the lower 4 bits of the accumulator are written to the upper 4 bits of a specified 1 byte reference Output Intemal Relay Shift Register or Data Register DATA OUT 3 The contents of the lower 4 bits of the accumulator are written to the lower 4 bits of a specified 1 byte reference Output Internal Relay Shift Register or Data Register CH D 160 1 I O IR SR 39 1 Register Lo 116 0 1 O IR SR F62 39 8 Register Uy 108 1 YO IR SR 55 0 Register Es J oc S 5 DATA OUT 5 The contents of the accumulator 2 bytes are written to a specified 2 byte reference Must be a 16 circuit high density Output module COMPARE The contents of the accumulator are compared to the contents of a specified 2 byte reference 1 IR SR or DR or a 4 digit BCD constant Internal coils turn on to reflect the result of the comparison Acc g
13. Reference Device Name Wire No SAD TR ON C IDK MH c5 Nr 103 CD VS ON H QD 105 CD V CS b i DJ 0 OUR CS pO c IQ x H gt CS NO AMD oR CO PBO c Programming 5 13 GEK 90842 Internal Coils The internal coils are control relays that can be used to control logic in the Series One or Series One Plus user program However their status cannot be provided directly to the I O section Retentive relays are specialized internal coils that have their ON or OFF status retained during time periods that the PC is not operating such as during loss of AC power They use dual operations set and reset similar to hard wired latching relays A switch S1 on the CPU module must be set to the ON position in order for the internal coils 340 to 377 to be retentive upon loss of power If the switch is not set properly these coils will function as non retentive coils Use of the Special Function Coils Internal coils 374 through 377 are special purpose coils in that they always perform specific internal functions and also provide useful internal system status Coil 374 is a first scan reset or power up indicator Coil 375 provides a convenient way to program a 0 1 second clock pulse Coil 376 can be used to inhibit all hardware outputs that is outputs that are connected to user devices programmed with an OUT XXX instruction Finally coil 377 is an indicator of the operating status of the back up battery for the CMOS memory d
14. 0004 0 STR CNT SHF 60 3 STR CNT SHF 603 ADR 0007 6 OUT 60 5 OUT SHF 603 4 OUT SHF 4 0005 6 our sur 46 ADR 0 0 08 3 35 0006 GEK 90842 pc s1 83 0018 016 OFF 017 i OFF AN esci OFF ON a 013 OFF om SO COUNT 1 1 a ZERO gt Figure 5 19 Example of Counters Extending the Timer and Counter Range Timers and counters can be connected in series or cascaded to extend their range beyond four digits Figure 5 20 illustrates several techniques to extend preset ranges by utilizing multiple timer counter Programming 5 35 EE GEK 90842 functions Timer 611 will record time as soon as references 206 and 225 are energized After 800 seconds it energizes its coil and stops recording time However timer 612 starts as soon as 611 reaches it preset and continues for another 950 seconds This is a total of 1750 seconds from the time T611 started Whenever reference 206 or 225 is de energized timer 611 is reset to zero de energizing coil 611 and also resetting timer 612 if necessary pc s1 83 0019 206 225 T611 STR 206 E IS B 611 T611 T612 cdd 800 E 950 STRTMR 611 TMR 612 T613 T613 950 e 10 STRNOTTMR 613 TMR 613 1 0 T613 STR TMR 613 750 STR 306 Gul CNT 614 750 306 STR 052 STR CNT 615 CNT 615 052 SIR ENT 500 615 CNT 209 STR 307 ce15 615 y af C615 Figure 5 20 Example of Extended Counters Another pair of functions are timer 613 and counter 614 Timer 613 is a self reset
15. 03 032 271 AND NOT 032 O OUT 27 033 1 22 WORDS PER ELEMENT Figure 5 14 Multiple Master Control Relay Logic Disabling of Outputs In addition to Master Control functions all outputs can be affected by an internal special function coil referenced as 376 When this coil is energized by user logic all outputs in the hardware I O structure will be turned OFF Internal coils and statuses will still operate but only internally The only exception is to coils that are programmed as SET OUT functions rather than the OUT function These will still be able to provide their normal output status ON or OFF to the I O section Figure 5 15 illustrates the use of coil 376 In this example when either reference 003 or 056 inputs outputs or internal depending upon hardware I O configuration is energized coil 376 will also be energized This will cause all coils programmed with the OUT function such as 010 to be turned OFF at their output module although they will function normally internally However coils driven by the SET OUT function such as 011 will not be affected by the status of coil 376 Table 5 7 summarizes the effect of coil 376 on the OUT and SET OUT functions NOTE It is not recommended that the Output Disabler coil 376 be used with retentive coils latches Table 5 7 Effect of Coil 376 Output Disabler Coil 376 OFF Coil 376 ON internal Staas om saou om Saom OFF OFF OFF OFF OFF ON ON ON OFF ON
16. 4 l AND 41 5 AND NOT 0 0 0 7 5 AND NOT SHF 5 5 AND NOT SHF 3 0 0 1 2 AND NOT SHF 32 ADR TMR 6 STR NOT TMR SHF 6 TMR SHF LU I STR NOT TMR SHF 60 6 JSTR TMR SHF 6 TMR SHF 6 LT JI STR NOT TMR SHF 601 LO STR TMR SHF 60 TMR SHF 60 0 0 0 8 2 ISTR TMR SHF 602 TMR SHF 601 0 0 1 3 ADR 0 0 0 4 SHF 4 SHF 1 42 4 SHF 15 0 0 0 9 43 ADR 0 0 0 5 0 0 1 4 Figure 5 17 Example of Timer Logic Programming Counters Counters Figure 5 18 operate similar to timers except that they require two rungs of relay logic to control their operation The upper rung controls when the counter is incremented When this rung goes from no power flow to power flow OFF to ON the counter is incremented by one To cause another count to be recorded power flow must be interrupted and another OFF to ON transition must occur All counters count up starting at zero towards a preset value The ability to detect transitions and record counts is built into the counter function and requires no further programming by the user The lower rung Of logic second STR function controls the reset of the counter function Whenever this rung supplies power flow to the counter the counter will be reset to zero If both rungs supply power flow no Programming 5 33 HO Um GEK 90842 counts are recorded and the counter is forced to zero All counters are retentive upon loss of CPU power pc s1 83 0017 ANY RELAY LOGIC COUNT AN
17. 5 2 Series One Execution Times Instruction UO Point Int Relay Shift Register Timer Counter 30 2 37 8 49 8 43 8 115 8 103 5 66 9 12 9 N 1 34 2 37 8 1 N number of bits shifted Table 5 3 is a list and description of the data operations that can be programmed with a Series One Plus in addition to the basic ladder diagram functions listed in Table 5 1 A more detailed explanation of each instruction is provided later in this chapter Table 5 3 Series One Plus Data Operation Instructions M emory microseconds Instruction Definition Words Inactive Active DATA STORE Loads accumulator with a binary or BCD 321 9 I O IR SR value which can be a 4 digit constant or the contents of a 80 7 Register specified 2 byte reference 14 3 Constant DeSTRI DATA STORE 1 Loads the lower byte least significant of 140 9 1 O IR SR F51 the accumulator with the contents of a specified 1 byte 63 8 Register reference De STR2 DATA STORE 2 Loads the lower 4 bits of the accumulator 2 1722 l OIR SR F52 With the upper 4 bits of a specified 1 byte reference 95 0 Register DeSTR3 DATA STORE 3 Loads the lower 4 bits of the accumulator 2 173 8 I OJIR SR F53 with the lower 4 bits of a specified 1 byte reference 96 6 Register Programming 5 5 GEK 90842 Table 5 3 Series One Plus Data Operation Instructions Continued Execution Time M microseconds emory Definition Words inactive Active DATA STORE 5
18. DSTR 12 z DOR 14 N DOUT 16 z e yb E HE E N EE E FEE bj H HE e Assume data entered into the accumulator from Inputs 0120 0137 3210 e Is logically OR ed with data from Inputs 0140 0157 7531 e The resulting answer stored in the accumulator will be 7731 e 7731 is written to Outputs 0160 0177 e Accumulator and reference contents for above operation are shown below 15 0 jojoj1j1jojo 1jojol ojoj1 o ololo 7 0 7 o jo s4 1 sjoj 1 oj 1 ojoj 1 1 o o 0 1 15 O ofrtfifr1fofipifrfofofifrfofofofn Shift Right F80 e y The contents of the accumulator are S ufted to the ht hv the numhar nf ohiftc kite omnearifad ke tha waeeew a mw re Ben M Ad bd bb GA A w AARAAL L uiv ULA Vi SILULS LUIS oL IICA LI Lil instruction The number of bits shifted can be from 1 to 15 The bit positions of bits shifted fram the Aide UV Livi Lilt UHT Lo Oe valli Uv LUIL I LO 19 110 Dil POSILIOL Vi UIL SLLLLLCA OG VII Lik la ara Allard vrith marng TE lt 66192 a Alem mau AL 4m sr mm dabas AA a arde alm aL feo d mn ivit div MUCU WIL AVS ila 1 JS SOIKU Out Or unc accumulator as a result oi tne SMIT the Carry lla UE XOT s deet UNUM LE Iu ER po qM PENDET 1 pa PEE x n 5 wii turn on H after the shift the accumulator contains only zeros the Zero flag 776 will tum On F B li o a40882 d F r FUN 80 XX o r 17015 B SHE a e FT TN KN Q 1 10 f cannanra A
19. REFERENCE IL JEJE CMPR F70 The contents of a specified 2 group reference or a 4 digit BCD constant are compared to the contents of the accumulator The result of the comparison will cause one of three special purpose internal coils to turn on depending on whether the accumulator value is greater than gt equal to or less than lt the value specified by the reference or constant a40862 Valid Group References 000 014 UO Points 070 075 1 O Points 016 036 internal Coils 040 056 Shift Register Coils 500 576 Data Registers 8 bit 600 677 T C Accumulated Value Registers 16 bit gt p oos DOE Hm sat GROUP REFERENCE F IL IL 4 DIGIT CONSTANT Loen 004 999 PR ODO oO ng Kai o 3 USER nn EA O a on d a ugs S ng Speg s I E Q O IN E 9 amp vt eo an N E E SC E Ed EE Q Eas 2 o e TC Oc s R L wo fp MR N a 9 5 S e Q E Y S 4 e BN b d qh l ES SCH SO Sha gt d 20 E 5 SES oy 5 BS SEI E eg x 5 e 1 Ma FL z Q 9 K i 5 el Je q y bs ze r gt o o 4 ALe x 20 C a CR 2 a r1 x 00 O x Q O y H x x O N p 86 2 Q x A aj c e 2 x _ e i B 4 pu d Bop E Lt eT zy o E ad S ER e H mm lene O E da BIG te AG E ax O O e sl bi pros j 4 KC T O T S Eege d AK P Jm a eS NG B BT EN H ad fa E
20. Series One family 5 2 Programming GEK 90842 Table 5 1 lists the basic ladder diagram functions for the Series One and Series One Plus A more detailed explanation of each instruction can be found later in this chapter Execution times in Table 5 1 are for Series One Model E Series One Plus and Plus 3 7K only Execution times for Series One are listed in Table 5 2 Note that in the table I O I O points IR Internal Relay SR Shift Register Table 5 1 Series One Model E One Plus Basic Ladder Diagram Instructions Execution Time microseconds For Series One Plus Memory Instruction Definition Word STR START Start rung with a N O Normally Open contact 1 6 6 6 6 I O IR SR 50 9 150 9 Sequencer STR TMR START TIMER Start rung with a N O contact referencing a 1 103 10 3 timer STR CNT START COUNTER Start rung with N O contact 1 10 33 10 3 referencing a counter STR NOT START NOT Start rung with a N C Normally Closed 1 9 1 9 1 1 O IR SR contact 61 5 61 5 Sequencer STR NOT TMR START NOT TIMER Start rung with a N C timer contact STR NOT CNT START NOT COUNTER Start rung with a N C counter 1 12 8 12 8 contact Add a N O contact in series with the previous contact 1 5 3 5 3 JO IRSR 6 2 59 1 Sequencer AND TMR AND TIMER Add a N O timer contact in series with the 1 5 3 5 3 previous contact AND CNT AND COUNTER Add a N O counter contact in series with 1 5 3 5 3 the previous contact AND NOT Add
21. The normally open contact referencing the output would close and become a seal contact which would maintain the output in the on state even if the limit switch wired to input 4 were then opened The output could be turned off in this example by momentarily closing a switch connected to the closed contact reference 5 Since this is a normally closed contact 1t would open when the switch is depressed and the output would turn off This logic is commonly used as a motor starter Entering a Simple Timer Rung Next enter two rungs of logic the first ending with a timer having a preset value of 30 seconds The second rung has an output controlled by the state of the timer coil When input 11 is closed the timer begins timing up from 0 towards the preset value of 30 seconds When the accumulated value of the preset reaches 30 the timer coil will turn on contact T605 will close and output 25 will turn on a40347 I T605 Programming 5 21 GEK 90842 Basic Relay Logic Motor Starter With this background on the basics of programming a Series One and Series One Plus PC Figure 5 5 provides a simple example to illustrate relay ladder programming The references used were selected for illustrative purposes and can be adjusted as necessary to meet your application needs This is a simple motor starter and seal circuit An input module is assumed to be installed next to the CPU 005 start pushbutton input and 006 stop pushbutton Adjacent to th
22. Timers and or 64 2 Counters 1X2 400 577 Data Registers 16 bit Series One Plus onl y 64 3 124 Total if T C references used as data registers Special Functions 1 Retentive upon power failure 2 Total maximum number of Timers and or Counters 3 Shift register and data register references are identical however shift registers operate on bits while data registers located in a different area of memory operate on bytes 4 T C references 600 673 can be used as data registers if they are not referenced as timers or counters Significance of Input Output References I O modules can be placed in any mix desired however once installed the exact reference used in programming is established by their physical placement In other words references are assigned to each location by the operating system in the CPU and therefore are fixed for each location As shown in the example in Figure 5 1 the modules are numbered from zero adjacent to CPU towards the left through all racks until the last module is reached at the left of the last rack The exact reference is obtained by appending the circuit number 0 7 to the module number Circuit numbers depend upon the terminal to which the field device is wired as discussed in Chapter 6 Table 5 6 summarizes available I O references for 8 circuit modules for your convenience This table can be reproduced locally to form a part of your system documentation Notice that whether reference 005 is
23. Unit CROSS REFEREMEE PENA OUTPUT REGISTERS USED TABLE V2 2 SERIES ONE PLUE SR 21 PAGE 0088 OUTPUT 090 001 enm 003 004 905 906 097 18 011 812 813 014 815 970 871 972 873 974 675 GR INTERNAL RELAY 015 m7 008 821 822 823 874 025 26 027 31 a2 833 gu 835 836 837 SHIFT REBISTER 041 84 043 MA DE 86 9t 658 i p 063 054 855 856 057 DATA REGISTER aaa 418 420 430 448 458 469 IR 301 411 421 431 441 451 461 an 202 412 422 43 442 452 462 an MW 413 423 433 443 453 463 473 MA 414 424 434 M44 454 364 474 M5 415 425 435 445 455 465 475 406 416 426 436 445 456 466 76 407 417 427 437 447 457 467 411 500 510 520 38 GP 558 569 57 581 611 t 521 531 541 551 561 571 p 512 522 532 542 552 562 57 545 513 523 533 543 553 563 573 SM 514 524 534 544 554 564 574 586 515 525 535 545 5bb 565 575 s55 586 536 536 546 556 566 576 7 M7 527 537 gp 551 567 671 k Figure 4 9 Sample Outputs Used Table Printout continued 5 38 Programming GEK 90842 pc s1 83 0022 030 T600 T600 O 5 STR 030 AND NOT TMR 600 T600 C601 TMR 60 8 STRTMR 600 COUNT ANDNOTCNT 601 031 STR 031 CNT 601 8 STR 1 601 033 60 C OR 601 OUT 033 60 STR 601 2 6 OR 034 601 601 034 AND NOT 601 L ot 2 OUT 034 2 5 T 034 STR 60 OR 601 BEE 5 601 035 OR 601 L OR 601 4 W 8 601 OUT
24. an input or an output depends upon which module is inserted into the YO slot adjacent to the CPU Refer to the Series One family compatibility guide in Appendix C for additional valid I O references per physical location of modules Programming 5 9 GEK 90842 a40797 i jJ 10 SLOT RACKS EXAMPLE SFRYS ONE PLUS pc s 1 83 0068 03 02 01 SLOT NUMBER 30 37 20 27 10 17 VO REFERENCE 130 137 120 127 110 117 100 107 5 SLOT RACKS EXAMPLE SERIES ONE Figure 5 1 I O References Per Physical Placement for 5 and 10 Slot Racks NOTE The addressing of slot 10 in a 10 slot rack is determined by configuration of the two bridge connectors on the rack backplane 5 10 Programming GEK 90842 Table 5 6 Summary of I O References for 8 Circuit Modules Module No Circuit No Reference In Out Device Name Wire No 000 001 002 003 005 A EE x i co BD 1 enn c5 b i O IDa PR DOK c 1 O OY 4 ON cC ID oP Ne C IR TR O PO c 1 O Ov 4 ON H QO Programming 5 11 GEK 90842 Table 5 6 Summary of VO References for 8 Circuit Modules Continued Module No Circuit No Reference Device Name Wire No IS E V CS bi ol lt q En Q i ON G Gv R Gabi OCPNIaANAWNK Of N GH UB ON Oo NA o d ON O NGA QA gt DN O 5 12 Programming GEK 90842 Table 5 6 Summary of I O References for 8 Circuit Modules Continued Module No Circuit No
25. any one reference can prevent the coil from energizing Similarly vertical contacts are in parallel and programmed as ORs Thus line 2 is described as D or E or F will energize coll Y Any one reference can by itself energize coil Y In the Series One and Series One Plus PCs there is no internal limit on how many contacts can be placed in series nor how many in parallel However as a practical limit for simple programming and system documentation it 1s recommended that a horizontal string be limited to nine contacts and one coil and a vertical array to seven parallel lines a42342 CONTACTS A B C X VA RIGHT COIL POWER RAIL T LEFT POWER RAIL Figure 5 4 Typical Ladder Diagram Concept of Power Flow One key feature of PCs is power flow This is a conceptual flow of power used to visualize the operation of coils timers counters etc Referring again to Figure 5 4 the left hand power rail can be envisioned as hot connected to 115 V ac or 24 V dc and the right as its associated neutral connected to 115 V ac or 24 V dc The coils e g X and Y will be energized if there is a path for power flow from the left leg to the coil placing the full potential across the coil If there 1s no power electron flow the coil will be de energized OFF Power always flows from the left towards the right and will pass through normally open contacts if their references are energized ON or normally closed with de
26. bad parts produced This data can be readout and reset via the programmer whenever desired such as each shift day week etc Forcing I O References An invaluable tool in the verification of user logic and field wiring is the ability to force I O references The operation of the I O forcing operation is dependent on the I O reference being forced Inputs connected to external devices can be forced on or off for one solution of user logic All other I O references can be forced on or off indefinitely but are overridden by user logic The most frequent user of the I O forcing function is for verification of field wiring of outputs Since user logic overrides the I O forcing function it is recommended that this operation be performed with user program memory cleared The key sequences for forcing I O references are as follows e To force a specific I O reference ON enter the sequence SET SHF XXX 1 0 reference ENT e To force a specific I O reference OFF enter the sequence RST SHF XXX V O reference ENT When forcing input points with the set or RST sequence be aware that the physical state of the input may be overridden If the forced set or RST occurs in the user logic program before the input is checked in the same I O scan the set or RST state will take precedence and would cause an output to be turned on or off at the wrong time Programming 5 43 GEK 90842 SECTION 3 Data Operation Instructions for the Series One
27. basic building blocks for a relay ladder diagram The instructions reference discrete bits that are to be part of an operation that is a conditional contact or the end of a rung which could be an output or an internal relay How to Begin Programming The easiest way to begin feeling comfortable with programming a Series One or Series One Plus PC is to enter one rung of logic with contacts in series that control a single coil Physically connect input devices pushbutton switches limit switches etc and an output device such as a lamp to the corresponding terminals on an input and output module in the PC turn the inputs on and off and observe the result on the output device Entering a Rung With Series Contacts In the following program sequence a rung of ladder logic is shown then the keystroke sequence required for entering the logic Notice that when entering a numerical sequence the SHF key must be depressed before the number or number sequence In the example each keystroke is separated by a comma Numbers with more than 1 digit are grouped together for ease of interpretation Turn the mode keyswitch to the PROG programming position in order to enter the logic Enter two normally open contacts 1 and 2 in series controlling the state of an output coil 17 Both contacts must be closed to tum on the output 2 17 When input devices wired to inputs 1 and 2 are closed output 17 will tum on The operating state of the
28. end the master control the MCR function is entered returning control to the next power rail to the left and conventional logic can now be built Unless both references 003 and 005 are energized ON in this example coils 052 271 and 265 will be OFF When these contacts are passing power coils 052 271 and 265 will respond to their normal logic Multiple Master Control Relay Functions Multiple master control functions are possible in any logic program They can be embedded within the scope of the first MCS and the last MCR as necessary as illustrated in Figure 5 14 The first group of coils under the Master Control of references 010 or 011 is 204 213 which includes two smaller groups 207 210 and 212 213 Group 207 and 210 are under the Master Control of 010 or 011 and 015 while group 212 and 213 are controlled by 010 or 011 and 022 Note the requirement for two successive MCRs to end both the group 212 213 and the larger group 204 213 To operate correctly there must be an equal number of MCS and MCR functions in your program Programming 5 29 GEK 90842 pc s1 83 0013 STR 010 010 mcs 204 e e MCS 204 011 012 205 STR 012 CJ OUT 205 STR 013 013 014 206 AND NOT Ote S STR 015 MC 015 mcs 016 207 STR NOT 016 OUT 207 je 012 1 012 210 SCH 210 STR 023 AND NOT 02 7 211 STR 022 1 211 023 mcR 02 MES J MEN 212 022 MCS 024 212 STR NOT 025 a ANO NOT 026 T 213 MCR 025 026 213 CR STR 030 AND 031 OR 633 030
29. o po mn O oct d Sg ae e 3 9 e oe Di SG Sr E 25 RE as iR B lt Pos besa sst se 335 F 5 BEBE EBSO TE BHR REOR 3 d 3 zi ACES E gt SES H 43202 H E ROR 4 0298 2 Y gt in O a bo 2 r3 tT D o ET gt Ko AD oO dat O y 2 opa pi 49 89 S 9 455999 ap haa exc O Bel Le o MA A 1 D o 2 E A oi Sg A Za O Op 8 e 8 og 2 5G D a QN Q Ge CG O o a et a Pos 28G 5825883 Bus g ds ge 5 O I up zi 4 TS e 0 M48 28 GOL DU 3 ENG t Ez 0 CG ts 0 c v m A i o el C om ike 4 js O w og Y W e Q E D to 1 ua RB 9 1 ka 0 E 4 O e vi e C lt 300 9 a c o E ESO Oa Ret E Hd O BR a e EP e RN E A S 9 E br Q o o 6 5t 6 0 Y m CB OG Kb Sg g ES t m YE c i oH Q 720658 HO ng lt AE od y 2 EP EY 905 E 3 Gb a P P gt z O S mb lt VOR OP 4 o f a ae amp 0 SBN AOS 2 878 e rd my el a A e O Q T 5 naba Sagaayak GB E 8 8 R 8 OR BS A E OE O 5376 Bud e EP FEE ease 2 BE o oz OR 5 a q O QA S E Tr i o Ld E DAC amp i QU 2 c 4 A mb D O mg Ng O KE Se E q O ZS Ka 23 o D our dud po S O E ud G H go d SD Be GRA ng o C H St Psa g oO pa BR pako dot c gage cma 4 E Kg ra otc Q 0 rr Q 2 O Fw E BER pi San gs ews 8 O8 E soc o O OY E o 0 3 E ed 4 SPAS 80632405 aE 9 Shes 8a Jas td EERE EE H Ba SE BS at a gin r
30. of the logic scan the CPU gets input data from the input modules and provides new data to output modules Next the programmer if connected is serviced by making logic changes and or updating its display After servicing the programmer the CPU performs a check of its internal hardware and resets the watchdog timer The watchdog timer is a hardware timer set at 180 msec milliseconds to ensure that memory Or internal circuit faults do not cause the CPU to enter an endless loop because of hardware failure If a scan 1s not completed at least once every 180 msec typical maximum scan is 60 msec the hardware will shut the CPU down turning outputs OFF Finally any forced I O will be entered With successful completion of the internal checks the CPU goes back to the start of the scan and continues its scanning sequence with the logic function entered at address 0000 This repetitive scanning operation is performed from the time power is applied to the CPU until it is removed Total scan time includes user logic solution time plus overhead The overhead time includes monitoring functions I O updates and housekeeping tasks The typical scan times listed in the specifications in Chapter 1 assume that only basic instructions have been programmed AND OR STR NOT etc they do not include overhead The overhead time is about the same 4 to 5 mSec for Series One and Series One Plus This time must be added to the logic solution time to obtain the total
31. operation of the CPU can be useful The majority of Series One and Series One Plus applications can be solved and the programs developed without consideration of the internal structure of the CPU How ever some applications can be more efficiently solved if knowledge of the CPU operation 1s applied while the program is being developed The basic operation of virtually all PCs is referred to as a scanning function There are many hundreds of decisions to be performed in any program and the CPU cannot do all of them simultaneously Similar to any electronic processor it performs its operations one at a time However the speed of performance internally makes the external results appear to have all Operations accomplished at once Scanning The term scan is a method of describing how the CPU performs its assigned tasks see Figure 5 2 It begins at the first function such as a relay contact entered into the beginning of memory address 0000 It proceeds sequentially through all memory addresses performing all functions entered by the user for example relay contacts timers latching relays counters sequencers shift registers etc until 1t reaches either the end of memory address 1723 or the end of the program as entered by the user During the scan the logic sets or resets coils according to the instructions entered into the logic program by the user The status of these coils is immediately available to the next logic function At the end
32. option programs can be entered in ladder diagram Format using the Portable Programmer This applies to both the Series One and Series One Plus You can also enter programs with the Workmaster industrial computer using Logicmaster 1 application software For information on using the Workmaster industrial com puter for programming refer to the Logicmaster I Programming manual GEK 96632 for Series One For Series One Model E Series One Plus and Series One Plus 3 7K refer to GFK 0075 which is the Logicmaster 1 Family Programming manual How to Use This Chapter This chapter is divided into 3 sections Section 1 is a description of the requirements for programming Included are lists of all of the programming functions and a table of programming references assigned to each slot for 8 point modules The purpose and types of references are explained including real world use and internal use A basic explanation of the scanning operation of the Series One and Series One Plus PCs is given The scanning process is the basis for operation of all PCs and the user should have a good working knowledge of this operation The next 2 sections are devoted to programming Section 2 describes and gives examples of the basic ladder diagram functions Section 3 provides the user with a descriptio f the data operation functions for use with a Series One Plus PC The data operations greatly extend me number and complexity of applications possible with the
33. r U 4 Be s tr a e x o PI x E 3 8 X 7 x O 3 2 x O tad 4 E 1 d Ke e O 4 ul x Q O 5 5 Fi o gt O A ud a 2 N I 2 c v r od 5 a A gt O lt 0 O S a SSES pa N O c r O O re E _ esi L E O uj p O EN gt FRE 9 T e 2 ezo Sa Q Om E D ERR ko 55 ox e sf E 3 O on SR So g zu gt le 2 Fe E us e m C AQ H O EEFT B q a ae 6 lt a C 2 r p e e 99t5ad I 5 2 pa Ub 5 D 9 rC Y lt O e zi Q p gt lig O Pr ae O crs e RMU N Q 4 d 4 V aaa EE ch Og REFS o B SEI wl E T 25531 o J O SCH O O O O u gt N ud B AN a im I e D D f i mer EE AE B ua ov 3 8 2 S5 a e o S Q O e 3 ei a ed M H Q E EM EE a u Ee E 5 3 ED T 3 lt x oe OS un TES Se E Bel e o F del NR B lt 35 E 25 o e ER a E oi 2 GE So a BG Op n ng B E W i oer Q ar as ng p is 5 x F a Ans HB vi E EB 208 2 209 z x0 4 og ul e O Am NG Q 4 o fm FO 5 52 Programming GEK 90842 DeOUTS F65 DeOUTS is a 2 word instruction which when executed will write the contents of the accumulator to a 2 byte reference which must be a 16 circuit Output module a40861 ACCUMULATOR 16 POINT OUTPUT MODULE REF 100 REF Valid Group Reference 000 005 16 Point Output Module FER 4 How JA GROUP
34. real scan time Programming 5 15 GEK 90842 In order to achieve the maximum scan time the monitor function should be disabled for both Series One and Series One Plus programs since the monitor function adds about 2 mSec of overhead time when it is active Also the overhead of a Series One Plus is increased slightly when communicating through the DCM since both the Series One Plus CPU and DCM have been designed to provide a much higher throughput than the Series One CPU DCM combination Additionally timer and counter instructions in the Series One Plus are slower than in the Series One because of the ability to use registers for preset values The scanning operation is very basic to PC operation and should not be overlooked It provides a very useful verification of the CPU s reliability For details on troubleshooting refer to Chapter 7 The scanning operation also provides a fixed and definable sequence of logic decisions Functions are solved in the order programmed The results of one function for example coil timer shift register etc are immediately available internally to the next logic element In larger complex logic programs internal races can be eliminated The user does not need to be concerned with the time delay relays required to pullin or activate nor their variations for example a 4 pole vs 8 pole relay pc s1 83 0004 SERVICE VO SERVICE PROGRAMMER RESET WATCHDOG TIMER ADD FORCED Vb Figure 5 2 CPU S
35. tmn rm LO pi ov uen Laken GR AASS AS AAS AA EA IS PA Tarn TY rx gt l A Cu gt UE o id aN ine outputs irom the sequencer are programmed using relay logic MOwever the reference 1s nrst to the counter 601 controlling the sequencer and then to the current value that is going to control that contact For example if a reference to counter 601 is desired that will pass power only when that counter has a current count of exactly one the value 1 is entered after the reference to 601 on a normally open contact Tos AU PASAR e Ka DN f ILAAN ee h Oe AAA oa ASKS eA Oe ADV 4f 4 4 1 2 4A uns CAdIIple VULPUL VJJ UTA USUL WIU DE cnergL200 aure 2 SELUNG HIICI Vdid Cadi 101 SEEDS U 1 and 6 Similarly output 034 Output 1 will be energized at step 2 sealed and held until the beginning of step 5 end of step 4 The other outputs are controlled using similar logic with parallel contacts or seal in circuits Y ae Aarts ART LAS as tarse than TAA AACE dass Alem AA xem TI neon La a aio li ro 11 al Output 15 WIN 101 IMUIC SLCpS Ulali it VIT NOMNAULY CIOSCU CUI LS WUUIU pIUUGUIy SULpIly youl logic Counters can also be used that are driven independently and not with a time base 7 aa Orn nr Chi Damctar in a Caras ima Dine nr Camac f ne Dino 2 TY DC that YV Lk A PI VERA LM dla amp a WUULIL VA WA 1344111 ING E tud HI a IJUIIGD WII I US VI SUULIGD NI I IUD Jo JAM 1 WIG taria dai TY ATPSDYVUYTL IK AAA a Tihe Comrie a a da e na
36. to each of the data operation instructions and are listed in Table 5 8 After the F X X number has been entered the program address will advance 1 step and the second word data entry should now be entered The data entry is selected by entering SHF X X X X for a constant value or R X X X for a group reference ERT weg T S FEE of 3 gc Q al E sg C d wl 13 P 5833 E m 2 n H Y e O o INV o D tA O a 3 A d at 3 mn dt u O ed N o 8 90 Ng tS E y Z EEEEEEEEEEE 95 SEA Le d Ha E g b x tj f af E E QA e E 1 29 E d iov S AN s q gt amp 5 Ba gH o Hck Z en a pa A me c H 1 E mg pe f E f 4 O c a O E 56 St O 5 Sie 58 d 3 N amp de HOOS Q m 2 m un mw E 7 f 5 Q pa UW band Q k 208 vg 4558 Sliays ba J 3 n Y Er Q gt Get 88 FT omo coms pet E St Flzel Ba e E MESSE 9 vd8 ul d rey Ka 1 Q d 5 O ka o O gb a e j D um AA O z a S q F298 o E m e A A Ag y on 4 ei mg i Q c3 e gl ima o A 9 q e s d O o e Q lt a 3 z O a A B p na E d 4 f Q sin E Q Q 5 rPZoks GE 4 BEES SH ER ERA GOR dt e g 2 oR 6 B jl pope porc og SY 85 ua 67 S Ap 55088 E awn g o a o OQ A 4 B A z T c e 4 Oo O d zi e 3 f A di Q c amp B LETE CENE Ke S CH a g B i e o qO E O Yuu x O PRERRERER Sy B58 igg 5 B528 B 7 I em age NO ps p e re
37. 035 STR 601 5 3 601 OR 601 OR 601 J 7 601 OUT 036 STR 601 5 8 OR 601 601 036 6 O OUT 037 3 STR 601 1 601 OR 040 AND NOT 601 4 DEE 7 601 OUT 040 7 601 037 5 601 6 601 601 040 1 7 040 Figure 5 23 Typical Sequencer Logic Shift Register Functional Description Another powerful feature of all Series One and Series One Plus PCs is the ability to simulate the operation of shift registers There are many physical devices that operate similar to shift registers such as an anchor chain a conveyor belt an indexing machine a line of customers at a refund desk etc pd Y e 4 v A mg Le ch EEE LEVEZE HEY 3292 AGA RBG SAG bo Qu H REM ge HB ok 0 rd Be bb cod pong M o e L i Y m so Ep ES co et 206749 g Hu c 8 Lg aeg539 cH jaya Poy Po P nd S 2 8 9 8 6 G d BI33202 pow nOg EEEE PELOS gan m r HO Ad 5 oo i gRAT s r 34G S EBO i Og e 5 8 Y pa MG 5 SG Boks Q BZ m E 22358287 lt Sed gare esa Hegli 24 a el v ln O Qu O E e N I M 9 O m3 5 ed f J gt 00 C O 3 E E O org 9 O Q gt k O O A d E c B Ye o O E O Q o 4 ES f 8 a E z fa dei G E Y a d Seo o H bb a E lt m o pR SRA Zo n PENDOS SBS Bros un O e O pat mam t gt gt O YU c O X bh DB O i mS poong Cong EN Ach z ov T NG Boa ES OG P S 040 Bag A DER po ZS Or dE ooo enter 00 400 3 a 2 0 D j o e o pra 055854 shop aa
38. 76 Data Reaisters 8 bit 600 677 T C Accumuisted Value Registers Ke A SEE PE CONDITIONAL Ir lI 9 PANTAMT bod ee LJ Ww NETS Pile _ GROUP J Y PEE AAA A REFERENCE T 1 L Vo NAN y pn pay pay pa I nii B LIL Jl JL 4 DIGIT CONSTANT i Eu E cl L l D STR xxxx bob T L Y DITA ASAI VIE EA A 5V PWh id lo Un J 5 48 Programming DeSTR1 F51 This is a 2 word instruction which when executed loads the lower 8 bits of the accumulator with the contents of a specified 1 byte reference The upper 8 bits 8 15 will be zeros a40853 is Bl Hl ACCUMULATOR 1 0 Points UO Points internal Coils Shift Register Coils Data Registers 8 bit F 5 0 Hasta 00 4 GROUP REFERENCE RUDO DeSTR2 F52 This is a 2 word instruction which when executed loads the lower 2 bits of the accumulator with the upper 4 bits of a specified 1 byte reference a40854 ACCUMULATOR I O Points 1 O Points internal Coils Shift Register Coils Data Registers 8 bit 5 2 HL per ox 4 GROUP REFERENCE GOOD Programming 5 49 GEK 90842 DeSTR3 F53 This is a 2 word instruction which when executed loads the lower 4 bits of the accumulator with the lower 4 bits of a specified 1 byte reference a40855 ACCUMULATOR Valid Group References 000 015 1 0 Points 070 076 1 0 Points 016 037 internal Coils 040 057 Shift Register Coils 400
39. ANDSTR ORSTR MCS MCR OUT SET SET OUT RST SET OUT RST ONE PLUS ONLY TMR CNT SR DATA OPERATIONS D SERIES ONE PLUS ONLY DeSTR F50 DeSTRI1 F51 DeSTR2 F52 DeSTR3 F53 DeSTRS F55 DeOUT F60 DeOUT1 F61 DeOUT2 F62 DeOUT3 F63 DeOUTS F65 ARITHMETIC gt lt F0 F71 F72 x F73 F74 LOGICAL DeAND F75 DeOR F76 INV F84 CONVERT BIN F85 BCD F86 Shift Right F80 Shift Left F81 Decode F82 Encode F83 SPECIAL External Fault Diagnosis F20 Significance of References Whenever programs are entered into any PC they must be accompanied by reference numbers These references help to tell the CPU which function 1s specified For example which pushbutton controls the starting of which motor Which timer are you referring to Reference numbers are a vital part of programming and in the Series One and Series One Plus are octal based that 1s they start at 0 and go up to 7 then jump to 10 at 77 the next value is 100 They look like traditional decimal numbers except the digits 8 and 9 do not exist Table 5 5 summarizes the various reference values and their significance 5 8 Programming GEK 90842 Table 5 5 Summary of References I O points Series One I O points Series One Plus Series One Plus only Special Function Coils Series One Plus only Internal Coils Non retentive Retentive Coils Internal 28 1 4 1 Shift Registers 128 1 600 677 4
40. CONTAIN jojofofofofofolololofolol rTolo o penner WHICH IS DECODED TO A DECIMAL NUMBER A 1 WILL BE PLACED IN THE ACCUMULATOR POSI TION CORRESPONDING TO THAT DECIMAL NUMBER ALL OTHER POSITIONS WILL CONTAIN ZEROS 115 14 13 12 11 10 8 8 7 e 5 4 3 2 1 06 Lo ojo ojojojo sjojojo o ojo o o e If the BCD digit to be decoded is an 8 A 1 will be placed in the accumulator at that position as shown e Programming example FUN 82 240886 1 sta s 1 ev EE 3 D E 2 EJ 1 2 ev D OUT 4 MMM MOE 40 pas 58 E E EJ er MO O a u H Pot 1 our s CTT EJ e e A BCD digit for example 6 is loaded into the accumulator lower 4 bits from the lower 4 bits of the reference Inputs 20 21 22 and 23 The bit pattern loaded in the accumulator would be 0 1 1 0 e The BCD digit is decoded to a decimal number between 0 15 in this example 6 e That number is stored in the corresponding bit position in the accumulator e Outputs 0040 to 0057 correspond to the 16 bits of the accumulator One of the outputs will be enabled when the accumulator position has a 1 placed in it When the contact corresponding to the output reference is closed a coil 100 117 will turn on 5 68 Programming GEK 90842 Encode F83 A bit in a position in the accumulator is encoded to a 4 bit code representing the position number 0 15 in the accumulator The resulting 4 bi
41. Chapter 5 5 1 Programming GEK 90842 SECTION I Introduction to Programming General Information The Series One and Series One TM Plus are easy to use small PCs with many advanced features One of the advantages of these PCs is the ability to be programmed or tailored specifically to the needs of an application Furthermore if requirements change the PC can be reprogrammed to fit the new applica tion This chapter provides the information a user needs to develop or modify the logic within the Series One or Series One Plus It will discuss the basics of CPU operation necessary to develop a proper logic program the theory behind each function examples of how that function could be used and step by step entry of sample programs Planning a PC System When planning a PC system the first step should be to define the system by writing a description of the functional requirements for that system A description would usually consist of block diagrams and written descriptions of the various parts of the system Input devices should be defined along with the process or machines to be controlled The next step would be to develop the program required to control the system On a sheet of paper layout each rung of your ladder diagram and assign references to inputs and outputs The program can also be written in mnemonic form Boolean which is how it will be keyed into the Series One or Series One Plus when using the hand held programmer As an
42. D T4 T2 3 Ta T2 e T4 2 3 e T4 T2 T3 e Ta L2 eT T2 ACCUMULATOR WILL CONTAIN LOWER 4 DIGITS DIGITS 5 8 ZERO FLAG e The lower 4 digits 1 2 3 4 of the answer will be stored in the accumulator The upper 4 digits 5 6 7 8 will be stored in the auxiliary accumulator Data Registers 576 and 577 e If the answer is 0000000 the Zero flag 776 is ON Programming 5 59 GEK 90842 e Multiplication programming example Multiplying 4 digits by 4 digits with an answer containing 8 digits 240872 I DSTR5 sra sur 2 X 1375 FA JER ed be D OUT 14 3 Ej Cs D STR 576 pere D OUT 16 CJ L 5 0 5 s fer 5 5 Ls PD e A 4 digit BCD value is entered into the accumulator from Inputs 0050 0067 e A constant value 1375 1s entered as the multiplier e Assume that the answer is an 8 digit BCD number The lower 4 digits are stored in the accumulator and transferred to Outputs 0140 0157 The upper 4 digits are stored in the auxiliary accumulator Data Registers 576 577 and transferred to Outputs 0160 0177 dB Division 3 BCD 4 Digit F74 The contents of the accumulator are divided by the contents of a specified 2 group reference or a 4 digit BCD constant The 4 digits of the quotient are stored in the accumulator and the 4 digits of the remainder are stored in the auxiliary accumulator Data Registers 576 577 1f either the dividend or divisor are zero the Zero flag 776 will turn ON If
43. Plus Programmable Controller Data Operations The Series One Plus PC has in addition to the basic ladder diagram functions a group of instructions that include data moves math functions logical operations conversion and external fault diagnosis These instructions provide the PC with the capability of performing various data operations This group of instructions operate on multiple bits rather than one bit at a time These instructions are not available with a Series One PC For programs requiring many data operations it is recommended that the Series One Plus 3 7K PC be used All of these instructions require that the data to be operated on be loaded stored into a 16 bit register called the accumulator The data numerical value is processed in the CPU as BCD Binary Coded Decimal Each BCD value is represented by 4 corresponding bits in the accumulator A BCD value can be any of the digits 0 through 9 When the specified operation is performed with the contents of the accumulator the result of the operation is stored in the accumulator This data can then be transferred to external outputs or stored internally to be used as needed Additionally data can be stored in registers sixty four 16 bit registers and those registers referenced when programming the data operations Each register can contain a 4 digit BCD number Figure 5 27 is a block diagram showing how the data operations are performed Registers and the accumulator may al
44. SE a 2 so PES oH0g dB 3 d o t e t Uu ba O ne Q er 3 o o E v 4 8 t o x kd 4 3 A E 2 Sagesse 3 0 SOng a A E E gt 5 g P TY 2 en Y p po tu u 4 cC b It ep m O a E E SB Ba E 158888 y erd Se e Ons se ays 5 5 9 Hos E Or Gei c a en t o ka Se c tj t re for j ed B ES Q O EN 60 c E VU grr ta 4 pag NG ud co gt 2 Q 029 QD N o D 3 52 qu e ee E E z4 4 d D y geg E z4 jt KE O O O a E 1 eg U O gt x T D O ep Q e ae b El O Bocas egaeg oe 3 8 E a8 ead a q pe gt f om eg v a g D o aoe Ss dea 3 AO B S 14898 0258 p BobHSQg o og HAr pr A g8 SEPP TERRE PLUSETE Q ET ui s a DP DA ea rf o ur a K t 5 DP ng des E E eut Ko LO Gi 1 9 9 7 E o E65 EG H a S O Q j 329 o e 3 A 2582358 ga go ou 8 HS SE e 0830335 84 G O O a Gm H b c a Q Le En C ena pha gt om Be E d O E ELE HESSA p e RG HS E 3 BG odudog D Sa gt png Oo o I o ca Be a Er E Hago Y 8 or a reset signal Programming 5 37 GEK 90842 pc s1 83 0021 TIME SECONDS o 5 10 15 20 25 30 35 40 45 x i outeur REDLIGHT i ve fen 033 OUTPUT hn 034 OUTPUT2 mia os GREENLIGHT 8 Hh e io 036 BLUE LIGHT 037 SOLENOID T 040 CTED Mi BADEN 1 9 3 A E e 3 e VILT IVWIVIVELM lt w BA y Y a vw Fieure 5 22 Example of Seanencer a w y G ekte Te wa m
45. STR provides a common series connection between a block of logic and the OR STR provides a common parallel connection for a block of logic These instructions provide the connecting links not allowed with any of the previously mentioned instructions The logic used with this type of operation is referred to as a push down stack The push down stack can accommodate up to eight levels groups of logic A push down stack can be thought of as a temporary storage area to allow the combining of elements in series AND or parallel OR connections Figure 5 7 illustrates the use of these functions a40545 pe ik si K Ee mnd fond Re CONNECTS LOGIC IN SERIES aa rm uil CONNECTS LOGIC IN PARALLEL Figure 5 7 AND STR and OR STR Connections The following pages contain a more detailed description of a pushdown stack and programming with the AND STR or STR instructions 5 24 Programming rE nV tn N _ GEK 90842 Detailed Example of AND STR OR STR The push down stack can be used for several groups of contacts either in series or in parallel and can be reused many times in the user s logic As mentioned previously the stack has eight levels or storage locations where an ON OFF 1 0 condition is stored PUSH DOWN STACK ON 1 Location 1 ON 1 Location 2 OFF 0 Location 3 ON 1 Location 4 OFF 0 Location 5 OFF 0 Location 6 ON 1 Location 7 OFF 0 Location 8 Figure 5 8 Push Down Stack Storage Locations
46. TOTOTT TOT ubi s w crkrY m cy Y Q UU D U L U J BEFORE SHIFT FUN 81 4 SHIFT LEFT 4 BITS l ACCUMULATOR i11 0lo0lololt t tlolololtlololololo CONTENTC EE rd Hao Bl SUIS he MEUM i D AN BE PAN SE 1 1 J pet S aide LAGS d CARRY ZERO IU ALL O IN THESE 77 9 170 DACGITIAAG 5 66 Programming GEK 90842 e Programming example using FUN 80 and FUN 81 This example shows a technique that can be used for deleting unnecessary data after it has been entered into the accumulator In the example the fourth BCD digit will be deleted a40884 s 7j DSTR 05005000 E FUN 81 4 CF CJ s 4 em O Usa Ea LC CJ 2 Ce 6 OD D OUT 10 e Date entered into accumulator from Inputs 0020 0037 L5 ST e Shifted left 4 bits I 3 6 2 e Shifted right 4 bits _ 0 3 6 2 e The fourth digit 5 has been deleted e The remaining value is added to the contents of Inputs 0060 0077 The result is stored in the accumulator and written to Outputs 0100 0117 Programming 5 67 GEK 90842 Decode F82 The lower 4 bits least significant of the accumulator are decoded to a decimal number from 0 to 15 A 1 is placed in the bit position in the accumulator that corresponds to the decoded decimal number The upper 12 bits of the accumulator are disregarded for this operation F 8 2 Hume 4 e FUN 82 Decode sequence a40885 LOWER 4 BITS OF ACCUMULATOR
47. The contents of the accumulator are F74 divided by the contents of a specified 2 byte reference I IR SR or DR or a 4 digit BCD constant The first 4 digits of the answer are stored in the accumulator and the remainder is stored in the remainder is stored in the auxiliary accumulator registers 576 and 577 DATA AND Logic product The contents of the accumulator are logically AND ed with each corresponding bit of a specified 2 byte reference I IR SR or DR or a 4 digit BCD constant The result is stored in the accumulator DeOR DATA OR Logic Sum The contents of the accumulator are logically OR ed with each corresponding bit of a specified 2 byte reference I IR SR or DR or a 4 digit BCD constant The result is stored in the accumulator SHIFT RIGHT FUNCTION 80 SHIFT RIGHT N BITS Contents of the accumulator are shifted to the right by the specified number of bits 1 15 Positions from which bits were shifted are filled with zeros FUNCTION 81 SHIFT LEFT N BITS Contents of the accumulator are shifted to the left by the specified number of bits 1 15 Positions from which bits were shifted are filled with zeros DECODE FUNCTION 82 DECODE Decodes the lower 4 bits of the accumulator to a decimal number from 0 to 15 and places a I in the bit position in the accumulator which corresponds to that decimal number q K 103 7 Register 55 6 Constant 345 0 I O IR SR 103 7 Register 55 6 Constant 3 216
48. WER IS 0000 ZERO FLAG IS ON CARRY FLAG iF ANSWER IS NEGATIVE BORROW FLAG WILL BE ON 5 DSTR4 sm sw 5 Ce 5 0 Ce 4 3333 2 DOUT tt E 50 0 C33 Di 7 5 EJ 7 5 e Subtraction programming example e Data is entered into the accumulator from Inputs 0040 0057 e A constant value 3333 is subtracted from the contents of the accumulator e The answer is stored in the accumulator and is written to outputs 0150 0167 5 58 Programming GEK 90842 Multiplication X BCD 4 Digit F73 The contents of the accumulator are multiplied by the contents of a specified 2 group reference or a 4 digit BCD constant The answer can be from 1 to 8 digits The lower 4 digits of the answer are stored in the accumulator and digits 5 8 are stored in data registers 576 and 577 which are the auxiliary accumulator If the answer is zero the Zero flag 776 will turn ON a40870 Valid Group References LO Points I O Points Internal Coils Shift Register Coils FLAG Data Registers 8 bit ZERO T C Accumulated Value Registers 776 16 bit 0000 9999 Constant 4 digit BCD GROUP T DDD AJH GROUP r REFERENCE CONSTANT VALUE 4 DIGIT CONSTANT i HA HE ox BCD VALUE e Multiplication sequence 240871 ACCUMULATOR 15 4 DIGIT BCD NUMBER CONTENTS REFERENCE 1 x REFERENCE 2 GROUP REFERENCE L8 j 3 2 OR 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 mm CONSTANT Ct 7 6 s 4 T 3 3 7 eTaT2 eTa 2
49. Y RESET RELAY LOGIC PRESET Dm4Z2CcoONnN Figure 5 18 Example of Counter Logic Figure 5 19 illustrates the operation of counters Again the relay logic driving the counters is built as separate rungs using normal relay programming techniques Counter 603 will count increment whenever references 015 and 016 are both ON or reference 017 is ON If one parallel path is energized while the other is also ON no additional count is recorded When the count reaches 35 its preset coil 603 is energized also energizing coil 46 Counting will continue beyond the preset value and will continue counting until the counter is reset Whenever reference 013 is energized regardless of the count or top rung status or coil state counter 603 will be reset to zero and held at that value until reference 013 is de energized Programming x m lt STR m 4 BUHR N AND z AUER ELIE ON LED S STR STR SHF STR SHF STR SHF ADR AND AND SHF AND SHF AND SHF ADR OR OR SHF OR SHF OR SHF ADR DISPLAY KEY STR skr 1 OJ 15 3 0001 CNT sur 1 Ce 16 0 0002 3 ENT EF 1 3 v Ls 0 003 ent ON LED S STR STR SHF STR SHF STR SHF ADR CNT CNT SHF CNT SHF CNT SHF CNT SHF ADR SHF SHF SHF 015 AND 016 OR 017 STR 013 CNT 603 035 STR CNT 603 OUT 046 1 14 WORDS PER ELEMENT DISPLAY KEY ON LED S DISPLAY STR STR CNT 1 Sw STR CNT SHF 13 6 STR CNT SHF 6
50. a 1 c wn avamnla a Wan UN iiiki Nabi OU bussed AM nititio AA VACIA iv ACCUMULATOR 01 111 11 1 0l 0 110l0ol l ol 1 lol 1lolitl ALA iE L UL UL UL ee EE L NA I U I I IL A l lj DEPUME Sonir i TWIN PG y 6 BITS A A a a a a A m a AO in ATA L IVIVIVIUMIUVIVI FT Tg U OJ 11010 pa E NAAA Me NS T CONTENTS I AFTER SHIFT Y MANE S ALL O IN THESE POSITIONS FLAGS nFT nF CARRY ZERO 775 776 Chift Ta ely bAARRU AVAL ya VA Tha nantas enr m tka anari PORRA CA Kan 41 1 5 1i 41 1 1 n su LN a a D i ne ICITS OF MME accumuli I ai SILLLCO LO in CIL Dy the number or SMITS DITS specined Dy tne Landre A gt TL ea CS od L s8 1 4 4 m rr lt e e a e e oe v 4 truction ihe number of bits shifted can be from 1 to 15 The bit positions of bits shifted from the ee 4 x T1 O e re Za 08 lt om lt pi m D ana paa ght are filled with zeros If a 1 is shifted out of the accumulator as a result of the shift the Carry fiag 775 will tum on If after the shift the accumulator contains only zeros the Zero flag 776 will turn on F B li 1 a40883 I I Pi z See O 24 Fi FUN 81 XX o paman I TO 15 dg L and SHF i yl a IN 81 Q 1 le carmanra chifro in awametla Wan Za WILL AVAL IUUUVIING AT DILLLEO All v 0414 Aw J ACCUMULATOR PAPA WEE NG PA PAG Dep NA NA NA PG NAG Na AG CONTENTS Of TTOTTITTOLTOLOTOTTTTLO
51. a N C contact in series with the previous contact 8 4 8 4 I O IR SR 60 3 Sequencer AND NOT TMR AND NOT TIMER Add a N C timer contact in series with 8 4 8 4 the previous contact AND NOT CNT AND NOT COUNTER Add a N C counter contact in series 1 8 4 with the previous contact Add a N O contact in parallel with the previous contact 6 6 6 6 1 O IR SR 6 2 60 3 Sequencer OR TMR OR TIMER Add a N O timer contact in parallel with the previous contact OR CNT n COUNTER Add a N O counter contact in parallel with the previous contact OR NOT Add a N C contact in parallel with the previous contact 9 1 I O IR SR 62 5 Sequencer OR NOT TMR OR NOT TIMER Add a N C timer contact in parallel with 9 1 the previous Programming 5 3 GEK 90842 Table 5 1 Series One Model E One Plus Basic Ladder Diagram Instructions Continued Execution Time microseconds For Series One Plus M emory Instruction Definition W NEN Active OR NOT CNT OR NOT COUNTER Add a N C counter contact in parallel with the previous contact AND STR AND STORE Connects a logic group in series with the logic group preceding it OR STR OR STORE Connects a logic group in parallel with the 35 logic group preceding it MCS MASTER CONTROL START Begin control of a block of 50 logic with a master control relay MCR MASTER CONTROL RESET Ends control of a block of 3 0 logic with a master control relay OUT Defines a coil for a rung of logic either an
52. b 3 BEAR DESC ows y ke Ka G m V 8085 Et Org A HOE oe a HO Qu u s En pr Sa S60R8 3 wk Ki a UL RR a 6 3 gt E s amp E Y O i Do S Q ben O QD m4 O d E I E ui Ah ka d Q a ei e pak penn gt U t o g e Fo ome G ku s gt P D 2i N A O A 5 e D a o on ver 1 UB dog e BR Cages Ec a Sa 9 S h del e pu la a A y O O o is on 9 Oo pa i A O O O e en 2 o T O z gt E 8 8 e KE kat B z B Eg Es 2 og E O ku ng e pas oc rer s 8 S BRHOLAHS mad ENa HE Gwe Oud eB A BE 800233 AE o RHO O e 3 4 k E e Kl 338588825 8 224287 282 583258 Saeed 5 oak amp pu 942 Esper O mM 3 Q C0 kt gt em O a un od ORO E o D t O nm O gt G OD E A EM Y gt oF DOG Eng en ge Ov2 do HS z e Edi Que a eet D ba DO c td c TO e E o EI 60 U o 4 pf m E ua y 3 bn v Q 4 Oo e e D e A l d E SE E ei r un 4 e O 3 O oD 4 e ge H dd uw d E O Yen X c 9 EG An 8 8 9 9 8 Asia 5799 88998 d GO road 5 N pa S po a O A t c o A A AQ 7 x Q Oe r A Y rd gt E E 43 E 4 P E o 9 gt o o 9H bb d o Er 5 OG GE 2 0 ak gt a g Bag K dS 95590 o 4 d c3 E 1 lt m O e S 3 a 14 DN n DQ ka e a Ba E Fi wi FU Q q S D E E on 13 Nn VO th 0 ng 9 8 4 5 9 o 8 O 9 pa SD BG BOS 5 9 E Qa ei h q pf y E ci pna o O 15 NO A i o 7 E N xm 4
53. canning Sequence Programmer Functions The basic programming language of the Series One and Series One Plus PCs is a simple relay ladder representation based upon standard Boolean functions AND OR and NOT Throughout the discus sion of programming examples will be used to illustrate the function described The illustration of the Programmer Figure 5 3 will be used as a reference for these examples and specific key sequences will 5 16 Programming GEK 90842 be provided so that the user can follow and demonstrate the example A short hand notation will also be provided that is recommended as a simple method to document your program A complete discussion of the programmer is provided in Chapter 4 A brief overview of important keys is presented below to aid the user s understanding of the examples The keyboard has both upper and lower case functions similar to a typewriter The numerical keys for most programming steps are accessed by first selecting the SHF Shift key to the upper right Once depressed the SHF LED is lit display center right and then the appropriate numerical digit s can be selected The shift function 1s latched and will be released only by selection of the ENT Enter or CLR Clear key The SHF key does not have to be held down The display window in the upper left reflects either address or data information not both as the operation progresses Typically as keys are selected their respective LEDs will light to
54. ctive the last one in the scan will be controlling the state of the coil To turn on a latch the function SET Programming 5 27 GEK 90842 followed by the retentive coil reference for example 340 373 or 400 577 is used instead of OUT plus the coil number at the end of a logic rung Once power flows to that coil it will be energized turned ON and remain ON even if power flow to it should be interrupted To tum a latch off de energize separate relay logic should be built ending in a RST Reset function and the same coil number In many applications it is useful to allow the system to clear turn OFF coils when power fails so that an orderly restart is possible when power is restored whether that is 2 seconds or several hours or several days later Other applications require the control system to remember the status of key items such as part position operations completed elevators up or down etc The Series One and Series One Plus are provided with both standard and retentive coils to allow the user to tailor the program to fit their requirements Figure 5 12 illustrates the programming of retentive latched relays Coil 340 is used only as an example The logic to either set or reset a retentive coil can be of any convenient size similar to standard coil logic When power flows through the top rung to the SET coil 340 function it will be energized and remain ON even if power flow is removed Anytime the power flows through the
55. display the function selected Other important keys are as follows KEY FUNCTION AND referenced status with previously entered logic Series OR referenced status with previously entered logic Parallel START new rung of a ladder diagram NOT or invert i e make normally closed contact referenced OUTput logic status to a coil either output or intemal TIMER is selected as desired function COUNTER is selected as desired function SET latching relay or shift register status Master Control Start begin control of master control relay Master Control Reset end control of master control relay Shift Register establish range of shift register RESET latching relay or shift register status FUNCTION specifies a data operation Series One Plus REGISTER specifies a data register or group entry Series One Plus a41 939 ADDRESS DATA ON OFF RUN BATT WRITE E s ex en Figure 5 3 Programmer for Series One and Series One Plus Programming 5 17 GEK 90842 Basic Ladder Diagram Format Figure 5 4 illustrates a typical ladder diagram Between two vertical power rails to the extreme left and right contacts are placed in horizontal strings or lines Adjacent lines can be connected between contacts by a vertical line to allow logic to be solved in parallel The horizontal strings series of contacts are equivalent to ANDs For example line 1 can be described as A and B and C must occur before coil X is energized
56. e input module is assumed to be an output module O10 output to motor starter The program does not care whether these input and output modules are 115 V ac or 24 V dc The programmer keys to be depressed to enter this logic are also shown in the figure The start key begins a new rung of logic this example and most that follow assume an empty memory so the example begins at address 0000 pc s 1 83 0006 START STOP 005 006 010 STR 005 OR 110 AND NOT 006 010 OUT 010 KEY ON LED S DISPLAY KEY ON LED S DISPLAY STR STR SHF Fano AND ECH STR AND NOT L5 STR SHF 5 sue AND NOT SHF ADR 0001 Es AND NOT SHF 6 OR ENT ADR 0003 sur OR SHF out OUT CJ OR SHF 1 Kap OUT SHF Le OR SHF 10 KO OUT SHF ADR 00 0 2 Lo OUT SHF 10 ENT ADR 0004 Figure 5 5 Sample Relay Logic Motor Starter Motor Starter Logic Description The first reference is entered STR SHF 5 ENT and a normally open contact is established since the NOT key was not depressed Referring to Figure 5 5 the next function moving from the left contact 005 to the right along the top line of the logic rung is a parallel contact referenced as 010 Parallel logic is represented by the OR function which is selected followed by the desired reference 10 and the Enter key to load the memory Again moving to the right of the top line the next contact 1s In series with the logic completed so far Thus the ANTI key is selected for series logic Since this contact is n
57. e logic to be controlled When power flows to the MCS the logic enclosed will operate normally If 5 28 Programming GEK 90842 there is no power flow to MCS the coils will be forced to the OFF state regardless of the internal logic conditions timers will be reset to zero and counters will stop frozen but not reset The amount of logic controlled by the Master Control relay function is limited only by the memory provided pc s1 83 0012 STR 003 003 005 007 021 AND 005 MCS STR 007 043 OR 043 AND 021 OUT 052 TR 152 152 156 SPAN OF AHA ine hhi CONTROL AND NOT 010 OUT 271 152 027 STR We AND 027 ho OUT 265 MCR 017 012 MCR 303 STR 017 AND 012 R 15 AND NOT 303 315 43 1 18 WORDS PER ELEMENT Figure 5 13 Example of Master Control Relay Logic Programming a Master Control Relay Function Figure 5 13 illustrates the use of one pair of MCS MCR functions In many cases it is convenient to view the MCS function as defining a sub left power rail whose connection to the main power rail is dependent upon some relay logic The conditional logic 1003 1125 in this example is built first using the normal relay logic The MCS function is entered without any reference to create the beginning point of the control Logic is built using normal functions within the control area Note the duplication of contact 152 which cost only one memory word there is no need to count or limit the quantity of relay contacts used in PCs To
58. ecc 3 I Programming 5 31 GEK 90842 seconds or 01 seconds as applicable The timer starts at 0000 0 and records time towards the preset value When the preset value is reached an event will happen according to what has been programmed Also when the timer reaches the preset value the timer will continue timing up until reset by an interruption of power flow through its conditional contacts or until it reaches its maximum value of 999 9 or 99 99 as applicable at which time it will stop If power flow to a timer is interrupted or if the CPU should stop operating the timer will be reset to zero The basic clock driving all timers derives its accuracy from a crystal within the CPU it does not depend upon the AC power line frequency pc s1 83 0015 ANY RELAY LOGIC PRESET Figure 5 16 Sample of Timer Logic A timer can be programmed to be self resetting by programming a closed contact referencing the timer coil If programmed in this manner when the preset value is reached the timer coil will turn on the closed contact referencing the coil will open and the timer will reset to 000 0 and start timing up again Figure 5 17 illustrates the programming of various types of timers The relay logic is built in the normal manner up to the coil selection The timer TMR function is selected along with a timer counter reference 600 677 Each timer or counter must have its own unique coil to operate properly After the timer is identified t
59. energized OFF references Power flow is also allowed vertically either up or down between adjacent lines where parallel connections are programmed However power can NOT flow from right to left at any time through contacts or horizontal shunts This feature simplifies programming and prevents undesired sneak paths However if hard wired relays are replaced by a Series One or Series One Plus PC it is possible some adjustments may be necessary to the logic to either simplify the programming or to add sneak paths that may be a basis for the relays functioning 5 18 Programming GEX 90842 Unlimited References Another difference between PC programming and hardwired relays is that any reference such as an input or coil can be used on relay contacts as often as necessary Since references are merely a unique series of bits in a word of memory they can be programmed wherever and whenever necessary Now with PCs there is no need to count relay contacts and try to limit individual references to four or less contacts no need to plan to use form C relay configurations to squeeze two contacts from one pole Any reference can be envisioned as a relay controlling many poles providing both normally open and normally closed contacts that operate without any time delay from pole 1 closest to the coil to pole 1000 furthest away from coil Programming 5 19 GEK 90842 SECTION 2 Basic Instructions Basic Instructions This group can be considered as the
60. evices This coil could be used as a contact to turn on an output connected to a light bell etc as a visual warning of a low battery Shift Register References A group of references 400 to 577 are used by the shift register A total of 128 stages are possible and they can be used as one large shift register or a group of smaller shift registers for example 3 30 stages and 2 19 stages as long as the total number of stages does not exceed 128 Additional details on all these functions will be provided later in this chapter Timer and Counter References Another group of fixed references 600 to 677 are used with timers and counters Any mix of timers or counters totaling 64 can be used in a Series One or Series One Plus PC Counters provide an additional function in that they can also control a sequencer with up to 1000 steps Counters are retentive upon power failure References 600 to 673 can be used as 16 bit data registers if they are not used as T C references T C references 674 677 are reserved for Thumbwheel Interfaces or Timer Counter Set Point use only Data Registers Data registers are available only with a Series One Plus PC This is a group of sixty four 16 bit registers which can be used for storage of numerical data Data can be written to or read from the data registers for use by the data operation instructions Additionally data stored in the registers can be used as Timer Counter presets The references to be assi
61. external output or 75 an internal coil SET Defines a coil as being latched the coil will remain on until 175 tumed off by RST SET OUT IF ON the coil will remain ON even under control of the 10 0 Output Disabler Coil 376 RST RESET Causes a coil that had been latched SET to be 93 unlatched Reset SET OUT RST SET OUT RESET Defines a coil as being a one shot ON 19 3 for one scan One Plus Only TIMER Programs a Timer operation Times up from zero 2 27 1 Y00 0 to a preset value Elapsed time stored in an accumulate I O IR SR register Preset time range is 0 1 seconds to 999 9 seconds 458 8 Register CNT COUNTER Programs an up counter Counts up from zero 2 27 1 706 8 to a preset value which can be 1 to 9999 The current count I OJR SR is stored in an accumulate register Counters are retentive 465 6 Register Requires 2 rungs of logic first rung enables the counter the second rung resets the counter SR SHIFT REGISTER Programs a shift register which can be 2 53 1 64 1 128 steps in length or a number of shift registers of varying 416 6 For each lengths 128 bits total Retentive Requires 3 rings of logic hit shifted 1 data 2 clock 3 reset can be programmed to shift forward or backward Note YO UO Points IR Internal Relay SR Shift Register Table 5 2 is a list of execution times for the Series One functions Execution times are given in microseconds Programming GEK 90842 Table
62. gned to these registers are 400 to 577 Note that these references are identical to the shift register references However shift registers operate on individual bits 400 401 402 etc while the data registers operate on bytes and are located in a totally different area of memory A byte in the Series One Plus PC is a group of 8 consecutive bits and each register is 2 bytes in length By using available T C references the total number of data registers references can be up to 124 5 14 Programming GEK 90842 Flexibility in Using References Although references are assigned to specific functions as shown in Table 5 5 there is some flexibility in their use I O references not used by the hardware I O section for example no module inserted into that slot or circuit not wired up can be used as internal coils However if expansion is planned for the future sufficient references to support that expansion should be reserved and not used in the current programming Retentive coils can also be used as internal coils if their retentive function is not required However typically the unique value of retentive relays does not justify their sacrifice for a few internal coils The shift register references can be used as a source for additional retentive or internal coils if they are not used for shift registers or sequencers Operating Principles Before discussing the details of programming and the use of references some details on the internal
63. he preset is entered In this example coil 41 will be OFF until 15 seconds after timer 601 is energized It will remain ON until either the power flow to 601 is interrupted or the CPU goes through a power up operation Coil 42 is inverted from 41 in that it stays ON until 15 seconds after power flows continuously to the timer 601 when it goes OFF Timer 602 delays 5 5 seconds after reference 27 is energized before it turns its coil ON also energizing coil 43 Specifying Timer Preset Values The Timer preset value can be either a fixed value entered after the T C reference the BCD value entered with the Timer Counter Setpoint unit for the special Timer Counter references 674 677 or the value in the registers that are assigned to the special Timer Counter references These registers are 564 and 565 for T C reference 674 566 and 567 for T C reference 675 570 and 571 for T C reference 676 and 572 and 573 for T C reference 677 The preset value information is also valid for Counters 5 32 Programming GEK 90842 a40016 025 032 Ten KS 15 STR 025 OR 026 026 AND NOT 032 TMR 601 ot 15 T601 041 STR TMR 601 OUT 041 STRNOTTMR 601 T601 042 DUT Dis d STR 027 TMR 602 027 T602 Apa 55 e 5 5 STR TMR 602 043 T602 043 OUT CY 1 17 WORDS PER ELEMENT LED S DISPLAY DISPLAY KEY LED S DISPLAY STR 2 STR SHF 27 STR SHF 2 0 0 1 0 STR SHF 25 6 ADR 0 0 0 1 60 OR 601 6 OR SHF 0 0 0 6 60 OR SHF 2 602 OR SHF 26 0 0 1 1 ADR 0 0 0 2
64. iary accumulator Data Registers 577 576 and are written to Outputs 0130 0147 a40875 HHHHHHHR HEHEHE EY HE HEEB E E JE ER HB B m z d JE BB B EJ E B a Si d z de Un EN Pas of PB D ed with the contents of a specified 2 group in the accumulator If the answer 1s 0000 the 240876 roup R 000 014 I O Points AGA AE LJA Maca VIV UID HU FOINTS 016 036 internal Coils 040 056 Shift Register Coiis 400 576 Data Registers 8 bit Z 3 2 E ME TEEN 600 677 T C Accumulated Value Registers FLAG KAPE pe Le U RR ZERO 0000 9999 Constant 4 digit BCD 35326 E geg L 776 I Pi ES 1 I 4 DAND XXX amp l l L enl 1 1 I r kan 4 L DANDXXXX 9 1 l L mS 1 r Bcp VALUE y r3 A SHA i fi ji 2 REUS Ll DeAND Sequence d a40877 Jaa DEA ttp n Af AFI mail ATAD 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CONTENTS DeAND I I 2 GROUP REFERENCE 1 i REFERENCE i REFERENCE 4 3 2 1 OR 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 o0 EE RESULTING BIT PATTERN A Pamm ta o TORED IN ACCUMULATOR A D RESULT Tx Ta O l O UO OU I o 1 o lo a a k Eo ge c 4 1 1 1 i 5 62 Programming GEK 90842 e Programming example DeAND a40878 z EE porma r r r r r r m D AND 2222 CF 5 Aao
65. inputs and outputs either ON or OFF can be monitored by observing the LEDs on the Programmer s logic display that correspond to the input or output a40347 Entering the Clear all Memory Sequence After observing the operation of the series rung the rung can be deleted by entering the clear all memory sequence or the rung can remain In memory with the next rung starting at the next memory address The next memory address assuming that the above rung was entered at address 0000 is 0003 If you wish to clear tie contents of memory and start the next rung at address 0000 enter the following key sequence CLR SHF 348 DEL NXT 5 20 Programming GEK 90842 When the clear all memory sequence has been successfully entered the rung of logic that had been entered will be cleared from memory Remember whenever the clear all memory sequence is entered the entire contents of memory will be cleared NOTE Be sure that you want to clear the complete contents of memory when using this sequence there is NO recovery Entering a Rung with Parallel Contacts Continue the simple program entry by entering a normally open contact 4 in parallel with a second normally open contact 20 that references the output coil 20 In series with these add a normally closed contact 5 then the output coil a40347 4 5 20 If an input device such as a limit switch is wired to input 4 and the limit switch is closed the output would turn on
66. lower rung regardless of path coil 340 will be turned OFF Since the set coil 340 is programmed before the reset it is placed in earlier memory locations and the reset function will have overriding control if they are both energized pc s1 83 001 1 STR 271 AND 132 SET OR 135 OR 377 STR NOT 037 AND 175 OR 267 AND STR SET 340 STR 067 AND 306 STR 015 AN 7 RESET S SC AND NOT 036 RESET 340 1 14 WORDS PER ELEMENT Figure 5 12 Example of Latching Logic Master Control Relay Functional Description To control large quantities of coils on a supervisory basis a Master Control relay function is provided This function allows an efficient method of programming to turn off large quantities of coils in case some major permissive is not satisfied One approach would be to incorporate a permissive contact in each rung controlling one of the coils This may require many contacts and inefficient use of memory Another method 1s to bracket those rungs over which master control is desired this is similar to quotation marks around a direct statement one at each end to define exactly where the statement starts and where it ends The permissive logic is first built starting to the left of the ladder diagram adjacent to the hot power rail Then an MCS Master Control Start function is entered followed by the logic it is to control and ending with an MCR Master Control Reset function The MCS and MCR are like quotations around th
67. o ofi o Entering a Group Reference cojo A The I O points internal coils and shift registers are treated as 8 bit registers when programming data operations The references are then referred to as group references By selecting the R key before a value that value is operated on as an 8 bit or 16 bit register For example R 1 5 actually references 8 consecutive I O points 150 to 157 This is a convenient way of reading in data to the accumulator from input modules or writing data from the accumulator to output modules for use as required by the user program Certain instructions operate on 16 bits in those cases the data will be read from or written to 16 consecutive references one 16 circuit module or 2 adjacent 8 circuit modules The group reference number for the references mentioned above can be either 1 or 2 digits Programming 5 45 GEK 90842 Data Register References Data registers are referenced as 3 digit octal values with a valid range from 400 to 577 Although each individual register actually refers to one 8 bit byte most registers are operated on as 16 bit words 2 consecutive registers For example if the key sequence R 4 0 2 is entered the data operation uses data registers 402 and 403 If a 4 digit BCD value for example 1234 were entered into the register register 402 would contain the 2 least significant digits 34 and 403 the 2 most significant digits 12 A useful feature of the registers is that they can c
68. om a normally closed pushbutton that is not depressed Cover up the two field devices wired to inputs 002 or 003 If you were the input module and both applied voltage to the field terminals could you tell which was wired normally closed and which normally open Because of this the programmer or system designer must compensate pc s1 83 0007 Figure 5 6 Example of Normally Closed Inputs In a previous discussion it was stated that inputs are like relays with many poles and you are selecting which type of pole is to be used when you program In the lower half of Figure 5 6 coil 002 1s shown in the de energized position however it is wired to a normally closed pushbutton When you want power to flow 1f the pushbutton is NOT depressed which contact type do you choose NO or NC The answer is normally open since coil 002 is always energized except when the pushbutton is depressed There fore in programming with the Series One or Series One Plus PCs a normally open contact is appropriate If the stop button of Figure 5 6 were wired normally closed its internal logic should be normally open to compensate However this concept does not normally cause problems for the programmer Since PCs are reprogrammable if an error is made and discovered when the system is exercised it is easy to correct Programming 5 23 GEK 90842 Push Down Stack Two very useful functions are programmed using a 2 key sequence the AND STR and the OR STR The AND
69. ontain a value to be used as the preset for timers or counters Unused T C references 600 673 can be used as data registers Each T C reference operates on a 16 bit register Timer Counter References The timer counter references are also 3 digit octal values Each of the timer counter references represent a 16 bit register Valid range for the timer counter references is 600 to 677 These registers contain the accumulated value of a timer or counter It is important to note that the timer counter accumulated value is not the same as the accumulator read to or written from when programming any of the data operations Example of Specifying a Group Reference An example of specifying a group reference and how it relates to the accumulator is shown below Example Reference specified is 41 a40851 Contents of 41 and 42 16 bits are loaded int 16 16 BIT ACCUMULATOR 1 the o ge NOTE Discrete bit 410 will be stored in the first position of the accumulator discrete bit 427 will be stored in the last position 16 of the accumulator Programming the Data Operation Instructions When a program is entered to perform any of the data operations the first instruction must have at least one conditional contact entered immediately before it To enter any of the data instructions the F key must first be selected then the Function number F50 F63 F82 etc of the instruction These numbers are assigned internally by the CPU s operating system
70. ormally closed the NOT key 1s also selected followed by the reference 6 and the Enter key The final element of this logic 1s the coil or output of the rung Selecting the Output key does not ensure a real world output will be generated it also must refer to an I O reference and have an output module inserted in the proper slot To establish the rung output coil the output key is selected followed by the Shift key the reference 10 and the Enter key Outputs can be paralleled by entering additional OUT functions immediately after the initial one 5 22 Programming GEK 90842 Normally Closed Input After completing the logic of Figure 5 5 several features of programming should be noticed First all elements of the program are entered directly into CMOS memory as the Enter ENT key is depressed Thus if power should be interrupted while a program is being entered or altered it will be totally saved except possibly for the one element being worked on Second there is feedback on the programmer for all entries Something happens LED ON display changes error codes appear etc for each key selected Third the logic is set up for inputs that are wired normally open If an input is wired normally closed an adjustment must be made to the symbol NO or NC used for that input Referring to Figure 5 6 inputs sense voltage at their field terminals They can not detect if a voltage is from a normally open limit switch that is depressed or fr
71. osing one of the contacts 12 13 or 14 is added to the contents of the accumulator read from Inputs 0030 0047 When I5 is closed the answer will be written to Outputs 0060 0077 5 56 Programming GEK 90842 Subtraction BCD 4 Digit F72 The contents of a specified 2 group reference or a 4 digit BCD constant value are subtracted from the contents BCD of the accumulator If the answer after the subtraction is positive it is written directly to the accumulator If the answer is negative the Borrow Flag 775 turns ON the absolute value is subtracted from 10000 and the resulting value is written to the accumulator If the answer after subtraction is zero the Zero flag 776 turns ON a40868 000 014 UO Points 070 075 1 0 Points 016 036 internal Coils 040 056 Shift Register Coils 400 576 Data Registers 8 bit 600 677 T C Accumulated Value Registers 16 bit 0000 9999 Constant 4 digit BCD CARRY ZERO 776 DEO 4 LA B REFERENCE Dee s 4 DIGIT CONSTANT HHE w BCD VALUE ESCJEJETEJ Programming 5 57 O _ y Y GEK 90842 e Subtraction sequence a40869 ACCUMULATOR 15 4 DIGIT BCD NUMBER 0 CONTENTS REFERENCE 1 _ REFERENCE 7 Ol 2 GROUP REFERENCE las 2 OR 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 apen constant S 2 T 4 4p6rec ANSWER STORED IN 8 4 2 1 8 4 2 7 8 4 2 3 8 4 2 1 ACCUMULATOR BORROW ZERO IF ANS
72. permissive is satisfied This coil 214 is developed elsewhere and indicates all operations have been completed and hardware is out of the way allowing movement without damaging the machinery The shift register itself has three parallel rungs each of which can be any combination of series and parallel contacts The first is the input signal Whenever this is supplying power flow the first stage of the shift register will turn ON and remains ON Programming 5 41 GEK 90842 even if the input changes The middle rung is the clock signal controlling the shifting of all stages When this signal goes from OFF no power flow to ON power flow all stages will shift one position This shifting is completed before other logic is solved The bottom rung is the reset signal Whenever this signal is supplying power flow all stages of the shift register will be turned OFF cleared The references used by this shift register and thus the number of stages must be defined The reference for the shift register itself is the location of the first stage and immediately following that is the reference for the last stage of that shift register In our example input 045 indicates a part present and loads the first stage 431 of the shift register Timer 631 3 seconds and coil 214 permissive to shift are both required before the shift occurs Finally input 047 is used to clear all shift register stages perhaps at the start of machine operation or otherwi
73. r ER A i Lo un Ki Ss iL it lia ia In Er L g Y B NG O ov d e j E fa a d x D K pa EN a O fado gt Si e jaye Ss ufs8e EES Plazo gt na 5872258 a 2790 KERERE o fn 2E S EG o 9 Wu o E P og Ch wi da 8 y DATO A 2 SE H SL _ Se SE pp E aa om B ft gg pogga E gia O A a E O a Sied fax Qu rj f te c E d Poste ee Ag Ri Gel a pn O 13 T E e d ud 4 em X bo D o d 4 y E O OF Ga GH O Q Si Te O O HH alt 2 CEB Ju dea a SE f LES d 9 m Q 4 O O du e Q vi da e LE Z t o Si HODE 3 84 O A P E 5 z 5 90 Q os gt 5 8 ub E O nd e 5 3 Y o O z agang a ad R o 3 4 wa p MBE EE FEE ei B 5 1 3 sa ch ka y Du 2 Oo g T aad OG SS a5 SE 3 Soage e 0 O Ob 6 e de E BARA LARA RAS 5 5 VERE A O NG a dE 838 8 8 u Ki E 8 uf Data Store is a 2 word instruction which when executed loads the accumulator onstant or the contents of a specified 2 byte reference NOTE When loading I O References or other data be sure that it is in BCD Format if not it sho converted before using the data for arithmetic functions a40852 REF 1 REF 7 017 el I I Y 4 e A APPS 18 At It A AU l V o TUE Y ALL UNMIULA I UT Vaiid Group References 000 014 UO Points 070 075 UO Points 016 036 internal Coils nan neg CL Damimoas Punilla SPS VIG EVERT Wd ID LUT JE ils l 400 5
74. r causing the ON state for this part to move into stage 432 Then timer 631 will reset itself and stage 431 is cleared When stage 432 is energized so is output 130 causing operation one to be performed on this part An additional three seconds pass and another clock cycle causes the ON to move to stage 433 Stage 432 will be loaded from 431 which is OFF as long as additional parts are not processed The above discussion assumes no delays are experienced with the permissive The above operation repeats itself as the part goes through 434 operation 2 435 rest 436 operation 3 437 rest and 440 test at three second intervals While at the test position output 133 is energized and the test OK input 046 is expected If the part passes the test input 046 will reset stage 440 making the remainder of the shift register act as if no part was present and allowing the part to pass straight on through However if the test is not passed the ON stage moves to 441 442 and 443 at three second intervals At stage 443 it energizes output 134 causing the diverter to push off the defective part into the reject bin Other logic can be added to improve the capabilities of this program For example a timer could measure the delay from the manual cycle 631 energized and receipt of the permissive 214 It would also alarm if this delay was excessive such as 5 or 8 seconds beyond the normal 3 seconds Counters could also be installed to record both good and
75. s Ier 5 0 Dv EJ Io sm se gt E D ES ovr se 7 3 Ce 9 e Data is stored in the accumulator from Inputs 0030 0047 e Data from Inputs 0050 0067 is added to the value in the accumulator e The resulting answer is stored in the accumulator where it is converted to a 4 digit BCD number e The BCD number is written to Outputs 0070 0107 e If an overfiow occurs the overflow Flag 777 will tum on Output 130 8 3 5 gt ej q O ie e A S Bg Ray 8 md d lt S of B B B N 8 8 e bi re t 3 E 9 3 S B N 93 v s E BP gt a Es D CH or ay x gt O E CO 9 S Bb t E 8 w Be m rj S 4 o Da gt ve E E ag di e 3 o 3 2 A iv El amp gt p El v En 3 8 B o A e J z mg E CN 2 o E e o d d ER D S o E E a 8 E I lt Q DE BES ER JP JN gt a3 KO oO ct D mng g O S i i ed d gs ERE E B 7 BO oe 4 zi 5 ja 7T fr E 5 FEF e s ZES EI J El a S O c ji pa gt SE 7 t es 8 g a E jo 2 O SE ER pn n 6 Bi Jat Q 8 i Da 3 AW do 4 I E e E EE oi 4151 B i 5 p q bh E x gt pe 3 Qu E lt i I x eg A m3 pn E Oc 9 L 0 e Bg x E 2 233 o H e gt O O E ud E gt E 3 2 80 Q F G EE PS TT C 8 2 E d 9 N v E E pa bn ar LE e T CH 8 T 2 e E Fe g 5 o pe
76. s 9 LAVAL IYvVIVIVIIVWEW WIG VUL AD iv 112420 WWLILGwltit 2414 Lilly WWMJALVA4 Ii KM 4444L TH el lt FT REF I Tung PC Operation 4 27 E GEK 90842 Printer Interface Unit CROSS REFERENCE PRINTOUT OUTPUTS USED TABLE V2 2 SERIES ONE OME PLUS SR 28 SR 21 PAGE 0007 SHIFT REGISTER 486 418 3 420 3 438 3 ME 458 360 AW 481 411 3 421 3 431 3 441 Gi Gi gn 482 412 3 422 3 G32 3 442 452 amp 47 483 413 3 423 1 433 3 443 453 483 473 304 414 3 424 1 434 3 MA 454 4864 474 Mb 415 3 425 1 435 MS 455 465 479 46 416 3 426 3 435 M6 456 366 476 ar 417 427 2 437 447 857 467 477 589 518 528 538 548 558 568 579 58 511 921 531 541 551 561 57 582 512 522 532 542 552 562 572 589 513 523 533 543 553 563 573 Sad 514 524 534 544 554 564 574 505 515 525 535 545 565 585 5 586 516 52 536 S46 S56 586 5 997 517 027 537 547 557 567 577 TIMER COUNTER 680 618 628 638 540 658 068 6 108 Gi 611 621 631 541 661 661 71 181 mo 612 622 B3 642 652 06 672 iW ES 613 623 633 643 653 663 673 18 694 814 624 634 644 654 664 674 19 885 615 625 635 66 655 655 875 18 606 616 626 636 646 656 666 6 186 On 617 67 37 n 657 667 677 187 Figure 4 8 Sample Outputs Used Table Printout PC Operation GEK 90842 Printer Interface
77. s UC ILDLIVLT UV IVIJ rU mSstaucd a Drum Sequencer contact rererence SHOUIG not DE used as une nist ES a a AA ORT CUTS ATNA E PAPA Y TR ra T Y aAarernr NP 1 Te AP A Contact WIN SIK OF SIK NU I imsStrucuon in INE LUUN I Or SL 1 rung OI counter or me DATA CLOCK or RESET rung of a Shift Register If a program using the step described above was entered into a Series One PC having an IC610CPU101 CPU this would work correctly and written to Tape then later transferred to a Series One Plus PC with an 1C610CPU105 CPU or a Series e Plne 3 7K PU Be A Seef A A A Bb Sd Be O44 407 A W A A we FW 66 WAAWN W44 4 4 4 vw W AMA 6444 A Se Wf AV wd W 4 WA gd wrk W W4 6 k 7 wa AWZ PR AS A k 7 e AD A NW 1xr3th art YC amp 100DI TINK DTT tha nenaqeram manlA mat av aryiita nranariyr VILL G IVU IUWI U IUU Sch U WIL piv 144111 WUWUAU VL VAULULY piv AAVe Do not reference a Drum Sequencer step as the first contact in the rungs as described above If a Drum Sequencer step is required as the first contact reference for a rung in a Counter or Shift Register a nrnorammino techniane that waonld work nronerly ic ta nce the rennired Drim Sennencer ctan to turn o pe Oe ee a ee ads Zo A Beie VV AMIA MS TV WAAR 19 s ed ar DW UAT AW B NENG wa asa ar NA aw QUE ALL A ds Varde muta wow vid bU bid AA WEE an infornnal rail mn a canarata ring than rvafarannra that rail ac tha rat raAntart zen tha Tanntar nr Q H aii MAIN 2141464 VIL 211 IP AN Adi
78. se under operator control The shift register is built using references 431 through 444 total 12 Stages The remaining relay logic merely connects the individual stages of the shift register to their output to exercise proper control The only exception is the next to the last rung This rung receives the test signal and resets stage 440 if the test is passed Thus when the later stage 443 receives the data it will not activate coil 134 to operate the diverter Therefore good parts are passed and the diverter operates only for bad parts not for empty locations or good parts a42154 631 1 PART PRESENT 0 NO PART OR GOOD PART STRNOTTMR 631 631 OR NOT 214 3 0 TMR 631 TMR 63 045 STR 045 INPUT 431 STR TMR 631 AND 214 STR 7 631 214 SR 43 CLOCK __ SR 444 STR 432 047 QUT 130 RESET 444 STR 434 OUT 131 OPER 1 STR 436 432 130 OUT 132 STR 440 OPER2 OUT 133 434 131 STR 046 RST 340 On m Sa R3 436 Ke OUT 134 TEST 440 133 RESET 046 340 443 134 Figure 5 26 Example of Shift Register Logic 5 42 Programming GEK 90842 Normally many parts will be processed through this machine continuously moving from input at position 1 to output from position 12 However for the purpose of illustration a single part will be examined as it moves down the machine The part is placed in position 1 energizing input 045 and setting shift register stage 431 After three seconds timer 631 energizes clocking the shift registe
79. so contain binary data however arithmetic functions cannot be performed until the binary values are converted to BCD a40848 DATA IN CONSTANT OR GROUP REFERENCE CONTENTS OF ACCUMULATOR COMPUTED WITH A CONSTANT OR CONTENTS OF A GROUP REFERENCE DATA OUT TO EXTERNAL OUTPUTS OR INTERNAL STORAGE RESULTS STORED IN ACCUMULATOR Figure 5 27 Data Operation Block Diagram The contents of the accumulator do not change until new data is loaded into it with a D STR instruction or a computation takes place and the result is stored in the accumulator 5 44 Programming AAA AA xa zz GEK 90842 Using References for Data Operations When entering an instruction for a data operation the instruction is first specified then the data The data can be a constant value or a groupreference that contains the data to be used Entering a Constant Value a40849 A 27 FE EE OM EI Where XXXX is a 4 digit BCD number When a constant 4 digit BCD number is entered as the data value the bits of the BCD numbers will be stored in the corresponding position in the accumulator i e the least significant digit in the lower 4 bits of the accumulator and the most significant digit in the upper 4 bits of the accumulator a40850 4 DIGIT BCD NUMBER DIGIT DIGIT DIGIT DIGIT 4 3 2 1 8 4 2 1 8 4 2 1 8 4 2 1 8 4 2 1 NUMBER 8 3 s 2 I I I i I ACCUMULATOR 1 o fofofofofi 1 1 o fofiJ
80. t DataOn 772 Ace DataOn 777 Acc lt Data011 774 ADDITION BCD The contents of the accumulator are added to a 4 digit BCD constant or the contents of a specified 2 byte reference which must be a valid BCD number Input Internal Relay Shift Register or Data Registers SUBTRACTION BCD The contents of a specified 2 byte F72 reference Input Internal Relays Shift Register or Data Registers or a 4 digit BCD constant are subtracted from the contents of the accumulator MULTIPLICATION BCD The contents of tbe accumulator are multiplied by the contents of a specified 2 byte reference Input Intemal Relays Shift Register or Data Registers or a 4 365 3 16 Point Output Module 354 0 O IR SR 112 8 Register 57 0 constant Y 698 0 I O IR SR 456 8 Register 262 0 Constant I 557 0 YO IR SR 3 15 8 Register 275 0 Constant SA 497 to 2851 1 O IR SR 290 to 2644 Register 223 to 2576 Constant SR digit BCD constant The lower 4 digits of the result remain in tk accumulator the upper 4 digits are stored in registers 576 and 577 which is the auxiliary accumulator ON ON ON ON ON ON Lo O2 Lo Lo Lo un 6 Programming GEK 90842 Table 5 3 Series One Plus Data Operation Instructions Continued Memory microseconds Definition Words Inactive 3 1218 to 2851 I O IR SR 742 to 2645 Register 720 to 2577 Constant 345 0 JO IR SR be d 8 D DN DIVISION BCD
81. t code is placed in the lower four bits of the accumulator a40887 7 8 5 both s TA e FUN 83 Encode sequence example 15 ONE BIT IN A Fe oleTeToTeTeToTeToT3ToToToTo 9 POSTON iN The POSITION 5 FUN 83 IS ENCODED 5 TO A 4 BIT CODE Lojojojo o o o o o o o o oT ToT THE LOWER ABAS 8 4 2 118 4 2 1 8 4 2 118 4 2 1 OFTHEACCUMULATOR e The upper 12 bits of the accumulator will contain zeros after the FUN 83 has been executed INV F84 The 16 bits stored in the accumulator are logically inverted i e 1 to 0 and 0 to 1 a40888 JJ 4HA4NA e Invert sequence 15 O 16 BITS STORED IN sjojofofof f ofofi TofoTiT1T ACCUMULATOR 15 INV ARE O 0 1 1 1 1 0 0 1 1 0 0 13 1 0 0 0 LOGICALLYINVERTED e Programming example INV 3 str su 3 END DSTR 3 r r r EG ET 0 0 0 E NV fJ MO ENT Ce 5 NJ D OUT 7 CF 8 4 v CF Ce Co en Ce 7 En e Data entered into the accumulator from Inputs 0030 0047 is inverted e The inverted data is added to data from Inputs 0050 0067 The answer is stored in the accumulator then inverted again e Data is written to Outputs 0070 0107 A o O l a a lt co g 9 dn pa E SS 1 fe la El 00 HG Des E ac VL C O 3 APT HIH 3 er t O uge u n ope P 4 D Qt ue i gt Tag 3 d 60 lt Fag vu it O 00 mg o o O Zo0 Oro A a a a gt o E t E H e y ra E E z E
82. the divisor is zero the Overflow flag 777 will also turn ON a40873 1 0 Points 1 0 Points internal Coils Shift Register Coils Data Registers 8 bit T C Accumulated Value Registers ZERO OVERFLOW 776 DOG HAH omg REFERENCE Ez m IE JE 4 DIGIT CONSTANT VALUE I A wj BCD VALUE ea LILIL 5 60 Programming GEK 90842 e Division sequence 40874 a 15 4 DIGIT BCD NUMBER O ACCUMULATOR jioj1 1 o o o 1 To o ol 3To 1ToT 3 CONTENTS REFERENCE 1 M REFERENCE 7 07 O 2 GROUP REFERENCE 4 3 2 OR ofofofofofofifofofifofofofifi o PET CONSTANT QUOTIENT REMAINDER 4 3 2 1 T t 2 I s T oToToToJoToToTofolololToToTo TofolololToralotolol ol IoTo ACCUMULATOR ZERO OVERFLOW e The quotient 0 4 digits will be stored in the accumulator as shown the remainder 0 4 digits will be stored in the auxiliary accumulator Data Registers 577 576 as shown e Division programming example Division of a 4 digit number by another 4 digit number showing how the quotient and remainder can be written to Outputs 7 DSTR 3 5 D OUT 11 DSTR 576 DOUT 13 e A 4 digit number is entered into the accumulator from Inputs 0030 0047 e That number is divided by a number specified by Inputs 0050 0067 e The 4 digits of the quotient are stored in the accumulator and are also written to Outputs 0110 0127 e The 4 digits of the remainder are stored in the auxil
83. then all storage locations cups are indexed rapidly one position towards the right There are three separate operations such as part assembly welding clamping nuts tightened painting and label placement etc Since it would be a waste of material and machine time to operate on locations without a part in place there is a sensor on the first location to detect when a part is present To the right is a testing position to determine good parts and bad parts for later separation Each position of the machine is assigned a number for later reference to the shift register Notice that positions 3 5 7 10 and 12 are only holding locations to store parts in progress and are related to the mechanical layout of the machine pc s1 83 0024 TEST DIVERTER OPER OPER OPER 1 2 3 GOOD PARTS E T PART EJECTS PRESENT Figure 5 25 Example of Shift Register Figure 5 26 illustrates the logic including shift register used to solve this problem The following I O references are assigned for use in this logic and can be changed as necessary to fit your application Part Present Input 045 Test OK Input 046 Reset All Input 047 Operation 1 Output 130 Operation 2 Output 131 Operation 3 Output 132 Test Output 133 Diverter Output 134 Shift Permissive Interna 214 The timing of each operation allows the machine to index one position each 3 seconds Thus timer 631 produces an output every 3 seconds as long as the internal
84. ting timer with a preset of one second 10 tenths It produces outputs each one scan long every second from the time the CPU starts until it is turned OFF Counter 614 counts these pulses up to 750 of them 750 seconds until reset by reference 106 Since counters are retentive using timer 613 to produce a one second clock that is counted by 614 results in a retentive timer A similar result occurs if the top rung of counter 614 were referenced to internal coil 375 in lieu of 613 The third example in Figure 5 20 is counters 615 and 616 Counter 615 counts reference 52 up to 500 and then resets itself Counter 616 records how many of these groups of 500 counts occur Since counter 616 has a preset of 900 its coil will be energized only after 450 000 transitions of reference 52 At anytime counter 615 has a representation of the small number of counts 0 499 or least significant portion and counter 616 the larger values representing multiples of 500 500 450 XXX or most significant portion Application techniques shown in Chapter 8 illustrate how a low order preset of 1000 can be obtained to produce a more conventional double precision counter y S o omy oo bi 4 vi ar 2 OQ FH ch d O a 3 O 3 e Ei y T C 1 3 ab o d F aj m o E 5 GA Ya O gt A ve c e O geo og O a e A a qarag E D ir OD b D e pmj T3 un Y 3 e Aa O 3 Dr ME mg O o Lo Ge gh og O Hpg ops ba Wa OG A ce E A S O B mg 2 gt f D o 3g w8 i Oo
85. ut Y will be turned off pc s 1 83 0055 LOCATION NUMBER INITIALLY STRNOT 1 OR 2 Figure 540 AND STR OR STR Example Number 1 5 26 Programming GEK 90842 pc s1 83 0056 1 2 3 20 INSTRUCTION REF_NO LOCATION NUMBER j ad T d STATUS Figure 5 11 AND STR OR STR Example Number 2 Use of Retentive Coils as Latches All coils referenced so far have not been retentive upon power failure Thus if non retentive coil is ON when power is removed from the CPU it will be OFF upon reapplication of power if Switch 1 on the CPU module is ON There are 28 special coil references 340 373 that are retained upon power failure Thus if they were ON prior to loss of power they will be ON when power is restored they will be OFF while power is OFF since no scanning is being performed In addition to these 28 references latches can be built using shift register references 400 577 that are not being used to perform shift register functions Either retentive coils 340 373 or shift registers 400 577 can be used to control contacts both normally open and normally closed wherever required This special retentive function is derived from their use as coils to complete or store the results of relay logic rungs Programming a Latched Relay Latches require two separate functions or inputs similar to hard wired relays a SET turn ON and a RESET turn OFF These functions are commonly referred to as latch and unlatch If both are a

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