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DM6814/DM5814 User`s Manual - RTD Embedded Technologies, Inc.

1. N Po o P11 111 oo 141111 mm 3 us niii omo N OO 7 MN gt o 6c16 nnns umi b CH L min mm EM mm mum NN mm a C25 C10 22940 C2 9 C11 C23 wu boo E LLL IS o o L 9 99 9 ees A c 1 s M s us 2 E Anm P4 P16 Interrupt Channel Select Factory Setting Jumper installed on IRQ Disabled These header connectors shown in Figure 1 2 lets you connect any one of four jumper selectable P14 interrupt sources or any of the 16 digital I O lines in each EPLD up to three digital interrupt sources to an interrupt channel IRQ2 through IRQ15 XT channels 2 through 7 are jumpered on P4 and AT channels 10 through 15 are jumpered on P16 DM6814 only In A
2. 22 4 4 4 BA 3 Incremental Encoder 1 Chip Mode Register Read Write ssonsssessonnnnsnsennnnnnsonnnnnnnnne 4 5 BA 4 Incremental Encoder 2 MSB Read Write cccssssccccscssssssscsssscccccccccssccsessccsccccccesccccces 4 6 5 Incremental Encoder 2 MSB Read Write ccccscscscsccccssssscssscscccccccccssccscssccsccccccesccseees 4 6 6 Incremental Encoder 2 Clear Hold Digital I O Read Write 4 6 BA 7 Incremental Encoder 2 Chip Mode Register Read Write e eee eee eee eerte enean 4 7 BA 8 Incremental Encoder MSB Read Write cccsssssosssccssssscsssssccccccsccesccssssccsccccccesccseces 4 8 BA 9 Incremental Encoder MSB Read Write 5 5 4 8 BA 10 Incremental Encoder 3 Clear Hold Digital I O Read Write 4 8 11 Incremental Encoder 3 Chip Mode Register Read Write 4 9 BA 12 8254 Timer Counter 0 Read Write cccccsssssssssscccccccssssscsscssccccccssccscsssssccccccsscesccseees 4 10 13 8254 Timer Counter 1 Read Write cccsscssssssssccccsccssssscsscssccccccsccccccsssscccccccscesccseees 4 10 BA 14 8254 Timer Counter 2 Read Write 0 0x0000000ss0ssensnuunnnunonssssenssnssnnunsnss
3. 5 volts dedo ETE 12 mA SUK qu m 24 mA Digital Inputs luber er out e te ee el 18 A A EDO O 5 volts Mr A CMOS 82004 Three 16 bit down counters 6 prog Counte Counte Counte ammable operating modes input source outputs gate source Available externally External clock 8 MHz max or on board 8 MHz clock used as PC interrupts External gate or always enabled Miscellaneous Inputs Outputs PC bus sourced 5 volts ground Power Requirements 5V 238 mA 1 18W typical Connectors P2 and P3 50 P6 Environmental Operating temperature Storage temperature Humidity 12 pin box header Size EA AAA SRLS ORS RRS AN right angle header to 70C clash SM vals Salina dad des he 40 to 85 C to 90 non condensing 3 5571 x 3 775 W x 0 6 H 90mm x 96mm x 15mm A 3 4 B 1 APPENDIXB CONNECTOR PIN ASSIGNMENTS B2 P2 Connector INC ENC3 1 2 EXT INT 1 OVERFLOWS OUT 3 2 DIGITAL GND INC ENC3 CHB 5 6 DIGITAL GND INC ENC3 CHA 7 8 DIGITAL GND PIN2 P4 3 9 0 DIGITAL GND P 4 2 11 02 DIGITAL GND 302 DIGITAL GND EE P4 0 CGO DIGITAL GND SS INC ENC2 IRQIN 17 3 DIGITAL GND PIN 1 OVERFLOW2 OUT DIGITAL GND gt INC ENC2 CHB 7 2 DIGITAL GND
4. 9 0 DIGITAL GND P5 3 9 10 DIGITAL GND OUT 1 7 8 DIGITAL GND P4 2 22 DIGITAL GND P5 2 3 DIGITAL GND EXT CLK 2 969 EXT GATE 2 3 2 DIGITAL GND P5 1 32 DIGITAL GND our 2 DIGITAL GND P4 0 45 46 DIGITAL GND P5 0 5 6 DIGITAL GND INC IRQIN 17 019 DIGITAL GND 28 DIGITAL GND pa OVERFLOW2 OUT DIGITAL GND N C DIGITAL GND jiener INC ENC2 CHB 61 62 DIGITAL GND N C 61 63 DIGITAL GND eee INC ENC2 CHA 63 64 DIGITAL GND N C 63 62 DIGITAL GND P2 3 05 66 DIGITAL GND P3 3 65 66 DIGITAL GND P2 2 67 68 DIGITAL GND P3 2 62 68 DIGITAL GND P2 1 DIGITAL GND P3 1 DIGITAL GND P2 0 662 DIGITAL GND P3 0 6 62 DIGITAL GND INC ENC1 IRQIN 63 64 DIGITAL GND N C 63 63 DIGITAL GND OVERFLOW1 OUT 65 69 DIGITAL GND N C 65 66 DIGITAL GND INC ENC1 CHB 67 68 DIGITAL GND N C 6268 DIGITAL GND INC ENC1 CHA DIGITAL GND N C DIGITAL GND P0 3 DIGITAL GND P1 3 DIGITAL GND P0 2 DIGITAL GND P1 2 DIGITAL GND P0 1 DIGITAL GND P1 1 DIGITAL GND P0 0 DIGITAL GND P1 0 DIGITAL GND 5 VOLTS DIGITAL GND 5 VOLTS DIGITAL GND 50 pin connector 50 pin connector Fig 2 1 P2 P3 and P6 I O Connector Pin Assignments Figure 2 1 shows I O connector pinouts for P2 P3 and P6 Refer to these diagrams as you make your I O connections Connecting the Digital I O The DM6814 DM5814 is designed
5. Awrite enables P14 interrupts and selects whether the interrupt will occur on the positive rising edge or negative falling edge of the pulse Bit 2 is used to enable and disable the interrupt sharing circuit If you are not using shared interrupts it is best to disable this feature to ensure compatibility with all CPUs BA 17 IRQ Status Read Only Aread shows the status of the three Incremental Encoder interrupts and also the jumper selectable interrupt circuit BA 18 Reserved BA 19 Reserved 4 11 Programming the DM6814 DM5814 This section gives you some general information about programming and the DM6814 DM5814 The module is programmed by reading from and writing to the correct I O port locations These I O ports were defined in the previous section Most high level languages such as BASIC Pascal C and C and of course assembly language make it very easy to read write these ports The table below shows you how to read from and write to I O ports using some popular programming languages BASIC Data INP Address OUT Address Data Data inportb Address outportb Address Data Turbo Pascal Data Port Address Port Address Data mov dx Address mov dx Address Assembly in al dx mov al Data out dx al In addition to being able to read write the I O ports on the DM6814 DM5814 you must be able to perform a variety of operations that you might not normally use in your programming The table below shows you some o
6. INC ENC2 CHA 63 64 DIGITAL GND P2 3 65 66 DIGITAL GND P2 2 67 69 DIGITAL GND D 2 1 DIGITAL GND P2 0 61 62 DIGITAL GND E INC ENC1 IRGIN 63 62 DIGITAL GND ED OVERFLOW1 OUT 65 66 DIGITAL GND INC 1 CHB 67 68 DIGITAL GND INC ENC1 CHA DIGITAL GND P0 3 DIGITAL GND E PIN 50 P0 2 DIGITAL GND gr P0 1 DIGITAL GND P0 0 DIGITAL GND 5 VOLTS DIGITAL GND PIN 49 P3 Connector N C 2 EXT INT 2 3 4 DIGITAL GND 57 6 DIGITAL GND N C 7 8 DIGITAL GND P5 3 9 69 DIGITAL GND P5 2 22 DIGITAL GND P5 1 94 DIGITAL GND P5 0 968 DIGITAL GND n P2 amp Mating Connector Part Numbers N C 63 64 DIGITAL GND P3 2 67 68 DIGITAL GND P3 0 61 62 DIGITAL GND N C 63 62 DIGITAL GND N C 65 G6 DIGITAL GND N C 6268 DIGITAL GND N C DIGITAL GND P1 3 DIGITAL GND P1 2 DIGITAL GND 1 1 DIGITAL GND P1 0 DIGITAL GND 5 VOLTS DIGITAL GND B3 P6 Connector EXT CLK 1 2 our 4 1 T C OUT 1 EXT CLK 2 9 0 our 2 OO EXT GATE 0 DIGITAL GND EXT GATE 1 DIGITAL GND EXT GATE 2 DIGITAL GND Cl APPENDIX COMPONENT DATASHEETS Intel 62 54 Programmable Interval Timer Data Sheet Reprint APPENDIX D OPTIONAL DM6814 DM5814 CONFIGURATIONS D1 D2 Mixing Incremental Encoder Chips and Digital I O
7. Note that when any reset of the digital circuitry is performed clear chip or computer reset all digital lines are reset to inputs and their corresponding output registers are cleared BA 2 6 10 Read Program Port Direction Mask Compare Registers Read Write A read clears the IRQ status flag or provides the contents of one of digital I O Port 0 2 or 4 s three control registers and a write clears the digital chip or programs one of the three control regis ters depending on the setting of bits 0 and 1 at BA 3 7 or 11 When bits 1 and 0 at BA 3 7 or 11 are 00 the read write operations clear the digital IRQ status flag read and the digital chip write match mode When these bits are set to any other value one of the three Port 0 2 or 4 registers is addressed Direction Register BA 3 or 7 or 11 bits 1 and 0 01 This register programs the direction input or output of each bit at Port 0 2 or 4 Mask Register BA 3 or 7 or 11 bits 1 and 0 10 In the Advanced Digital Interrupt modes this register is used to mask out specific bits when monitoring the bit pattern present at Port 0 2 or 4 for interrupt generation In normal operation where the Advanced Digital Interrupt feature is not being used any bit which is masked by writing a 1 to that bit will not change state regardless of the digital data written to the port For example if you set the state of bit 0 low and then mask this bi
8. 2 shows the timer counter circuitry Each 16 bit timer counter has two inputs CLK in and GATE in and one output timer counter OUT Each can be programmed as binary or BCD down counters by writing the appropriate data to the command word as described in Chapter 4 The command word also lets you set up the mode of opera tion The six programmable modes are Mode 0 Event Counter Interrupt on Terminal Count Mode 1 Hardware Retriggerable One Shot Mode 2 Rate Generator Mode3 Square Wave Mode Mode 4 Software Triggered Strobe Mode 5 Hardware Triggered Strobe Retriggerable 33 These modes are detailed in the 8254 Data Sheet reprinted from Intel in Appendix ON BOARD CONNECTOR P6 XTAL 8 MHz TIMER ea ER PIN 14 EXT CLK 0 0 5 V PIN GATE 24 EXT GATE 0 PIN 3 1 T C OUT 0 TIMER PIN 5 EXT CLK 1 COUNTER CLK O 1 5 V GATE PIN 6 EXT GATE 1 PIN 7 OUT h T C OUT 1 1 100110 9 o PIN 9 EXT CLK 2 TIMER 1 COUNTER CLK O O 2 5 V GATE 5 PIN 10 EXT GATE 2 oux TIT PIN 11 T C OUT 2 1 a 4 Fig 3 2 Timer Counter Circuit Block Diagram CHAPTER 4 MAPPING This chapter provides a complete description of the I O map for the DM6814 DM5814 general programming information and how to set and clear bits in a port 41 42 Defining the I O Map The I O map for the DM6814 DM5814 is shown
9. 4 will be unaffected and we can t say for sure what happens to bits 6 and 7 but we can say for sure that bit 5 ends up cleared instead of being set A similar problem happens when you use subtraction to clear a bit in place of the method shown above 4 13 4 14 5 DIGITAL I O This chapter explains the digital I O circuitry on the DM6814 DM5814 5 1 5 2 The DM6814 DM5814 has eight TTL CMOS digital I O lines available for digital control applica tions on each of the three Incremental Encoder chips Six lines can be programmed as input only and two lines can be programmed as input output Chapter 4 shows how to program these lines 53 6 TIMER COUNTERS This chapter explains the 8254 timer counter circuit the DM6814 DM5814 6 1 62 An8254programmableinterval timer provides three 16 bit 8 MHztimersfor timing and counting functions suchas frequency measurement event counting and interrupts These timer counters can beconfigured ina number ofwaysto supportyour application Figure 6 1 shows a block diagram of the timer counter circuitry PIN 11 b T C OUT 2 ON BOARD 1 0 CONNECTOR E P6 XTAL 8 MHz TIMER counter CLK PIN 1 EXT CLK 0 45V GATE PIN 2 EXT GATE 0 PIN T C OUT 0 BUNTE PIN5 EXT CLK 1 I counter CLK L 1 45V GATE PIN 6 EXT GATE 1 PIN 7 4 T C OUT 1 l PIN 94 EXT CLK
10. Circuits on the Same Module You can order the DM6814 DM5814 with one two or three Incremental Encoder chips When you order a DM6814 DM5814 with less than three Incremental Encoder chips each chip not on the module is replaced by a 16 bit digital I O circuit For example a module might have two Encoder chips and one digital I O circuit or one Encoder chip and two digital I O circuits To make matters just a little more complex you can order the module with 16 bit digital I O circuits that are 16 bit programmable I O lines or a mixture of 8 bit programmable lines and 8 byte programmable lines This Appendix shows the V O mapping for programming these digital I O lines when they are installed in place of any of the Incremental Encoder chips VO Mapping for 16 Bit Programmable I O Lines When you replace any Incremental Encoder chip with a circuit that has 16 bit programmable digital VO lines you should use the I O maps and programming description that follows as required to prgram these lines Address Register Description Read Function Decimal Digital I O Port 0 Read Port 0 digital input lines Program Port 0 digital output lines Digital 1 O Port 1 Read Port 1 digital input lines Program Port 1 digital output lines Clear digital IRQ status flag read Clear digital chip program Port 0 Clear IRQ Program Port Port O direction Port 1 direction or direction Port 1 direction or IRQ Direction amp IRQ Source source dependen
11. al 168 mov dx PortAddress out dx al Often assigning a range of bits is a mixture of setting and clearing operations You can set or clear each bit individually or use a faster method of first clearing all the bits in the range then setting only those bits that must be set using the method shown above for setting multiple bits in a port The following example shows how this two step operation is done Example Assign bits 3 4 and 5 in a port to 101 bits 3 and 5 set bit 4 cleared First read in the port and clear bits 3 4 and 5 by ANDing them with 199 Then set bits 3 and 5 by ORing them with 40 and finally write the resulting value back to the port In C this is programmed as V Save v save amp 199 Save v save 40 outportb port address v save A final note Don t be intimidated by the binary operators AND and OR and try to use operators for which you have a better intuition For instance if you are tempted to use addition and subtraction to set and clear bits in place of the methods shown above DON T Addition and subtraction may seem logical but they will not work if you try to clear a bit that is already clear or set a bit that is already set For example you might think that to set bit 5 of a port you simply need to read in the port add 32 25 to that value and then write the resulting value back to the port This works fine if bit 5 is not already set But what happens when bit 5 is already set Bits 0 to
12. better understanding of interrupt program development Writing an Interrupt Service Routine ISR The first step in adding interrupts to your software is to write the interrupt service routine ISR This is the routine that will automatically be executed each time an interrupt request occurs on the specified IRQ An ISR is different than standard routines that you write First on entrance the proces sor registers should be pushed onto the stack BEFORE you do anything else Second just before exiting your ISR you must clear the interrupt status flag of the DM6814 DM5814 and write an end of interrupt command to the 8259 controller Finally when exiting the ISR in addition to popping all the registers you pushed on entrance you must use the IRET instruction and not a plain RET The IRET automatically pops the flags CS and IP that were pushed when the interrupt was called If you find yourself intimidated by interrupt programming take heart Most Pascal and C compilers allow you to identify a procedure function as an interrupt type and will automatically add these instructions to your ISR with one important exception most compilers do not automatically add the end of interrupt command to the procedure you must do this yourself Other than this and the few exceptions discussed below you can write your ISR just like any other routine It can call other func tions and procedures in your program and it can access global data If you are writ
13. bottom eight bits of the Incremental Encoder 1 16 bit up down counter A read provides the current LSB value in the counter A write loads the bottom eight bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incre mental Encoder input by setting BA 3 bits 6 and 5 to 00 Note that before doing a read of this register you should first issue a hold command at BA 2 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB PUES BA 1 Incremental Encoder 1 MSB Read Write This port accesses the top eight bits of the Incremental Encoder 1 16 bit up down counter A read provides the current MSB value in the counter A write loads the top eight bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incremental Encoder input by setting BA 3 bits 6 and 5 to 00 Note that before doing a read of this register you should first issue a hold command at BA 2 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB ED Bitl4 Bti2 Bt Bit9 Bits BA 2 Incremental Encoder 1 Clear Hold Digital I O Read Write This port controls three different functions of the Incremental Encoder 1 chip The functio
14. by monitoring each module s IRQ status bit s If you are not planning on sharing interrupts or if you are not sure that your CPU supports interrupt sharing it is best to disable this feature and use the interrupts in the normal mode This will insure compatibility with all CPUs See chapter 4 for details on disabling the interrupt sharing circuit 14 2 N pon Ur RG C N 1 2 Interrupt Channel Select Jumpers PROGRAMMABLE INVERT P14 LK INTERRUPT gt Pc SOURCE INTERRUPT REGISTER CLR INCREMENTAL ENCODER CH 1 CLK INTERRUPT INTERRUPT REGISTER CLR INCREMENTAL ENCODER CH 2 INTERRUPT INTERRUPT REGISTER CLR INCREMENTAL ENCODER CH 3 INTERRUPT INTERRUPT REGISTER CLR Fig 1 5 Pulling Down the Interrupt Request Line 15 P14 IRQ STATUS BA 17 BIT 3 INTERRUPT INCREMENTAL ENCODER CH 1 IRQ STATUS BA 17 BIT 0 INCREMENTAL ENCODER CH 2 IRQ STATUS BA 17 BIT 1 INCREMENTAL ENCODER CH 3 IRQ STATUS BA 17 BIT 2 NOTE When using multiple modules sharing the same interrupt only one module should have the G jumper installed The rest should be disconnected Whenever you operate a single module the G jumper should be installed Whenever you operate the module with interrupt sharing disabled the G jumper should be removed 5 8254 Clock and Gate Source Select Factory Settings See Figure 1 4 This header connector shown in Figure 1 4
15. channel To determine which interrupt source has generated an interrupt you must check bits 0 through 3 of the status byte read at BA 17 Then service the interrupt that has occurred and clear the interrupt the jumper selectable interrupt is cleared by reading BA 16 and the digital interrupts are cleared by setting bits 1 and 0 in the corresponding Inc Enc Control Register and performing a read at the Clear Hold Register address Interrupt Sharing This module is capable of sharing interrupts with multiple modules This circuit is described in chapter 1 If you are not planning on using shared interrupts or you are not sure that your CPU can support shared interrupts you should disable this sharing circuit by setting bit 2 at BA 16 to a 1 By doing this the board works in normal interrupt mode and is compatible with all CPUs T3 Basic Programming For Interrupt Handling What Is an Interrupt An interrupt is an event that causes the processor in your computer to temporarily halt its current process and execute another routine Upon completion of the new routine control is returned to the original routine at the point where its execution was interrupted Interrupts are very handy for dealing with asynchronous events events that occur at less than regular intervals Keyboard activity is a good example your computer cannot predict when you might press a key and it would be a waste of processor time for it to do nothing while wai
16. for direct connection to industry standard opto 22 isolated I O racks and system modules Each digital I O line has a digital ground as shown in Figure 2 1 For all digital I O connections the high side of an external signal source or destination device is connected to the appropriate signal pin on the I O connector and the low side is connected to the DIGITAL GND A cable to provide direct connection to opto 22 systems the XO50 is available as an accessory from RTD Connecting the Timer Counter I O External connections to the timer counters on the DM6814 DM5814 can be made by connecting the high side of the external device to the appropriate signal pin on I O connector P6 and the low side to a P6 DIGITAL GND Connecting the External Interrupt The DM6814 DM5814 can receive externally generated interrupt signals EXT INTI through I O connector P2 pin 2 and EXT INT2 through I O connector P3 pin 2 and route them to an IRQ channel through on board header connectors P14 and P4 Interrupt generation is enabled through software When interrupts are enabled a rising or falling edge on the EXT INT line will cause the selected IRQ line to go high depending on the setting of BA 16 bit 1 and the IRQ status bit will change from 0 to 1 The pulse applied to the EXT INT pin should have a duration of at least 100 nano seconds Running the 5814DIAG Diagnostics Program Now that your module is ready to use you will want to try it out An easy
17. in Table 4 1 below As shown the module occupies 20 consecutive I O port locations The base address designated as BA can be selected using DIP switch S1 located on the edge of the module as described in Chapter 1 Module Settings This switch can be accessed without removing the module from the stack The following sections describe the register contents of each address used in the YO map Table 4 1 DM6814 DM5814 I O Map Address Register Description Read Function Write Function Decimal Incremental Encoder 1 Read bottom 8 bits of up down Program starting value into bottom LSB counter 8 bits of up down counter BA 0 Incremental Encoder 1 Read top 8 bits of up down Program starting value into top MSB counter 8 bits of up down counter BA 1 Clear chip latch counter value Incremental Encoder 1 Clear IRQ status flag read 8 digital program 2 digital output lines Clear Hold Digital I O input lines dependent on BA 3 dependent on BA 3 BA 2 Incremental Encoder 1 Read Incremental Encoder 1 Program Incremental Encoder 1 Chip Mode Register control register control register BA 3 Incremental Encoder 2 Read bottom 8 bits of up down Program starting value into bottom LSB counter 8 bits of up down counter BA 4 Incremental Encoder 2 Read top 8 bits of up down Program starting value into top MSB counter 8 bits of up down counter 5 Clear chip latch counter value Incremental Encoder 2 Clear IRQ status flag read 8 digit
18. lets you select the clock sources for the three 8254 16 bit timer counters Figure 1 5 shows a block diagram of the timer counter circuitry to help you in making these connections The clock source for Counter 0 is selected by placing a jumper on one of the two leftmost pairs of pins on the header OSC or ECO OSC is the on board 8 MHz clock and ECO is an external clock source which can be connected through I O connector P6 pin 1 Counter 1 has three clock sources which cascades it to Counter 0 OSC which is the on board 8 MHz clock and EC1 which is an external clock source connected through I O connector P6 pin 5 Counter 2 has three clock sources OTI which cascades it to Counter 1 OSC which is the on board 8 MHz clock and EC2 which is an D 2m c p oO C mo I FO UD O 00 y CD xol NO CLKO CLKT LK2 GT2 Fig 1 4 8254 Clock and Gate Source Jumpers P5 ON BOARD CONNECTOR 1 6 5 1 1 CLKOO XTAL 8 MHz TIMER D o PIN 10 EXT CLK 0 COUNTER 0 45V PIN 20 EXT GATE 0 TIMER 5 1 COUNTER 1 O O PIN 6 0 EXT GATE 1 PIN 7 u T C OUT 1 O 1 OUT I Ea PIN 9 4 EXT CLK 2 TIMER COUNTER O 2 9V EXT GATE o j RP PIN 11 T C OUT 2 Fig 1 5 8254 Circuit Diagram 16 external clock source connected through
19. pulse to be recognized by the circuit Figure D 1 shows a diagram of this circuit Selecting the Interrupt Channel The IRQ channel is selected by installing a jumper on header connector P4 across the desired pair of pins as described in Chapter 1 A jumper is also installed across the G pins to activate the interrupt sharing feature With this jumper installed a jumper selectable interrupt source and digital interrupt sources can share the same interrupt channel without contention This feature also allows multiple devices such as another DM6814 DM5814 module to share the same interrupt channel To determine which interrupt source has generated an interrupt you must check bits 0 through 3 of the status word read at BA 17 Then service the interrupt that has occurred and clear the interrupt the jumper selectable interrupt is cleared by reading BA 16 and the digital interrupts are cleared by setting bits 1 and 0 in the corresponding port s Control Register and performing a read at the Direc tion Mask Compare Register address Resetting the Digital Circuitry When a digital chip clear is issued all of the digital I O lines are set up as inputs and their corre sponding output registers are cleared Strobing Data into Ports 0 1 2 3 and 4 5 External data can be strobed into any digital I O chip Port 0 1 Port 2 3 and Port 4 5 by connect ing the chip s strobe jumper on P13 and enabling the strobe by setting bit 3 high in the Cont
20. sequence for the source which caused the interrupt needs to be included In C void interrupt ISR void Your code goes here Do not use any DOS functions inportb BaseAddress 16 Clear jumper selectabl interrupt outporthb 0x20 0x20 Send EOI command to 8259 In Pascal Procedure ISR Interrupt begin Your code goes here Do not use any DOS functions Port BaseAddress 16 Clear jumper selectabl interrupt Port 20 20 Send EOI command to 8259 end Saving the Startup Interrupt Mask Register IMR and Interrupt Vector The next step after writing the ISR is to save the startup state of the interrupt mask register and the interrupt vector that you will be using The IMR is located at I O port 21H The interrupt vector you will be using is located in the interrupt vector table which is simply an array of 256 bit 4 byte pointers and is located in the first 1024 bytes of memory Segment 0 Offset 0 You can read this value directly but it is a better practice to use DOS function 35H get interrupt vector Most C and Pascal compilers provide a library routine for reading the value of a vector The vectors for the hardware 7 6 interrupts are vectors 8 through 15 where IRQO uses vector 8 IRQ1 uses vector 9 and so on Thus if the DM6814 DM5814 will be using IRQ3 you should save the value of interrupt vector 11 Before you install your ISR temporarily mask ou
21. the module by its edges orient it so that the P1 bus connector s pin 1 lines up with pin 1 of the expansion connector onto which you are installing the module After carefully positioning the module so that the pins are lined up and resting on the expansion connector gently and evenly press down on the module until it is secured on the connector NOTE Do not force the module onto the connector If the module does not readily press into place remove it and try again Wiggling the module or exerting too much pressure can result in damage to the DM6814 DM5814 or to the mating module After the module is installed connect the cables as needed to I O connector P2 P3 and P6 on the module When making these connection note that there is no keying to guide you in orienta tion You must make sure that pin 1 of the cable is connected to pin 1 of the connector pin 1 is marked on the module with a small square For twisted pair cables pin 1 is the dark brown wire for standard single wire cables pin 1 is the red wire Make sure all connections are secure External I O Connections INC ENC3 IRQIN EXT INT 1 N C O m MO EXT int 2 OVERFLOWS OUT 3 4 DIGITAL GND 3 DIGITAL GND Sareea evar INC ENC3 CHB 5 6 DIGITAL GND N c 5 6 DIGITAL GND OUT 4 DIGITAL INC ENC3 CHA 7 8 DIGITAL GND n c 2 6 DIGITAL GND EXT CLK 1 5 6 EXT GATE 1 P4 3
22. 1 and 0 at BA 3 high to access the IRQ Source Register and enable digital interrupts Then you would write 0110 in the bottom four bits at BA 2 to select digital I O line P0 6 Every time P0 6 goes from low to high a positive going edge an interrupt is generated Advanced Digital Interrupts 8 Bit Programmable 8 Byte Programmable Only When you have a digital I O chip with 8 bit programmable and 8 byte programmable lines each bit programmable digital I O port supports two Advanced Digital Interrupt modes event mode or match mode These modes are used to monitor input lines for state changes The mode is selected in the port s Control Register bit 3 and enabled in the Control Register bit 4 Event Mode When enabled this mode samples the port s input lines at a specified clock rate using the 8 MHz system clock or a programmable clock in the timer counter programmed at bit 5 of the port s Digital Mode Register looking for a change in state in any one of the eight bits When a change of state occurs an interrupt is generated and the input pattern is latched into the Compare Register You can read the contents of this register to see which bit caused the interrupt to occur Bits can be masked and their state changes ignored by programming the Mask Register Match Mode When enabled this mode samples the port s input lines at a specified clock rate using the 8 MHz system clock or a programmable clock in the timer counter prog
23. 2 TIMER e COUNTER 2 45V GATE PIN 100 EXT GATE 2 Timer Counter Circuit Block Diagram Each timer counter has two inputs CLKin and GATE in and one output timer counter OUT They can be programmed as binary or BCD downcounters bywriting the appropriate data tothe command word as described in the I Omap discussion in Chapter 4 Thetimer counter outputs are available at P6 where they canbeused for interrupt generation as an A D trigger orfor timing and counting functions The timers canbe programmed to operate in one of six modes depending on your application The following paragraphs briefly describeeachmode Mode 0 Event Counter Interrupt on Terminal Count This mode is typicallyused for event counting While the timer counter counts down the output is low and when the count is complete it goes high The output stays high until anew Mode O control word is written to the timer counter Mode 1 Hardware Retriggerable One Shot The outputis initially high and goes lowon the clock pulse following a trigger to begin the one shot pulse The outputremains lowuntil the count reaches 0 and then goes high andremains highuntil the clock pulse after the next trigger Mode 2 Rate Generator This mode functions like a divide by N counter and is typically used to generate a real time clock interrupt The outputis initially high and when the count decrements to 1 the output goes lowfor oneclock pulse Th
24. 23 255 25 and then write the resulting value to the port In BASIC this is 4 12 programmed as V_SAVE V_SAVE AND 223 OUT PortAddress V To set a single bit in a port OR the current value of the port with the value b where b 2 Example Set bit 3 in a port Read in the current value of the port OR it with 8 8 23 and then write the resulting value to the port In Pascal this is programmed as V_Save V_Save OR 8 Port PortAddress V_Save Setting or clearing more than one bit at a time is accomplished just as easily To clear multiple bits in a port AND the current value of the port with the value b where b 255 the sum of the values of the bits to be cleared Note that the bits do not have to be consecutive Example Clear bits 2 4 and 6 in a port Read in the current value of the port AND it with 171 171 255 2 24 2 and then write the resulting value to the port In C this is programmed as v save v save amp 171 outportb port address v save To set multiple bits in a port OR the current value of the port with the value b where b the sum of the individual bits to be set Note that the bits to be set do not have to be consecutive Example Set bits 3 5 and 7 in a port Read in the current value of the port OR it with 168 168 2 25 2 and then write the resulting value back to the port In assembly language this is programmed as mov al v save or
25. 814 234 8087 during regular business hours eastern standard time or eastern daylight time or send a FAX requesting assistance to 814 234 5218 When sending a FAX request please include your company s name and address your name your telephone number and a brief description of the problem You can also contact us through our E mail address techsupport rtd com 1 MODULE SETTINGS The DM6814 DM5814 has jumper and switch settings you can change if necessary for your application The module is factory configured as listed in the table and shown on the layout diagram in the beginning of this chapter Should you need to change these settings use these easy to follow instructions before you stack the module with your computer system Also note that by setting the jumpers as desired on header connectors P7 through P12 for digital I O lines on the module you can configure each digital I O line to be pulled up or pulled down This procedure is explained at the end of this chapter 1 1 1 2 Factory Configured Switch and Jumper Settings Table 1 1 lists the factory settings of the user configurable jumpers and switch on the DM6814 DM5814 module Figure 1 1 shows the module layout and the locations of the factory set jumpers The following paragraphs explain how to change the factory settings Pay special attention to the setting of S1 the base address switch to avoid address contention when you first use your module in you
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27. DM6814 DM5814 User s Manual STIGO RTD Embedded Technologies Inc Real Time Devices Accessing the Analog World amp BDM 610010014 Rev A DM6814 DM5814 User s Manual RTD Embedded Technologies INC 103 Innovation Blvd State College PA 16803 0906 Phone 1 814 234 8087 FAX 1 814 234 5218 E mail sales rtd com techsupport rtd com web site http www rtd com Revision History Rev A New manual naming method Published by RTD Embedded Technologies Inc 103 Innovation Blvd State College PA 16803 0906 Copyright 1999 2002 2003 by RTD Embedded Technologies Inc All rights reserved Printed in U S A The RTD Logo is a registered trademark of RTD Embedded Technologies cpuModule and utilityModule are trademarks of RTD Embedded Technologies PhoenixPICO and PheonixPICO BIOS are trademarks of Phoenix Technologies Ltd PS 2 PC XT PC AT and IBM are trademarks of International Business Machines Inc MS DOS Windows Windows 95 Windows 98 and Windows NT are trademarks of Microsoft Corp PC 104 is a registered trademark of PC 104 Consortium All other trademarks appearing in this document are the property of their respective owners Table of Contents Incremental Encoders c cccccsscsscsscccscccssssccccccscsesccccscccscccesscscccccssssccccsccccsccssscscccssecssscccsecescsecsosssessecces A E EET ELI TRDU What Come
28. I O connector P6 pin 9 The gate of Counter 2 can be connected to the output of Counter 1 OT1 or to an external gate source EG2 connected through I O connector P6 pin 10 When no external gate source is connected this line is tied high P13 Not Used This header connector is not used on the DM6814 DM5814 and should have no jumpers installed P14 1 7 P14 Interrupt Source Select Factory Setting OT2 This header connector shown in Figure 1 6 lets you select one of four interrupt sources for inter rupt generation The four sources are external interrupt 1 P2 2 ED external interrupt 2 P3 2 OTI the output of timer counter 1 and OT2 the output of timer counter 2 To connect an interrupt source place the jumper across the desired set of pins S1 Base Address Factory Setting 300 hex 768 decimal One of the most common causes of failure when you are first trying your module is address conten tion Some of your computer s I O space is already occupied by internal I O and other peripherals When the module attempts to use I O address locations already used by another device contention results and the module does not work To avoid this problem the DM6814 DM5814 has an easily accessible DIP switch S1 which lets you select any one of 16 starting addresses in the computer s I O Should the factory setting of 300 hex 768 Table 1 2 Base Address Switch Settings S1 Base Add
29. Resistors on Digital Lines 1 9 CHAPTER 2 MODULE INSTALLATION 2 Module Installation EE M 2 3 External I O Connections OE m T 566 2 3 Connecting the Digital sese se ete eo osse se eee ossa e eee etes sese eee eese sese ses ee 2 4 Connecting Timer Counter VO 2 4 Connecting the External Interrupt ooooocmossso 2 4 Running the 5814DIAG Diagnostics Program commssss 2 4 CHAPTER 3 HARDWARE DESCRIPTION 6 1 Incremental Encoders 5 55 4 3 3 LA ASA 3 3 Defining the Map 4 3 BA 0 Incremental Encoder 1 MSB Read Write cccssssccccccsssssssssessccccccccccscsssssccsccccccesccceces 4 4 BA 1 Incremental Encoder 1 MSB Read Write 5 4 4 2 Incremental Encoder 1 Clear Hold Digital I O
30. T computers channels 2 and 9 are the same channel To activate a channel you must install a jumper vertically across the desired IRQ channel s pins Only one channel on either P4 or P16 should be jumpered at any time Figure 1 2a shows the factory settings This module supports an interrupt sharing mode where the pins labeled G connect a 1 kilohm pull down resistor to the output of a high impedance tri state driver which carries the interrupt request signal This pull down resistor drives the interrupt request line low whenever interrupts are not active Whenever an interrupt request is made the tri state buffer is enabled forcing the output high and generating an interrupt There are four IRQ circuits one for the P14 jumper selectable interrupts and one each for the incremental encoder channels Their outputs are tied together through an OR gate allowing all interrupt sources to share the same IRQ channel To determine which circuit has gener ated an interrupt on the selected channel read the status byte 1 O address location BA 17 and check the status of bits 0 through 3 as described in Chapter 4 After the interrupt has been serviced you must return the IRQ line low disabling the tri state buffer and pulling the output low again This is done by clearing the IRQ for the source which generated the interrupt You also can have two or more modules that share the same IRQ channel You can tell which module issued the interrupt request
31. al program 2 digital output lines Clear Hold Digital I O input lines dependent on BA 7 dependent on BA 7 BA 6 Incremental Encoder 2 Read Incremental Encoder 2 Program Incremental Encoder 2 Chip Mode Register control register control register BA 7 Incremental Encoder 3 Read bottom 8 bits of up down Program starting value into bottom LSB counter 8 bits of up down counter BA 8 Incremental Encoder 3 Read top 8 bits of up down Program starting value into top MSB counter 8 bits of up down counter BA 9 Clear chip latch counter value Incremental Encoder 3 Clear IRQ status flag read 8 digital program 2 digital output lines Clear Hold Digital I O input lines dependent on BA 11 dependent on BA 11 BA 10 Incremental Encoder 3 Read Incremental Encoder 3 Program Incremental Encoder 3 Chip Mode Register control register control register al 11 8254 TC Counter 0 Read value in Counter 0 Load count in Counter 0 12 4 12 8254 TC Counter 1 Read value in Counter 1 Load count in Counter 1 BA 13 8254 TC Counter 2 Read value in Counter 2 Load count in Counter 2 BA 14 8254 Control Word Program counter mode 15 Enable interrupt line P14 Disable Clear IRQ IRQ Enable Clear interrupt line P14 sharing BA IRQ Status Reserved Bas z 18 Reserved Reserved BA 19 BA Base Address 43 BA 0 Incremental Encoder 1 MSB Read Write This port accesses the
32. ant to pull lines up for connection to switches This will pull the line high when the switch is disconnected Or you may want to pull lines down for connection to relays which control turning motors on and off These motors turn on when the digital lines controlling them are high By pulling these lines down you can ensure that when the data acquisition system is first turned on the motors will not switch on before the port is initialized Pull up pull down resistors have been factory installed on the module and jumpers have been provided for P7 through P12 bits 0 through 3 for all 24 digital lines Bits 4 through 7 on all six connectors are not used and should not be jumpered Each port and bit is labeled on the module P7 connects to the resistors for Port 0 P0 0 P0 3 P8 connects to the resistors for Port 1 P1 0 P1 3 and so on The pins are labeled G for ground on one end and V for 5V on the other end The middle pin is common Figure 1 8 shows P7 with the factory installed jumpers placed between the common pin middle pin of the three and the V pin For pull downs install the jumper across the common pin middle pin and G pin To disable the pull up pull down resistor remove the jumper gt OQ P7 PORTO Fig 1 8 Port Pull up Pull d Resistor Connections P 19 1 10 CHAPTER 2 MODULE INSTALLATION The DM6814 DM5814 is easy to install in your cpuModule or other PC 104 based system Th
33. bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incremental Encoder input by setting BA 7 bits 6 and 5 to 00 n7 06 os 04 03 IUE Bitl4 Bis Bti2 Bt Bt9 Bits Note that before doing a read of this register you should first issue a hold command at BA 6 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB BA 6 Incremental Encoder 2 Clear Hold Digital I O Read Write This port controls three different functions of the Incremental Encoder 2 chip The function per formed at this address depends on the setting of bits 1 and 0 at BA 7 If BA 7 bits 1 and 0 are 00 a read clears the Incremental Encoder 2 IRQ status flag and a write at this address clears the chip Clearing the IRQ status flag simply resets the flag to 0 Clearing the entire chip resets the IRQ status flag to 0 sets all digital I O lines for input and clears the contents of the 16 bit Incremental Encoder 2 counter If BA 7 bits 1 and 0 are 01 a write at this address commands the Incremental Encoder 1 counter to latch its current count value in a hold register A read is ignored BBE BE ee REMIS Deed Do P3 5 252 P3 1 50 P2 3 F2 at put put put nput np hput hr Y only only only only only only Output Output If BA 7 bits 1 and 0 are 10 a read at this address retu
34. by the system timer IRQI is used by the keyboard IRQ3 by COM2 IRQ4 by COMI and IRQ6 by the disk drives Therefore it is important for you to know which IRQ lines are available in your system for use by the module 8259 Programmable Interrupt Controller The chip responsible for handling interrupt requests in the PC is the 8259 Programmable Interrupt Controller To use interrupts you need to know how to read and set the 8259 s interrupt mask register IMR and how to send the end of interrupt EOI command to the 8259 Interrupt Mask Register IMR Each bit in the interrupt mask register IMR contains the mask status of an IRQ line bit 0 is for IRQO bit 1 is for IRQI and so on If a bit is set equal to 1 then the corresponding IRQ is masked For all bits D enabled and it will not generate an interrupt If a bit is clear equal to 0 then the corresponding IRQ is unmasked and can generate interrupts The IMR is programmed through port 21H End of Interrupt EOD Command 74 After an interrupt service routine is complete the 8259 interrupt controller must be notified This is done by writing the value 20H to I O port 20H What Exactly Happens When an Interrupt Occurs Understanding the sequence of events when an interrupt is triggered is necessary to properly write software interrupt handlers When an interrupt request line is driven high by a peripheral device such as the DM6814 DM5814 the interrupt c
35. ch of these circuits has one 16 bit up down counter for incre mental encoding applications such as position encoding and velocity detection and eight digital I O lines available for control functions Six lines are input only and two are input output The body of this manual is written for a DM6814 DM5814 configured with three incremental encoder circuits on board Your module can have one two or three such circuits depending on your specifications to the factory at the time of your order If you have less than three encoder circuits the remaining circuits each consist of 16 programmable digital I O lines Appendix D will help you under stand how to program your module if you have a DM6814 DM5814 that combines incremental encoder and digital I O circuits on the same module 8254 Timer Counters An 8254 programmable interval timer provides three 16 bit 8 MHz timer counters to support a wide range of user timing and counting functions What Comes With Your Module You receive the following items in your module package DM6814 DM5814 module with stackthrough bus header Mounting hardware Example programs in BASIC and with source code amp diagnostics software User s manual If any item is missing or damaged please call RTD Embedded Technologies Inc Customer Service Department at 814 234 8087 If you require service outside the U S contact your local distributor Module Accessories In addition to the items included
36. e output then goes high again the timer counterreloads the initial count and the process is repeated This sequencecontinuesindefinitely Mode3 Square Wave Mode Similar to Mode 2 except for the duty cycle output this modeis typicallyused for baudrate generation The output is initially high and whenthe count decrements to one halfits initial count the output goes lowforthe remainder ofthe count The timer counterreloads and the output goes high again This processrepeats indefinitely 63 Mode4 Software Triggered Strobe The outputis initially high When the initial count expires the output goeslowfor one clock pulse and then goes high again Countingis triggered bywriting the initial count Mode 5 Hardware Triggered Strobe Retriggerable The output is initially high Counting is triggered by the rising edge of the gate input When the initial counthas expired the output goes lowfor one clock pulse and then goes highagain Appendix C provides the 8254 data sheet 7 INTERRUPTS Thischapterexplains P14 jumperselectableinterruptsand basicinterruptprogrammingtechniques 7 1 7 2 The DM6814 DM5814 has four interrupt circuits which can generate interrupts on any IRQ channel 2 through 7 depending on the setting of the jumper on P4 P14 Jumper Selectable Interrupts The DM6814 DM5814 circuitry has four jumper selectable interrupt sources which can be set by installing a jumper across the desired pair of
37. en in a digital interrupt mode Address Register Description Read Function Decimal Digital I O Port 0 Read Port 0 digital input lines Program Port 0 digital output lines Digital I O Port 1 Read Port 1 digital input lines Program Port 1 digital output lines Clear digital IRQ status flag read digital chip program Port 0 Port 0 Clear Port 0 direction mask or compare direction mask or compare register Direction Mask Compare register dependent on BA 3 dependent on BA 3 BA 2 Read Digital IRQ Status Set Digital Control Register Read digital interrupt status word Program digital control register BA 3 Available clock sources are the 8 MHz system clock and the output of the 8254 Counter 1 16 bit programmable clock When a digital input line changes state it must stay at the new Address Register Description Read Function Decimal Digital VO Port 2 Read Port 2 digital input lines Program Port 2 digital output lines Digital VO Port Read Port 3 digital input lines Program Port 3 digital output lines Clear digital IRQ status flag read Clear digital chip program Port 2 Port 2 Clear Port 2 direction mask or compare direction mask or compare register Direction Mask Compare register dependent on BA 7 dependent on BA 7 BA 6 Read Digital IRQ Status Set Digital Control Register Read digital interrupt status word Program digital control register state for two edges of the clock pulse 62 5 nanoseco
38. ental Encoder Chip 2 with a 16 Bit Programmable 5 y INA 0 JOB O4 Circuit Map 3 When Replacing Incremental Encoder Chip 3 with a 16 Bit Programmable Circuit BA 0 4 8 Digital I O Bit Programmable Port Read Write This port transfers the 8 bit Port 0 2 or 4 bit programmable digital input output data between the module and external devices The bits are individually programmed as input or output by writing to the 1 output PO 7 P05 04 5 P02 PO 1 POO Direction Register at BA 2 6 or 10 For all bits set as inputs a read reads the input values and a write is ignored For all bits set as outputs a read reads the last value sent out on the line and a write D7 D6 05 D4 D3 D2 D1 POS POS 04 2 POO writes the current loaded value out to the line Note that when any reset of the digital circuitry is performed clear chip or computer reset all digital lines are reset to inputs and their corresponding output registers are cleared BA 1 5 9 Digital I O Byte Programmable Port Read Write D 7 This port transfers the 8 bit Port 1 3 or 5 digital input or digital output byte between the module and an external device When set as inputs a read reads the input values and a write is ignored When set as outputs a read reads the last value sent out of the port and a write writes the current loaded value out of the port
39. entrancy exists for many floating point emulators as well meaning you may have to avoid floating point real math in your ISR Note that the problem of reentrancy exists no matter what programming language you are using Even if you are writing your ISR in assembly language DOS and many floating point emulators are not reentrant Of course there are ways around this problem such as those which involve checking to see if any DOS functions are currently active when your ISR is called but such solutions are well beyond the scope of this discussion The second major concern when writing your ISR is to make it as short as possible in terms of execution time Spending long periods of time in your ISR may mean that other important interrupts are being ignored Also if you spend too long in your ISR it may be called again before you have completed handling the first run This often leads to a hang that requires a reboot Your ISR should have this structure Push any processor registers used in your ISR Most C and Pascal interrupt routines automati cally do this for you Put the body of your routine here Clear the interrupt status flag Issue the EOI command to the 8259 interrupt controller by writing 20H to port 20H Pop all registers pushed on entrance Most and Pascal interrupt routines automatically do this for you The following C and Pascal examples show what the shell of your ISR should be like Only the clear interrupt command
40. er Counter Circuit Block Diagram eee ee eee een senten sese tense etos es enses een sesta enses o 3 4 8254 Timer Counter Circuit Block Diagram sento saa toss ea ense sea ense ee 6 3 Digital Interrupt Timing Diagram 0 s2000sss00000ss0snnnsssssnnnssssnnnnsssnnnnssssnnnssssnnnnsssnnnnssssnnnnensne D 10 INTRODUCTION The DM6814 DM5814 incremental encoder dataModule turns your IBM PC compatible cpuModule or other PC 104 computer into a high performance control system The DM5814 and DM6814 are the same board except for the addition of the AT bus connector on the DM6814 This connector allows you to stack the module easily with other AT modules and also allows you access to the AT interrupts Ultra compact for embedded and portable applications the module features Three 16 bit incremental encoder up down counters Three 16 bit timer counters and on board MHz clock Direct connection to opto 22 I O system modules Operation from single 5V supply DOS example programs with source code in BASIC and Diagnostics software The following paragraphs briefly describe the major functions of the module A detailed discussion of module functions is included in subsequent chapters Incremental Encoders Depending on your specifications when ordering your DM6814 DM58 14 your module will have up to three incremental encoder circuits Ea
41. estore the interrupt mask register and interrupt vectors to the state they were in when your program started To restore the IMR write the value that was saved when your program started to I O port 21H Restore the interrupt vector that was saved at startup with either DOS function 35H get interrupt vector or use the library routine supplied with your compiler Performing these two steps will guarantee that the interrupt status of your computer is the same after running your program as it was before your program started running Common Interrupt Mistakes Remember that hardware interrupts are numbered 8 through 15 even though the corresponding IRQs are numbered 0 through 7 Two of the most common mistakes when writing an ISR are forgetting to clear the interrupt status of the DM6814 DM5814 and forgetting to issue the EOI command to the 8259 interrupt controller before exiting the ISR 7 7 7 8 APPENDIX DM6814 DM5814SPECIFICATIONS A 1 A 2 DM6814 DM5814 Characteristics Typical 25 Interface Switch selectable base address I O mapped Jumper selectable interrupts Incremental Encoder Interface luber oft channels a as COVE A A UL MEN 16 bits a aa 1 MHz MM NEC L PUE O 5 volts Digital 1 0 umber vor IS A 6 bit programmable O is L iput Output levels 2 2 2 2 0 9 9 2022229
42. f the operators discussed in this section with an example of how each is used with C Pascal and BASIC Note that the modulus operator is used to retrieve the least significant byte LSB of a two byte word and the integer division operator is used to retrieve the most significant byte MSB C 96 amp a b c a b c a b8c a b c Pascal MOD DIV AND OR a b MOD c a bDIVc MOD AND OR BASIC b MOD a b c a bANDc a bORc Many compilers have functions that can read write either 8 or 16 bits from to an I O port For example Turbo Pascal uses Port for 8 bit port operations and PortW for 16 bits Turbo C uses inportb for an 8 bit read of a port and inport for a 16 bit read Be sure to use only 8 bit opera tions with the DM6814 DM5814 Clearing and Setting Bits in a Port When you clear or set one or more bits in a port you must be careful that you do not change the status of the other bits You can preserve the status of all bits you do not wish to change by proper use of the AND and OR binary operators Using AND and OR single or multiple bits can be easily cleared in one operation Note that most registers in the DM6814 DM5814 cannot be read back therefore you must save the value in your program To clear a single bit in a port AND the current value of the port with the value b where b 255 25 Example Clear bit 5 a port Read the current value of the port AND it with 223 2
43. gnal that can be used to clear the incre mental encoder counter When this bit is high and the P4 2 input is held high the counter is held in reset When the P4 2 line is low the counters count normally If this bit is kept low the P4 2 line has no affect on the counter This function is normally connected to the index pulse from the incremental encoder A read returns the current settings of the bits BA 12 8254 Timer Counter 0 Read Write This address is used to read write timer counter 0 A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded 07 D6 05 Da D3 02 01 DO BA 13 8254 Timer Counter 1 Read Write This address is used to read write timer counter 1 A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded BA 14 8254 Timer Counter 2 Read Write This address is used to read write timer counter 2 A read shows the count in the counter and a write loads the counter with a new value Counting begins as soon as the count is loaded 4 10 BA 15 8254 Timer Counter Control Word Write Only This address is used to write to the control register for the 8254 The control word is defined above BA 16 Clear IRQ IRQ Enable Read Write Aread clears the P14 jumper selectable IRQ status flag at BA 17 bit 3 IRQ Enable Register
44. in your module package RTD Embedded Technologies Inc offers a full line of software and hardware accessories Call your local distributor or our main office for more information about these accessories and for help in choosing the best items to support your module s application Hardware Accessories Hardware accessories for the DM6814 DM5814 include the DOP series opto 22 optoisolated digital input boards the DMR series opto 22 mechanical relay output boards the TB50 terminal board and XB50 prototype terminal board for easy signal access and prototype development the DM14 extender board for testing your module in a conventional desktop computer and 50 twisted pair wire flat ribbon cable assembly for external interfacing Using This Manual This manual is intended to help you install your new module and get it running quickly while also providing enough detail about the module and its functions so that you can enjoy maximum use of its features even in the most complex applications We assume that you already have an understanding of data acquisition principles and that you can customize the example software or write your own applica tion programs When You Need Help This manual and the example programs in the software package included with your module provide enough information to properly use all of the module s features If you have any problems installing or using this dataModule contact our Technical Support Department
45. ing on P4 Bits 5 and 6 Disables enables the Incremental Encoder 1 input pulse Bit 7 This bit is used to enable digital input 0 2 as a signal that can be used to clear the incre mental encoder counter When this bit is high and the P0 2 input is held high the counter is held in reset When the P0 2 line is low the counters count normally If this bit is kept low the P0 2 line has no affect on the counter This function is normally connected to the index pulse from the incremental encoder A read returns the current settings of the bits BA 4 Incremental Encoder 2 MSB Read Write This port accesses the bottom eight bits of the Incremental Encoder 2 16 bit up down counter A read provides the current LSB value in the counter A write loads the bottom eight bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incre mental Encoder input by setting BA 7 bits 6 and 5 to 00 1 BitO Note that before doing a read of this register you should first issue a hold command at BA 6 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB BA 5 Incremental Encoder 2 MSB Read Write This port accesses the top eight bits of the Incremental Encoder 2 16 bit up down counter A read provides the current MSB value in the counter A write loads the top eight
46. ing your first ISR we recommend that you stick to the basics just something that will convince you that it works such as incrementing a global variable NOTE If you are writing an ISR using assembly language you are responsible for pushing and popping registers and using IRET instead of RET There are a few cautions you must consider when writing your ISR The most important is do not use any DOS functions or routines that call DOS functions from within an ISR DOS is not reentrant that is a DOS function cannot call itself In typical programming this will not happen because of the way DOS is written But what about when using interrupts Then you could have a situation such as this in your program If DOS function X is being executed when an interrupt occurs and the interrupt routine makes a call to DOS function X then function X is essentially being called while it is already active Such a reentrancy attempt spells disaster because DOS functions are not 75 written to support it This is a complex concept and you do not need to understand it Just make sure that you do not call any DOS functions from within your ISR The one wrinkle is that unfortunately it is not obvious which library routines included with your compiler use DOS functions A rule of thumb is that routines which write to the screen or check the status of or read the keyboard and any disk I O routines use DOS and should be avoided in your ISR The same problem of re
47. is chapter tells you step by step how to install and connect the mod ule After you have installed the module and made all of your connections you can turn your system on and run the 5814DIAG board diagnostics program included on your example software disk to verify that your module is working 2 1 Module Installation Keep the module in its antistatic bag until you are ready to install it in your cpuModule or other PC 104 based system When removing it from the bag hold the module at the edges and do not touch the components or connectors Before installing the module in your system check the jumper and switch settings Chapter 1 reviews the factory settings and how to change them If you need to change any settings refer to the appropriate instructions in Chapter 1 Note that incompatible jumper settings can result in unpredict able module operation and erratic response The DM6814 DM5814 comes with a stackthrough P1 connector The stackthrough connector lets you stack another module on top of your DM6814 DM5814 To install the module follow the procedures described in the computer manual and the steps below 1 2 Turn OFF the power to your system Touch a metal rack to discharge any static buildup and then remove the module from its anti static bag Select the appropriate standoffs for your application to secure the module when you install it in your system two sizes are included with the module Holding
48. n per formed at this address depends on the setting of bits 1 and 0 at BA 3 If BA 3 bits 1 and 0 are 00 a read clears the Incremental Encoder 1 IRQ status flag and a write at this address clears the chip Clearing the IRQ status flag simply resets the flag to 0 Clearing the entire chip resets the IRQ status flag to 0 sets all digital I O lines for input and clears the contents of the 16 bit Incremental Encoder 1 counter If BA 3 bits 1 and 0 are 01 a write at this address commands the Incremental Encoder 1 counter to latch its current count value in a hold register A read is ignored If BA 3 bits 1 and 0 are 10 a read at this address returns the value of the six digital input lines plus P0 0 and P0 1 if they are set up as digital input lines and a write sends a value out to P0 0 and P0 1 if they are set up as digital output lines COIE PS P1 1 5 put put Bo Input ios u av only only only only Output Output Digital I O Register BA 3 bits 1 and 0 10 BA 3 Incremental Encoder 1 Chip Mode Register Read Write Bits 0 and 1 Select clear mode hold mode or digital I O mode for operations performed at BA 2 Bit 2 Sets the direction of the P0 0 digital line Bit 3 Sets the direction of the P0 1 digital line Bit 4 Disables enables the interrupt circuit on the Incremental Encoder 1 chip The IRQ channel is determined by the jumper sett
49. ncremental Encoder 3 IRQ status flag and a write at this address clears the chip Clearing the IRQ status flag simply resets the flag to 0 Clearing the entire chip resets the IRQ status flag to 0 sets all digital T O lines for input and clears the contents of the 16 bit Incremental Encoder 3 counter ES IE P533 PS T Ad p put ut xit only only only only only utput If BA 11 bits 1 and 0 are 01 a write at this address commands the Incremental Encoder 3 counter to latch its current count value in a hold register A read is ignored If BA 11 bits 1 and 0 are 10 a read at this address returns the value of the six digital input lines plus P4 0 and P4 1 if they are set up as digital input lines and a write sends a value out to P4 0 and P4 1 if they are set up as digital output lines Digital Register BA 11 bits 1 and 0 10 BA 11 Incremental Encoder 3 Chip Mode Register Read Write Bits 0 and 1 Select clear mode hold mode or digital I O mode for operations performed at BA 10 Bit 2 Sets the direction of the P4 0 digital line Bit 3 Sets the direction of the P4 1 digital line Bit 4 Disables enables the interrupt circuit on the Incremental Encoder 3 chip The IRQ channel is determined by the jumper setting on P4 Bits 5 and 6 Disables enables the Incremental Encoder 3 input pulse Bit 7 This bit is used to enable digital input P4 2 as a si
50. nds when using the 8 MHz clock before Address Register Description Read Function Decimal Digital I O Port 4 Read Port 4 digital input lines Program Port 4 digital output lines Digital I O Port 5 Read Port 5 digital input lines Program Port 5 digital output lines Clear digital IRQ status flag read Clear digital chip program Port 4 Port 4 Clear Port 4 direction mask or compare direction mask or compare register Direction Mask Compare register dependent on BA 11 dependent on BA 3 10 Read Digital IRQ Status Set Digital Control Register Read digital interrupt status word Program digital control register itis recognized and before an interrupt can be generated This feature eliminates noise glitches that can cause a false state change on an input line and generate an unwanted interrupt Bit 6 Reserved Bit 7 Read only digital IRQ status VO Mapping for 16 Bit Programmable I O Lines 07 06 05 04 03 D2 01 U UU POF E P45 n 44 43 PA2 PAO When you replace any Incremental Encoder chip with a circuit that has 16 bit programmable digital lines you should use the I O maps and programming description that follows as required to pro gram these lines Map 1 When Replacing Incremental Encoder Chip 1 with a 16 Bit Programmable Circuit 07 D6 05 D4 D3 02 D1 DO Ol LO Map 2 When Replacing Increm
51. nnsnsnnnnnnsonnnnnsonnnnnnssnnnnnssnnnnsnsnnnnssssnnnssssnnnnsssnnnnssssnnnnnsnee 7 7 APPENDIX A DM6814 DM5814 SPECIFICATIONS ccccccccccccsccccccccccccccccccecees A 1 APPENDIX CONNECTOR PIN ASSIGNMENTS 1 APPENDIX COMPONENT DATA SHEETS TO 1 APPENDIX D OPTIONAL DM6814 DM5814 CONFIGURATIONS D 1 Mixing Incremental Encoder Chips and Digital I O Circuits on the Same Module D 3 V O Mapping for 16 Bit Programmable I O Lines 22000000000s0000002000000nn000000n000000n0 0000010 00000n000000nn00000000 D 3 V O Mapping for 16 Bit Programmable I O Lines 2000s00000s000000n0000000n00000nn000000n0 0000010000001 see eos e ena D 6 Digital Interrupts 00s00000sssssnonssssnnnssssnnnsssssnnnssssnnnsssnsnnnssnsnnnnsssnnnsssssnnnssssnnnnssssnnnssssnnnnsssnnnnssssnnnnsssnnnnsssse D 9 Advanced Digital Interrupts 8 Bit Programmable 8 Byte Programmable D 9 Sampling Digital Lines for Change of State ccccccccssrssccsssccscccccosccscessccscssesccccscscccsssesecsssoccccseoes D 10 Selecting the Interrupt Channel 2000ssss000sss00000s2000nnsssnsnnsssnsnnnssssnnnnssssnnnssssnnnnsssnnnnssssnnnnsssnnnnnnsnnen D 10 Resetting the Digital Circuitry cccccccccsccsccccsccccsccccscsccccscccccscsoccssesccccsssccccsscscccsssscccesseseessecooees D 10 Strobing Data in
52. nsennnnnsonnnnnnssnnnnsssnnnnensnnnnssssnnnssssssnnnnnssse 7 3 Basic Programming For Interrupt Handling 000ssss000ssssnnnsssssnnnssssnnnnssnsnnnssssnnnnsssnnnnssssnnnssssnnnnsnnse 7 4 What Is an Interrupt 1 7 4 Interrupt Request Lines 7 4 8259 Programmable Interrupt Controller 0000ssssssssnsnssnssnsnnsnsnennssnnnnsnsunnnsnnnnssnsunnnsnnnnsnnnennnsnnnnnnnnee 7 4 Interrupt Mask Register IMR cccooooccooonoccoconnoccononoccccnonccocnoncccoconcccccnonccocooocococoonccocnocccccooocococnoso 7 4 End of Interrupt EOI Command ooccosososonosononononononconacacacacacancocacocococococonocococcccococonocicccncccccncnes 7 4 What Exactly Happens When an Interrupt Occurs 55 lt 7 5 Using Interrupts in Your Programs 0sssss00sss000000ss00unsssnsnnnssssnnnsssnsnnnssnsnnnnssssnunnssssnnnnsssnnnnssssnnnsssssee 7 5 Writing an Interrupt Service Routine ISR 000ssss00sssssunssesnunsssssnnnssnsnunssssnnnsssssnunssnsnnnsssssunsnne 7 5 Saving the Startup Interrupt Mask Register IMR and Interrupt 7 6 Restoring the Startup IMR and Interrupt Vector 0ssssonsssssssnnnessennnnsnsnnnnsnssnnnenssnnnnsssnnnnssnsnnnnsnene 7 7 Common Interrupt Mistakes osssssoonossssonnnsssonn
53. nsssssnssnnunsssssssese 4 10 BA 15 8254 Timer Counter Control Word Write Only sssssssesesesesnsnsnsnsnsnsnnsnsnsnsnsnssnsssnssenee 4 10 BA 16 Clear IRQ IRQ Enable Read Write 00cccccssscsssssssscecscscscscscssscssscscscscessssssssssccess 4 10 BA 17 IRQ Status Read Only 4 11 18 Reserved 4 11 4 11 Programming the DM6814 DM5814 ssoosssssonnssssonnssnsnonnnnnnonnnnnnonnnnnnsennnnnsennnnnnnennnnnsennnnssennnnnnsennnnnsnee 4 12 Clearing and Setting Bits in a Port 0ssss00sssssnonssssnnnsssnsnnnssnsnnsssnsunsssnsnnnssnsnnsssssnnnssnsnnssssnnsssssnunsnne 4 12 CHAPTER 5 DIGITAL 10 Rn 5 1 CHAPTER 6 TIMER COUNTERS ecce eese ee eese sese seeossosssssseseseeeesesesessssssesessss O 1 CHAPTER 7 INTERRUPTS e eee eese eese e ense 7 1 P14 Jumper Selectable Interrupts 555 7 3 Selecting the Interrupt Channel 22000s000ns0ns000nnnsnsonnnnnnonnnnn
54. ontroller checks to see if interrupts are enabled for that IRQ and then checks to see if other interrupts are active or requested and determines which interrupt has priority The interrupt controller then interrupts the processor The current code segment CS instruction pointer IP and flags are pushed on the stack for storage and a new CS and IP are loaded from a table that exists in the lowest 1024 bytes of memory This table is referred to as the interrupt vector table and each entry is called an interrupt vector Once the new CS and IP are loaded from the interrupt vector table the processor begins executing the code located at CS IP When the interrupt routine is completed the CS IP and flags that were pushed on the stack when the interrupt occurred are now popped from the stack and execution resumes from the point where it was interrupted Using Interrupts in Your Programs Adding interrupts to your software is not as difficult as it may seem and what they add in terms of performance is often worth the effort Note however that although it is not that hard to use interrupts the smallest mistake will often lead to a system hang that requires a reboot This can be both frustrat ing and time consuming But after a few tries you ll get the bugs worked out and enjoy the benefits of properly executed interrupts In addition to reading the following paragraphs study the INTRPTS source code included on your DM6814 DM5814 program disk for a
55. ovides the current LSB value in the counter A write loads the bottom eight bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incre mental Encoder input by setting BA 11 bits 6 and 5 to 00 Note that before doing a read of this register you should first issue a hold command at BA 10 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB BA 9 Incremental Encoder 3 MSB Read Write EA CERCA CTI BES This port accesses the top eight bits of the Incremental Encoder 3 16 bit up down counter A read provides the current MSB value in the counter A write loads the top eight bits of a starting value into the counter When writing an initial value to the counter you must first disable the Incremental Encoder input by setting BA 11 bits 6 and 5 to 00 Note that before doing a read of this register you should first issue a hold command at BA 10 to ensure that you do not read the chip in the middle of a count Also when reading the count be sure to read the LSB first followed by the MSB BA 10 Incremental Encoder 3 Clear Hold Digital I O Read Write This port controls three different functions of the Incremental Encoder 3 chip The function per formed at this address depends on the setting of bits 1 and 0 at BA 11 If BA 11 bits 1 and 0 are 00 a read clears the I
56. pins at P14 To use these interrupts an interrupt source must be jumpered on P14 an interrupt channel must be jumpered on P4 and the IRQ enable must be set high BA 16 bit 0 BA 16 bit 1 sets the polarity of the interrupt Incremental Encoder Interrupts Each Incremental Encoder chip is capable of also generating an interrupt The interrupt source for each chip is connected through the I O connector P2 on pins 33 17 and 1 To use these interrupts an interrupt source must be connected to P2 an interrupt channel must be jumpered on P4 and the IRQ enable for the corresponding chip must be set high BA 3 bit 4 BA 7 bit 4 BA 11 bit 4 You can read the status byte at BA 17 to determine which circuit caused the interrupt and issue the proper clear interrupt command Each chip also has an overflow underflow output on P2 pins 35 19 3 This output will generate a pulse each time the Incremental Encoder counts past 65535 or below 0 This pin can be connected back to the interrupt input to generate an interrupt on overflow underflow Selecting the Interrupt Channel The IRQ channel is selected by installing a jumper on header connector P4 or P16 across the desired pair of pins as described in Chapter 1 A jumper is also installed across the G pins if you are using the interrupt sharing feature The jumper selectable interrupt source and the Incremental Encoder interrupt sources are OR d together and can use the same interrupt
57. r system Table 1 1 Factory Settings Switch Factory Settings Jumper Function Controlled Jumpers Installed Connects P14 jumper selectable interrupt source Jumper installed G ground for to an interrupt channel pulls tri state buffers to buffer interrupt channels P4 ground G for multiple interrupt applications disabled CLKO OSC CLK1 Sets the clock and gate sources for the 8254 CLK2 OT1 GT2 EG2 P5 timer counter timer counters cascaded Activates pull up pull down resistors on Port 0 P7 digital I O lines Port 0 lines 0 3 only Not Installed Activates pull up pull down resistors on Port 1 digital I O lines Port 1 lines 0 3 only Not Installed Activates pull up pull down resistors on Port 2 digital I O lines Port 2 lines 0 3 only Not Installed Activates pull up pull down resistors on Port 3 P10 digital I O lines Port 3 lines 0 3 only Not Installed Activates pull up pull down resistors on Port 4 P11 digital I O lines Port 4 lines 0 3 only Not Installed Activates pull up pull down resistors on Port 5 P12 digital I O lines Port 5 lines 0 3 only Not Installed P13 Selects one of four interrupt sources for interrupt P14 generation OT2 Connects interrupt source jumpered on P14 to an P16 AT interrupt channel DM6814 only no jumper Sets the base address 300 hex 768 decimal 13 D BASE ADDRESS o0002000 9
58. rammed at bit 5 of the port s Digital Mode Register and compares all input states to the value programmed in the Compare Register When the states of all of the lines match the value in the Compare Register an interrupt is generated Bits can be masked and their states ignored by programming the Mask Register NOTE Make sure that the port s Digital IRQ Mode bit is set to 1 selecting match mode BEFORE writing the Compare Register value for the port BA 17 IRQ Status Read Only When you have a mixture of Incremental Encoder circuits and digital I O circuits on the module a read at thiss address shows the status of the digital interrupt circuits as well as the jumper selectable interrupt circuit so that you can determine which circuit generated an interrupt For bits 0 through 2 only the bits corresponding to digital I O chips on the module are valid Sampling Digital Lines for Change of State CLOCK DIGITAL INPUT IRQ OUT g D 1 Digital Interrupt Timing Diagram In the digital interrupt modes the digital lines are sampled at a rate set by the 8 MHz system clock or the clock programmed in the timer counter programmed at bit 5 of the port s Digital Mode Register With each clock pulse the digital circuitry looks at the state of the next bit To provide noise rejection and prevent erroneous interrupt generation because of noise spikes on the digital lines a change in the state of any bit must be seen for two edges of a clock
59. ress Switch Setting Base Address Switch Setting Decimal Hex 4321 Decimal Hex 4321 512 200 0000 768 300 1000 544 220 0001 800 320 1001 576 240 0010 832 340 1010 608 260 0011 864 360 1011 640 280 0100 896 880 1100 672 2A0 0101 928 3 0 1101 704 QC0 0110 960 3 0 1110 736 QE0 0111 992 380 1111 0 Closed 1 Open 1 8 decimal be unsuitable for your system you can select a different base address simply by setting the switches to any one of the values listed in Table 1 2 The table shows the switch settings and their corresponding decimal and hexadecimal in parentheses values Make sure that you verify the order of the switch numbers on the switch 1 through 4 before setting them When the switches are pulled forward they are OPEN or set to logic 1 as labeled on the DIP switch package When you set the base address for your module record the value in the table inside the back cover Figure 1 7 shows the DIP switch set for a base address of 300 hex 768 decimal P7 through P12 Pull up Pull down Resistors on Digital I O Lines The DM6814 DM5814 has 24 TTL CMOS compatible digital I O lines which can be interfaced with external devices These lines are grouped into eight lines each per encoder circuit Six lines are input only and two are I O lines You can connect pull up or pull down resistors to any or all of these lines on a bit by bit basis You may w
60. rns the value of the six digital input lines input 10 digit output 11 res plus P2 0 and P2 1 if they are set up as digital input lines and a write sends a value out to P2 0 and P2 1 if they are set up as digital output lines Digital I O Register BA 7 bits 1 and 0 10 BA 7 Incremental Encoder 2 Chip Mode Register Read Write Bits 0 and 1 Select clear mode hold mode or digital I O mode for operations performed at BA 6 Bit 2 Sets the direction of the P2 0 digital line Bit 3 Sets the direction of the P2 1 digital line Bit 4 Disables enables the interrupt circuit on the Incremental Encoder 2 chip The IRQ channel is determined by the jumper setting on P4 Bits 5 and 6 Disables enables the Incremental Encoder 2 input pulse Bit 7 This bit is used to enable digital input P2 2 as a signal that can be used to clear the incre mental encoder counter When this bit is high and the P2 2 input is held high the counter is 47 held in reset When the P2 2 line is low the counters count normally If this bit is kept low the P2 2 line has no affect on the counter This function is normally connected to the index pulse from the incremental encoder A read returns the current settings of the bits BA 8 Incremental Encoder 3 MSB Read Write This port accesses the bottom eight bits of the Incremental Encoder 3 16 bit up down counter A t2 Bt Bi Hit6 Bit4 read pr
61. rol Regis ter The strobe input is the EXT INTI signal P2 2 NOTE DO NOT CONNECT a jumper on P13 for any Incremental Encoder circuit D 10 APPENDIX D WARRANTY AND RETURN POLICY Return Policy Ifyou wish to return a product to the factory for service please follow this procedure Read the Limited Warranty to familiarize yourself with our warranty policy Contact the factory for a Return Merchandise Authorization RMA number Please have the following available Complete board name Board serial number A detailed description ofthe board s behavior List the name of a contact person familiar with technical details of the problem or situation along with their phone and fax numbers address and e mail address if available Listyourshipping address Indicate the shipping method you would like used to return the product to you We will not ship by next day service without your pre approval Carefully package the product using proper anti static packaging Write the RMA number in large 1 letters on the outside of the package Return the package to RTD Embedded Technologies Inc 103 Innovation Blvd State College PA 16803 0906 USA D 1 LIMITED WARRANTY RTD Embedded Technologies Inc warrants the hardware and software products it manufac tures and produces to be free from defects in materials and workmanship for one year following the date of shipment from RTD Embedded Technologies INC This warranty i
62. s With Your Module cccsscssssscccccccccssssscsssssccccccsccesccsssscccccccscascssscsscsccccccessesccssssccscccesces Module Accessories Application Software and Drivers se sssseescosescooeoscoooccooecccooeocooecccooeccooeoccooeoccoecccooecscoecccooecscoseccoseesessee Hardware Accessories sicvsssiccssccsccscceccosec sceoscecesccssscsescteesesconesescevedecsooeseiscoscedsevesss esscsscesscuccedesesscesessseos 4 Using This Manual iia A When You T A CHAPTER 1 MODULE 5 8 5 5 66 I Factory Configured Switch and Jumper Settings 0 20000sss0000022000000200000000000n000000000000000 0000000 se teen sese eno 1 3 Interrupt Channel Select Factory Setting Jumper installed on IRQ Disabled 1 4 P5 8254 Clock and Gate Source Select Factory Settings See Figure 1 4 ec 1 6 EA m 1 7 P14 Interrupt Source Select Factory Setting OT2 eee eee seen es seen nes enses eene 1 7 S1 Base Address Factory Setting 300 hex 768 eee eese ee 1 8 P7 through P12 Pull up Pull down
63. s inputs a read reads the input values and a write is ignored For all bits set as outputs a read reads the last value sent out on the line and a write writes the current loaded value out to the line Note that when any reset of the digital circuitry is performed clear chip or computer reset all digital lines are reset to inputs and their corresponding output registers are cleared output HU P2 1 P20 PO POD P27 P2 6 P25 P47 P45 F BA 2 6 10 Clear IRQ Program Port Direction Port Direction IRQ Source Registers Read Write lt gt va 02 wv oo 1 output 14 54 54 5 P1 6 P37 P57 P56 P55 A read clears the IRQ status flag or provides the contents of one of three control registers Port 0 2 4 Direction Port 1 3 5 Direction or Port 0 1 2 3 or 4 5 chip IRQ Source A write clears the digital chip D7 D6 05 Da D3 D2 D1 DO Sort 1100 P1 4 FOR PORT 0 1 ah eae O P06 1010 12 1110 P16 0011 03 0111 07 1011 P13 1111 17 or programs one of the three control registers depending on the setting of bits 0 and 1 at 3 7 or 11 When bits 1 and 0 at BA 3 7 or 11 are 00 the read write operations clear the digital IRQ status flag read and the digital chip write When these bits are set to any other value one of the three Port 0 1 2 3 or 4 5 digital I O registers is addre
64. s limited to the original purchaser of product and is not transferable During the one year warranty period RTD Embedded Technologies will repair or replace at its option any defective products or parts at no additional charge provided that the product is returned shipping prepaid to RTD Embedded Technologies All replaced parts and products become the property of RTD Embedded Technologies Before returning any product for repair customers are required to contact the factory for an RMA number THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY PRODUCTS WHICH HAVE BEEN DAMAGED AS A RESULT OF ACCIDENT MISUSE ABUSE such as use of incorrect input voltages improper or insufficient ventilation failure to follow the operating instructions that are provided by RTD Embedded Technologies acts of God or other contingencies beyond the control of RTD Embedded Technologies OR AS A RESULT OF SERVICE OR MODIFICA TION BY ANYONE OTHER THAN RTD Embedded Technologies EXCEPT AS EXPRESSLY SET FORTH ABOVE NO OTHER WARRANTIES ARE EXPRESSED OR IMPLIED INCLUD ING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND RTD Embedded Technologies EXPRESSLY DISCLAIMS ALL WARRANTIES NOT STATED HEREIN ALL IMPLIED WARRANTIES INCLUDING IMPLIED WARRANTIES FOR MECHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE LIMITED TO THE DURATION OF THIS WARRANTY IN THE EVENT THE PRODUCT IS NOT FREE FROM DEFECTS AS WARRANTE
65. ssed Port Direction Register BA 3 or 7 or 11 bits 1 and 0 01 This register programs the direction input or output of each bit at Port 0 2 or 4 Port Direction Register BA 3 or 7 or 11 bits 1 and 0 10 This register programs the direction input or output of each bit at Port 1 3 or 5 Chip IRQ Source Register BA 3 or 7 or 11 bits 1 and 0 11 This register programs the bit to be used to generate a digital interrupt for the Port 0 1 Port 2 3 or Port 4 5 chip A digital interrupt is generated when the selected bit goes from low to high interrupt generated on the positive going edge BA 3 7 11 Read Digital I O Status Program Digital Mode Read Write A read shows you whether a digital interrupt has occurred and lets you review the states of the other bits in this register If bit 7 is high then a digital interrupt has taken place This provides the same status information as BA 17 bits 0 through 2 Digital Mode Register Bits 0 and 1 Select the clear mode initiated by a read write operation at BA 2 6 or 10 or the 05 control register you talk to at BA 2 6 or 10 Bit Enables EPLD strobe input used with header which can be used only for digital I O circuits NOT Incremental Encoder circuits Bit 4 Disables enables digital interrupts The IRQ channel is determined by the jumper setting on P4 Bit 5 Sets the clock rate at which the digital lines are sampled wh
66. t the state will remain low regardless of what you output an output of 1 will not change the bit s state until the bit is unmasked Compare Register BA 3 or 7 or 11 bits 1 and 0 11 This register is used for the Advanced Digital Interrupt modes In the match mode where an interrupt is generated when the Port 0 2 or 4 bits match a loaded value this register is used to load the bit pattern to be matched at the port Bits can be selectively masked so that they are ignored when making a match NOTE Make sure that bit 3 at BA 3 7 or 11 is set to 1 selecting match mode BEFORE writing the Compare Register value at this address In the evegj node where an interrupt is generated when any bit changes its current state the value which caused the interrupt is latched at this register and can be read from it Bits can be selectively masked using the Mask Register so a change of state is ignored on Digital Interrupts Each digital I O chip that replaces an Incremental Encoder chip contains the digital I O circuitry for two ports or 16 bit programmable lines One line on each digital I O chip can be programmed as a digital interrupt by programming the IRQ select register with the digital line to be monitored selecting an IRQ channel on P4 and setting the IRQ enable bit high in the Control Register If for example you wanted to use Port 0 bit 6 to generate an interrupt you would select the desired IRQ channel and set bits 4
67. t on BA 3 source dependent on BA 3 BA 2 Read Digital IRQ Status Set Digital Control Register Read digital interrupt status word Program digital control register Map 1 When Replacing Incremental Encoder Chip 1 with a 16 Bit Programmable Address Register Description Read Function Decimal Digital I O Port 2 Read Port 2 digital input lines Program Port 2 digital output lines Digital VO Port Read Port 3 digital input lines Program Port 3 digital output lines Clear digital IRQ status flag read Clear digital chip program Port 2 Clear IRQ Program Port Port 2 direction Port direction or direction Port direction or IRQ Direction amp IRQ Source IRQ source dependent on BA 7 source dependent on BA 7 6 Read Digital IRQ Status Set Digital Control Register Read digital interrupt status word Program digital control register BA 7 Circuit Address Register Description Read Function Decimal Digital VO Port 4 Read Port 4 digital input lines Program Port 4 digital output lines Digital Port 5 Read Port 5 digital input lines Program Port 5 digital output lines Clear digital IRQ status flag read Clear digital chip program Port 4 Clear IRQ Program Port Port 4 direction Port 5 direction or direction Port 5 direction or IRQ Direction amp IRQ Source IRQ source dependent on BA 11 source dependent on BA 11 10 Read Digital IRQ Status Set Digital Control Register Read digital in
68. t the IRQ you will be using This prevents the IRQ from requesting an interrupt while you are installing and initializing your ISR To mask the IRQ read in the current IMR at I O port 21H and set the bit that corresponds to your IRQ remember setting a bit disables interrupts on that IRQ while clearing a bit enables them The IMR is arranged so that bit 0 is for IRQO bit 1 is for IRQ1 and so on See the paragraph entitled Interrupt Mask Register IMR earlier this chapter for help in determining your IRQ s bit After setting the bit write the new value to I O port 21H With the startup IMR saved and the interrupts on your IRQ temporarily disabled you can assign the interrupt vector to point to your ISR Again you can overwrite the appropriate entry in the vector table with a direct memory write but this is a bad practice Instead use either DOS function 25H set interrupt vector or if your compiler provides it the library routine for setting an interrupt vector Remember that vector 8 is for IRQO vector 9 is for IRQ1 and so on If you need to program the source of your interrupts do that next For example if you are using the programmable interval timer to generate interrupts you must program it to run in the proper mode and at the proper rate Finally clear the bit in the IMR for the IRQ you are using This enables interrupts on the IRQ Restoring the Startup IMR and Interrupt Vector Before exiting your program you must r
69. terrupt status word Program digital control register D3 Map 2 When Replacing Incremental Encoder Chip 2 with a 16 Bit Programmable Circuit Map 3 When Replacing Incremental Encoder Chip 3 with a 16 Bit Programmable Circuit BA 0 4 8 Digital I O Port Read Write This port transfers the 8 bit Port 0 2 or 4 bit programmable digital input output data between the D7 D6 05 Da D3 02 D1 DO module and external devices The bits are individually programmed as input or output by writing to the Port 0 2 or 4 Direction Register at BA 2 6 or 10 For all bits set as inputs a read reads the input values and a write is ignored For all bits set as outputs a read reads the last value sent out on the line and a write writes the current loaded value out to the line Note that when any reset of the digital circuitry is performed clear chip or computer reset all digital lines are reset to inputs and their corresponding output registers are cleared BA 1 5 9 Digital I O Port Read Write D7 D6 D5 D4 03 02 D1 17 16 P15 P14 1 1 1 10 a p 5 a P50 NOK C CX P1 5 P3 3 P535 5 1 ROK This port transfers the 8 bit Port 1 3 or 5 bit programmable digital input output data between the module and external devices The bits are individually programmed as input or output by writing to the Port 1 3 or 5 Direction Register at BA 2 6 or 10 For all bits set a
70. ting for a keystroke to occur Thus the interrupt scheme is used and the processor proceeds with other tasks Then when a keystroke does occur the keyboard interrupts the processor and the processor gets the keyboard data places it in memory and then returns to what it was doing before it was interrupted Other common devices that use interrupts are modems disk drives and mice Your DM6814 DM5814 can interrupt the processor when a variety of conditions are met By using these interrupts you can write software that effectively deals with real world events Interrupt Request Lines To allow different peripheral devices to generate interrupts on the same computer the PC bus has eight different interrupt request IRQ lines A transition from low to high on one of these lines gener ates an interrupt request which is handled by the PC s interrupt controller The interrupt controller checks to see if interrupts are to be acknowledged from that IRQ and if another interrupt is already in progress it decides if the new request should supersede the one in progress or if it has to wait until the one in progress is done This prioritizing allows an interrupt to be interrupted if the second request has a higher priority The priority level is based on the number of the IRQ IRQO has the highest priority is second highest and so on through IRQ7 which has the lowest Many of the IRQs are used by the standard system resources IRQO is used
71. to Ports 0 1 2 3 and 4 5 0sss000sssssnonnnnsnonnennnonnnnnnnennnnnsonnnnnnnonnnnnsennnnsnennnnnnsennnennes D 10 APPENDIX E WARRANTY AND RETURN 55555 E 1 1 1 1 2 13 1 4 1 5 1 6 1 7 1 8 2 1 3 1 3 2 6 1 D 1 List of Illustrations Module Layout Showing Factory Configured Settings oommmsssss 1 4 Interrupt Channel Select Jumper 000s0ssssssssusnsnnnessnnsnsnnnnnsnnnnsnsnonnsnnnnnsnsnennsnnnnsnnsennnsnnnnse 1 5 Pulling Down the Interrupt Request Lines 1 5 8254 Clock and Gate Sources Jumpers P5 eres ee eee e eee eee tnos esee eaten esee ee sese eee een 1 6 8254 Circuit Diagram 1 6 Interrupt Source Select Jumper 14 6 1 7 Base Address Switch S1 1 8 Port 0 Pull up Pull down Resistor Connections P7 sssssssnosssssnnnssssnnnnssssnnnnsssnnnnssssnnnssssnnnnennne 1 9 P2 and P6 I O Connector Pin Assignments 00sssssonsonsssonnnnssssnnnnenssnnnnsnssnnnnssssnnnnsnssnnnnnsnee 2 4 DM6814 DM5814 Block Diagram sssooossssonssssonnsnssonnsnsnennnnsnnnnnnnennnnnsonnnnnsonnnnnennnnnnennnnssnnes 3 3 Tim
72. to use menu driven diagnostics program 5814DIAG is included with your example software to help you verify your module s operation You can also use this program to make sure that your current base address setting does not contend with another device 2 5 3 HARDWARE DESCRIPTION This chapter describes the features of the DM6814 DM5814 hardware The major circuits are the incremen tal encoders and the timer counters 31 3 2 The DM6814 DM5814 has two major circuits the incremental encoders and the timer counters Figure 3 1 shows the block diagram of the module This chapter describes the hardware which makes up the major circuits ADDRESS DECODE 1 0 CONNECTOR P6 EXTERNAL INTERRUPTS INCREMENTAL ENCODER Nw 1 PC BUS 2 INCREMENTAL EN CONTROL CONNECTOR P2 1 0 CONNECTOR Fig 5 1 DM6814 DM5814 Block Diagram 2 Incremental Encoders The DM6814 DM5814 has three incremental encoder circuits Each circuit has one 16 bit up down counter for incremental encoding applications such as position encoding and velocity detection and eight digital 1 O lines available for control functions Six lines are input only and two lines are input output see I O connector pinout diagrams in Appendix Timer Counters An 8254 programmable interval timer provides three 16 bit 8 MHz timer counters to support a wide range of timing and counting functions Figure 3

DM6814/DM5814 User`s Manual - RTD Embedded Technologies, Inc.

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