USB2085 User`s Manual
Contents
1. 5 2 External Trigger Mode When A D is in the initialization if the A D hardware parameter ADPara TriggerSource USB2085 TRIGSRC OUT we can achieve the external trigger acquisition In this function when calling the InitDeviceAD function A D will not immediately access to the conversion process but wait for the external trigger source signals accord with the condition then start converting the data It also can be interpreted as the hardware trigger Trigger source is the DTR Digital Trigger Source When the trigger signal is the digital signal standard TTL level using the DTR trigger source 1 Edge trigger function Edge trigger is to capture the characteristics of the changes between the trigger source signal and the trigger level signal to trigger A D conversion When ADPara TriggerDir USB2085 TRIGDIR NEGATIVE choose the trigger mode as the falling edge trigger That is when the DTR trigger signal 1s on the falling edge A D will immediately access to the conversion process and its follow up changes have no effect on A D acquisition ee USB2085 Data Acquisition V6 3 15 A D Start Pulse Digital Trigger Signal f PO FFNME Ca a The falling edge before The waiting time gt The first falling edge after the the A D started is di AJD started is valid l wE Se nt bi l w TEOSE The first working TINA TAS ETE T aa A D working Pulse eee ee je Tar Figure 5 2 Falling edge Trigger When ADPara2. Acquisition V6 3 15 Chapter 2 Components Layout Diagram and a Brief Description 2 1 The Main Component Layout Diagram JP6 JPA JPS RPI O 4A74502x DID IMAA TERETERE ELLE CNI rab A Hb N24 J Camco l e ihir PLU LURE TE mAN PI NS i JP3 3333353140 TUA RAD E ea III MEL Ta tu l iid CALL Power led AD Work Read Half Overflow XYFT Co Ltd SR5D15 100 JPWI JPW2 JPW3 2 2 The Function Description for the Main Component 2 2 1 Signal Input and Output Connectors CNI Analog signal connector Pl Digital signal input and output connector 2 2 2 Potentiometer RPI Analog signal input zero point adjustment potentiometer RP3 Analog signal input full scale adjustment potentiometer USB2085 Data Acquisition V6 3 15 2 2 3 Jumper JPI JP2 and JP3 Analog signal input single ended double end selection JP4 JP5 and JP6 Analog signal input range selection JPW1 JPW2 and JPW3 DSP loader mode selection by default 1 2 pins shorted Analog input single ended and double ended selection 2 2 4 Status indicator AD Work A D working status indicator on for normal condition Read Data reading indicator Half Data buffer half full indicator on for half full status power led power indicator on for normal condition Overflow Data buffer full indicator on for overflow status 2 2 5 Physical ID of DID1 DIDI Se
3. TriggerDir USB2085 TRIGDIR POSITIVE choose the trigger mode as rising edge trigger That is when the DTR trigger signal is on the rising edge A D will immediately access to the conversion process and its follow up changes have no effect on A D acquisition When ADPara TriggerDir USB2085 TRIGDIR POSIT NEGAT choose the trigger mode as rising or falling edge trigger That is when the DTR trigger signal is on the rising or falling edge A D will immediately access to the conversion process and its follow up changes have no effect on A D acquisition This function can be used in the case that the acquisition will occur if the exoteric signal changes 2 Level trigger function Level trigger is to capture the condition that trigger signal is higher or lower than the trigger level to trigger A D conversion When ADPara TriggerDir USB2085 TRIGDIR NEGATIVE it means the trigger level is low When DTR trigger signal is in low level A D is in the conversion process once the trigger signal is in the high level A D conversion will automatically stop when the trigger signal is in the low level again A D will re access to the conversion process which is only converting the data when the trigger signal is in the low level USB2085 Data Acquisition V6 3 15 AIStart ref Digital Trigger Sigpal The high level before The waiting time gt the A D started isi Figure 5 3 High Level Trigger When ADPara Tri
4. 5 clock output CLKOUT of CN1 as well as other equipments for example clock frequency generators To use the external clock function the hardware parameters ADPara ClockSouce USB2085 CLOCKSRC OUT should be installed in the software The clock frequency depends on the frequency of the external clock and the clock frequency on board that is the frequency depends on the hardware parameters ADPara Frequency only functions in the packet acquisition mode and its sampling frequency of the A D 1s fully controlled by the external clock frequency 6 3 Methods of Using Continuum and Grouping Sampling Function 6 3 1 Continuum Sampling Function The continuous acquisition function means the sampling periods for every two data points are completely equal in the sampling process of A D that is completely uniform speed acquisition without any pause so we call that continuous acquisition To use the continuous acquisition function the hardware parameters ADPara ADMode USB2085 ADMODE SEQUENCE should be installed in the software For example in the internal clock mode hardware parameters ADPara Frequency 100000 100KHz should be installed and 10 microseconds after the A D converts the first data point the second data point conversion starts and then 10 microseconds later the third data point begins to convert and so on The formula for calculating the external signal frequency is as follows Under the internal clock mode a USB2085
5. 50us group interval ends We start the next group begin to convert the data of channel 0 and 1 and then enter into the waiting state again and the conversion is going on in this way as the diagram following shows Start Enabled eee Convert Pulse al al ILI II 2 ee ai ib Figure 6 1 Grouping Sampling which grouping cycle No is 1 under the Internal Clock Mode Note a internal clock sample cycle b AD chips conversion time c Group Interval d group cycle ee USB2085 Data Acquisition V6 3 15 Change the loops of group into 2 then the acquisition process is to collect the first set of data including two data of channel 0 and two data of channel 1 the conversion order is 0 1 0 1 We need 10us to sample each of the four data After the conversion time of an AD chip AD will automatically stop to enter into the waiting state until the 50us Group Interval ends We start the next group begin to convert the data of channel 0 and 1 and then enter into the waiting state again and the conversion is going on in this way as the diagram following shows Start Enabled Sees ee Convert Pulse oe ae A d Figure 6 2 Grouping Sampling which grouping cvcle No is 2 under the Internal Clock Mode Notes a internal clock sample cycle b AD chips conversion time c Group Interval d group cycle USB2085 Data Acquisition V6 3 15 Chapter 7 Notes Calibration and Warrantv Policv 7 1 Notes In our pro
6. AIO A15 the negative side of the analog input signal is connected to AI16 AI31 equipments in industrial sites share the AGND with USB2085 board wee AIO analog signal device AI16 e All N m device AI17 CY ill M e e A115 AI3B1 MA device dozens of KO to hundreds of KQ AGND l l TARA Figure 4 2 double ended input connection USB2085 Data Acquisition V6 3 15 4 3 Other Connections DIO switch signal D switch sienal L e p 00 g B DII DOI FI 1 DO2 Ga e e id DO7 Ga a A switch device a switch device switch device DI2 switch device DGND DGND Se Figure 4 3 digital signal input connection Figure 4 4 digital signal output connection MET a CLKOUT gt _ lag DTR lt CLKIN G 4 CLKIN B Bi DTR D T Fi ra IA DGND YV DGND TE Sea a Figure 4 5 clock input and trigger Signal Connection Figure 4 6 external clock and trigger Signal Connection 4 4 Methods of Realizing the Multi card Synchronization Three methods can realize the synchronization for the USB2085 the first method is using the cascade master slave card the second one is using the common external trigger and the last one is using the common external clock When using master slave cascade card programs the master card ge
7. DBZ amp DIS l Dt 12 DOI 14 DO3 Ig DOS ji DO 20 DGND Pin definition about P1 DI0 DI7 DO0 DO7 Digital output Output Power output 5V max 100 mA DGND Digital signals ground Note The default is there is no 5V output between 1 2 pins of the PI if want to output 5V we should add an Oohm resistor on the R4300 USB2085 Data Acquisition V6 3 15 Chapter 4 Connection Wavs for Each Signal 4 1 Analog Input Single ended Connection Single ended mode can achieve a signal input by one channel and several signals use the common reference ground This mode is widely applied in occasions of the small interference and relatively many channels AIO analog signal All AD 1 lq af T e A131 T Figure 4 1 single ended input connection 4 2 Analog Input Differential ended Mode Double ended input mode which was also called differential input mode uses positive and negative channels to input a signal This mode is mostly used when biggish interference happens and the channel numbers are few Single ended double ended mode can be set by the software please refer to USB2085 software manual According to the diagram below USB2085 board can be connected as analog voltage double ended input mode which can effectively suppress common mode interference signal to improve the accuracy of acquisition Positive side of the 16 channel analog input signal is connected to
8. Data Acquisition V6 3 15 External signal frequency A D sampling frequency cycle signal points x the total number of sample channels External signal cycle 1 external signal frequency Under the external clock mode External signal frequency external clock frequency cycle signal points x the total number of sample channels External signal cycle 1 external signal frequency Enable ee ee Pulse ae Figure 6 1 collecting continuum sampling in internal clock mode Note a sampling cycle 6 3 2 Grouping Sampling Function Grouping acquisition pseudo synchronous acquisition function refers to the sampling clock frequency conversion among the channels of the group in the AD sampling process and also a certain waiting time exists between every two groups this period of time is known as the Group Interval Loops of group refer to numbers of the cycle acquisition for each channel in the same group In the internal clock mode and the fixed frequency external clock mode the time between the groups is known as group cycle The conversion process of this acquisition mode as follows a short time stop after the channels conversion in the group that is Group Interval and then converting the next group followed by repeated operations in order so we call it grouping acquisition The purpose of the application of the grouping acquisition is that at a relatively slow frequency to ensure that all of the time difference between c
9. USB2085 User s Manual te Beijing ART Technology Development Co Ltd USB2085 Data Acquisition V6 3 15 Contents COTTE e E EE E E Sar ET E f f 2 CTD CE FV GIVI acoso scasies scscusanu sau sensacos os N E N me eoaserers 3 Chapter 2 Components Layout Diagram and a Brief Description ss sssessesnnnnnnnnnnnnznnnzzzznnnnnnzznzzzzzntnnzzznzzzzzznennnzznnnzzana 5 2 1 The Main Component Layout Diagram l EEA AREA EEA EEA Ann n nn ttanta 5 2 2 The Function Description for the Main Component na 5 2 2 1 Signal Input and Output Connectors cccccceessssseseseesesseseeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 5 22 2 Oe UO MS cs a a EA apg yo TE 5 2 2 A IMO E S A EA OA ve sel EN EA T AON OAE ENEA ATA ETE A O OEE N OES 6 Di a a OE aeae E E E E E E gs aausoaceaudegesesdsues 6 DA d Wy SIC a BI UB a D eN ENN 6 CHET FSC OCCT i a ANE EE E E E 8 3 1 The Definition of Analog Signal Input and Output Connector ccc cccceeeseeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeseeeeeeess 8 3 2 The Definition of Digital Signal Input and Output Connector Lee seen ennnennnnnnnnnnnnnzznznnzzznnznnanannzananzanzzzznnanananaa 9 Chapter 4 Connection Ways for Each Signal nanna na cece eA AAA EA EA EEA EEA AEEE EMB MM MEEENZNNENEEEEEEEEEZZZZZZZZZEZEEEEEATA 10 41 Analog Input Sime ie cnded Ome CO a e sree nee ene tear cence sae ene een veeseesedUene tear eeseunedUenstenrvenetnestenstearteaeesers 10 4 2 An
10. USB2085 Data Acquisition V6 3 15 Chapter I Overview In the fields of Real time Signal Processing Digital Image Processing and others high speed and high precision data acquisition modules are demanded ART USB2085 data acquisition module which brings in advantages of similar products that produced in china and other countries 1s convenient for use high cost and stable performance ART USB2085 is a data acquisition module based on USB bus It can be directly inserted into computer s USB interface which is compatible with USB2085 to constitute the laboratory product quality testing center and systems for different areas of data acquisition waveform analysis and processing It may also constitute the monitoring system for industrial production process Unpacking Checklist Check the shipping carton for any damage If the shipping carton and contents are damaged notify the local dealer or sales for a replacement Retain the shipping carton and packing material for inspection by the dealer Check for the following items in the package If there are any missing items contact your local dealer or sales gt USB2085 Data Acquisition Board gt ART Disk a user s manual pdf b drive c catalog gt Warranty Card FEATURES Analog Input gt Converter Type AD7663 default AD7665 10V 0 5V gt 16 bit resolution gt Sampling Rate max 250K when use AD7665 up to 500KHz Note Frequency Formula sampling frequency main fre
11. alog Input Difierential ended Mod 6 ssresisissrisissrsisisekrrisasosrrisada briis ri broind nee eee eee 10 A o U A A NEA E EE NET EE EEE AEA EE E E E E ET E TEA 11 4 4 Methods of Realizing the Multi card Synchronization ccccccccccseeeeeeseeseeeeseseeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 11 Chapter 5 The Instruction of the Trigger Function sisssissisiieetinzzzzsnsninenttisiszjjstzzeztrittzzezttikesik esters 13 Sla T o 7 M E e O O 13 PET 00 PIO Ea EE AEAEE 13 Chapter 6 Methods of Using Internal and External Clock Function ss sssseesennnzzznnnnnzznnnnnnzzznnnnnnnnnnnnzzzzznnannanznznnnna 16 M E e N E N EN EN ENE E E E E E 16 EPA a EO A a EE E E TA TA A AA AAA ATI A A A 16 6 3 Methods of Using Continuum and Grouping Sampling Function ss sesseeenennnnnnnnnnznnmenznnnnnnan nn nn nn mnn n nanna 16 6 3 1 Continuum Sampling FUNCTION Ann nanna 16 6 9 2 Grouping samplhine PUG CH OM cei i a 17 Chapter 7 Notes Calibration ANd Warranty PolicV ss eeeeennnnnnnn rna n nanna a EEA E Anna AAAEEKEKENAAAAnEnAnAEZZZZZZZZAEEEEAEEtA 20 TERNO os asciste cis coc adams ne sess sins A A sateue feoasenues a suacusenadoaesendetiues nesaeesaeest toads A 20 7 2 Analog Signal Input Calibratiom 0 anna 20 FAROE PO PR ee ene eee 20 Products Rapid Installation and Self check ise LELI en 22 Rod E a ETETE E EE E E E EE E EE E E A EE E EE E ATTAT 22 Se E E E E ee E ee E E E a A 22 Deleo Wrono list illa ot aa se seepage 22
12. ducts packing user can find a user manual a USB2085 module and a qualitv guarantee card Users must keep quality guarantee card carefully if the products have some problems and need repairing please send products together with quality guarantee card to ART we will provide good after sale service and solve the problem as quickly as we can When using USB2085 in order to prevent the IC chip from electrostatic harm please do not touch IC chip in the front panel of USB2085 module 7 2 Analog Signal Input Calibration Every device has to be calibrated before sending from the factory It is necessary to calibrate the module again if users want to after using for a period of time or changing the input range In the manual we introduce how to calibrate USB2085 in 5V calibrations of other input ranges are similar Prepare a digital voltage instrument which the resolution is more than 5 5 bit install the USB2085 module and then power on warm up for fifteen minutes 1 Zero adjustment select one channel of analog inputs take the channel AIOfor example connect OV to AIO and then run ART Data Acquisition Measurement Suite in the WINDOWS Choose channel 0 5V input range and start sampling adjust potentiometer RP1 in order to make voltage value is 0 000V or about 0 000V Zero adjustment of other channels is alike 2 Full scale adjustment select one channel of analog inputs take the channel AIO for example connect 4999 84mV to AIO and th
13. e should be installation information of the installed device in the Device Manager when the device does not work you can check this item Open Start gt Programs gt ART Demonstration Monitoring and Control System gt Corresponding Board gt Advanced Testing Presentation System the program is a standard testing procedure Based on the specification of Pin definition connect the signal acquisition data and test whether AD is normal or not Connect the input pins to the corresponding output pins and use the testing procedure to test whether the switch is normal or not Delete Wrong Installation When you select the wrong drive or viruses lead to driver error you can carry out the following operations In Resource Explorer open CD ROM drive run Others gt SUPPORT gt USB bat procedures and delete the hardware information that relevant to our boards and then carry out the process of section I all over again we can complete the new installation
14. en run ART Data Acquisition Measurement Suite in the WINDOWS Choose channel 0 5V input range and start sampling adjust potentiometer RP3 in order to make voltage value is 4999 84mV or about 4999 84mV Full scale adjustment of other channels is alike 3 Repeat steps above until meet the requirement 7 3 Warranty Policy Thank you for choosing ART To understand your rights and enjoy all the after sales services we offer please read the following carefully 1 Before using ART s products please read the user manual and follow the instructions exactly When sending in damaged products for repair please attach an RMA application form which can be downloaded from www art control com 2 All ART products come with a limited two year warranty gt The warranty period starts on the day the product is shipped from ART s factory gt For products containing storage devices hard drives flash cards etc please back up your data before sending them for repair ART is not responsible for any loss of data gt Please ensure the use of properly licensed software with our systems ART does not condone the use of pirated software and will not service systems using such software ART will not be held legally responsible for products ee K USB2085 Data Acquisition V6 3 15 shipped with unlicensed software installed bv the user 3 Our repair service is not covered by ART s guarantee in the following situations Damage caused by not fol
15. ernal clock sampling period x the total number of sample channels x Loops of group AD chips conversion time Group Interval External signal cycle cycle signal points Loops of group x Group Cycle External signal frequency 1 external signal cycle Under the external clock mode a fixed frequency external clock Group Cycle external clock cycle External signal cycle cycle signal points Loops of group x Group Cycle External signal frequency 1 external signal cycle Formula Notes The internal sampling clock cycle 1 AD Para Frequency The total number of sampling channels AD Para Last Channel AD Para First Channel 1 Loops of group ADPara LoopsOfGroup AD Chips conversion time see AD Analog Input Function parameter Group Interval AD Para Group Interval Signal Cycle Points with the display of the waveform signal in test procedures we can use the mouse to measure the signal cycle points Under the internal clock mode for example sample two channel 0 1 and then 0 and 1 become a group Sampling frequency Frequency 100000Hz cycle is 10us Loops of group is 1 Group Interval 50us then the acquisition process is to collect a set of data first including a data of channel 0 and a data of channel 1 We need 10uS to sample the two data 20us to convert the data from the two channels After the conversion time of an AD chip AD will automatically cut off to enter into the waiting state until the
16. ggerDir USB2085 TRIGDIR POSITIVE it means the trigger level is high When DTR trigger signal is in high level A D is in the conversion process once the trigger signal is in the low level A D conversion will automatically stop when the trigger signal is in the high level again A D will re access to the conversion process which is only converting the data when the trigger signal is in the high level When ADPara TriggerDir USB2085 TRIGDIR POSIT NEGAT it means the trigger level is low or high The effect is the same as the internal software trigger USB2085 Data Acquisition V6 3 15 Chapter 6 Methods of Using Internal and External Clock Function 6 1 Internal Clock Function Internal Clock Function refers to the use of on board clock oscillator and the clock signals which are produced bv the user specified frequency to trigger the A D conversion regularly To use the clock function the hardware parameters ADPara ClockSouce USB2085 CLOCKSRC IN should be installed in the software The frequency of the clock in the software depends on the hardware parameters ADPara Frequency For example if Frequency 100000 that means A D work frequency is 100000Hz that is 100 KHz 10us point 6 2 External Clock Function External Clock Function refers to the use of the outside clock signals to trigger the A D conversion regularly The clock signals are provide by the CLKIN pin of the CNI connector The outside clock can be provided by USB208
17. hannels to become smaller in order to make the phase difference become smaller thus to ensure the synchronization of the channels so we also say it is the pseudo synchronous acquisition function In a group the higher the sampling frequency is the longer Group Interval is and the better the relative synchronization signal 1s The sampling frequency in a group depends on ADPara Frequency Loops of group depends on ADPara LoopsOfGroup the Group Interval depend on ADPara Group Interval Based on the grouping function it can be divided into the internal clock mode and the external clock mode Under the internal clock mode the group cycle is decided by the internal clock sampling period the total number of sampling channels Loops of group and Group Interval together In each cycle of a group AD only collects a set of data Under the external clock mode external clock cycle internal clock sampling cycle x the total number of sampling channels x Loops of group AD chip conversion time AD data acquisition is controlled and triggered by external clock The external clock mode is divided into fixed frequency external clock mode and unfixed frequency external clock mode Under the fixed frequency external clock mode the group cycle is the sampling period of the external clock ee USB2085 Data Acquisition V6 3 15 The formula for calculating the external signal frequency is as follows Under the internal clock mode Group Cycle the int
18. lowing instructions in the User s Manual Damage caused by carelessness on the user s part during product transportation Damage caused by unsuitable storage environments 1 e high temperatures high humidity or volatile chemicals VV V V Damage from improper repair by unauthorized ART technicians gt Products with altered and or damaged serial numbers are not entitled to our service 4 Customers are responsible for shipping costs to transport damaged products to our company or sales office 5 To ensure the speed and quality of product repair please download an RMA application form from our company website USB2085 Data Acquisition V6 3 15 Products Rapid Installation and Self check Rapid Installation Product driven procedure is the operating system adaptive installation mode After inserting the disc you can select the appropriate board type on the pop up interface click the button driver installation or select CD ROM drive in Resource Explorer locate the product catalog and enter into the APP folder and implement Setup exe file After the installation pop up CD ROM shut off your computer insert the USB card If it is a USB product it can be directly inserted into the device When the system prompts that it finds a new hardware you do not specify a drive path the operating system can automatically look up it from the system directory and then you can complete the installation Self check At this moment ther
19. nerally uses the internal clock source model while the slave card uses the external clock source mode After the master card and the slave card are initialized according to the corresponding clock source mode At first start all the slave cards as the main card has not been activated and there is no output clock signal so the slave card enters the wait state until the main card was activated At this moment the multi card synchronization has been realized When you need to sample more than channels of a card you could consider using the multi card cascaded model to expand the number of channels USB2085 Data Acquisition V6 3 15 CLKIN gt Slave Card 1 Slave Card 2 When using the common external trigger please make sure all parameters of different USB2085 are the same At first CLKOUT configure hardware parameters and use analog or digital signal triggering DTR then connect the signal that will be sampled by USB2085 input triggering signal from ART pin or DTR pin then click Start button at this time USB2085 does not sample any signal but waits for external trigger signal When each module is waiting for external trigger signal use the common external trigger signal to startup modules at last we can realize synchronization data acquisition in this USB 2085 DTR gt USB 2085 Mi gt USB 2085 When using the common external clock trigger please make sure all parameters of different USB2085 are the same A
20. quency the number of frequency division main frequency 144MHz 16 bit frequency division the number of frequency division range 576 2 when use AD7665 the number of frequency division range 288 40000000 Analog Input Mode 32SE 16DI AD Mode continuum sampling grouping sampling Trigger Type level trigger edge trigger Trigger Direction falling edge trigger rising edge trigger high level trigger and low level trigger Clock Source external clock internal clock software configurable On board Memory 96K word FIFO Memory Signs full and half full Analog Input Common mode Voltage Range lt 2V AD Conversion Time 1 25us Programmable Gain 1 2 4 8 AD8251 default or 1 2 5 10 AD8250 or 1 10 100 1000 AD8253 Analog Input Impedance 10MQ Amplifier Set up Time 785ns 0 001 max Non linear error 3LSB Maximum BUY ONLINE at art control com englishs or CALL 86 10 51289836 CN 3 VV VV VV VV VV VV V USB2085 Data Acquisition V6 3 15 gt System Measurement Accuracy 0 01 gt Operating Temperature Range 0 C 50 C gt Storage Temperature Range 20 C 70 C Digital Input gt Channel No 8 channel gt Electric Standard TTL compatible gt High Voltage 2V gt Low Voltage 0 8V Digital Output Channel No 8 channel gt Electrical Standard CMOS compatible gt High Voltage 3 5V gt Low Voltage 0 5V Yy Dimension 108 5mm L x 114 4mm W x 17mm H 4 USB2085 Data
21. t way See the following figure External Trigger Signal DTR first configure hardware parameters and use external clock then connect the signal that will be sampled by USB2085 input trigger signal from DTR pin then click Start button at this time USB2085 does not sample any signal but wait for external clock signal When each module is waiting for external clock signal use the common external clock signal to startup modules at last we realize synchronization data acquisition in this way See the following figure External clock signal CLKIN m a USB2085 CLKIN p USB 2085 akn gt USB 2085 ss 12 USB2085 Data Acquisition V6 3 15 Chapter 5 The Instruction of the Trigger Function 5 1 Internal Trigger Mode When A D is in the initialization if the hardware parameter ADPara TriggerMode USB2085 TRIGMODE SOFT we can achieve the internal trigger acquisition In this function when calling the InitDeviceAD function it will generate A D start pulse A D immediately access to the conversion process and not wait for the conditions of any other external hardware It also can be interpreted as the software trigger As for the specific process please see the figure below the cycle of the A D work pulse is decided by the sampling frequency The first working pulse after the A D 4 start pulse Figure 5 1 Internal Trigger Mode treesssessssessesessssnesessssnesesss ness
22. t physical ID number When the PC is installed more than one USB2085 you can use it to set a physical ID number for each board which makes it very convenient for users to distinguish and visit each board in the progress of the hardware configuration and software programming USB2085 Data Acquisition V6 3 15 IDO H IDI ID2 ID3 ID4 ID5 ID6 ID7 USB2085 Data Acquisition V6 3 15 Chapter 3 Signal Connectors 3 1 The Definition of Analog Signal Input and Output Connector 37 core plug on the CNI pin definition L9 ATO ALI im E A T2 AI3 io OO Ald AIS ii O I AI itg S a AJ9 33 m ii All ia 0 AIL3 u oO FOP z 2 Alld ALIS 30 AIL id ATT ATI 2h m Fa ar AJ2I Zig T AT23 26 a O F AI25 5 ii Als I 6 AI26 AI27 Aw ADE A129 23 si i i ATAU AI31 22 B B 3 AGND DGND A a CLEOUT CLKIN 0 FE a DIR Pin definition about CN1 AI0 AI31 Analog input reference ground is AGND AGND GND Analog ground This AGND pin should be connected to the system s AGND plane DGND Digital ground Ground reference for Digital circuitry This DGND pin should be connected to the system s DGND plane Clock input CLKOUT Output Clock output DR O lom Digital trigger signal input reference ground is DGND USB2085 Data Acquisition V6 3 15 3 2 The Definition of Digital Signal Input and Output Connector 20 core plug on the P1 pin definition 7 45V 4 DII 6
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