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Gameboy Programming Manual

1. 15 1 6 Register COMpPariSON 16 2 1 2 1 Overview of CPU 17 Mc EU iste EE 19 2 3 Description of CPU Functions 1 eee enean annuas 21 2 4 CPU Functions Common to DMG CQGBJO eere 23 2 5 CPU Functions Common to DMG CBQ90O 2 eere rere nnn 28 2 6 CPU Functions CGB only 1 21 c 34 Game Boy Programming Manual CHAPTER 1 SYSTEM 1 GENERAL SYSTEM INFORMATION 1 1 System Overview Structure At the heart of the DMG CGB system is a CPU with a built in LCD controller designed for DMG CCB use System DMG CGB Dot matrix LCD unit capable of Color dot matrix LCD unit capable of grayscale display RGB with 32 grayscale shades 64 Kbit SRAM for LCD display 128 Kbit SRAM for LCD display 64 Kbit SRAM working memory 256 Kbit SRAM working memory Infrared communication link photo transistor photo LED Features common to DMG CGB gt 32 connector for ROM cartridge connection 6 pin subconnector for external seria
2. x x x x Low Fl L l1 ll 291 Game Boy Programming Manual 9 ROM Size 0148H Store the code for the program ROM size from the table below ROM Size _ 256 KBit 512 02H 1 MBit MBi 3H 4 MBit 07H 32 Mbit 64 Mbit 10 External RAM Size 0149H Store the code for the size of external RAM installed in the cartridge Address 149 No RAM or MBC2 01H 64 03H 256 KBit 1 Mbit 11 Destination Code 014AH Store the code from the table below which indicates where the product will be marketed Address 147 All Others 12 Mask ROM Version NO 014CH The mask ROM version number starts from 00 and increases by 1 for each revised version sent after starting production 292 Appendix 3 Software Submission Requirements 13 Complement Check 014DH After all the registration data has been entered 0134H 014CH add 19H to the sum of the data stored at addresses 0134H through 014CH and store the complement value of the resulting sum 0134H 0135H 014CH 19H 014DH OOH 14 Check Sum Hi and Lo The check sum excluding the value of 014EH and 014FH is stored here Check sum Hi and Lo will be different from the Total Check Sum 014 Upper 014 Lower 12 STORING DATA TO THE FLOPPY DISK 1 Use 5 3 5 inch 2HD disk s 2 he data mus
3. 66 2 4 Overlapping OBJ and BG eerie 67 2 5 Display Using Earlier DMG Software mode 67 45 Game Boy Programming Manual CHAPTER 2 DISPLAY FUNCTIONS 1 GENERAL DISPLAY FUNCTIONS 1 1 Character Composition The basic character size is an 8 x 8 dot composition With characters of the basic size 128 OBJ only characters are available 256 with CGB 128 characters can be registered both as OBJ and BG characters 256 with CGB 128 BG only characters are available 256 with CGB On DMG characters can be represented using 4 shades of gray including transparent On CGB characters can be represented using 32 shades for each color of RGB The basic character size can be switched to an 8 x 16 dot composition for OBJ characters only this case however only even numbered character codes can be specified Even if an odd numbered character code is specified the display will be the same as that seen with an even numbered code Up to 40 OBJ characters can be displayed in a single screen and up to 10 characters can be displayed on each horizontal line Stored in OAM Display RAM OxFEO00 0xFE9F The display data for OBJ characters is stored in OAM Display RAM OxFEO00 OxFE9F in the following order y axis coordinate x axis coordinate Character code attribute data Data is written to OAM from working RAM by DMA transfer OB
4. Nintendo Character Data 0x104 0x133 0x0120 0x0130 Game Game Title 0x134 0x13E Code 14 Game Code eme NE Support Code 00 Exclusive Gens 80 DMG CGB Maker Code CENE hoo 2 SGB Support Code ask ROM Version Cassette estination i Code ROM Size RAM Size CGB CGB Only When operating on CGB up to 56 colors can be displayed on a single screen Non CGB When operating on CGB up to 10 colors can be displayed on a single screen Note Regardless of the type of game the following fixed values should be stored at the following addresses Address 0x100 0x00 Address 0x101 0xC3 Address 0x14B 0x33 Addresses 0x104 0x133 Nintendo character data 115 Game Boy Programming Manual 3 POWER SAVING ROUTINES FOR THE MAIN PROGRAM To minimize battery power consumption and extend battery life inclusion of programs such as those shown below is recommended During waiting for vertical blanking halt the CPU system clock to reduce power consumption by the CPU and m Main Routine kkkkkk MAIN CALL CONT Keypad input CALL GAME Game or other processing VBLK_WT HALT Halt the system clock Return from HALT mode if an interrupt is generated Wait for a vertical blanking interrupt NOP Used to avoid bugs in the rare case that the instruction after the HALT instruction is not executed LD A VBLK F AND A Generate a V blank interrup
5. 234 3 1 Transferring to the Printer 11 rene e 234 3 2 Receiving from the Printer 1 21 235 S 4 Hanaliig EOFS 235 4 Packel Detalls 2 2 922292290922002205220002108220202200820222020220822020 280050 237 4 1 The Initialization and Connection Packet 237 4 2 Print Instruction aya nay auis 237 4 3 CIE 238 44 Dala Ena PACK CL bes uu 239 4 5 DL 239 4 6 NUL xen Dee a Deed Deae Dad ev a 239 4 7 Packet n 239 4 0 Olher Packets keea bae aea Cate 239 5 Printer Status and Packets ecce acere e reae enne nnn 240 ONE Pnr FPN citis 241 7 Processing Connection Eval Preamble Detection Failure 242 7 1 Connection Evaluation includes cable disconnection 242 7 2 Preamble Detection Failure eee erre erre eren e annu 242 243 9 Compression Algorithm
6. 2 244 10 Hardware Specifications eere eere eere e een 245 10 1 General SDecITICAllOIIS caeno eoio aea ee eae pas E Fono xax 245 10 2 Dimensions and Welglib iei ie 245 IVIS COM ANC A A 245 Game Boy Programming Manual 11 1 Cautions when Debugging 1 reser reser enano aaa n annu 11 2 Sample Programs Provided by Nintendo subroutines 232 Chapter 9 Pocket Printer CHAPTER 9 POCKET PRINTER 1 OVERVIEW These specifications define the serial protocol used to send print and control data from Game Boy to the Pocket Printer abbreviated to printer Game Boy sends data to the printer in packets and the printer responds by returning 2 bytes of status information 2 COMMUNICATION SPECIFICATIONS 2 1 Bidirectional Communication Serial transfers between Game Boy and the printer are performed in the Game Boy specification communication format bidirectional The shift clock is furnished by the Game Boy Both Game Boy and the printer start transmission from the most significant bit MSB For more information see Chapter 1 Section 2 5 1 Serial Cable Communication Game Boy Printer 2 2 Transfer Interval For Each Byte An interval of 270 us t
7. M 125 126 T4 SVSTem Program E deo Foe RE doe 126 2 Sending Commands and Data to SUPER NES 127 2 1 System Commands eco ince Eus 127 2 2 Data Transfer Using an Image Signal eese 131 3 svVstem Commands E 132 3 1 System Command 2 2 132 3 2 System Command Details ecce eee 133 3 3 Cautions Regarding Sending Commands 167 2 4 Flag 167 4 WISCCIIANCOUS 173 4 1 Reading Input from Multiple Controllers 173 4 2 Hecognizing SGB iiid diii 174 4 3 SGB Register 0 nnn anna hann 176 4 4 Flowchart of Initial Settings Routine eee 177 5 Programming 5 178 5 1 ROM 178 9 2 WHA DAL A E e 178 5 3 SOU TAN default dala duis fedi incedo decode decode 179 123 Game Boy Programming Manual CHAPTER 6 THE SUPER GAME BOY SYSTEM 1 OVERVIEW 1 1 What is Super Game
8. 250 2 4 Miscellaneous ovoida 251 3 Programming Cautions Regarding 253 c n 253 v vie 253 254 4 SGB Programming 256 4T ROM Datari le eu LUE 256 4 2 Betalt Dala Een 256 4 3 256 5 Programming Cautions Regarding Pocket Printer 257 5 1 Transfer Time Infervals ues sis 257 5 2 Printing Multiple Sheets Continuously 257 5 3 ei wB oLi umm 257 5 4 Operation After the Motor is Stopped 257 FD COG MEM A MEINE 257 5 6 Point of Caution During Debugging eese er ree enne 257 5 7 Sample Program Provided by Nintendo 257 6 Programming Cautions for U S Programmers 258 247 Game Boy Programming Manual APPENDIX 1 PROGRAMMING CAUTIONS 1 USING THIS APPENDIX Purpose and Scope These programming notes provide information on how to avoid easily made mistakes during program development information on unique Game Boy prog
9. CPU Address ROM Address OxDFFF Ox1FFFFF Days H counter Bank 0 0 Internal he Working Bank Ox7F z RAM Days L counter Bank OxOB E Ox1FC000 0xCO000 External E Hours counter Bank Expansion i i OxOFFFFF Working 0xA000 RAM Bank 0x3F Minutes counter Bank 0x09 i 2 Display OxOFCO0O00 Seconds Bank 0x08 Lond Counter i ERES 0 8000 OxO7FFFF i S Bank OxIF Program RAM Address Switching 0x07C000 Ox7FFF nee Bank 0x03 0X6000 OxOBFFF 0 4000 Bank 0x02 Bank 0x02 0X4000 ED 0x08000 i Program 2 Bank 0x01 Residence E Bank 0x01 0X2000 Bank 0x00 Bank 0x00 0000 00000 Area 0x04000 0000 218 Chapter 8 Game Boy Memory Controllers MBC 3 5 Programming Cautions 3 5 1 Accessing the Clock Counters Although counting up of the clock counters themselves and accessing the clock counters from the CPU are performed asynchronously clock counter failure may result if both operations are performed at the same time To prevent this MBC3 provides an interface circuit for WR signals from the CPU Use of this circuit necessitates a delay when accessing control register 3 and the clock counter registers RTC S RTC M RTC H RTC DL and RTC DH Thus whenever accessing these registers consecutively interpose a delay of 4 cycles between accesses When reading clock counter data e Latch all clock counter data using control register 3 4 cyc
10. i LEDC Controller Bit reset valid STAT Teminas i 10 43 0 Disabled Inte 1 Enabled enable flag Resetiuth D Inte master enable set El 0 Dizable iriterrupte 1 Enable iriterrupte 260 Appendix 2 Register and Instruction Set Summaries Address EN GMN NENNEN NM LECC Control SCY Mode zeledian Soroll r register Li LEDC y enoardinate Transfer 261 00 access 10 OBJ search 01 M blank 11 LCD transfer ie fixed to display Bt ON in CSB mode ant Bits 2 6 Inte mupt 0 Mat selected 1 Selected v con dinate dunng display Ageementiag set mith Transfer starts atthe same time a address set Game Boy Programming Manual uM LE LM LB LN LN f commet FFF Falete data for Falete data for Palette data for Palette data for character dot data character dot data character dot data character dot data Palette 11 in mode 10 in mode 04 in mode OO in mode Data Palette data for Falete data for Palette data for Palette data for character dot data 11 in Ghats made character dot data 10 in mode charader dot data d in mode character dot data DOO in mode Palette data for character dot data 11 in Dis made Pale
11. Second Production Third Fracductian 284 Appendix 3 Software Submission Requirements Example 16 File Name and Check Sums Print the file name on each disk using the following format GB Example Initial code 4 digits Disk number AAA J020 GE ROM verion 2 digits 02 Note The first disk will be numbered 0 If the Initial code is 3 digits prior to 1994 include an under bar _ after the Initial code to bring it to 4 digits The file name would appear as follows AAJ 10 0 GB Enter the check sum of each ROM submitted To calculate the check sum add each byte in the ROM data The lower 2 bytes of the resulting value is the check sum Enter the check sum for each ROM submitted for the master program and the total of their individual check sums The total is calculated by adding the individual check sums This method of calculation is different from the check sum on the ROM Registration Specification 285 Game Boy Programming Manual 17 Programming Features Indicate if special programming is implemented for a specific purpose such as copy pro tection If special programming is implemented it must be explained in writing If the software is N64 GB Pak compatible indicate the name of the N64 game and its product code N64 GB Pak is a peripheral device that allows the N64 system to read data from and write to a standard Game Boy Game Pak This device is not marketed in the U S Fo
12. T 144 lines LCD Display Screen 15 66ms 10 lines Vertical Blanking Period um lt 108 7us 1 line gt 53 Frame frequency 59 7Hz Chapter 2 Display Functions Game Boy Programming Manual 1 6 LCD Display Registers Mame Address LEDE 40 Bit 3 4 3 2 1 RUM LCD Control Register BG display always an DMC Mode 0 BG display ott 1 BG display an OBJ On Flag 0 Off 1 On OBJ Black Composition Selection Flag 0 8 9 dots 1 15 dots Code Area Selection Flag 0 0 9800 9 1 gt BG Character Data Selection Flag 0 Ox6800 097FF 1 0 8000 Wwindawinag On Flag 0 Off 1 On Window Code Area Selection Flag 0 Ox9800 098FF 1 Ox9C00 0 9F FF LCD ControllerOperation Stop Flag 0 LEDC Off 1 LEDC On CGB the liquid crystal protection circuit functions when the LEDC is turned on Consequently a white screen is displayed for up to 2 frames In the LEDC should be off during vertical blanking periods 54 STAT Chapter 2 Display Functions Address Bit 3 4 3 2 1 m BEEN Mode Flag 00 Enable CPU access to all display RAM 01 In vertical blanking period 10 Searching RAM i i 11 Transferring data to the LCD driver mma Match Flag Xd 3 0 LYC 2 LCDC LY NE NE 1 L YC LCDC LY Interrupt selection according to
13. 144 dots 18 characters 08 ef 02 0 CO 0 0 N e co DMG Window 133 Game Boy Programming Manual Setting the Color Palettes and Attributes DMG Window Command ATTR BLK 7 mel we 111 NEN Indirect setting of SGB color Command PAL SET System Color Palett bo Jor System Color Palette0 System Color Palette1 System Color Palette510 d System Color Palette51 1 d EX Indirect setting of attributes by file number Command ATTR SET Command ATTR LIN Command ATTR DIV Attribute Files Command ATTR CHR ATFO ATF44 DMG window attribute files Direct setting of 45 files SGB color palettes Command PALO 1 Command PAL23 Command PALOS Command PAL12 ERU SSS SS y N SGB Color data setting of Game Pak Attribute file transfer Command ATTR TRN system color palette Command PAL TRN Note Bit 00 of SGB color palettes 0 3 have the same color The color setting in effect for this bit is the most recent setting 134 Chapter 6 The Super Game Boy System Color Palettes and SGB Color Palettes With DMG screen data representations colors in SGB are converted from the grayscale data registered in the DMG
14. ore stopped by setting bit taU General purpose stopped by reseting Mat incremented autornaticab with read Hat incremented autamaticaly wath read Game Boy Programming Manual gt mme Banks specification 0 1 Species bank 1 2 7 5Specifies banks 2 7 COO edge when FEO LCD x eno dinate Character ende Color Palette Ho 0 Hormnal The indicates ar register unique to C GB 264 Appendix 2 Register and Instruction Set Summaries 2 SOUND REGISTER SUMMARY All values shown in the following table apply ta made The values far double speed mode should be calculated by doubling the system clock frequency Register Address D7 6 w m ra Di DO Comment Sweep ime 010 15 101 229 1 rris Humber of sweep shifts D 7 125 OOO OFF tims 1106 arme 001 7 Sms 100733 sme 111227 ms FFt1 Sound length data 0 53 Sound length 2587 sec OO 42 5 10 5055 01 25 11 75 anu MRAZ FF Az Initial erwebpe value O00 CrUOF Humber of erivelope steps M2 0 7 iute when Length of 1 step sec Initial walue of hamum when 00 sets to OF F when in DCUM mode mF Co FFAS Lowe ponders bits of frequenay data onder frequenoy Higher onder 3 bits of frequenay data Whith 11 bit teque
15. 6 Finally convert to the file format described in Section 3 8 Format for Transferred Files 188 Chapter 7 Super Game Boy Sound 3 5 Setting the Working Environment Using IS SOUND Environment Required e Hardware IS SOUND connected to a host computer Software IS SOUND software tools installed Revisions 1 Portions of the IS SOUND software tool KAN EQU were revised as indicated below older versions only Before Revisions After Revisions 122 0x80 122 0x80 1234 0x80 123 0 80 124 0x80 1244 0x80 125 0x80 125 0x80 126 0x80 126 0 80 1 Set Gate Table data to 050 101 127 152 178 203 229 252 2 Set Velocity Table data to 025 050 076 101 114 127 140 152 165 178 191 203 216 229 242 252 Sound data sampling data required to check music data using IS SOUND Consequently a program equivalent to the sound program built into the SGB hardware including sound effect data and sampling data sound data have been provided in a hex file for MS DOS The following briefly describes how to set up this program and data Setting the Working Environment 1 Create an SGB working directory at any location and move to that directory 2 Copy sgbsound hex from the disk to the working directory 3 Start the debugger shvc 4 Also start the sound debugger ssnd 5 Execute r sgbsound hex to load sgbsound hex 6 Execute g400 to run the sound
16. 0x08 Seconds counter 0x09 Minutes counter Hours counter a D L counter H ps The following are examples of accessing the clock counters 3 3 1 Reading The clock counters are accessed by first writing OxOA to register O This opens the gate used to access the counters To read clock counter values write 1 to register 3 to latch the values of all the registers If the value of register 3 is already 1 first set it to 0 and then to 1 While this register is set to 1 the clock counters will operate but the latched values of all of the clock counters will not change This allows the clock counters to be read For example the seconds counter register can be accessed and read by first setting the RAM bank to 8 then reading from any CPU address between 0 000 and OxBFFF 3 3 2 Writing Writing OxOA to register O opens the access gate allowing each clock counter register to be written to 217 Game Boy Programming Manual 3 4 Memory Map e ROM bank 0 is assigned to the program residence area 0x0000 0x3FFF of the CPU memory space unchangeable e One bank from among ROM banks 0x01 0x7F be assigned to the program switching area 0x4000 Ox7FFF of the CPU memory space e One bank from among RAM banks 0 3 and the clock counter registers RAM banks 0x08 0x0C can be assigned to the external expansion working RAM area 0xA000 O0xBFFF of the CPU memory space
17. 174 Chapter 6 The Super Game Boy System 4 2 2 Usage Example Distinguishing Between the 4 Game Boy Types Distinguish Between the 4 GB Types See 4 2 1 DMG MGB MGL DMG Communication Mode O SGB Competition Mode X DMG Communication Mode O SGB Competition Mode X DMG Communication Mode O SGB Competition Mode O Allowing selection by the user is desirable Main Routine sample program for distinguishing between GB types is provided 175 Game Boy Programming Manual 4 3 SGB Register Summary The following registers can be used to perform functions such resetting the SGB CPU from a program transferred to SUPER NES WRAM and receiving and passing data to a DMG program Register File Status RFS 0x6002 RD DMG Reset Register DRR 0x6003 WR Controller Register1 CR1 0x6004 WR Register File RFF 0x7000 0x700F RD The SGB CPU can be reset using DRR Heads the status of the register file 1 Ready 0 mid transfer or read finished Hesets the SGB CPU _ i e fo 0 Reset 1 Cancel Writes data from controller 1 ST SE B D U L Data read at 15 Data read at P14 Register file for communication The RFS flag 0x6002 is cleared to 0 by the reading of 0x7000 Using RFF and RFS allows data sent to the register file by the DMG program to be received by the SUPER NES program CR1 is a register us
18. 2 3 Sound 3 Mode Registers Sound 3 is a circuit that generates user defined waveforms It automatically reads a waveform pattern 1 cycle written to waveform RAM at OxFF30 OxFFS3F and it can output a sound while changing its length frequency and level by registers NR31 NR32 The settings of the sound length and frequency functions and data are the same as for the Sound 1 circuit Address T 5 4 3 2 1 0 MRSO FF14 RAY Only the shaded portion be read pM tt 0 Stop Sound 3 Output Mame Address Bit 7 B 5 4 3 2 1 D 1 Enable Saund 3 Output sound Length Data t1 0 to 255 Sound Length 255 t1 x 1 255 sec Mame Address Bit T 5 4 a 2 1 MR32 FRC N NENEN RAN Only the shaded portion can be read Output Level Selection Output Level 00 Mute 01 Output waveform RAM data 4 bit length unmodified 10 Output waveform RAM data 4 bit length shifted 1 bit to the right 1 2 11 Output waveform RAM data 4 bit length shifted 2 bits to the right 1 4 Mame Address Bit T 5 4 a 2 1 0 SS ae Low arder Frequency Data Address Bit MR34 RA Only the shaded portion can be be read 5 4 3 2 1 pete High order Frequency Data Counter flontinuous Selection Initialization Flag Counter Continous Selection 0 Outputs continuous sound regardless of length data in register NR31 1 Outputs s
19. Example When HL LO HL Loads 8 hit immediate data n inta memory specified by register pair HL Example Wher HL LO HL 0 xSACS 0 c H H I CY CL 1 2 16 m __ o_o Loads the contents specified by the contents of register pair BC into register A Example When BC xZF LO e CCL T zit cT H H 1 LD A DE DE 00 011 010 Loads the contents specified by the contents of register pair DE inta register Example When DE xSF LO A DE A H CTCL 54 1 z 1 LD A C A FFOOH C hae 11 110 010 Loads into register the contents of the intemal RAM part register ar made register atthe address in the range xFF U xFFFF specified by register C Example When C 0x95 LD C contents of XFFS35 86 Chapter 4 CPU Instruction Set cu z ig I Te 641 LD C A FFD DH 4 C 11 100 010 Loads the contents of register in the internal RAM part register ar mode register atthe address in the range OxFFOO OxFFFF specified by register Example When C OxSF LO C OFFF cy H H I hea Loads into register amp the contents af the intemal part register or made register atthe address in the range specified by the 8 hit immediat
20. The ROM registration data address is 80 bytes of CPU memory 0100H 014FH ROM registration data is stored using the following format Start Address 1 2 3 445 6 F 8 wfe 000 intendo character data Addres 0104H 0133H Gare Title Max 11 byte 0134H 013EH Gecl T3FH 142H CA Support Code Waker Code eva Support Code Cassette Type ROM Size RAM Sime Destnaion coge RO version Complemert Check Check Sum Note The following data will be stored in Game Boy Memory for all Game Boy software 0100H OOH 0101H C3H 014BH 33H 0104H 0133H Nintendo character data 288 Appendix 3 Software Submission Requirements 11 1 Description of ROM Registration Data 1 Start Address 0102H 0103H The Game Boy Super Game Boy program starts after Initial Program Load IPL is run on the CPU The low byte of the starting address is stored first then the high byte Nintendo Character Data 0104H 0133H Register the character pattern of Nintendo to be displayed when the Game Boy is turned on The following hexadecimal data must be store since IPL verifies it when the program begins Game Title 0134H 013EH Store the game title up to 11 characters using ASCII code The table Character Code List for Game Title Registration is provided for your convenience Use code 20H for a space and code for all unused areas in the game title Pleas
21. d dO Palette3 Color01 Data LOW 8bit Palette3 Color10 Data LOW 8bit Palette3 Color11 Data LOW 8bit 0x02 d7 dO sat reper gm gem poa pepe gm d7 do von pono anh dr sac eae gia sae ea gi ori o fo Jo fo fo o fo 138 Command PAL12 Code 0x03 Chapter 6 The Super Game Boy System Function Sets the color data for SGB color palettes 1 and 2 0x01 0x03 0x05 0x07 0x09 OxOB OxOD d 7 dO Number of packets 0 1 fixed Command code 0x03 Palette1 Color00 Data LOW 8bit Palette Color01 Data LOW 8bit Palette Color10 Data LOW 8bit Palette Color11 Data LOW 8bit Palette2 Color01 Data LOW 8bit Palette2 Color10 LOW 8bit Palette2 Color11 Data LOW 8bit 0x02 d7 dO pape opo do sot i ao ns eg egg d7 do oo o fo fo fo opp OxOA 139 Game Boy Programming Manual Command Code ATTR BLK Code 0x04 Function Applies the specified color palette attributes to areas inside and outside the square Number of packets 0 1 0x7 Command code 0x04 Number of data groups Ox1 0x12 max A single group consists of a control code color palette specification and coordinates d7 dO ee EFFET Controls the attribute area according to the data in 0x03 Control Codes No control occurs 001 Applies
22. 22 23 24 Software locks up Scrambled blocks or characters appear on the screen The software won t pause Your character can get stuck somewhere with no possible way to get out ocrambled graphics at the edges of the screen when the screen scrolls in any direction Vowels in the passwords or password entry system Colored lines at the top or bottom of the screen Shifting of the screen any direction Inconsistent scoring methods Flashes on screen 11 12 13 14 15 16 17 18 Small flickering lines on the screen Hit or be hit by an enemy but no damage is incurred Three 3 or four 4 player game can be started without using a four player adapter Incorrect Licensing Screen Licensed by Nintendo should appear for all formats Violation of any Programming Cautions in the product programming manual Communication problems on two player linkable DMG games Horizontal or vertical black lines when switching between screens on DMG games Use of the Nintendo logo or representations of Nintendo products in software without license agreement The use of the term Super Nintendo or Nintendo when the Super Nintendo Entertainment oystem or Nintendo Entertainment System is the intended reference respectively Use of any term other than Nintendo 64 or N64 when the Nintendo 64 Entertainment System is the intended reference Character actions are inconsistent for instance a character that cannot fly being abl
23. 4 1 Rocket launchers 91 1 40 1 0 16 Bubbling sound in water d121 d020 168 Chapter 6 The Super Game Boy System SOUND Command 02 0x19 Jet rocket firing di21 d020 Je rocket landing 91 1 90 0 169 Game Boy Programming Manual 3 4 2 Sound Effect B Flags bestem jeux einen 170 Chapter 6 The Super Game Boy System 171 Game Boy Programming Manual 3 4 2 Attributes of A and B Sound Effects pope 8 pm emo Jo mason i fefe le _ fefe pte menam _ L fe fe lr n mnam _ _ fefefe qvemene imema _ ft fe e vomm de dejo maso f fo mevamesson etx fo menam ee ee quem ods te te vomema fo te te vote tomy _ meon 0 e Mute takes effect only when both bits d2 and d3 are set to 1 If the volume is set for either the A or B sound effect mute is turned off e Fade out and fade in take effect with mute on and mute off respectively Mute on and mute off are implemented for BGM played by A and B sound effects and by the APU e There is no independent mute off flag e When the mute flag is set the volume and interval data for the A Port 1 and Port 2 sound effects also should be set 172 Chapter 6 The Super Game Boy System 4 MISCELLANEOUS 4 1 Reading I
24. A 30 P1 A 36 4 Switching unnecessary Chapter 1 System 2 6 3 Infrared Communication 2 6 3 1 Port Register The CGB system is equipped with an infrared communication function An infrared signal can be output by writing data to bit O of register RP A received infrared signal is latched internally in the CPU by positive edge of the system clock System clock goes to HIGH from LOW The latched data can be read beginning from bit 1 of register RP by setting bits 6 and 7 to 1 Note When data is not sent or received always set the values of register RP to 0x00 This register cannot be written to in DMG mode Address Bit ri B 5 4 3 2 1 i Write data 0 LED 1 LED Gn Fead data 0 LED On 1 LED Off D ata read enable flag 00 Disable 11 Enable Default value for register RP 2 6 3 2 Controlling Infrared Communication Sender Setting bit 0 of the CPU register RP to 1 causes the LED to emit light setting it to O turns off the LED Receiver If the photo transistor detects infrared light bit 1 of register RP is set to 0 if no infrared light is detected this bit is set to 1 2 6 3 3 Basic Format When the receiver recognizes the unmodified signal from the sender as a logical value of 1 or 0 the receiver actually cannot distinguish between the continuous transmission of 1s and the absence of received infrared light The status of the receiver is identical under t
25. ADIR S purger Redster Pair qa SP HL BC 4 es lo pt E m wu m mn 8 2 qqL 5 2 99 41 5 qqHeisr SP SP 2 Lau s o B LD nn SPL exu LLLI SPH LADRS ae 1 i H ADRE 269 Game Boy Programming Manual SYMBOLIC FLAGS DP CODE MNEMONIC OPERATION cy CYCL 76 548 210 COMMENT wo A acer gt ps 1 mo ADD 000110 TR pita N ADC AS cs 13 1 sist CY 2 Sis nor HL SUBs amp s 1 e 12 I d os 1 9 7 ors As u0 4 ons 9 9 ers as 1 132 Ner pem 17 13 610 INC HL HL 3 10110 100 mer ee 1 17 L1 M M A all od iHL 1 ADD Pod 2 551 001 HE The flag is affected Z Zero flag z 1 result af the operation is 0 to the result atf the operation Carywlink flag 1 ifthe operation produced a carry from the MSB ofthe operand ar result H Half carry flag Addisubject flag LE I oo D T m c zy eu RS E c 270 Appendix 2 Register and Instruction Set Summa
26. Example When NR12 0x94 the Amp Gain is as follows gt 4 64 sec 73 Game Boy Programming Manual META Address FF13 Address FF14 Bit Bit SS Counter Continous Selection 0 Outputs continuous sound regardless of length data in register NR11 1 Outputs sound for the duration specified by the length data in register NR11 Initialize Setting this bit to 1 restarts Sound 1 WY Low arder Frequency Data RAM Only the shaded portion be read High order Frequency Data 3 bits Counter fContinuous Selection Initialize When sound output is finished bit O of register NR52 the Sound 1 ON flag is reset With the 11 bit frequency data specified in NR13 and NR14 represented by x the frequency f is determined by the following formula f 2 4194304 4 x 2 x 2048 X Hz Thus the minimum frequency is 64 Hz and the maximum is 131 1 KHz Sound 1 Usage Notes When no sweep function is used with Sound 1 the sweep time should be set to 0 sweep OFF In addition either the sweep increase decrease flag should be set to 1 or the sweep shift number set to O set to 0x08 OxOF or 0x00 in NR10 Sound may not be produced if the sweep increase decrease flag of NR10 is set to 0 addition mode the sweep shift number set to a value other than 0 and the mode set to sweep OFF e g NR10 0x01 If the contents of the envelope register NR12 needs to be ch
27. GAME BOY PROGRAMMING MANUAL Version 1 0 DMG 06 4216 001 A Released 11 09 1999 Confidential This document contains confidential and proprietary information of Nintendo and is also protected under the copyright laws of the United States and foreign countries No part of this document may be released distributed transmitted or reproduced in any form or by any electronic or mechanical means including information storage and retrieval systems without permission in writing from Nintendo 1999 Nintendo of America Inc TM and are trademarks of Nintendo Introduction INTRODUCTION This manual is a combination and reorganization of the information presented in the Game Boy Development Manual revision G and the Game Boy Color User s Guide version 1 3 In addition it incorporates all information related to Game Boy programming including programming for Super Game Boy and the Game Boy Pocket Printer The abbreviations used in this manual represent the following DMG Game Boy monochrome introduced on April 21 1989 MGB Game Boy Pocket monochrome introduced on July 21 1996 MGL Game Boy Light monochrome introduced on April 14 1998 Game Boy Color color introduced on October 21 1998 Where it is not necessary to distinguish between the different monochrome models DMG is used to refer to both monochrome models and CGB is used to denote the color Game Boy Only where it is necessary to dis
28. The maximum external clock setting should be 512KHz between CGBs It should be 500KHz for others including DMG and SGB2 Also it should be 256KHz for communication between CGB and DMG 2 2 2 Communication Errors Recommended Covers DMG SGB2 and CGB When using the communication function infrared the communicating data may be corrupted by noise and such Therefore the program should not go out of control by such data corruption on both the sending and receiving side When using the communication function serial depending on how program is made it is confirmed that communication errors happen rarely SIO interrupt processing may be delayed by factors such as the processing of other interrupts This type of error should be avoided by establishing a proper communication interval that allows a problem free exchange of data 2 2 3 Effects of Other Infrared Devices Recommended Covers CGB Adequate care should be taken to ensure against faulty operation and loss of program control even when infrared communication signal input is received from other game software and devices Note that such problems may particularly occur in communication between multiple games that use the same subroutines Before performing data communication use means such exchanging a unique key code to check whether the same game is on the other hardware 2 3 Sound 2 3 1 Using Sounds 1 2 and 3 Required Covers CGB With continuous operation mode sele
29. and this RAM can be used in 8 KB units using bank switching The 8 KB RAM areas are divided into the following 2 areas 1 An area for character data 2 An area for BG background display data Character code and attribute The 8 KB from 0 000 to OxBFFF is the area allocated for external expansion RAM The 8 KB from 0 000 to OxDFFF is the work RAM area In DMG the 8 KB of working RAM is implemented without change In CGB bank switching is used to provide 32 KB of working RAM This 32 KB area is divided into 8 areas of 4 KB each 1 The 4 KB from 0 000 to OxCFFF is fixed as Bank 0 2 The 4 KB from 0 0000 to OxDFFF can be switched between banks 1 though 7 Note Use of the area from OxE000 to OxFDFF is prohibited OxFEOO to OxFFFF is allocated for CPU internal RAM OxFE00 0xFE9F OAM RAM Holds display data for 40 objects OxFF00 OxFF7F amp OxFFFF Specified for purposes such as instruction registers and system controller flags OxFF80 OxFFFE Can be used as CPU work RAM and or stack RAM Game Boy Programming Manual 1 4 MEMORY MAP Note In DMG there is no bank switching at 0x8000 0x9FFF and 0 000 OxDFFF 0x000 Interrupt Address RST Address i EL AM ROM Data Area 4 555 5555 5 Program Start Address User Program Area 32 KB 0x8000 Lower Dot Data 0x8001 Upper Dot Data 0x8000 Bank 1 TN Character Data CGB only 0x9800 BG Display Dat 1 CGB only Characte
30. d7 dO 00000 0 1 Lo Number of packets Ox1 fixed BEN Command code 0 00 d dO d7 do 0 02 x PaletteO ColorOO Data HIGH 7bit 0x01 7 nat frag etre frog 0x05 0 Color10 Data LOW 86 0x07 0 Color11 Data LOW 8bit 0x08 Palette Color11 Data HIGH 7bit d7 dO d7 dO Palette Color01 Data HIGH 7bit Ox0A 0x09 Palette Color01 Data LOW 8bit OxOB Palette Color10 Data LOW 8bit OxOC Palette Color10 Data HIGH 7bit OxOD 1 11 Data LOW 8bit OxOE Colori Data HIGH 7bit OF lo fo fo fo fo Jo fo Jo 136 Command PAL23 Code 0x01 Chapter 6 The Super Game Boy System Function Sets the color data for SGB color palettes 2 and 3 0x00 0 01 0x03 0x05 0x07 0x09 OxOB OxOD d dO 0 0 7 DDODECDUC Number of packets 0 1 fixed Command code 0x01 7 d7 dO d dO Palette3 Color01 Data LOW 8bit Palette3 Color10 Data LOW 8bit Palette3 Color11 Data LOW 8bit 0x02 d7 dO poa d7 dO sa po ag sae oa ga ocr la fo fo Jo fo fo o fo 137 Game Boy Programming Manual Command PALOS Code 0x02 Function Sets the color data for SGB color palettes 0 and 3 0x00 0 01 0x03 0x05 0x07 0x09 OxOB OxOD d 7 dO Number of packets 0 1 fixed Command code 0x02 7 d7 dO
31. edit 16 Takes the one s complement af the contents of register Example When A 13 35 CPL Ae XC A H T 1 z 16 14 a Only advances the program counter by 1 performs other operations that have an effect 111 Game Boy Programming Manual cy H H CYCL edi zi NEN After a HALT instruction is executed the system clock is stopped and HALT mode is entered Although the system clock is stopped in this status the oscillator circuit and LCD controller continue to operate In addition the status of the internal register ports remains unchanged HALT mode is canceled by an interrupt or reset signal The program counter is halted atthe step after the HALT instruction If hath the interrupt request flag and the corresponding interrupt enable flag are set HALT mode is exited even ifthe interrupt master enable flag is not set Once HALT mode is canceled the program starts from the address indicated by the program counter If the master enable flag is set the contents af the program counter are pushed to the stack and contral jumps to the starting address of the interrupt Ifthe RESET terminal goes LOWY in HALT made the mode becomes that of a reset Execution af a STOP instruction stops both the system clack and oscillator circuit STOP mode is entered and the LCD controller also stops However the status af the intemal RAM registers ports remai
32. program counter The next instruction is fetched fram the location specified by the new value af PC Example When HL 0x8000 JP Jumps to x80 00 106 Chapter 4 CPU Instruction Set 2 8 Call and Return instructions SP 1 PC SP 2 lt PC PC nn e 2 In memore pushes the PC value corresponding ta the instruction atthe address following that af the CALL instruction ta the 2 bytes following the byte specified by the current SP Qperand nn is then loaded in the PC The subroutine is placed after the location specified by the new PC value When the subroutine finishes control is retumed ta the source program using a return instruction and by popping the starting address of next instruction which was just pushed and moving itta the PC With the push the current value ofthe SP is decremented by 1 and the higher order byte ofthe PC is loaded in the memory address specified by the new SP value The value ofthe SP is then again decremented by 1 and the lower order byte af the PC is loaded in the memore address specified by that value ofthe SF The lower order byte af the address is placed in byte 2 ofthe object cade and the higher order byte is placed in byte 3 Examples When PC 0x8000 and SP XFFFE Address 000 CALL 1234H Jumps to address 1 234 and 05003 tFFFDH FFFCH 03H SP FFFCH If condition cc matches the flag the PC value correspon
33. 2 1 2 Window x coordinate Register Required Covers DMG SGB and CGB When the window is displayed the window x coordinate register register WX address OxFF4B must be set in the range 7 165 A setting of 0 6 or 166 is prohibited Specifying a value of 167 or greater causes the window not to be displayed 2 1 3 Displaying Multiple Windows Required Covers CGB Multiple windows that divide the screen horizontally into upper and lower areas can be displayed by setting the window x coordinate register WX to a value of 167 or greater during a horizontal blanking period Attempting to display multiple windows by switching the window ON and OFF during H blanking may result in the lower window not being displayed Display Data WX Value Window WX 7 BG Background 167 lt lt 255 Window 7 LCD Display Screen Display Data Window Window ON BG Background OFF Window ON LCD Display Screen 249 Game Boy Programming Manual Reference Notes 1 Accessing VRAM Outside of a V blanking period In early DMGs accessing VRAM outside of a V blanking period would corrupt the screen 2 Length of H blanking The length of the H blanking period changes depending on the conditions of OBJ use so caution is recommended when using H blanking 2 2 Communication 2 2 1 Communication Rate Required Covers DMG SGB2 and CGB Data may be corrupted if the data transfer rate is too high
34. Display Functions OAM Register Mame Address Git T 5 4 3 2 1 0 Ox00 OxFF With v 10 object displayed from top edge of LCD screen 5 4 3 2 1 With x amp object displayed from left edge of LCD screen specifies color palette CSB only specifies character bank CGB only l specifies palette for DMG and made valid only in mode Horizontal flip flag 0 Normal 1 Flip horizontally 1 1 Vertical flip flag 0 Normal 1 Flip vertically l Display priority flag 0 Priority to OBJ 1 Priority to BG OBJ1 OBJ39 have the same composition as OBJO Note DMG mode the lower 4 bits of the attribute flag are invalid only the flags the upper 4 bits including the palette flag are valid 59 Game Boy Programming Manual 1 8 Registers 1 8 1 DMA Transfers in DMG DMA transfers of 40 x 32 bits of data can be performed from the RAM area 0x8000 O0xDFFF to OAM OxFEO00 OxFE9F The transfer time is 160 us Note that in DMG data cannot be transferred by DMA from ROM area 0x0000 0x7FFF The starting address of a DMA transfer can be specified as Ox8000 OxDFFF in increments of 0x100 Note that the method used for transfers from 0x8000 Ox9FFF display RAM is different from that used for transfers from other addresses Example 1 The following
35. Echo volume F5 0 lt lt 255 0 lt lt 255 0 lt 4 lt 255 Seen Note 3 eof Echo off F6 5 985 FEED BACK FILTER No Echo delay 90 lt Y lt FF value 0 lt Z lt 10 See Note 4 00 lt lt 7 is the two s complement ev2 No of steps ECHO VOL L ECHO VOL R Move echo volume F8 1 lt lt 255 0 lt lt 255 0 lt Z lt 255 YZ values take effect after X steps 199 Game Boy Programming Manual Argument Second Argument Third Argument Function Code range range oweep once n 5 pes steps gt value The interval takes effect after the specified number of hold steps Note 1 The tempo values set by the program data and the actual musical piece tempos that correspond to those values are as follows Please refer to this table to make the conversions Music Tempo Driver Tempo Music Tempo Driver Tempo Note 2 Used when the same performance data is repeated for data compression Following the pat code the L and H addresses and the repetition frequency for the performance data is set The performance data at the addresses specified by pat are then read The data is played the number of times specified by the repetition frequency The performance data at the locations specified by pat require an end code of 0x00 Note 3 When applying echo ecv and edl are required The value entered for the echo channel is 1 for echo
36. To prevent physical effects in the user such as numbness as a result of continuous vibration limit the duration of continuous vibration as indicated below regardless of the vibration strength see Section 5 5 2 Vibration Pulse Examples e The duration of continuous vibration should generally be limited to a maximum of 1 minute e The period of no vibration between the finish of one period of vibration and the start of the next period generally must be at least as long as the vibration time The above points are guidelines that should be followed in most cases However if adhering to these guidelines is made difficult by factors such as the game content take appropriate measures while keeping in mind the points noted in Section 6 7 Effects of Vibration on the Body 5 6 6 Disabling Vibration for Resets and Pauses Vibration should be halted during resets and pauses When power is turned on the unit should not be vibrated until some input is received from the controller 229 Game Boy Programming Manual 5 6 7 Rumble Feature Selection The user should be allowed to set the rumble feature to ON or OFF or to select strong mild or OFF by means such as an initial settings screen at the start of the game In addition the program should allow the user to easily change these settings even during a game if for example they are uncomfortable with the vibration Such changes also should be allowed a pause 5 6 8 Changes in Vibration Lev
37. 0 14000 Switching Area 0x10000 0x4000 0 0 000 Program DN 0x08000 Residence 0 04000 0000 00000 2 4 Backup Allocated to the DO D3 areas of CPU addresses 0xA000 0xA1FF Backup RAM is write protected by a power on reset To protect backup data avoid removing write protection unless necessary 215 Game Boy Programming Manual 3 MBC3 3 1 Overview is the memory bank controller that allows use of between 512 Kbits 64 Kbytes and 16 Mbits 2 MB of ROM and 256 Kbits 32 Kbytes of RAM Built into the controller are clock counters that operate by means of an external crystal oscillator 32 768 KHz The clock counters are accessed by RAM bank switching and clock counter data can be backed up by an external lithium battery 3 2 Description of Registers oettings for control registers 0 3 are specified by writing data to the ROM area Register 0 Register 1 Register 2 Data Register Write protects RAM and the clock counters default 0 Write addresses 0x0000 0x1FFF Write data OxQA Allows access to RAM and the clock counter registers ROM bank code default 0 selects ROM bank 1 Write addresses 0x2000 Ox3FFF Write data 0x01 0x7F Allows the ROM bank to be selected in 16 Kbyte increments RAM bank code default 0 selects RAM bank 0 Write addresses 0x4000 0x5FFF Write data 0 3 Allows the RAM bank to be selected in 8 Kbyte increments Write addresses 0x
38. 1 and cannot be changed but the transfer speed is fixed at 8 KHz Serial I O SIO is controlled by the SB and SC registers The lowest bit SCO of the SC register can be used to select shift clock to be either the external clock from the SCK terminal or the internal shift clock Sending and receiving occur simultaneously with a serial transfer If the data to be sent is set in the SB register and the serial transfer is then started the received data is set in the SB register when the transfer is finished Serial transfer procedure 1 The data is set in the SB register 2 Setting the highest SC register bit SC 7 to 1 starts the transfer 3 The 3 bit counter is reset and after 8 counts of the shift clock the transfer is performed until overflow occurs 4 SC7 is reset 9 If the serial transfer completion interrupt is enabled the CPU is interrupted 28 Chapter 1 System When the shift clock goes low the contents of the SB register are shifted leftward and the data is output from the highest bit When the shift clock goes high input data from the SIN terminal are output to the lowest bit of the SB register When the SCK terminal is in external clock mode it is pulled up to VDD If the highest bit of the SC register 5 7 is set reading and writing to the SB register is prohibited An SIO serial transfer should be started highest SC bit set after the external or internal shift clock is selected Excessive shifting may re
39. 212 COV CROW 212 1 2 Description of Registers 1 1 1 1 212 Lo Memory 0 22022 02 252 02 29 1 08 20 00 0 0 820000 214 2 MEOS EE EE EM MEME 215 NES Qu 215 2 2 Description of Registers 22 eee eee i ee eire nee e enean aaa a anna anna anas 215 2 3 MICINOLY rosie tise 215 24 BaCkKUD p rnEECEI M 215 9 MB CG 216 221 VOT VOW RR U ees 216 3 2 216 3 3 Accessing the Clock 0 rere leere 217 3 4 m 218 3 5 Programming ltems to Nole 1 21 219 221 LENS 221 42 licmeme 221 221 4 4 Description of Registers 1 eere ener annia anna nna n n 222 4 5 Programming 223 4 6 Examples of MBC5 programs and CGB 224 5 MBC5 with rumble TeatUl e sur ss ev ses 225 GE ENE
40. 4 bits ta the Iawer arder 4 bits rand HL are used for operand Examples When A 0x00 and HL OxFO SWAF Ae 000 z 1 H C T 0 SWAF HL HL x F z 0 Ne 102 Chapter 4 CPU Instruction Set 2 6 Bt Operations Copies the complement af the contents of the specified bitin register rta the flag ofthe program status word The codes far b and r are as follows p e Examples When A 0x80 and L XEF HIT 7 50 1 Nei BIT 4 L z1 Hi1 Nd Copies the complement af the contents ofthe specified bit in memory specified by the contents of register pair HL ta the lt flag ofthe program status word FS Examples When HL OxFE BIT 0 HL Ze 1 He 1 N0 BIT 1 HL Ze H 1 Ni Sets ta 1 the specified bit in specified register r 103 Game Boy Programming Manual Example When A 0x80 and L 0x36 SET 3 Ae SET 7 L Le xBB Sets to 1 the specified bitin the memory contents specified by registers and L Example When Ox00 is the memory contents specified by and L SET 3 HL HL 04H Resets to 0 the specified bitin the specified register r Example When A 0x80 and L 0x36 RES 7 A Ux RES 1 L Le x38 Resets to 0 the specified bitin the memory contents specified by registers and L Example when is the memory contents specified by H and L RES 3
41. 56 colors when running on CGB Such means can be used to maintain compatibility with earlier hardware DMG while using CGB functions 6 1 Program Specifications e Only bank 0 is used as the character data area e Only the bits that specify the color palette bits 0 2 of bank 1 are used for BG attributes Bank 0 Bank 1 Character Data Dat a BG CHR Code BG attri but e BG CHR Code BG attri bute Fixed at 0 Specify Color Palette e Both the color palette and DMG mode palette are set as attribute flags in the OAM register omes seco nsns Color Palette 2222222222221222222222122214122 DMG Mode Palette e None of the other expanded functions are used 119 Game Boy Programming Manual 6 2 CGB Recognition Method Immediately after program startup the initial value of the accumulator register A is read to determine whether the hardware on which the program is operating is a DMG SGB MGB MGL SGB2 or CGB 0x01 SGB OxFF MGB MGL SGB2 0x11 CGB 120 Chapter 5 Miscellaneous General Information 6 3 Flowcharts 1 Branched Processing for CGB and DMG MGB MGL CGB support code 0x80 written to ROM data area address 0x143 supplemental processing for CGB support Start 0x11 CGB Unit Discrimination Value of register A is read CGB flag 6 1 0x01 DMG OxFF MGB MGL lt Y Initialization Col
42. CGB gt 32 KB gt Built in 16 stage Frequency Divider gt Built in 8 bit Timer gt 4 types of Internal Interrupts maskable gt 1 type of External Interrupt maskable Built in DMA Controller gt Input Ports P10 P13 gt Output Ports P14 and P15 gt Serial I O Ports SIN SCK SOUT gt Infrared I O Port lt CGB only gt LCD Controller Functions Game Boy is equipped with functions that provide control of the images displayed on the LCD Character data used for display is held in system RAM gt DMG 4 shades of gray CGB 32 shades of gray for each RGB color gt 160 x 144 dot liquid crystal display gt 8 x 8 dot composition of background and window characters gt 8 x 8 or 8 x 16 dot composition of OBJ characters Up to 40 objects displayable in 1 screen Up to 10 objects displayable on 1 horizontal line 40 x 32 bits of built in RAM OBJ RAM for LCD Control of 256 x 256 dot background Vertically and horizontally scrollable background Window like functions Sound Functions Each system is equipped with 4 types of sound synthesis circuitry Sound 1 Quadrangular waveform sweep and envelope functions Sound 2 Quadrangular waveform envelope functions Sound 3 Arbitrary waveform generated Sound 4 White noise generated 2 output channels output can be allocated to a channel gt Synthesized output with external sound input CGB only gt Game Boy Programming Manual Miscellaneou
43. EPROM specification please use the described specification above or something with the same pin configuration 3 Can support both types for land switching on the board 296 Appendix 3 Software Submission Requirements 15 GAME CONTENT GUIDELINES The following Game Content Guidelines are presented for assistance in the development of authorized game paks i e both Nintendo and licensee game paks by defining the types of themes inconsistent with Nintendo s corporate philosophy Exceptions may be made when an objectional item is necessary to maintain the integrity of the product or the games theme Nintendo will only approve products i e audio visual work packaging and instruction manuals which do not contain sexually explicit content including but not limited to nudity rape sexual intercourse and sexual touching for instance Nintendo does not allow bare breasted women in its games however mild displays of affection such as kissing or hugging are acceptable e contain language or depictions which specifically denigrate members of any race gender ethnicity religion or political group e depict gratuitous or excessive blood or violence Nintendo does not permit depictions of animal cruelty or torture e depict verbal or physical spousal or child abuse e permit racial gender ethnic religious or political stereotypes for example religious symbols such as crosses will be acceptable when fitting into the theme
44. H 1 ALD HL 4 00 110 010 HL HL 1 Stores the contents af register in the memory specified by register pair HL and simultaneously decrements the contents of HL Example HL 0 4000 and A 0 5 0 4000 0 5 HL Dx3FFF Game Boy Programming Manual 2 2 Tb franster instructions Loads 2 bytes af immediate data to register pair dd dd codes are as follows Register Pair m Example LO HL x3 x5B MH Yo amp 43 2 LD SP HL SP HL 11 3111 001 Loads the contents of register pair HL in stack pointer SF SP 1 SP 2 gal sPc SP 2 Pushes the contents af register pair qq onto the memory stack First 1 is subtracted from SP and the contents ofthe higher portion af qq are placed on the stack The contents af the lower portion af qq are then placed on the stack The contents of SP are automatically decremented by 2 qq codes are as follows Example When SP OxFFFE PUSH BC OxF OxF FRC B SP e xFFFC 90 Chapter 4 CPU Instruction Set cy H H I T E Sd l 21 SP ggH SP 1 SP c tS5P 2 Pops contents trom the memory stack and inta register pair qq First the contents of memory specified by the contents of SP are loaded in the lower portion of qq Next the contents af SP are incremented by 1 and the contents af the memory they specify are loaded in
45. HLG 104 Chapter 4 CPU Instruction Set Jf mp instiuciions Loads the operand nn ta the program counter PC nn specifies the address of the subsequently executed instruction The lower order byte is placed in byte 2 of the object code and the higher order byte is placed in byte 3 Example JP 8000H Jump is 3 whence nonmatching Loads operand nn in the PC if condition cc and the flag status match The subsequent instruction starte at address nn Ift condition cc and the flag status do nat match the contents af the PC are incremented and the instruction following the current JP instruction is executed The relation between conditions and cc cades are as follows FI Example When lt 1 and C 0 JP MZ 8000H Moves to next instruction after 3 cycles JP 8000H Jumps to address Oxe000 JP 8000H Moyes to next instruction after 3 cycles JP MC 8000H Jumps to address c H H 127 to 129 Jumps 127 ta 129 steps from the current address 105 Game Boy Programming Manual e 127 to 129 If condition cc and the flag status match jumps 127 to 129 steps from the current address If cc and the flag status do notmatch the instruction following the current JP instruction is executed I OCL 541 216 JP HL PC HL 11 101 001 Loads the contents of register pair HL
46. No data reception detected OxFF received 2 No data for 120 ms Evaluates as not connected Evaluates as not connected print data cleared Cable connected here NUL packet sent NUL packet detected J 4 0x00 received Status of 0x00 sent Y l Evaluates as connected Evaluates as connected i Connection check packet sent after 100 msec delay Connection confirmed ACK returned The printer prepares to print data again it is not cleared while data is received 7 2 Preamble Detection Failure If preamble detection fails during data reception the flow of the Game Boy and printer sequences are as shown below in parallel Game Boy Printer Printer normal Printer status normal 1 Wait to receive data Start communication Y Data reception Cable disconnects during data transfer V Y Preamble detection failure Printer status OxFF V Set status to OxFF Confirm reset of printer connection 4 b 80 msec delay Check connection after 100 msec 242 Printer initialization Chapter 9 Pocket Printer 8 PRINT DATA The print data transferred in data packets is in character data format Printing Example Line2 Line3 Line4 Lined Line6 Line7 Lines ES Line9 Transfer Order Y0 X00 gt 0 01 gt YO X02 gt YO X13 2x 8 x 20 0x140 bytes Y1 X00 2 x 8 gt Y1 X01 gt Y1 X13 2x 8 x 20 0x140 bytes Total 0x280 bytes 1 CHAR 2 bytes higher grayscale then lower
47. QxA000 Display RAM 0x8000 Empty no image Bank Switching Area 0x6000 Bank 0x00 Bank 0x1FF 0x5000 Default bank 0x01 0x4000 0x3000 Program Residence 0x2000 Area Fixed at Bank 0 0x0000 Write Read During a write data is written to the bank control registers at ROM Highest bank 0x1FF Maximum 64 Mbits Set by registers ROMBO and ROMB1 CPU addresses 0x0000 0x7FFF During a read the contents of ROM are read from these addresses 226 Chapter 8 Game Boy Memory Controllers MBC 5 4 Description of Registers Register for Specifying External Expansion Memory RAMG Specifies whether external expansion RAM is accessible Access to this RAM is enabled by writing OxOA to the RAMG register any single address in 0x0000 0x1FFF Writing any other value to this register disables reading to and writing from RAM Bit fd 5 4 3 2 0 Default 0 0 0 0 0 0 0 AN Lower ROM Bank Register ROMBO opecifies the lower order 8 bits of a 9 bit ROM bank The ROM bank can be changed by writing the desired ROM bank number to the ROMBO register any single address in 0x2000 0x2FFF Bit 5 4 3 2 0 Detault 0 0 0 0 0 0 0 0 AN Upper ROM Bank Register ROMB1 Specifies the higher order 1 bit of a 9 bit ROM bank The ROM bank can be changed by writing the desired ROM bank number to the ROMB 1 register any single address 0x3000 0x3FFF Bit 5 4 5 2 1
48. Rotates the contents of register to the right Example When Az 0x61 and 0 RRA Ae 040 C T 1 Ze 0 H 0 M 0 98 Chapter 4 CPU Instruction Set Rotates the contents of operand to the lett rand HL are used for operand m CYTOL 41216 Examples When 0865 HL 0 and 0 B Be 0500 Creid z 0 H 0 N 0 RLC HL HO e 0x00 0 ze Rotates the contents of operand m to the left rand HL are used for operand m Examples When L 0x80 HL 0x11 and CY 0 RL L Le 000 credi zei Had Nei RL e Ux22 C Y D z 0 0 Nei 99 Game Boy Programming Manual ni Te 641 216 Rotates the contents of operand m to the right rand HL are used for operand Examples When C 0x1 HL 0x0 C T 0 OC 0x80 credid Z DU He 0 Nei HL HL e 0x00 cY 0 zei H e 0 Rotates the contents of operand m to the right rand HL are used for operand rm Examples When 0 1 xS8A CY 0 RRA gt A ux g cv 1 z2 1 H 0 N 0 RR HL e x45 C T O z0 H e 0 Nei 100 Chapter 4 CPU Instruction Set Shifts the contents af operand m to the left Thatis the contents af bit 0 are copied ta bit 1 and the previous contents of hit tthe contents before the copy operation are copied to bit 2 The same operation is repeated in sequence f
49. TAC LDRO LDR5 SCK LDGO LDG5 LDBO LDB5 SI OAM RAM LCD Controller E DCK 40x28 bit DMA Controller E SPL SO E Y 5 5 SPS Infrared CLS RO R4 Comm Port MOD General LCD Display RAM Interface REVC Purpose Port VDD3 VDD5 GND RESET MD8 MD15 TESTO TEST2 MCS0 MCS1 PSMO1 PSMOO 20 Chapter 1 System 2 3 DESCRIPTION OF CPU FUNCTIONS Interrupts There are five types of interrupts available including 4 types of maskable internal interrupts and 1 type of maskable external interrupt The IE flag is used to control interrupts The IF flag indicates which type of interrupt is set LCD Display Vertical Blanking Status Interrupts from LCDC 4 modes gt Timer Overflow Interrupt gt Serial Transfer Completion Interrupt gt End of Input Signal for ports P10 P13 DMA Transfers DMA transfers are controlled by the DMA registers lt DMG gt DMG allows 40 x 32 bit DMA transfers from 0x8000 0xDFFF to OAM OxFEO0 OxFE9F The transfer start address can be specified in increments of 0x100 for Ox8000 OxDFFF lt CGB gt In addition to the DMA transfers method for DMG from 0x0000 0xDFFF in CGB CGB enables two new types of DMA transfer horizontal blanking and general purpose DMA transfers Note however that when performing a DMG type DMA transfer on CGB some consideration must be given to specifying the destination RAM area For more information see the DMA Functions section in Chapter 2 1 Horizontal Bl
50. These registers cannot be written to in mode 63 Game Boy Programming Manual 1 9 OBJ Display Priority As a rule when objects overlap the one with the lower OBJ number is given priority In DMG or DMG mode of CGB among overlapping objects with different x coordinates priority is given to the object with the smallest x coordinate 1 The case with the same x coordinate For both DMG and CGB C B No of OBJ A b No of OBJ B A No of OBJ C When lt b lt c objects are displayed as indicated in the figure at left 2 case with different x coordinates only No of OBJ A When lt b lt c objects are is b of OBJ B displayed as indicated in the c No of OBJ C figures below A A A 3 Different x coordinates DMG CGB in DMG mode In DMB mode and with objects with different x coordinates the object with the smallest x coordinate is given priority A No of OBJ A b No of OBJ When a b objects are displayed as indicated in the figure at left 64 Chapter 2 Display Functions 2 LCD COLOR DISPLAY CGB ONLY The LCD unit of the CGB system can display 32 shades each for RGB for a total 32 768 colors A single color palette consists of 4 colors selected from among these 32 768 colors One of 8 palettes can be selected for each BG and OBJ character However because each OBJ includes transparent data each OBJ color palette consists of 3 colors Th
51. are output according to data in the mode register for each sound The mode register data can be specified as needed while outputting sound Initialization Flag When the default envelope values are set and the length counter is restarted the initialization flag is set to 1 and the data is initialized Mute In the following instances the synthesizer will enter mute status No sound will be output regardless of the ON flag setting Sounds 1 2 and 4 When the output level is O with the default envelope value set to a value other than 0000 and in DOWN mode When the step is O with the default envelope value set to a value of 0000 and in UP mode NR12 NR22 and NR42 set to 0x08 and the initialization flag set Sound 3 With the output level set to mute bits 5 and 6 of NR32 set to 0 otop Status In the following cases the ON flag is reset and sound output is halted Sound output is halted by the length counter With Sound 1 during a sweep operation an overflow occurs in addition mode OFF Mode Stops operation of the frequency counter and D A converter and halts sound output Sounds 1 2 and 4 When the default level is set to 0000 with the envelope in DOWN mode initialization not required Sound 3 When the Sound OFF flag bit 7 of NR30 is set to O Setting the Sound OFF flag to 1 cancels OFF mode 70 Note Chapter 3 Sound Functions Sound 3 is started by re initialization All
52. generated the sender will re send the data and the receiver may lose track of the packet number see note 1 of previous section The sender is prone to entering an endless loop when the packet signifying transmission completion is received Therefore the receiver should remain in receive status for approximately 300 us after returning the status see note 2 of previous section Depending on the power reserve of the battery infrared communication may cause a sudden drop in battery voltage and a complete loss of power Ensure that the speed of the two communicating Game Boy Colors is the same both double speed or both normal speed during communication Noise can be heard from the speaker and headphones during communication but this does not indicate a problem with the hardware Ensure that faulty or uncontrolled operation does not occur when infrared communication signals are input from other game software and devices Use particular care when using the same subroutine to communicate between various types of games because fault y or uncontrolled operation is especially likely to occur in such cases Before performing data communication confirm that the other hardware participating in the transmission is using the same game This can be accomplished by means such as exchanging a unique key code The following are items to note when using an infrared communication subroutine other than that provided by Nintendo Ensure that error han
53. is completely executed using system commands 204 Chapter 7 Super Game Boy Sound 4 SGB SOUND PROGRAM SOURCE LIST 50 No kunso so Sound Family Specific Sound Tuning Interval 40 0 Normal envelope NENNEN Dch so Envelope with extremely short decay NEN NE 41 0 Electric keyboard envelope EE d2 so Sine Family Brass envelope 43 0 Pedal organ envelope 45 0 Banjo envelope NENNEN 09 50 Soft envelope 50 Normal sine wave a 45 0 Banjo envelope tuno1s 46 0 Bass envelope tumoris Bass Family 1 08 50 Fretless bass envelope tuno1s 45 0 Banjo envelope 020 46 0 Bass envelope 020 Bass Family 2 09 50 Soft envelope 020 43 0 Pedal organ envelope tuno4o 45 0 Banjo envelope tuno4o Guitar Family Dch so Envelope with extremely short decay tuno4o 41 0 Electric keyboard envelope NENNEN NN 43 0 Pedal organ envelope NENNEN EN ep so Electric keyboard 1 D ET ep2 so Electric keyboard 1 Electric Keyboard Family 1 205 Game Boy Programming Manual Envelope Type SO NO kun so Name Sound Family Specific Sound B 0 019 d3 so Electric Keyboard Pedal organ envelope Family 2 peer wem of emm _ Chorus Family 1 43 0 Pedal organ envelope cho2 so Chorus 2 Dch so Xylophone 41 0 Electric keyboard envelope 09 50 Soft envelope Xylophone looping sound tun 055 0x0
54. is required to play the game properly For instance if the game does not require going to a particular area to complete the game go there anyway to assure there are no programming problems in going to that location The software should be paused many times during the test as this often causes programming problems to surface All testing should be recorded onto a videotape making it easier to review programming problems The entire attract mode demo should be viewed to assure there are no programming problems Routines designed to assist the programmer or developer in debugging the software should be removed from the game prior to submission This includes routines to determine hardware type 277 Game Boy Programming Manual 11 A Game Boy Color dedicated game must include a hardware check upon power up which will display the following message when it is connected to a device other than Game Boy Color The official game title must also be displayed in the upper portion of the display Screen lt Game Title gt This game can only be played on Game Boy Color 4 LICENSEE GAME PLAY VIDEOTAPE PASS FAIL GUIDELINES 1 The licensee game play videotape if included must be recorded a VHS tape Standard Play speed SP for clarity No editing of the tape is allowed If more than one tape is needed to show the entire piece of software then when a second tape begins it must show that the player is in the
55. mode 1 05 MHz CPU system clock Double speed mode 2 10 MHz CPU system clock Switching the CPU Operating Speed Immediately after the CGB CPU is reset immediately after reset cancellation it operates in normal mode The CPU mode is switched by executing a STOP instruction with bit O of register Key 1 set to a value of 1 If this is done in normal mode the CPU is switched to double speed mode otherwise it is switched to normal mode Bit 0 of register Key 1 is automatically reset after the operating speed is switched In addition bit 7 of register Key 1 serves as the CPU speed flag indicating the current CPU speed Address Bit T B 5 4 3 2 1 ie Enable speed switching Speed Flag read only 0 Mormal speed mode 1 Double speed made 34 Chapter 1 System When bit 0 of register Key 1 is set to 1 the standby function cannot be used When using the standby function always confirm that bit 0 of register Key 1 is set to 0 When switching the CPU speed all interrupt enable flags should be reset and a STOP instruction executed with bits 4 and 5 of the P1 port register set to 1 as with the standby function STOP mode When the CPU speed is switched a return from STOP mode is automatic so it is not necessary to generate a STOP mode cancellation However until the CPU speed has been changed and the system clock returns bits 4 and 5 of the P1 port register should be made to hold the value 1 Mam
56. no data section Normal status 0x81 and 0x00 For more information see Section 3 Communication Data Definitions Not connected OxFF and OxFF 4 2 Print Instruction Packet Used for print instructions for single sheet mode and copy mode for specifying the number of sheets Example 8 epepepejepm 8 epe ere Header Data Byte 1 specifies the number of sheets Data Byte 2 indicates the number of line feeds 1 feed 2 64 mm Data Byte 3 holds the palette values Data Byte 4 is the print density adjustment Data Checksum Dummy 0 255 1 in the example 0 means line feed only Higher order 4 bits represents the number of feeds before printing Lower order 4 bits represents the number after printing Each value is 0x00 OxOF Default is 00 Palettes are defined by every 2 bits beginning from high bit See Chapter 2 Section 2 3 Character 0x00 Ox7F Default values are 0x40 and 0x80 or greater 00 Ox40 Ox7F 2596 0 25 When printing continuous images from multiple screens setting the number of line feeds to 0 after one screen s worth of data is printed 9 data packets and a data end packet enables printing to be continued from one image to the next without a break Cautions Regarding Print Instructions Caution Required e Although applications can print 2 255 pages continuously this may take a long time Thus the user should be provided with a means of halting a print jo
57. of 0x00 should consist of null bits and all dots of characters with a name setting of 0x01 should be represented by non null bits 161 Game Boy Programming Manual Command PCT TRN Code 0x14 Data Transfer using VRAM Function Transfers screen data and color data for picture frames created by the software developer d7 dO 1 01 0 0 0 0 1 Number of packets 0 1 fixed Command code Ox14 0x00 The 4 Kbytes of SGB RAM immediately following this command are handled as screen data and transferred to SUPER NES VRAM START Number of characters 1 024 Picture Frame There should be 1 024 uncompressed characters of screen data The inside of the DMG window should be filled with null characters Three color palettes 4 6 are transferred The initial data consists of 2 048 bytes of screen data This is followed by by 3 palettes of color data 2 bytes x 16 x 3 The format of the transferred data is based on that of SUPER NES screen and color data However the BG priority bit is set to O the color palettes to palette numbers 4 6 the higher order 2 bits of the character name to 000 and the characters to 8 x 8 bit mode 162 Chapter 6 The Super Game Boy System Command ATTR TRN Code 0x15 Data Transfer using VRAM Function Transfers attribute files d7 dO 1 9 1 0 1 0 0 1 BEES Number of packets 0 1 fixed Command code 0x15 The 4 Kbytes of SGB RAM imm
58. the upper portion af qq The contents SP are automatically incremented by 2 Example When SP UxFFFC xFFFC xSF and OxFF FO x3C BC B x3c C e x5SF SP e OXFFFE CCL T E BEd 1 H H LDHL SF e HL gt SP e efe Jo fo fa 11 111 Varies with instruction results e 125 to 127 The 8 hit operand e is added to SP and the result is stored in HL Flag Z Reset H Set ifthere is a carry from bit 11 otherwise reset Reset zT Setifthere is a carry from bit 15 otherwise reset Example When SP OxFFFS LDHL SP 2 HL OXFFFA Hei Ne zel LO nn P nn e SP nn 1 SP Stores the lower byte of SP at address nn specified by the 16 bit immediate operand nn and the upper byte of SP at address nn 1 Example When SP LO 1006100 00100 Ox 1 01 91 Game Boy Programming Manual 2 3 BH Antimeltic and Logical Operation Instructions c H H 1 1 m PE EL Lo om Adds the contents of register rto those of register A and stores the results in register A Flag J Set ifthe result is 0 otherwise reset Setifthere is a carry from bit 3 otherwise reset M Reset Cr Set ifthere is a carry from bit 7 atherwise reset Example When A 0x34 and B xCb ADD 0 2 1 Hai N 1 Adds 8 hit immediate operand n ta the contents of register amp and stores the res
59. those that are identical in DMG and CGB CPU functions that are enhanced in CGB are described in Section 2 5 CPU Functions Common to DMG CGBO CPU functions that cannot be used for DMG are described in Section 2 6 CPU Function CGB only 2 4 1 Controller Data Mame Address Bit T 5 4 3 2 1 0 P4 P4 1 Input Partz P42 tutt P43 E P44 Ree la P415 Output Ports The P1 ports are connected with a matrix for reading key operations VDD P14 P15 P10 P11 All inputs are pulled High P12 P13 23 Game Boy Programming Manual When key input is read a brief interval is interposed between P14 and P15 output and reading of the input as shown below Example KEY LD A 20 Read U D L R keys LD FF00 A Port P14 lt LOW output LD A 00 Register lt Port P10 P13 LD A FF00 Perform this operation twice LD A 10 Reads keys A B SE ST LD FF00 A Port P15 lt LOW output LD A 00 Register A lt Ports P10 P13 LD A FF00 Perform this operation 6 times LD A FF00 LD A 30 Port reset LD FF00 A RET The interrupt request flag IF 4 is set by negative edge input at one of the P13 P10 terminals Negative edge input requires a LOW period of 2 times source oscillation DMG 4 MHz CGB 4 MHz 8 MHz The interrupt request flag IF 4 also is set when a reset si
60. timer LCD controller and sound circuit continue to operate in this mode HALT mode is canceled by the following events which have the starting addresses indicated 1 ALOW signal to the RESET terminal Starting address 0x0000 2 The interrupt enable flag and its corresponding interrupt request flag are set IME 0 Interrupt Master Enable flag disabled otarting address address following that of the HALT instruction IME 1 Interrupt Master Enable flag enabled Starting address each interrupt starting address STOP Mode Game Boy switches to STOP mode when a STOP instruction is executed The system clock and oscillation circuitry between the CK1 and CK2 terminals are halted in this mode Thus all operation is halted except that of the SIO external clock STOP mode is canceled by the following events and started from the starting address 3 ALOW signal to the RESET terminal Starting address 0x0000 4 A LOW signal to terminal P10 P11 P12 or P13 Starting address address following that of STOP instruction When STOP mode is canceled the system clock is restored after 2 times the oscillation clock DMG 4 MHz CGB 4 MHz 8 MHz and the CPU resumes operation When STOP mode is entered the STOP instruction should be executed after all interrupt enable flags are reset and meanwhile terminals P10 P13 are all in a HIGH period 22 Chapter 1 System 2 4 CPU FUNCTIONS COMMON TO DMG CGBO The CPU functions described here are
61. 0 153 with 144 153 representing the vertical blanking period When the value of bit 7 of the LCDC register is 1 writing 1 to this again does not change the value of register LY Writing a value of 0 to bit 7 of the LCDC register when its value is 1 stops the LCD controller and the value of register LY immediately becomes 0 Note Values should not be written to the register during screen display Address T 5 4 a 2 1 0 Register LYC is register compared with register LY If they match the Matchflag of the STAT register is set NOTE The following 3 registers BGP OBPO and OBP1 are valid DMG and DMG mode of CGB For information on CGB color palette settings see Section 3 LCD Color Display 56 Chapter 2 Display Functions Mame Address Bit T 5 4 3 2 1 Li LI 1 LI omm LI LI oes Specifies H 1 L 0 Specifies the palette data Specifies the palette 1 With each write specities the next palette 0 Values of bits 0 5 fixed 5 4 3 2 1 0 BCPD FFB3 RAV Specifies the BG write data 3 4 3 2 1 0 OCPS FFBA csesitesthe onu vite aet Specifies HIL H 1 1 0 DT Specifies the palette data Specities the palette 1 ith each write specifies the next palette 0 Walues of bits 0 5 fixe
62. 00 00 00 00 00 79 52 08 00 0B A9 E7 9F 01 C0 7E E8 E8 E8 E8 E0 79 47 08 00 0B C4 D0 16 A5 CB C9 05 D0 10 A2 28 79 3C 08 00 0B F0 12 A5 C9 C9 C8 D0 1C A5 CA C9 79 31 08 00 0B 0C A5 CA C9 7E D0 06 A5 CB C9 7E 79 26 08 00 0B 39 CD 48 0C D0 34 A5 C9 C9 80 D0 79 1B 08 00 0B SEA SEA SEA SEA EA A9 01 CD 4F 0C D0 79 10 08 00 0B 4C 20 08 SEA SEA SEA SEA SEA 60 SEA SEA 178 Chapter 6 The Super Game Boy System 5 3 SOU initial data When using the SOU TRN system command send the following 5 packets of SOU TRN default data to the register file before SOU TRN is used 51 5 2 DB DB S13 DB DB ST4 DB DB O15 DB DB 79 00 09 00 0B C2 02 C9 09 00 1A A9 01 80 00 79 0B 09 00 0B 42 AF DB FF 00 05 20 73 C5 80 79 16 09 00 0B 03 20 76 C5 A9 31 8D 00 42 68 68 79 21 09 00 01 60 00 00 00 00 00 00 00 00 00 00 79 00 08 00 03 4C 00 09 00 00 00 00 00 00 00 00 179 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 180 Chapter 7 Super Game Boy Sound Chapter 7 Super Game Boy nnns 182 1 SGB Sound Program Overview 1 eere 18
63. 0885 0205 9 08 02 9 0 9 002 5 Chapter 5 10 Chapter2 Display 46 Chapter 3 Sound Functions 70 Chapter4 CPU Instruction SOP seeedsesvesesessesevesessuvesessswerseseseereseveza 84 Chapter 5 Miscellaneous General Information 114 Chapter 6 The Super Game Boy System 124 Chapter 7 Super Game Boy Sound 182 Chapter 8 Game Boy Memory Controllers MB C 212 Chapter 9 Pocket Printer 233 Appendix 1 Programming 248 Appendix 2 Register and Instruction Set Summaries 260 Appendix 3 Software Submission Requirements 276 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK Chapter 1 System CGHAFTEN T SI S TENE 10 T1 GONCTAl SVSIOI iiic o ids 10 TaD SOV II OVETVI EW socera 10 1 2 Game Boy Block Diagram 12 1 3 Memory ConfiguraltiOn 13 Te ICON uot 14 1 2
64. 1 i Adjust acc wm jw Hir operation 00000 000 111 111 110 111 11 111 011 01 110110 00 010 000 LED cu cg EUN ECRIRE M M 00 000 000 273 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 2 4 Appendix 3 Software Submission Requirements APPENDIX 3 SOFTWARE SUBMISSION REQUIREMENTS 276 1 The Software Submission Process 276 2 Items Required for Submission 1 276 3 Software VeHfICAllOD uere rear 277 4 Licensee Game Play Videotape Pass Fail Guidelines 278 5 Licensing Screen Information Pass Fail Guidelines 278 6 Common PIODICINS RE ERU RE EUR E EUR E EROR EE OPE COE ECES 279 7 A Note on Objectionable Material 280 8 Software Submission Checklist 281 9 Instructions For Software Specification Sheet 282 10 Character Code List For Game Title Registration 287 11 ROM Registration Data Specification 288 11 1 Description of ROM Registration Data 289 12 Storing Data to the Floppy Disk 293 13 Production Softw
65. 150 Chapter 6 The Super Game Boy System Command 500 Code 0x09 Data transfer using VRAM Function Sends a sound program and sound data to the APU d7 dO Number of packets 0 1 fixed Command code 0x09 The 4 Kbytes of SGB RAM data immediately following the command is sent to APU RAM The to be transferred must be prepared prior to the frame preceding issuance of the command The transfer ends 6 frames after the command is issued not counting the frame in which the command is issued The beginning of the data for transfer contains a 16 bit representation of the number of data items and the transfer destination address and the end contains an ending code and the starting address of the program For more information see Chapter 7 Super Game Boy Sound APU RAM program area 0x0400 Ox2AFF 9 75 Kbytes APU RAM music data area 0 2 00 OxA4AFF 8 Kbytes APU RAM sampling data area OxADBO OxEEFF 40 25 Kbytes Note When SOU is used 5 packets of SOU initialization should be sent to the register file For more information see Section 5 3 SOU TRN Initialization Data 151 Game Boy Programming Manual Command PAL SET Code 0x0A Function Applies system color palettes to SGB color palettes d7 dO __ Number of packets 0 1 fixed Command code 0x0A d7 dO bolus ofthe system color palette to apply to SGB color LOW Number of the system color palett
66. 2 2 Memory Mapping SUPER NES 183 3 Creating and Transferring Score Data 184 3 1 Transferring tetas 184 42 Summary 5 vex ieee 184 3 3 Overview of Creating Score Data 0 1 401 1 11 1 eere rennes 185 3 4 Setting the NEWS System Working Environment 185 3 5 Setting the Working Environment When Using IS SOUND 189 3 6 Score Data Format When Using Original Tools 190 3 7 Cautions Regarding Production of Musical Pieces 202 3 8 Format Of Transferred 203 4 SGB Sound Program Source List 205 5 Transferring Audio Data to the Score Area 208 5 1 Required Data and Procedure for Audio Oultput 208 5 2 Iranster File EE EUER NE 209 181 Game Boy Programming Manual CHAPTER 7 SUPER GAME BOY SOUND 1 SGB SOUND PROGRAM OVERVIEW The SGB sound program is a special SGB program built into the SGB system program The sound program is automatically transferred to the SNES
67. 27 41 0 Electric keyboard envelope Brass Family 1 C20 Chorus Family 2 Xylophone Famil Banjo envelope Soft envelope Seme _ Bassoon Family Bmw O O Ox02b d5 S0 Trumpet Family 206 Chapter 7 Super Game Boy Sound Envelope Type so No Kankicl so Name Sound Family Specific Sounds i kun 0x032 Percussion Closed high hat Instrument following 0x39 Ox3E can be used with Kankichi kun river SO wind so Wind blowing T Percussion Famil Settings for source data numbers 0x39 0x3E cannot be specified on Kankichi kun These source data can be used only with sound effects However they can be set using tools other than Kankichi kun The shaded portions are the basic source data The other source data items are the basic source data with modified envelopes The contents of the source list are also listed in the README file located in the sobox directory installed for NEWS The recommended tuning values in the source list are based an interval of See Section 3 6 4 Interval Data With high and low pass filtering the tuning of some source data may be somewhat off Whenever this occurs the tuning value must be modified The interval value is the score data setting interval code for producing sounds with a C30 interval For SGB all tunings are set 50 cents higher than the standard value A 440 Hz The source
68. 3 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 0040 3000 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 00 01 02 03 04 05 amp 06 07 0000 0400 of data items to transfer for Directory Directory transfer destination address Directory data 4 bytes No of data items to transfer for sod Sod transfer destination address Sod data 6 bytes No of score data items to transfer Score data transfer destination address Score data ocore data ocore data Score data No of sampling data items to transfer oampling data transfer destination address Sampling data Sampling data Sampling data Sampling data Sampling data Sampling data Sampling data Sampling data Transfer end code Program start address When using multiple sampling data items also transfer the Directory and sod data specified for each item in Step 2 Note Be careful not to rewrite the Directory and sod data used by the system 209 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 210 Chapter 8 Game Boy Memory Controllers MBC Chapter 8 Game Boy Memory Controllers MBC 212 Iz uii UE
69. 3 MBC5 3 3 1 Memory Image Required If a memory device is used that uses less than the maximum amount of memory available ROM 64 Mbits RAM 1 Mbit a memory image is generated for the empty bank area Therefore please do not develop software that uses an image because it may cause failures 3 3 2 Specifying External Sound Input VIN Required Always use the sound control register NR50 with bits 7 and 3 VIN function OFF set to 0 Because the VIN terminal is used in development flash ROM cartridges using the register with VIN set to ON will produce sound abnormalities 3 3 3 Disabling Vibration Using the SGB SGB2 or 64GB Pak Recommended When MBC5 with rumble feature is used by SGB SGB2 or the 64GB Pak vibration should be turned off by the program to prevent failures caused by a faulty connection For methods of recognizing SGB and SGB2 see Chapter 6 section 4 2 Recognizing SGB With the 64GB Pak vibration is controlled by the N64 software Therefore N64 software programs that support MBC5 should not write data to bit 3 of the RAM bank register 3 3 4 Disabling Vibrations for Resets and Pauses Recommended Vibration should be halted during resets and pauses When power is turned on the hardware should not be vibrated until some input is received from the controller 254 Appendix 1 Programming Cautions 3 3 5 Limiting the Period of Continuous Vibration Recommended To prevent physical effects in the user suc
70. 4000 0x5FFF Write data 0 08 0 0 Allows a clock counter to be selected Range of Values Function RTC S 0 59 0 0x3B Seconds counter 6 bits RTC M 0 59 0 0x3B Minutes counter 6 bits RTC H 0 23 7 0x17 Hours counter 5 bits counter OxOC RTC DH bit7 Higher order bit and carry bit of days counter Bit 0 Most significant bit of days counter Bit 6 HALT HALT starts and stops the Bit 7 Carry bit of days counter clock counters The days counter consists of a 9 bit counter a carry bit Thus it can count from 0 to 511 0 000 Ox1FF Once the carry bit is set to 1 it remains 1 until O is written The counters operate when HALT is 0 and stop when HALT is 1 Values outside the given counter ranges will not be correctly written Register 3 Latches the data for all clock counters default O Write addresses 0x6000 Ox7FFF Write Data 0 1 Writing O 1 causes all counter data to be latched The latched contents are retained until 0 1 is written again 216 Chapter 8 Game Boy Memory Controllers MBC 3 3 Accessing the Clock Counters The clock counter registers are assigned to the external expansion RAM area of the CPU address space To access the clock counters RAM bank switching must first be performed External expansion RAM Area 0xA000 0xBFFF Bank Map x0 RAMBANKO O01 RAMBANK1 f 0x02 RAM BANK 2 003 RAMBANK3 ___ o Notued
71. 9 c30 d30 e30 f80 024 g30 kyu db 00 bgm1 1 h Part end code h Part 1 performance data db sno 1b pv1 140 pan 008 tun 030 db 096 P99 V99 g20 bgm1 block1 2 h Part 2 performance data db sno 1b pv1 140 pan 008 tun 030 db 096 P99 V99 e20 bgm1 block1 3 h Part 3 performance data db sno 1b pv1 140 pan 008 tun 030 db 096 99 99 20 Continued on next page 191 Game Boy Programming Manual bgm1 block2 0 Block 02 h Part O performance data db sno 1a pv1 200 pan 012 tun 050 db e e e e e e e e e e e e e e db 00 bgm1 block3 0 Block03 h Part 0 performance data db sno 1a pv1 200 pan 012 tun 050 db e e e e e e e e e e e e e e db 00 192 Chapter 7 Super Game Boy Sound Description of Example 1 a The score data map to memory addresses Ox2B00 Ox4AFF in the APU If this area is exceeded a portion of the sound program will be destroyed b gft is the starting address of the entire tune table dw bgm1 and bgm2 are the tune labels and the starting addresses of the score data items c The tune label The order in which the blocks are played is defined following the tune label The dotted frame encloses the data for one tune bgm1 d Data for each block e 0x01 Ox7F 01 127 is the number of loops repetitions 0x82 OxFF 130 255 is an endless loop If repetition is not needed set the end code 0x00 instead of a loop co
72. 99 V99 C30 0x0A4 for specifying an interval Length Gt amp Vel Tie Code db 048 90 95 TIE 0 0 8 for specifying a tie Length Rest Code db 096 KYU 0x0C9 for specifying a rest 197 Game Boy Programming Manual d Special Symbols The special symbols represent special data for implementing a variety of special effects These include sound change crescendo panpot change vibrato tremolo and echo Each symbol has its own parameters The following table lists these special symbols their parameters and the valid values for these parameters x Special Symbols summary No 1 Symbol First Argument Second Third Argument Function Code range Argument range range sno SOURCE NAME Sound change lt lt 127 Pan value Panpot 02L 20 R 102C E1 0 lt lt 20 10 default pam No of steps Pan value Move panpot E2 1 lt lt 255 0 lt Y lt 20 Y takes effect after X steps vib No of hold steps Rate Depth Vibrato no of hold steps is the time 0 lt lt 255 1 lt Y lt 255 1222255 till vibrato takes effect vof Vibrato off E4 mv1 Volume Main volume 5 0 lt lt 255 192 Default value No of Steps Move main volume 1 lt lt 255 lt lt used for crescendo decrescendo Y takes effect after X steps tp1 Rate Tempo E7 1 lt lt 82 See Note 1 No of steps Move tempo 1 lt lt 255 m dE Used for retardando accelerando Y takes effect after X steps M
73. APU at system startup Using the SGB system commands pre loaded sound effects in the sound program can be used in Game Boy application programs that support SGB SGB software These commands can be used to set each of the 73 types of pre loaded sound effects to 4 intervals playback frequencies and 3 volume levels Also preloaded are music data for BGM instruments sound sampling data This easily allows play of score data created with Kankichi kun the tool for creating SNES scores and score data for KAN ASM the standard driver that is a software tool for IS SOUND In addition information on the SGB score data format has been made openly available allowing those using tools other than the NEWS system or IS SOUND to create score data in this format 182 Chapter 7 Super Game Boy Sound 2 MEMORY MAPPING SUPER NES APU APU Addresses DIODICIH hdusic saund effects routines Sound effects data a 75k Score Area DI 4BUOH tan 4 30H un NN Sampling D ata zin waveforms vuavetorms Sound effe waveform Echo Area approxim ately amp 00 6 Special SGB Sound Driver E area for usable score data FFOOH FFCOH FFFFH 183 Game Boy Programming Manual 3 CHEATING AND TRANSFERRING SCORE DATA 3 1 Transferring Score Data BGM can be played with the APU by using the SOU TRN command to transfer original score data to the prescribed a
74. Block No 0x9800 CHR Code amp ATRB 0 0x9801 CHR Code amp ATRB 1 0x9802 CHR Code amp ATRB 2 144 dots o1 97 e quee _ Attrubute Ox9BFE CHR Code amp ATRB 1022 Ox9BFF CHR Code amp ATRB 1023 5441545546 1563 wesmse 609 610 256 dots CCPC ery sep _ _ Portion displayed to LCD when SCX SCY 0 0 f Portion displayed to LCD when L SCX SCY 152 8 Note Attributes specified only with CGB 2 With BG display data allocated to 0x9C00 0x9FFF RAM Address Block No 0 9 00 CHR Code amp ATRB Correspondence between LCD screen and block numbers as 0x0C01 CHR Code amp ATRB 1 shown in preceding figure 0x9C02 CHR Code amp ATRB 2 Ox9FFD CHR Code amp ATRB 1021 Ox9FFE CHR Code amp ATRB 1022 Ox9FFF CHR Code amp ATRB 1023 ATRB Attribute Note Attributes specified only with CGB 51 Game Boy Programming Manual 1 5 LCD Screen Window Display opecifying a position on the LCD screen using registers WX and WY causes the window to open downward and to the right beginning from that position Window display data also can be specified as character codes beginning from 0x9800 or 0 9 00 in external SRAM OBJ character data is displayed in the window in the same way as the BG screen LCD Screen Area WY Window Display Area 143 52 Screen Timing lt Segment
75. Boy SGB SGB is a device that enables Game Boy software to be enjoyed on a TV screen Game Boy software can be plugged into the SGB which operates on the Super Nintendo Entertainment System Super NES SGB consists of the basic Game Boy circuitry and components such as an Intercommunication Device ICD with built in SGB the system program and a CIC Basic SGB operation involves conversion by the ICD of 2 bit 4 grayscale image signals generated by the SGB CPU to SUPER NES character data and storage of these data in SGB RAM The system program subsequently transfers this data by DMA to SUPER NES WRAM and then to VRAM The above operations are performed repeatedly to display the Game Boy screen on a TV screen Unmodified sound output from the SGB CPU is linked to the SUPER NES sound mixing circuit and is output from the speaker on the TV These operations are controlled by the SGB system program and therefore require no special consideration when programming for Game Boy Game Boy software not specifically created for SGB provides 4 colors in 4 grayscales These colors are selected from several color patterns provided in the system program Programming using the system commands described later allows a game to be represented using 4 palettes of 4 colors each per screen and SUPER NES functions such as SUPER NES sound Super Game Boy comes in 2 models the 1994 model which has no communication connector and the 1998 model which i
76. C A H T 1 z 16 14 a Only advances the program counter by 1 performs other operations that have an effect 110 Chapter 4 CPU Instruction Set 2 9 Generai Purpose Antfimelic Operations and CPU Control Instructions cy H H CYCL edi 21 DAA Decimal edoh fa 00 100 111 adjust acc When perfoming addition and subtraction binary coded decimal representation is used to set the contents of register Ata a binary coded decimal number 80 07 The following table shows the processing that accompanies execution af the DAA instruction Immediately following execution of addition ADDO and ADCiand substractian SUB and SHC instructions netruction Y Contents H Contents CY Contents before Bits 4 7 before Bits 0 3 Number Added after xecutian xecution Register Execution Register to Register Execution 0 0x 0 9 0 0x0 0 0x0 0x9 0 0 0x9 0xF 0 1 0x0 Dc 1 0x 0 1 0x0 0 3 1 1 0x0 OxH Oc 0x0 0x3 0x0 0x9 0x4 OF 0x0 Ox 0x0 0x9 0x0 0x3 0x0 0 9 0x0 x8 Ux f UxF Ux6 OxF 0x0 0x9 0x6 0x0 0x9 0x6 BE SUB SBC 1 Examples when Az 0x45 and 0x38 ADD Ae 0x06 0x83 e 0 SUB A B Ae 0x83 0x38 4 1 DAA A Dx4B UEFA 0x45 CT H H r CTCL T
77. C L An external interrupt occurs hera If oc true PC SP SP oP e SP 2 lf condition cc and the flag match control is returned ta the source program by popping from the memory stack the PC value pushed to the stack when the subroutine was called Example Address 08000 CALL 0 9000 0 8003 0 9000 0 RET E Returns ta address 0x800 if 1 Moves next instruction after 2 cycles if Z 0 108 Chapter 4 CPU Instruction Set SP 1 PC SP 2 e PC SP a SP 2 Fene 0 PO P Pushes the current value af the PC to the memory stack and loads to the PC the page 0 memory addresses provided by operand t Then next instruction is fetched from the address specified by the new cantent af PC With the push the cantent atf the SP is decremented by 1 and the higher order byte of the PC is loaded in the memory address specified by the new SP value The value ofthe SP is then again decremented By 1 and the lower order byte af the PC is loaded in the memory address specified by that value af the aF The RST instruction can be used ta jump ta 1 of addresses Because all ofthe addresses are held in page 0 memory 0x00 is loaded in the higher order byte af the FC and the value of P is loaded in the lower order byte relation between the t codes and P are as follows fo je oor n pe om n pe om um Example Address xen RST 1 gt Pushes 09001 to the st
78. C9 HET Example 2 The example below shows DMA transfer of 40 x 32 bits of data from the display RAM area 0x9F00 Ox9F9F to OAM OxFEO00 OxFE9H Machine Code Label Instruction Comment 3E 9F LD A 9FH EO 46 LD DMA A 9 00 9 gt Data can be transferred by DMA from 0x8000 0x9F9F to OAM either by the method shown Example 1 or by using only the above instructions 1 8 2 DMA Transfers in CGB Using the Earlier DMA Transfer Method This DMA method transfers only 40 x 32 bits of data from 0 OxDFFF to OAM OxFEOO OxFE9F The transfer starting address can be specified as 0 OxDFFF in increments of 0x100 The transfer method is the same as that used in DMG but when data is transferred from 0x8000 Ox9FFF LCD display RAM area the data transferred are those in the bank specified by bit 0 of register When transferring data from 0 0000 OxDFFF unit working RAM area the data transferred are those in the bank specified by the lower 3 bits of register SVBK Note When the CPU is operating at double speed the transfer rate is also doubled Using the New DMA Transfer Method The DMA transfer method provided for DMG has been augmented in CGB with the following DMA transfer functions 1 Horizontal Blanking DMA Transfer 61 Game Boy Programming Manual Sixteen bytes of data can be automatically transferred from the user program area 0 Ox7FFF or external and unit working RAM area 0xA000 OxDFFF to the LCD displa
79. CGB double speed mode Chapter 8 Game Boy Memory Controllers MBC MBC5 can use up to 64 Mbits of ROM 512 banks of 128 bits each and 1 Mbit of RAM 16 banks of 64 Kbits each Upwardly compatible with MBC1 4 2 Registers Addresses hex 0000 1FFF 0 2000 2FFF ROMB 1 3000 3FFF RAMB 4000 5FFF 4 3 Memory Map Maximum of 1 Mbit Set by RAMB register Accessible only when RAMG register is CPU Address RAM Highest bank OxOF Bank 0x01 Bank 0x00 0x8000 0x6000 0x5000 0x4000 0 3000 0 2000 0x0000 0 000 OxFFFF Unit Registers 0 000 Internal Working RAM External Expansion Working RAM Display RAM Empty no image 0xCO00 Bank 0x00 Bank Ox1FF Default Program Residence Area Fixed at Bank 0x00 Writing Bank Switching Area bank 0x01 Reading During a write data is written to the bank control registers at CPU addresses 0x0000 0x7FFF During a read the contents of ROM are read from these addresses 221 ROM Highest bank Ox1FF Bank 1 Bank 0 zt r gt 227 2 2 222 p 2t m m m m m m m mn m m m m m mn m mn m E m m m Up to 64 Mbits Set by the 1 registers Game Boy Programming Manual 4 4 Description of Registers Register for Specifying External Expansion Memory RAMG opecifies whether external expansi
80. Default Bank Register RAMB opecifies the RAM bank The RAM bank can be changed by writing the desired RAM bank number to the RAMB register any single address 0x4000 0x5FFF 5 5 4 3 2 1 ue M _ efault 2 RAN Vy Bits 0 1 Register for RAM bank setting Bit 3 Motor control register 1 motor ON 0 motor OFF Note Be sure to set the bits marked with to 0 before using them The default values are set automatically when power is turned on 227 Game Boy Programming Manual 5 5 Motor Control 5 5 1 Vibration Level Control of the rumble motor consists of setting it to ON or OFF The vibration level can be controlled by sending pulses of combined ON OFF instructions in short cycles Please comply with the following points when implementing vibration control 1 Set the frame rate to 1 frame per 1 60 second and control vibration frame by frame 2 At the start of vibration control send a startup pulse at least 2 ON frames A startup pulse also should be sent if the width of an OFF pulse is 3 or more consecutive frames This is necessary because startup from a complete stop requires a certain amount of time see Ex 5 5 5 2 Vibration Pulse Examples RAMB Bit 3 ON Example 1 Strong OFF Z Erames l 2 pU i ON Example 2 Startup Pul se Slightly strong pieta Example 3 ON Startup Slightly weak Puno
81. J characters are automatically displayed to the screen using the data written to OAM Data specification ranges for OBJ characters 0x00 x character code x OxFF 0x00 x lt OXFF 0x00 x Y x OxFF 46 Chapter 2 Display Functions 1 2 LCD Display RAM The DMG CPU has 8 KB 64 Kbits of built in LCD display RAM The CGB CPU has 16 KB 128 Kbits of built in LCD display RAM In 16 KB of memory can be joined in the 8 KB 64 Kbit memory area 0x8000 0x9FFF by bank switching using the register OxFF4F Bank switching is used exclusively CGB and cannot be used in DMG mode Mapping of LCD Display RAM The 16 KB of memory in CGB is partitioned into 2 x 8 KB by register VBK Bank 0 Bank 1 Character Data Character Data 0x9800 BG Display Data 1 0x9C00 BG Display Data 2 9 Bank Register CGB for LCD Display RAM Register Address T 5 4 3 2 1 0 Bank 0 Specify Bank 0 1 Specify Bank 1 Bank 0 is selected immediately after cancellation of a reset signal This function is available only in In DMG mode bit 0 is forcibly set to 0 and its value cannot be changed to 1 1 3 Character RAM Character data can be written to the 6144 bytes from 0x8000 to Ox97FF By default the area from 0x8000 to Ox8FFF is allocated for OBJ character data storage The register can be used to select either Ox8000 Ox8FFF or 0x8800 0x97FF as the area for storing BG and window character data
82. LCD status po d gt Mode 00 selection E NE Made 01 selection 0 nat selected NE S Mode 10 selection 1 selected LYC LY matching selection STAT indicates the current status of the LCD controller Mode 00 A flag value of 1 represents a horizontal blanking period and means that the CPU has access to display RAM 0x8000 0x9FFF When the value of the flag is 0 display RAM is in use by the LCD controller Mode 01 A flag value of 1 indicates a vertical blanking period and means that the CPU has access approximately 1 ms to display RAM 0x8000 0x9FFF Mode 10 A flag value of 1 means that OAM OxFEO0 OxFE90 is being used by the LCD controller and is inaccessible by the CPU Mode 11 A flag value of 1 means that the LCD controller is using OAM OxFEOO0 OxFE90 and display RAM 0x8000 0x9FFF The CPU cannot access either of these areas In addition the register allows selection of 1 of the 4 types of interrupts from the LCD controller Executing a write instruction for the match flag resets that flag but does not change the mode flag Mame Address 5 4 3 2 1 OO FF Mame Address T 5 4 3 2 1 0 00 Changing the values of SCY and SCX scrolls the BG screen vertically and horizontally one dot or pixel at a time 55 Game Boy Programming Manual Mame Address Bit T 5 4 d 2 1 LY indicates which line of data is currently being transferred to the LCD driver LY takes a value of
83. Number of packets Ox1 fixed Command code OxOF dO 0 01 Transfer destination address LOW dO 0x02 Transfer destination address HIGH d7 dO 0x03 Bank number dO 0x04 Ls Number of data items Ox1 OxB max d7 dO 0x05 Free Addresses 0x1800 Ox1FFF Data OxOE Bank Ox7E OxBOOO0 OxBFFF _ Jd 4 dd Loy Bank Ox7F 0x0000 OXFFFF 157 Game Boy Programming Manual Command DATA TRN Code 0x10 Data Transfer using VRAM Function Transfers data in SGB RAM to SUPER NES WRAM d7 do 1 Number of packets Ox1 fixed Command code 10H Data transfer address HIGH Data transfer address HIGH d7 dO M Bonne Free Addresses Bank 0x00 0x1800 Ox1FFF Bank Ox7E OxB000 OxBFFF Bank Ox7F 0x0000 OxFFFF When an SHVC program is tranferred to WRAM and executed 0x00 should be Written to 0x1700 of bank 00 This can be written either by using DATA SND or DATA or by using the transferred program 158 Chapter 6 The Super Game Boy System Command REQ Code 0x11 Function Requests multiplayer mode Number of packets 0 1 fixed Command code 11H d7 dO 424222 0 No request 1 Request The game program can use a connector for 2 controllers e g standard Controllers an
84. OF F hid acuden QOF when in DCUM mode M Ret F Ft Pohmomial counter dock Selection offequency dividing frequenoy selection Prohibited codes ratia f Polynomial OOOO Re MOO 127 14110 OOO 10 1215 counter 0001 022 004 P4294 te 000 flag set Conse cutie HRA FFZ3 H PEL 24 502 output level corral S01 output level control OOO tmin 114 ima OOO tmin 114 ima 504 502 to 5012502 HRSZ Sound Sound Sound Sound Sound Sound Soun 3 to 2 41 3 to 2 dito 502 502 Si 501 504 501 501 Sound Sound Sound Sound flag 3 flag 1 flag fag Wavetom RAM is made up of wawetom patterns eannasting of 4 bits 32 steps Sound end flag Waveform Fahd 267 Game Boy Programming Manual 3 CPU INSTRUCTION SET SUMMARY SYMBOLIC FLAGS OF CODE E OPERATION EYCL 543 240 LD nr LD nn OO 110 suaim3andpsu qgndino ndu najsugl 9 8 Ac BC LD Ac IDE LD AFF OD H C 11 110 010 LD AHL AMO LD A HLD IT m D E EE D eme HL A i EX D D ED E jm 1 Register Pai BC 00 268 Appendix 2 Register and Instruction Set Summaries h4 HER C NIC TAB OLIC OP CODE F agiztar JFERATION CEL 7B 240 DE 01 00 110 010 2 4
85. OFF 2 2 l Example 4 1 Strong OFF 3 x 2 j Example 5 3 consecutive OFF frames 228 Chapter 8 Game Boy Memory Controllers MBC 5 6 Programming Cautions IMPORTANT 5 6 1 Memory Image If a memory device is used that uses less than the maximum amount of memory available ROM 64 Mbits RAM 256 Kbits an empty bank area memory image results Please do not access this empty bank area Doing so may result in faulty operation 5 6 2 RAM Data Protection To protect RAM data it is recommended that RAM access be disabled RAMG 0x00 when RAM is not being accessed 5 6 3 Specifying External Sound Input VIN Always use the sound control register NR50 with bits 7 and set to 0 VIN function OFF Because the VIN terminal is used in development flash ROM cartridges using the register with VIN set to ON will produce sound abnormalities 5 6 4 Disabling Vibration Using the SGB SGB2 or 64GB Pak When MBC5 is used by SGB SGB2 or the 64GB Pak vibration should be turned off by the program to prevent failures caused by a faulty connection For methods of recognizing SGB and SGB2 see the description of the MLT REQ command in Chapter 6 Section 3 2 System Command Details With the 64GB Pak vibration is controlled by the N64 software Therefore N64 software programs that support MBC5 should not write data to bit 3 of the RAM bank register 5 6 5 Limiting the Period of Continuous Vibration
86. Operation Instructions 92 2 4 76 8 Arithmetic Operation Instructions nennen 97 2 5 Rotate Shift Instructions eese enne nnne nn nnn nnn 98 2 6 rana annua 103 2 Jum 5 105 2 8 Call and Return 8 1 222 22222 112 211 nnn nnne nnn 107 2 9 General Purpose Arithmetic Operations CPU Control I SEFLICTIONNS 0 ccccccececccceseeecseeeeeceseeneusneeeseseeseeseeseaees 110 9 5 Game Boy Programming Manual CHAPTER 4 CPU INSTRUCTION SET 1 GENERAL PURPOSE REGISTERS Accumulator 8 hit register far storing data and the results af arithmetic and logical operations Auxiliary registers B C D E and L These serve as auxiliary registers ta the accumulator As register pairs AC DE HL they are 8 hit registers that function as data pointers Program counter PC A 16 bit register that holds the address data af the program ta be executed next Usually incremented automatically according to the byte count of the fetched instructions When an Instruction with branching is executed however immediate data and register contents are loaded Stack pointer SP A 16 bit register that holds the starting address of the stack area of memory The contents ofthe stack pointer are decremented when a subroutine CALL instruction or PU
87. OuI A 225 2 2 TICOISIOT mem 225 5 3 Memory 226 5 4 Description of Registers anna 227 59 COME ON Pet 228 5 0 Programming CAUTIONS vaya xus xk 229 5 7 Physical Effects of Vibration on the Body 230 211 Game Boy Programming Manual 8 GAME BOY MEMORY CONTROLLERS 1 MBC1 1 1 Overview MBC1 is a memory controller that enables the use of 512 Kbits 64 Kbytes or more of ROM and 256 Kbits 32 Kbytes of RAM It can be used as follows To control up to 4 Mbits of ROM When used to control up to 4 Mbits 512 Kbytes of ROM MBC1 can control up to 256 Kbits 32 Kbytes of RAM To control 8 Mbits or more of ROM When MBC1 is used to control up to 8 MBits 1 MB or 16 MBits 2 MB of ROM the following conditions apply When used to control 8 MBits of ROM MCB cannot use ROM addresses 0x080000 0x083FFF Bank 0x20 When used to control 16 MBits of ROM 0x8000 0x083FFF Bank 0x20 MBC1 cannot use ROM Addresses E 00000 0x103FFF Bank 0x40 0x180000 0x183FFF Bank 0x60 RAM use by MBC1 is restricted to 64 Kbits 8 Kbytes 1 2 Description of Registers Register 0 Register 1 Register 2 RAMCS gate data serves as write protection for RAM Write ad
88. SH Instruction is executed ar when an interrupt occurs and incremented when a retum instruction ar pop Instruction is executed E E gt After instruction executed Before instruction executed Before instruction executed After instruction executed PUSH POP qq Flag Register Consists of 4 flags that are set and reset according to the results of instruction execution Flags CY and lt are tested by various conditional branch instructions 7 B 5 4 3 2 1 poh ASAA J Set to 1 when the result of an operation is 0 otherwise reset M Setto 1 following execution of the substruction instruction regardless af the result H Setto 1 when an operation results in carrying from or borrowing to bit 3 Cr Set to 1 when an operation results in carrying from ar borrowing to bit T 84 Chapter 4 CPU Instruction Set JT Transfer and inputioutput instructions Loads the contents of register r inta register r Codes for registers r and r Loads 8 hit immediate data n into register r Example D B 0x24 Be 0 24 1 ID r HL SARNIN 01 110 Loads the contents af memary 8 bits specified by register pair HL inta register Example When HL 085C x5c 85 Game Boy Programming Manual cT H H 1 z 16 LD HL r HL r NEN PS 1i 0 Stores the contents af register rin memory specified by register pair HL
89. Sounds OFF mode Setting the All Sounds ON OFF flag bit 7 of NR52 to 0 resets all of the mode registers for sounds 1 2 3 and 4 and halts sound output Setting the All Sounds ON OFF flag to 1 cancels All Sounds OFF mode The sound mode registers should always be set after All Sound OFF mode is canceled The sound mode registers cannot be set in All Sound OFF mode Sound Usage Notes Use one of the following methods to halt sounds 1 2 or 4 1 Use NR51 2 Set NR12 NR22 and NR42 to 0x08 3 Set NR14 NR24 and NR44 to 0x80 71 Game Boy Programming Manual 2 SOUND CONTROL REGISTERS 2 1 Sound 1 Mode Registers Sound 1 is a circuit that generates a rectangle waveform with sweep and envelope functions It is set by registers NR10 NR11 NR12 NR13 and NR14 Mame Address 5 4 3 2 1 METIDO RAY Only the shaded portion can be read Sweep shift Number n n to T Sweep Increase Decrease Addition frequency increases 1 Subtraction frequency decreases Sweep Time tz F Sweep Shift Number The frequency with one shift NR13 and NR14 is determined by the following formula X t 2X t 1 X t 1 2 0107 X 0 default data X t 1 is the previous output frequency If the result of this formula is a value consisting of more than 11 bits sound output is stopped and the Sound 1 ON flag of NR52 bit 0 is reset In a subtraction operation if the subtrahend is less than 0 the r
90. Super NES Send data to the register file using P14 and P15 The size of the register file is 128 bits this is referred to as 1 packet Send data to SGB RAM using an image signal NOTE Data transfers from the register file and SGB RAM to SUPER NES are performed by the system program 2 1 System Commands Using the register file to transmit system commands allows the various SUPER NES functions described below to be used in games The system program receives the commands and performs the specified processing e Data Format of System Commands 1 Data Transmission Methods Using 2 bits in SGB P14 and P15 of SGB CPU data is sent to the register file by serial transmission 127 Game Boy Programming Manual The system program reads the contents written to the register file 1 Start write P14 H a A LOW pulse is output to both P14 and P15 L This is required for transmission of each packet 128 bits LH 2 Write O P14 H P15 is fixed at HIGH and a L LOW pulse is output to P14 P15 L 3 Write 1 P14 H P14 Is fixed at HIGH and L a LOW pulse is output to P15 P15 di H L P14 or P15 Pulse Width P15 5 LL S min or P14 128 Chapter 6 The Super Game Boy System 2 Write Example dO d1 d2 d3 d4 d5 d6 oU UU U UUU d U Stat 1 1 0 0 1 0 1 3 Format of Data Transmitted to Register File WM Direction of data transmission d7 d5 d4 d2 di dO STL System C
91. a that comprises a packet is transmitted 1 bit at a time beginning from the MSB Transmission Packet pee Jem Connector oignal that implements an infrared communication connection between 2 Game Boy Colors This is always required in the initial packet When the receiver receives the connector and recognizes it as a connecting pulse the receiver returns the same pulse to the sender The sender then determines whether this signal is a normal connecting pulse If it is not recognized as a normal pulse transmission is interrupted at this stage With continuous communication that is not halted before completion this part of the packet is unnecessary from the second packet onward Header Data indicating the type of data being sent and the total number of bytes Byte 1 Communication command transmission of raw data At present any value other than Ox5A causes error To be used for by other devices in future Byte 2 Total number of data in data portion of the packet 0x01 OxFF Number of data 0x00 Indicates completion of communication to receiver Data The transmitted data itself Maximum of 255 bytes There are no data if completion of communication is indicated to the receiver The data portion of the packet consists only of a synchronous pulse Checksum 2 bytes of data consisting of the sum of the header and all data in the data portion of the packet Following this the communication status is retur
92. ack Oxe 001 and jumps to 00008 109 Game Boy Programming Manual 2 9 General Purpose Antfimelic Operations and CPU Control Instructions cy H H CYCL edi P 12 DAA Decimal elk 00 100 111 adjust acc When perfoming addition and subtraction binary coded decimal representation is used to set the contents of register Ato a binary coded decimal number 80 07 The following table shows the processing that accompanies execution af the DAA instruction Immediately following execution of addition ADDO and ADCiand substraction SUB and SAC instructions netruction Y Contents H Contents cT Contents before Bits 4 7 before Bits 1 3 Number Added after xecutian xecution Register A Execution Register to Register Execution 0 0x 0 9 0 0x0 0 0x0 0x9 0 0 0x9 0xF 0 1 0x0 Dc 1 0x 0 1 0x0 0 3 1 1 0x0 OxH Oc 0x0 0x3 0x0 0x9 0x4 OF 0x0 Ox 0x0 0x9 0x0 0x3 0x0 0 9 0x0 x8 Ux f UxF Ux6 OxF 0x0 0x9 0x6 0x0 0x9 0x6 BE SUB SBC 1 Examples when Az 0x45 and 0x38 ADD Ae 0x06 0x83 e 0 SUB A B Ae 0x83 0x38 4 1 DAA A Dx4B UEFA 0x45 CT H H r CTCL T edit 16 Takes the one s complement af the contents of register Example When A 13 35 CPL Ae X
93. ain key transpose 12 semitone 1 semitone down is the two s complement Transposition level 8 lt lt value 00 lt X lt 18 Transposition level Part key transpose E8 lt X lt FF value 1 semitone up 1 semitone down 00 lt X lt 18 is the two s complement 198 Chapter 7 Super Game Boy Sound x Special Symbols Summary No 2 oymbolFirst Argument Second Argument Third Argument Function Code range range range No of hold steps Rate Depth Tremelo no of hold steps is the 0 lt lt 255 1 lt Y lt 255 1 lt Z lt 255 time till tremelo takes effect 1 Volume Part volume 192 Default value D B m me SED 0 lt lt 255 Move part volume Used for crescendo decrescendo No of steps 1 lt lt 255 BA me mm Y takes effect after X steps pat ADRS L PAT ADRS H REPEAT PAT Pattern data subroutine SEF 00 lt lt FF 00 lt Y lt FF 1 lt 4 lt 255 Seen Note 2 vch No of steps Vibrato deepens gradually over X SFO 1 lt lt 255 number of steps swk Amount of change Start sweep from next sound DC lt Z lt FF valy is the two s complement 00 lt Z lt 24 A 2 Amount of change Start sweep heading into next sound DC lt Z lt FF val is the two s complement AD 00 lt Z lt 24 Amount of change 8 4 0 lt lt 255 ecv ECHO CHANNEL ECHO VOL L ECHO VOL R
94. al data 96 cat h2b start 400 gt When Using IS SOUND or Original Tools The score data file to be transferred is converted to the format used by the sound boot program Example dw 0030 Number of data items to transfer dw 2b00 Transfer destination address db 00 01 02 03 04 05 06 07 Score data db 08 09 0a 0b 0c 0d 0e 0f Score data db 00 01 02 03 04 05 06 07 Score data db 08 09 0a 0b 0c 0d 0e 0f Score data db 00 01 02 03 04 05 06 07 Score data db 00 01 02 03 04 05 06 07 Score data dw 0000 Transfer end code dw 0400 Program start address 203 Game Boy Programming Manual The number of data items to transfer 2 bytes and the transfer destination address 2 bytes are placed at the starting address of the score data Be careful to ensure that the data in this order Finally the transfer end code 2 bytes and the program starting address are added Be careful to ensure that the data is in this order The transfer end code is 0000 Cautions Regarding Data Transfer In SGB the transfer destination address is 2b00 and the program starting address is 0400 Please be sure to use the correct addresses or program control will be lost The area used for the transferred score data is approximately 8 Kbytes A data overflow will destroy the directory If the data exceed 4 Kbytes divide them into 2 files Transfer of score data
95. alette 1 attribute to this line The color of intersection of the two lines is decided by the last line color 145 Game Boy Programming Manual Command ATTR DIV Code 0x06 Function Divides the color palette attributes of the screen by the specified coordinates d7 dO 0 010 0 1 1 1 EE Number of packets Ox1 Command code 0x06 Number of the color palette of the bottom or right division Number of the color palette of the top or left division Color palette number of the character line on the dividing line 0 Divide by the H coordinate character line number vertical line 1 Divide by the V coordinate character line number horizontal line d7 dO 0x02 58 Coordinate data 0x03 OxOF should be filled with 0x00 See note on ATTR BLK 146 Chapter 6 The Super Game Boy System Example d7 dO Ox00 0 0 1 1 0 1 Number of packets transmitted 1 Command code 0x06 PEPE Palette 3 Palette 1 Palette 2 Coordinate setting H weep Jo fo fb Character line number 0x06 Sets this character line to the Palette 2 attribute H 06 V Palette 1 Palette3 147 Game Boy Programming Manual Command ATTRIBUTE Code 0x07 Function Specifies a color palette for each character d7 dO Ls Number of packets 0 1 0x6 Command code 0x07 dO 0 0 01 H coordinate of start of wri
96. and Engineering department at 425 861 2768 or by e mail at sharpf01 noa nintendo com Please notify me when you have made an electronic submission for our review Proposed Developer Please supply us with the name address and phone number of the proposed developer If the developer is not an Authorized Nintendo CGB Developer please contact Lief Thompson at liefth noa nintendo com or 425 861 2823 and he will provide you with the application information e Schedule Information Please provide us with an estimated product schedule including interim ROM submission s final Mario Club submission submission of the master ROM to Lot Check and the release date e Game Pak Configuration amp Game Type Please provide us with the estimated Game Pak size in Megabits Mb and the RAM size if internal memory is to be used to save game information Also state whether the game will be compatible with the monochrome Game Boy hardware or if it is dedicated to CGB hardware For the current Game Pak prices and configurations available please contact Nintendo s Licensing Department You will be contacted with the evaluation results when the Licensee Product Support Group has completed its evaluation of your ROM or concept submission Table of Contents Table of Contents Page Number IBDtFOQUCHOD 5 02903 209001159010090100920110 0020100110000 0 0 00 0100000 0 0 00 3 TO TUDIISITIOES 2 528281052510 513322515 9920251 980581 8
97. anged during sound operation ON flag set to 1 the initialize flag should be set after the value in the envelope register is set 74 Chapter 3 Sound Functions 2 2 Sound 2 Mode Registers Sound 2 is a circuit that generates a rectangle waveform with an envelope function It is set by registers NR21 NR22 NR23 and NR24 Address Bit T 5 4 3 2 1 ME21 FF16 RAN Only the shaded portion 1 can be read _ Sound Length Data t1 63 Waveform Duty 00 11 Binary Mame Address i B 5 4 3 2 1 Lp Length of Envelope Steps Mz to 7 Envelope Un Down 0 Decrease 1 Increase Default Envelope Mame Address Bit T 5 4 3 2 1 Address Bit T 5 4 3 2 1 ME24 FF13 RAN Only the shaded portion can be read High order Frequency Data 3 bits Counter flontinuous Selection Initialize Counter Continous Selection 0 Outputs continuous sound regardless of length data in register NR21 1 Outputs sound for the duration specified by the length data in register NR21 When sound output is finished bit 1 of register NR52 the Sound 2 ON flag is reset Initialize Setting this bit to 1 restarts Sound 2 Sound 2 Usage Notes If the contents of the envelope register NR22 needs to be changed during sound operation ON flag set to 1 the initialize flag should be set after the value in the envelope register is set 75 Game Boy Programming Manual
98. anking DMA Transfer Sixteen bytes of data are automatically transferred for each horizontal blanking period during a DMA transfer from the user program area Ox0000 0x 7FFF or external and hardware working RAM area 0xA000 0xDFFF to the LCD display RAM area Ox8000 Ox9F FF 2 General Purpose DMA Transfer Between 16 and 2048 bytes of data specified in 16 byte increments are transferred from the user program area 0x0000 0x7FFF or external and hardware working RAM area OxA000 0xDFFF to the LCD display RAM area 0x8000 0x9FFF during the Vertical Blanking Period Timer The timer is composed of the following TIMA timer counter TMA timer modulo register TAC timer control register Controller Connections P10 P13 Input ports P14 P15 The key matrix structure is composed of the output ports 21 Game Boy Programming Manual At user program startup the status of the CPU port registers and mode registers are as follows egister 83 BG OBJ ON LCDC OPERATION Stack OxFFFE Standby Modes The standby functions are HALT mode which halts the system clock and STOP mode which halts oscillation source oscillation HALT Mode Game Boy switches to HALT mode when a HALT instruction is executed The system clock and CPU operation halt in this mode However operation of source oscillation circuitry between terminals CK1 and CK2 continues Thus the functions that do not require the system clock e g DIV SIO
99. apter 3 Sound Functions Chapter 3 Sound Functions 2 eee 70 1 Overview Sound FUCIOES usui eraat ect 70 2 Sound Control Registers 2 72 2 1 Sound 1 Mode Registers 12 72 2 2 SOUNG 2 Mode TIGgISIBIS Fotos Es oto caa TAEAE 75 2 3 3 Mode 76 2 4 Sound 4 Mode Registers 78 2 9 Sound Control 1 5 80 3 VIN Terminal Usage 81 69 Game Boy Programming Manual CHAPTER 3 SOUND FUNCTIONS 1 OVERVIEW OF SOUND FUNCTIONS The sound circuitry consists of circuits that generate 4 types of sounds Sounds 1 4 It can also synthesize external audio input waveforms and output sounds External audio input is a function available only in CGB Sound 1 Generates a rectangle waveform with sweep and envelope functions Sound 2 Generates a rectangle waveform with an envelope function oound 3 Outputs any waveform from waveform RAM Sound 4 Generates white noise with an envelope function Each sound has two modes ON and OFF ON Mode Sounds
100. are Selection 294 14 Development Software Selection 295 15 Game Content GUIdellfiGs esses saepe repa ykR aaa ERR EE S EFE A ERR RENE TEE 297 16 Game Boy Price Quote Request Form 298 2 5 Game Boy Programming Manual APPENDIX 3 SOFTWARE SUBMISSION REQUIREMENTS 1 THE SOFTWARE SUBMISSION PROCESS All software submissions to Nintendo of America Inc must be forwarded to the attention of NOA Product Testing Supervisor Otherwise the submission s placement into the testing queue may be delayed To help reduce a submission s turn around time it is suggested that licensees assign a primary contact person for each software submission All communications with NOA concerning a submission s testing status should be forwarded through this individual The contact person should also be responsible for notifying any other interested parties When a submission is approved your company s primary contact will be notified immediately in writing When a submission is not approved NOA may send a videotaped copy of the programming problem s which prevent s the submission from being approved This is intended to assist the licensee in analyzing the cause of the software problem It is the licensee s responsibility to send a copy of this tape to any developer s of the software strongly encourages that copies be sent
101. area 0 Ox7FFF mask ROM and MBC for double speed mode are required 1 8 3 DMA Control Register For both DMG and CGB Mame Address T 5 4 3 2 1 0 DMA FF4B LO f f ft b WW DMA transfer and starting address 62 Chapter 2 Display Functions 1 5 4 New DMA Control Registers CGB only Address Bt 7 5 4 3 2 1 HDMA amp S FF55 LLL LELLELI RAM Transfer start and number of bytes to transfer Horizontal blanking General purpose DMA TENES qu PUN TEN LI Horizontal Blanking Number af lines ta transfer n 1 Total number of bytes to transfer 16 x n 1 Max 2 045 bytes General purpose DMA Total number of bytes transter 15 x 1 Max 2 046 bytes Value of 1 written After 1 is written horizontal blanking transfer is started from the first horizontal blanking period DMA should always be started with LEDC on and value other than 00 for STAT mode When a value of has been subsequently written transter stops beginning vith the next horizontal blanking period Value of written the following applies only when the bit is already 0 General purpose DMA starts OMA should be started with LEDC off or during a horizontal blanking period Ensure that the transter period does not overlap with STATE mode settings of 10 or 11 Only input of a reset signal can halt a general purpose transfer in progress Note
102. ation routine of the game program to send default data see Chapter 6 to the register file 4 3 SOU Default Data Required When using the SOU TRN system command send the SOU TRN default data see Chapter 6 to the register file before SOU_TRN is used 256 Appendix 1 Programming Cautions 5 PROGRAMMING CAUTIONS REGARDING POCKET PRINTER 5 1 Transfer Time Intervals Required Transfer time intervals vary depending on the manufacturer The timings indicated in Chapter 9 should be used to avoid faulty operation with a printer from a particular manufacturer 5 2 Printing Multiple Sheets Continuously Recommended Between 2 and 255 sheets can be printed continuously by an application However because this may take a long time the user should be given a means of halting a print job in progress 5 3 Print Density Recommended Because it is very inconvenient to adjust the density each time the program is started the print density data should be backed up whenever possible 5 4 Operation After the Motor is Stopped Required If a print instruction packet is sent within 100 msec of when the motor is stopped the print starting position may be incorrect Therefore print instruction packets should always be sent at least 100 msec after the motor is stopped 5 5 Feeds Required In setting the number of line feeds to be inserted before and after printing byte 2 of the data portion of the print instruction packet always sp
103. ay Priority Flag Dot Data Screen Display BG OBJ OBJ BG Palette Data 00 00 BG 00 0 00 bg BG bg 0 Priori obj 00 OBJ obj ty to obj bg OBJ obj Use OBJ OBJ priority 00 00 BG 00 1 00 bg BG bg Priori obj 00 OBJ obj ty to obj bg BG bg BG 00 00 BG 00 1 00 bg BG bg Highest obj 00 OBJ obj priority to obj bg BG bg BG by character obj and bg represent dot data 01 10 11 for OBJ and BG respectively 2 5 Display Using Earlier Software mode When earlier DMG software is used coloring is performed automatically by the system using registers BGP OBPO and OBP1 However the display uses 3 palettes 1 for BG with 4 colors and 2 for OBJ each with 3 colors excluding transparent maximum of 10 colors in 1 screen 1 BG Display Colors specified in BG color palette No 0 are displayed by the dot data 2 bits whose grayscales are specified by register 2 OBJ Display Colors specified in OBJ color palettes No 0 and No 1 are displayed by the dot data 2 bits whose grayscales are specified by registers OBPO and OBP1 The CGB unit automatically selects the display color according to the color palette pre registered in the CGB cannot be changed by a program However when turning on power to the CGB the player can select from a combination of the 12 colors registered in the unit This function is available only in DMB mode Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 68 Ch
104. b in progress See Section 4 5 Break Packet e Whenever possible the print density data should be backed up to avoid the inconvenience of adjusting the density at each startup 237 Game Boy Programming Manual e instruction packet is set within 100 msec of when the motor is stopped the position where printing resumes may be incorrect Always send print instruction packets at least 100 msec after the motor has been stopped e Always set the number of line feeds before printing to 1 or greater and the number after printing to or greater except in the case of the previously mentioned continuous printing when both values are 0 Other values for these parameters may in result in faulty operation such as double printing on the same line or failure of the last printed line to reach the paper cutter 4 3 Data Packet Sends print data that are in character data format The print data is sent in 1 byte increments for the specified number of bytes Example De gt Header Data Checksum Dummy Notification of compression no compression Maximum number of data bytes is 0x280 NoError through Ox3FF 16 bytes color x 20 colors x 2 colors Nine of these packets represent 1 printed sheet 160 dots x 144 dots Byte 2 of the header is the compression no compression notification byte 1 Compression upper 4 bits have no effect 0 No compression Transmission of compressed data is accomplished by compress
105. be selected Addresses 0x2000 0x2FFF of register 1 should be used by programs that use MBC1 Use of Register 2 Note that in MBC1 programs that use 8 Mbits or more use register 2 ROM or RAM bank control register for the high ROM bank Consequently in MBC5 the RAM bank is different while the ROM bank is unchanged ROM Banks 0x20 0x40 and 0x60 ROM banks 0x20 0x40 and 0x60 cannot be used MBC1 but they can be used in MBC5 MBC1 Register 3 ROM RAM change Because the addresses of ROM and RAM are independent of each other in MBC5 ROM RAM switching is unnecessary Any write instructions to register3 left in a program that uses MBC1 are ignored by MBC5 and have effect 4 5 2 General Notes Memory Image If a memory device is used that uses less than the maximum amount of memory available ROM 64 Mbits RAM 1 Mbit a memory image is generated for the empty bank area Therefore please do not develop software that uses an image because it may cause failures RAM Data Protection To protect RAM data it is recommended that RAM access be disabled when RAM is not being accessed RAMG lt 0x00 Specifying External Sound Input VIN Always use the sound control register NR50 with bits 7 and 3 VIN function OFF set to 0 Because the VIN terminal is used in development flash ROM cartridges using the register with VIN set to ON will produce sound abnormalities 223 Game Boy Programming Manual 4 6 Exampl
106. be started the TAC start flag set after the count up pulse is selected Starting the timer before or at the same time as the count up pulse is selected may result in excessive count up operation Example LD 3 Select a count pulse of f 2 LD 07 lt set LD A 7 otart timer LD 07 If a write is executed with the same timing as that with which the contents the modula register TMA are transferred to TIMA as the result of a timer overflow the same data is transferred to TIMA 25 Game Boy Programming Manual 2 4 4 Interrupt Flags Address Bit T 5 4 3 2 1 1 Vertical blanking uai mde E LEDC STAT referenced Timer overflow MEM rete baut erial p tranzfer completion AEA E E D M ULL LE P41 0 P4 3 terminal negative edge Bit reset enabled Address T 5 4 a 2 1 vertical blanking LEDC STAT referenced i Timer tatum Ae T AP CI AER iffe Serial WO tranzfer completion P4O P43 terminal negative edge 0 Dizabled 1 Enabled Marne IME Interrupt Master Enable 0 Reset by Dl instruction prohibits all interrupts 1 Set by El instruction the interrupt set by the IE registers are enabled Bit reset enabled Interrupts are controlled by the IE interrupt enable flag The IF interrupt request flag can b
107. ble or CGB exclusive 6 CGB related Functions Check the following items as appropriate if you selected DMG CGB compatible or CGB exclusive in item 5 a Serial Transfer Speed check all that apply Check all corresponding communication speeds b High Speed ROM Required A high speed ROM is required if CPU double speed mode Key 1 horizontal blanking DMA or general DMA is used Note These 3 functions cannot be used in MBC 1 2 and 3 c IR Communications If the software has CGB infrared communications capabilities please indicate whether the function involves communications with the same game or with a different game If you select different game include the game title in the parentheses 7 Overseas Version If the game has been or will be sold in another country indicate the product title and product code 8 Contact Provide the company name department address phone number fax number and the name of a representative that Nintendo should contact with all questions or comments about the product 282 10 11 12 13 14 Appendix 3 Software Submission Requirements Submission Date Provide the submission date and select the method used for submission Scheduled Release Date Provide the scheduled release date for the game Registration Data Provide the contents registered in the indicated addresses of the master ROM Refer to ROM Registration Data Specification for details E
108. cate must accompany the submission and no video tape is needed 2 6 Appendix 3 Software Submission Requirements Screen Text A printed copy of the complete screen text must be submitted Instruction Manual One copy of the instruction manual must be included with your game submission If at the time of submission the manual is not complete submitted as an intermediate version then you must submit a list of known bugs Note lf any of these items are not satisfied the program will be rejected and will not be submitted into the approval process until all criteria are met 3 SOFTWARE VERIFICATION The following verification process will significantly improve the probability of approval of your software 1 2 3 The licensing screen on all submissions should state LICENSED BY NINTENDO Confirm the Licensing Screen information is correct Check the spelling on the Licensing Screen and Title Screen as well as the spelling and grammar on the screen text Confirm the use of a TM circle amp or circle where applicable Run a Bypass Test to assure that when the game is powered up the Licensing Screen is visible for at least one second even if any combination of controller buttons are pressed repeatedly Also Power up the software repeatedly to assure it does so without programming failures Game characters should be moved in all possible directions or positions regardless of whether it
109. ching is not available in DMG mode Bank 1 on the right side of the figure is not available in this mode 48 The case of 8 x 16 dots block OBJ and 8 x 8 dots block BG CHR Code Address X00 0x8000 0x800F X01 0x8010 0x801F X02 0x8020 0x802F X03 0x8030 0x803F X80 0x8800 0x880F X81 0x8810 0x881F Area Shared by OBJ and BG XFE Ox8FEO Ox8FEF XFF Ox8FFO Ox8FFF X00 0x9000 0x900F 7 0 97 0 Ox97FF Codes lt DMG gt OBJ 128 x 1 BG 256 x 1 OBJ Code 000 Dot Data OBJ Code 002 Dot Data OBJ Code OFE amp BG Code OFE Dot Data BJ Code OFE amp BG Code OFF Dot Data BG Code 000 Dot Data SX BGB Code 07F Dot Data lt CGB gt OBJ 128 x 2 BG 256 x 2 Bank 1 CGB only OBJ Code 080 amp BG Code 080 Dot Data OBJ Code 080 amp BG Code 081 Dot Data Chapter 2 Display Functions OBJ Code 100 Dot Data OBJ Code 102 Dot Data BJ Code 180 amp BG Code 180 Dot Data OBJ Code 180 amp BG Code 181 Dot Data OBJ Code 1FE amp BG Code Dot Data OBJ Code 1FE amp BG Code 1FF Dot Data BG Code 100 Dot Dat BGB Code 17F Dot Data 2 If BG character data is allocated to Ox8000 0x8FFF these data share an area with OBJ data and the dot data that correspond to the CHR codes also are the same Note Because bank switching is not available in DMG mode Bank 1 on the right side of the figure is
110. color palettes rather than being converted from the bit data for the character 00 01 10 11 m n Bit n layer grayscale data light 00 01 10 11 dark Table 1 00 01 10 11 Black 2 SGB palette wi ani md wt Bit m layer Table 2 Example When the grayscale data shown in Table 1 are specified for the DMG palette the character represented on the DMG LCD is as shown the DMG character image figure below and to the Accordingly when the color data shown in Table 2 are specified for the SGB palette the character image represented on SUPER NES is as shown in the SGB character image figure below and to the right DMG Character Image However if bit 11 of the DMG palette is set to grayscale 00 the portion of the DMG character image is displayed with a 00 grayscale and the portion of the SGB character image is displayed as red rather than black Thus in this case when character data display using all of the colors on the SGB palette is desired a separate grayscale palette DMG palette for SGB must be provided DMG and SGB must be distinguished and the program must be made to branch accordingly See Section 4 2 Recognizing SGB 135 Game Boy Programming Manual When representing DMG grayscale on SGB the image can be faithfully represented if 00 of the SGB palette is set to a light color and 11 to a dark color Command PALO1 Code 0x00 Function Sets the color data of SGB color palettes 0 and 1
111. cted bit 6 of NR 4 set to 0 for sounds 1 2 and 3 if the higher order frequency data lower order 3 bits of NR 4 are changed the sound length bits 0 5 of NR 1 must to set to 0 after the frequency data is set If the sound length is not set to 0 the sound may stop during playback 2 3 2 Using Sound 3 Required Covers DMG SGB and CGB When sound is used data should always first be specified for addresses OxFF30 OxFF3F of waveform RAM If the initial flag is set during sound 3 operation sound 3 ON flag 1 the contents of waveform RAM will be destroyed 250 Appendix 1 Programming Cautions 2 4 Miscellaneous Notes 2 4 1 Using Interrupts Required Covers DMG SGB and CGB When interrupts are used the IF register should be cleared before the IE register is set If the IF register is not first cleared an interrupt may be generated immediately after interrupts are enabled 2 4 2 Reading Keys Required Covers DMG An interval of approximately 18 cycles should be used between output from P14 and P15 and reading of input Without this interval normal key input cannot be read 2 4 3 Using the Timer Required Covers DMG SGB and CGB The timer should be started TAC start flag set after the count up pulse is selected Starting the timer before or at the same time as the pulse is selected may result in an extra count up operation at the time of pulse selection Example LD Selects f 256 as the count up puls
112. d 3 4 3 2 1 The grayscales 2 bit for the character dot data is converted by the palette data BG register BGP OBJ or 1 and output to the LCD driver as data representing 4 shades including transparent Mame Address Bit T 5 4 3 2 1 0 x x 143 With WY 0 the window is displayed from the top edge of the LCD screen Mame Address Bit T 5 4 3 2 1 7 lt WX lt 166 With WX 7 the window is displayed from the left edge of the LCD screen 5 Game Boy Programming Manual Values of 0 6 should not be specified for WX L CD screen area WY Window Display Area 143 OBJ characters are displayed in the same manner the window as on BG 1 7 OAM Registers OBJ Object Data for 40 objects OBJ can be loaded into internal OAM RAM in the CPU 0 and 40 objects can be displayed to the LCD Up to 10 objects can be displayed on the same Y line Each object consists of a y coordinate 8 bits x coordinate 8 bits and CHR code 8 bits and specifications for BG and OBJ display priority 1 bit vertical flip 1 bit horizontal flip 1 bit DMG mode palette 1 bit character bank 1bit and color palette 3 bits for a total of 32 bits An8x8 or8x 16 dot block composition can be specified for an OBJ using bit 2 of the LCDC register With an 8 x 16 dot composition the CHR code is specifed as an even number as in DMG 58 Chapter 2
113. d even if MASK EN freezes screen immediately before masking is selected When using MASK EN before these commands use 0x10 or 0x11 as the argument If 0x01 is used as the MASK EN argument ATTR and ATTR SET should be used 143 Game Boy Programming Manual Command ATTR LIN Code 0x05 Function Applies the specified color palette attribute to a coordinate line d7 dO 0x00 o neo ss Number of packets Ox1 0 7 Command code 0x05 d7 dO Data group Ox1 Ox6E d7 dO L Palette number H V mode bit 0 Specifies the H coordinate character line number vertical line 1 Specifies the V coordinate character line number horizontal line d7 dO nd 0 04 Character Line ar data item i 0 01 Character Line OxOD OxOF n Packet See the note on ATTR BLK 144 Chapter 6 The Super Game Boy System Example d7 dO 0 eo i Number of packets transmitted 1 Command code 0x05 d7 dO 0x01 Jo Jo loh Number of data groups 2 L Character line number OxOF Palette number 1 Coordinate setting V o fo Jo fo jo Jo Character line number 0x02 Palette number 0 Coordinate setting H Applies the Palette O attribute to this line 02 J V OF Applies the P
114. d Multiplayer 5 0 2 players 1 4 players Multiplayer 5 required The default value is OxOO 159 Game Boy Programming Manual Command JUMP Code 0x12 Function Sets the SUPER NES program counter to the specified address d7 do p e 2 L Number of packets 0 1 fixed Command code 0x12 d7 do Address LOW d7 dO LLL address HIGH d7 dO 2 2 d7 dO Po New NMI vector address LOW d7 do New NMI vector address HIGH d7 dO mE RR Note If all addresses from 0x04 to 0x06 are set to 0 the NMI jumps to the original vector NMI is disabled in the system program so it must be enabled to be used 160 Chapter 6 The Super Game Boy System Command CHR Code 0x13 Data Transfer using VRAM Function Transfers SUPER NES character format data d7 dO 0 01 1 0 0 1 __ L Number of packets 0x1 fixed Command code 0x13 oot 0 _ 0 Data for characters 0x00 Ox7F BG 1 Data for characters 0x80 OxFF BG The characters are in 16 color 4 bit mode The 4 Kbytes of SGB RAM data immediately following this command is handled as SUPER NES character data and transferred to SUPER NES VRAM The format of the tranferred data is based on the SUPER NES character data format The BG character names are allocated to 0x00 OxFF When character data is used for the picture frame characters with a character name setting
115. data items in the empty areas do not require tuning In addition they can be used without changing the interval 207 Game Boy Programming Manual 5 TRANSFERRING AUDIO DATA TO THE SCORE AREA In general the score area 8 K is provided for transferring only score data However audio data also can be transferred for output Audio data can be transferred only if the following conditions are met e The data must not exceed the score area 8 e The data is not transferred to areas other than the score area except for the Directory and sod data If the data is transferred to other areas the sound effects used by the system may no longer play or may be altered strange sounds Transferring data to other areas may also lead to a loss of program control Therefore please be certain to ensure that the above two conditions are met 5 1 Required Data and Procedure for Audio Output 1 Sampling data multiple data items permitted 2 Score data score used to play sampling data 1 and 2 combined must occupy less than 8 Kbytes he sound numbers so No corresponding to the sampling data should be from among one of the following 002H 003H 004H amp 00CH 00DH 00EH amp 02AH 02BH 02CH hex No Note numbers other than the above are used for system sound effects or music Therefore be careful to use only the above numbers 3 Directory and sod data corresponding to the sampling data Directory and sod data are pr
116. de f Block definition end code g Location where the parts of each block are indicated and the part labels are defined Defines the part labels for parts 0 1 2 7 in ascending order from top to bottom 0x00 should be written for unused parts Even if some parts are unused always define 8 parts h The performance data for each part Play Data Overview Parameters such as temp volume pan source number echo velocity interval and sound length are set here For specific descriptions see Section 3 6 4 Code Summaries First set are the effects parameters such as main volume ramp and echo for Part 0 of the first block Once these are set they need not be set again for other blocks or parts as long as they are not changed Next the parameters such as part volume pan source number and tuning are set for each part Then the sound length velocity gate time and interval are set in that order Be careful to ensure that sound length is always set first followed by velocity gate item then the interval If the next sound is the same as the previous sound the sound length velocity and gate time need not be set again Finally a data end code of 00 is set for Part 0 of each block oettings for parts 1 7 are not required The lower parts and blocks are set in the same manner 193 Game Boy Programming Manual Code Summaries a Length Data step time This is the length step time to the subsequent sou
117. ding ta the instruction following the CALL Instruction in memory is pushed to the 2 bytes following the memory byte specified by the SF Operand nn is then loaded in the PC Examples When Z 1 Address Ux FRC CALL NZ 01234 Moves to next instruction after 3 cycles Dx Bu CALL 01234 Pushes Ox8003 to the stack Uxe003 and jumps to 0 1 234 107 Game Boy Programming Manual PC SP Fee SP 1 oP e SP 2 Pops from the memory stack the PC value pushed when the subroutine was called retuming control to the source program In this case the contents of the address specified by the SP are loaded in the lower order byte of the FC and the cantent of the SP is incremented by 1 The contents ofthe address specified by the new SP value are then loaded in the higher order byte ofthe PC and the SP is again incremented by 1 The value of SP is 2 larger than before instruction execution The next instruction is fetched from the address specified bythe cantent of PC Examples Address a g H CALL 4000H OOOH 4O00H RET X Returns to address 08003 PC SP c SP 1 SP SP 2 Used when an interrupt service routine finishes The execution af this return is as follows The address tar the return from the interrupt is loaded in program counter PC The master interrupt enable flag is returned to its pre internipt status Examples Ux0040 RETI Pops the stack and retums to address 0 001 Bun H IN
118. dling is implemented to prevent the program from entering an endless loop when communication is interrupted by sunlight or obstruction of the signal light To reduce power consumption use a maximum infrared LED emission pulse duration of 150 us and a duty ratio of approximately 1 2 Do not leave the infrared LED or photo transistor ON when not using infrared communication 2 6 3 12 Specifications Communication Speed Normal speed mode approximately 7 5 Kbps Double speed mode approximately 10 5 Kbps Communication distances Minimum 10 cm Typical 15 cm Recommended directional angle approximately 15 44 Chapter 2 Display Functions CHAPTER 2 DISPLAY FUNCTIONS e eee 46 1 General Display Functions 46 1 1 Character COmpDOSITIOTL 46 t2 COD DISplay BRAM ELE 47 7 9 47 1 4 BG DISPla 50 19 LOD GCION 52 1 6 LCD Display 0 0 54 1 7 OAM ROOIST CIS 2 ai 58 1 9 DMA TICOISIOCNS eet 60 1 9 OBJ Display delegit 64 2 LCD Color Display CGB only 1 65 COIF rS 65 2 2 Color Palette Composition 65 2 3 Writing Data to a Color
119. dresses 0x0000 0x1FFF Write data OxOA Writing OxOA to Ox0 Ox1FFF causes the CS to be output allowing access to RAM ROM bank code Write addresses 0x2000 Ox3FFF Write data 0x01 0x1F The ROM bank can be selected Upper ROM bank code when using 8 Mbits or more of ROM and register 3 is O Write addresses 0x4000 0x5FFF Write data 0 3 The upper ROM banks can be selected in 512 Kbyte increments Write value of O selects banks 0x01 0x1F Write value of 1 selects banks 0x21 0x3F Write value of 2 selects banks 0x41 0x5F Write value of 3 selects banks 0x61 0x7F RAM bank code when using 256 Kbits of RAM and register 3 is 1 Write addresses 0x4000 0x5FFF Write data 0 3 The RAM bank can be selected in 8 Kbyte increments 212 Chapter 8 Game Boy Memory Controllers MBC Register 3 ROM RAM change Write addresses 0 6000 7 Write Data 0 1 Writing O causes the register 2 output to control switching of the higher ROM bank Writing 1 causes the register 2 output to control switching of the RAM bank 2193 Game Boy Programming Manual 1 3 Memory Map When Used to Control up to 4 Mbits of ROM RAM Address CPU Address Ox7FFF DFFFH Internal Working 0 6000 ha BAM COO00H Ox4000 External Expansion Working 0 2000 RAM 0 0000 Display RAM 8000H Program Switching Area 4000H Program Residence Area 0000 When Used to Control up to 8 Mbits of ROM CPU Address ROM Addr
120. e LD 07 Sets TAC lt 3 LD A 7 Starts the timer LD 07 If a write instruction is executed for the modulo register TMA with the same timing as the contents of that register are transferred to TIMA as a result of a timer overflow the same write data also will be transferred to TIMA 2 4 4 Using STOP Mode Required Covers DMG SGB and CGB When STOP mode is used all interrupt enable IE flags should be reset before execution of a STOP instruction Otherwise if an interrupt is generated during the period of oscillation stabilization HALT mode following STOP mode cancellation HALT mode will immediately be canceled preventing a stable system clock from being provided 2 4 5 Using Paired Registers Required Covers DMG SGB and CGB With instructions that use paired registers BC DE and HL such as the following there is some chance that OAM RAM may be destroyed Therefore ensure that these paired registers are not set to a value in the range OxFEO0 OxFE9E INC 55 SS DE HL DEC ss LD LD LD LD HLD A 2 4 6 Using the HALT Instruction Required Covers DMG SGB and CGB When using a HALT instruction always add an NOP instruction immediately after the HALT instruction Not adding the NOP instruction may in rare cases cause the instruction after the HALT instruction not to be executed 251 Game Boy Programming Manual 2 4 7 Switching the CPU Operating Speed Recommended Cover
121. e 0x70 OxOF When setting score data using symbols assemble after defining the equal statement according to the table above 195 Game Boy Programming Manual Interval Data Intervals for 6 octaves can be set here Depending on the sound however high sounds may not be heard The following table shows the correspondence between code settings and intervals Please refer to this table when setting an interval C Interval symbols 0x01 0xB50 Codes 0x81 0xC7 tie OxC8 rest OxC9 When score data is set using symbols assemble after defining the equals statement Octave 0 m terva NIN Octave 11 10 11 10 10 x95 Octave Interva 20 21 20 21 20 20 21 20 196 Octave 3 D30 31 30 F30 1 Chapter 7 Super Game Boy Sound 0 1 0xC6 Note 1 A value of 1 in the right most position of the interval symbol indicates a is represented as the 7 of one interval lower Example coi c for interval 0 Note 2 When specifying a tie first set the step time length and velocity gate time This can be skipped if unchanged from the previous sound A tie cannot be used at the start of a block Note 3 When specifying KYU a rest first set the step time length This can be skipped if unchanged from the previous sound Settings Example Length Gt amp Vel Interval Code db 024 P
122. e 1 Packet type 01 Initialization and connection packet 02 Print instruction packet 04 Data packet 08 Break packet OF NUL packet Byte 2 In the case of a data packet indicates compression no compression If another type of packet fixed at 0x00 Bytes 3 and 4 Data volume 2 bytes number of bytes of data Data in Game Boy character data format Print instruction data 2 bytes of data representing the sum of the header all data in the data portion of the packet 2 bytes of dummy data used to obtain status information from the printer In the data received from the printer in place of the dummy data byte 1 holds the peripheral device number and byte 2 holds the printer status 234 Chapter 9 Pocket Printer 3 2 Receiving from the Printer The printer returns 2 bytes of status data Byte 1 Device number 000007 0o o7 The value of the MSB is always 1 The lower order 7 bits represent the device number The Pocket Printer is device no 1 Byte 2 Status a LowBat 1 Low battery error bit 0 Battery OK ER2 1 Other error ER1 1 Paper jam abnormal motor operation ERO 1 Packet error Untran 1 Unprocessed data present No unprocessed data present Full 1 Image data full 0 Image data not full Busy 1 Printer busy 0 Printer ready oum 1 Checksum error 0 Data OK otatus information is sent in reply to each 2 bytes of dummy data sent by the Game Boy The status returned by the
123. e Address Bit T 5 4 3 2 1 0 CRUS Pad ET P4 4 Input Forts E P42 P43 P44 P415 Output Ports Approximately 16 ms is required to switch from normal to double speed mode and approximately 32 ms is needed to switch from double speed to normal mode In double speed mode the DIV register OxFFO4 and the TIMA register OXFFO05 both operate at double speed Battery life is shorter in double speed mode than in normal mode The use of double speed mode requires the corresponding mask and MBC 35 Game Boy Programming Manual Flow of Switching when switching to double speed mode In case the CPU operating speed needed to be switched the current speed should always be checked first using the speed flag bit 7 of the KEY 1 register This ensures that the speed will be switched to the intended speed Read the speed flag Bit 7 of register Key 1 Speed flag 0 Enable speed switching Set bit O of register Key 1 Reset interrupt request register IF Reset interrupt enable register IE Set bits 4 and 5 of the P1 port register to 1 Execute STOP instruction Switching Routine example LD BIT JR SET XOR LD LD LD LD STOP NEXT HL KEY1 7 HL NZ NEXT 0 HL A IF A IE A
124. e Ifthe BG character data is allocated to 0x8000 0x8FFF this data shares an area with OBJ data and the character dot data that corresponds to the CHR codes is also the same means of bank switching can store twice the amount of character data LCD display RAM that DMG can store In this case both Bank 1 and Bank 0 have the same mapping as the area in DMG 47 Game Boy Programming Manual Character Code Mapping With BG character data allocated to 0x8800 0x97FF Data CHR Code Address Bank 0 Shade Lower Bank 1 CGB only 76543 210 Shade Upper X00 0x8000 OBJ Code OBJ Code 000 1 00 0 800 Dot Data Dot Data X01 0x8010 OBJ Code OBJ Code 001 4 01 0 801 Dot Data Dot Data X80 0x8800 OBJ Code amp BG OBJ Code amp BG Code Code 0x880F 080 Dot Data 1 80 Dot Data X81 1 8 0x8810 OBJ Code amp BG OBJ Code amp BG Code 081 Dot Code 0 881 Data 181 Dot Data Area Shared by OBJ and BG XFE Ox8FEO OBJ Code amp BG OBJ Code amp BG Code OFE Dot Code 1FE Dot Ox8FEF Data Data XFF Ox8FFO OBJ Code amp BG OBJ Code amp BG Code OFF Dot Code 1FF Dot Ox8FFF Data 25202 Data X00 0x9000 BG Code ae 5 100 000 Dot X Data X7F Ox97F0 BG Code BG Code 07F Dot 17F Dot Ox97FF R Data Data he case of 8 x 8 dots block for both BG and OBJ CHR Codes lt DMG gt lt gt OBJ 256 x 1 OBJ 256 x 2 BG 256 x 1 BG 256 x2 Note Because bank swit
125. e color palettes for BG and OBJ are independent of one another 2 1 Color Palettes Eight palettes each are provided for BG and OBJ Each palette consists of 4 colors and is specified by the display dot data 2 bits Palette data numbers 0 3 The color palettes represent each color with 2 bytes with 5 bits of data for each color of RGB 32 768 displayable colors Color Palette Color Palette L T 5 4 3 2 1 0 T 5 4 3 2 1 0 uci ZI GREEN data e PE ALUE data 2 2 Color Palette Composition 1 BG Color Palettes Color Palette No Palette Data No Color palette Color palette LOO 0 Color palette Color palette LOI 1 Color palette 0 Color palette 02 Color palette L02 2 Color palette Color palette L03 3 Color palettes 1 7 2 OBJ Color Palettes OBJ color palettes have the same composition as shown in the figure above 65 Game Boy Programming Manual 2 3 Writing Data to a Color Palette Data is written to color palettes using the write specification and write data registers The lower 6 bits of the write specification register specifies the write address When data is written to the write data register the data will be written to the address specified by the write specification register If the highest bit of the write specification register is set to 1 the write address is then automatically incremented to specify the next address The ne
126. e operand n Mote however that a 16 bit address should be specified far the mnemonic portion af n because only the lawer arder bits are automatically reflected in the machine language Example To load data at OxFF34 into registers type the following LD FF34 Typing ony LO 34 would cause the address to be incorrectly interpreted as 0034 resulting in the instruction LO 0034 Loads the contents af register to the internal RAM register ar made register atthe address in the range OxFFOO OxFFFF specified by the 6 bit immediate operand n Mote however that a 16 bit address should be specified far the mnemonic portion of n because only the lower order 8 Bits are automatically reflected in the machine language Example To load the contents of register OxFF 34 type the following LD FF34 Typing only LD 34 would cause the address ta be incorrectly interpreted as 0034 resulting in the instruction LO 10034 cr H H I hew 541 Edu 11 111 010 Loads inta register the contents of the intemal RAM ar register specified by 16 bit immediate operand nn Example LO xFF44 LY LD Ux8U000 0x000 87 Game Boy Programming Manual Loads the contents of register to the internal RAM ar register specified by 16 bit immediate operand Example LO OxFFad oe LD 0 9000 A 0 9000 A H CCL c
127. e to walk off the edge of a platform and stand in midair Referring to the Nintendo Control Pad or Control Stick by an unacceptable term such as directional control etc Referring to the Nintendo Controller by an unacceptable term such as joystick etc Referring to the Nintendo Game Pak by an unacceptable term such as Game Cassette etc Referring to the Game Boy Game Link by an unacceptable term such as Video Link etc Note f Licensor approval is required please assure that this has been finalized before the software submission has been made 2 9 Game Boy Programming Manual 7 A NOTE ON OBJECTIONABLE MATERIAL A copy of the Nintendo Game Content Guidelines is included at the end of this document If you are unsure of whether an item of text or element of a game is within Nintendo Software Standards you may contact our Engineering Department early in the development process and they will discuss questionable items over the phone In cases concerning an extensive amount of text please send it to the attention of NOA Product Testing Supervisor at the address listed in below with the questionable items highlighted The material will be evaluated and you will be contacted within a week to ten days Nintendo of America Inc Attn Product Testing Supervisor 4820 150th Avenue NE WA 98052 Phone 425 861 2674 Fax 425 882 3585 280 Appendix 3 Software Submissio
128. e to apply to SGB color HIGH The system color palettes selected are palettes 000 511 Number of the system color palette applied to SGB color palette 1 Chapter 6 The Super Game Boy System d7 do Specifies the attribute file ATF number 0x00 0 2 0 No change 1 Cancels masking after the data is set 0 Not specified 1 The specified attribute file number OxOF should be filled with 0x00 153 Game Boy Programming Manual Command PAL TRN Code 0 0 Data Transfer using VRAM Function Transfers color data to the system color palette d7 dO 1 p Number of packets Ox1 fixed Command code OxOB The 4 Kbytes of SGB RAM data immediate following the command is handled as system color palette data and stored in SUPER NES WRAM as data for system color palettes 000 511 The format of data storage in SGB RAM is as follows 7 Byte 1 p System Color Palette 000 bit 00 color code LOW System Color Palette 000 bit 00 color code HIGH System Color Palette 000 bit 01 color code LOW System Color Palette 511 bit 10 color code LOW Lo _ System Color Palette 511 bit 10 color code HIGH p System Color Palette 511 bit 10 color code LOW Byte 4096 System Color Palette 511 bit 10 color code HIGH The storage addresses are 0x3000 OxSFFF 154 Chapter 6 The Super Game Boy System Command ATRC EN Code 0x0C Function Enables and disables a
129. e use only those characters listed in the provided table when registering a game title The game title registered should be close to the title under which the game will be marketed Please do not register a tentative name which is used for development Game Code 013FH 0142H otore the 4 character game code assigned by Nintendo using ASCII code from the table used in item 3 Please use only upper case letters listed in the provided table when registering a game code Example When the Game Code is APCu the following codes would be stored 41H A 5 Address 013FH 50H P gt gt Address 0140H 43H C gt gt Address 0141H 4AH J gt Address 0142H This requirement only applies to new titles If the program is changed and a master ROM resubmitted for a game title which has already been marketed it is not necessary to insert a game code for this submission If the Game Code is added to an existing game please be aware of potential problems with software verification routines in serial communication protocols or GB Pak routines For example the Game Titles for the old version and the new version MAY be different causing the new version to be unrecognized by the software verification routine 289 Game Boy Programming Manual 5 Support Code 0143H otore the code which distinguishes between games that are CGB Game Boy Color compatible and those that are not Address 143H CGB Incompatible BH _ CGB Co
130. e used to determine which interrupt was requested The 5 types of interrupts are as follows T Interrupt starting f P can be selected see STAT register Vertical blanking 1 0x0040 Mode 00 Mode 01 LCDC status interrupt 0x0048 Mode 10 LYC LY consist Timer overflow 0x0050 Serial transfer completion 0x0058 P10 P13 input signal goes low 0x0060 When multiple interrupts occur simultaneously the IE flag of each is set but only that with the highest priority is started Those with lower priorities are suspended 26 Chapter 1 System When using an interrupt set the IF register to O before setting the IE register The interrupt process is as follows 1 When an interrupt is processed the corresponding IF flag is set 2 Interrupt enabled If the IME flag Interrupt Master Enable and the corresponding IE flag are set the interrupt is performed by the following steps 3 The IME flag is reset and all interrupts are prohibited 4 The contents of the PC program counter are pushed onto the stack RAM 9 Control jumps to the interrupt starting address of the interrupt The resetting of the IF register that initiates the interrupt is a hardware reset The interrupt processing routine should push the registers during interrupt processing When an interrupt begins all other interrupts are prohibited but processing of the highest level interrupt is enabled by controlling the IME and IE flags with instructions Return fro
131. ecify a value of 1 or greater for the number of feeds before printing and 3 or greater for the number after printing Otherwise problems can arise such as double printing twice on a single line or failure of the last line of print to reach the paper cutter 5 6 Point of Caution During Debugging Recommended There are two types printers each made by a different manufacturer Seiko Instruments and Hosiden As part of final debugging the program should be checked with at least one printer of each type 5 7 Sample Program Provided by Nintendo Recommended Modifying the program to suit the intended use is permitted However in creating the original program values for timing and other parameters were calculated to allow normal operation These parameters must therefore be carefully considered when modifying the program 257 Game Boy Programming Manual 6 PROGRAMMING CAUTIONS FOR U S PROGRAMMERS If you are unable to verify that the system is a Super Game Boy and the Accumulator returns the same value if the game is inserted in the Super Game Boy or original Game Boy hardware follow the instructions below If your game is Super Game Boy SGB enhanced then you just need to use the MLT_REQ function Otherwise you must use the SGB libraries to verify if the game is in an SGB These libraries are located in the CGB files section of Wario World under SGBlib zip You will need to call the SGBCHK function from these libraries right after t
132. ed 1 z 1 D A HL Ae HL a Ae toa 00 101 010 HL HL 1 Loads register A the contents of memory specified by the contents of register pair HL and simultaneously increments the contents af HL Example When HL xTFF and 0x56 LO A Ae 0x56 HL 05200 T cy H H D faeo LEER HL HL 1 Loads in register the contents of memory specified by the contents of register pair HL and simultaneously decrements the contents af HL 1 54 1 D 111 010 Example When HL xSASC and xSAS5C LD A A x3C HL x8 5B cy CCL T 4 zit H H I 1 D BC BC 00 000 040 Stores the contents af register in the memory specified by register pair BC Example When BC 0x205F and x3F LO BC xZ sF CCL T 4 zit CT H H 1 D DE DE bebe els 00 010 Stores the contents of register in the memory specified by register pair DE Example When DE xzl s5c and A 0x00 LO DE 02050 Chapter 4 CPU Instruction Set cT H H r 1 10 LD HL HL ale kela 00 100 010 HL HL 1 Stores the contents af register in the memory specified by register pair HL and simultaneously increments the contents af HL Example When HL OxFFFF and A 0x56 LD HL A UXFFF Fi 0x56 Ox0000 CTCL T Z 4 lt it
133. ed by the original SGB system program for writing keypad data from controller 1 The SUPER NES program can use the controller reading routine of the program to receive data written to this register 176 Chapter 6 The Super Game Boy System 4 4 Flowchart of Initial Settings Routine 1 for completion of intial S GB Settings Operating OMG ht Bii L DizdnguEkh Operating SSB or SGB2 bask with Initial settings for operation Send initial data Send SOU TRA default data Command iEsuedto send data that use Other commands alza issued Wat until initial screen complateh displayed Cancel WAS masking Sent when 500 TRA used hain Routine 177 Game Boy Programming Manual 5 PROGRAMMING CAUTIONS 5 1 ROM Registration Data To use SGB functions system commands the following values must be stored at the ROM addresses indicated 5 2 Initial Data When writing programs that use the system commands of SGB and SGB2 use the initialization routine of the x1464 4 0x03 and 0x14B 0x33 game program to send the following 8 packets of default data to the register file INIT 1 INIT2 INIT4 INIT5 6 INIT7 INIT8 DEFB DEFB DEFB DEFB DEFB DEFB DEFB DEFB 79 50 08 00 08 8 00 4 60 00 00
134. ed in the DMG window The corresponding commands are as follows 00 01 02 03 04 05 06 07 16 Code value 166 Chapter 6 The Super Game Boy System 3 3 Cautions Regarding Sending Commands e After each packet 128 bits is sent 0 must always be sent in bit 129 e fa data sequence covers more than 1 packet byte 1 of each packet after the first is a continuation of the data of the previous packet e 0x00 is written to the unused areas in each packet e Note that there are two modes of data transfer register file mode and a mode in which 4 Kbytes are tranferred using SGB RAM Controller key input should not be read while a command is being sent 3 4 Sound Flag Summary e Pre loaded sound effects A and B can be played simultaneously using system commands e he sound effects are formants primarily action sounds and the B sound effects are looping sounds primarily ambient sounds e The interval frequency for these sound effects can be set to 4 levels e Changing the interval A allows a completely different sound effect to be obtained with the same sound source In addition the volume can be set to 3 levels 167 Game Boy Programming Manual 3 4 1 Sound Effect A Flags SOUND Command 0x01 d7 dO bit 0x03 d1 dO bit oer Ox11 JjStriking sound attack 91 1 90 0 0 12 Striking sound attack B 91 1 90 0 Air sucking sound 91 1 40 0 Rocket launchers 91 1
135. ediately following this command are transferred to WRAM as attribute files The capacity of each attribute file is 2 x 20 x 18 8 2 90 bytes Thus 45 attribute files occupy 4 050 bytes OxATFO OxATF44 The ATF data format 90 bytes total written horizontally from the left edge of the DMG window Byte 1 Byte 2 d7 d6 d5 d4 d3 d2 01 40 d7 d6 d5 d4 03 42 01 00 Byte 6 Byte 7 d7 d6 d5 d4 d3 d2 01 40 d7 d6 d5 d4 43 42 01 00 Byte 81 Byte 82 07 46 d5 d4 d3 d2 d1 d0 7 46 45 44 d3 d2 d1 d0 Byte 86 Byte 87 07 46 d5 d4 d3 d2 di dO 7 46 45 44 d3 d2 d1 d0 The figure depicts a DMG window with 20 x 18 characters 163 Game Boy Programming Manual Command ATTR SET Code 0x16 Function Applies the specified attribute file to the DMG window d7 dO 0x00 1 0 1 1 0 1 Number of packets 0x1 fixed Command code 0x16 Specifies the attribute number 0x00 0x20 0 Not changed 1 Cancel masking after attribute file transfer 0x02 OxOF filled with 0x00 164 Chapter 6 The Super Game Boy System Command MASK EN Code 0x17 Function Masks the DMG window d7 dO 0x00 1 0 1 1 100 1 L BEEN Number of packets Ox1 fixed BEEN Command code 0x17 d7 dO cote eR EEL loa Cancels masking 01 Freezes the screen immediately before masking No transfers to SUPER NES VRAM are performed from after the command i
136. el with Battery Use If the battery that powers the motor Size AAA alkaline battery wears out the perceived vibration level will be reduced even if the requested vibration level remains the same Therefore rumble operation should be checked both when the battery is new 1 6 V and when itis at the end of its life 1 1 V 5 7 Physical Effects of Vibration on the Body Users have occasionally experienced numbness for some time after continuous vibration lasting several tens of seconds to several minutes This may occur regardless of the strength of the vibration see Section 5 5 2 Vibration Pulse Examples Unfortunately the effects of continuous vibration on the body are not yet clear Thus the guidelines presented in Section 5 6 5 Limiting the Period of Continuous Vibration are intended to give priority to user safety However software development requires free thinking and original ideas and there may well be cases in which the use of continuous vibration in a game is desirable Because each game is different the limitations presented in Section 5 6 5 are by their nature not restrictions that should be enforced digitally It is instead preferable for the developer to adequately consider user safety when determining the game s content For example even supposing that continuous vibration does last for more than 1 minute it may not pose a safety problem if it is used infrequently such as only when special events occur Conversely if v
137. es of MBC5 programs on DMG and CGB oet the bank switching area 0x4000 0x7FFF to Ox1FF LD A SFF LD 2000 A setting LD A 01 LD 3000 A 1 setting Set the external expansion memory area 0xA000 0xBFFF to OxOF LD LD 4000 A RAMB setting LD A 0A LD 0000 Enable access to RAM RAM Access Processing LD A 00 LD 0000 Disable access to RAM 224 Chapter 8 Game Boy Memory Controllers MBC 5 MBC5 WITH RUMBLE FEATURE 5 1 Overview This cartridge is the same as the previous MBC5 cartridge but also includes a rumble motor and size AAA battery to power the motor The motor is controlled by the program using the MBC5 RAM bank register RAMB bit 3 MBC5 supports CGB normal and double speed modes Up to 64 Mbits 512 banks of 128 Kbits each of ROM and 256 Kbits of RAM 4 banks of 64 Kbits each can be used 5 2 Registers Addresses hex RAMG Q000 1FFF FFF Edd ROMB 0 2000 2FFF ach register executes contro ROMB 1 3000 3FFF using any one of the address spaces at left RAMB 4000 5FFF 225 Game Boy Programming Manual 5 3 Memory Map Maximum of 256 Kbits Banks 0 3 4 Set by register Accessible only when RAMG is 0x0A CPU Address OxFFFF Unit Registers OxEO00 Internal RAM RAM Bank 1 0 000 Expansion Working RAM Bank 0 Soke 77
138. es the results in register A r n and HL are used for operand s Examples When A x3B x4F H 0x24 and 1 SAC AH Ae 010 4 0 OU Ne SAC 034 Ae 0x00 Z1 H0 Nei CT 0 SAC amp OEB z 0 H 1 M 1 CY 1 CY H H I CCL 1 sears jphjpr _ Takes the lagical AMD for each bit af the contents of operand s and register and stores the results in register A r n and HL are used for operand s 93 Game Boy Programming Manual Examples When Az L x3F and 0x0 AMD L Z 0 H 1 C Y 0 AMD Oxse Neo AMD N0 cri C H H I CCL T 541 2165 Takes the logical OR for each bit af the contents of operand s and register and stores the results in register r n and HL are used for operand s Examples When Az 0x54 UxL F OR A OR 3 0 OR Ae Z 0 H H I CCL T E 541 2 1G Takes the logical exclusive OR for each bit af the contents of operand s and register A and stores the results in register n and HL are used for operand s 94 Chapter 4 CPU Instruction Set Examples When Az and A 0x00 Z 1 AUR Ux F amp OxFO Z 0 AUR cr H H BRE Compares the contents af operands and register and sets the flag if thiey are equal r
139. ess 2 Ox1FFFFF Bank Ox7E OxDFFF Internal Working RAM 0xC000 Expansion Working Ox183FFF 0xA000 RAM Bank 0x60 Unusable 0 180000 Display ae RAM 0 8000 0 10 Bank 0x40 ee Unusable 0x100000 Program E Switching 5 dias Bank 0x21 Ox083FFF Bank 0x20 7 Unusable 0x4000 0x080000 Program Residence ea 0x008000 000000 214 Bank Ox1F Bank Ox1E ROM Address 7FFFFH 0x18000 0 14000 0 10000 OxOCOOO0 0 08000 0 04000 0 00000 If accessed the Bank 0x61 image appears If accessed the Bank 0x41 image appears If accessed the Bank 0x21 image appears Chapter 8 Game Boy Memory Controllers MBC 2 MBC2 2 1 Overview Controller for up to 2 Mbits 256 Kbytes of ROM with built in backup RAM 512 x 4 bits 2 2 Description of Registers Register 0 5 gate data serves as write protection for RAM Write addresses 0 000 Write data OxOA Writing OxOA to 000 OxOFFF causes the CS to be output allowing access to RAM Register 1 ROM bank code Write addresses 0x2100 0x21FF Write data 0 01 0 The ROM bank can be selected 2 3 Memory Map CPU Address ROM Address oxbFFF Internal B Bank OF Working Hr RAM 4 hi Bank OE 512x4Bit a ONES External Expansion Backup RAM RAM Display 2 Bank 6 0x8000 0 18000 Program
140. esult is the pre calculation value X t 2 X t 1 However if n 2 0 shifting does not occur and the frequency is unchanged Sweep time ts Frequency varies with each value of ts 000 Sweep OFF 001 ts 1 f128 010 ts 2 f128 011 ts 3 f128 100 ts 4 f128 31 3ms 101 ts 5 f128 110 ts26 f128 111 ts 7 f128 f128 128Hz Example When NR10 0x79 and the default frequency 0x400 the sweep waveform appears as follows NE 11 7 13 3 7 8ms ns 7 3 6ms 54 7ms 54 7ms 54 7ms Note When the sweep function is not used the increase decrease flag should be set to 1 subtraction mode 12 Chapter 3 Sound Functions Mame Address Bit 5 4 a 2 1 ME11 FF11 RAN Only the shaded portion be read Sound Length ti 0 to 53 Wavetorm Duty Cycle Sound length 64 t1 x 1 256 sec Waveform Duty Cycles 00 12 5 01 2595 10 5096 11 7596 Address Bit 5 4 a 2 1 Length af Envelope Steps Envelope 0 Attenuate decrease 1 Amplify increase Default Envelope value Length of Envelope Steps Sets the length of each step of envelope amplification or attenuation Length of 1 step Nx 1 64 sec When 0 the envelope function is stopped Default Envelope Value 0000 to 11119 16 step levels can be specified using the 4 bit D A circuit Maximum is 11118 and 0000 is the mute setting
141. exact same place as where the first tape left off 4 No codes or built up characters are allowed 5 Alllevels or areas must be completed in succession 6 Screen text must have correct grammar and spelling 7 No deviations from NOA Software Standards Policy may be present 8 The entire ending credits if any must be shown 9 If the product has been rated by the ESRB then a copy of the rating certificate must accompany the submission and no videotape is needed 5 LICENSING SCHEEN INFORMATION PASS FAIL GUIDELINES The following Licensing information should be included for all software This can be displayed on one 1 or two 2 screens 1 Licensee s software title 2 Licensee s trademark and copyright notice 19 Licensee s name or copyright owner 3 LICENSED BY NINTENDO Example Tom s Golf or 1992 ABC Corporation LICENSED BY NINTENDO If a blank screen appears for more than two seconds when powered up Nintendo suggests placing a message or graphic on the screen so that consumers do not think their game is inoperable e g Please Wait If a blank screen appears for more than five seconds during game play a message or graphic should also be placed on the screen 2 8 Appendix 3 Software Submission Requirements 6 COMMON PROBLEMS Some possible problems that may prevent approval of your software include but are not limited to the following iW UO I ie c x 19 20 21
142. example shows how to perform a DMA transfer of 40 x 32 bits from the expansion RAM area 0xC000 0xCO9F to OAM OxFEO0 OxFE9F During DMA the CPU is run using the internal RAM area OxFF80 OxFFFE to prevent external bus conflicts 1 The program writes the following instructions to internal RAM OxFF80 OxFFFE Address Machine Code Label Instruction Comment FF80 3E CO LD A 0COH EO 46 LD DMA A C000 CO9F OAM 3E 28 LD A 40 160 wait 3D L1 DEC A 20 FD JH NZ L1 C9 2 Example of program that writes the above instructions to internal RAM starting from OxFF80 Label Instruction LD C 80H LD B 10 LD HL DMADATA L2 LD A LD C A INC C DEC B JH NZ L2 DMADATA DB OEOH 46H 28H 20H OFDH OC9H 60 Chapter 2 Display Functions 3 When the DMA transfer is performed the subroutine written to internal RAM shown in Step 1 above is executed CALL OFF80H DMA transfer The preceding program is used for DMA transfers performed within routines for processing interrupts implemented by vertical blanking In all other cases however the program written to internal RAM should be as shown below to prevent interrupts during a transfer Address Machine Code Label Instruction Comment FF80 F3 DI Interrupt disabled 3E CO LD A 0COH 46 LD DMA A C000 CO9F 0AM 3E 28 LD A 40 160 cycle wait 3D L1 DEC A 20 FD JR NZ L1 FB EI Interrupt enabled
143. f colors in the background BG and the number of colors in the objects OBJ Simultaneous Colors Because CGB hardware automatically colorizes monochrome games with up to four colors in the BG palette and up to six colors for two OBJ palettes three colors per palette a game typically must display more colors than this automatic colorization to be considered a CGB game Appropriate use of Color Objects in the game that are based on reality trees rocks animals and so on should be a color that we would normally associate with them For fictional objects colors should be chosen to show appropriate detail and when needed to differentiate unlike objects Variety of Colors The CGB is capable of producing a wide range of colors 32 768 to be exact albeit not all at the same time A CGB game should use this capability of the hardware to yield distinctly different colors for objects characters areas and so on Contrast amp Saturation Two of the elements that make a game look colorful are high contrast and saturated or vibrant colors Pastel colors on a white background will not seem nearly as colorful as the same colors on a dark background Not every game can use a dark background but the intensity of the colors should still be maximized as much as possible Please detail or demonstrate how your game will utilize color capabilities of the CGB Use whatever means will best allow you to do so such as artists renderings prog
144. g to the source list Musical pieces should be produced according to the instructions in Section 3 7 Cautions Regarding Production of Musical Pieces Convert to the file format described in Section 3 8 Format for Transferred Files Summary of Play Data Codes 0x00 Part end code 0x10 0x7F Note rest length data amp VELOCITY volume GATE TIME 0x80 0xC7 Interval sound length data 00 50 01 50 in SGB 0xC8 Tie TIE OxC9 Rest KYU OxCA OxDF Use prohibited OxEO OxF9 opecial symbols OxFA OxFF Use prohibited 201 Game Boy Programming Manual 3 7 Cautions Regarding Production of Musical Pieces The echo parameters set in BGM are applied in the same manner for the A and B sound effects This is because echo is applied equally to all 8 channels The parameters have been tuned so that they can also be used with BGM so please note this when resetting the parameters score Data Settings Echo Channel Echo Volume L Echo Volume H Symbol Symbol If echo is not used specify e o f special symbol instead of e c v If a value greater than 2 is specified for Echo Time the sampling data will be destroyed Up to 15 tunes can be registered 0x01 OxOF Channels 2 and 3 are allocated for BGM so these channels should be used for regular playback of BGM parts Microtuning of source data used for notes should be specified using the tun code with the score data For tuning values refer to the recommended tun
145. gnal is input to the RESET terminal with a P13 P10 terminal in the LOW state 2 4 2 Divider Registers Marne Address Bit T 5 4 3 2 1 0 P oue ff 8192 Hz AA A a 121 4096 Hz tien LUE 2211 2048 Hz mr PERSONEN TELE 1024 HZ 11212 512 Hz DERI UNTERE NURSE HORE 1214 255 Hz CR t Ln EAE 11218 128 Hz M 1 2 5 64 Hz The upper 8 bits of the 16 bit counter that counts the basic clock frequency f can be referenced If an LD instruction is executed these bits are cleared to 0 regardless of the value being written f 4 194304 MHz 24 Chapter 1 System 2 4 3 Timer Registers Address Bit T 5 4 B 2 1 The main timer unit Generates interrupt when it overflows Address Bit T B 5 4 3 2 1 The value of TMA is loaded when overflows Address Bit T 5 4 3 2 1 0 eum Input Clock Select Timer stop 0 Stop timer 1 Start timer Input Clock Select 00 210 4 096 KHz 01 24 262 144 10 28 65 536 KHz 11 1728 15 384 The timer consists of TIMA TMA and TAC The timer input clock is selected by TAC TIMA is the timer itself and operates using the clock selected by TAC TMA is the modulo register of TIMA When TIMA overflows the TMA data is loaded into TIMA Writing 1 to the 2 bit of starts the timer The timer should
146. grayscale x 8 dots vertically 243 Game Boy Programming Manual 9 COMPRESSION ALGORITHM Compressed data essentially consist of control codes specifying the data type and length and the actual data Control code 1 raw data Control code 2 loop data Control Code Control Code Control Code Control Code Control Code RAW Data RAW Data Loop Data Loop Data Loop Data Control code 1 Raw data Ox7F Next 0x80 bytes are raw data Ox0 0x7E Next lt 1 data items 0x01 0x7F are raw data 2 Control code 2 Loop data OxFF Repeat the next 1 byte of data for 0x81 bytes 0x80 OxFE Repeat the next 1 byte of data for 2 80 0x80 FE items Example 0 10 bytes of raw data 0x80 bytes of raw data 0x81 items of 0x55 0x02 items of OxAA 244 Chapter 9 Pocket Printer 10 HARDWARE SPECIFICATIONS 10 1 General Specifications e Printing method Thermal serial dot e Print direction Left to right facing direction of paper feed e Total dot count 16 x 160 H x W line e Dot pitch 0 165 mm x 0 167 mm H x W e Dot dimensions 0 14 mm x 0 164 mm H x W e Paper feed pitch 2 64 mm e Print width Approximately 6 6 mm e Printing speed Approximately 1 1 lines sec 10 2 Dimensions and Weight e Dimensions 72 2 mm x 139 5 mm x 56 0 mm W x D x H e Weight Approximately 190 g not including battery 11 MISCELLANEOUS 11 1 Cautions when Debugging The printer comes in two type
147. h as numbness as a result of continuous vibration limit the duration of continuous vibration as indicated below regardless of the vibration strength e limit the duration of continuous vibration to 1 minute e lf the nature of the game makes longer periods of continuous vibration unavoidable limit these periods minutes 3 3 6 Rumble Feature Selection Recommended The user should be allowed to set the rumble feature to ON or OFF or to select strong mild or OFF by means such as an initial settings screen at the start of the game In addition the program should allow the user to easily change these settings even during a game if for example they are uncomfortable with the vibration Such changes also should be allowed a pause 3 3 7 Changes in Vibration Level with Battery Use Recommended If the battery that powers the motor size AAA alkaline battery wears out the perceived vibration level will be reduced even if the requested vibration level remains the same Therefore rumble operation should be checked both when the battery is new 1 6 V and when it is at the end of its life 1 1 V 255 Game Boy Programming Manual 4 SGB PROGRAMMING CAUTIONS 4 1 ROM Data Required To use the functions of SGB system commands the following values must be stored in ROM at the locations indicated 0 146 lt 0x03 Ox14B lt 0x33 4 2 Default Data Required When writing programs that use the functions of SGB use the initializ
148. he received header exceeds the number of data items to be received as determined beforehand by the receiver The routine also generates an error if the communication command value of byte 1 of the header is not Ox5A 42 Chapter 1 System 2 6 3 10 Communication Examples The following figure shows the flow of processing when errors occur during communication This should be used as a reference when implementing data communication Hardware Unit 1 Hardware Unit 2 Send status Heceive status Connector If connector not returned by receiver If status not returned from receiver Data 1 are re sent so caution is required If status is NG OK so data 1 are received OK so data 2 are received If status not returned from receiver Note that it is easy for sender to enter an endless loop If completion indicator is NG OK so both units end communication Finish Finish 43 Game Boy Programming Manual 1 Data 1 and Data 2 each represent 1 packet for transmission not including the connector 2 END signifies the packet used to indicate the completion of transmission not including the connector 2 6 3 11 Usage Notes When programming use of the infrared port please note the following When transmitting more than 256 bytes of data ensure that the receiver keeps track of which packet number is being received When a communication error status not returned even though data was received is
149. he Soft Reset label To use this function you must set the ROM Registration area for SGB 146h to 03 which allows access to the SGB REgisters Don t forget to readjust the Complement Check Also on the Software Submission sheet make sure you note that the game has a 03 in address 146 but in the remarks section explain that the game doesn t use any of the SGB features 258 Appendix 2 Register and Instruction Set Summaries Appendix 2 Register and Instruction Set 5 260 1 Control Register 260 2 5 Register 5 265 3 CPU Instruction Set 268 254 Game Boy Programming Manual APPENDIX 2 REGISTER AND INSTRUCTION SET SUMMARIES 1 CONTROL Ad 1 fuer t Fart F15 transfer data by 14 Transfer data 7 FO Serial transfer register 5 Ful In double Serial speed made control dock speed also doubled D Whith dear nomal bu LE Dnader instrudian Double speed F FE Timer unit Timer Operates at double speed in double speed mode F FOG Timer fartimer moduk TAC Frequency selection bit Ho makspeed Timer DO p2 10 2 EHI control 01 42 44 42 Double speed Tx
150. he system program be used by transferring music data Controller Functions e Data from multiple SUPER NES controllers data can be read providing for multiplayer games that can accommodate between 2 and 4 players Miscellaneous SUPER NES program data can be transferred 1 4 System Program The system program can provide the following features e Onthe T V screen the system program displays the space outside the game screen picture frame The picture frame has the following features e The frame can be selected from among 9 pre loaded frames e A mode in which an image created by the game producer is transferred and displayed as the frame e Adrawing mode that allows the user to create the frame Features of the color palette selection screen are as follows e Palettes can be selected from among 32 pre loaded palettes e A mode that allows colors to be set from DMG DMG games A mode is available that allows the user to arrange the colors on a palette A screen is provided for changing the key configuration of the controller 126 Chapter 6 The Super Game Boy System e fthe commands described in Section 3 2 in this chapter System Command Details are sent to the register file Super NES functions such as those described in Section 1 3 Functions can be used by having the system program read these commands 2 SENDING COMMANDS AND DATA TO SUPER NES The following 2 methods can be used to send data from a DMG program to
151. hese conditions Consequently to ensure proper data transmission from sender to receiver in Game Boy Color infrared communication signals are distinguished by the size of the interval between the rising edge of the pulse of one received signal to the rising edge of the subsequent received signal 37 Game Boy Programming Manual The following illustrates signals from a sender Double speed 25 53 units us Normal speed 0 signal sent 25 76 RP register 0 bit Double speed 36 66 Normal speed 1 signal sent 40 93 1 Double speed 50 65 Normal speed Synchronous pulses 99 132 1 Double speed 57 56 57 Normal speed Connected pulses 114 112 114 d Ld Scatter in the source oscillation of Game Boy Color produces slight individual differences 2 6 3 4 Preparing for Data Transmission and Reception To use infrared communication data reception must be enabled by setting bits 6 and 7 of Game Boy Color register RP to 1 However even with both of these bits set to 1 data cannot immediately be received After setting bits 6 and 7 to 1 atleast 50 ms should be allowed to pass before using the infrared port 38 Chapter 1 System 2 6 3 5 Transmitted Data When data is transmitted and received it is transmitted in packets Each packet comprises the 4 parts shown below and each part is sandwiched between synchronous pulses For more information see Section 2 6 3 7 Details of Data Transmission and Reception The dat
152. ibrations lasting several seconds to several tens of seconds are repeated at short intervals the effects on the user may be the same as with continuous long term vibration Thus the guidelines presented in Section 5 6 5 are not absolute restrictions However even if a program varies from these guidelines the following points should be considered minimum requirements and strictly observed Continuous vibration should not exceed 3 minutes for any reason e Because the effects of continous vibration vary from person to person the strength of these effects on the user should not be determined independently by the developer Rather this determination should be arrived at after considering the opinions of many others during debugging and other phases of development 230 Chapter 9 Pocket Printer Chapter 9 Pocket Printer 233 T seis ERREUR KEREEREREE KEINE MER YRRER E ER YE ERYENEREENERKEKEKKEKEKEEKEES 233 2 Communication Specifications 233 2 1 Bidirectional Communication eere cree erre nana aaa a nuts 233 2 2 Transfer Interval for Each 233 2 3 Packets and the Transfer Interval 233 2 4 Synchronism Check when Connecting 233 3 Communication Data Definitions
153. ing one line at a time each line consisting of 20 characters horizontally and 2 characters vertically and sending the number of compressed bytes in order beginning from the first line If the compressed lines exceed 0x280 bytes the non compressed data is sent as is mixture of compressed and non compressed packets If the extended data do not fill an entire line when the packets are processed the printer returns a packet error If an instruction to stop printing is received while print data is being sent an initialization packet can be sent instead of the next data packet One Game Boy screen of data is represented by 9 data packets However a data end packet can be sent even if the number of data packets sent is less than 9 In this case the printer will print only the number of lines received Line feeds can be performed by sending a data end packet with no data packet and issuing a print instruction The printer will then feed the number of lines indicated by the instruction Sending the following print instruction packet with a data end packet but no data packet would specify that 5 sheets be printed with 1 line feed before printing and 3 line feeds after printing and that the pre printing line feeds be ignored The number of line feeds performed would therefore equal the product of number of sheets to be printed and the number of post printing line feeds specified Thus in this example the number of line feeds would be 15 Exam
154. ings in Section 4 of this chapter SGB Sound Program Source List except for percussion instruments The recommended tuning values for this source list are based on an interval of C30 See Section 3 6 4 Interval Data Also indicated for each source data item is the score data setting interval code for producing sounds with a C30 interval Please refer to these settings in inputting score data In high and low areas the tuning of some source data may be somewhat off Whenever this occurs the tuning value must be modified For SGB all tunings are set 50 cents higher than the standard value A 440 Hz 202 Chapter 7 Super Game Boy Sound 3 8 Format of Transferred Data When Using NEWS 1 Copysgbt asm toanew transfer file filename asm sgbt asm yyy asm When making transfer files create them based on sgbt asm 2 Open yyy asm and modify it as follows Line No Before Changed After Changed 113 gft O2b00H gft yyy 115 include xxx dat include yyy dat When adding multiple tunes add them beginning from line 113 Also increase the number of include OOO dat statements after line 115 by the number of tunes 3 Execute the following command asm700 yyy asm The above completes creation of the yyy hex transfer file 4 Convert the yyy hex file completed in Step 3 to the format used by the SNES sound generator Converting to binary data 96 cat h2b start 400 b yyy bin Converting to hexadecim
155. ion When creating software to operate on CGB please give appropriate consideration to these differences When objects with different x coordinates overlap the object with the lowest OBJ NO is given display priority In CGB mode BG display CANNOT be turned off using bit 0 of the LCDC register address OxFF40 When objects with different x coordinates overlap the object with the smallest x coordinate is given display priority BG display CAN be turned on and off using bit O of the LCDC register address 40 When the value of register WX address OxFF4B is 166 the window is partially displayed When an instruction that register pair increment is used if the value of the register pair is an address that specifies OAM 0xFEO00 OxFE9F OAM be destroyed 118 Chapter 5 Miscellaneous General Information 6 SOFTWARE CREATED TO OPERATE ON CGB EXAMPLE When creating software for CGB a CGB support code is set in the ROM data area and processing branches according to the hardware used internally by the program For more information see the flowchart in Part 1 of Section 6 3 of this chapter Limiting the functions used as shown below allows the same processing to be used for different units without branching For more information see the flowchart in Part 2 of Section 6 3 of this chapter The following example describes how to create a program that operates on both CGB and DMG and allows display of
156. ion status The following section describes the details of communication status determination 2 6 3 8 Communication Status 0x00 Communication OK 0x01 Checksum error The results of the checksum calculated by the receiver do not agree with the checksum sent by the sender In the following cases the communication status cannot be returned to the sender even if an error is generated during communication no response from receiver The wrong communication protocol is used Data is transmitted using the wrong pulse width One of them is operating in double speed mode and the other is operating in normal mode Communication is affected by sunlight or obstruction of the signal light 9 9 2 6 3 9 Communication Error Processing If an error described above in Communication Status is generated the following error codes are returned by subroutine Error Description Checksum error same for sender and receiver 01 The results of the checksum calculated by the receiver and the checksum sent by the sender do not agree Pulse width error Generated by the receiver when the width of the pulse of the signal sent by the sender is too wide or narrow Generated by the sender when the width of the pulse of the signal sent by the receiver is too wide or narrow Communication error Communication prevented by other causes The subroutine provided by Nintendo treats as an error the case when the data value of the second byte of t
157. l communication DC DC converter for power source Sound amp Keys for operation gt Speaker Stereo headphone connector Input connector for external power source Types of Game Pak Supported 1 Game Boy Game Pak Software that uses only the Game Boy functions When used with Game Boy Color 4 10 colors are displayed 2 Game Boy Color Game Pak gt Game Pak supported by for use with both and gt Game Pak for CGB only software that runs only on Operating Modes the following modes apply only to CGB 1 DMG Mode when using software for DMG The new registers expanded memory area and new features for CGB are not used Color applications previously associated with palette data BGP OBPO and OBP1 are performed by the system Chapter 1 System 2 CGB Mode when using software supported or used exclusively by CGB The new registers expanded memory area and new features of CGB are available Note To operate in CGB mode specific code must first be placed in the ROM data area of the user program For more information see Chapter 5 Section 2 Recognition of CGB support CGB only in ROM Data Power Source Battery AC adapter Battery charger Accessories as of April 1999 DMG Accessories Communication Cable Battery Charger Adapter MGB CGB Accessories Communication Cable AC Adapter Battery Pack Charger Set The 6 pin serial communication subconnector a
158. le delay required e Read the data in the clock counter registers When writing values to the clock counters e Set data in clock counter register 5 4 cycle delay required e Set data in clock counter register RTC M 4 cycle delay required e Set data in clock counter register 4 cycle delay required e Set data in clock counter register RTC DL 4 cycle delay required e Set data in clock counter register 219 Game Boy Programming Manual 3 5 2 Condensation uses a crystal oscillator for its clock counter operation and condensation on the oscillator may halt its oscillation preventing the clocks from counting up Once the condensation disappears the clocks will resume counting up from where they stopped However please ensure that the counter stoppage does not result in a loss of program control 3 5 3 Control Register Initialization Although control registers 0 3 are initialized see Section 3 2 Description of Registers when Game Boy power is turned on they are not initialized by a hard reset of SNES when Super Game Boy is used Therefore please be sure to implement a software reset of these registers 3 5 4 Clock Counter Registers When commercial Game Boy software that uses MBC3 is shipped from the factory the values of the clock counter registers are undefined Therefore please ensure that these registers are initialized 220 4 MBC5 4 1 Overview Supports
159. m the interrupt routine is performed by the RET1 and RET instructions If the RETI instruction is used for the return the IME flag is automatically set even if a DI instruction is executed in the interrupt processing routine IF the RET instruction is used for the return the IME flag remains reset unless an EI instruction is executed in the interrupt routine Each interrupt request flag of the IF register can be individually tested using instructions Interrupts are accepted during the op code fetch cycle of each instruction 27 Game Boy Programming Manual 2 5 CPU FUNCTIONS COMMON TO DMG CGBO This section describes the CPU functions that have been enhanced in CGB Functions that are identical in DMG and are described in Section 2 4 CPU Functions Common to DMG CGBO CPU functions not available in DMG are described in Section 2 6 CPU Functions CGB only 2 5 1 Serial Cable Communication Address Bit T 5 4 a 2 1 G brt Shift Register r r Control Register SCK terminal 2 selection 0 Use external clack 1 Use internal clock becem eH Internal Shift Clack Switching Flag CSB anl 0 Select 8 KHz 16 KHz 1 256 KHz 512 KHz Frequencies in are in double speed mode Reemi n II e e ne Ie ene Serial Transfer start flag 0 serial transfer 1 Start serial transfer Holds 1 until transfer completes then automatically sets to 0 Note In DMG mode bit 1 of the SC register is set to
160. made to communicate with the slave during another interrupt the slave cannot receive the data until after the interrupt is finished If the next data is transmitted before the other interrupt is finished the slave will be unable to receive the initial data of the transmission 33 Game Boy Programming Manual 2 6 CPU FUNCTIONS CGB ONLY This section describes CPU functions that can be used only with CGB Functions that are identical in DMG and CGB are described in Section 2 4 CPU Functions Common DMG CGB For information on CPU functions enhanced in CGB see Section 2 5 CPU Functions Common to DMG CGB 2 6 1 Bank Register for Game Boy Working The 32 KB of Game Boy working RAM is divided into 8 banks of 4 KB each The CPU memory space 0xC000 OxCFFF is set to Bank 0 and the space 0xD000 0xDFFF is switched between banks 1 7 owitching is performed using the lowest 3 bits of the bank register SVBK If O is specified Bank 1 is selected Address Bit T 5 4 3 2 1 Blank specification D 1 Specify Bank 1 2 7 Specify Banks 2 7 Note This register cannot be written to in DMG mode 2 6 2 CPU Operating Speed The speed of the CGB CPU can be changed to suit different purposes In normal mode each block operates at the same speed as with the DMG CPU In double speed mode all blocks except the liquid crystal control circuit and the sound circuit operate at twice normal speed Normal
161. mpatible Exclusive CGB Incompatible A program which does not use CGB functions but operates with both CGB and DMG Monochrome CGB Compatible A program which uses CGB functions and operates with both CGB and DMG CGB Exclusive program which uses CGB functions but will only operate on a Game Boy Color unit not on DMG MGB If a user attempts to play this software on Game Boy a screen must be displayed telling the user that the game must be played on Game Boy Color 6 Maker Code 0144H 0145H Enter the 2 digit ASCII code assigned by Nintendo Contact Product Testing if in doubt All letters must be in upper case For example If Maker Code is 01 the ASCII code for 0 30H is stored at 0144H and the ASCII code for 1 31H is stored at 0145H If Maker Code is FF the ASCII code for F 46H is stored at 0144H and 0145H 7 SGB Support Code 0146H otore the Function Code for the game program Use the table below Game Boy will also run on Super Game Bo O3H Uses Super Game Boy Functions Note order to use Super Game Boy functions the following data must be registered 0146H 03H and 014BH 33H 290 Appendix 3 Software Submission Requirements 8 Cartridge Type 0147H otore the appropriate code for the type of cartridge Game Pak parts configuration being used Address 3 Backup 0147H 1 Battery ite aaa um M
162. n and HL are used for operand s CCL dli 21 a t I Examples WhernA UxZF and 0x40 CPA 4 0 Haei Nei 0 CP x3c 2 1 0 Nei 0 CPIHL 560 Had Nei CY 1 CY H H u CCL Bd 216 r 100 Increments the contents af register r by 1 Example When OxFF INC amp c 0 z2 1 H 1 M 0 CCL T cr H H ix Increment 1 the contents of memory specified by register pair HL 1 43 z 00 110 100 Example When HL 0x50 INC 0x51 Z 0 He 0 N H 54 1 z 16 Subtract 1 from the contents af register r by 1 Example When L 0x01 DEC L L0 zi H Nei 95 Game Boy Programming Manual cT H H r 54 1 z 1 DEC HL HL 1 fe fr fe fa 00 110 101 increments 1 the contents of memory specified by register pair HL Example When HL 0x00 DEC HL HL ze 0 H 1 M 1 96 Chapter 4 CPU Instruction Set 2 4 76 8 Anthinetic Operation Instructions H 1 1G ode Eph e m Adds the contents of register pair ss ta the contents af register pair HL and stores the results in HL ss codes are as follows Register Pair App HL Flag lt lt change Setifthere is a carry from bit 11 atherwise reset Rest zr Setit there is a car
163. n Requirements 8 SOFTWARE SUBMISSION CHECKLIST SOFTWARE SUBMISSION CHECKLIST MACHINE 1 sus mus GAME NAME COMPANY GAME CODE SNS NUS ir Fvaluation Approval Ver Specification Sheet 1 Set of ROMs MS DOS 3 1 2 Disk s Files must be in binary farmat 1 copy of Custom DSP IC if applicable Super HES submissions only 1 copy of VHS tapes ESRB Rating Certificate Screen Text PIU I ou LI Instruction Manual or Game Play Instructions REMARKS Note This checklist must be included with the software submission If any of the items are not satisfied the program will be promptly returned and will not be submitted into the approval process until all criteria are met 281 Game Boy Programming Manual 9 INSTRUCTIONS SOFTWARE SPECIFICATION SHEET 1 Game Title Print the planned name for the game You may use up to 11 characters 2 Game Code Print the product code designated by Nintendo Use CGB P for CGB dedicated soft ware software that will not operate on a conventional Game Boy Otherwise use DMG P 3 Language Indicate the primary language used for messages etc in the game 4 DMG Communication Mode Indicate whether the software has a function which uses an external expansion connector for Game Boy or Super Game Boy like a Game Boy communication cable 5 Software Type Indicate whether the game being submitted is DMG exclusive DMG CGB compati
164. ncy data f ee ae frequenoy FFAG Sound length 0 65 Sound length 9 1 012569 sec 00 125 10 50 rz Cow 01 25 11 7556 Initial erwebpe value Number of erivelape steps 0 7 iute when O00 Length of 1 step Initial value of hiainu when OOF Envelope function stopswhen MAJ OO sets to OF F when in DOWN mode FFAS Lowe ra rdera bits of frequenor data onder frequency data MRZ Higher onder 3 bits of frequency data Whith 11 bit tequency data f 410404 ee Tae FFAS Higher onder fother frequenoy data 265 Game Boy Programming Manual Sound length data 0 255 Sound length 2559 sec Output level 00 ute 10 1 2 01 11 14 Loue ponders bits affrequenay data Lone onder frequency data Higher ardaer 3 bits of frequenoay j data f Higher initiali With 11 bittrequency data 131KHz onder f He frequenay data ather F Ad 266 Appendix 2 Register and Instruction Set Summaries Register Address oz t6 e Di 10 Comment Any F F20 Sound length data 0 53 R Sound length 2587 sec 21 Initial O00 Number of envelope steps 0 7 Length of 1 step sec Initial value of OO Envelope Flirte when Envelope function stopswhen MAJ sets to
165. nd it corresponds to the length of the sound envelope The code corresponding to each sound envelope is shown in the following table Please use the appropriate code in the settings Note Length Note Length Note Length 18 48 oixteenth note Dotted eighth Al Half note note sixteenth note 12 36 Eighth note Dotted quarter Iul Whole note note Note For triplets and thirty second notes convert using the above values 194 Chapter 7 Super Game Boy Sound b Velocity volume gate time Velocity expresses the volume as a percentage Here it can be set to 16 levels using the lower order 4 bits dO d3 time expresses as a percentage the length that the sound is actually emitted It can be set to 8 levels using the higher order 3 bits d4 d6 Changing these values provides legato and staccato effects The following table lists the values defined by the SGB sound driver The settings are designated using the codes for the listed velocities VELOCITY and gate times GATE TIME MR CREER VELOCITY 010 VELOCITY 020 VELOCITY 030 VELOCITY 040 VELOCITY 045 VELOCITY 050 VELOCITY 055 VELOCITY 060 VELOCITY 065 VELOCITY 070 VELOCITY 075 VELOCITY 080 VELOCITY 085 VELOCITY 090 VELOCITY 095 VELOCITY 099 GATE_TIME 020 GATE_TIME 040 GATE_TIME 050 GATE_TIME 060 GATE_TIME 070 GATE_TIME 080 GATE_TIME 090 GATE_TIME 099 Symbol input example P99 V99 Code input exampl
166. nd the AC adapter input connector of the DMG hardware that preceded MGB are shaped differently than those of MGB and CGB Thus two types of accessories are available those exclusively for DMG and those exclusively for MGB CGB In addition a conversion connector is necessary for communication between DMG and 11 Game Boy Programming Manual 1 2 GAME BOY BLOCK DIAGRAM Battery LCD Panel Power Switch DC DC gt Power to LCD Driver Converter System External Power Source Terminal Headphone Terminal Speaker Display RAM DMG 64 Kbit CGB 128 Kbit 8 bit Infrared Microprocessor Communication only Work RAM DMG 64 Kbit 6 pin CGB 256 Kbit Subconnector Operating E Keys Game Boy Co co Hardware Unit Mask ROM Program SRAM Backup Game Pak Chapter 1 System 1 3 MEMORY CONFIGURATION In DMG and CGB the 32 KB from 0 0 to Ox7FFF is available as program area 0x000 OxOFF Allocated as the destination address for RST instructions and the starting address for interrupts 0 100 0 14 Allocated as the ROM area for storing data such as the name of the game 0 150 Allocated as the starting address of the user program The 8 KB from 0x8000 to Ox9FFF is used as RAM for the LCD display In CGB the amount of RAM allocated for this purpose is 16 KB 8 KB x 2 twice the amount allocated for the LCD display in
167. ned from receiver to sender 2 6 3 6 Flow of Data Transmission and Reception When data is transmitted and received both Game Boy Colors are first placed in receive status The one with the send indicator is then designated as the sender and the other one is designated as the receiver The flow of data transmission is shown below Connector Header Data Checksum Header Sender Connector Communication status 39 Game Boy Programming Manual 1 Sender transmits connecting pulse 2 The receiver calculates the width of the received connecting pulse If the value is correct the receiver returns the same connecting pulse to the sender 3 The sender calculates the width of the connecting pulse returned by the receiver If the value is correct the sender determines that a connection has been properly established 4 The header is transmitted 9 The data is transmitted 6 The checksum is transmitted The receiver returns the communication status to the sender 8 When communication is complete the header of the subsequently transmitted packet is set to 0x00 0x00 2 6 3 7 Details of Data Transmission and Reception Connector Indicates reading of the register RP Light emission fo foo Light detection Light Light detection AAAAAA NAAA AA AAA Sender The two Game Boy Colors perform initial data reception then the one designated as the sender e g by operations such as pressing button A begins transmi
168. ng a status interrupt in DMG or in CGB in DMG mode register IF should be set to 0 after the value of the STAT register is set In DMG setting the STAT register value changes the value of the IF register and an interrupt is generated at the same time as interrupts are enabled 2 4 12 Chattering Recommended Covers DMG SGB and CGB To prevent buttons from inadvertently being pressed twice an interval should be provided between key reads Although this varies with the software keys are normally read approximately once per frame 252 Appendix 1 Programming Cautions 3 PROGRAMMING CAUTIONS REGARDING MBCS 3 1 All MBCs 3 1 1 Protecting RAM Data Recommended To protect RAM data access to RAM should be disabled RAMG 0x00 when it is not being accessed 3 2 3 2 1 Accessing the Clock Counters Required If the clock counters themselves are counted up accessing of the clock counters by the CPU is performed asynchronously However if these operations are performed simultaneously the clock counters may fail To prevent this MBC3 provides an interface circuit for WR signals from the CPR Use of this circuit necessitates a delay when accessing control register 3 and the clock counter registers RTC S RTC M RTC H RTC DL and RTC DH Thus whenever accessing these registers interpose a delay of 4 cycles between accesses When reading clock counter data e Latch all clock counter data using cont
169. not available in this mode 49 Game Boy Programming Manual 1 4 BG Display Address Bank 0 Bank 1 Calor Game Boy only 0 9800 3 4 3 2 1 om NTT MEE EE n specifies the color palette Display Priority Flag eee Specifies the character bank 0 Display according display priority flag 1 Highest priority to Leftimight Flip Flag 0 Mormal Up Down Flip Flag sto RESI 1 Flip left riaht 0 Marmal 1 Flip up dawven Unused unusable bit same meaning in follaving pages Two screens of BG display can be held Data 1 or Data 2 Whether the BG display data is allocated to 0x9800 Ox9BFF or to 0x9C00 Ox9FFF is determined by bit of the LCDC register OxFF40 Because bank switching is not available in DMG mode Bank 1 on the right side of the figure is not present in this mode MEN Bank 0 Bank 1 CGB only 0x9800 BG Display Data 1 770590007 spl ree BG Data 2 Data for 32 x 32 character codes 256 x 256 dots can be specified from 0x9800 or 0x9C00 as BG display data Of these data for 20 x 18 character codes 160 x 144 dots are displayed to the LCD Screen The screen can be scrolled vertically or horizontally one dot at a time by changing the values of scroll registers SCX and SCY 50 Chapter 2 Display Functions 1 With BG display data allocated to 0x9800 0x9BFF 256 dots 32 blocks 160 dots 20 blocks RAM Address
170. nput from Multiple Controllers After a multiplayer request Command MLT REQ is sent data from controllers 1 2 3 and 4 automatically become readable In 2 player mode data from controller 1 is read first followed by data from controller 2 then data from controller 1 again and so on In 4 player mode the order is controller 1 controller 2 controller 3 controller 4 controller 1 again and so on In these cases the next controller for which data is to be read must be determined beforehand by reading 10 P13 with P14 and P15 high P10 P13 Next Controller to Read Controller 1 Note Controller data cannot be read if Multiplayer 5 and SUPER NES Mouse are connected at the same time Ox Ox Ox X 173 Game Boy Programming Manual 4 2 RECOGNIZING SGB 4 2 1 Distinguishing between Game Boy types DMG MGB MGL SGB and SGB2 The program uses the following methods to determine which of the 4 types is operating e Checks the initial value of the internal accumulator of the CPU distinguishes between previous new versions of CPU 01 DMG or SGB FF MGB MGL or SGB2 e Sends muliplayer request Command MLT REQ and determines whether there is a switch to multiplayer mode No switch DMG or MGB MGL Switch SGB or SGB2 The following table summarizes these methods Initial Value of CPU Internal owitch No Switch to Game Boy Type Accumulator Switch MGB MGL FF 7
171. ns unchanged STOP made can be canceled by a reset signal If the RESET terminal goes LOW in STOP mode it becomes that of a reset status The following conditions should be met before a STOP instruction is executed and STOP mode is entered Allinterruptenable E flags are reset nputta F10 P13 is LOWY for all 112 Chapter 5 Miscellaneous General Information Chapter 5 Miscellaneous General Information 114 1 MOHITOF d 114 2 Recognition Data for CGB only in ROM registered Data 115 3 Power Saving Routines for the Main Program 116 4 Software Created Exclusively for CGB 117 5 Software Created to Operate on CGB 118 6 Software Created to Operate on CGB Example 119 6 1 Program Specifications ecce eee cree 119 6 2 CGB Recognition Method 1 eere ee 120 63 FLOW CI AES 121 113 Game Boy Programming Manual CHAPTER 5 MISCELLANEOUS GENERAL INFORMA TION 1 MONITOR ROM The DMG and CGB CPU includes internal monitor ROM When power on the hardware is turned on the monitor ROM checks for errors in the Nintend
172. nstalled kankichib hex file when starting up mapu DIR address 0 04 00 Echo end address OxOffOO address 9 Make the following changes in the file cshrc in the home directory Following are the Sound Generation Environments Settings iln Before Change After Change otartOfKan 0x800 0x400 StartOfDirectory 0 3 00 Ox4b00 EndOfDirectory Ox3ctf Ox4cOf 10 In the home directory execute the following command source cshrc 187 Game Boy Programming Manual Cautions When Using Kankichi kun 1 Copy sample kan to a newly created score data file score name kan cp sample kan xxx kan This avoids the task of creating a source list in source list order when using mapu 2 Start mapu mapu k When starting mapu for the first time press the NICE reset button 3 The usable sounds sources can be checked with mapu Selecting check kan allows the sounds to be checked in source list order f data in files such as check kan are changed the sounds cannot be checked 4 To actually create a tune select xxx kan Source data sampling data that SGB can use have been set in xxx kan The source list is shown in Section 4 SGB Sound Program Source List Note that changing the order of the source list will result in sounds different from the intended sounds when BGM is played 5 When producing a musical piece see Section 3 7 Cautions Regarding Production of Musical Pieces Refer to the Kankichi kun Manual
173. nter the ASCII code for the charac ters in areas marked with parenthesis Game Title Registration Enter the game title registered in the master ROM using ASCII characters and their ASCII codes Also enter the Game Code assigned by Nintendo Refer to Character Code List for Game Title Registration for these entries Memory Controller Indicate the type of memory controller used for this game If no Memory Controller is used mark None Memory Configuration Indicate the memory configuration of the game as follows ROM Indicate the ROM size RAM Indicate whether or not work RAM is installed in the Game Pak If work RAM is installed indicate whether it is used as an expansion device or contained inside an MBC If it is used as an expansion device indicate the size of the RAM in the location provided Also indicate if work RAM requires data back up battery When the MBC 3 Clock Counter function is used check Yes for Data Back up regardless of which box is checked for RAM 283 Game Boy Programming Manual 15 ROM Version Mask ROM Version Indicate 0 if submitting the first version of the game Indicate the next higher number for each revised version after starting production Submission ROM Indicate 0 for the first submission Indicate the next higher number each time the game contents change without updating the Mask ROM version Change after fir amp production
174. o logo character data within the game software If the data is correct the Nintendo logo is displayed and the program is then started If there is an error in the data the screen flashes repeatedly For information on registering the Nintendo logo character data refer to Appendix 3 of this manual Submission Requirements The conditions required for starting the user program are as follows Starting Address 0x150 default value The starting address can be freely set by writing a jump destination address at 0x102 0 103 LCDC value 0x91 Stack value OxFFFE 114 Chapter 5 Miscellaneous General Information 2 RECOGNITION DATA FOR CGB CGB ONLY IN ROM HEGISTERED DATA As with software created for DMG software for CGB including software only for CGB must place data concerning items such as the name of the game and Game Pak specifications in the 80 bytes of the program area between 0x100 and Ox14F In the system a code indicating whether the software is for CGB should be set at address 0 143 Note For an overall description of the ROM area shown below please refer to Appendix 3 Submission Requirements Setting a value of 0x80 or OxCO at this address causes the system to recognize the software as being for CGB If 0 00 or any value less than Ox7F existing DMG software is set at this address the software is recognized as non CGB software and CGB functions registers are not available Starting Address
175. o 5 ms must be interposed between each byte sent Thus care should be exercised regarding factors like interrupts when programming 2 3 Packets and the Transfer Interval Each type of data sent by the Game Boy is sent in a packet An interval of 270 us to 117 ms must be allowed between the transfer of each packet Thus care should be exercised regarding factors like interrupts when programming 2 4 Synchronism Check when Connecting After the connection between the Game Boy and printer is confirmed the Game Boy sends a NUL packet every 100 msec for a synchronism check of the connection If the Game Boy determines that a connection is unnecessary and does not send a NUL packet in the prescribed time the printer will determine that the connection is abnormal and will wait in an initialized state for a signal from the Game Boy 233 Game Boy Programming Manual 3 COMMUNICATION DATA DEFINITIONS This section defines the following data items packet types and data by function 3 1 Transferring to the Printer The packet types are as follows Packet Type Initialization and connection packet Print instruction packet Data packet Data end packet Break packet NUL packet OF Each of the above packet types is in the following format c Preamble Header Data Checksum Dummy NEP 2 bytes of data 0x88 x 1 0x33 x 1 Abbreviated PA below 4 bytes of contiguous data that represent the following Byt
176. of the game and not promoting a specific religious denomination e use profanity obscenity or incorporate language or gestures that are offensive by prevailing public standard and tastes e promote the use of illegal drugs smoking materials tobacco and or alcohol for example Nintendo does not allow an unnecessary beer or cigarette advertisement anywhere in a product however Sherlock Holmes smoking a pipe would be acceptable as it fits the theme of the game 297 Game Boy Programming Manual 16 GAME BOY PRICE QUOTE REQUEST FORM Please FAX this form to Nintendo of America Inc Attn Juana Tingdale Licensing Department 206 861 2173 Todayebatewon 7 7 _ ay _ tmm Sp ecificatiarnn gt Bitno Back up gt Yes Others Pease specify if you inquimg otherthan standard specification Comments EPROM dewelopment etc 298
177. ommand No of Packets Transmitted _ No of packets transmitted 0x1 0x7 Indicates the total including the first packet System command code 0x0 0x1F d7 d6 dd d4 d3 d2 di dO 01h 02h od od X dp XE 3 Data OFh 0 transmitted in bit 129 If 2 or more packets are used for one system command bits 0 00 of the second packet onward are used for data 129 Game Boy Programming Manual Transmission Procedure 1 Start of write 2 Data transmission example Transmitted Data ___ dO d1 d2 d3 d4 d5 d6 d7 00h 0 1 0 1 0 0 0 0 o No of packets 0x2 Command code 0x1 0x01 data 0x02 data OxF data 3 Transmission of O in bit 129 Bit129 0 4 Start of write 5 Data transmission second packet 0 00 data 0 01 data OxF data 1 Transmission of O in bit 129 Bit 129 0 4 Transmission Interval The interval between completion of transmission of one packet 128 bits 1 bit and transmission of the next packet is set at approximately 60 msec 4 frames Transmission ends Transmission starts Transmission ends Transmssion starts 4 frames 1 packet 4 frames 5 Transmission Bit 129 The data in bit 129 marks the end of one packet so it should always be transmitted 130 Chapter 6 The Super Game Boy System 2 2 Data Transfer Using an Image Signal Data and programs stored in a cartridge can be transferred using the image signal transmission path LDO LD1 Characte
178. on RAM is accessible Access to this RAM is enabled by writing OxOA to the RAMG register space 0x0000 0x1FFF Writing any other value to this register disables reading to and writing from RAM Bit i 5 4 3 2 1 Default Wi Lower ROM Bank Register ROMBO Specifies the lower order 8 bits of a 9 bit ROM bank The ROM bank can be changed by writing the desired ROM bank number to the ROMBO register area 0x2000 0x2FFF Bit 5 4 a 2 1 0 Default U 0 0 0 0 0 0 0 RUN Wi Upper ROM Bank Register ROMB1 Specifies the higher order 1 bit of a 9 bit ROM bank The ROM bank can be changed by writing the desired ROM bank number to the ROMB 1 register area 0x3000 0x3F FF Bit 7 5 4 3 2 1 Default Pi Bank Register RAMB opecifies the RAM bank The RAM bank can be changed by writing the desired RAM bank number to the RAMB register area 0x4000 0x5FFF Bit 5 4 3 2 1 Default Wi Note Although the bits marked with ignored by MBC5 they should be used after being set to 0 The default values are set automatically when power is turned on 222 Chapter 8 Game Boy Memory Controllers MBC 4 5 Programming Cautions 4 5 1 When Migrating from MBC1 to MBC5 Use of Register 1 If an MBC1 program uses register 1 ROM bank control register addresses 0x3000 Ox3FFF the bank intended for selection by ROMB1 in MBC5 will not
179. or Palette Transfer rewrite OAM Transfer BG CHR Code Transfer LCD Display RAM Bank 0 1 CGB CGB Flag Check LCD display RAM switched to bank 1 0 MGB MA BG attributes transferred LCDC ON Color display in CGB Monochrome display in DMG MGB MGL LCDC OFF or blanking 121 Game Boy Programming Manual 2 Uniform processing for CGB and DMG MGB MGL CGB support code 0x80 written to ROM data area address 0x143 Start Supplemental processing for support Initialization Color Palette Transfer rewrite OAM Transfer BG Attribute Transfer LCD Display RAM Bank 1 BG CHR Code Transfer LCD Display RAM Bank 0 LCDC ON Color display in CGB Monochrome display in DMG MGB MGL LCDC OFF or blanking Note The BG attributes should always be transferred before the BG character code Even if only the BG attributes are changed always transfer the character code from that same address 122 Chapter 6 The Super Game Boy System Chapter 6 The Super Game Boy System 124 27 2 Y Y 124 1 1 What is Super Game 124 1 2
180. or the rest ofthe operand The content of bit is copied ta CY and hit is reset rand HL are used for operand m Examples When D 0x80 HL xFF and 0 SLA D DO 0x00 cY 1 21 H0 N SLA HL OXFE 1 Z0 0 0 Shifts the contents af operand m the right That is the contents of bit 7 are copied to bith and the previous contents af bit 5 ihe contents before the copy operation are copied ta bit 5 The same operation is repeated in sequence forthe rest ofthe operand The contents of bit 0 are copied to Cy and the cantent af bit is unchanged rand HL are used for operand Example When A 0x64 HL 0x01 and CY D SRA D 0 Creuse D Hat N SRA HL 000 CY 1 Ze 1 H e Nei 101 Game Boy Programming Manual Shifts the contents of operand m to the right Thatis the contents of bit 7 are copied ta bit 5 and the previous contents of bit 5 tthe contents before the copy operation are copied ta bit 5 The same operation is repeated in sequence for the rest ofthe operand The contents of hit are copied ta CY and bit 7 is reset rand HL are used for operand m Examples When Az 0x01 OFF D SRL A A 000 1 Ze 1 H 0 N SRL HL CY 1 Ze 0 He 0 M 0 Shifts the contents of the lower order 4 bits 0 3 of operand m unmodified to the higher order 4 bits 4 7 of that operand and shifts the contents of the higher order
181. orresponds to the flag set for port O 0x01 OxOF Tune label A label name applied to each tune Block A unit several bars long that each tune is divided into Parts The channels that make up each block maximum of 8 parts Performance The aggregate of the score data played by the parts The parts in the channels must all be the same length number of steps in a given block 190 Overall Format of Score Data Example 1 Area inside dotted frame Data table for 1 tune org O2b00H gft dw bgm1 bgme bgm1 dw bgm1_block1 bgm1_0 dw bgm1_block2 dw bgm1_block3 dw 255 dw bgm1_0 dw 000 bgm1_block1 dw bgm1_block1_ 0 bgm1_block1_1 bgm1_block1 2 bgm1_block1 3 bgm1_block2 bgm1_blocks bgm1_block1_0 Block 01 Chapter 7 Super Game Boy Sound a Starting address of score data b Tune table Indicate the tune labels c Tune label 1 d Block 01 d Block 02 d Block 03 e Repetition code endless e Repetition starting address f Tune label end code g Block 01 g Starting address of Part 0 g Starting address of Part 1 g Starting address of Part 2 g Starting address of Part 3 9 0 9 9 Part 4 unused Part 5 unused Part 6 unused Part 7 unused g Same in Block 2 9 Same Block 3 h Part O performance data db tp1 049 mv1 200 sno 1a pv1 180 pan 010 db 6cv 255 040 040 edl 002 090 002 tun 050 db 012 P99 V9
182. ound for the duration specified by the length data in register NR31 When sound output is finished bit 2 of register NR52 the Sound 3 ON flag is reset 76 Chapter 3 Sound Functions Initialization Flag When the Sound OFF flag bit 7 NR30 is set to 1 setting this bit to 1 restarts Sound Sound 3 Usage Notes e The initialization flag should not be set when the frequency is changed during Sound output e Setting the initialization flag during Sound 3 operation Sound 3 ON flag 1 may destroy the contents of waveform RAM e Setting the initialization flags for Sound 1 Sound 2 or Sound 4 does not cause a problem Waveform RAM Composition Waveform RAM consists of waveform patterns of 4 bits x 32 steps Address D7 D6 D5 04 D3 D2 D1 DO Example Triangular Wave Data 01H 23H 45H 67H 89H ABH CDH EFH EDH CBH A9H 87H 65H 43H 21H 00H FH OH otep OH 1FH 77 Game Boy Programming Manual 2 4 Sound 4 Mode Registers Sound 4 is a white noise generating circuit It can output sound while switching the number of steps of the polynomial counter for random number generation and changing the frequency dividing ratio and envelope data by registers NR41 NR42 NR43 and NR44 Name Address Bit T 5 4 3 2 1 0 sound Length 0 to 63 Name Address Bit T 5 4 3 2 1 0 Length of Envelope Steps M Oto 7 Envelope 0 Decrea
183. ovided for each sound so No ino Start Address Data Structure 00 Source start address L H Source loop end address L H 0x4C30 so No adsr 1 adsr 2 gain blk No 2byte When the sound number is 0x000 the directory data comprise 4 bytes beginning at 0 4 00 and the sod data comprise 6 bytes beginning at 0x4C30 0x000 cannot be used Please substitute the directory data and sod data values corresponding to the given sound number Note For the sound number however be careful not to use any number other those shown in 2 Use of an incorrect number will cause a loss of program control Transferring all of these data and issuing a BGB request will result in audio playback 208 5 2 Transfer File Example Chapter 7 Super Game Boy Sound With sampling data consisting of a single sound with a sound number of 0x002 the Directory data would be the 4 bytes beginning at 0x4B08 and the sod data would occupy the 6 bytes beginning at Ox4C3C In this case ensure that the score data begin at 0 2 00 Starting these data at any location other than 0 2 00 would cause a loss of program control The sampling data audio data should be transferred to the area between 0 2 00 and Ox3AFF dw dw db dw dw db dw dw db db db db dw dw db db db db db db db db dw dw 0004 4B08 00 30 3F 30 0006 4C3C 02 F F E0 B8 02 B0 0020 2B00 00 01 02 03 04 05 amp 06 07 00 01 02 0
184. ple gt 3 LIEJLIEJ 238 Chapter 9 Pocket Printer 4 4 Data End Packet Actual Data 9 gt Header Checksum Dummy This du has no data section A data length of 0 for the data packet header represents the end of the print data This must always be sent to end print data transmission 4 5 Break Packet Used to discontinue printing The break packet is sent by means of the user s instructions and forcibly stops printing Printing is halted after 1 line is printed Actual Data Header Checksum Dummy This d has no data section 4 6 NUL Packet A functionless packet for requesting the current status of the printer The printer may occasionally be halted unintentionally while printing 0 paper jam low battery so a NUL packet should always first be sent to check the printer s status Actual Data Header Checksum Dummy This n has no data section 4 7 Packet Error Except in the case of a checksum error if a packet of one of these types is sent but does not match the specification described the printer will return a packet error 4 8 Other Packets Packets other than the types mentioned above are ignored by the printer 239 Game Boy Programming Manual 5 PRINTER STATUS AND PACKETS The following table shows the packets that can and cannot be sent from the Game Boy to the printer while the printer is in various states Disconnected Immediately Prin
185. printer is FF FF when the printer is not connected to the Game Boy or not powered on 3 3 Handling Errors Either an error number listed below or the error number plus a description of the error would be sent to the display screen in response to an error flag in byte 2 This information is also presented in the user s manual of the Pocket Printer That information must be used together with the information given here Status Byte 2 low Bat 1 1 ER2 1 Error No 02 is represented using both status bytes ERO 1 likely indicates program failure When an error is generated always sever communication with the printer and inform the user of the type of error 235 Game Boy Programming Manual A value other than Ox81for the first status byte means that a device other than the Pocket Printer is connected This should be conveyed to the user as an error message 236 4 PACKET DETAILS 4 1 The Initialization and Connection Packet Chapter 9 Pocket Printer This packet is used to initialize the printer and check the connection If the Game Boy sends a packet for checking the printer connection and a printer is connected it returns a 2 byte status code and initializes for the start of print processing This packet must always be sent when the Game Boy starts to access the printer It allows transferred data to be invalidated reset Actual Data c OM M Header Checksum Dummy This packet has
186. program 7 Press the HOME button to switch to shvc mode 8 Execute 52140 to write 01 from the main program writes 01 to 0 of the sound port 189 Game Boy Programming Manual With this procedure the pre loaded source data sampling data are played in the order shown in Section 4 of this chapter SGB Sound Program Source List After the data is transferred once only the score data needs to be transferred to allow music to be checked again Cautions 1 Score data is the data defined in KAN ASM Version 1 21 as being located from GFT onward For information on all items related to converting data from other sequencers to score data formats and tool usage see the IS SOUND manual 2 Setthe source data number according to the source list 3 Setthe starting address of the score data to 0 2 00 4 When producing a musical piece do so in accordance with Section 3 7 Cautions Regarding Production of Musical Pieces 5 Convert to the file format described in Section 3 8 Format for Transferred Files 3 6 Score Data Format When Using Original Tools The score data format has been made openly available for the benefit of those using original development tools Data that is not in this format will not operate on SGB Note that in some cases program control may be lost Score Data Glossary of Terms Location of tune table definitions collection of tune label definitions Up to 15 tunes can be defined The order defined here c
187. r Codes Attributes 0x9C00 BG Display Datd 2 CGB only Character Codes i Attributes 000 External Expansion Working RAM 8 KB CGB Only OxC000 SU l 0 Fixed Unit Working RAM 8 KB Banks 1 7 Switchable 0 000 OxFEOO0 OAM 40 nd 7 6 5 4 2 1 0 QxFEOO 40 x 32 bi pug Control Register L Color Palette Sound Register Palette DMG DV Character Bank CGB OxFF80 ht Working amp Stack RAM Priory c 127 bytes Y39 Chapter 1 System 1 5 FEATURE COMPARISON DMG CPU CGB CPU CPU Speed 1 05 MHz 1 05 MHz normal mode system operating frequency 2 10 MHz double speed mode Game Boy RAM Work and Stack RAM 127 x 8 bits Work RAM 8 192 bytes 32 768 bytes OAM 40 x 28 bits 40 x 32 bits For LCD display 8 192 bytes 16 384 bytes Game Pak Memory Space ROM without MBC 32 768 bytes RAM without MBC 8 192 bytes lt LCD Controller Display Capacity 160 x 144 dots 160 x 144 x RGB dots Block Structure BG window 8 x 8 dots Object 8 x 8 dots or 8 x 16 dots lt Number of Usable Characters BG 256 512 OBJ8x8 256 512 8 x 16 128 256 Grayscale BG window 4 shades 1 palette 4 colors 8 palettes DMG mode 4 colors 1 palette Grayscale Object 3 shades 2 palettes 3 colors 8 palettes DMG mode 3 colors 2 palettes Object priority Different x coordinates Object with smallest x coord Object with lowest OBJ number DMG mode Objec
188. r code to other game Y Transfer RD Master Code Slave Start Game first notified that it is slave by master code sent from master Subsequently moves to game flow N Y RD Slave Code Data sent when this side becomes master 15 the slave Master Start N code Game subsequently moves to game flow C SIO Interrupt 3 Y RD SB RD Slave Code C Transfer 5 TD Transfer SB TD Data Buffer SB lt Slave Code Timing of ins WAIT receive SO lt 81 synchronized with Power Up SC 80 C RET E 4 RETI NA 31 Game Boy Programming Manual Flow after game start If Master C Master Game 2 Key Input TD i Transfer Data Transfer Game Processing C Transfer SO 581 SIO Interrupt RD lt q SB Cm SB 4 TD C RETI If Slave Slave Game 4 2 Key Input TD Transfer Data Game Processing SIO Finished Slave waits for finish of SIO to synchronize with master This is an example not necessary to implement this C SIO Interrupt wa
189. r data stored in DMG VRAM and displayed are then stored in SGB RAM The system program usually transfers these data to SUPER NES VRAM as character data However when a specific command is received the data is handled as data for command processing The displayed image signal is handled directly as data so be careful to ensure that the OBJ display and window are set to OFF the correct values are set for the DMB color palette and the BG to be displayed is correctly transferred When data is transferred they are displayed to the screen so the system command MASK EN must be used to mask the screen For more information see Section 3 2 in this chapter System Command Details Note Commands that transfer data using image signals are indicated by the heading Data Transfer Using VRAM 131 Game Boy Programming Manual 3 SYSTEM COMMANDS 3 1 System Command Summary PALOI DATA TRN PAL23 MLT_REQ PALO3 JUMP PAL12 CHR TRN ATTR BLK PCT TRN ATTR LIN TRN ATTR DIV ATTR SET ATTR CHR MASK EN SOUND PAL PRI SOU TRN Use prohibited PAL SET Use prohibited PAL TRN ATRC EN ICON EN DATA SND 132 Chapter 6 The Super Game Boy System 3 2 System Command Details Please refer to the following map in the discussion of coordinate settings and color palette area specifications in the description of the system command functions H 160 dots 20 Characters 00 01 02 03 04 05 06 07 08 09 OB OC OD OF
190. r more information please contact Nintendo Technical Support 18 SGB Support If the software is designed to use Super Game Boy SGB functions check Yes If the software is not specifically designed to use Super Game Boy functions but will run on SGB indicate If you checked Yes for SGB Support the SGB Function Code address 0146H should contain If you checked No the data contained in address 0146H should read Also if you checked Yes for CGB Support complete the following 3 items Do not make any marks in these boxes if you checked No a SGB Support Marking Check Yes if the SGB compatability marking needs to be displayed on product packaging Otherwise check No b SGB Competition Mode Indicate whether the game contains a multi player function for SGB by checking the appropriate box c Program Transfer to Super NES Indicate whether or not the program is transferred to the S CPU for execution as a unique program on the Super NES 286 Appendix 3 Software Submission Requirements 10 CHARACTER CODE LIST FOR GAME TITLE REGISTRATION V MAL lote 1 Do not use characters in shaded areas Mote2 SP means space Example If ASCI characteris ASCII code is 41 28 Game Boy Programming Manual 11 ROM REGISTRATION DATA SPECIFICATION Enter information regarding the game title and Game Boy software specifications at the indicated addresses in ROM
191. rammed demos ROM images written descriptions and so on Game Boy Programming Manual e Game Concept content We do not require an explanation of or evaluate game concept content for original CGB titles However if you are planning to colorize a previously released monochrome game we require that it include game play enhancements beyond simply adding color to differentiate it from its monochrome counterpart Such game play enhancements may include but are not limited to additional stages levels or areas new characters additional items game play based on color and so on These enhancements must be readily apparent to players familiar with the original monochrome game Please submit a written proposal of the enhancements to us for pre approval Use whatever additional means that will best allow you to communicate the game play enhancements such as storyboards treatments videotapes programmed demos and so on e Interim ROM Submissions We require at least one interim ROM submission to Mario Club at approximately 5096 completion for preliminary review of the use of color in every CGB game By reviewing the interim ROM and providing you with feedback in the early stages we also help ensure that your projects stay on schedule Final pre approval is based on Mario Club s evaluation of a ROM near completion of game development If you wish to arrange electronic transfer of the ROM image please contact Sharon Pfeifle in our Testing
192. ramming issues that require special attention and special issues regarding peripheral devices Items Covered in this Manual Many of the topics covered in this appendix also are covered elsewhere in different chapters of this manual This appendix consolidates the discussion of these topics Topics that would be more easily comprehensible to the reader when presented separately will also be discussed in another chapter even though this may duplicate the discussion in this appendix Note Although these notes were created to make every effort to eliminate potential sources of trouble at market they do not represent a guarantee that various potential problems on the market can be absolutely avoided 248 Appendix 1 Programming Cautions 2 PROGRAMMING CAUTIONS REGARDING GAME BOY Covers DMG DMG MGB and MGL SGB SGB and SGB2 CGB CGB 2 1 LCDC VRAM 2 1 1 Setting the LCDC to OFF Recommended Covers DMG and CGB In early a black horizontal line appears on the screen if the is stopped LCDC register bit 7 lt 0 at any time other than during vertical blanking Therefore the should be set to OFF during V blanking If the occurrence of V blanking cannot be confirmed the LCDC should be set to OFF when the value of the LY register is 145 0x91 or greater These restrictions do not apply in CGB Thus when creating software for use on CGB only the timing of setting the LCDC to OFF need not be considered
193. rea of APU RAM user area is the 8 Kbytes from 0 2 00 to Ox4AFF 3 2 Summary of BGM Flags Dummy flag for retriggering 0 10 OxF BGM stop flag Use prohibited used by system Use prohibited used by system If 0x01 0x0F are set without score data being transferred the BGM built into the system is played This BGM is exclusively for use by the system so 0x01 0x0F should not be written as a BGM flag without original score data being transferred Even if original score data is transferred there is risk that the sound program will run uncontrolled if a non designated code is written Muting is in effect when the system is initialized so the BGM playback settings must be made after muting is canceled 184 Chapter 7 Super Game Boy Sound 3 3 Overview of Creating Score Data Original BGM can be played with the SGB sound program by transferring score data to the APU using system commands Fifty seven sounds can be used in BGM and the score data can be up to just under 8 Kbytes in size The method used to create a musical piece is nearly identical to that of the standard SNES When the NEWS system is used score data is created using Kankichi kun When IS SOUND is used score data created by an external sequencer are processed through MIDI and converted to create score data supported by the standard sound driver KAN ASM In addition the SGB score data format has been made openly available allowing those u
194. rea outside the square d7 do EET vos een _ Coordinate dat H1 V1 H V Starting upper left and ending lower right points of the square h1 v1 d7 dO ooa f f f Staring point He _ Staring point ve _ Coordinate data OxOC uu Ending point h2 Control Code opecifies the color palette Note If the number of packets is 1 0x00 is written to OxOE and OxOF If the number of packets exceeds 1 the control code and color palette specification code of the next data item are written to OxOE and OxOF respectively 141 Game Boy Programming Manual When the number of packets exceeds 1 EUM Starting point V3 Coordinate data uu Ending point h3 Ending point V3 Control code Color palette specification Coordinate data Control code Color palette specification Starting point V5 Coordinate data Ending point h5 EF fe OOO SNSN s 0x01 SS Color palette specification 0x02 empty area of the packet is filled with 0x00 When there is no area inside the square border e g h1 1 a control code such as one that sets the color attribute for the area inside the border cannot be used 142 Chapter 6 The Super Game Boy System Please note that when ATTR BLK ATTR LIN ATTR DIV or ATTR CHR are used the data that is sent are vali
195. ries Sa MBOLIC FLAGS OP CODE hd NEM DIN COMMENT NEM ONC ERATION zlevet 7354 COMMEN 0 O 0 1 00 000 11 N i i z5 ih _ t Ck Bud 271 Game Boy Programming Manual SYMBOLIC FLAGS OP CODE i MHEMOMHIC OPERATION 76 548 240 EXITUS Fe 1119 1512 T xd bove Abr b RES 0 11 00 n GS mm ee T T T ior on h din h 11H JPm CADRE amp DES nn cc agreemerr LADRS 4 1 a 100 NZ 20 JES p 4 2 2 IER DIETE S Du PCPU e 4 E E E B 12f H28 CALL SP 1 PCy nn SP 2 PC n diunp SP 1 FCH PCcnn x iil Phe 7 4 M oo on 2 E eu C LRL EE e an PC SP SFP SP42 RETI Phe 4 11011 001 _ 8 417 RET 52 000 _ 5 1 SP SP42 RSTt erneten n t 11 SP 2 PC SP SP2 PEG PCP 2 2 Appendix 2 Register and Instruction Set Summaries S YMBOLIC FLAGS OP CODE MNEMONEC es T y gt CYCL 78 543 210 EARN DAA gt lo j pow
196. rol register 3 4 cycle delay required e Read the data in the clock counter registers When writing values to the clock counters e Set data in clock counter register S 4 cycle delay required e Set data in clock counter register M 4 cycle delay required e Set data in clock counter register 4 cycle delay required e Set data in clock counter register RTC DL 4 cycle delay required e Set data in clock counter register 3 2 2 Condensation Required MBC3 uses a crystal oscillator for its clock counter operation and condensation on the oscillator may halt its oscillation preventing the clocks from counting up Once the condensation disappears the clocks will resume counting up from where they stopped However please ensure that the counter stoppage does not result in a loss of program control 253 Game Boy Programming Manual 3 2 3 Control Register Initialization Required Although control registers 0 3 are initialized see Section 3 2 Description of Registers when the Game Boy power is turned on they are not initialized by a hard reset of SNES when Super Game Boy is used Therefore please be sure to implement a software reset of these registers 3 2 4 Clock Counter Registers Required When commercial GB software that use MBC3 are shipped from the factory the values of the clock counter registers are undefined Therefore please ensure that these registers are initialized 3
197. rwithout backup battery _______ Available If a price quote is necessary please submit Game Boy Price Quote Request Form to Licensing Dept Board Not Available If required please submit a Game Boy Price Quote Request Form to NOA Licensing Dept approximately 5 months before scheduled software submission gt gt gt gt Atthe present time a mask ROM cannot be prepared If necessary please contact Licensing Dept Notes 1 2 and 3 do not support Game Boy Color double speed mode including H DMA and General Purpose DMA Please refer to your Programming Manual 1 There are some restrictions in memory mapping when MBC 1 ROM Size is 8M or larger Please refer to Memory Controllers in your Programming Manual 2 For MBC 5 with ROM of 1M or less a mask ROM supporting CGB double speed mode can not be prepared Double speed mode is supported by ROM of 2M or larger 294 Appendix 3 Software Submission Requirements 14 DEVELOPMENT SOFTWARE SELECTION SRAM SIZE pp OO O O With or without backup battery wwe 5 dle sw With or without backup battery MBC2 p e Built in 256 SRAM With or without backup battery 1M 256K 64K None e Built in 32M Flash ROM 10 e Built in 1M SRAM MBC 5 With or without backup battery 256K 64K None e Built in 32M Flash ROM 11 e Rumble Function e Built in 256K SRAM With or without backup batter
198. ry from bit 15 atherwise reset Example When HL x8A23 BC 0 0605 ADD HL BC HL 09029 N D 0 ADD HL HL HL x1445 He 1 N 0 1 COL s e mese 2373 3 Adds the contents of the 8 hit immediate operand e and SP and stores the results in SF Example SP xFFF8 ADD SP 2 SP FFFA 0 Han Nenze COL 10 increments the contents af register pair ss by 1 Example When DE 0235F INC DE DE 0 2360 cy H H 2 i x ee EEE Ie 9 Diecrerments the contents of register pair ss by 1 Example When DE 0x235F DEC DE DE x235E Game Boy Programming Manual 2 5 Rotate SWR Instructions Rotates the contents af register to the left Thatis the contents of bit 0 are copied ta bit 1 and the previous contents af bit 1 the contents before the copy operation are copied to hit 2 The same operation is repeated in sequence for the rest of the register The contents of bit 7 are placed in both CY and bit 0 of register A Example When Az 0x65 and CY 0 C T e 1 ze 0 H N 0 Rotates the contents af register ta the left Example hen x85 and CY 1 RLA A Ce 1 Z 0 Had N 0 Cr H H CCL Te 641 216 Rotates the contents of register to the right Example When A 0x38 and CY D A 049D CYe 1 z 0 Hei Nei Cr H H CCL Te 4d 216
199. s An internal monitor program is built into DMG CGB CPUs When power is turned on or the Game Boy is reset the internal monitor program first initializes components such as the ports then passes control to the user program Instruction cycles DMG 0 954 us source oscillation 4 1943 MHz CGB 0 954 us 0 477 us switchable source oscillation 8 3886 MHz Chapter 1 System 2 2 CPU BLOCK DIAGHAM Game Boy DMG MGB CPU RESET 00 07 VDD GND TEST1 2 Data Buffer Controller DMA RD Timing ANR Control CS CPU Core ROM AU P10 RAM Port P12 127 bytes Pi P13 Address 14 P1 Interrupt Controller s VIN A14 Sound 1 A15 NR10 NR14 zs SO1 N Sound 2 NR20 NR23 SO2 Sound 3 Timer NR30 NR33 TIMA TMA TAC Sound 4 NR40 NR42 OAM RAM Waveform Sound 40 x 28 bit RAM Control 32 x4 NR50 NR52 LCD Controller LCDC STAT SCY SCX LY LYC WX WY OBPO OBP1 BGP LCD Display RAM Interface MDO MD7 12 MCS MRD Game Boy Programming Manual Game Boy Color CPU RD WR CS MDO MD7 00 07 NMI P00 P03 P10 P13 MRD Keyport MWR Control Data Buffer CS1 Interrupt 1 vi aul Controller pes CPU Core 0 15 2 Kbytes Sound 1 NR10 NR14 5 am Sound 2 5 501 MAO MA12 NR20 NR23 E SO2 5 N O Sound 3 lt NR30 NR33 RAO RA1 VIN D Sound 4 NR40 NR42 Waveform Sound s Divider Control DIV NR50 NR52 K1 x Timer CK2 TIMA TMA
200. s CGB When switching the CPU operating speed first confirm the current speed by checking the speed flag bit 7 of register KEY1 In double speed mode both the divider DIV and timer TIMA registers will also be set for double speed operation 2 4 8 Using Horizontal Blanking DMA Required Horizontal blanking DMA should always be started bit 7 of HDMAS set to 1 when the STAT mode is not set to OO If horizontal blanking DMA is started when STAT mode is 00 depending on the timing the data in LCD display RAM may be destroyed In addition execution of a HALT instruction during horizontal blanking DMA may prevent normal cancellation of the HALT mode or DMA Therefore HALT instructions should not be used while horizontal blanking DMA is being started 2 4 9 Using General Purpose DMA Required General purpose DMA should be started bit 7 of HDMAS set to 0 with the off or during V blanking However when transferring data during V blanking ensure that the transfer period does not overlap with STAT modes 10 or 11 2 4 10 DMA Transfers to OAM Required In DMG and in CGB in DMG mode when transferring data to OAM by DMA the user program area 0x00 0x7FFF should not be used as the starting address of the transfer In some cases data cannot be transferred from the user program area normally CGB mode however does enable DMA transfers from the user program area 2 4 11 Status Interrupts Required Covers DMG SGB and CGB When usi
201. s each made a different manufacturer Seiko Systems and Hosiden During final game debugging the game should be checked with at least 1 printer of each type The manufacturer can be determined from the serial number on the back of the unit Printers with PS serial numbers are made by Seiko those with PH serial numbers are made by Hosiden Many of the Seiko printers obtained on the market are the normal Pocket Printer while many of the printers made by Hosiden are manufactured according to the special Pocket Printer Pikachu Yellow specification However depending on the needs of the manufacturers there is no guarantee that this distinction will hold true in the future If obtaining a printer proves difficult please contact Nintendo for a special consultation 11 2 Sample Programs Provided by Nintendo subroutines Modifying a program to suit the intended use is permitted However in creating the original program values for timing and other parameters were calculated to allow normal operation These parameters must therefore be carefully considered when modifying a program 245 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 246 Appendix 1 Programming Cautions APPENDIX 1 PROGRAMMING CAUTIONS 248 LIE 2 CT To optas dee 248 2 Programming Cautions Regarding Game Boy 249 21 LODOVRAM M 249 2 2 Communication Bun 250 2 3 SOUNO icenen
202. s equipped with a communication connector This manual uses the term SGB2 when discussing points that concern only the 1998 model Descriptions that use the term Super Game Boy or SGB refer to both Super Game Boy models SGB2 allows game representations that use SHVC functions for communication play SGB2 has not been released in the U S market 124 Chapter 6 The Super Game Boy System 1 2 Block Diagram 6 Pin Subconnector SGB2 only SYS CLK VISUAL DATA HIEMS mm KEY DATA Mis System _ Address Program n ROM Register file CD SGB CPU V RAM prises 64Kbit 32P Card Connector Game SNES62P Card Edge MN c C M oe ee M 125 Game Boy Programming Manual 1 3 Functions The types of representations indicated below can be implemented using SUPER NES functions invoked by sending system commands For more information please see Section in this chapter System Commands Image Functions e Up to 4 palettes of 4 colors each can be represented on a single screen e Multiple areas can be specified for each screen and separate color palette attributes can be specified for each area Color palette attributes can be specified separately for each character 8 x 8 bits Sound Functions e The rich variety of sound effects included the system program can be generated by the SUPER NES audio processing unit APU e The sound generator included in t
203. s issued until masking is canceled 10 Masks by setting all SGB color palette color codes to black 11 Masks by setting all SGB color palette color codes to the same color color of bit 00 0 2 OxF filled with OxOO Note When masking is performed at the start of the game it should be performed after the DMG reset is canceled and around the time that the DMG screen is displayed on SGB The timing of the command should be adjusted so that it is issued after a of several frames Without this timing the screen be momentarily be displayed in monochrome Note Masking with an argument 0X01 of 0x10 or 0x11 is prohibited during a game 165 Game Boy Programming Manual Command PAL PRI Code 0x19 Function Specifies the priority of the color palette for the application and the color palette selected by the player d7 dO 0x00 1 1 0 0 1 0 0 1 Number of packets Ox1 fixed Command code 0x19 d7 dO 0 Priority to the player selected color palette 1 Priority to the application color palette Default is O Priority to Player Selected Color Palette When screen that uses a player selected color palette is displayed any color or attribute settings commands that were sent have no effect on the DMG window Priority to Application Color Palette When a screen that uses a player selected color palette is displayed and a color or attribute setting command was sent the sent colors are display
204. se 1 Increase Default Envelope value Mame Address Bit 5 4 a 2 1 Selects Division Ratio Frequency Selects Humber af Polynomial Counter Steps Selects Shift Clock Frequency af Polynomial Counter Selecting the dividing ratio of the frequency Selects a 14 step prescalar input clock to produce the shift clock for the polynomial counter 000 fx1 2 x2 001 fx1 2 x1 010 fx1 2 x1 2 011 fx1 2 x1 3 100 fx1 2 x1 4 101 1 1 2 1 5 110 1 2 1 6 111 fx1 25x1 7 f 4 19430MHz Selecting the number of steps for the polynomial counter 0 15 steps 1 7 steps 78 Chapter 3 Sound Functions Selecting the shift clock frequency of the polynomial counter 0000 Dividing ratio frequency x 1 2 0001 Dividing ratio frequency 1 2 0010 Dividing ratio frequency x 1 27 0011 Dividing ratio frequency x 1 2 1101 Dividing ratio frequency x 1 2 1110 Prohibited code 1111 Prohibited code Mame Address Bit T 5 4 3 2 1 4 23 RAY Only the shaded portion can be read po Counter Kontinuauz Selection Initialize Counter Continuous Selection 0 Outputs continuous sound regardless of length data in register NR41 1 Outputs sound for the duration specified by the length data in register NR41 When sound output is finished bit 3 of register NR52 the Sound 4 ON flag is reset Initialize Setting this bit to 1 restarts Sound 4 Sound 4 Usage Notes If
205. sing original tools to create score data in this format In creating musical pieces please refer to Section 4 SGB Sound Program Source List when selecting sounds Please do not change the order of these source data 3 4 Setting the NEWS System Working Environment 185 Game Boy Programming Manual Working Environment Settings for the NEWS System 1 Rename the current sobox directory mv SObOX XXXXX 2 Create a new sobox directory mkdir sobox SGB can use only specific sound objects Thus special SGB source data must be installed A sobox directory for SGB use must be created to prevent loss of previously installed source data files with the same names as the data files to be installed 3 Move to the sobox directory 4 From the installation disk install soread in this directory tar xvf dev rfhOa soread 5 Next install the sampling data files xxx so in this directory soread Executing the above command causes the sampling data to be automatically installed 6 Create a new SGB working directory at any location mkdir HHHH 7 Move to the SGB working directory 186 Chapter 7 Super Game Boy Sound 8 From the installation disk install the following files in the working directory sgbt asm sample kan check kan kankichib hex and kan equ tar xvf dev rfhOa sgbt asm sample kan check kan kankichib hex kan equ he organization and address settings in kankichib hex are as shown below Use the i
206. ssion The connecting portion of the packet is unnecessary from the second packet onward 40 Chapter 1 System The following illustrates the flow for implementing a connection Start of infrared communication Read bit 1 of register Value read 0 Y Transmission Signal received Pulse width measurement Transmission of software measurement of connecting pulse H and L periods Received signal a proper connecting pulse Y Send connecting pulse Connection established receiver Start of reception measurement of width of received pulse Is the received signa the correct connecting pulse Y Connection established sender Header Light emission by sender Light detection by receiver One byte indicating the data type and 1 byte indicating the number of transmitted data are sandwiched between synchronous pulses Data Light emission by sender Synchronous pulse Transmitted data Synchronous pulse o lam WW PL Light detection by receiver Between 1 and 255 bytes of transmitted data are sandwiched between synchronous pulses 41 Game Boy Programming Manual A 2 byte checksum consisting of the sum of the header and transmitted data is sandwiched between synchronous pulses The receiver uses the checksum to determine whether the transmission was performed properly and notifies the sender of the results of communicat
207. sult if the transfer is started before or at the same time as the shift clock is selected If a transfer is performed using the external clock the data is first set in the SB register then the SC register start flag is set and input from the external clock is awaited The transfer start flag must be set each time data is transferred The maximum setting for an external clock is 500 KHz Serial communication SIO specifications are essentially the same for DMG and CGB In however the operating speed of the internal shift clock can be set to high by specifying a speed in bit 1 29 Game Boy Programming Manual SIO Timing Chart SCK 7 6 5 4 3 2 1 0 USE Read Timing SIO Block Diagram SIN 7 6 5 4 3 2 0 SOUT 8 bit Shift Register E IP VDD 3 Bit Counter Resistance OUT OR SCK 3 State Buffer Gate Inverter IN1 ENTER Serial Control SC re OUT 1 2 3 4 5 6 SCO SC7 CTRL External Internal Clock Selection Transfer Start Internal Shift Clock 8 KHz 256 KHz 30 Chapter 1 System 2 5 2 Serial Cable Communication Reference flowchart Flow until start of game Cm D SB lt Slave Code RD Clear Select code other than 00 and SFF For both slave and master code SC 44 80 Clear the receive data buffer RD Both sides wait in receive wait status N Game on which Start key pressed first becomes master by sending maste
208. t JR Z VBLK WT Jump if a non V blank interrupt XOR A LD VBLK F A JR MAIN m Vertical Blanking Routine ERA VBLK PUSH PUSH PUSH DE PUSH HL CALL DMA LD A 1 Set the V blank completion flag LD VBLK F A POP HL POP DE POP BC POP AF RETI HALT instructions should not be executed while CGB horizontal blanking DMA is executed See Appendix 1 Programming Cautions 116 Chapter 5 Miscellaneous General Information 4 SOFTWARE CREATED EXCLUSIVELY FOR CGB Because the shape of the Game Pak for CGB only software is the same as that for DMG CGB only Game Paks also can be inserted in DMG Therefore a program that displays a message such as that shown below when a CGB only Game Pak is mistakenly inserted in DMG should always be included in the software The upper part of the message screen should display the official title of the game If the title is similar to that of other software e g series software a subtitle should also be displayed to distinguish the programs from one another For information on software methods of distinguishing game units see Section 6 of this chapter Software Created for CGB Example Sample Message Display Game Title This software is intended only for use with Game Boy Color Please use it with Game Boy Color 117 Game Boy Programming Manual 5 SOFTWARE CHEATED TO OPERATE ON CGB As is shown below and differ slightly in their specifications and operat
209. t Buffer hile hile after Full Printing Feeding Connected o T mes v s T9 OK A ignored x packet error undefined The user could push the feed button while data is being transferred In this case the entire data packet would be ignored so the same packet would need to be re sent 240 Chapter 9 Pocket Printer 6 PRINTER PRINT SEQUENCE The print sequence used in the Game Boy Status evaluation Ha Printer connected E Send init connection packet Print instruction Resend Packet if Sum Error Transtemed data present FULL bit 1 Printer connected Tez The printer iz not connected ez Printer abnormality Printer Feeding Yeas Tranzfer data packet Transfer data end packet a c Yes Transfer print instruction packet This is the basic sequence used when sending packets Yes End Printing i 241 Game Boy Programming Manual 7 PROCESSING OF CONNECTION EVALUATION AND PREAMBLE DETECTION FAILURE 7 1 Connection Evaluation includes cable disconnection To check whether a printer is connected to the Game Boy it sends NUL packet If nothing is connected the value OxFF is received if there is a connection 0x00 is received Game Boy Printer Not Connected NUL packet sent
210. t be submitted in binary ROM format Do not compress the data The maximum amount of data stored on each floppy should be 8Mbit 3 The name should be formatted as described in item 16 of Instructions for Game Boy Software Specification Sheet File Name and Check Sums 4 Placea label describing the content of each disk as shown below Company name Nintendo Co Ltd Product name Mario s Pikurosu Product code DMG P APCJ JPN File name APCJO00 0 GB Checksum ABCD Date 1998 8 1 293 Game Boy Programming Manual 13 PRODUCTION SOFTWARE SELECTION d dete dete fa ep None oO EAS SEE Mo sme o O O withorwithout backup battery ________ 5 a o withorwithout backup battery mec2 a o o j Wmbakpbateyony a lt a o o o olo a withbackupbatteryony a A Wibakpbateyoly lt QA h Le aman Or gt gt gt gt gt 2 010 winor without backup battery 0 2 A vos ye O With orwithout backup battery ______ s w wre 2 A with o
211. t with lowest x coord Same x coordinates Object with lowest OBJ number lt 16 stages x 1 lt 8K 8K 256K 16K 512K in high speed mode DMA Controller Existing DMA 0x8000 0xDFFF OAM 0x0 0xDFFF OAM Horizontal blank DMA Game Pak amp Work RAM VRAM General purpose DMA Game Pak amp Work RAM VRAM Interrupt features Internal Interrupts 4 types maskable External Interrupts 1 type maskable lt Input Output Ports Serial Input Output Ports SIN SCK SOUT Infrared Communication Port RO R1 R2 R3 Sound Output Circuit 4 sounds lt Monaural VIN External Sound Mixable Input Same as in column at left 15 Game Boy Programming Manual 1 6 REGISTER COMPARISON DMG CPU CGB CPU Uses Register Address Register _ Addess Port Mode Registers uu I EE Registers SVBK FF70 Interrupt Flags LCD Display Registers a ie T T FE00 FE9F Sound Registers NR x x FF10 FF26 Waveform RAM FF30 FF3F Same as in column at left 16 Chapter 1 System 2 CPU 2 1 OVERVIEW OF CPU FEATURES The CPUs of DMG and CGB are ICs customized for DMG CGB use and have the following features CPU Features Central to the 8 bit CPU are the following features including an I O port and timer 127 x 8 bits of built in RAM working and stack gt RAM for LCD Display lt DMG gt 8 KB lt CGB gt 16 KB gt Working RAM lt DMG gt 8KB lt
212. te d7 dO V coordinate of start of write dO 0x03 Number of data items to send Each data item 2 bits specifies a color palette d7 dO EE EE _ Most significant bit of number of data items sent specified in 0x03 The maximum number of data items required is 360 d7 dO 2349255138 zu Write horizontally 0 Write vertically 148 Chapter 6 The Super Game Boy System START Horizontal write H direction Pal No Pal No Pal No Pal No oe START Qm 0x07 Pal No Pal No Pal No pe Pal No Vertical write V direction START Sending color palette data for entire screen 6 Packet OxOF Data items nos 357 358 359 and 360 See note on ATTR BLK 149 Game Boy Programming Manual Command SOUND Code 0x08 Function Generates and halts internal sound effects and sounds that use internal tone data d7 do 2 Number of packets 0 1 fixed Command code 0x08 d7 dO om sound Efect A PORTI decay y 7 T sound feet B PORTS sustain Sound Effect A attributes Scale 00 01 10 1 1 LOW High Volume 00 high 01 medium 10 low 11 enable mute fade out Sound Effect B attributes Scale 00 01 10 1 1 LOW High Volume 00 high 01 medium 10 low d7 dO d When not used 0x00 always written For more information see Section 3 4 Sound Flag Lists
213. terminal can be used normally only in CGB Since the signal from the VIN terminal is too low to be used the VIN terminal cannot be used in DMG e he maximum amplitude of the synthesized output is 3V e The design prevents the maximum amplitude from exceeding when only sounds 1 4 are used even when the output level for each sound is set to the maximum When the output level is set to OXOF each sound is output at 0 75V 0 75V x42 3V e he maximum amplitude of the synthesized sound output also must be limited to or less when the VIN terminal is used to input external sound Example Using Sounds 1 4 and the VIN terminal Use software to adjust the output levels of sounds 1 4 so that they do not exceed 0 6V 3V Also limit the output level of the VIN terminal to 0 6 or less input range of 1 9 2 5V e The input voltage from the VIN terminal also can be increased if the levels of the internal sounds are low or if not all 4 sounds are used total output level of or less 81 Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK 82 Chapter 4 CU Instruction Set Chapter 4 CPU Instruction Set 84 1 General Purpose 84 2 Description OF 5 85 2 1 8 Bit Transfer and Input Output Instructions 85 2 2 T6 Bit Transfer 90 2 3 8 Bi Arithmetic and Logical
214. the attributes specified by d1 and dO of 0x03 only to the area within the square including the CHR border Applies the color palette attributes specified by d3 and d2 of 0x03 only on the square CHR border Applies the color palette attributes specified by d1 and dO of 0x03 only to the 011 area within the square and applies the color palette attributes specified by d3 and d2 of 0x03 only to the border of the square Applies the attributes specified by d5 and d4 of 0x03 only to the area outside the square including the CHR border Applies the color palette attributes specified by d1 and dO of 0x03 to the area 101 within the square and applies the color palette attributes specified by d5 and d4 of 0x03 to the area outside of the CHR border CHR border is unchanged Applies the color palette attributes specified by d5 and d4 of 0x03 only to the 110 area outside of the square and applies the color palette attributes specified by d3 and d2 of 0x03 to the CHR border 111 Applies the specified color palette attributes to the area inside the square to the CHR border line and to the area outside the CHR border 100 The color palette attributes of areas not specified are not changed 140 Chapter 6 The Super Game Boy System d7 dO 0x03 opecifies the color palette B B Color palette number for the area inside the square __ palette number for character area on the square Lo LLL Color palette number for a
215. the contents of the envelope register NR22 needs to be changed during sound operation ON flag set to 1 the initialize flag should be set after the value in the envelope register is set 79 Game Boy Programming Manual 2 5 Sound Control Registers Mame Address Bit 5 4 2 1 Output Level 0 71 vin 501 On Off 502 Output Level 0 7 vin SO On Off Output Level 000 Minimum level Maximum level 8 111 Maximum level Vin 501 ON OFF Vin 9 02 ON OFF Synthesizes audio input from Vin terminal with sounds 1 4 and ouputs the result 0 No output 1 Output Mame Address T 5 4 3 2 1 0 MRS1 25 Pt ff ft tl RAM Selects a Sound Output Terminal EM Output Sound 1 ta Terminal SO1 Output Sound 2 to Terminal So1 Output Sound 3 to Terminal S01 Output Sound 4 to Terminal So Output Sound 1 to Terminal S02 Output Sound 2 ta Terminal 5122 Output Sound 3 to Terminal S02 Output Sound 4 to Terminal 502 0 Mo Output 1 Output Mame Address 5 4 3 2 1 MRS FF2B ANAN RAN Only the shaded portion can be read EM sound 1 On Flag Sound 2 on Flag sound 3 On Flag Sound 4 On Flag Each flag ix set during each sound Output in Counter Mode The flag is reset after the interval specified by the Length Data All Sounds 0 Disable All Sound Circuits 1 Enable All Sound Circuits 80 Chapter 3 Sound Functions 3 VIN TERMINAL USAGE NOTES e The VIN
216. tinguish between the monochrome models is MGB used to denote Game Boy and MGL used to denote Game Boy Light SGB Super Game Boy introduced on June 14 1994 SGB2 Super Game Boy 2 introduced on January 30 1998 Note SGB is used to denote both SGB and SGB2 when no distinction is necessary SGB2 is used only in cases where distinction is necessary Game Boy Programming Manual THIS PAGE WAS INTENTIONALLY LEFT BLANK Preface To Publishers PREFACE TO PUBLISHERS NINTENDO GAME BOY COLOR SOFTWARE PRE APPROVAL REQUIREMENTS Prior to submitting your CGB software to Lot Check for approval it is required that you submit it to the Licensee Product Support Group for pre approval To assist us with the evaluation of your CGB software and or product proposal s please refer to the following requirements when submitting materials for approval Please do not send original artwork or materials as they will not be returned CGB software and or product proposals are evaluated based on the following criteria e Use of Color To ensure that the expectations of the Game Boy Color consumer are met Mario Club will evaluate the use of color in all CGB games dual or dedicated using the following criteria 9 Differentiation game is to be considered CGB compatible then it must appear significantly more colorful than a monochrome Game Boy game when colorized by the CGB hardware The principal measure of this is the number o
217. to the software developer s as quickly as possible ooftware submissions should be sent to the following address Nintendo of America Inc Attn Product Testing Supervisor 4820 150th Avenue NE Redmond WA 98052 Phone 425 861 2674 Fax 425 882 3585 2 ITEMS REQUIRED FOR SUBMISSIONS The following items must be submitted with each Game Boy software submission Specification Sheet and Check List The appropriate Software Specification sheet and the Software Submission Checklist must be filled out completely and must be correct for the particular program version ROM Data copy of the ROM data must be submitted in binary format on MS DOSg 3 5 inch disk s The size of the file must be equal to the size of the EP ROM i e one 4 Meg EP ROM one 4 Meg file Please label each disk and include a description of its contents See Storing Data to the Floppy Disk below For software that supports communications when communications are delayed for more than one hour after the game starts in addition to the above items you must submit one set of boards with EP ROM or a flash board in which the game has been advanced to the point where communication can take place Game Play Videotape Rating Certificate A video tape containing complete game play is required unless the product has been rated by the Entertainment Software Ratings Board ESRB If the product has been rated by the ESRB then a copy of the rating certifi
218. tte data for character dot data 10 in Dh mode Palette data for charader dot data 07 in 2 mode Palette data for character dot data OO in mode When atribute bita ist When attnbute bita iz 1 Mr 143 ye edge when enordinate Mc Vir FFA Ful 7 165 Wirid Lett edge when moo dinate Enable speed CPU speed syutching syutching Bank 0 Bank 1 Bank 1 Higher order address of sour rder address of transfer soume Higher order address of destination Forder address of HDh transfer destination Fl Suutch setting to 1 and issuing a STOP nstruadian BankO selected irmrrediatehy after a reset signal 110 262 Appendix 2 Register and Instruction Set Summaries Ese r H blank and general pupos control RF Infrared communication port BCPS Color palette B vurite specification BCF O Color palette Bi vurite data OCPS Color palette OBJ warte specication OCPD Color palette OBJ vate data 127 Total number of transfe med bytes 165 rre T Data read enable flag 00 Disable 11 Enable Falete Ho 0 7 OL ED OIF F F alette Ho 0 3 Falete Ho Palette Ho 263
219. ttraction mode Enables and disables attraction on the picture frame The default setting is enabled 0x00 If the command is issued during attraction attraction is stopped d dO 1 p Number of packets Ox1 fixed Command code OxOC d7 dO 0 Enables attraction 1 Disables attraction Example Attraction start duration for a model type without communication connector The time required for attraction to start for each picture frame is as follows Times shown in parentheses are times required to start attraction a second time Mario 7 min 5 min Cork 3 min 5 min Landscape 1 min 1 min Cinema 3 mins Cats 3 mins Pencils 3 mins 5 mins Escher art 7 mins 5 mins 155 Game Boy Programming Manual Command ICON EN Code OxOE Function Enables and disables the icon function d 7 dO Number of packets 0 1 fixed Command code OxOE d7 dO oot TE EE Color palette 0 Enables use of color palettes internal to the SBG system program 1 Disables use of color palettes internal to SBG system program Control settings screen 0 Enable settings 1 Disable settings SGB register file transfer 0 Receive 1 Do not receive The default value is 0x00 156 Chapter 6 The Super Game Boy System Command DATA SND Code OxOF Function Transfers data to SUPER NES WRAM using the register file d7 dO 0x001 0 1
220. ults in register A Example When A Ox ADD A 0xFF x3B Ae 0 He 1 CY 1 CCL 1c ADD HL lt HL 110 Adds the contents af memor specified by the contents of register pair HL ta the contents af register and stores the results in register A Example When A Ux3C and 0x12 ADD Ae fe 0 H 0 M D crel CYTOL 10 Adds the contents of operand s and CY the contents of register and stores the results in register A r n and HL are used far operand s ADC Examples When A 0 1 Ox0F HL 0x1E and CY 1 ADC A E Ae z0 H 1 CY 0 ADC A OXSB Ae 01D H CY 1 ADC A HL 000 Z 1 Hei crel 92 Chapter 4 CPU Instruction Set cr H H I CTCL T 216 SuUbtracts the contents of operand s from the contents of register and stores the results in register A r n and HL are used for operand s Flag J Set ifresultis 0 otherwise reset Set if there is a borrow from bit 4 otherwise reset M Set vr Setit there is a borrow otherwise reset Examples When A x3E x3E and HL 0x40 SUA E Z 1 H0 Nei CY 0 SUB x F A amp e UxzF Z 0 H 1 M 1 cr i SUB HLG Ze 0 H H 1 1 cu T 21 H Res PERI SuUbtracts the contents of operand s and CY trom the contents of register amp and stor
221. used in Part O 2 for Part 1 4 for Part 2 8 for Part 3 16 for Part 4 32 for Part 5 64 for Part 6 and 128 for Part 7 When echo is used for multiple parts enter the sum of the channel number values Examples When echo is used for parts 0 and 1 the value entered is 3 When echo is used for all parts the value entered is 255 Note 4 Echo time is the delay duration It uses RAM area equal to twice the echo time value expressed in Kbytes The echo area in SGB is 4 Kbytes so a value of 2 or less should be entered Feedback indicates the amount of delay returned Filter No indicates the type of filter applied to the delayed sound 0 no filter 1 high pass filter 2 low pass filter 3 band pass filter symbols marked with a x the Special Symbols table are applied to all parts These should be set in the first part When using a symbol to set a special symbol for score data assemble after defining the equals statement according to the Special Symbols table The special symbols and the arguments that follow should be set in the order shown in the tables If using IS SOUND load sgbsound hex according to the steps in Section 3 5 Setting the Working Environment for IS SOUND Transferring the subsequently created score data allows the tunes and sounds to be checked 200 Chapter 7 Super Game Boy Sound Cautions The starting address for score data should be set to 0 2 00 Source numbers should be set accordin
222. xt address is read from the lower 6 bits of the write specification register The write specification and write data registers also are used to read data from color palettes When the write data register is read the data at the address specified by the write specification register is read When data is read the specified address is not incremented even if the most significant bit of the write specification register is set to 1 Mame Address Bit T 5 4 3 2 1 los Specifies WL H 1 L 0 Specifies the palette data te Specifies the palette 1 With each write specifies the next palette 0 Values of bits 0 5 fixed 5 4 3 2 1 0 BCPD FFB3 RAV the BG write data 4 3 2 1 0 OCPS FFBA seesitesthe obu wrte ats Specifies HIL 1 L Specifies the palette data Specities the palette O 046 1 ith each write specifies the next palette 0 Values af bits 0 5 fixed 3 4 3 2 1 Note These registers cannot be written to in DMG mode 66 Chapter 2 Display Functions 2 4 Overlapping OBJ and BG When objects are displayed overlapping objects and background are displayed according to the display priority flags for OBJ and BG as indicated below The BG display priority flag can be used to assign BG display priority to individual characters Displ
223. y RD e SB lt TD SC 80 Set SIO Completion Flag C RETI Data subsequently sent by the master is placed in SB and then sent to the slave at the same time as the SC is set to 81 At exactly that same time the master receives the slave data An SIO interrupt is then set in the slave and as the flowchart indicates the slave sets the data to be sent to the master current data Because the data sent from the slave are those loaded at the time of the previous interrupt the data sent to the master are one step one pass through the main program behind the current slave data Exactly the converse is true when this process is viewed 32 Chapter 1 System from the perspective of the slave An SIO interrupt is set in the master and the master sets the data to be sent to the slave current data In this case because the data sent from the master are those loaded at the time of the previous interrupt the data sent to slave are one step one pass through main program behind the current master data The data of the master and slave can be synchronized by setting the data for each back 1 pass In the example 1 byte is sent per frame This is not required If several bytes are sent continuously a transmission interval longer than the processing time of other interrupts e g V BLANK should be used usually around 1 mS The reason is that if an attempt is
224. y Product Names 1 Memory Specifications 2 Comments Board Name Product Code DMG 256K EPROM E200225 EPROM 27C256 MBC1 512K EPROM E200241 EPROM 27C512 MBC1 1M to 2M EPROM E200233 EPROM 27C101 27C2001 Can use 301 type 3 MBC1 1M to 2 64 E200530 EPROM 27C101 27C2001 27C4001 EPROM not included MBC1 Multichecker E200191 EPROM 27 256 27 512 27 101 27 301 MBC1 4M to 16M EPROM 64K E200654 EPROM 27C4001 MBC1 1M to 4M EPROM 256K E200605 EPROM 27C101 27C2001 27C4001 MBC2 1M to 2M EPROM E200258 EPROM 27C101 27C2001 Can use 301 type 3 MBC3 4M ROM2 256K E201025 EPROM 27C101 27C2001 27C4001 27C8001 295 Game Boy Programming Manual Product Names ATA Memory Specifications 2 Comments Board Name Product Code 1 DMG MBC5 32M FLASH E201264 Built in 32M Flash Built in 32M Flash Memory 1MRAM Built in 32M Flash Memory 1MRAM Requires DMG Falsh ROM 0 Gang Writer DMG MBC5 32M R FLASH E201272 Built in 32M Flash Memory with Rumble Pak 256KRAM Emulator Notes MBC 1 2 and 3 do not support Game Boy Color double speed mode including H DMA and General Purpose DMA Please refer to your Programming Manual There are some restrictions in memory mapping when MBC 1 ROM size is 1M or larger Please refer to Memory Controllers in your Programming Manual 1 When ordering please indicate both the board name and product code to Licensing Dept 2 For the
225. y RAM area 0x8000 0x9FFF during each horizontal blanking period The number of lines transferred by DMA in a horizontal blanking period can be specified as 1 128 by setting register HDMA5 CPU processing is halted during a DMA transfer period 2 General Purpose DMA Transfers Between 16 and 2048 bytes specified in 16 byte increments are transferred from the user program area 0 Ox7FFF or external and unit working RAM area OxA000 OxDFFF to the LCD display RAM area 0x8000 Ox9FFF As with horizontal blanking DMA transfers CPU operation is halted during the DMA transfer period The unit working RAM area OxDOO0 OxDFFF selected as the transfer source is the bank specified by register SVBK The LCD display RAM area 0x8000 0x9FFF selected as the transfer destination is the bank specified by register VBK Special Notes The number of bytes transferred by the new DMA method must be specified in 16 byte increments byte counts that are not a multiple of 16 cannot be transferred With the new DMA transfer method transfers are performed at a fixed rate regardless of whether the CPU is set to operate at normal or double speed Horizontal blanking DMA transfer should always be started with the LCDC on and the STAT mode set to a value other than 00 General purpose DMA transfer should be performed with the LCDC off or during a vertical blanking period When the new DMA transfer method is used to transfer data from the user program

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