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ModelSim PE Tutorial - Electrical and Computer Engineering
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1. FEL Instance Name Initializing a memory mU In ModelSim it is possible to initialize a memory using one of three methods Load Type Address Range from a saved memory file from a fill pattern or from both File Only All First let s initialize a memory from a file only You will use one you saved Data Only co previously data mem mem Both File and Data Start 0 End 65535 1 View instance ram tb spram3 mem File a Double click the ram_tb spram3 mem instance in the Memories tab hs This will open a new tab mem 2 in the MDI frame to display the Verilog Binary contents of ram_tb spram3 mem Scan these contents so you can MTI identify changes once the initialization is complete Filename data mem mem b Right click and select Properties to bring up the Properties dialog Data Load c Change the Address Radix to Decimal and Data Radix to Binary and Eu Fil Data click OK Value C Increment 2 Initialize spram3 from a file C Skip a Right click anywhere in the data column and select Load to bring up the Random A Load Memory dialog box Figure 63 Xn um D es The default Load Type is File Only Figure 64 Initialized memory from file and fill pattern b data_mem mem in the Filename field c Click OK 00000000000000000000000000101000 zl 00000000000000000000000000101001 00000000000000000000000000101010 000000000000000000000000
2. b work in the Library Name field if it isn t entered automatically Library Name work 3b Library Physical Name work a Cancel ModelSim Tutorial T 22 Lesson 2 Basic simulation c Click OK ModelSim creates a directory called work and writes a specially formatted file named info into that directory The info file must remain in the directory to distinguish it as a ModelSim library Do not edit the folder contents from your operating system all changes should be made from within ModelSim ModelSim also adds the library to the list in the Workspace Figure 3 and records the library mapping for future reference in the ModelSim initialization file modelsim ini When you pressed OK in step c above three lines were printed to the Main window Transcript pane vlib work vmap work work 4 Modifying modelsim ini The first two lines are the command line equivalent of the menu commands you invoked Most menu driven functions will echo their command line equivalents in this fashion The third line notifies you that the mapping has been recorded in the ModelSim initialization file ModelSim Tutorial Figure 3 The newly created work library v ModelSim File Edit View Format Compile Simulate Add Tools Window ias ieee Library modelsim_lib Library std Library std developerskit Library synopsys Library ModelSim gt wm title ModelSim vlib work vmap wo
3. test sm v pragma E Lines 25 29 Line 25 Line 26 Line 27 Line 29 Instance Coverage RE wmnsance Designunit Designunttype Stmeount Stmthis Stmtmisses Stmt Stmtgraph M test sm sram 0 beh sram Module 10 3 1 90 RET M est sm sm seq sm 0 Module 30 27 3 90 EET M test sm sm seq sm seq Module 22 21 1 955 E M test_sm 83 test_sm Module Viewing statistics in the Main window T 89 Viewing statistics in the Main window Figure 75 Right click a column heading to hide or show columns Workspace mt Count Stmt Hits Stmt StmtGraph Branch Count Rranch Hits 22 21 95455 EE Fullpath 30 27 90 000 D v 10 3 90000 a v Stmt Count 83 70 84337 IDD v Stmt Hits wv Stmt v Stmt Graph v Branch Count v Branch Hits v Branch v Branch Graph w Condition Count Let s take a look at the data in these various panes Branch Branch Graph 1 View statistics in the Workspace pane a Selectthe sim tab in the Workspace and scroll to the right Coverage statistics are shown for each object in the design b Select the Files tab in the Workspace and scroll to the right Each file in the design shows summary statistics for statements branches conditions and expressions c Click the right mouse button on any column name and select an object m 5 illegal op received v Condition H
4. Sim Advanced Verification and Debugging Tutorial Version 6 0b Published November 15 2004 T 2 This document is for information and instruction purposes Mentor Graphics reserves the right to make changes in specifications and other information contained in this publication without prior notice and the reader should in all cases consult Mentor Graphics to determine whether any changes have been made The terms and conditions governing the sale and licensing of Mentor Graphics products are set forth in written agreements between Mentor Graphics and its customers No representation or other affirmation of fact contained in this publication shall be deemed to be a warranty or give rise to any liability of Mentor Graphics whatsoever MENTOR GRAPHICS MAKES NO WARRANTY OF ANY KIND WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE MENTOR GRAPHICS SHALL NOT BE LIABLE FOR ANY INCIDENTAL INDIRECT SPECIAL OR CONSEQUENTIAL DAMAGES WHATSOEVER INCLUDING BUT NOT LIMITED TO LOST PROFITS ARISING OUT OF OR RELATED TO THIS PUBLICATION OR THE INFORMATION CONTAINED IN IT EVEN IF MENTOR GRAPHICS CORPORATION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES RESTRICTED RIGHTS LEGEND 03 97 U S Government Restricted Rights The SOFTWARE and documentation have been developed entirely at private expense and are commercial computer software provided with res
5. b Scroll to line 122 which looks like this posedge clk wt wd h10 haa c Change the data pattern to ab posedge clk wt 10 d Select File Save to save the file 2 Compile the revised file and rerun the simulation a Type do sec sim do at the ModelSim gt prompt The DO file does the following e Re compiles the testbench e Adds waves to the Wave window e Runs the simulation ModelSim Tutorial VHDL 1 Edit the testbench a b d a Select File gt Open and open test sm vhd Scroll to line 151 which looks like this wt wd 164104 16 aa clk into Change the data pattern aa to wt wd 164104 16 ab clk into Select File Save to save the file Compile the revised file and rerun the simulation Type do sec sim do at the ModelSim gt prompt The DO file does the following e Re compiles the testbench e Adds waves to the Wave window Runs the simulation Creating the test dataset T 101 ModelSim Tutorial T 102 Lesson 9 Waveform Compare Comparing the simulation runs ModelSim includes a Comparison Wizard that walks you through the process You can also configure the comparison manually with menu or command line commands Create a comparison using the Comparison Wizard a Select Tools Waveform Compare Comparison Wizard b Click the Browse button and select gold wif as the reference dataset Figure 85 Re
6. run all T 26 run command T 25 S saving simulation options T 39 simulation basic flow overview T 13 comparing runs T 97 restarting T 27 running T 25 simulation configurations T 39 stepping after a breakpoint T 28 Support T 8 T Tcl using in ModelSim T 116 Technical support and updates T 8 test dataset Waveform Compare T 100 test signals T 98 time measuring in Wave window T 56 toggle statistics Signals window T 93 tracing events T 65 tracing unknowns T 67 U unknowns tracing T 67 V vcom command T 73 verror command T 46 vlib command T 73 vlog command T 73 vsim command T 21 W Wave window T 51 adding items to T 54 cursors T 56 measuring time with cursors T 56 saving format T 59 zooming T 55 Waveform Compare T 97 reference signals T 98 saving and reloading T 105 test signals T 98 working library creating T 13 T 21 X X values tracing T 67 Z zooming Wave window T 55 T 127 ModelSim Tutorial T 128 Index ModelSim Tutorial
7. 11 Total primary differences 6 Total secondary differences 6 Number of primary signals with differences 4 Diff number 1 From time 135 ns delta 0 to time 155 ns gold test sm into 00000000000000000000000010101010 sim test sm into 00000000000000000000000010101011 Diff number 2 From time 135 ns delta 0 to time 155 ns gold test sm into 0 O sim test sm into 0 1 Diff number 3 From time 171 ns delta 1 to time 191 ns gold test sm dat 00000000000000000000000010101010 sim test sm dat 00000000000000000000000010101011 Diff number 4 From time 171 ns delta 1 to time 191 ns gold test sm dat 0 StO sim test sm dat 0 Sti Diff number 5 From time 409 ns delta 1 to time 411 ns gold test sm dat 00000000000000000000000010101010 sim test sm dat 00000000000000000000000010101011 Diff number 6 From time 409 ns delta 1 to time 411 ns gold test sm dat 0 sto sim test sm dat 0 Sti Diff number 7 From time 431 ns delta 1 to time 491 ns delta wnli jenne awiant minn NNNNNNNNNNNNNNNNNNNANNANNANININININ T 105 ModelSim Tutorial T 106 Lesson 9 Waveform Compare 3 Reload the comparison data Figure 92 Displaying log files in the Open dialog a Select Eie gt Open and opem b Change the Files of Type to Log Files wlf rl ege E c Double click gold wlf to open the dataset Pe d Select Tools gt Waveform Compare gt Reload My Recent Since you saved the data
8. 4a Organizing projects with folders If you have a lot of files to add to a project you may want to organize them in folders You can create folders either before or after adding your files If you create a folder before adding files you can specify in which folder you want a file placed at the time you add the file see Folder field in Figure 16 If you create a folder after adding files you edit the file properties to move it to that folder Adding folders As shown previously in Figure 15 the Add items to the Project dialog has an option for adding folders If you have already closed that dialog you can use a menu command to add a folder 1 Add a new folder Select File gt Add to Project gt Folder b Design Files in the Folder Name field Figure 21 c Click OK You ll now see a folder in the Project tab Figure 22 2 Adda sub folder a Right click anywhere in the Project tab and select Add to Project gt Folder b Type HDL in the Folder Name field Figure 23 c Click the Folder Location drop down arrow and select Design Files d Click OK Organizing projects with folders T 37 Figure 21 Adding a new folder to the project 7 Add Folder x Folder Name z Files 1b Folder Location E Level vij OK Cancel Figure 22 A folder in a project Workspace Name Status Type rder Modfed countery vy Verilog 1 06 03 04 07 36 00 PM tcounter
9. A folder with a sub folder Workspace EAE Status Order Modified counter v Verilog 1 06 03 04 07 36 00 PM tcounter v Verilog 0 06 03 04 07 36 26 Design Files Folder LCJ HDL Folder 2e Project Compiler Settings x General Verilog Coverage 4 General Settings Do Not Compile Compile to library wok vi Place in Folder Level vw File Properties File sm v Location C 6 0 Tutorial examples coverage verilog sm v MS DOS name C 6 0 Tutorial examples coverage werllog sm Type Verilog Change T Size 2459 2 Simulation Configurations T 39 H I H H Figure 26 The Simulation Configuration dialo imuiation Configurations 8 y Add Simulation Configuration A Simulation Configuration associates a design unit s and its simulation options Simulation Configuration Name Place in Folder For example say every time you load fcounter v you want to set the simulator los ic resolution to picoseconds ps and enable event order hazard checking Ordinarily you would have to specify those options each time you load the design With a Design VHDL Veiog Libraries SDE others if Simulation Configuration you specify options for a design and then save a Type Path on JE Li CAmodelech examples uoik
10. Lists all files and lines that are excluded from coverage statistics see Excluding lines and files from coverage statistics T 94 for more information These panes can be re sized rearranged and undocked to make the data more easily viewable To resize a pane click and drag on the top or bottom border To move a pane click and drag on the double line to the right of the pane name To undock a pane you can select it then drag it out of the Main window or you can click the Dock Undock Pane button in the header bar top right To redock the pane click the Dock Undock Pane button again We will look at these panes more closely in the next exercise For complete details on each pane see Code coverage panes GR 99 ModelSim Tutorial Figure 73 Coverage columns in the Main window Workspace Workspac Stmt Branch Count Branch Hits Branch Branch Graph Cc 22 21 95455 DEN 14 13 92857 NN 30 27 90 000 a 20 17 85000 SSSR 10 3 90000 EE 8 67500 DS 83 75 90361 NN gt age ETE Missed Statements test sm v X 25 5 Details X 25 into 4 b0001 28 b0 Instance test sm sram 0 i Signal dat_r X 26 posedge clk Node count 32 X 27 g X 27 into data gt 0 12525 gt 1 12499 X icc Toggle Coverage 25 X 128 i 0 1 Coverage 62 5 X 128 stop Current Exclusions Full Coverage 62 5 sm v entire file X Z Coverage 62 5 4 test sm v
11. Open counter lst and view the simulation results ns counter count delta counter clk counter reset 0 x gt 1 0 uz 50 0 Qr ime o 100 0 gg 100 1 000 150 0 0 0 151 0 0 200 0 1 0 0 250 0 g ModelSim Tutorial Running ModelSim in command line mode T 115 This is the output produced by the Verilog version of the design It may Figure 94 A dataset in the Main window Workspace appear slightly different if you used the VHDL version 6 View the results in the GUI Since you saved the simulation results in counter wlf you can view them in the GUI by invoking VSIM with the view argument M counter counter Madule a Type vsim view counter wlf at the DOS UNIX prompt The GUI opens and a dataset tab named counter is displayed in the Workspace Figure 94 b Right click the counter instance and select Add gt Add to Wave The waveforms display in the Wave window 9 7 When you finish viewing the results select File gt Quit to close ModelSim ModelSim Tutorial T 116 Lesson 10 Automating ModelSim Using Tcl with ModelSim The DO files used in previous exercises contained only ModelSim commands However DO files are really just Tel scripts This means you can include a whole variety of Tcl constructs such as procedures conditional operators math and trig functions regular expressions and so forth In this exercise you ll create a simple Tcl script that tests f
12. The following topics are covered in this lesson Introduction Design files for this lesson Related reading Compiling the design Loading and running the design Viewing statistics in the Main window Viewing statistics in the Source window Viewing toggle statistics in the Objects pane Excluding lines and files from coverage statistics Creating Code Coverage reports Lesson wrap up D Note The functionality described in this tutorial requires a coverage license feature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 86 T 86 T 86 T 87 T 88 T 89 T 91 T 93 T 94 T 94 T 96 T 85 ModelSim Tutorial T 86 Lesson 8 Simulating with Code Coverage Introduction ModelSim Code Coverage gives you graphical and report file feedback on which executable statements branches conditions and expressions in your source code have been executed It also measures bits of logic that have been toggled during execution Design files for this lesson The sample design for this lesson consists of a finite state machine which controls a behavioral memory The testbench fest sm provides stimulus The ModelSim installation comes with Verilog and VHDL versions of this design The files are located in the following directories Verilog install dir modeltech examples coverage verilog VHDL install dir modeltech examp
13. Verlog 0 06 03 04 07 36 26 Design Files Folder Project Library Figure 23 Creating a subfolder y Add Folder Folder Name HDL 18 2b Folder Location Design Files a 2c Top Level FF incel ModelSim Tutorial T 38 Lesson 3 ModelSim projects You ll now see a amp icon next to the Design Files folder in the Project tab Figure 24 e Click the icon to see the HDL sub folder Moving files to folders Now that you have folders you can move the files into them If you are running on a Windows platform you can simply drag and drop the files into the folder On Unix platforms you either have to place the files in a folder when you add the files to the project or you have to move them using the properties dialog 1 Move tcounter v and counter v to the HDL folder Select counter v hold the Ctrl key down and then select tcounter v b Right click either file and select Properties This opens the Project Compiler Settings dialog Figure 25 which lets you set a variety of options on your design files c Click the Place In Folder drop down arrow and select HDL d Click OK The two files are moved into the HDL folder Click the icons on the folders to see the files The files are now marked with a icon Because you moved the files the project no longer knows if the previous compilation is still valid ModelSim Tutorial Figure 24
14. cursor to the next or previous transition a Click signal count in the pathname pane a Click the Find Next Transition icon on the Wave window toolbar The cursor jumps to the next transition on the currently selected signal b Click the Find Previous Transition icon on the Wave window toolbar 177 ris to 448 ns Figure 42 Interval measurement between two cursors The cursor jumps to the previous transition on the currently selected LE signal File Edit View Insert Format Tools Window IR Q Working with multiple cursors 4 jest counter clk 0 1 Adda second cursor m 4 jest counter reset 0 I a Click the Add Cursor icon on the Wave window toolbar EE OMM MR MT Oe ee GR NEUEN END EE GEN END EUR UR NIE 14 b Right click the name of the new cursor and delete the text Type B and press Enter d Drag cursor and watch the interval measurement change dynamically Figure 42 I i E Now us Delta 2 gt 1 ModelSim Tutorial ModelSim Tutorial T 58 Lesson 5 Viewing simulations in the Wave window 2 Lock cursor a Right click cursor B in the cursor pane and select Lock B The cursor color changes to red and you can no longer drag the cursor Figure 43 3 Delete cursor B a Right click cursor B and select Delete B Figure 43 A locked cursor in the Wave window da File Edit pom Format Tools Window e TEC CAES
15. highlighted Figure 80 c Switch to the Source window The table below describes the various icons Icon Description Viewing statistics in the Source window Figure 79 Selecting a line in the Missed Coverage pane Missed Coverage H Missed Statements wL test sm v X 18 X 18 into 4 0000 X 19 endtask X 25 s X 25 into 4 0001 28 0 X 26 8 posedge clk X 27 5 X 27 into data X 29 endtask 113 repeat X 126 nop X l28 100 X 128 stop se green checkmark indicates a statement that has been executed red X indicates that a statement in that line has not been executed zero hits indicates a line that has been excluded from code coverage statistics green E red or XF indicates that a true or false branch respectively of a conditional statement has not been executed 16 91 46 0 Tutorial ex NSSSSSSSXS lt N J mples Ff repeat 40000 begin ff posedge posedge posedge posedge posedge posedge posedge posedge posedge posedge posedge posedge clk clk clk clk clk clk clk clk clk clk clk clk fe fe end 100 stop end for loop 0 loop lt 2000 ctrl h5 wt wd hlO0 haa wt wd h20 hbb wt blk h30 hcc rd vwd hl0 rd wd h20 rd vd h30 rd vdi h31 rd wd h32 rd vdi h33
16. support services provided including eligibility to receive telephone support updates modifications and revisions Current standard policies and programs are available upon request ESD SOFTWARE If you purchased a license to use embedded software development ESD Software Mentor Graphics grants to you a nontransferable nonexclusive license to reproduce and distribute executable files created using ESD compilers including the ESD run time libraries distributed with ESD C and C compiler Software that are linked into a composite program as an integral part of your compiled computer program provided that you distribute these files only in conjunction with your compiled computer program Mentor Graphics does NOT grant you any right to duplicate or incorporate copies of Mentor Graphics real time operating systems or other ESD Software except those explicitly granted in this section into your products without first signing a separate agreement with Mentor Graphics for such purpose BETA CODE Portions or all of certain Software may contain code for experimental testing and evaluation Beta Code which may not be used without Mentor Graphics explicit authorization Upon Mentor Graphics authorization Mentor Graphics grants to you a temporary nontransferable nonexclusive license for experimental use to test and evaluate the Beta Code without charge for a limited period of time specified by Mentor Graphics This grant and your use T 11
17. 7 dataflow NN ini x File Edit View Navigate Trace Tools Window SiR m hi BOBO dA Je 9 3e 3 9 E2 EZ 01 amp B nm test NAND 44 3l t out strb R ec TX ae R amp 1s CRE n T FT TH Extended mode enabled Keep 1 Atop p t out SA Figure 47 Signals added to the wave viewer automatically datano MR File Edit View Mavigate Trace Tools Window Sik Gd MH Je e X 3e 3 AMAA B m 5 amp med al amp amp E 4 jtop p test top p stb Outputs top p t out 2820 2785 ns 2 al SST Extended mode enabled Keep 1 ftop pAgNANDS 44 2 ModelSim Tutorial T 66 Lesson 6 Debugging with the Dataflow window d Select Trace gt Trace next event to trace the first contributing event Figure 48 Cursor in wave viewer marking last event ModelSim adds a cursor marking the last event the transition of the strobe to 0 at 2745 ns which caused the output of 1 on t out Figure 48 22 amp xA Xs Xt Fe QQ Br 3 e Select Trace gt Trace next event two more times f Select Trace gt Trace event set The dataflow pane sprouts to the preceding process and shows the input driver of signal strb Figure 49 Notice too that the wave viewer now sh
18. Create a new project a Select Create a Project from the Welcome dialog or File New Project Main window from the menu bar This opens a dialog where you enter a Project Name Project Location i e directory and Default Library Name Figure 14 The default library is where compiled design units will reside Type test in the Project Name field Click Browse to select a directory where the project file will be stored Leave the Default Library Name set to work Click OK If you see the Select Initial Ini dialog asking which modelsim ini file you would like the project to be created from select the Use Default Ini button Figure 14 The Create Project dialog Create Project M m Project Name test I m Project Location C modeltech examples Browse m Default Library Name work Creating a new project T 33 2b 26 2d ModelSim Tutorial T 34 Lesson 3 ModelSim projects Adding objects to the project Once you click OK to accept the new project settings you will see a blank Project tab in the workspace area of the Main window and the Add items to the Project dialog will appear Figure 15 From this dialog you can create a new design file add an existing file add a folder for organization purposes or create a simulation configuration discussed below 1 Add two existing files a Click Add Existing File This opens the Add file to Project dialog Figure 1
19. Figure 45 Expanding the view to display connected processes riae oT File Edit View Navigate Trace Tools Window AAA amp ASSIGNS ect NAND 44 RASSIGNI 9 1 test ou BSALWAYSIH 49 strb sb 2 118 pstrb 0 Hie prdy_r p wen paddr gt Extended mode enabled Keep 1 Atop p strb A Tracing events Another useful debugging feature is tracing events that contribute to an unexpected output value Using the Dataflow window s embedded wave viewer you can trace backward from a transition to see which process or signal caused the unexpected output 1 Add an object to the Dataflow window Make sure instance p is selected in the sim tab of the Main window b Drag signal t out from the Objects pane into the Dataflow window c Select View Show Wave in the Dataflow window to open the wave viewer Figure 46 You may need to increase the size of the Dataflow window and scroll the panes to see everything 2 Tracethe inputs of the nand gate a Select process NAND 44 labeled line 62 in the VHDL version in the dataflow pane input and output signals of the process are displayed automatically in the wave viewer b Inthe wave view scroll to time 2785 ns the last transition of signal t out c Click on the last transition of signal t out to set a cursor Figure 47 Tracing events T 65 Figure 46 The embedded wave viewer pane
20. Type vlog sp syn ram v dp syn ram v ram tb v at the ModelSim gt prompt VHDL Type vcom 93 sp syn ram vhd dp syn ram vhd ram tb vhd at the ModelSim gt prompt Load the design a Library tab of the Main window Workspace click the icon next to the work library b Double click the tb design unit to load the design Compiling and loading the design T 73 ModelSim Tutorial T 74 Lesson 7 Viewing and initializing memories Viewi ng a memory Figure 54 Viewing the memories tab in the Main window workspace Haw Workspace Memories can be viewed via the ModelSim GUI a CNN E 1 Open a Memory instance M am tb sprami mem 0 4095 4036 a Select View Debug Windows Memory M ram tb spram2 mem 0 2047 2048 d ram tb spram3 mem 0 65535 65536 32 The Memories tab opens in the Workspace pane Figure 54 and lists the tb spram4 mem 0 3 4 16 memories the current design context ram_tb with the range depth M ram_tb dpram1 mem 0 15 16 8 and width of each memory b VHDL The radix for enumerated types is Symbolic To change the radix to binary for the purposes of this lesson type the following command at the vsim prompt VSIM gt radix bin EB Memories c Double click the ram_tb spraml mem instance in the memories list to view its contents Figure 55 The mem tab in the MDI pane shows instance A mem tab is created in the MDI frame to displa
21. directory and copy the tutorial files into it Start by creating a new directory for this exercise Create the directory and copy these files into it lt install dir gt modeltech examples counter v e lt install_dir gt modeltech examples stim do We have used the Verilog file counter v in this example If you have a VHDL license use counter vhd instead 2 Create a new design library and compile the source file Again enter these commands at a DOS UNIX prompt in the new directory you created in step 1 a vlib work at the DOS UNIX prompt b For Verilog type vlog counter v at the DOS UNIX prompt For VHDL type vcom counter vhd Running ModelSim in command line mode T 113 ModelSim Tutorial T 114 3 Lesson 10 Automating ModelSim Create a DO file Open a text editor Type the following lines into a new file list all signals in decimal format add list decimal read in stimulus do stim do output results write list counter lst quit the simulation quit f Save the file with the name sim do and place it in the current directory 4 Runthe batch mode simulation 5 a Type vsim c do sim do counter wlf counter wlf at the DOS UNIX prompt The c argument instructs ModelSim not to invoke the GUI The wlf argument saves the simulation results in a WLF file This allows you to view the simulation results in the GUI for debugging purposes View the list output a
22. example of using both a working library and a resource library is one where your gate level design and testbench are compiled into the working library and the design references gate level models in a separate resource library The diagram below shows the basic steps for simulating with multiple libraries You can also link to resource libraries from within a project If you are using a project you would replace the first step above with these two steps create the project and add the testbench to the project ModelSim Tutorial Debugging tools T 17 Debugging tools ModelSim offers numerous tools for debugging and analyzing your design Several of these tools are covered in subsequent lessons including Setting breakpoints and stepping through the source code Viewing waveforms and measuring time Exploring the physical connectivity of your design Viewing and initializing memories Testing code coverage Comparing waveforms ModelSim Tutorial T 18 Lesson 1 ModelSim conceptual overview ModelSim Tutorial Lesson 2 Basic simulation Topics The following topics are covered in this lesson Introduction Design files for this lesson Related reading Creating the working design library Compiling the design Loading the design into the simulator Running the simulation Setting breakpoints and stepping in the Source window Lesson wrap up T 20 T 20 T 20 T 21 T 23 T 24 T 2
23. execute programs within your operating system When you are operating the simulator within ModelSim s GUI the interface is consistent for all platforms Example designs ModelSim comes with Verilog and VHDL versions of the designs used in these lessons This allows you to do the tutorial regardless of which license type you have Though we have tried to minimize the differences between the Verilog and VHDL versions we could not do so in all cases In cases where the designs differ e g line numbers or syntax you will find language specific instructions Follow the instructions that are appropriate for the language that you are using ModelSim Tutorial T 10 Introduction ModelSim Tutorial Lesson 1 ModelSim conceptual overview Topics The following topics are covered in this chapter Introduction Basic simulation flow Creating the working library Compiling your design Running the simulation Debugging your results Project flow Multiple library flow Debugging tools T 12 T 13 T 13 T 13 T 13 T 14 T 15 T 16 T 17 ModelSim Tutorial T 12 Lesson 1 ModelSim conceptual overview Introduction ModelSim is a simulation and debugging tool for VHDL Verilog SystemC and mixed language designs This lesson provides a brief conceptual overview of the ModelSim simulation environment It is divided into four topics which you will learn more about in subsequent lessons Topic Additional informatio
24. loj xl X Q coe ii ee 4 test_counter clk 1 4 test_counter reset 0 8 4 test counter count p Ife qe pp EE mE E Saving the window format If you close the Wave window any configurations you made to the window e g signals added cursors set etc are discarded However you can use the Save Format command to capture the current Wave window display and signal preferences to a DO file You open the DO file later to recreate the Wave window as it appeared when the file was created Format files are design specific use them only with the design you were simulating when they were created 1 Save a format file a Select File gt Save gt Format b Leave the file name set to wave do and click Save c Close the Wave window 2 Load a format file a In the Main window select View gt Debug Windows gt Wave signals and cursor s that you had set are gone b Inthe Wave window select File gt Open gt Format c Select wave do and click Open ModelSim restores the window to its previous state d Close the Wave window when you are finished by selecting File gt Close Saving the window format 59 ModelSim Tutorial T 60 Lesson 5 Viewing simulations in the Wave window Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim Tutorial Lesson 6 Debugg
25. the Start address and Verilog Hex 3e 300 as the End address belly Binary This means that you will be loading the file from 0 to 300 However the 3f reloc mem file contains only 251 addresses of data Addresses 251 to 300 will be loaded with the fill data you specify next Filename reloc mem Browse Data Load d For File Load enter reloc mem in the Filename field Fil Type e For Data Load select a Fill Type of Increment value Increment f Inthe Fill Data field set the seed value of 0 for the incrementing data Decrement Skip P 0 word s g Click OK Random s h View the data near address 250 by double clicking on any address in the OK EET Address column and entering 250 You can see the specified range of addresses overwritten with the new data Also Figure 66 Overwritten values in memory instance you can see the incrementing data beginning at address 251 Figure 66 Now before you leave this section go ahead and clear the instances already being ES ram_tb spram3 mem viewed 246 00000000000000000010010000011110 247 00000000000000000010010000011111 248 00000000000000000010010000100000 4 Right click somewhere in the mem 2 pane and select Close AIL 249 00000000000000000010010000100001 250 00000000000000000010010000100010 251 00000000000000000000000000000000 252 00000000000000000000000000000001 253 00000000000000000000000000000010 254 0000000000000000000000000000001
26. the data pane b 30 in the dialog box c Click OK The requested address appears in the top line of the window ModelSim Tutorial Figure 58 Memory window new address radix and line length E ram_tb sprami mem 00101000 00101001 00101010 00101011 00101100 00101101 00101110 00101111 00110000 00110001 00110010 00110011 00110100 annn 1 2 3 4 5 6 7 8 a M Ot J Figure 59 The Goto dialog box E Aram tb spram1 mem 00101000 00101001 00101010 00101011 00101100 yi Goto Memory 00101101 Goto Address 00101110 00101111 a0 00110000 00110001 00110010 00110011 00110100 1a Edit the address location directly To quickly move to a particular address do the following a Double click any address in the address column b Enter any desired address Figure 60 Press lt Enter gt on your keyboard The pane scrolls to that address Now let s find a particular data entry a Right click anywhere in the data column and select Find The Find in dialog box opens Figure 61 Type 11111010 in the Find data field and click Find Next The data scrolls to the first occurrence of that address Click Find Next a few more times to search through the list Click Close to close the dialog box Figure 60 Edit the address directly Viewing a memory T 77 ram1 mem 01000110 01000111 01001000 01001001 01
27. txt Browse Append to file OK Cancel ModelSim Tutorial T 96 Lesson 8 Simulating with Code Coverage Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Type quit sim at the VSIM prompt ModelSim Tutorial Lesson 9 Waveform Compare Topics The following topics are covered in this lesson Introduction Design files for this lesson Related reading Creating the test dataset Verilog VHDL Comparing the simulation runs Viewing comparison data es ae Viewing comparison data in the Main window Viewing comparison data in the Wave window Viewing comparison data in the List window Saving and reloading comparison data Lesson wrap up D Note The functionality described in this tutorial requires a compare license feature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 98 T 98 T 98 T 100 T 100 T 101 T 102 T 103 T 103 T 103 T 104 T 105 T 107 T 97 ModelSim Tutorial T 98 Lesson 9 Waveform Compare Introduction Waveform Compare computes timing differences between test signals and reference signals The general procedure for comparing waveforms has four main steps 1 Selecting the simulations or datasets to compare 2 Specifying the signals or regions to compare 3 Running the comparison 4 Viewing the compar
28. using default file names the dialog should ca already have the correct files specified Figure 93 e Click OK The comparison reloads My Documents Sr My Computer om T My Network Places Log Files wlf 3b Figure 93 Reloading saved comparison data Reload and Redisplay Compare Differences OF X Waveform Rules file name compare ru Browse Waveform Difference file name compare df Browse ModelSim Tutorial Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation and close the gold wif dataset 1 Type quit sim at the VSIM gt prompt 2 dataset close gold at the ModelSim gt prompt Lesson wrap up T 107 ModelSim Tutorial T 108 Lesson 9 Waveform Compare ModelSim Tutorial Lesson 10 Automating ModelSim Topics The following topics are covered in this lesson Introduction Related reading Creating a simple DO file Running ModelSim in command line mode Using Tcl with ModelSim Lesson Wrap up T 110 T 110 T 111 T 113 T 116 T 118 T 109 ModelSim Tutorial T 110 Lesson 10 Automating ModelSim Introduction Aside from executing a couple of pre existing DO files the previous lessons focused on using ModelSim in interactive mode executing single commands one after another via the GUI menus or Main window command line In situations where you have repetit
29. 00000000000 00100000000000000000000000000000 0 00100000000000000000000000000000 00100000000000000000000000000000 0000 1 00100000000000000000000000000000 00100000000000000000000000000000 SS Saving and reloading comparison data You can save comparison data for later viewing either in a text file or in files that can be reloaded into ModelSim To save comparison data so it can be reloaded into ModelSim you must save two files First you save the computed differences to one file next you save the comparison configuration rules to a separate file When you reload the data you must have the reference dataset open 1 Save the comparison data to a text file Select Tools Waveform Compare Differences Write Report b Click Save This saved compare txt to the current directory Figure 91 c Type notepad compare txt at the VSIM gt prompt d Close Notepad when you are done reviewing the report 2 Save the comparison data in files that can be reloaded into ModelSim Select Tools gt Waveform Compare gt Differences gt Save b Click Save This saved compare dif to the current directory Select Tools Waveform Compare Rules Save d Click Save This saved compare rul to the current directory e Select Tools Waveform Compare End Comparison Saving and reloading comparison data Figure 91 Coverage data saved to a text file ini xi File Edi Window compare tst Total signals compared
30. 00000004 00000006 1e 1f 00000008 20 21 0000000a 0000000 24 25 0000000e 26 27 b tb v Figure 68 Changing memory contents for range of addresses Change Memory x Instance Name dram _tb dpram1 m Address Range CAI 4 Addresses E End 0x00000009 Start 0x00000006 Fill C Value Increment C Decrement Random Fill Data 0 Skip 0 word s OK Cancel Apply Figure 69 Random contents of a range of addresses E ram_tb dpram1 mem 00000000 06 03 00000002 7a 1b 00000004 1c 1d 00000006 92 40 00000008 04 31 0000000 0000000 lt 24 25 0000000e 26 27 WENNE DER Y Jc Non 2b 26 ed ModelSim Tutorial T 82 Lesson 7 Viewing and initializing memories 3 Change contents by highlighting You can also change data by highlighting them in the Address Data pane a Highlight the data for the addresses 0x0000000c 0x0000000e as shown in Figure 70 Right click the highlighted data and select Change This brings up the Change dialog box Figure 71 Note that the Addresses field is already populated with the range you highlighted Select Value as the Fill Type Enter the data values into the Fill Data field as follow 34 35 36 Click OK The data in the address locations change to the values you enter
31. 001010 01001011 01001100 01001101 01001110 37 39 40 41 01001111 01010000 01010001 01010010 42 8T 05 00 I Fr mem f mem 1 ram Figure 61 Find in searching for data value ram tb spram1 mem 92 10000100 El 10001111 ond p ES A 94 1OOC PETS 35 100 36 100 doi Find data 11111010 Find Next 38 100 jh Repl Jobi Replace with eplace 100 100 Replace Al 101 100 102 1000 J Find backwards 103 100 104 1001 Example Find Patterns Close mem mem T ram tv 1234 101 011 05 hfa38 ModelSim Tutorial T 78 Lesson 7 Viewing and initializing memories Saving memory contents to a file Figure poc eave MEMO Y MADE x You can save memory contents to a file that can be loaded at some later point in mE xl simulation nstance Name Aram tb spram1 mem 1 Save a memory pattern from the ram_tb spram1 mem instance to a file a Make sure ram_tb spraml mem is open and selected in the MDI frame Address Range b Select File gt Save to bring up the Save Memory dialog box Figure 62 Al c Forthe Address Radix select Decimal Addresses in decimal d For the Data Radix select Binary start 0 End 4095 e Typedata mem mem into the Filename field f Click OK m File Format You can view the saved file in any editor C Verilog H
32. 00101011 0 E 1 The addresses in instance ram_tb spram3 mem are updated with the data 2 3 4 00000000000000000000000000101100 5 6 7 8 from data_mem mem Figure 64 00000000000000000000000000101101 00000000000000000000000000101110 00000000000000000000000000101111 00000000000000000000000000110000 3 00000000000000000000000000110001 io 00000000000000000000000000110010 ii 00000000000000000000000000110011 12 00000000000000000000000000110100 E B mem mem 1 tb v mem 2 J ModelSim Tutorial T 80 Lesson 7 Viewing and initializing memories In this next step you will experiment with loading from both a file and a fill Figure 65 Loading a relocatable memory file pattern You will initialize spram3 with the 250 addresses of data you saved S lt Load memory previously into the relocatable file reloc mem You will also initialize 50 Instance Name additional address entries with a fill pattern fram tb spramS mem is r Load Type Address Range 3 Load the ram_tb spram3 mem instance with a relocatable memory pattern Le Ele on ee reloc mem and a fill pattern pata Only Addresses in decimal a Right click in the data column of the mem 2 tab and select Load to Both File and Data Start 0 End 300 bring up the Load Memory dialog box Figure 65 3d m File Load b For Load Type select Both File and Data Eat c Address Range select Addresses and enter 0 as
33. 01011000 01011110 01100100 01101010 01110000 marinn 00101001 00101010 00101111 00110000 00110101 00110110 00111011 00111100 01000001 01000010 01000111 01001000 01001101 01001110 01010011 01010100 01011001 01011010 01011111 01100000 01100101 01100110 01101011 01101100 01110001 01110010 333633535 00101011 00110001 00110111 00111101 01000011 01001001 01001111 01010101 01011011 01100001 01100111 01101101 01110011 1111360601 00101100 00110010 00111000 00111110 01000100 01001010 01010000 01010110 01011100 01100010 01101000 01101110 01110100 mmn 00101101 00110011 00111001 00111111 01000101 01001011 01010001 01010111 01011101 01100011 01101001 01101111 01110101 1131360131 mem f mem 1 Figure 57 Changing the address radix BITTCENEESSSU x Address Radis Hexadecimal Decimal e Cc C Cc C C Data Radix Symbolic Binary Octal Decimal Unsigned Hexadecimal Line Wrap C Fit in Window Words per Line 1 OK Cancel ModelSim Tutorial T 76 Lesson 7 Viewing and initializing memories Navigating within the memory You can navigate to specific memory address locations or to locations containing particular data patterns First you will go to a specific address Use Goto to find a specific address a Right click anywhere in address column and select Goto Figure 59 The Goto dialog box opens in
34. 1 255 00000000000000000000000000000100 256 00000000000000000000000000000101 257 00000000000000000000000000000110 258 00000000000000000000000000000111 259 00000000000000000000000000001000 ncn mnannnnannnnnnnnnnnmnnmnmnnnmnnmnmnnnnmnm nnA1n NAM LEA ModelSim Tutorial Interactive debugging commands The memory panes can also be used interactively for a variety of debugging purposes The features described in this section are useful for this purpose 1 Open a memory instance and change its display characteristics a Double click instance ram tb dpram1 mem in the Memories tab b Right click in the memory contents pane and select Properties c Change the Data Radix to Hexadecimal d Select Words per line and enter 2 e Click OK 2 Initialize a range of memory addresses from a fill pattern a Right click in the data column of ram_tb dpraml mem contents pane and select Change to open the Change Memory dialog Figure 68 b Click the Addresses radio button and enter the start address as 0x00000006 and the end address as 0x00000009 The Ox hex notation is optional c Select Random as the Fill Type d Enter 0 as the Fill Data setting the seed for the Random pattern e Click OK The data in the specified range are replaced with a generated random fill pattern Figure 69 Interactive debugging commands T 81 Figure 67 Original memory contents BS ram tb dprami mem 00000000 06 03 00000002 1b
35. 1 125 T 3 ModelSim Tutorial T 4 ModelSim Tutorial Introduction Topics The following topics are covered in this chapter Assumptions Where to find our documentation Technical support and updates Before you begin Example designs T 6 T 7 T 8 T 9 T 9 ModelSim Tutorial T 6 Introduction Assumptions We assume that you are familiar with the use of your operating system If you are not familiar with Microsoft Windows we recommend that you work through the tutorials provided with MS Windows before using ModelSim We also assume that you have a working knowledge of VHDL and or Verilog Although ModelSim is an excellent tool to use while learning HDL concepts and practices this document is not written to support that goal ModelSim Tutorial Where to find our documentation ModelSim documentation is available from our website at www model com support or in the following formats and locations Document Format How to get it ModelSim Installation amp Licensing Guide paper shipped with ModelSim PDF select Help gt Documentation also available from the Support page of our web site www model com ModelSim Quick Guide command and feature quick reference paper shipped with ModelSim PDF select Help Documentation also available from the Support page of our web site www model com ModelSim Tutorial PDF HTML select Help Documentation also a
36. 104 Lesson 9 Waveform Compare Viewing comparison data in the List window You can also view the results of your waveform comparison in the List window 1 Add comparison data to the List window Select View gt Debug Windows gt List from the Main window menu bar b Drag the test sm comparison object from the compare tab of the Main window to the List window Scroll down the window Differences are noted with yellow highlighting Figure 90 Differences that have been annotated have red highlighting ModelSim Tutorial Figure 90 Compare differences in the List window LE lolx File Edit View Tools Window psy deltay 30000 35000 100000 110000 115000 120000 130000 135000 140000 150000 151000 155000 160000 170000 171000 compare test_su into lt into E 0 00000000000000000000000000000000 00000000000000000000000000000000 ooooc 0 00100000000000000000000000000000 00100000000000000000000000000000 0000 0 00100000000000000000000000000000 00100000000000000000000000000000 0000 0 00100000000000000000000000000000 00100000000000000000000000000000 0000C 0 00000000000000000000000000010000 00000000000000000000000000010000 0000 0 00000000000000000000000000010000 00000000000000000000000000010000 0 00000000000000000000000000010000 00000000000000000000000000010000 0 0 0 1 0 00100000000000000000000000000000 00100000000000000000000000000000 0 001000000000000000000
37. 5 T 27 T 29 ModelSim Tutorial T 20 Lesson 2 Basic simulation Introduction In this lesson you will go step by step through the basic simulation flow Design files for this lesson The sample design for this lesson is a simple 8 bit binary up counter with an associated testbench The pathnames are as follows Verilog lt install_dir gt modeltech examples counter v and tcounter v VHDL install dir modeltech examples counter vhd and tcounter vhd This lesson uses the Verilog files counter v and tcounter v in the examples If you have a VHDL license use counter vhd and tcounter vhd instead Or if you have a mixed license feel free to use the Verilog testbench with the VHDL counter or vice versa Related reading ModelSim User s Manual Chapter 3 Design libraries UM 51 Chapter 5 Verilog simulation UM 97 Chapter 4 VHDL simulation UM 65 ModelSim Command Reference vlib CR 281 vmap CR 293 vlog CR 282 vcom CR 237 and view CR 257 commands ModelSim Tutorial Creating the working design library T 21 Creati ng the worki ng desig n library Figure 1 The Welcome to ModelSim dialog 4 IMPORTANT Information Ini xi Before you can simulate a design you must first create a library and compile the W Model Welcome to ModelSim 6 0 ev source code into that library IMPORTANT Information 1 Create a new directory and copy the tutorial files into it Key Informat
38. 6 This dialog lets you browse to find files specify the file type specify which folder to add the file to and identify whether to leave the file in its current location or to copy it to the project directory b Click Browse c Open the examples directory in your ModelSim installation tree d Verilog Select counter v hold the Ctrl key down and then select tcounter v VHDL Select counter vhd hold the Ctrl key down and then select tcounter vhd e Click Open and then OK f Click Close to dismiss the Add items to the Project dialog ModelSim Tutorial Figure 15 Adding new items to a project x ModelSim File Edit View Format Compile Simulate Add Tools Window Help lue Se c id gti i amp 5 SR amp Contains t ini x i Add items to the Project 4 xj Statul T i 5 R Name mm creel ed Click on the icon to add items of that type Create New File Add Existing File FSS SSS EEE a Project Library Create Simulation Create New Folder Loading project test ModelSim gt Project test No Design Loaded gt Figure 16 The Add file to Project dialog y Add file to Project File Name counter vcounter v Browse file as type Folder default zz files vi Reference from current location Copy to project directory You should now see two files listed in the
39. 9 ModelSim Tutorial T 120 License Agreement of the Beta Code shall not be construed as marketing or offering to sell a license to the Beta Code which Mentor Graphics may choose not to release commercially in any form If Mentor Graphics authorizes you to use the Beta Code you agree to evaluate and test the Beta Code under normal conditions as directed by Mentor Graphics You will contact Mentor Graphics periodically during your use of the Beta Code to discuss any malfunctions or suggested improvements Upon completion of your evaluation and testing you will send to Mentor Graphics a written evaluation of the Beta Code including its strengths weaknesses and recommended improvements You agree that any written evaluations and all inventions product improvements modifications or developments that Mentor Graphics conceived or made during or subsequent to this Agreement including those based partly or wholly on your feedback will be the exclusive property of Mentor Graphics Mentor Graphics will have exclusive rights title and interest in all such property The provisions of this subsection shall survive termination or expiration of this Agreement 4 RESTRICTIONS ON USE You may copy Software only as reasonably necessary to support the authorized use Each copy must include all notices and legends embedded in Software and affixed to its medium and container as received from Mentor Graphics copies shall remain the property of Mentor Graphics o
40. AGE EXPENSE OR LIABILITY INCLUDING ATTORNEYS FEES ARISING OUT OF OR IN CONNECTION WITH YOUR USE OF SOFTWARE AS DESCRIBED IN SECTION 7 INFRINGEMENT 9 1 Mentor Graphics will defend or settle at its option and expense any action brought against you alleging that Software infringes a patent or copyright or misappropriates a trade secret in the United States Canada Japan or member state of the European Patent Office Mentor Graphics will pay any costs and damages finally awarded against you that are attributable to the infringement action You understand and agree that as conditions to Mentor Graphics obligations under this section you must a notify Mentor Graphics promptly in writing of the action b provide Mentor Graphics all reasonable information and assistance to defend or settle the action and c grant Mentor Graphics sole authority and control of the defense or settlement of the action 9 2 If an infringement claim is made Mentor Graphics may at its option and expense a replace or modify Software so that it becomes noninfringing b procure for you the right to continue using Software or c require the return of Software and refund to you any license fee paid less a reasonable allowance for use 9 3 Mentor Graphics has no liability to you if infringement is based upon a the combination of Software with any product not furnished by Mentor Graphics b the modification of Software other than by Mentor Graphics c t
41. Click OK Transcript The Project tab now shows a Simulation Configuration named counter R ITS LICENSORS Figure 27 8 8 Folder project open C 6 0 Tutorial exa Folder mples test 2 Load the Simulation Configuration countetv yf Verilog vede digi suh odelSim wm title ModelSim a Double click the counter Simulation Configuration in the Project tab tcounter v Verlog Compile of tcounter v was succ counter Simulation l cessful Compile of counter v was succe ssful 2 compiles 0 failed with no error In the Transcript pane of the Main window the vsim the ModelSim simulator invocation shows the hazards and t ps switches Figure 28 These are the command line equivalents of the options you specified in the Simulate dialog ModelSim gt Project test No Design Loaded No Conte Project Library xt ModelSim Tutorial T 40 Lesson 3 ModelSim projects Lesson wrap up This concludes this lesson Before continuing you need to end the current simulation and close the current project 1 Select Simulate End Simulation Click Yes 2 Select the Project tab in the Main window Workspace 3 Right click the test project to open a context popup menu and select Close Project If you do not close the project it will open automatically the next time you start ModelSim ModelSim Tutorial Figure 28 Transcript shows options used for Simulation Configu
42. Ha x rName Status Type Order Mi t 7 PROPERTY OF MEN 06 TOR GRAPHICS CORPORATI Verilog 1 ON OR ITS LICENSORS Verilog 0 06 ft ModelSim gt wm title ModelSim counter v tcounter v D cd C 6 0 Tutorial examples reading modelsim ini Loading project test 4 4 Project Library ModelSim Project test No Design Loaded No Context Figure 18 The Compile Order dialog box Compile Order xj Current Order n counter vhd tcounter vhd move up down buttons Auto Generate ModelSim Tutorial T 36 Lesson 3 ModelSim projects Compiling and loading a design Compile the files a Right click anywhere in the Project tab and select Compile Compile from the pop up menu ModelSim compiles both files and changes the symbol in the Status column to a check mark A check mark means the compile succeeded If the compile had failed the symbol would be a red X and you would see an error message in the Transcript pane 2 View the design units Click the Library tab in the workspace b Click the icon next to the work library You should see two compiled design units their types modules in this case and the path to the underlying source files Figure 19 3 Load the fest counter design unit a Double click the test counter design unit You should see a new tab named sim that displays the structure of the test counter de
43. NTOR GRAPHICS NOR ITS LICENSORS MAKE ANY OTHER WARRANTIES EXPRESS IMPLIED OR STATUTORY WITH RESPECT TO SOFTWARE OR OTHER MATERIAL PROVIDED UNDER THIS AGREEMENT MENTOR GRAPHICS AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND NON INFRINGEMENT OF INTELLECTUAL PROPERTY LIMITATION OF LIABILITY EXCEPT WHERE THIS EXCLUSION OR RESTRICTION OF LIABILITY WOULD BE VOID OR INEFFECTIVE UNDER APPLICABLE LAW IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS BE LIABLE FOR INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES INCLUDING LOST PROFITS OR SAVINGS WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY EVEN IF MENTOR GRAPHICS OR ITS LICENSORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS LIABILITY UNDER THIS AGREEMENT EXCEED THE AMOUNT PAID BY YOU FOR THE SOFTWARE OR SERVICE GIVING RISE TO THE CLAIM IN THE CASE WHERE NO AMOUNT WAS PAID MENTOR GRAPHICS AND ITS LICENSORS SHALL HAVE NO LIABILITY FOR ANY DAMAGES WHATSOEVER LIFE ENDANGERING ACTIVITIES NEITHER MENTOR GRAPHICS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY DAMAGES RESULTING FROM OR IN CONNECTION WITH THE USE OF SOFTWARE IN ANY APPLICATION WHERE THE FAILURE OR INACCURACY OF THE SOFTWARE MIGHT RESULT IN DEATH OR PERSONAL INJURY INDEMNIFICATION YOU AGREE TO INDEMNIFY AND HOLD HARMLESS MENTOR GRAPHICS AND ITS LICENSORS FROM ANY CLAIMS LOSS COST DAM
44. Project tab of the Workspace pane Figure 17 Question mark icons in the Status column mean the file hasn t been compiled or the source file has changed since the last successful compile The other columns identify file type e g Verilog or VHDL compilation order and modified date Changing compile order VHDL Compilation order is important in VHDL designs Follow these steps to change compilation order within a project 1 Change the compile order a Select Compile Compile Order This opens the Compile Order dialog box Figure 18 Click the Auto Generate button ModelSim determines the compile order by making multiple passes over the files It starts compiling from the top if a file fails to compile due to dependencies it moves that file to the bottom and then recompiles it after compiling the rest of the files It continues in this manner until all files compile successfully or until a file s can t be compiled for reasons other than dependency Alternatively you can select a file and use the Move Up and Move Down buttons to put the files in the correct order Click OK to close the Compile Order dialog Creating a new project T 35 Figure 17 Newly added project files display a for status x ModelSim File Edit View Format Compile Simulate Add Tools Window Help wi amp Contains f UE PS 551 3 EL SH ame vw iz Workspace
45. ads without errors Linking to the resource library T 47 Figure 33 Specifying a search library in the Simulate dialog 5 Design VHDL Verilog Libraries SDF Options m Search Libraries L C 6 0 Tutorial resource_library parts_lib Add Modify Delete Search Libraries First Lf Add Modify LE ModelSim Tutorial T 48 Lesson 4 Working with multiple libraries Linking in VHDL To link to a resource library in VHDL you have to create a logical mapping to the physical library and then add LIBRARY and USE statements to the source file 1 Create a logical mapping to parts lib Select File gt New gt Library a b Inthe Create a New Library dialog select a map to an existing library c Type parts lib in the Library Name field Qa Click Browse to open the Select Library dialog and browse to parts_lib in the resource_library directory you created earlier in the lesson Click OK to select the library and close the Select Library dialog e The Create a New Library dialog should look similar to the one shown in Figure 34 Click OK to close the dialog 2 Add LIBRARY and USE statements to tcounter vhd a Inthe Library tab of the Main window click the icon next to the work library b Right click test counter in the work library and select Edit This opens the file in the Source window c Add these two line
46. ains text like Error vsim 3033 you can view more detail by using the verror command b Type verror 3033 at the ModelSim gt prompt The expanded error message tells you that a design unit could not be found for instantiation It also tells you that the original error message should list which libraries ModelSim searched In this case the original message says ModelSim searched only work VHDL 1 Simulate a VHDL design with a missing resource library a In the Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports a warning Figure 32 When you see a message that contains text like Warning vsim 3473 you can view more detail by using the verror command b verror 3473 at the ModelSim gt prompt The expanded error message tells you that a component dut in this case has not been explicitly bound and no default binding can be found c Type quit sim to quit the simulation ModelSim Tutorial Figure 31 Verilog simulation error reported in the Main window Transcript Top level modules counter cd C 6 0 Tutorial testbench Loading project counter Compile of tcounter v was successful ModelSim gt vsim work test counter vsim work test counter Loading work test counter Error vsim 3033 C 6 0 Tutorial testbench tcounter v 9 Instantiation of counter failed The design unit was not found R
47. all accompanying items within five days after receipt of Software and receive a full refund of any license fee paid END USER LICENSE AGREEMENT GRANT OF LICENSE The software programs you are installing downloading or have acquired with this Agreement including any updates modifications revisions copies documentation and design data Software are copyrighted trade secret and confidential information of Mentor Graphics or its licensors who maintain exclusive title to all Software and retain all rights not expressly granted by this Agreement Mentor Graphics grants to you subject to payment of appropriate license fees a nontransferable nonexclusive license to use Software solely a in machine readable object code form b for your internal business purposes and c on the computer hardware or at the site for which an applicable license fee is paid or as authorized by Mentor Graphics A site is restricted to a one half mile 800 meter radius Mentor Graphics standard policies and programs which vary depending on Software license fees paid or service plan purchased apply to the following and are subject to change a relocation of Software b use of Software which may be limited for example to execution of a single session by a single user on the authorized hardware or for a restricted period of time such limitations may be communicated and technically implemented through the use of authorization codes or similar devices c
48. are T 97 compile order changing T 35 compiling your design T 13 T 23 cover argument T 87 coverage argument T 88 coverage report command T 95 cursors Wave window T 56 D Dataflow window T 61 displaying hierarchy T 68 expanding to drivers readers T 64 options T 68 tracing events T 65 tracing unknowns T 67 dataset close command T 107 design library working type T 16 DO files T 109 documentation T 7 drivers expanding to T 64 E error messages more information T 46 external libraries linking to T 46 F folders in projects T 37 format saving for Wave window T 59 H hierarchy displaying in Dataflow window T 68 L libraries design library types T 16 linking to external libraries T 46 mapping to permanently T 49 resource libraries T 16 working libraries T 16 working creating T 21 linking to external libraries T 46 T 125 ModelSim Tutorial T 126 Index M macros T 109 manuals T 7 mapping libraries permanently T 49 memories changing values T 81 initializing T 79 viewing T 71 memory contents saving to a file T 78 Memory window T 71 N notepad command T 105 O options simulation T 39 P physical connectivity T 64 projects T 31 adding items to T 34 creating T 33 flow overview T 15 organizing with folders T 37 simulation configurations T 39 Q quit command T 46 ModelSim Tutorial R radix command T 74 reference dataset Waveform Compare T 99 reference signals T 98
49. balloon will pop up with the value Figure 12 e highlight the count variable in the Source window right click it and select Examine from the pop up menu e use the examine command to output the value to the Main window Transcript i e examine count 5 Try out the step commands a Click the Step icon on the Main window toolbar This single steps the debugger Experiment on your own Set and clear breakpoints and use the Step Step Over and Continue Run commands until you feel comfortable with their operation ModelSim Tutorial Figure 12 Resting the mouse pointer on a variable in the Source view 216 32 33 34 35 C 6 0 Tutorial examp 22 for i 4 bO carry 4 bl amp amp i lt 7 i it 23 begin 24 increment i val i carry 25 carry val i amp carry 26 end 27 end 28 endfunction 29 30 always posedge clk or posedge reset if reset cogunt ftpd reset to count S h00 else count rement count ftest counter dut count hr XXXXXXXX AAA A QJ counter v Figure 13 Values shown in the Objects window count clk reset tpd_reset_to_count 3 Parameter Internal tpd clk to count 2 Parameter Internal NMNRMNMM Reg Out 50 Net In SH Net In Lesson wrap up T 29 Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation 2 Click Yes when pr
50. be binding upon your heirs successors in interest and assigns The provisions of this section 4 shall survive the termination or expiration of this Agreement 5 LIMITED WARRANTY 5 1 Mentor Graphics warrants that during the warranty period Software when properly installed will substantially conform to the functional specifications set forth in the applicable user manual Mentor Graphics does not warrant that Software will meet your requirements or that operation of Software will be uninterrupted or error free The warranty period is 90 days starting on the 15th day after delivery or upon installation whichever first occurs You must notify Mentor Graphics in writing of any nonconformity within the warranty period This warranty shall not be valid if Software has been subject to misuse unauthorized modification or installation MENTOR GRAPHICS ENTIRE LIABILITY AND YOUR EXCLUSIVE REMEDY SHALL BE AT MENTOR GRAPHICS OPTION EITHER A REFUND OF THE PRICE PAID UPON RETURN OF SOFTWARE TO MENTOR GRAPHICS OR B MODIFICATION OR REPLACEMENT OF SOFTWARE THAT DOES NOT MEET THIS LIMITED WARRANTY PROVIDED YOU HAVE OTHERWISE COMPLIED WITH THIS AGREEMENT MENTOR GRAPHICS MAKES NO WARRANTIES WITH RESPECT TO A SERVICES B SOFTWARE WHICH IS LICENSED TO YOU FOR A LIMITED TERM OR LICENSED AT NO COST OR C EXPERIMENTAL BETA CODE ALL OF WHICH ARE PROVIDED AS IS ModelSim Tutorial 5 2 THE WARRANTIES SET FORTH IN THIS SECTION 5 ARE EXCLUSIVE NEITHER ME
51. call that gold wif is from the first simulation run Leaving the test dataset set to Use Current Simulation click Next d Select Compare All Signals in the second dialog and click Next Figure 86 e Inthe next three dialogs click Next Compute Differences Now and Finish respectively ModelSim performs the comparison and displays the compared signals in the Wave window ModelSim Tutorial Figure 85 First dialog of the Comparison Wizard Comparison Wizard The first step in creating a 2 comparison is to open the reference Reference Dataset and test datasets wlf files aola wif Browse 1b m Test Dataset Either dataset can be a saved wif file or a dataset that is already opened Use the Browse buttons to browse for a saved dataset or click the down arrow to select a file from the dataset selection history Use Current Simulation 1c IV Update comparison after each run C Specify Dataset E lt Previous Next gt Cancel Figure 86 Second dialog of the Comparison Wizard Comparison Wizard With the reference and test datasets selected the next step is to select a MES comparison method CD ARD MENO 1 Compare All Signals compares all signals in the test dataset against the signals in the reference dataset Compare Top Level Ports Compare Top Level Ports compares Specify Comparison by Signal the
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53. configuration that associates the design and its options The configuration is RS m then listed in the Project tab and you can double click it to load counter v along iB test counter Mode EAEE with its options vital2000 Library MODEL TECH vital2000 I ice Library MODEL_TECH ieee E Il modelsim lib Library MODEL_TECH modelsim_lib 1 Create a new Simulation Configuration std Library MODEL std P std_developerskit Library MODEL_TECH std_developerskit a Select File gt Add to Project gt Simulation Configuration Library SMODEL TECH syropsjs m _ TOCU This opens the Simulate dialog Figure 26 The tabs in this dialog ETT PUR resent a myriad of simulation options You may want to explore the tabs Jwork test_counter os vi le to see what s available You can consult the ModelSim User s Manual to Optimization get a description of each option Enable optimization Optimization Options b counter in the Simulation Configuration Name field OK c Select HDL from the Place in Folder drop down d Click the icon next to the work library and select test counter Figure 2 Similation the Project D e Click the Resolution drop down and select ps ModelSim File Edit View Format Compile Simulate Add Tools Window Help f For Verilog click the Verilog tab and check Enable Hazard Checking g
54. continues running until you execute a break command or it hits a statement in your code e g a Verilog stop statement that halts the simulation d Click the Break icon The simulation stops running ModelSim Tutorial Setting breakpoints and stepping in the Source window Next you will take a brief look at one interactive debugging feature of the ModelSim environment You will set a breakpoint in the Source window run the simulation and then step through the design under test Breakpoints can be set only on lines with red line numbers 1 Open counter v in the Source window a Select the Files tab in the Main window Workspace b Double click counter v to add it to the Source window Set a breakpoint on line 31 of counter v if you are simulating the VHDL files use line 30 instead a Scroll to line 31 and click on the line number A red ball appears next to the line Figure 10 indicating that a breakpoint has been set Disable enable and delete the breakpoint a Click the red ball to disable the breakpoint It will become a black circle b Click the black circle to re enable the breakpoint It will become a red ball c Click the red ball with your right mouse button and select Remove Breakpoint 31 d Click on line number 31 again to re create the breakpoint Restart the simulation a Click the Restart icon to reload the design elements and reset the simulation time to zero The Restart dialog that appears g
55. directory you created in step 1 Create the resource library a Select File New Library b parts lib in the Library Name field Figure 29 The Library Physical Name field is filled out automatically Once you click OK ModelSim creates a directory for the library lists it in the Library tab of the Workspace and modifies the modelsim ini file to record this new library for the future Creating the resource library T 43 Figure 29 Creating the new resource library Create a New Library Create anew library and a logical mapping to it C to an existing library m Library Name parts lit m Library Physical Name parts_lib OK Cancel ModelSim Tutorial T 44 Lesson 4 Working with multiple libraries 5 Compile the counter into the resource library a Click the Compile icon on the Main window toolbar b Select the parts lib library from the Library list Figure 30 c Double click counter v to compile it d Click Done You now have a resource library containing a compiled version of the counter design unit Change to the testbench directory a Select File gt Change Directory and change to the testbench directory you created in step 2 ModelSim Tutorial Figure 30 Compiling into the resource library Library parts ib 5b Look in resource library ex EE File name counter v Files of type HDL Fi
56. e lesson you enabled two state toggle coverage 0 gt 1 and 1 GEE 7 gt 0 with the cover t argument Alternatively you can enable six state toggle um n 1 1 coverage using the cover x argument See Toggle coverage UM 299 for more 12525 12498 2 9 395271 85922 2 8 0 15631 15624 G3 QJ GO o gt 1 View toggle data in the Objects pane of the Main window Select test_sm in the sim tab of the Main window 100 100 b Ifthe Objects pane isn t open already select View gt Debug Windows gt 100 100 Objects Scroll to the right and you will see the various toggle coverage columns Figure 82 The blank columns show data when you have extended toggle coverage enabled ModelSim Tutorial T 94 Lesson 8 Simulating with Code Coverage Excluding lines and files from coverage statistics ModelSim allows you to exclude lines and files from code coverage statistics You can set exclusions with the GUI with a text file called an exclusion filter file or with pragmas in your source code Pragmas are statements that instruct ModelSim to not collect statistics for the bracketed code See Excluding objects from coverage UM 303 for more details on exclusion filter files and pragmas 1 Exclude a line via the Missed Coverage pane a Right click a line in the Missed Coverage pane and select Exclude Selection You can also exclude the selection for the current instance only by selecting Exc
57. ed Figure 72 4 Edit data in place To edit only one value at a time do the following a b Double click any value in Data column Enter the desired value and press Enter When you are finished editing all values press the Enter key on your keyboard to exit the editing mode If you needed to cancel the edit function press the Esc key on your keyboard ModelSim Tutorial Instance Name Figure 70 Changing contents by highlighting Bj ram tb dprami mem 00000000 00000002 00000004 00000006 00000008 0000000a 000000 lt 000000 e 12 Figure 71 Entering data to change y Change Memory tb dpram1 mem Address Range Fill Type m zer C Al Value Addresses in hexadecimal Increment C Decrement Start 000000 End 0000000e C Random Fil Data Skip 0 word s OK Cancel Apply 00000000 00000002 00000004 00000006 00000008 0000000a 0000000c 0000000e 27 Fa iz NN gt BE Lesson Wrap up T 83 Lesson Wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim Tutorial T 84 Lesson 7 Viewing and initializing memories ModelSim Tutorial Lesson 8 Simulating with Code Coverage Topics
58. egion test_counter Searched libraries work Error loading design 4 ModelSim gt Figure 32 VHDL simulation warning reported in Main window Transcript cd C 6 0 Tutorial testbench Loading project counter Compile of tcounter vhd was successful ModelSim gt vsim work test_counter vsim work test_counter Loading C Modeltech 6 0 win32 std standard Loading work test_counter only Warning vsim 3473 Component dut is not bound Time Ons Iteration 0 Region test_counter File C 6 0 Tutorial testbench tcounter vhd VSIM 9 gt The process for linking to a resource library differs between Verilog and VHDL If you are using Verilog follow the steps in Linking in Verilog T 47 If you are using VHDL follow the steps in Linking in VHDL T 48 one page later Linking in Verilog Linking in Verilog requires that you specify a search library when you invoke the simulator 1 Specify a search library during simulation a b Click the Simulate icon on the Main window toolbar Click the icon next to the work library and select PER test counter Click the Libraries tab Click the Add button next to the Search Libraries field and browse to parts lib in the first directory you created earlier in the lesson Click OK The dialog should have parts lib listed in the Search Libraries field Figure 33 Click OK The design lo
59. ex No addresses r B Memory pattern files can be saved as relocatable files simply by leaving out the bes El Compress address information Relocatable memory files can be loaded anywhere in a memory because no addresses are specified Address Radix Data Radix 6 B 2 Save relocatable memory pattern file from the ram_tb spram2 mem instance Decimal Binary a Select the mem 1 tab in the MDI pane to see the data for the ram tb 2 kis spram2 mem instance 1 1d C Decimal b Right click on the memory contents to open a popup menu and select Unsigned Properties Hexadecimal c Inthe Properties dialog set the Address Radix to Decimal and the Data Radix to Binary Click OK to accept the changes and close the dialog Fi d Select File gt Save to bring up the Save Memory dialog box E So e Specify a Start address of 0 and End address of 250 8 mem mem Browse f For Address Radix select Decimal and for Data Radix select Binary ok EET g Click No addresses to create a memory pattern that you can use to relocate somewhere else in the memory or in another memory Te h Enter the file name as reloc mem then click OK to save the memory contents and close the dialog ModelSim Tutorial Initializing a memory T 79 You will use this file for initialization in the next section Figure 63 Load Memory dialog box ju Load Memory
60. he T 121 ModelSim Tutorial T 122 License Agreement 10 11 12 13 14 15 use of other than a current unaltered release of Software d the use of Software as part of an infringing process e a product that you make use or sell f any Beta Code contained in Software g any Software provided by Mentor Graphics licensors who do not provide such indemnification to Mentor Graphics customers or h infringement by you that is deemed willful In the case of h you shall reimburse Mentor Graphics for its attorney fees and other costs related to the action upon a final judgment 9 4 THIS SECTION 9 STATES THE ENTIRE LIABILITY OF MENTOR GRAPHICS AND ITS LICENSORS AND YOUR SOLE AND EXCLUSIVE REMEDY WITH RESPECT TO ANY ALLEGED PATENT OR COPYRIGHT INFRINGEMENT OR TRADE SECRET MISAPPROPRIATION BY ANY SOFTWARE LICENSED UNDER THIS AGREEMENT TERM This Agreement remains effective until expiration or termination This Agreement will immediately terminate upon notice if you exceed the scope of license granted or otherwise fail to comply with the provisions of Sections 1 2 or 4 For any other material breach under this Agreement Mentor Graphics may terminate this Agreement upon 30 days written notice if you are in material breach and fail to cure such breach within the 30 day notice period If Software was provided for limited term use this Agreement will automatically expire at the end of the authorized term Upon any terminati
61. he signal values change as you move the cursor This is perhaps the easiest way to examine the value of a signal at a particular time d Inthe waveform pane drag the cursor to the right of a transition with the mouse positioned over a waveform The cursor snaps to the transition Cursors snap to a waveform edge if you click or drag a cursor to within ten pixels of a waveform edge You can set the snap distance in the Window Preferences dialog select Tools Window Preferences e Inthe cursor pane drag the cursor to the right of a transition Figure 40 The cursor doesn t snap to a transition if you drag in the cursor pane ModelSim Tutorial Figure 40 Working with a single cursor in the Wave window wave default El x File Edit View Insert Format Tools Window sue x ema nores st 4 jest counter clk 8 4 test counter count 00010011 wat wat 4 jest counter reset Now 177 ns to 448 ns Now 1 us Delta 2 1e Using cursors in the Wave window 57 2 Rename the cursor Figure 41 Renaming a cursor a Right click Cursor 1 in the cursor name pane and select and delete the Ini x text Figure 41 File Edit View Insert Format Tools Window aK b Type A and press Enter SDS 5 Bas RM le EFi ELEY EI G a 1 QQ Bcoe The cursor name changes to A 4 Jtest_counter clk 4 jest counter reset 8 4 counter count 3 Jump
62. ill op nop ModelSim Tutorial T 92 Lesson 8 Simulating with Code Coverage d Hover your mouse pointer over a line of code with a green checkmark Figure 81 Coverage numbers shown by hovering the mouse pointer The icons change to numbers that indicate how many times the statements and branches in that line were executed Figure 81 In this case line 24 was executed 1562 times 18 reg rst clk 19 i 31 0 j dat e Select Tools gt Code Coverage gt Show coverage numbers I o wire 9 0 addr The icons are replaced by execution counts on every line An ellipsis 7 is displayed whenever there are multiple statements on the line Hover 23 task nop the mouse pointer over a statement to see the count for that statement 1562 24 EEE eee op wor 25 endtask f Select Tools Code Coverage Hide coverage numbers to return to 26 27 the ctrl op Icon display 28 task ctrl 29 input 7 0 data 30 begin X 31 5 into 4 b0001 28 b0 ctrl X 32 8 posedge clk X 33 f5 into data 34 end X 35 endtask Ae T EYE NET iv es El 4 ModelSim Tutorial Viewing toggle statistics in the Objects pane T 93 Viewing togg le statistics in the Ob Jects Figure 82 Toggle coverage columns in the Source window pane Objects 1H 0L HToggled Toggle coverage counts each time a logic node transitions from one state to ee dus Il another Earlier in th
63. im Tutorial Loading a design For the examples in this lesson we have used the design simulated in Lesson 2 Basic simulation 1 Ifyou just finished the previous lesson ModelSim should already be running If not start ModelSim a vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close 2 Loadthe design a Select File gt Change Directory and open the directory you created in Lesson 2 The work library should already exist b Click the icon next to the work library and double click test counter ModelSim loads the design and adds sim and Files tabs to the Workspace Loading a design T 53 ModelSim Tutorial T 54 Lesson 5 Viewing simulations in the Wave window Adding objects to the Wave Wi ndow Figure 37 A Wave window docked in the Main window ModelSim offers several methods for adding objects to the Wave window In this 280 4 jest counter clk exercise you will try different methods 4 test_counter reset 8 4 test counter count wxxxxxxx 1 Addobjects from the Objects pane a Selectan item in the Objects pane of the Main window right click and then select Add to Wave Signals in Region ModelSim adds several signals to the Wave window 2 Undock the Wave window By default ModelSim opens Wave windows as a tab in the MDI frame of the Main window You can change the default via the Preferences dia
64. ing the design T 63 ModelSim Tutorial T 64 Lesson 6 Debugging with the Dataflow window Exploring connectivity A primary use of the Dataflow window is exploring the physical connectivity of your design You do this by expanding the view from process to process This allows you to see the drivers receivers of a particular signal net or register 1 Adda signal to the Dataflow window a Make sure instance p is selected in the sim tab of the Workspace pane b Drag signal strb from the Objects pane to the Dataflow window Figure 44 2 Explore the design a Double click the net highlighted in red The view expands to display the processes that are connected to strb Figure 45 b Select signal test on process NAND 44 labeled line 62 in the VHDL version and click the Expand net to all drivers icon Notice that after the display expands the signal line for strb is highlighted in green This highlighting indicates the path you have traversed in the design Select signal oen on process ALWAYS 149 labeled line 75 in the VHDL version and click the Expand net to all readers icon Continue exploring if you wish When you are done click the Erase All icon p 8 a ModelSim Tutorial Figure 44 A signal in the Dataflow window ritas o MNT File Edit View Navigate Trace Tools Window amp x mJ 4 X RB O7 ee Ye 3e 3 AMA QA gt Extended mode enabled Keep 1 Aop p strb gt
65. ing with the Dataflow window Topics The following topics are covered in this lesson Introduction Related reading Compiling and loading the design Exploring connectivity Tracing events Tracing an X unknown Displaying hierarchy in the Dataflow window Lesson Wrap up gt Note The functionality described in this tutorial requires a dataflow license feature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 62 T 62 T 63 T 64 T 65 T 67 T 68 T 69 T 61 ModelSim Tutorial T 62 Lesson 6 Debugging with the Dataflow window Introduction The Dataflow window allows you to explore the physical connectivity of your design to trace events that propagate through the design and to identify the cause of unexpected outputs The window displays processes signals nets and registers and interconnect Design files for this lesson The sample design for this lesson is a testbench that verifies a cache module and how it works with primary memory A processor design unit provides read and write requests The pathnames to the files are as follows Verilog install dir modeltech examples dataflow verilog VHDL install dir modeltech examples dataflow vhdl This lesson uses the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Ve
66. ion Start by creating a new directory for this exercise in case other users will be ModelSim platform changes working with these lessons Product Changes Fro a Verilog Copy counter v and tcounter v files from lt install_dir gt examples Changes in ModelSim functionality to the new directory New Features VHDL Copy counter vhd and tcounter vhd files from lt install_dir gt The latest ModelSim features examples to the new directory ModelSim 6 0 Application Notes 2 Start ModelSim if necessary Performance Guidelines Y n Taking Advantage of SystemVerilog a vsim at a UNIX shell prompt or use the ModelSim icon in The ModelSim Debue GUI Windows SystemC Verification Comparing PSL and OVL Upon opening ModelSim for the first time you will see the Welcome to Verilog 2001 Ready For Use P ModelSim dialog Figure 1 Click Close Np 5 Select Jumpstart to Don t show this dialog again Men Jumpstart M Close b Select File gt Change Directory and change to the directory you created in step 1 Figure 2 The Create a New Library dialog 3 Create the working library Create a New Library E Create This opens a dialog where you specify physical and logical names for the f a library Figure 2 You can create a new library or map to an existing C a map to an existing library library We ll be doing the former a Select File New Library
67. ison results In this exercise you will run and save a simulation edit one of the source files run the simulation again and finally compare the two runs Design files for this lesson The sample design for this lesson consists of a finite state machine which controls a behavioral memory The testbench fest sm provides stimulus The ModelSim installation comes with Verilog and VHDL versions of this design The files are located in the following directories Verilog install dir modeltech examples compare verilog VHDL install dir modeltech examples compare vhdl This lesson uses the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Verilog and VHDL versions of the design Related reading Waveform Compare UM 240 Chapter 8 WLF files datasets and virtuals UM 195 ModelSim Tutorial Creating the reference dataset The reference dataset is the w f file that the test dataset will be compared against It can be a saved dataset the current simulation dataset or any part of the current simulation dataset In this exercise you will use a DO file to create the reference dataset 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from install dir modeltech examples compa
68. it 2 Enter commands to add signals to the Wave window force signals and run the simulation a a Select File gt New gt Source gt Do to create a new DO file Enter the following commands into the source window add wave count add wave clk add wave reset force freeze clk 00 1 50 ns r 100 force reset 1 run 100 force reset 0 run 300 force reset 1 run 400 force reset 0 run 200 3 Save the file a b Select File Save As Type sim do in the File name field and save it to the current directory Creating a simple DO file T 111 ModelSim Tutorial T 112 Lesson 10 Automating ModelSim 4 Load the simulation again and use the DO file a quit sim at the VSIM gt prompt b vsim test counter at the ModelSim gt prompt c do sim do at the VSIM gt prompt ModelSim executes the saved commands and draws the waves in the Wave window 5 When you are done with this exercise select File gt Quit to quit ModelSim ModelSim Tutorial Running ModelSim in command line mode We use the term command line mode to refer to simulations that are run from a DOS UNIX prompt without invoking the GUI Several ModelSim commands e g vsim vlib vlog etc are actually stand alone executables that can be invoked at the system command prompt Additionally you can create a DO file that contains other ModelSim commands and specify that file when you invoke the simulator 1 Create a new
69. its from the list Figure 75 35 outof 00000000 NE 455 outof 000000aa v Condition Whichever column you selected is hidden To redisplay the column 3t pel Me Condition Graph right click again and select that column name The status of which 635 00000029 Expression Count columns are displayed or hidden is persistent between invocations of 695 outof 000000 v Expression Hits Expression ModelSim Expression Graph 2 View statistics in the Missed Coverage pane a Select different files from the Files tab of the Workspace The Missed Coverage pane updates to show statistics for the selected file Figure 76 18 reg rst clk b Select any entry in the Statement tab to display that line in the Source 2 kie sut uid mr window 21 reg 31 0 loop 22 nop 23 task nop PA 24 5 into 4 b0000 28 h0 op wor X z5 endtask 26 27 the ctrl op 28 task ctrl 29 input 7 0 data 30 begin X 31 5 into 4 b0001 28 b0 ctrl X 32 G posedge clk X 33 5 into data 34 end X 35 endtask 36 n Se I nirp RME NN a OTE ADI TE PE SN IU PE NE SN RON ONE Oe reserva OF LE ModelSim Tutorial T 90 Lesson 8 Simulating with Code Coverage 3 View statistics in the Details pane Figure 77 Details pane showing toggle coverage statistics a Select the Toggle tab in the Missed Coverage pane Toe If the Toggle tab isn t visible you can do one of two
70. ive tasks to complete you can increase your productivity with DO files DO files are scripts that allow you to execute many commands at once The scripts can be as simple as a series of ModelSim commands with associated arguments or they can be full blown Tcl programs with variables conditional execution and so forth You can execute DO files from within the GUI or you can run them from the system command prompt without ever invoking the GUI Important This lesson assumes that you have added the install dir modeltech platform directory to your PATH If you did not you will need to specify full paths to the tools i e vlib vmap vlog vcom and vsim that are used in the lesson Related reading ModelSim User s Manual 17 Tcl and macros DO files UM 195 Practical Programming in Tcl and Tk Brent B Welch Copyright 1997 ModelSim Tutorial Creating a simple DO file Creating DO files is as simple as typing the commands in a text file Alternatively you can save the Main window transcript as a DO file In this exercise you will use the transcript to create a DO file that adds signals to the Wave window provides stimulus to those signals and then advances the simulation 1 Loadthe fest counter design unit a b If necessary start ModelSim Change to the directory you created in Lesson 2 Basic simulation In the Library tab of the Workspace pane double click the test counter design unit to load
71. ives you options on what to retain during the restart Figure 11 b Click Restart in the Restart dialog Setting breakpoints and stepping in the Source window T 27 Figure 10 A breakpoint in the Source window C 6 0 Tutorial examples counter v 22 for i 4 b0 carry 4 bl amp amp i lt 7 it 4 1 4 23 begin 24 increment i val i carry 25 carry val i amp carry 26 end 27 end 28 endfunction 29 30 always posedge clk or posedge reset 319 if reset 32 count ftpd reset to count S h00 33 else 34 count lt ftpd clk to count increment count 35 PT tcounter v counter v Figure 11 The Restart dialog DOC O Cix Keep v List Format v Wave Format v Breakpoints v Logged Signals Virtual Definitions v Assertions and Functional Coverage Restart Cancel ModelSim Tutorial T 28 Lesson 2 Basic simulation c Click the Run All icon The simulation runs until the breakpoint is hit When the simulation hits the breakpoint it stops running highlights the line with a blue arrow in the Source view Figure 12 and issues a Break message in the Transcript pane When a breakpoint is reached typically you want to know one or more signal values You have several options for checking values e at the values shown in the Objects window Figure 13 set your mouse pointer over the count variable in the Source window and a
72. lation comes with Verilog and VHDL versions of the example design The files are located in the following directories Verilog install dir modeltech examples memory verilog VHDL install dir modeltech examples memory vhdl This lesson uses the Verilog version for the exercises If you have a VHDL license use the VHDL version instead Related reading ModelSim GUI Reference Memory windows GR 140 ModelSim Command Reference mem display CR 145 mem load CR 148 mem save CR 151 radix CR 182 commands ModelSim Tutorial Compiling and loading the design 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from install dir examples memory verilog to the new directory If you have a VHDL license copy the files in install dir examples memory vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Create the working library and compile the design a Type vlib work at the ModelSim gt prompt b Verilog
73. le to in step 1c above In the Library tab of the Main window expand the work library and double click the test counter design unit 3 Execute the DO file and run the design Type do add bkmrk do at the VSIM gt prompt Type run 1500 ns at the VSIM gt prompt The simulation runs and the DO file creates two bookmarks Select View gt Bookmarks gt bm1 Watch the Wave window zoom on and scroll to the time when count is 00100111 Try the bm2 bookmark as well Using Tcl with ModelSim T 117 ModelSim Tutorial T 118 Lesson 10 Automating ModelSim Lesson Wrap up This concludes this lesson 1 Select File gt Quit to close ModelSim ModelSim Tutorial End User License Agreement IMPORTANT USE OF THIS SOFTWARE IS SUBJECT TO LICENSE RESTRICTIONS CAREFULLY READ THIS LICENSE AGREEMENT BEFORE USING THE SOFTWARE This license is a legal Agreement concerning the use of Software between you the end user either individually or as an authorized representative of the company acquiring the license and Mentor Graphics Corporation and Mentor Graphics Ireland Limited acting directly or through their subsidiaries or authorized distributors collectively Mentor Graphics USE OF SOFTWARE INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT If you do not agree to these terms and conditions promptly return or if received electronically certify destruction of Software and
74. les v vL vhd vho Y Done Default Options Edit Source Creating the project Now you will create a project that contains fcounter v the counter s testbench 1 Create the project a b c d Select File New Project Type counter in the Project Name field Click OK If a dialog appears asking about which modelsim ini file to use click Use Default Ini Add the testbench to the project a b c d Click Add Existing File in the Add items to the Project dialog Click the Browse button and select tcounter v Click Open and then OK Click Close to dismiss the Add items to the Project dialog The fcounter v file is listed in the Project tab of the Main window Compile the testbench a Right click tcounter v and select Compile gt Compile Selected Creating the project T 45 ModelSim Tutorial T 46 Lesson 4 Working with multiple libraries Linking to the resource library To wrap up this part of the lesson you will link to the parts lib library you created earlier But first try simulating the testbench without the link and see what happens ModelSim responds differently for Verilog and VHDL in this situation Verilog 1 Simulate a Verilog design with a missing resource library a In the Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports an error Figure 31 When you see a message that cont
75. les coverage vhdl This lesson uses the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Verilog and VHDL versions of the design Related reading ModelSim User s Manual Chapter 12 Measuring code coverage UM 289 ModelSim Tutorial Compiling the design Enabling Code Coverage is a two step process first you compile the files and identify which coverage statistics you want second you load the design and tell ModelSim to produce those statistics 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from install dir modeltech examples coverage verilog to the new directory If you have a VHDL license copy the files in install dir2 modeltech examples coverage vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Create the working library a Type vlib work at the ModelSim prompt Compile the design files a For Verilog Type vlog co
76. log Tools gt Edit Preferences See ModelSim GUI preferences GR 236 in the ModelSim GUI amp Interface Reference for more information EL a Click the undock icon on the Wave pane Figure 37 The Wave pane becomes a standalone un docked window 3 Add objects using drag and drop You can drag an object to the Wave window from many other windows and panes e g Workspace Objects and Locals a Inthe Wave window select Edit gt Select All and then Edit gt Delete b Dragan instance from the sim tab of the Main window to the Wave window ModelSim adds the objects for that instance to the Wave window c Drag a signal from the Objects pane to the Wave window d Inthe Wave window select Edit gt Select and then Edit gt Delete 4 Addobjects using a command a Typeadd wave at the VSIM prompt ModelSim adds all objects from the current region b Run the simulation for awhile so you can see waveforms ModelSim Tutorial Zooming the waveform display Zooming lets you change the display range in the waveform pane There are numerous methods for zooming the display 1 Zoom the display using various techniques a Click the Zoom Mode icon on the Wave window toolbar In the waveform pane click and drag down and to the right You should see blue vertical lines and numbers defining an area to zoom in Figure 38 Select View gt Zoom gt Zoom Last The waveform pane ret
77. lude Selection For Instance inst name 2 Exclude an entire file a Files tab of the Workspace locate sm v or sm vhd if you are using the VHDL example b Right click the file name and select Coverage Exclude Selected File Figure 83 The file is added to the Current Exclusions pane 3 Cancel the exclusion of sm v a Right click sm v in the Current Exclusions pane and select Cancel Selected Exclusions ModelSim Tutorial Figure 83 Excluding an entire file via the GUI Wi or k space Filename Fulipath Type StmtCount Stmt Hits Stmt 5 Graph sm seq v sm seqv vfile 22 21 95 455 DO sm v em file 30 27 90 000 DEN beh sramv View Source 10 90 000 DEN Save List fila Coverage Coverage Reports Exclude ted File 7 lest sm v 30 361 DR Copy Clear Coverage Data Properties Creating Code Coverage reports You can create reports on the coverage statistics using either the menus or by entering commands in the Transcript pane The reports are output to a text file regardless of which method you use To create coverage reports via the menus do one of the following select Tools gt Code Coverage gt Reports from the Main window menu right click any object in the sim or Files tab of the Workspace and select Code Coverage Coverage Reports right click any object in the Instance Coverage pane and select Code coverage repo
78. mulate Add Tools Window Help X 8 ELESSE Contains Transcript Hg Compiling module test counter E The files are compiled into the work library d Click Done a Type vcom counter vhd tcounter vhd at the ModelSim gt prompt and press lt Enter gt on your keyboard 2 View the compiled design units a On the Library tab click the icon next to the work library and you will see two design units Figure 5 You can also see their types Modules Entities etc and the path to the underlying source files if you scroll to the right Top level modules test_counter vlag reportprogress 300 work work C 6 0 ij counter Module E test counter Module 1 Tutorial examples counter v 7 Model Technology ModelSim SE vlog 6 0 Library Beta Compiler 2004 06 Jun 4 2004 modelsim lib Library Compiling module counter std Library ZA Top level modules 4 counter No Design Loaded No Context ModelSim Tutorial T 24 Lesson 2 Basic simulation Loading the design into the simulator 1 Load the test counter module into the simulator a Double click test counter in the Main window Workspace to load the design You can also load the design by selecting Simulate Start Simulation in the menu bar This opens the Start Simulation dialog With the Design tab selected click the sign next to
79. n 5 Viewing simulations in the Wave window Introduction Figure 36 The Wave window and its many panes The Wave window allows you to view the results of your simulation as HDL pathname value waveform waveforms and their values Ted wave default ec xj File Edit View Insert Format Tools Window The Wave window is divided into a number of window panes Figure 36 ae amp x See n Kies aa ee ra window panes in the Wave window can be resized by clicking and dragging the F EEE bar between any two panes Related reading es ingbul ing INST test_ringbuf ring_INST block 0 x T rinabuf ring INST block ModelSim GUI Reference Wave window GR 182 test ringbut ring INST block 10000100 ringbufZring INST bloc 0 4test_ringbuf ri INST block 0 ModelSim User s Manual Chapter 8 WLF files datasets and virtuals UM est INS T block test ringbuf ring INST block 10000100 1 95 test rinabuf ring INST block 0 ringbuf ring INST block 10000100 7test ringbuf rina INST block ringbuf ring INST block 010110 0100 ringbuf ring INST block BN Iz 00000 6 00 B 463000 ns LE 461988 ns to 453241 ns Now 500 us Delta 2 p cursor name cursor value cursor ModelS
80. n and practice Basic simulation flow Lesson 2 Basic simulation Project flow Lesson 3 ModelSim projects Multiple library flow Lesson 4 Working with multiple libraries Debugging tools Remaining lessons ModelSim Tutorial Basic simulation flow T 13 Basic simulation flow The following diagram shows the basic steps for simulating a design in ModelSim Creating the working library In ModelSim all designs be they VHDL Verilog or some combination thereof are compiled into a library You typically start a new simulation in ModelSim by creating a working library called work Work is the library name used by the compiler as the default destination for compiled design units Compiling your design After creating the working library you compile your design units into it The ModelSim library format is compatible across all supported platforms You can simulate your design on any platform without having to recompile your design Running the simulation With the design compiled you invoke the simulator on a top level module Verilog or a configuration or entity architecture pair VHDL Assuming the design loads successfully the simulation time is set to zero and you enter a run command to begin simulation ModelSim Tutorial T 14 Lesson 1 ModelSim conceptual overview Debugging your results If you don t get the results you expect you can use ModelSim s robust debugging environment to track do
81. nce find next difference find next annotated difference find last difference Use these icons to move the selected cursor The compare icons cycle through differences on all signals To view differences for just the selected signal use tab and shift tab Viewing comparison data Figure 87 Comparison information in the Main window ae Dei Transcript 711 illegal op received dataset open C modeltech examples co mpare verilog gold wlf gold 3 C modeltech examples compare verilo g gold wlf opened as dataset gold compare start gold sim compare options track compare add recursive all wave Created 11 comparisons compare run 3t Computing waveform differences from ti me Ops to 750 ns Found 12 differences Figure 88 Comparison objects in the Wave window wave default E E File Edit View Insert Format Tools Window ete Te bt sim test sm rd sim test_sm wr_ compare test_sm i 6 compare test_sm compare test_sm r compare test_sm compare test sm EX compare test_sm compare test sm compare test sm A compare test_sm i compare test_sm r Now 750000 ps 748800 ps 454800 ps to 455600 ps Now 750 ns Delta 2 Figure 89 The compare icons ie fe 103 ModelSim Tutorial T
82. ns Disable Sprout Select equivalent nets Lognets Select Environment Automatic Add to Wave Figure 53 Dataflow window displaying with hierarchy _ 2inixl File Edit View Navigate Trace Tools Window Si Ras X IB OO FA le o 33 1 DZ 01 amp B m gt Extended mode enabled Hier Keep 1 ftop p t out Z Lesson Wrap up T 69 Lesson Wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Type quit sim at the VSIM gt prompt ModelSim Tutorial T 70 Lesson 6 Debugging with the Dataflow window ModelSim Tutorial Lesson 7 Viewing and initializing memories Topics The following topics are covered in this lesson Introduction Related reading Compiling and loading the design Viewing a memory Navigating within the memory Saving memory contents to a file Initializing a memory Interactive debugging commands Lesson Wrap up T 72 T 72 T 73 T 74 T 76 T 78 T 79 T 81 T 83 T 71 ModelSim Tutorial T 72 Lesson 7 Viewing and initializing memories Introduction In this lesson you will learn how to view and initialize memories in ModelSim ModelSim defines and lists as memories any of the following e wire and std logic arrays e Integer arrays e Single dimensional arrays of VHDL enumerated types other than std_logic Design files for this lesson The ModelSim instal
83. nter with an associated testbench The pathnames are as follows Verilog install dir modeltech examples counter v and tcounter v VHDL install dir modeltech examples counter vhd and tcounter vhd This lesson uses the Verilog files tcounter v and counter v in the examples If you have a VHDL license use tcounter vhd and counter vhd instead Related reading ModelSim User s Manual 3 Design libraries UM 51 ModelSim Tutorial Creating the resource library 1 Create a directory for the resource library Create a new directory called resource library Copy counter v from install dir modeltech examples to the new directory Create a directory for the testbench Create a new directory called testbench that will hold the testbench and project files Copy tcounter v from install dir modeltech examples to the new directory You are creating two directories in this lesson to mimic the situation where you receive a resource library from a third party As noted earlier we will link to the resource library in the first directory later in the lesson Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the resource library
84. o mu 2e an on ai au an 20 III TOROIIIBMECIIIII 00000048 xxxxxxxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ModelSim Tutorial Simulate the design a Click the run all icon in the Main window b Click the mem tab of the MDI frame to bring the ram_tb spraml mem instance to the foreground Figure 56 VHDL In the Transcript pane you will see NUMERIC STD warnings that can be ignored and an assertion failure that is functioning to stop the simulation The simulation itself has not failed Let s change the address radix and the number of words per line for instance ram_tb spraml mem a Right click anywhere in the Memory Contents pane and select Properties The Properties dialog box opens Figure 57 b Forthe Address Radix select Decimal This changes the radix for the addresses only c Select Words per line and type 1 in the field d Click OK You can see the results of the settings in Figure 58 If the figure doesn t match what you have in your ModelSim session check to make sure you set the Address Radix rather than the Data Radix Data Radix should still be set to Symbolic the default Viewing a memory T 75 Figure 56 Memory display updates with simulation 00000000 00000006 0000000c 00000012 00000018 0000001e 00000024 0000002 00000030 00000036 0000003c 00000042 00000048 AAA K m1 mem 00101000 00101110 00110100 00111010 01000000 01000110 01001100 01010010
85. ompted to confirm that you wish to quit simulating ModelSim Tutorial T 30 Lesson 2 Basic simulation ModelSim Tutorial Lesson ModelSim projects Topics The following topics are covered in this lesson Introduction Related reading Creating anew project Adding objects to the project Changing compile order VHDL Compiling and loading a design Organizing projects with folders Adding folders Moving files to folders Simulation Configurations Lesson wrap up T 32 T 32 T 33 T 34 T 35 T 36 T 37 T 37 T 38 T 39 T 40 T 31 ModelSim Tutorial T 32 Lesson 3 ModelSim projects Introduction In this lesson you will practice creating a project At a minimum projects have a work library and a session state that is stored in a mpf file A project may also consist of e HDL source files or references to source files e Other files such as READMES or other project documentation e local libraries e references to global libraries This lesson uses the Verilog files tcounter v and counter v in the examples If you have a VHDL license use tcounter vhd and counter vhd instead Related reading ModelSim User s Manual Chapter 2 Projects UM 31 ModelSim Tutorial Creating a new project 1 If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows
86. on or expiration you agree to cease all use of Software and return it to Mentor Graphics or certify deletion and destruction of Software including all copies to Mentor Graphics reasonable satisfaction EXPORT Software is subject to regulation by local laws and United States government agencies which prohibit export or diversion of certain products information about the products and direct products of the products to certain countries and certain persons You agree that you will not export any Software or direct product of Software in any manner without first obtaining all necessary approval from appropriate local and United States government agencies RESTRICTED RIGHTS NOTICE Software was developed entirely at private expense and is commercial computer software provided with RESTRICTED RIGHTS Use duplication or disclosure by the U S Government or a U S Government subcontractor is subject to the restrictions set forth in the license agreement under which Software was obtained pursuant to DFARS 227 7202 3 a or as set forth in subparagraphs c 1 and 2 of the Commercial Computer Software Restricted Rights clause at FAR 52 227 19 as applicable Contractor manufacturer is Mentor Graphics Corporation 8005 SW Boeckman Road Wilsonville Oregon 97070 7777 USA THIRD PARTY BENEFICIARY For any Software under this Agreement licensed by Mentor Graphics from Microsoft or other licensors Microsoft or the applicable licensor is a third party benefi
87. op p t_out top p t set 4 out sin top p t_out 2785 ns db SEX Figure 51 ChaseX identifies the cause of the unknown on f out igi xd File Edit View Navigate Trace Tools Window Sik ad B3 I amp O 2 Ah ke HILL DZ a Bb mi RAND T NETTE EUF 16 e test b bl bl testin 1 St E 4 top p t_out 4 top p tes 4 hende 2785 ns 4 Cw Extended mode enabled Keep 1 top p test2 ModelSim Tutorial T 68 Lesson 6 Debugging with the Dataflow window Displaying hierarchy in the Dataflow win dow You can display connectivity in the Dataflow window using hierarchical instances You enable this by modifying the options prior to adding objects to the window 1 Change options to display hierarchy a Select Tools Options from the Dataflow window menu bar b Check Show Hierarchy and then click OK Figure 52 2 Add signal f_ ouf to the Dataflow window a add dataflow top p t out at the VSIM prompt The Dataflow window will display out and all hierarchical instances Figure 53 ModelSim Tutorial Figure 52 The Dataflow options dialog Dataflow Options E x General options Warning options Keep previous contents when adding new nets or instances to the Dataflow window dataflow IV Hide cells Keep Dataflow Show Hierarchy Bottom inout pi
88. or certain values on a signal and then adds bookmarks that zoom the Wave window when that value exists Bookmarks allow you to save a particular zoom range and scroll position in the Wave window 1 Create the script a Ina text editor open a new file and enter the following lines proc add wave zoom stime num echo Bookmarking wave num bookmark add wave bk num expr stime 50 expr stime 100 0 These commands do the following e Create a new procedure called wave zoom that has two arguments stime and num e Create a bookmark with a zoom range from the current simulation time minus 50 time units to the current simulation time plus 100 time units b Now add these lines to the bottom of the script add wave r when clk event and clk 1 echo Count is exa count if exa count 00100111 add_wave_zoom Snow 1 elseif exa count 01000111 add_wave_zoom Snow 2 ModelSim Tutorial These commands do the following e Add all signals to the Wave window e Use a when statement to identify when clk transitions to 1 Examine the value of count at those transitions and add a bookmark if it is a certain value Save the script with the name add_bkmrk do Save it into the directory you created in Lesson 2 Basic simulation 2 Load the test counter design unit a b Start ModelSim Select File gt Change Directory and change to the directory you saved the DO fi
89. ow The simulation advances another 500 ns for a total of 600 ns Figure 9 Running the simulation T 25 Figure 8 Adding signals to the Wave window File Edit View Format Compile Simulate Add Tools Window Help Active Processes Ready HIMPLICIT wI Ready IMPLICIT Ready IMPLICIT Wi Ready INITIALH11 Ready HINITIALH17 test counter dit View Declaration SIMPLIC View Instantiation 2 mmr BE ETSI INITIAL Copy Add to Dataflow D HINITIAL Find Add ta List D HINITIAL Ready HINITIALH24 Expand Selected Collapse Selected sim Expand All Collapse All Copyright Model Technology al Corporation company 2004 Al Transcript ler 2004 06 Jun 420 Save List Compiling module Compiling module POS Coverage gt End Simulation 1 2 3 4 Rightmodule test counter 5 6 Top level modules reg clk reset Figure 9 Waves being drawn in the Wave window wave default File Edit View Insert Format Tools Window 4 test_counter clk 4 jest counter reset test_counter count e m RR FRSC RE RD D D D RU E Li hi Cursor 1 D ns to 630 ns Now 600 ns Delta 2 ModelSim Tutorial T 26 Lesson 2 Basic simulation c Click the Run All icon on the Main or Wave window toolbar The simulation
90. ows the input and output signals of the newly selected process You can continue tracing events through the design in this manner select Trace next event until you get to a transition of interest in the wave viewer and then select Trace event set to update the dataflow pane Figure 49 Tracing the event set LI lolx File Edit View Navigate Trace Tools Window 3 8S amp 2 A he H HHH DBA Bb nj 3 Select File Close to close the Dataflow window NAND 44 t out test strbj 4 Jton n sth 2820 ns 2665 ns 41 RS Extended mode enabled Keep 1 551 19 1 ModelSim Tutorial Tracing an X unknown The Dataflow window lets you easily track an unknown value X as it propagates through the design The Dataflow window is linked to the stand alone Wave window so you can view signals in the Wave window and then use the Dataflow window to track the source of a problem As you traverse your design in the Dataflow window appropriate signals are added automatically to the Wave window 1 View t out in the Wave and Dataflow windows Scroll in the Wave window until you can see top p t out t out goes to an unknown state at 2065 ns and continues transitioning between 1 and unknown for the rest of the run Figure 50 The red color of the waveform indicates an unknown value b Double click the last transition of signal t out a
91. r its licensors You shall maintain a record of the number and primary location of all copies of Software including copies merged with other software and shall make those records available to Mentor Graphics upon request You shall not make Software available in any form to any person other than employees and contractors excluding Mentor Graphics competitors whose job performance requires access You shall take appropriate action to protect the confidentiality of Software and ensure that any person permitted access to Software does not disclose it or use it except as permitted by this Agreement Except as otherwise permitted for purposes of interoperability as specified by applicable and mandatory local law you shall not reverse assemble reverse compile reverse engineer or in any way derive from Software any source code You may not sublicense assign or otherwise transfer Software this Agreement or the rights under it whether by operation of law or otherwise attempted transfer without Mentor Graphics prior written consent and payment of Mentor Graphics then current applicable transfer charges Any attempted transfer without Mentor Graphics prior written consent shall be a material breach of this Agreement and may at Mentor Graphics option result in the immediate termination of the Agreement and licenses granted under this Agreement The terms of this Agreement including without limitation the licensing and assignment provisions shall
92. ration HA Transcript project open C 6 0 Tutorial examples test Loading project test ModelSim gt wm title ModelSim Compile of tcounter y was successful Compile of counter v was successful amp I CQ with n vsim hazards t ps work test counter vsim hazards t ps work test counter Ua Wo 5 OLI Loading work cd unter command line switches Lesson 4 Working with multiple libraries Topics The following topics are covered in this lesson Introduction Related reading Creating the resource library Creating the project Linking to the resource library Permanently mapping resource libraries Lesson wrap up T 42 T 42 T 43 T 45 T 46 T 49 T 50 T 41 ModelSim Tutorial T 42 Lesson 4 Working with multiple libraries Introduction In this lesson you will practice working with multiple libraries As discussed in Lesson 1 ModelSim conceptual overview you might have multiple libraries to organize your design to access IP from a third party source or to share common parts between simulations You will start the lesson by creating a resource library that contains the counter design unit Next you will create a project and compile the testbench into it Finally you will link to the library containing the counter and then run the simulation Design files for this lesson The sample design for this lesson is a simple 8 bit binary up cou
93. re verilog to the new directory If you have a VHDL license copy the files in install dir modeltech examples compare vhdl instead 2 Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 3 Execute the lesson DO file a Type do gold sim do at the ModelSim gt prompt The DO file does the following e Creates and maps the work library Compiles the Verilog and VHDL files e Runsthe simulation and saves the results to a dataset named gold wlf Quits the simulation Feel free to open the DO file and look at its contents Creating the reference dataset T 99 ModelSim Tutorial T 100 Lesson 9 Waveform Compare Creating the test dataset The test dataset is the w f file that will be compared against the reference dataset Like the reference dataset the test dataset can be a saved dataset the current simulation dataset or any part of the current simulation dataset To simplify matters you will create the test dataset from the simulation you just ran However you will edit the testbench to create differences between the two runs Verilog Editthe testbench a Select File gt Open and open fest sm v
94. reement and the remaining provisions will remain in full force and effect PAYMENT TERMS AND MISCELLANEOUS You will pay amounts invoiced in the currency specified on the applicable invoice within 30 days from the date of such invoice This Agreement contains the parties entire understanding relating to its subject matter and supersedes all prior or contemporaneous agreements including but not limited to any purchase order terms and conditions except valid license agreements related to the subject matter of this Agreement which are physically signed by you and an authorized agent of Mentor Graphics either referenced in the purchase order or otherwise governing this subject matter This Agreement may only be modified in writing by authorized representatives of the parties Waiver of terms or excuse of breach must be in writing and shall not constitute subsequent consent waiver or excuse The prevailing party in any legal action regarding the subject matter of this Agreement shall be entitled to recover in addition to other relief reasonable attorneys fees and expenses Rev 040401 Part Number 221417 T 123 ModelSim Tutorial T 124 License Agreement ModelSim Tutorial Index A add dataflow command T 68 add wave command T 54 B break icon T 26 breakpoints setting T 27 stepping T 28 C Code Coverage excluding lines and files T 94 reports T 95 Source window T 91 command line mode T 113 comparisons Waveform Comp
95. rilog and VHDL versions of the design Related reading ModelSim User s Manual Tracing signals with the Dataflow window UM 255 ModelSim GUI Reference Dataflow window GR 111 ModelSim Tutorial Compiling and loading the design In this exercise you will use a DO file to compile and load the design 1 Create new directory the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt examples dataflow verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt examples dataflow vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Execute the lesson DO file a do run do at the ModelSim gt prompt The DO file does the following e Creates the working library e Compiles the design files e Opens the Dataflow and Wave windows Adds signals to the Wave window e Logs all signals in the design e Runs the simulation Feel free to open the DO file and look at its contents Compiling and load
96. rk work Copying C Modeltech 6 0 win32 mo delsim ini to modelsim ini Modifying modelsim ini H Warning Copied C Modeltech 6 0 w in32 modelsim ini to modelsim ini Updated modelsim ini ModelSim gt No Design Loaded Compiling the design T 23 Com pi li ng the desig n Figure 4 The Compile HDL Source Files dialog Compile Source es n Tm Library work x You can compile by using the menus and dialogs of the graphic interface as in the Verilog example below or by entering a command at the ModelSim gt prompt as Look in tutorial z in the VHDL example below With the working library created you are ready to compile your source files counter 1 Verilog Compile counter v and tcounter v tcounter a Select Compile gt Compile This opens the Compile Source Files dialog Figure 4 If the Compile menu option is not available you probably have a project open If so close the project by selecting File gt Close when the S File t mm t Workspace pane is selected at PM EL b Select counter v hold the Ctrl key down and then select tcounter v Files of type HDL Files v v1 vhd vhdl vho x me c With the two files selected click Compile Default Options Edit Source Figure 5 Verilog modules compiled into the work library VHDL Compile counter vhd and counter vhd File Edit View Format Compile Si
97. rts from the context menu 1 Create a report on all instances a Select Tools Coverage Reports from the Main window toolbar This opens the Coverage Report dialog Figure 84 b Make sure Report on all instances and No Filtering are selected and then click OK ModelSim creates a file report txt in the current directory and displays the report in Notepad Close Notepad when you are done looking at the report 2 Createa summary report on all design files from the Transcript pane a Type coverage report file cover txt at the VSIM gt prompt b Type notepad cover txt at the VSIM prompt to view the report Close Notepad when you are done reviewing the report Creating Code Coverage reports T 95 Figure 84 The Coverage Report dialog lolx C Report on all files C Report on all instances Report on a specific instance Instance sim test_sm Browse C Report on a source file File Name Report on a specific package Package Name xj Coverage Type Statement Coverage Expression Coverage Branch Coverage Toggle Coverage Condition Coverage Extended Toggle Coverage Other Options Filter 3 Zero Coverage Only No Filtering IV Include Line Details C Filter Above Percent Coverage Totals Only C Filter Below Percent Disable Source Annotation Percent 75 Recursive write XML Format Report Pathname Jreport
98. s to the top of the file LIBRARY parts lib USE parts lib ALL The testbench source code should now look similar to that shown in Figure 33 d Select File Save 3 Recompile and simulate a Inthe Project tab of the Main window right click tcounter vhd and select Compile Compile Selected b Inthe Library tab double click test counter to load the design The design loads without errors ModelSim Tutorial Figure 34 Mapping to the parts lib library fu Create a New Library Create C anew library and a logical mapping to it amapto an existing library Library Name ge Library Maps to x Tutorial resource_library parts_ vi Browse DK Cancel Figure 35 Adding LIBRARY and USE statements to the testbench E C 6 0 Tutorial testbench tcounter vhd 1 Copyright Model Technology a Mentor Graphics 2 2 Corporation company 2004 All rights reserved 3 4 LIBRARY parts lib 5 USE parts lib 2ALL 6 7 entity test counter is 8 PORT count BUFFER bit vector 98 downto 1 9 end 10 11 architecture only of test counter is 12 13 COMPONENT counter l4 PORT count BUFFER bit vector 8 downto 1 15 clk IN bit 16 reset IN bit tcounter vhd Permanently mapping resource libraries If you reference particular resource libraries in every project or simulation you may want to permanently map the libraries Doing this requires that you edi
99. sign unit Figure 20 A fourth tab named Files contains information about the underlying source files At this point you would generally run the simulation and analyze or debug your design like you did in the previous lesson For now you ll continue working with the project However first you need to end the simulation that started when you loaded test counter 4 End the simulation a Select Simulate End Simulation b Click Yes ModelSim Tutorial Figure 19 The Library tab with an expanded library Library C modeltech examples w Module C modeltech examples c1 Module C modeltech examples te Library MODEL TECH vital20 Library MODEL TECH ieee Library MODEL TECH models Library MODEL_TECH std Library MODEL_TECH std_ de Library MODEL_TECH synop 2a 20 3a Figure 20 The structure tab for the counter design unit Workspace Transcript HA Loading project test E test counte FRERE Compile of tcounter v was successful psi coume ESCORT Compile of counter v was successful M dut Counter Module 2 compiles failed with no errors ModelSim gt vsim work test counter 3 vsim work test counter Loading work test counter BIMPLICITAWIRE res test counter Process HIMPLJCIT WIRE clk test counter Process INITIAL T lest counter Process Loading work counter HINITIALHI7 test_counter Process HINITIANHZS test_counter Process SIM 3
100. st counter test counter test counter 6 0 Beta Compiler 2004 06 Jun 4 2004 Compiling module counter meelis Compiling module test counter Module Process Top level modules test_counter Dieses ModelSim gt vsim work test counter Process vsim work test counter Process Loading work test counter Process Loading work counter Bee e e p Now Ons Delta 0 sim test_counter VSIM 19 gt Running the simulation Now you will run the simulation 1 Set the graphic user interface to view all debugging windows a Select View gt Debug Windows gt Windows This opens all ModelSim windows giving you different views of your design data and a variety of debugging tools Most windows will open as panes within the Main window The Dataflow List and Wave windows will open as separate windows You may need to move or resize the windows to your liking Panes within the Main window can be undocked to stand alone 2 Add signals to the Wave window In the Workspace pane select the sim tab Right click test counter to open a popup context menu Select Add Add to Wave Figure 8 Three signals are added to the Wave window 3 Runthe simulation a Click the Run icon in the Main or Wave window toolbar The simulation runs for 100 ns the default simulation length and waves are drawn in the Wave window Type run 500 at the VSIM gt prompt in the Main wind
101. t 2785 ns This automatically opens the Dataflow window and displays t out its associated process and its waveform You may need to increase the size of the Dataflow window and scroll the panes to see everything c Move the cursor in the Wave window As previously mentioned the Wave and Dataflow windows are designed to work together As you move the cursor in the Wave the value of t out changes in the Dataflow window d Move the cursor to a time when f out is unknown e g 2724 ns 2 Tracethe unknown a Inthe Dataflow window make sure f out is selected and then select Trace ChaseX The design expands to show the source of the unknown Figure 51 In this case there is a HiZ U in the VHDL version on input signal test in and a 0 on input signal rw rw in the VHDL version so output signal test2 resolves to an unknown Scroll to the bottom of the Wave window and you will see that all of the signals contributing to the unknown value have been added 3 Clear the Dataflow window before continuing Tracing an X unknown T 67 Figure 50 A signal with unknown values wave default File Edit View Insert Format Tools Window eea top p clk top p rdy 4top p addr top p nw top p stib top p data 0000000000000000 top p addr 00000000 ji top p data_r 2222222222222222 top p strb_r top p verbose t
102. t the master modelsim ini file in the installation directory Though you won t actually practice it in this tutorial here are the steps for editing the file 1 Locate the modelsim ini file in the ModelSim installation directory install dir2 modeltech modelsim ini 2 IMPORTANT Make a backup copy of the file 3 Change the file attributes of modelsim ini so it is no longer read only 4 Open the file and enter your library mappings in the Library section For example parts lib C libraries parts lib 5 Save the file 6 Change the file attributes so the file is read only again Permanently mapping resource libraries T 49 ModelSim Tutorial T 50 Lesson 4 Working with multiple libraries Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation and close the project 1 Select Simulate gt End Simulation Click Yes 2 Select the Project tab of the Main window Workspace 3 Select File gt Close Click OK ModelSim Tutorial Lesson 5 Viewing simulations in the Wave window Topics The following topics are covered in this lesson Introduction Related reading Loading a design Adding objects to the Wave window Using cursors in the Wave window Working with a single cursor Working with multiple cursors Saving the window format Lesson wrap up T 52 T 52 T 53 T 54 T 56 T 56 T 57 T 59 T 60 T 51 ModelSim Tutorial T 52 Lesso
103. the work library to see the counter and test counter modules Select the test counter module and click OK Figure 6 When the design is loaded you will see a new tab named sim that displays the hierarchical structure of the design Figure 7 You can navigate within the hierarchy by clicking on any line with a expand contract icon You will also see a tab named Files that displays all files included in the design ModelSim Tutorial test counter vital2000 ieee Il modelsim lib std std developerskit m mM sean 4 Library Module Module Library Library Library Library Library ibrar Figure 6 Loading the design with the Start Simulation dialog C 6 0 Tutorial examples work C 46 0 Tutorial examples counter v C 46 0 Tutorial examples tcounter v MODEL_TECH vital2000 MODEL_TECH ieee MODEL_TECH modelsim_lib MODEL TECH std MODEL TECH std developerskit thONEL TECH Design Unit s E osa x Optimization Enable optimization Optimization Options OK Cancel Figure 7 Workspace tab showing a Verilog design x ModelSim File Edit View Format Compile Simulate Add Tools Window tep Workspace EHE test_counter M dut SIMPLICI SIMPLICI NITIAL NITIAL d INITIAL w Instance Designuni Desgnunttype test counter counter lest counter test counter te
104. things 1 widen the Instance test sm pane by clicking and dragging on the pane border 2 if your mouse has Signal into a middle button click and drag the tabs with the middle mouse button Noda count g2 b Select any object in the Toggle tab to see details in the Details pane 0 76 Figure 77 1 46 Toggle Coverage 34 35 0 1 Coverage 67 19 4 View instance coverage statistics Full Coverage 67 19 The Instance Coverage pane displays coverage statistics for each instance in X Z Coverage 67 19 a flat non hierarchical view Figure 78 Select any instance in the Instance Coverage pane to see its source code displayed in the Source window Figure 78 The Instance Coverage pane Instance erage NI Stmt graph court Franchises Branch gegh Cor ModelSim Tutorial Viewing statistics in the Source window In the previous section you saw that the Source window and the Main window coverage panes are linked You can select objects in the Main window panes to view the underlying source code in the Source window Furthermore the Source window contains statistics of its own 1 View coverage statistics for test sm in the Source window Make sure fest sm is selected in the sim tab of the Workspace b Inthe Statement tab of the Missed Coverage pane expand test sm v if necessary and select any line Figure 79 The Source window opens in the MDI frame with the line you selected
105. top level ports of the selected datasets C Specify Comparison by Region Specify Comparison by Signal opens the structure browser to allow you to select specific signals for comparison Specify Comparison by Region opens the Add Comparison by Region dialog to allow selection of a specific reference region lt Previous Next gt Cancel Viewing comparison data Comparison data displays in three places within the ModelSim GUI the Workspace pane of the Main window the Wave window and the List window Viewing comparison data in the Main window Comparison information displays in three places in the Main window the Compare tab in the Workspace pane shows the region that was compared the Transcript shows the number of differences found between the reference and test datasets and the Objects pane shows comparison differences if you select the object on the Compare tab Figure 87 Viewing comparison data in the Wave window In the pathnames pane of the Wave window a timing difference is denoted by a red X Figure 88 Red areas in the waveform pane show the location of the timing differences as do the red lines in the scrollbars Annotated differences are highlighted in blue The Wave window includes six compare icons that let you quickly jump between differences Figure 89 From left to right the icons do the following find first difference find previous annotated difference find previous differe
106. tricted rights Use duplication or disclosure by the U S Government or a U S Government subcontractor is subject to the restrictions set forth in the license agreement provided with the software pursuant to DFARS 227 7202 3 a or as set forth in subparagraph c 1 and 2 of the Commercial Computer Software Restricted Rights clause at FAR 52 227 19 as applicable Contractor manufacturer is Mentor Graphics Corporation 8005 S W Boeckman Road Wilsonville Oregon 97070 7777 This is an unpublished work of Mentor Graphics Corporation Contacting ModelSim Support Telephone 503 685 0820 Toll Free Telephone 877 744 6699 Website www model com Support www model com support ModelSim Tutorial Table of Contents de T 5 Lesson 1 ModelSim conceptual overview T 11 Lesson 2 Basic simulation T 19 Lesson ModelSim projects T 31 Lesson 4 Working with multiple libraries T 41 Lesson 5 Viewing simulations in the Wave window 1 51 Lesson 6 Debugging with the Dataflow window T 61 Lesson 7 Viewing and initializing memories T 71 Lesson 8 Simulating with Code Coverage T 85 Lesson 9 Waveform Compare T 97 Lesson 10 Automating ModelSim T 109 p oo
107. urns to the previous display range Click the Zoom In 2x icon a few times In the waveform pane click and drag up and to the right You should see a blue line and numbers defining an area to zoom out Figure 39 Select View Zoom Zoom Full Zooming the waveform display T 55 Figure 38 Zooming in with the mouse pointer LT 1cx File Edit View Insert Format Tools Window IEC i E 4 counter clk 4 Jtest_counter reset 8 4 counter count ti Q Q ax 4 counter clk 4 jest counter reset Er counter count 258 ns to 367 ns Now 1 us Delta 2 ModelSim Tutorial T 56 Lesson 5 Viewing simulations in the Wave window Using cursors in the Wave window Cursors mark simulation time in the Wave window When ModelSim first draws the Wave window it places one cursor at time zero Clicking anywhere in the waveform pane brings that cursor to the mouse location You can also add additional cursors name lock and delete cursors use cursors to measure time intervals and use cursors to find transitions Working with a single cursor 1 Position the cursor by clicking and dragging a Click the Select Mode icon on the Wave window toolbar b Click anywhere in the waveform pane A cursor is inserted at the time where you clicked Figure 40 c Drag the cursor and observe the value pane T
108. vailable from the Support page of our web site www model com ModelSim User s Manual PDF HTML select Help Documentation ModelSim Command Reference PDF HTML select Help Documentation ModelSim GUI Reference PDF HTML select Help Documentation Command Help ASCII type help command name at the prompt in the Transcript pane Error message help ASCII type verror lt msgNum gt at the Transcript or shell prompt Tcl Man Pages Tcl manual HTML select Help Tcl Man Pages or find contents htm in VnodeltechNdocsNcl help html Technotes HTML select Technotes dropdown on www model com support Where to find our documentation T 7 ModelSim Tutorial T 8 Introduction Technical support and updates Support Model Technology online and email technical support options maintenance renewal and links to international support contacts www model com support default asp Mentor Graphics support www mentor com supportnet Updates Access to the most current version of ModelSim www model com downloads default asp Latest version email Place your name on our list for email notification of news and updates www model com products informant asp ModelSim Tutorial Before you begin T 9 Before you begin Preparation for some of the lessons leaves certain details up to you You will decide the best way to create directories copy files and
109. ver bct sm v sm seq v beh sram v test sm v at the ModelSim prompt For VHDL Type vcom cover bct sm vhd sm seq vhd sm sram vhd test sm vhd at the ModelSim prompt The cover bct argument instructs ModelSim that you want branch condition and toggle coverage statistics statement coverage is included by default See Enabling code coverage UM 293 for more information on the available coverage types Compiling the design T 87 ModelSim Tutorial T 88 Lesson 8 Simulating with Code Coverage Loading and running the design 1 Load the design a vsim coverage test sm at the ModelSim gt prompt 2 simulation b Type run 1 ms at the VSIM gt prompt When you load a design with Code Coverage enabled ModelSim adds several columns to the Files and sim tabs in the Workspace Figure 73 ModelSim also displays three Code Coverage panes in the Main window Figure 74 Missed Coverage Displays the selected file s un executed statements branches conditions and expressions and signals that have not toggled nstance Coverage Displays statement branch condition expression and toggle coverage statistics for each instance in a flat non hierarchical view Details Shows details of missed coverage such as truth tables or toggle details Another coverage related pane is the Current Exclusions pane Select View gt Code Coverage Current Exclusions to display that pane Current Exclusions
110. wn the cause of the problem ModelSim Tutorial Project flow T 15 Project flow A project is a collection mechanism for an HDL design under specification or test Even though you don t have to use projects in ModelSim they may ease interaction with the tool and are useful for organizing files and specifying simulation settings The following diagram shows the basic steps for simulating a design within a ModelSim project As you can see the flow is similar to the basic simulation flow However there are two important differences You do not have to create a working library in the project flow it is done for you automatically Projects are persistent In other words they will open every time you invoke ModelSim unless you specifically close them ModelSim Tutorial T 16 Lesson 1 ModelSim conceptual overview Multiple library flow ModelSim uses libraries in two ways 1 as a local working library that contains the compiled version of your design 2 as a resource library The contents of your working library will change as you update your design and recompile A resource library is typically static and serves as a parts source for your design You can create your own resource libraries or they may be supplied by another design team or a third party e g a silicon vendor You specify which resource libraries will be used when the design is compiled and there are rules to specify in which order they are searched A common
111. y the memory contents ram_tb spram1 mem The data are all X 0 in VHDL since you have not yet simulated the design The first column blue hex characters lists the addresses Figure ram_tb spraml mem F x 55 and the remaining columns show the data values 00000000 xxxxxxxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX B d Double click instance ram tb spram2 mem in the Memories tab of the 00000006 xxxxxxxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000000 xxxxxxxx XXXxXXXxX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Workspace 00000012 xxxxxxxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX This creates a new tab in the MDI frame called mem 1 that contains the 00000018 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 2 0000001 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX addresses and data for the spram2 instance Each time you double click DOODIA XXXXXiXX XXXXZXXX XXXXZLXX XXXXZXXE a new memory instance in the Workspace a new tab is created for that 0000002a xxxxxxxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX instance in the MDI frame 00000030 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00000036 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 0000003 xxxxxXxx XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00000042 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Ao coerce TE DEI T ECOL me ee dunes au cia
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