PD2-AO series - OMEGA Engineering
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1. This mode supports update rates up to 455KS sec 31 23 15 0 Bits 16 20 are used to define the output channel number on a PD2 PDXI AO 8 16 32 board Bit 21 when set is used as a Write and Hold Flag this is used to write data to the DAC WITHOUT updating it on a PD2 PDXI AO 8 16 32 board Bit 22 when set is used as an Update All Flag all DAC s will be updated by the previously written data on a PD2 PDXI AO 8 16 32 board PD2 AO 96 board only Bits 16 22 are used to define the output channel number on PD2 PDXI AO 8 16 32 boards 23 24 Chapter 3 Architecture Bits 21 22 23 when all set together are used as a Write and Hold Flag written to DAC s data with this bit set will not update output Bits 23 when set is used as Update All Flag all DAC s will be update by previously written data This is the default configuration which provides an unlimited channel list length Another way to define the channel list is a series of continuous channel numbers 1 2 4 8 16 32 64 up to the number of ports available on the AO board starting at any channel For example the PD2 AO 32 channels O through 15 can be specified as a channel list of channels to be updated in Event based Waveform Mode and the remaining channels can be used in Single Update Mode This mode is called DMA based update mode and supports output rates up to 1 6 MS sec There is a dedicated function in the PowerDAQ API called PdAO32. All PowerDAQ AO boards have the following additional features Digital Input Eight static digital inputs Digital Output Eight static digital outputs Clock Interrupt Lines Counter Timers Three 24 bit 33 50MHz Internal 16 5 25 MHz External Getting Started To get your PowerDAQ AO board up and running ensure that you have the following A computer with PCI slots for PD2 AO models or PXI CPCI slots for PDXI AO models and the BIOS compliant to PCI Specifications 2 1 or greater See Appendix C Common Questions and Support PowerDAQ PD2 AO PCI PDXI AO board with user manual Chapter 1 Introduction Latest PowerDAQ Software Suite CD PD SDK Software This can be downloaded from www PowerDAQ com download Minimum 16MB RAM for Windows9x and 32MB for Windows NT 98 Me and 64MB for Windows 2000 Installation and Configuration Chapter 2 Installation and Configuration Installation and Configuration This chapter describes the hardware and software installation and configuration of the PowerDAQ AO board Unpacking Your PowerDAQ AO board is wrapped in an anti static bag to protect against electrostatic charges that might damage the board To avoid damage proceed as follows Ground yourself with a grounded wrist strap or grounded source Discharge the static electricity by taking the board in the antistatic bag and touching the metal part of your PC Remove the board from the antistatic bag We su
3. PowerDAQ PD2 AO PDXI AO PCI PXI High Density 16 bit Analog Output Board User Manual High Performance Multifunction 1 0 boards for PCI Bus Computers August 2001 Edition Copyright 1998 2001 Omega Engineering Inc All rights reserved All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without prior written permission Third Edition August 2001 Printing Information furnished in this manual is believed to be accurate and reliable However no responsibility is assumed for its use or for any infringements of patents or other rights of third parties that may result from its use Contacting Omega Engineering Address OMEGA Engineering Inc One Omega Drive Stamford Connecticut 06907 0047 U S A Support Telephone 1 800 622 2378 Fax 1 800 848 4271 AlInternet Access Support support omega com Web site http www omega com FTP site ftp ftp omega com Table of Contents Table of Contents How to Use This Manual iv IntrodUctlO cse sioe re e ed eee ettet easet tutte enter eges iv Who Should Read This Book ssssssssssse iv Organization of This Manual iv Conventions Used in This Manual vi FeedBack us dms eame fe alk teet Moose that teneo n stone vi Introduction iii 2 About the PowerDAQ Analog Output ser
4. 8 16 32 Channels PD CBL 37 Local IRQx and Remote AMRS s Sense termination jumpers jumpers Channel 6 31 1 channels 0 15 and digital lines PD CBL 96 PD AO STP 32 Screw Terminal To from Digital sensors AOUTx SNSx Jumpers JP1 JP32 defines the sense configuration for the channels 0 31 respectively When shunts installed at locations B C the channel is configured to remote sense and SNSx terminal used to connect this line to the remote equipment If shunts are installed at A B and C D locations the channel is configured to local sense at screw terminal and SNSx terminal for the selected channel connected to the AGND AOUTX channel x output SNSx channel x sense line or AGND see jumpers JP1 JP32 settings To the servo motors etc Figure 10 Configuring the PD2 AO STP with PD2 AO 8 16 32 41 Chapter 5 Interconnections PDXI Analog Output Board 8 16 32 Channels IRQx and TMRx termination jumpers PDXI CBL AO PD AO STP 32Screw Terminal els 0 15 and digital lines AOUTx SNSx AOUTx channel x output SNSx channel x sense line or AGND see jumpers JP1 JP32 setting
5. 924 1441 Email support powerdag com 55 56 Appendix C Common Questions and Support Web Site WWW powerdaq com For the most efficient service please be available at your computer and be prepared to answer several questions listed on the following page when you call for technical support This information helps us identify specific system and configuration related problems Appendix C Common Questions and Support Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware Completing this form accurately before contacting us for technical support helps our application engineers answer your questions more efficiently What is the name and version number of the product What version of Windows are you using What programming language and version Is the board set at factory configuration Have you run the board diagnostics What were the results Did the system ever work If so what changed moved location installed other boards software etc Have you run the sample programs What were the results Have you verified that all your connections are made properly and are secure Have you been able to isolate the source of your problem input or output device board software What other boards or applications are installed in your system How much RAM do you have What size hard disk are you using How fast is you
6. Chapter 3 Architecture Timing and Control The PowerDAQ AO clocking and triggering features are extensive and can be configured in various different ways Analog Output Clocking Clocking comprises of two input signals T Clock In used to clock analog output channels in channel list 2 Trigger In used to start stop acquisition You must load the channel list prior to starting this operation Clocking can be controlled by Software Strobe Internal Clock DSP External Clock Universal External Interrupt Clock Synchronization Inputs You can only use these lines for Analog Output Clocking OR Triggering Triggering is configured as follows Use the IRQB pin to asynchronously update all DACs Use the IRQC pin to supply your external trigger source Trigger modes Start trigger acquisition starts on rising edge of the trigger signal Stop trigger acquisition stops on rising edge of the trigger signal Trigger lines should be pulled down to ground via 4 7Kohm resistors 28 Chapter 3 Architecture Synchronizing two or more boards Using the PowerDAQ AO control panel application please ensure the software driver recognizes the two or more PowerDAQ AO boards No custom synchronization cables are required all connections can be made directly on the screw terminal PDXI AO boards provides a special configuration program PDXICFG EXE that allows synchronize boards via the PXI bus extension This feature is
7. PowerDAQ Control Panel PowerDAQ PD 40 32 Status READY Serial Number 011655 ADC FIFO Size 2kS Manufacture Date 01 OCT 1999 Calibration Date 30 NOV 1999 Power on value 1065 Base address OxFFAFODOO IRQ number 10 Figure 2 PowerDAQ control panel application showing PD2 AO 12 32 board installed Please refer to the PowerDAQ Software manual for a complete set of ready to run example programs and the detailed API for programming of the PowerDAQ AO boards All PowerDAQ AO manuals are supplied in electronic Adobe Acrobat PDF format If you require the PDF reader this can be downloaded from the Internet from www adobe com Chapter 2 Installation and Configuration Accessories PowerDAQ AO boards have an extensive range of optional accessories Cables 3ft 6ft or 9ft Screw terminal panels Complete kits J1 high density analog cable PD2 AO 8 16 32 only J2 PD CBL 37 DIO connection kit PD2 AO only J3 J8 IDC40 to DB37 flat twisted pair ribbon cable PD2 AO 96 only J1 to J1 J2 splitter analog digital cable Cables Digital cable PD2 AO boards only PD CBL 37 The J2 connector uses a 37 way ribbon connector set It comprises of a 13 internal ribbon cable which connects from the PowerDAQ AO board J2 internal digital connector DIO Counters IRQs to a 37 way D SUB bracket A 1 meter ribbon cable then connects from the bracket to the PD2 AO STP accessory panels Analog cable PD2 AO
8. Process Control e ATE e Closed loop Servo Control e Motor Control e Individual DAC voltage output e Telecommunications equipment control micro mirrors The Digital Input and Digital Output Subsystems applications Electro mechanical relay control applications Solid state relay applications Alarm System sensors Digital motion control The Counter Timer Subsystem applications e PWM modulator e Frequency counter e Pulse generator The easiest way to expand the possibilities of the PD2 AO PDXI AO board is to use the PD2 MF S or PDXIU MF S multifunction boards series in the same PC Chapter 1 Introduction PowerDAQ AO Models PowerDAQ PD2 AO PDXI AO model numbers are derived as follows PD2 Type Of Board Channels Speed Resolution Gain PDXI Type Of Board Channels Speed Resolution Gain The types of boards are MF Multifunction AO Analog Output DIO Digital Input Output CTM Counter Timer Models AO Features PD2 AO 8 16 PCI bus Eight 16 bit Analog Output Channels PD2 AO 16 16 PCI bus Sixteen 16 bit Analog Output Channels PD2 AO 32 16 PCI bus Thirty two 16 bit Analog Output Channels PD2 AO 96 16 PCI bus Ninety six 16 bit Analog Output Channels PDXI AO 8 16 PXI CPCI bus Eight 16 bit Analog Output Channels PDXI AO 16 16 X PXI CPCI bus Sixteen 16 bit Analog Output Channels PDXI AO 32 16 CPCI bus Thirty two 16 bit Analog Output Channels Table 1 PowerDAQ AO Models s x
9. connector layout is defined J2 DIO Timers J3 AOut 0 15 J4 AOut 16 31 J5 AOut 32 47 J6 AOut 48 63 J7 AOut 64 79 J3 AOut 80 95 Jojoeuuo pf 10J98UU09 9f Jojoeuuo gf Jo euuo ef 10J98UU09 Gf Jo euuo JP mu Figure 6 PowerDAQ PD2 AO 96 Connectors For manufacturers part numbers see Appendix A Specifications 37 Chapter 5 Interconnections PDXI AO 8 16 32 Connectors The PowerDAQ PD2 AO 8 16 32 boards have only one connector 96 contact high density Fujitsu header analog output and DIO Timers connector J1 PowerDAQ PDXI AO 8 16 32 Channels 0 15 sense line jumpers Install 1 2 and 3 4 jumpers to short sense line with corresponding output on the board SNSx terminals are grounds in this case Install 2 3 jumpers to keep sense line in the cable In this case screw terminal jumpers should be installed Rows A AOut3 B AOut2 C AOutl D AOut0 E AOut7 F AOut6 G AOut5 H AOut4 I AOutl J AOut10 K AOut9 L AOut8 M AOut15 N AOutl4 O AOut13 P AOut12 Factory installed jumpers PDXI AO 8 16 boards only Connects outputs 16 31 to the analog ground to provide more grounds in the cable Figure 7 PowerDAQ PDXI AO 8 16 32 Connectors For manufacturers part numbers see Appendix A Specifications 38 Chapter 5 Interconnections PD2 AO 8 16 32 J1 Analog Connector AGND AGND AGND AGND AGND AGND AGND AGND NC AGND AG
10. not available in standard Compact PCI chassis If internal connection between multiple boards is required the following connections should be made PD2 AO boards only The PowerDAQ PD2 AO J2 internal connector has a TMR2 Clock I O pin You can connect this pin to the TMR2 pin of the next board you wish to synchronize acquisition It is preferable to use a 100 200 Ohm series resistor for the clock connection For a custom cable contact the factory 29 30 Chapter 3 Architecture API and Third Party Software Examples 31 Chapter 4 API and Third Party Software API and Third Party Software Examples The PowerDAQ Software Suite API and third party software drivers support all PowerDAQ AO board features This chapter provides an overview on how to use the API calls and examples using third party software API Function calls 32 Please refer to PowerDAQ SDK and programmer manual for the details about Analog Output board programming Generally Analog Output subsystem works in the same way as all other paced subsystems The following command sequence should be used to program the PowerDAQ AO board in a low level language such as C C VB Delphi e Open Driver This allows you to check that the driver is installed properly and started and also gets a number and parameters of the PowerDAQ boards installed in the system e Open Adapter After the adapter is opened the PowerDAQ SDK return a special handle that sh
11. waveform mode and auto regeneration waveform mode The user can define the power on value of each channel the default start up value is set to zero The included utility application Start Up Configuration Wizard StartUpState exe is installed by the SDK can be used to modify the start up states The Power On state will be loaded into the DACs with 200 ms maximum delay after the system reset The calibration values will be loaded only when PowerDAQ driver is loaded and up to 30 mV offset is possible on the outputs during the system boot process 21 Chapter 3 Architecture The quad output DACs has current limitations Only one output of each quad can be continuously shorted to ground Two three and even four channels shorted to ground MUST NOT exceed five seconds Analog Output Mode Single Update The PowerDAQ AO boards operate with either a single update or streaming waveform output configuration Single update mode allows direct write access to any of the 16 bit DACs of the PowerDAQ AO board The update frequency is at least 1kHz for the single update mode and can be as high as 15KHz in real time operating environments The single update speed is dependent on your PC system speed There is a special sub mode of the single update mode when all or selected DAC s outputs are updated simultaneously Event based Waveform Event based waveform mode allows continuous waveform generation and is not limited by the am
12. 2SetUpdateChannel which can be used to specify the update channel number Any write to this channel will force the update of all DAC s Chapter 3 Architecture Digital Output Subsystem There are eight static digital outputs on the PowerDAQ analog output board They are TTL CMOS output level compatible 2000V ESD protected Due to the static nature of the outputs they can be updated at any time without any limitations Digital outputs provide high current compatibility 32 64 ma which support drive relays or these lines can be used for control applications Digital Input Subsystem There are eight static digital inputs on the PowerDAQ analog output board They are TTL CMOS input level compatible 2000V ESD protected Due to the static nature of the inputs they can be read at any time without any limitations Counter Timer Subsystem Depending on your PowerDAQ AO operation mode the board can support up to the three DSP based 24 bit counter timers with a maximum count rate up to 33 MHz for 66MHz DSP and 50MHz for 100MHz DSP PDXI AO only for an internal base clock and 16 5 MHz 25MHz for the external clock The minimum count rate is 0 001 Hz for the internal clock and no low limits for the external clock For all waveform modes only TimerO and Timer are available for use Programming of the counter timer subsystem of the PD2 AO board requires a minimal understanding of the Triple Timer Module of the Motorola 56301 DSP For thi
13. 4 37 DNC N C 19 DNC OUT15 DNC Do not connect 51 Appendix B Accessories OEM Header Distribution Connector For the OEM the PD2 AO and PDXI AO board provides the PD CONN PCB a small terminal panel The PD CONN PCB allows you to connect both PD2 MF MFS and PD2 AO PDXI AO boards See table on the next page for the pinout conversion PowerDAQ II PDXI AO Board 8 16 32 Channels To the servo motors etc Figure 14 PD CONN PCB wiring diagram Custom terminal panels are available Please contact the factory or your distributor 52 Appendix B Accessories Accessory Board Connections PD2 MFx PD2 AO 32 31 31 PD2 AO 32 PD2 MFx Pin Pin AGND AGND 1 49 AGND AGND AGND AGND 2 50 AGND AOUTO AGND AGND 3 51 AGND AGND AGND AGND 4 52 AGND AOUT1 DGND DGND 5 53 AGND AGND AGND AGND 6 54 AGND AGND AIN55 AOUT31 7 55 AOUT30 AIN54 AIN53 AOUT29 8 56 AOUT28 AIN52 AIN51 AOUT27 9 57 AOUT26 AIN50 AIN49 AOUT25 0 58 AOUT24 AIN48 AGND AGND 11 59 AOUT23 AIN39 AIN38 AOUT22 12 60 AOUT21 AIN37 AIN36 AOUT20 13 61 AOUT19 AIN35 AIN34 AOUT18 4 62 AGND AGND AIN33 AOUT17 5 63 AOUT1
14. 408 745 4990 Fax 408 745 4995 The manufacturers part number for the connector is FCN 230C096 C E and the metal cover FCN 247J096 G E Custom terminal panels are available Please contact your distributor or the factory J2 Connector PD2 AO only J2 connector is a 36 way boxed IDC header The manufacturer is Tomas amp Betts www tnb com The manufacturers part number for the connector is 609 3627 Chapter 2 Installation and Configuration J3 J8 Connector PD2 AO 96 only J3 J8 connectors are 40 way boxed IDC headers The manufacturer is 3M http www mmm com esm The manufacturers part number for the connector is 2540 6002UB 17 18 Chapter 2 Installation and Configuration Architecture Chapter 3 Architecture Architecture This chapter describes the functional operation of the PowerDAQ AO boards AOut Control Anuta Counter Timer 3x24 bit AOUT30 SENSE PowerDAG II AOUTSO Data Acquisition Driver AOUTO SENSE a a t E 9 E E 5 e E 2 Control and g E E TRA o E Timing Logic gt 8 z E E El E 2 a 5 5 O o 2 E z al E DOut Control NM 8 EF AOUT1 SENSE E Digital O ES Output 3 o g lt T g E E ii 6 Channel DMA RAM 18k Data RAM Bootstrap ROM User Clock User Clock AOut FIFO AQut Clock 12k Program Configuration WEGEN Worse Motorola 66MHz DSP 56301 S cab
15. 6 AIN32 AIN23 AOUT15 6 64 AOUT14 AIN22 AIN21 AOUT13 7 65 AOUT12 AIN20 AGND AGND 18 66 AOUT11 AIN19 AIN18 AOUT10 9 67 AOUT9 AIN17 AIN16 AOUT8 20 68 AOUT7 AIN7 AING AOUT6 21 69 AGND AGND AIN5 AOUT5 22 70 AOUT4 AIN4 AIN3 AOUT3 23 71 AOUT2 AIN2 AIN1 AOUT1 24 72 AOUTO AINO AGND AGND 25 73 AGND AGND Ext Trig In AGND 26 74 AGND T5V CV Clock AGND 27 75 AGND CV Clock In Out C AGND 28 76 AGND AGND AGND AGND 29 77 AGND N C CL Clock In AGND 30 78 AO T 31 SENSE AIN63 AIN62 AOUT 30 SENSE 31 79 AOUT 29 SENSE AIN61 AIN60 AOUT 28 SENSE 32 80 AGND AGND AIN59 AOUT 27 SENSE 33 81 AOUT 26 SENSE AIN58 AIN57 AOUT 25 SENSE 34 82 AOUT 24 SENSE AIN56 AIN47 AOUT 23 SENSE 35 83 AOUT 22 SENSE AIN46 AGND AGND 36 84 AOUT 21 SENSE AIN45 AIN44 AOUT 20 SENSE 37 85 AOUT 19 SENSE AIN43 AIN42 AOUT 18 SENSE 38 86 AOUT 17 SENSE AIN41 AIN40 AOUT 16 SENSE 39 87 AOUT 15 SENSE AIN31 AGND AGND 40 88 AOUT 14 SENSE AIN30 AIN29 AOUT 13 SENSE 41 89 AOUT 12 SENSE AIN28 AIN27 AOUT 11 SENSE 42 90 AOUT 10 SENSE AIN26 AIN25 AOUT 9 SENSE 43 91 AGND AGND AIN24 AOUT 8 SENSE 44 92 AOUT 7 SENSE AIN15 AIN14 AOUT 6 SENSE 45 93 AOUT 5 SENSE AIN13 AIN12 AOUT 4 SENSE 46 94 AOUT 3 SENSE AIN11 AGND AGND 47 95 AOUT 2 SENSE AIN10 AIN9 AOUT 1SENSE 48 96 AOUT O SENSE AIN8 Table 2 Conversion between the PD2 MF S and PD2 AO board J1 connector pinout 53 54 Appendix B Accessories Dimensions Th
16. 8 16 32 0 0000V 5mV PD2 AO 96 PDXI AO Gain drift 25ppm deg C 43 Appendix A Specifications Due to the quad DACs the current is limited Only one output of each may be continuously shorted to ground The current is limited to 40 ma for PD2 AO 8 16 32 boards and 20 ma for all other models Digital Input and Output Parameter Value Number of channels 8 inputs and 8 outputs Compatibility CMOS TTL 2KV ESD protected Power on state Logic Zero Input termination 4 7Kohm pull up to 5V Output High Level 3 0V min 32 mA 3 4V min 16 mA 4 2V min 2 mA Output Low Level 0 55V max 64 mA Input Low Voltage 0 0 0 8V Input High Voltage 2 0 50V Input current 1uA DSP based subsystems There are two DSP based subsystems available on the PowerDAQ DIO boards 44 Counter timers High speed interrupts DC ELECTRICAL CHARACTERISTICS FOR DSP BASED SUBSYSTEMS Counter timers Parameter Value Number of channels 3 Resolution 24 bits Maximum frequency 16 5 25MHz for the external 33 50 MHz for the internal clock see notes Minimum frequency DC for input 0 001Hz for output Minimum Pulse Width 20 nS Appendix A Specifications Output High Level 2 0V min 4 mA Output Low Level 0 5V max 4 mA Input Low Voltage 0 0 0 8V Input High Voltage 2 0 50V Input current 1u
17. 8 16 32 boards only PD CBL 96 The J1 connector uses a 96 way shielded round 1 meter cable with a metal connector on either end It connects to PD2 AO STP 16or 32 PD BNC 16 or 64 accessory panels 13 14 Chapter 2 Installation and Configuration Analog cable PD2 AO 96 boards only PD CBL 4037TP The J3 J8 connector uses a 36 way flat or twisted pair ribbon cable DB37 to IDCAO to bring out the analog output signals It connects to PD STP 3716 so one PD2 AO 96 16 board requires a set of six cables and terminals for all ninety six channels The PowerDAQ PD2 AO 8 16 32 boards require a PD CBL 96 and the PD2 AO 96 requires up to 6 PD CBL 4037TP If digital IO CTM is going to be used an optional PD CBL 37 cable is required Custom cables are available Please contact the factory for more details Splitter analog digital cable PDXI AO boards only PDXI CBL AO The J1 connector uses a split round shielded cable which brings out the analog signals to a 96 way pin less Fujitsu connector and the digital 1 O signals to 37 way DB 37 connectors It connects to PD2 AO STP xx PD BNC xx accessory panels Chapter 2 Installation and Configuration Screw Terminal Panels The PD2 AO STP 16 32 is a 16 32 channel screw terminal panel which also includes connections for the counter timers high speed interrupt synchronization lines and DIO ports Using the jumpers each sense line can be connected to the appropriate ou
18. A External Event Counter Input Width Measurement Input Period Measurement Event Capture Pulse Width Modulation PWM Watchdog Pulse Watchdog Toggle The external clock frequency should be less than the internal operating frequency divided by 4 Le 16 33 25 00 MHz for 66 100 MHz DSP The standard PowerDAQ boards ships with a 66 MHz DSP COUNTER TIMER SPECIFICATIONS INote The maximum timer frequency is 16 33 MHz for external dock and 33 MHz for internal clock 66 MHz DSP core TIO assumes timer I O pin CLKOUT DSP clock The minimum pulse width is 20 ns for an external clock event The following conditions apply TA 0 C to 100 C C load 50pF 2 TTL loads 45 46 Appendix A Specifications CONNECTORS SPECIFICATIONS Connector Description Manufacturer P N J1 PD2 AO 8 16 32 Fujitsu Takamisawa America Inc PDXI AO 408 745 4990 Fax 408 745 4995 Connector p n FCN 230C096 C E and the metal cover p n FCN 247J096 G E J2 PD2 AO J2 connector is a 36 way boxed IDC header The manufacturer is Tomas amp Betts www tnb com p n for the connector is 609 3627 J3 J8 PD2 AO 96 J3 J8 connectors are 40 way boxed IDC headers The manufacturer is 3M http www mmm com esm p n for the connector is 2540 6002UB ENVIRONMENT Operating environment O C to 70 C Appendix B Accessories Appendix B Accessories Overview The PowerDAQ AO boards can con
19. A typical set of events include data availability events and error events Start of asynchronous operation WaitForSingleObject operating system function call or an equivalent should be used to check for events from the board It is preferable to put this call into a separate thread After an event the application should re initialize it and process the data Terminate asynchronous operation Auto regenerate mode user application can allocate one or more frames in the buffer fill it with data and start acquisition The PowerDAQ driver will control event handling and supply more data into the on board FIFO as requested Note that frame size cannot exceed 64Mbytes The size of the buffer itself is limited by the amount of Physical memory installed on your PC 33 Chapter 4 API and Third Party Software e Close subsystem When the application closes the subsystem it s frees up resources e Close adapter After the adapter is closed it is accessible from other applications e Close driver API Examples The PowerDAQ Software Suite contains a complete set of self documented examples dedicated to PowerDAQ AO boards programming The best way to write your own program is to use a ready to run example and modifiy it as required by your application The examples are available in the following languages C C Delphi VisualBASIC e Single Update Example Separate example available for the PD2 AO 96 16 board e Buffered output Exam
20. AQ Software Suite prior the board installation Installing Multiple Boards You can install multiple PowerDAQ AO boards in one PC You are limited to the number of PCI PDXI slots in your PC Software PowerDAQ Software Suite CD contains drivers and software example code with source code for Windows Linux and QNX optional You can always download the latest software suite from www PowerDAQ com download Installation From the CD run the SETUP exe program The setup program will take you through the installation process If you downloaded the PowerDAQ software from the web you just need to run the file downloaded and follow the setup instructions Chapter 2 Installation and Configuration As the installation process modifies your Windows registry you must only install or uninstall the software using the appropriate programs Never delete the PowerDAQ software from you PC directly Always use Uninstall program from PowerDAQ folder or Control Panel Add Remove Programs applet Once the installation is complete the PC must be rebooted for proper operation Windows NT 2000 XP users must be logged in as an administrator or have equivalent access Base address DMA Interrupt settings The PowerDAQ AO boards are configured automatically by the computer BIOS on power up Usually you do not have to set any base address DMA channels or interrupt levels The PowerDAQ driver is designed to share interrupts over PCI devices but
21. B Accessories Screw Terminal Panels PD STP 3716 The PD STP 3716 is a simple 16 channel screw terminal panel which includes connections to the analog signals only This terminal panel can be used with PD2 AO 96 and PD2 PDXI AO 8 boards only Note that different cables are required for the different boards e PD CBL 9637 used with PD2 AO 8 e PDXI CBL AO used with PDXI AO 8 e PD CBL 4037TP used with PD2 AO 96 Cable PD CBL 9637 PD2 AO 8 Cable PDXI CBL AO PDXI AO 8 6 Cable PD CBL 4037TP PD2 AO 96 PD STP 3716 Figure 13 PD STP 3716 Wiring Diagram That if Sense lines are available on PD2 AO 8 or J6 jumpers in 2 3 position on PDXI AO 8 AOutx line should be connected to ASensex line on the screw terminal 50 Appendix B Accessories Terminal PD2 PD2 AO 96 Termi PD2 PD2 AO 96 Pin PDXI AO 8 dea PDXI AO 8 1 OUTO Clk In 20 SNSO Clk Out 2 AGND Ext Trig 21 OUTI DGND 3 SNS DGND 22 AGND AGND 4 AGND OUTO 23 OUT2 AGND 5 SNS2 OUTI 24 AGND AGND 6 AGND OUT2 25 OUT3 AGND 7 SNS3 OUT3 26 AGND AGND 8 AGND OUT4 27 OUT4 AGND 9 SNS4 OUT5 28 AGND AGND 0 AGND OUT6 29 OUT5 AGND 1 SNS5 OUT7 30 AGND AGND 12 AGND OUT8 31 OUT6 AGND 13 SNS6 OUT9 32 AGND AGND 14 AGND OUT10 33 OUT7 AGND 15 DNC OUT11 34 SNS7 AGND 16 DNC OUT12 35 DNC AGND 17 DNC OUT13 36 DNC AGND 18 DNC OUT1
22. J1 connectors use a split 96 PD CBL 37 way shielded round 1 meter cable It connects to PD2 AO STP xx PD BNC xx accessory panels Note that both analog and digital signals are connected to the screw terminal using this cable This is a 37 way ribbon connector set It comprises of a 13 internal ribbon cable which connector from the PowerDAQ AO board J2 internal digital connector DIO Counters IRQx to a 37 way D SUB bracket A 1 meter ribbon cable then connects from the bracket to the PD AO STP accessory panels The PD CBL 37 is available as an option PD CBL 4037TP This is a 36 way ribbon cable which connectos from the PowerDAQ AO 96 channel board J3 J8 internal analog connector to a 37 way D SUB bracket A 1 meter ribbon cable then connects from the bracket to the PD STP 3716 accessory panels Used with PD2 AO 96 boards only Appendix B Accessories Screw Terminal Panels PD2 AO STP xx The PD2 AO STP 32 is a 32 channel screw terminal panel which includes connections to the counter timers high speed interrupt synchronization lines and DIO ports Custom terminal panels are available Please contact your distributor or the factory N Cable icc E PD2 AO Board lt Cable PD CBL 37 Q A N 4 PDXI CBL AO a PDXI AO 7 board lt Q A Figure 12 PD2 AO STP 32 Wiring Diagram 49 Appendix
23. ND AGND AOUT31 AOUT30 AOUT29 AOUT28 AQUT27 AOUT26 AQUT25 AOUT24 AGND AOUT23 AQUT22 AOUT21 AQUT20 AOUT19 AOUT18 AGND AQUT17 AOUT16 AOQUT15 AOUT14 AOUT13 AOUT12 AGND AOUT11 AOUT1O AOUTS AOUT8 AOUT7 AOUT6 AOUTS 4 AOUT3 2 AOUT1 0 gt Q o AGND AGND AGND AGND AGND 31 SENSE AOUTSO SENSE 29 SENSE AOUT28 SENSE AOUT27 SENSE 26 SENSE AOUT25 SENSE 24 SENSE AOUT23 SENSE 22 SENSE AGND 21 SENSE AOUT20 SENSE 19 SENSE AOUT18 SENSE 17 SENSE AOUT16 SENSE 15 SENSE AGND 14 SENSE AOUT13 SENSE 12 SENSE AQUT11 SENSE 10 SENSE AOUT9 SENSE AGND AOUT8 SENSE AOUT7 SENSE AOUT6 SENSE AOUTS SENSE AOUT4 SENSE AOUT3 SENSE AGND AOUT SENSE AOUT1 SENSE AOUTO SENSE Figure 8 Connector pin assignment for the J1 39 Chapter 5 Interconnections The compatible pin out was used for the PD2 AO 8 16 32 and PD2 MF S J1 connector to provide the ability to use common accessories For the details see conversion table in Appendix B Note that on PD2 AO 8 16 AOUT16 31 and AOUT16 31 SENSE are connected to the ground PD2 AO J2 DIO Counter Timers IRQx Connector Figure 9 Connector pin assignment for the J2 J1 J2 Connection Example The example below shows how to connect PD2 AO board to the PD2 AO STP screw terminal For the PD2 AO 8 16 board lines OUTI6 OUT31 and OUT16S OUT32S are tied to the analog ground 40 Chapter 5 Interconnections PowerDAQ II Analog Output Board
24. dditionally each board has a special calibration subsystem which is used to calibrate each analog output channel Chapter 1 Introduction Features The major features of the PowerDAQ AO boards are 24 bit 66 100 MHz Motorola 56301 DSP Digital Signal Processor Bus Master Ready PCI Bus Host PC Interface PCI 2 1 Compliant 8 16 32 96 channel 16 bit 10V DACs DC 100KHz per D A throughput 2MHz board maximum update rate 1 2 4 8 16 32 64 Fixed Unlimited channel list length Asynchronous Simultaneous update modes for the all DACs Eight Digital Inputs Eight Digital Outputs Counters Interrupt Synchronization inputs Per channel calibration Sense lines for the each DAC optional jumper selectable on PDXI models User defined Power Up states for the each DAC 200 ms maximum setup time after the system reset Default is OV Three 24 bit counter timers 16 5 25MHz maximum On board 2K FIFO located in the DSP memory 32Ksamples FIFO upgrade option Software PowerDAQ for Windows95 98 Me NT 2000 XP Linux QNX Visual C VB Delphi C Builder Kylix Drivers for LabVIEW HP VEE LabWindows CVI amp TestPoint DASYLab DiaDem MATLAB DAQ Toolbox For the full list of specifications see Appendix A Specifications Chapter 1 Introduction AO Applications PowerDAQ Analog Output series boards provide a wide range of powerful features that cover a wide range of applications The most common applications are e
25. de Chapter 3 Architecture Calibration Subsystem The calibration subsystem is used to calibrate each analog output zero offset with 150 microvolt accuracy and output range PD2 AO only The calibration data is stored in the on board EEPROM Additionally a PowerDAQ AO board provides an application for the user to configure the start up output value of the any DAC This value will be loaded immediately after a system reset or power on with 200 ms maximum latency DSP Processor All PowerDAQ AO boards are based on the Motorola 56301 DSP This is a 24 bit 66 100 MHz processor with an integrated PCI interface The PCI interface implements the PCI Local Bus Specifications so the board is fully auto configured base address interrupt When the PowerDAQ software is loaded the PowerDAQ AO firmware is downloaded to the DSP via the PCI bus This firmware contains all the code necessary to communicate with the board subsystems and the host PC driver The drivers from the PowerDAQ web site always contain the latest versions of the DSP firmware Custom programming of the DSP is not available with the standard PowerDAQ AO product However should you require DSP processing please contact the factory PCI Bus Interface The PowerDAQ AO boards communicate via the PCI bus The PCI bus interface is embedded in the Motorola 56301 DSP On power up the host PC automatically configures the boards base address and interrupt resources 27
26. e following table contains the dimensions of PowerDAQ AO and accessory products Accessory Dimensions W x L x H PDXI AO x 3 9 x6 3 x0 5 PD2 AO 96 4 2 x13 275 x0 5 PD2 AO 32 4 2 x11 x0 5 PD2 AO 16 4 2 x8 2 x0 5 PD2 AO 8 4 2 x8 2 x0 5 PD2 AO STP 32 4 2 x7 0 x2 1 PD STP 3716 2 8 x4 4 x0 5 PD CONN PCB 3 3 x3 33 x0 4 Table 3 Dimensions of PowerDAQ AO accessory products the Appendix C Common Questions and Support Appendix C Common Questions and Support Q ina is PCI Specification 2 1 A he PCI LocalBus is a high performance bus that provides a processor independent data path between the CPU and high speed peripherals PCI is a robust interconnect mechanism designed specifically to accommodate multiple high performance peripherals for graphics full motion video SCSI LAN etc The PCI Local Bus Specifications Rev 2 1 includes the protocol electrical mechanical and configuration specification for the PCI Local Bus components and expansion boards The Rev 2 1 was published June 1 1995 by the PCI Special Interest Group PO Box 14070 Portland OR 97214 Web site www pcisig com Calibration Questions Q How often should calibrate my board A ne PD2 AO series board should be calibrated once a year Service and Support If you have technical problems using PowerDAQ PD2 AO our Technical Support department can be reached by Telephone 617 924 1155 Fax 617
27. eem aeree ds 34 Third party examples c tete pr erat lettere a den edet abeo 34 INTEFCONNECHONS AP RR 36 PD2 AO 8 16 32 CorinectoFsc cao bett Fe RR lods tots 36 pI 2 A096 CONNECTONS uc 37 PDXI AO 8 10 52 CONNE CtOSS nti ie Pe t teet 38 PD2 AO 8 16 32 J1 Analog Connector 39 PD2 AO J2 DIO Counter Timers IRQx Connector 40 J1 J2 Connection Example 40 Appendix A Specifications 43 PD2 AO specificati ris sec deterrere te E PER state dense 43 AO SUDSVSEOlL 3 co cete c dee sene o rere Eat en ER A OR PE Rd RE TS 43 Digital Input and Output 44 DSP based subsystems sssssssssee eee 44 Appendix B Accessories eese 47 OVELVICW so o te Mas n e beer Asti gu Ar f oe s 47 Cables CDI CB sare nest stan DRM eSI bte belts ctas 47 Screw Terminal Panels PD2 AO STP XX 49 Screw Terminal Panels PD STP 3716 50 OEM Header Distribution Connector 52 Accessory Board Connections 53 Appendix C Common Questions and Support 55 Calibration QUESTIONS xcix aree ois ede eb De EA DR RE ew ees 55 Service and SuppOLt modem eter aU b ee es Ete d rdum 55 Technical S pDbOrt FOFLI s itm nt ee d bo Gs aha eee 57 Appendix D Warranty inserer 58 A het ae Sas ead adgat waits een pnd Men a 58 Iri eX A ceri oe Ae 60 ii Table of Contents L
28. ggest you save the bag Inspect the board for any damage If any damage is found notify your distributor to return the board to the manufacturer See Appendix C Common Questions and Support The PowerDAQ AO boards contain sensitive electronic components Please make sure the proper grounding and electrostatic conditions are used Hardware You can install your PowerDAQ PD2 AO board in any PCI slot PDXI AO boards should be installed into the Compact PCI PXI PDXI chassis only We recommend you use the first available slot and complete the following instructions PCI board installation 1 Turn off your PC Remove the cover and make sure you have clear access to the PCI slots Connect all desired cables to the PD2 AO board Insert the PowerDAQ PD2 AO board into a PCI slot If the PCI slots have not been used for a long time insert the PowerDAQ PD2 AO board then remove it and clean Chapter 2 Installation and Configuration the edge connector with alcohol After this has been done replace the bard back into the slot Screw the bracket and replace the cover Turn the PC on PDXI board installation Turn off your PC Remove the slot cover Insert the PowerDAQ PDXI AO board into a slot Screw the bracket Turn the PC on UB WN The PowerDAQ AO board is now installed All board configurations are controlled via software using the PD SUITE For the Windows 95 98 Me 2000 XP platforms you should install PowerD
29. ies board 2 eS 2 FeatUles26na e cci Mt Ae eed ee Ro ste bed d de 3 AO Applications 4 PowerDAQ AO Models 5 Getting Started 5 Installation and Configuration 8 e NA 8 HardWare e de IL ecd A od 8 Installing Multiple Boards oooocononociococcnocccoonncnooncnonnnnnnnncnonnncnonnnnnnos 9 SONWALE e EA beh R 9 A oA nr nn CM oe E Lot e LAE ER 9 Base address DMA Interrupt settings ssssssm 10 DIAGNOSTICS Do rM Tm 10 ACCOSSOTI S cam eI idi ed ted re ed rent vanes eed 13 AA art Mie Not tr ue tte rte need ae 13 Screw Terminal Panel Sirenen rede P gb ertet aea toes 15 Complete kisas ati as 16 JT CONNECTION uerit o e EH bula ies 16 J2 Connector 4PD22AQ Oly ici esce tt teet ene aaa 16 J3 J8 Connector PD2 AO 96 only 17 Architecture inen eoi aid 20 Functional Overview EE E E TAT EST 20 Analog Output Subsystem AO ssssssssssseee 21 Digital Output Subsystem ssssssssssee eme 25 Digital Input Subsystem ed renina E o A TR a R ana 25 Counter Timer SUBSYSTEM e orea e tente ee ieee 25 Calibration SUBS aia emet d iit e ee tidie qms 27 DSP PrOC8SSOF ritin e ni neu npe E 27 PCI B s Ititertaee oc eene t ere beer d e te eed 27 Timing and Control aee ria e M t ec 28 API and Third Party Software Examples 32 Table of Contents API Function Call e rb retraite eme epo trabes paleis eedem genauen 32 APP EXamplesa us nn nn re Manica red
30. ist of Figures Figure 1 PowerDAQ Control Panel Application sesssssss 11 Figure 2 PowerDAQ control panel application showing PD2 AO 32 board installed etis ect iE EP E renes 12 Figure 3 PD2 AO STP 32 Wiring Diagram cccccoococncccononcnicononnnncnonnos 15 Figure 4 Block Diagram of the PowerDAQ PD2 AO boards 20 Figure 5 PowerDAQ PD2 AO 8 16 32 Connectors 36 Figure 6 PowerDAQ PD2 AO 96 Connectors usssssss 37 Figure 7 PowerDAQ PDXI AO 8 16 32 Connectors 38 Figure 8 Connector pin assignment for the J1 39 Figure 9 Connector pin assignment for the J2 n se 40 Figure 10 Configuring the PD2 AO STP with PD2 AO 8 16 32 41 Figure 11 Configuring the PD2 AO STP with PDXI AO 8 16 32 42 Figure 12 PD2 AO STP 32 Wiring Diagram ccccoooccccnononcncnooonnncononnnos 49 Figure 13 PD STP 3716 Wiring Diagram 50 Figure 14 PD CONN PCB wiring diagram sseee 52 List of Tables Table 1 PowerDAQ AO Models seRe 5 Table 2 Conversion between the PD2 MF S and PD2 AO board J1 connector Po eea tes rt er eee nece eet pre P A 53 Table 3 Dimensions of PowerDAQ AO accessory products 54 iii How to Use This Manual How to Use This Manual iv Introduction This manual describes the PowerDAQ Analog Output b
31. nect to a variety of stand alone or 19 rack mount accessory panels A complete range of cables and options are available If you require a custom accessory please contact the factory These are following options available for use with PowerDAQ AO boards e The universal screw terminal PD2 AO STP 32 includes both analog and digital terminals and allows you to connect Analog Output and Sense lines directly at the screw terminal May be used with all PowerDAQ AO boards except PD2 AO 96 note that digital part of this screw terminal still can be utilized e PD BNC 16 64 This BNC terminal connects each Analog Output line using the BNC terminated cable that allows eliminating or reducing external noise PD BNC 16 may be used with PD2 PDXI AO 8 boards only PD BNC 64 may be used with all PowerDAQ AO boards except PD2 AO 96 e PD CONN PCB This small terminal panel is useful in OEM applications but does not provide the ability to connect the digital signals to from the board e PD STP 3716 This terminal connects sixteen analog output channels to PD2 PDXI AO 8 or PD2 AO 96 board May be considered as a low cost termination option Cables PD XI CBL xx PD CBL 96 The J1 connectors use a 96 way shielded round 1 meter cable with a metal connector on either end It connects to PD2 AO STP xx PD BNC xx accessory panels Used with all PD2 AO boards except PD2 AO 96 47 48 Appendix B Accessories PDXI CBL AO The PDXI AO
32. o the user 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to effect its safety or effectiveness Appendix D Warranty Omega Engineering inc warrants that the products furnished under this agreement will be free from material defects for a period of one year from the date of shipment The customer shall provide notice to Omega Engineering of such defect within one week after the Customer s discovery of such defect The sole obligation and liability of Untied Electronic Industries under this warranty shall be to repair or replace at its option without cost to the Customer the product or part which is so defective and as to which such notice is given Upon request by Omega Engineering the product or part claimed to be defective shall immediately be returned at the customer s expense to Omega Engineering There shall be no warranty or liability for any products or parts which have been subject to misuses accident negligence failure or electrical power or modification by the Customer without Omega Engineering approval Final determination of warranty eligibility shall be made by Omega Engineering If a warranty claim is considered invalid for any reason the Customer will be charged for services performed and expenses incurred by Omega Engineering in handling and shipping the return item As
33. oards The following boards are supported D2 AO 8 16 D2 AO 16 16 D2 AO 32 16 D2 AO 96 16 DXI AO 8 16 DXI AO 16 16 DXI AO 32 16 Two different form factors are available 32 bit 33 MHz PCI and 32 bit 33 MHz PDXI PDXI is a PowerDAQ extension for instrumentation and is a superset of Compact PCI and PXI bus industry oriented standards v UU DU U U U v Who Should Read This Book This manual has been designed to benefit the user of PowerDAQ M PD2 AO and PDXI AO boards To use PowerDAQ Analog Output Board it is assumed that you have basic PC skills and that you are familiar with Microsoft Windows NT 2000 95 98 Me and or Linux QNX operating environments Organization of This Manual The PowerDAQ PD2 AO User Manual is organized as follows Chapter 1 Introduction This chapter gives you an overview of PowerDAQ Analog Output series board s features the various models available and what you need to get started Chapter 2 Installation and Configuration This chapter explains how to install and configure your PowerDAQ Analog Output series board How to Use This Manual Chapter 3 Architecture This chapter discusses the internal structure and subsystems of your PowerDAQ Analog Output series board Chapter 4 API and Third Party Software Examples This chapter explains how to use PowerDAQ Analog Output series boards using the PowerDAQ API on Visual C VB Delphi C Builder o
34. ould be used for all calls referring to a specific PowerDAQ board installed This call locks the specific PowerDAQ board by the specific application e Open Subsystem This call grants access to one of the available PowerDAQ board subsystems The following subsystems can be accessed on a PowerDAQ Analog Output board Analog Output Digital Input Digital Output DSP Counter and Calibration e Work with subsystem There are two different ways to use a subsystem in synchronous and asynchronous mode Chapter 4 API and Third Party Software In Synchronous Mode known as Single Update on the AO subsystem there is a set of calls available which gives direct and immediate access to the DACs DIO ports and DSP Timers Timed access can be made using the operating system based timing loops In Asynchronous Mode which has two sub modes on PowerDAQ AO boards event based and regenerate mode a dedicated acquisition buffer is allocated in host PC memory This buffer is divided by the number of logical blocks called frames usually between 4 and 16 frames should be allocated The following steps should be considered when Asynchronous acquisition mode is used User application uses API calls to allocate the acquisition buffer and fill it with initial data for all output subsystems Subsystem configuration word should be assembled using the API constants provided The user application should define a set of events from the board
35. ount of data Each time the DSP based FIFO is S full an interrupt is fired to request additional data to be sent to the board The PowerDAQ advanced buffering mechanism hides those interrupts from the user and allows you to work with big output arrays logically divided by frames The end of each frame can generate an event which will request more data from the application Complete information on the PowerDAQ advanced circular buffer ACB can be found at www POwerDAQ com If the on board FIFO is empty or the last value is outputted the board will continue outputting the last DC value Chapter 3 Architecture Auto regeneration Waveform circular waveform Auto regeneration waveform mode can be used to create fixed length waveforms without any host intervention of user software after the subsystem has initialized An application writes data to the buffer of the PowerDAQ AO board and each time the end of buffer is reached it starts to resend the same buffer again Note that 2048 samples can fit into the on board DSP memory and auto regeneration of up to 2048 samples will not require any intervention of the host PC Channel List There are two ways do define a Channel List for the PowerDAQ AO board First when the output data and channel number are combined together to provide the output channel selection In this situation the lower 16 bits are data the following upper 8 the channel number and special flags see the picture below
36. ple Event based Please refer to the example sources for extensive programming details All examples are located in lt Program Files Dir gt PowerDAQ SDK Examples Language Example Third party examples All third party drivers supplied by OMEGA include a set of examples which support all of the PowerDAQ Analog Output board features They are usually installed during the SDK installation process into the folders defined by third party software vendors Please refer to the readme file of the SDK version to find an exact location of the examples you need 34 El Interconnections Chapter 5 Interconnections Interconnections PD2 AO 8 16 32 Connectors The PowerDAQ PD2 AO 8 16 32 boards have two connectors and one header 96 contact high density Fujitsu header analog output connector J1 36 way boxed IDC header DIO Timer and IRQ lines Connector i 2 O o c c Q O 5 PowerDAQ tm PD AO 8 16 32 board Figure 5 PowerDAQ PD2 AO 8 16 32 Connectors For manufacturers part numbers see Appendix A Specifications 36 Chapter 5 Interconnections PD2 AO 96 Connectors The PowerDAQ PD2 AO 96 boards have seven headers on it 40 way boxed IDC header analog output connectors J3 J8 36 way boxed IDC header DIO Timer and IRQ lines PowerDAQ tm PD AO 96 board Connectors from all cables are going through the PCI bracket Following
37. r CPU How fast is your host data bus If you are on a network what type of network are you using and approximately how many users are on the network Please specify whether or not the problem occurred more than once 57 Appendix D Warranty Appendix D Warranty Overview 58 IBM IBM PC XT AT and IBM PS 2 are trademarks of International Business Machine Corporation BASIC is a trademark of Dartmouth College Microsoft is a trademark of Microsoft Corporation LabVIEW LabWindows CVI DASYLab DIADEM is a trademark of National Instruments Corporation All PowerDAQ PD2 AO boards have received CE Mark certification according to the following EN55011 EN50082 1 Life Support Policy OMEGA ENGINEERING PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE LEGAL AFFAIRS DEPARTMENT OF OMEGA ENGINEERING CORPORATION As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into the body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can reasonably be expected to result in a significant injury to the user or c should the device or system fail to perform may reasonably be expected to result in a significant hazard to human life or a significant potential for injury t
38. r Third Party software such as LabVIEW TestPoint DASYLab HP VEE etc Chapter 5 Interconnections This chapter describes the I O connections to your PowerDAQ Analog Output series board Appendix A Specifications This chapter lists the PowerDAQ Analog Output series board hardware specifications Appendix B Accessories This appendix lists the PowerDAQ Analog Output series board accessories products Appendix C Common Questions and Support This appendix contains a list of commonly asked questions and their answers relating to usage and special features of your PowerDAQ Analog Output series board board Should you require assistance while installing or using PowerDAQ Analog Output series board support service details are also listed Appendix D Warranty This appendix contains a detailed explanation of PowerDAQ Analog Output series board s warranty Index The Index alphabetically lists topics covered in this manual vi How to Use This Manual Conventions Used in This Manual These are the main conventions used to help you get the most out of this manual Tips are designed to highlight quick ways to get the Ok done or good ideas you might not discover on your own Notes alert you to important information CAUTION Caution advises you of precautions to take to avoid injury data loss or system crash Text formatted in bold typeface may also represent type that sho
39. rau DACs Reference Bus Master PCI Interface NE Figure 4 Block Diagram of the PowerDAQ PD2 AO boards 32 Bit PCI Bus Functional Overview Although there are some functional differences between the PD2 AO and PDXI AO boards they all utilize the same PowerDAQ software which significantly simplifies the software development process 20 Chapter 3 Architecture Analog Output Subsystem AO The PowerDAQ II analog output boards are configured as 8 16 32 or 96 sixteen bit output channels On the PD2 AO 8 16 32 each channel has an optional sense line to provide 16 bit accuracy at rated output current The PDXI AO board allows the use of sense lines on the first sixteen channels by installing on board jumpers The PD2 AO 96 does not provide the sense line option The default sense line option is not available on PD2 AO boards because of noise considerations high currents going through the cable induce more noise and sense lines carry the same signal as corresponding output lines inside the cable Please take this into consideration when configuring the sense lines if required The AO subsystem also includes input modes channel queue trigger and clocking control Interrupt event generation You can use events to provide gap free updates of the analog outputs There are three update modes for the analog subsystem e Single update e Event interrupt based waveform mode e Continuous pulled IO
40. s Sense to Out jumpers JP0 15 jumpers should be installed only if jumpers on J6 jumper pattern on PDXI AO board in 2 3 positions JP16 31 should NEVER be installed See PD2 AO 8 16 32 connection for the details To the servo motors etc Figure 11 Configuring the PD2 AO STP with PDXI AO 8 16 32 42 Appendix A Specifications Appendix A Specifications PD2 AO specifications The following conditions apply TA 0 C to 85 C AO subsystem Parameter Value Number of channels 8 16 32 or 96 PD2 AO only Resolution 16 bits Update rate 100 KS s channel up to 1600 KS s aggregate throughput in DMA mode 455 KS s in unlimited channel list mode Buffer Size 2k samples upgradeable to 32 KSamples on PDXI AO models Type of D A Double buffered Accuracy 3 LSB max DNL 3 LSB max Monotonicity Over 15 bits Temperature Gain Error 0 0296 PDXI AO 0 0596 PD2 AO Range 10V fixed 0 10V factory installed option available for PD2 AO 96 16 board Output Coupling DC Output Impedance 0 15 Ohm max Current Drive t 5mA PDXI AO PD2 AO 96 20mA PD2 AO 8 16 32 Capacitive Loads 180 pF min Settling time 10uS to 0 003 Slew Rate 10V uS Gain Bandwidth 1MHz Noise 2LSB RMS 0 10000Hz Output protection Short to ground 15 Volts Power on state default user programmable 0 0000V 25mV PD2 AO
41. s information please refer to the Motorola DSP 56301 User Manual Motorola P N DSP56301UM AD 25 Chapter 3 Architecture 26 Each timer can be used for internal or external clocking and can interrupt the on board DSP after a specified number of events clocks or signal an external device after counting internal events Each timer can also be used to trigger DMA transfers after a specified number of events clocks have occurred Each timer connects to the external world through one bi directional pin TIO that is 7kV ESD protected When TIO is configured as input the timer functions as an external event counter or can measure external pulse width signal period When TIO is used as output it functions as a timer watchdog or Pulse Width Modulator Some common timer counter output functions that microprocessors require are Real time clock Event counter Digital one shot Programmable rate generator Square wave generator Binary rate multiplier Complex digital wave form generator Complex motor control Each counter is a 24 bit count up counter After power up the count value and output of all counters are set to zero Each counter must be programmed before it can be used Unused counters need not to be programmed Use the PowerDAQ API to program counters Each counter is fully independent of the others Only prescaler when used is a common part of the counter timer subsystem Each counter may operate in a different mo
42. tation in order to serve you better Your feedback will help us in the effort Thanks for taking the time to fill out and return this form Is the manual well organized Yes No Can you find information easily O Yes O No Midi do able to install the PD2 AO O Yes O No Did you find any technical errors LJ Yes Ll No Is the manual size appropriate 5 Yes LJ No Are the design type style and layout O Yes C1 No attractive Is the quality of illustrations satisfactory LI Yes L No How would you rate this Excellent L Good i Fair Poor manual Why Suggested improvements Other Comments Your background optional Your application 61
43. to replacement parts supplied or repairs made during the original warranty period the warranty period of the replacement or repaired part shall terminate with the termination of the warranty period with respect to the original product or part THE FOREGOING WARRANTY CONSTITUTES UNTIED ELECTRONICS INDUSTRIES SOLE LIABILITY AND THE CUSTOMER S SOLE REMEDT WITH RESPECT TO THE PRODUCTS AND IS IN LIEU OF ALL OTHER WARRANTIES LIABILITIES AND REMEDIES EXCEPT AS THUS PROVIDED OMEGA ENGINEERING DISCLAIMS ALL WARRANTIES EXPRESSED OR IMPLIED INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 59 Index Index Accessories 14 Analog Input Clocking 29 Analog Input Subsystem 26 Base address 11 Board specifications 43 CE Mark CE Mark Certification 59 Control Panel 12 Counter Timer Subsystem 26 Diagnostics 11 Dimensions for accessories 55 DMA 11 DSP Processor 28 nstallation hardware and software 9 nterrupts 11 J1 Connector Pinouts 40 Life Support Policy 59 otorola 56301 28 OEM Header Panel 53 PCI Bus Interface 28 PCI Specification 56 PD CBL 37 14 49 PD CBL 96 14 15 49 PD STP 96 16 17 50 51 PD STP 9616 KIT 17 PD STP 96 KIT 17 Screw Terminal Panels 16 Service and Support 56 Single Ended 23 Timing and Control 29 Types of boards PowerDAQ boards supported 6 Warranty 59 60 Reader Evaluating We are committed to improving the quality of our documen
44. tput directly on the screw terminal For the all PDXI AO boards the sense to force line jumpers are located directly on the board All jumpers should be removed from the PD2 AO STP panel in this case Because of compatible pin outs the PD BNC xx terminals can be used with PD2 AO 8 16 32 boards Custom terminal panels are available Please contact the factory for more details N Cable uns E PD2 AO Board lt Cable PD CBL 37 a an PDXI CBL AO PDXI AO board PD AO STP 32 Figure 3 PD2 AO STP 32 Wiring Diagram 15 Chapter 2 Installation and Configuration The PD STP 3716 is a low cost 16 channel screw terminal panel which can be used with the PD2 AO 96 16 or PD2 AO 8 16 This terminal contains analog signals only For the digital signals you will need the PD STP DIO Complete kits We have included the PD CBL 96 and the PD2 AO STP 32 into a complete kit for the PD2 AO 8 16 32 boards The product is available by ordering PN PD2 AO STP 16KIT or 32 Also complete kits are available for the PDXI AO boards These products are available by ordering PN PDXI AO STP 16KIT or 32KIT J1 Connector If you wish to develop you own custom cable you can purchase the connector and metal cover from your distributor or the factory The part number is PD CONN The manufacturer is Fujitsu Takamisawa America Inc Telephone
45. uld be entered verbatim or a command as in the following example You can instruct users how to run setup using a command such as setup exe Feedback We are interested in any feedback you might have concerning our products and manuals A Reader Evaluation form is available on the last page of the manual Chapter 1 Introduction Introduction This chapter describes the basic features of the PowerDAQ PD2 AO boards About the PowerDAQ Analog Output series board Thank you for purchasing a PowerDAQ Analog Output series board The board you received is either a PD2 AO PCI bus board or a PDXI AO CompactPCI bus board These boards differ in certain hardware respects however the software is the same The PDXI series Analog Output boards utilize all advantages of the PXI cPCI form factor The associated PowerDAQ Software Suite PD SDK has been written specifically for these products Overview The PowerDAQ analog output boards are configured as 8 16 32 or 96 channels The PDXI versions are available in 8 16 and 32 channel versions The PowerDAQ Analog Output board uses 16 bit DACs and allows you to configure the start up states for each channel 200ms maximum delay between system reset and power on value loading The on board DSP PCI interface allows you to use up to three 24 bit counter timers high speed IRQ External Clock lines eight digital inputs and eight high drive 32 64ma digital outputs A
46. very rarely will the BIOS assign same interrupt to mass storage devices such as a SCSI controller or video card and a PowerDAQ board In this case it could be significant latency between the time when board fires an interrupt and the time the PowerDAQ driver actually receives it In this case we recommend changing your BIOS settings and assigning a dedicated interrupt for the PowerDAQ board Please refer to your motherboard computer manual for the BIOS settings change procedure Diagnostics In order to confirm board operation install the PowerDAQ Suite This automatically installs the PowerDAQ application control panel diagnostic program that will display all available PowerDAQ boards in your system Chapter 2 Installation and Configuration To access the PowerDAQ control panel select START gt Settings gt Control Panel and the PowerDAQ icon will be displayed xus Of x P DAQ ower El 26 obje YA Figure 1 PowerDAQ Control Panel Application An alternative test is to use the SimpleTest program installed by the Software Suite Attached a oscilloscope of multimeter to the outputs of the AO board Run the SimpleTest exe program by selecting START gt Programs gt PowerDAQ gt Delphi Acquisition Demo This program shows all information about the board s installed and allows you to test all subsystems available on the board selected for the test 11 Chapter 2 Installation and Configuration
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