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1. a 2 17 2 51 Byte Access and Word Accoess eese 2 17 2 5 2 Relationship between Response Speed and 2 17 2 5 8 Using Interrupt Function with SCANW Pin and SCANR Pin 2 17 26 Operating MKY33 for 2 18 2 6 4 Operation of Do and Di Pins Of 2 18 2 6 2 Using Expanded Functions of MKY934 2 18 2 6 3 Example of Using Commands for MKY934 2 19 2 6 4 Note on MKY34 Serial ID Send Function 2 20 2 6 5 Initializing MKY33 when using battery protected MKY34 2 20 2 7 Operating MKY33 for MKY35 u 2 21 2 7 1 Handling of 5 2 21 2 7 2 Examples of Using Di Do Areas for MKY935 2 21 28 Operating MKY33 for MKY37 ceteri ennt ee ente ccu k suce kn ndun 2 22 2 8 1 Handling 7 T itte terrere eie 2 22 Chapter 3 MKY33 Hardware 3
2. J J 4 4 Supplying Driving Clock and Hardware Reset Signal 4 5 Connecting Network 4 6 Connecting User Bus J 4 9 Connection of MKY33 User support Functions 4 19 Connection Example of 4 21 TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD Chapter4 Connecting MKY33 This chapter describes the pin functions and how to connect MKY33 required for the MKY33 to operate as a center IC in the HLS It consists of the following six categories to provide a clear understanding of the pin functions and how to connect 1 Connecting Buffer RAM 2 Supplying Driving Clock and Hardware Reset Signal 3 Connecting Network Interface 4 Connecting User Bus 5 Connecting MKY33 User suppot Functions 6 Connecting Example of MK Y33 When connecting the MKY33 be sure to connect the TEST pin pin 61 to the GND pins Be sure to con nect all the VDD pins pins 22 42 64 73 84 to the 5 0 V power supply and all the GND pins pins 1 21 31 43 62 63 to the 0 V power supply In addition connect a capacitor of 10 V 0 1 uF 104 or more between adjacent VDD pins and GND pins TEP STECHNICA CO ID MKY33 User s Manual 4 1 Connecting Buffer RAM The MKY33 does not ha
3. 2 13 Fig 3 1 Pin Assignment 3 3 Fig 3 2 Pin Electrical Characteristics I O Circuit Types of MKY933 3 8 Fig 4 1 BRAM deae a este ete 4 4 Fig 4 2 Reset l I 4 5 Fig 4 3 Recommended Network Connection 4 7 Fig 4 4 Setting of Baud Rate by BPSO and BPS1 Pins 4 8 Fig 4 5 Differences between Addresses for Byte Access Depending on Endian 4 9 Fig 4 6 Connection to 8 bit User Bus uu u nnns 4 10 Fig 4 7 Connection to 16 bit User 4 11 Fig 4 8 Output Signal of ACK Pin u u 4 12 Fig 4 9 Dynamic Arbiter 4 13 Fig 4 10 Operation of Bus Arbiter 4 13 Fig 4 11 Concept of Access Time by Fixed time Method 4 14 Fig 4 12 Usage Example of DAE Pin u u u 4 16 Fig 4 13 DAEA Equivalent Circuit in MKY33 J 4 17 Fig 4 14 Usage Example of DAEA Pin
4. Appendix 1 Memory Address Map List TEP STECHNICA CO ID MKY33 User s Manual 2 1 1 Occupied Area The MKY33 occupies the memory areas from addresses 000H to 4FFH The area from addresses 500H to is unused area Caution The MKY33 does not control the memory area from addresses 500H to 7FFH Therefore even if the user system program accesses this area the output signal of the ACK pin responding to access does not change Be careful when designing a user system that uses the output signal of the ACK pin 2 1 2 Data in Memory after Power on After power on data in the memory area from addresses 000H to 4FFH of the MKY33 is all undefined The memory areas of the MKY33 must be initialized before using the MKY33 For details refer to 2 3 1 Ini tialization 2 1 3 Write Protection after Scan Started After power on data can be read and written from and to the memory area from addresses 000H to 4FFH of the MKY33 When the user CPU starts scanning by the MKY33 the upper byte of each control word in the control area of the MK Y33 the Di area and the to C7 areas for user support functions are write protected as indi cated in the Write Rights column in Table 2 1 Reference destroying read only data in the memory area of the MKY33 However the upper byte of Write protection is a function for preventing the user system program from accidentally the
5. 1 4 1 3 Features of MKY3939 uuu ua Ier e need Ine sasa eL tra one E DOCE eR fe fecere ss siasa 1 5 Chapter 2 MKY33 Software 2 1 Memory Uri rm 2 3 2 1 1 aS Saa ened a a Aaa aandika saaab adana eaa 2 4 2 1 2 Data in Memory after Power on u 2 4 2 1 3 Write Protection after Scan Started uu u 2 4 2 2 Areas for Basic HLS Functions U U u u 2 5 2 2 1 SCR Register ssh 2 5 PAP Ar A O o E iN a EE 2 5 2 2 3 DI Ate aene T E 2 5 2 3 Initialization Start and Operation of 2 6 2 3 1 InitlaliZation eicere creer nere iere Sa am 2 6 2 3 2 52 E 2 6 2 3 2 1 Starting udo cz ecce de ayq panini 2 6 2 3 2 2 5 anie ie eee E 2 6 2 3 2 3 Usage when FS Values Do Not Match Number of Existing Satellite ICs 2 7 2 3 2 4 Restrictions on Values Written to SCR and Causions 2 7 2 3 2 5 Scan lime aee 2 8 2 33 Basic coco ee uade cu cns e cuo ee cul nad eei eso Osa Ce qsqa E Race 2 9 2 34 Stopping SCan eene due NEN duni ul 2 9 2 4 User s
6. TEP TECHNICA CO LTD Hi speed Link System Center IC MKY33 User s Manual Note 1 The information in this document is subject to change without prior notice Before using this product please confirm that this is the latest version of this document 2 Technical information in this document such as explanations and circuit examples are refer ences for this product When actually using this product always fully evaluate the entire sys tem according to the design purpose based on considerations of peripheral circuits and the PC board environment We assume no responsibility for any incompatibility between this product and your system 3 We assume no responsibility whatsoever for any losses or damages arising from the use of the information products and circuits in this document or for infringement of patents and any other rights of a third party 4 When using this product and the information and circuits in this document we do not guaran tee the right to use any property rights intellectual property rights and any other rights of a third party 5 This product is not designed for use in critical applications such as life support systems Con tact us when considering such applications 6 No part of this document may be copied or reproduced in any form or by any means without prior written permission from StepTechnica Co Ltd TEP User s Manual ST ECHNICA CO LTD Preface
7. u u u 4 17 Fig 4 15 Maintaining End of Accoess u u 4 18 Fig 4 16 Signals Indicating Scan Timing 4 19 Fig 4 17 Connection Example of 4 21 viii TEP MKY33 User s Manual STE HNICA CO LTD Tables Table 2 1 Memory Map of MKY933 u u u J J 2 3 Table 2 2 Response Data Storage Areas for Commands 2 13 Table 2 3 MKY34 Functions Selected by Commands and Data 2 18 Table 2 4 Correspondence Issued by MKY33 of MKY37 Commands 2 22 Table 3 1 Pin Functions of MKY933 ansias asa ran uu u 3 4 Table 3 2 Electrical Ratings of MKY33 u u J J 3 7 Table 4 1 Access Time by Fixed time Method 4 14 Table 4 2 Access Time when Keeping DAE Pin High 450 ns Earlier 4 15 Table 4 3 Allowable Time Obtained from Addition of High Level Time of DAE Pin to Access Time 4 15 Table 5 1 Absolute Maximum Ratings eese nennen u J J
8. 0 mi m ITI 00 0 gt 10 O O O IOl 010 01110 TEP STEcuwica CO LTD MKY33 User s Manual CMOS level output Type B CMOS level output VoL max 0 4 V VoL lo max 15 0 mA loL max 04 2 0 mA ViL max max 20 mA max liL max loH max loL max 12 max CMOS level input Type F Schmitt trigger VoH min Vt VoL typ ViH min Vt typ ViL max min max AVt min liL max max max 2 0 mA T G CMOS level input YPE 30 pull up Schmitt trigger Vt max typ ViH min Vt typ ViL max min max AVt min liL max max liL max Rpu typ 30 KQ min 12 KQ max 75 KQ Fig 3 2 Pin Electrical Characteristics in I O Circuit Types of MKY33 Chapter 4 Connecting MKY33 This chapter describes the pin functions and how to connect MKY33 required for the MKY33 to operate as a center IC in the HLS It consists of the following six categories to provide a clear understanding of the pin functions and how to connect 4 1 4 2 4 3 4 4 4 5 4 6 Connecting Buffer RANM
9. 4 12 4 46 esca 4 13 4 4 6 1 Dynamic Arbiter in eene 4 13 4 4 6 2 Enable Control of Dynamic Arbiter l u u 4 14 4 4 6 3 Fixing Access Times J 4 14 4 4 6 4 Speeding Up Access Time u u 4 15 4 4 6 5 Details of Signal Supplied to ZDAE Pin and Maximum Allowable Access Time 4 15 4 4 6 6 Example of Signal Supplied to DAE 4 16 vi TEP S TECHNICA CO LTD MK Y33 User s Manual 4 4 6 7 Use of DAEA Pin J UU 4 17 4 4 7 Cautions for Connecting User Bus l l l 4 18 4 4 7 1 Maintaining End of Access U 4 18 4 4 7 2 Word Access when Connecting 8 bit User BUS 4 18 4 5 Connection of MKY33 User support Functions 4 19 4 5 1 Pins Indicating Scan Timing SCANR and 4 19 4 5 2 Output of CHKT Pin ieiunii ecrit aaa aqu a qasaqa 4 20 4 5 8 Output of CHK2 Pin 3 enint ren aan na Eoo 4 20 4 5 4
10. 2 SCANW High level pulse width 2 x TxI 3 Pulse to pulse 1 4 x TXI 364 x TBPS Full 364 x TBPS x FS 1 Full 354 x TBPS Half 354 x TBPS x FS 1 Half Pulse to pulse 2 Chapter 5 Ratings 5 3 Package Dimensions TEP S TECHNICA Co LTD MKY33 84 pin QFP 22 9 0 4 18 0 0 2 0 1 0 1 0 5 0 8 E S PECHNICA 3 8 MKY33A fe XXXXXXXX JAPAN 0 5 C0 5 Y 21 0 15 005 0 8 0 35 0 1 gt 2 45 0 20 0 15 0 05 C 0 15 SEATING PLANE Unit mm Reference The current release of MKY33 package is indicating a bug fixed improved version from the released product in earlier stages of development TEP STECHNICA CO LTD MKY33 User s Manual 5 4 Recommended Soldering Conditions Peak temperature resin surface Tp 260 C max 350 C max Peak temperature holding time tp 10 s max 3 5 max Caution 1 Product storage conditions TA 30 C RH 70 for prevention of moisture absorption 2 Manual soldering Temperature of the tip of soldering iron 350 C 3 s max Device lead temperature 270 C 10 s max 3 Reflow Twice max 4 Flux Non chlorine flux should be cleaned sufficiently 5 Ultrasonic cleaning Depen
11. which is an upgraded version of the MKY33 was released StepTechnica recommends the user use the MKY36 when developing a new user system with an HLS center IC In addition when the user wants to use a HUB 2 in the user system the user should use the MKY36 as the HLS center IC because the MKY33 does not support the MKY02 TEP CO User s Manual 1 2 Procedure for Operating MKY33 The MKY33 can be operated by having read access and write access to registers and areas Initialization allocated to memory map The operation the MKY33 is very simple Fig 1 1 Memory initialization Initialize the memory area of the MKY33 using 00 data Write the initial data output from the 1 pin of the terminal to the Do area of the MKY33 1 Initialize all of the memory areas of the MKY33 connected to the memory i areas of the user CPU using data i Scan started 2 Write the initial data output from the Write the FS value to the SCR of the MKY33 I O pin of the terminal to the Do area of the MKY33 refer to 2 2 2 Do User system Area 3 Write the final satellite FS value to Read the Di area of the MKY33 when the user the system control register SCR of system program refers to the input state of the I O pin of the terminal the MKY33 the HLS scan is started Write data to the Do area of the MKY33 when the user a
12. 5 3 Table 5 2 Electrical Ratings rad exuere a 5 3 Table 5 3 AC Characteristics Measurement Conditions ess 5 4 Appendix Table 1 List of MKY33 Memory Addresses Corresponding to Satellite Addresses SA and Commands App 3 Appendix Table 2 Scan Time Based on FS Values and Baud Rates App 4 TEP STECHNICA CO D MKY33 User s Manual Chapter1 Outline of MKY33 This chapter describes the outline of the MKY33 in the Hi speed Link System HLS 1 1 Role of MKY 33 uu uuu asus sta 1 3 1 2 Procedure for Operating 1 4 1 3 Features of MKY33 entr a ua a rere a nir edad dra 1 5 TEP Chapter 1 Outline of MKY33 HNICA LTD Chapter 1 Outline of This chapter describes the outline of the MKY33 in the Hi speed Link System HLS 1 1 Role of MKY33 MKY33 is a kind of center IC that constitutes the HLS Be sure to read Hi speed Link System Introduc tion Guide before understanding the MKY33 and this manual Connect the MKY33 to the user CPU by using a bus connection The MKY33 serves as memory for the user CPU The user CPU can control all states of systems constituting the HLS by read write access to the MKY33 memory Reference The MKY33 is a center IC in the HLS released since 1993 In May 2004 the MKY36
13. Quiput of DHEQ Pin 5 I 4 20 4 6 Connection Example of 4 21 Chapter 5 Ratings 5 L 5 S ess BE CX eK 5 3 52 CharacteriStICSu uu uuu 5 4 5 21 Clock and Reset Timing 5 4 5 2 2 Baud Rate 5 5 5 2 3 External Baud Rate Clock EXC Timing 5 5 5 2 4 Access Timing without DAE Control when Connecting 16 bit Bus 5 6 5 2 41 Read Timing without DAE control when connecting 16 bit bus 5 6 5 2 4 2 Write Timing without DAE control when connecting 16 bit bus 5 7 5 2 5 Access Timing with DAE Control when Connecting 16 bit Bus 5 8 5 2 5 1 Read Timing with DAE control when connecting 16 bit bus 5 8 5 2 5 2 Write Timing with DAE control when connecting 16 bit bus 5 9 5 2 6 Access Timing without DAE Control when Connecting 8 bit Bus 5 10 5 2 6 1 Read Timing without DAE control when connecting 8 bit bus 5 10 5 2 6 2 Write Timing without DAE control when connecting 8 bit bus 5 11 5 2 7 Access Timing with DAE Control when Connecti
14. Access time can be speeded up reduced by keeping the DAEA pin of the MKY33 High and supplying a appropriate signal generated to the user bus by the signal output from the user CPU to the DAE pin for the following reasons 1 The MKY33 recognizes the High level input of the DAE pin as access from the user bus 2 The MKY33 requires 450 ns to read data transmitted to the satellite IC from the BRAM or to write data received from the satellite IC to the BRAM which is required for scanning 3 By keeping the DAE pin High for 450 ns before the user bus accesses the MK Y33 the access time of the user bus becomes shorter state shown in Fig 4 10 2 as shown in Table 4 2 If the time for the DAE pin to be kept High immediately before access is less than 450 ns the value obtained from addition of this time shortage to the time in Table 4 2 is the access time Therefore note that access time changes when a signal generated to the user bus by the signal output from the user CPU which is supplied to the DAE pin changes Table 4 2 Access Time when Keeping DAE Pin High 450 ns Earlier Symbol Conditions Xi 48 MHz Min Max Unit 8 bit wide connection WB pin Low 16 bit wide connection WB pin High 8 bit wide connection WB pin Low 16 bit wide connection WB pin High 4 4 6 5 Details of Signal Supplied to DAE Pin and Maximum Allowable Access Time The time for a si
15. This manual describes the MKY33 or a kind of center IC in the Hi speed Link System Be sure to read Hi speed Link System Introduction Guide before understanding this manual and the MKY33 In this manual the Hi speed Link System is abbreviated as HLS Target Readers This manual is for Those who first build an HLS Those who first use StepTechnica s various ICs to build an HLS e Prerequisites This manual assumes that you are familiar with Network technology e Semiconductor products especially microcontrollers and memory e Related Manuals Hi speed Link System Introduction Guide Hi speed Link System Technical Guide Caution To users with Hi speed Link System User s Manual released before March 2001 Some terms in this manual have been changed to conform to International Standards B This manual has been prepared based on Standard English M meeting the requirements of the International Organization for Standardization ISO and the American National Standards Institute ANSI This English manual is consistent with the Japanese document STD HLS33 V6 3J Standard English is a trademark of Win Corporation ii TEP STECHNICA CO D MKY33 User s Manual TEP S TECHNICA Co LTD MK Y33 User s Manual CONTENTS Chapter 1 Outline of MKY33 1 1 MK YI L L S 1 3 1 2 Procedure for Operating
16. take care when the user system program reads or writes data consisting of more than 8 bits 9 bits or more For details refer to 4 4 7 2 Word Access when Connecting 8 bit User Bus 2 5 2 Relationship between Response Speed and Command Data set in the Do area of the MK Y33 memory is sent to the satellite IC at every scan regardless of the type of executed command Therefore response speed remains unchanged On the other there is only one type of response data corresponding to one command during a scan which is received by a response packet RP from the satellite IC and in the Di area and C1 to C7 areas of the MK Y33 memory Therefore data in the Di area is not updated at scanning by a command other than command 0 so the apparent response speed may decrease in the user system monitoring data on the Di area 2 5 3 Using Interrupt Function with SCANW Pin and SCANR Pin When the user CPU uses a signal output from the SCANW pin or SCANR pin described in 4 5 Connec tion of MKY33 User support Functions as a trigger causing the user CPU to change to interrupt han dling the user must understand an interrupt overhead time fully For example when the user CPU responds to an interrupt at low speed and if an interrupt is generated by the SCANR signal to read the state in which a single scan is completed the first data in the MKY33 memory may have already been updated by the next scan In a user system that uses such an interrupt
17. to these pins or connect to VDD or GND to prevent these pins from being input undefined levels 5 Connect the RD signal and the WR signal of the user bus to the URD pin pin 33 and the UWR pin pin 34 of the MKY33 respectively When the UCS pin pin 32 of the MKY33 is Low the RD signal and WR signal of the user bus are activated 6 Connect a signal that is generated in the user bus to determine the memory allocation of the MK Y33 to the UCS pin pin 32 of the MKY33 The UCS input pin is activated when it is Low The area from memory addresses 000H to 4FFH of the MKY33 is occupied by the MKY33 Even if the UCS pin is Low the unoccupied area from memory addresses 500H to 7FFH is not accessed in the same way as when the UCS pin is High A10 to AO UA10 to UAO 53 58 60 65 59 57 56 54 52 51 49 10 to AO UD15 to UD8 MD7 to MDO D7 to DO UD7 to UDO RD URD WR ZUWR 74 E 27 Big endian Low 36 Setting access speed Refer to 4 4 6 Access Time Fig 4 6 Connection to 8 bit User Bus TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 4 4 Connection to 16 bit User Bus This section describes how to connect the MKY33 to a 16 bit user bus Fig 4 7 1 Fix the WB pin pin 74 of the MKY33 at High level or leave it open 2 Connect address signals Al to A10 of the user bus to the UAI to UAIO pins pins 3 to 12 of the MKY33 The UAO pin pin 2 of the
18. 0 that is new nonresponse from the satellite IC occurs Monitoring the signal of the CHK1 pin enables to detect the network or environment quality and the occurrence of a link error with the satellite IC For details of the pin going High refer to 2 4 3 Checking Network Quality Using the signal output from the CHK1 pin as an interrupt trigger to the user CPU allows the user system program to detect the occurrence of a new link error and to cope with the error When not used leave this pin open Caution The intervals when the pin generates pulse signals may be reduced to 182 x TBPS When using the output of the CHK1 pin as an interrupt trigger to the user CPU even when the interrupt is triggered frequently check the performance of the user CPU and capability of the user program 4 5 3 Output of CHK2 Pin The MKY33 has CHecK 2 pin pin 83 that outputs a pulse signal that goes High for 2 x approx 82 ns at Xi 48 MHz when the RX CHK2 bit of the control word becomes 1 from 0 that is when the MKY33 detects the satellite IC nonresponses occur Monitoring the CHK2 pin signal enables to detect the satellite IC error For details of the CHK2 pin going High refer to 2 4 4 Detecting Terminal Errors and Recognizing Poor Environment Using a signal output from the CHK2 pin as an interrupt trigger to the user CPU allows the user system pro gram to detect th
19. 10 lt UCS DN URD N UD0 n A ano of time Non access time TAA required between accesses Access should be made when both UCS and URD are Low and both UCS and UWR are Low Fig 4 15 Maintaining End of Access 4 4 7 2 Word Access when Connecting 8 bit User Bus When reading data consisting of more than 8 bits 9 bits or more from word address of the Di area con nected to the 8 bit user bus two accesses occur When the user system program makes two accesses and data in the word address of the Di area changes between the first and second accesses data hazards may occur This applies to the write operation The MKY33 reads data transmitted to the satellite IC from the BRAM and writes data received from the satellite IC to the BRAM in 16 bits according to the scanning Therefore when using the MKY33 pay attention to this data hazard The methods to prevent the data hazard are shown below 1 Keep the DAE pin High from the start to end of two accesses by using the DAE pin as described in 4 4 6 4 Speeding Up Access Time which prevents the BRAM from being updated according to the scanning 2 The user system program should first recognize the scan timing using the SCANR or SCANW signals described in 4 5 1 Pins Indicating Scan Timing and performs word access at the right time when the BRAM will not be updated according to the scanning 3 If the user system program performs
20. Clock Low level width 210 4 Reset enable Low level width 10 x TXI Chapter 5 Ratings 5 2 2 Baud Rate Timing TEP S TECHNICA Co LTD TTXEH TXE RZ 1 RZ RZ 0 RZ 0 RZ 1 TXD TBPS TBPS RZ 1 RZ RZ 0 RZ 0 RZ 1 RXD1 RXD2 gt TRNW TRWW TRWW Passage of time Baud rate 12 Mbps Xi 48 MHz Short pulse width of sending signal 83 33 5 6 Mbps Xi 48 MHz 166 67 5 3 Mbps Xi 48 MHz Period in which TXE pin goes High 142 x TBPS 5ns 333 33 5 142 TBPS 142 TBPS 5ns Remarks Always High when full duplex selected Short pulse width of input signal 0 51 x TBPS 1 0 x TBPS 1 49 x TBPS Allowable pulse width as RZ signal Long pulse width of input signal 1 51 x TBPS 2 0 x TBPS 2 49 x TBPS 5 2 3 External Baud Rate Clock EXC Timing External baud rate clock period width 4 x TXI Allowable pulse width as RZ signal External baud rate clock High level width 1 5 x TXI EXC External baud rate clock Low level width 1 5 x TXI TExc TEXCH TEXCL TEP S TECHNICA Co LTD MKY33 User s Manual 5 2 4 Access Timing without DAE Control when Connecting 16 bit Bus This section describes the access timing without DAE control when connecting a 16 bit bus 5 2 4 1 Read Timing without DAE control when connecting 16 bit
21. IC after scanning the number of consecu tive nonrespose set to the control word and RX CHK1 flag bit and RX CHK2 flag bit are cleared to 0 respectively In a state where the MKY33 is linked with the satellite IC correctly the number of consecutive nonrespose and the RX CHKI flag bit and RX CHK2 flag bit are always 0 respectively The user system program can recognize the link status i e connection status errors and existence of a newly linked satellite IC between satellite ICs and the MKY33 by referencing the respective bits in the con trol words corresponding to individual satellite ICs 2 4 1 5 How To Recognize Link Status between Satellite ICs and MKY33 Three examples of how to recognize the link status between satellite ICs and the MKY33 are given below e Example 1 e Example 2 e Example 3 When FS value 3 set to bits 0 to 5 FSO to FS5 of SCR register with no satellite IC connected to MKY33 The number of consecutive nonrespose set to three control words at addresses 002H 004H and 006H is counted at every scan and reaches 7 When the upper bits in the control word are read at this time 7CH can be read The same applies when a satellite IC that is not turned on is connected This enables to recognize that the MK Y33 cannot be linked with the satellite ICs with SA 1 SA 2 and SA 3 Under this con dition the Di areas at addresses 102H 104H and 106H are not upd
22. O6EH is 0 and data at address 2EEH is also OOOOH after a link with the satellite IC with SA 37H is established once TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 4 2 5 Detection of Request from Satellite IC Some satellite ICs can issue a request to the center IC In the HLS this request is called DREQ Data REQuest When the MKY33 detects DREQ from a satellite IC it sets bit 8 DREQ in the control word corresponding to the satellite address SA of the satellite IC to 1 When the executes a command defined as an individual function of the satellite IC the DREQ from the satellite IC is cleared If a DREQ is generated by any satellite IC that the MKY33 is linked to the output of DREQ pin goes High when receiving a response packet RP from the satellite IC generating the DREQ The rising edge of the DREQ pin output can be used as an interrupt trigger to the user CPU To cause the output level of DREQ pin to change from High to Low write to the DREQR at address 480H of the MKY33 using the user system program when the DREQs in the control words corresponding to all satellite ICs are cleared TEP STECHNICA CO LTD MKY33 User s Manual 2 4 3 Checking Network Quality This section describes how to check network quality as described in item 3 of 2 4 User support Functions In the HLS when the MKY33 is activated to start scanning the MKY33 can receive response packets RPs from the
23. UD5 CHK2 LL UD4 VDD VDD UA10 12 UDO 13 UD1 14 UD2 15 003 16 008 17 009 18 0010 19 UD11 20 Note Pins with are negative logic active Low Fig 3 1 MKY33 Pin Assignment TEP STEcuwica User s Manual Table 3 1 lists the pin functions of the MKY33 Table 3 1 Pin Functions of MKY33 mw o 11 bit address bus pins connected to user bus The UA0 pin corresponds to the LSB and the UA10 pin to the MSB Positive Access to the MKY33 from the user bus requires that the signals of these pins must be stabilized before the condi tions for access by the UCS URD and UWR pins are established 13 to 16 23 to 26 17 to 20 27 to 30 16 bit bidirectional data bus pins connected to user bus Positive The UDO pin corresponds to the LSB and the UD15 pin to the MSB Access control pin connected to user bus 32 Negative For read access or write access to the MKY33 set this pin Low at the right time Read control pin connected to user bus Negative To read the MKY33 set this pin Low at the right time Write control pin connected to user bus To write to the MKY33 set this pin Low at the right time If this pin signal or UCS pin signal goes High when both are Low UD0 to UD15 bus data are input to the MKY33 Output pin that changes from High to Low when MKY33 Positive recog
24. an appropriate interrupt overhead time should be considered TEP STECHNICA CO ID MKY33 User s Manual 2 6 Operating MKY33 for MKY34 This section describes how to operate the MKY33 for the MKY34 or a kind of satellite IC Refer to 4 User s Manual before understanding this section 2 6 1 Operation of Do and Di Pins of MKY34 When operating Do and Di pins of the MKY34 the basic HLS functions refer to 2 2 Areas for Basic HLS Functions and operate them in the Do and Di areas In this case be sure to set command 0 to the control word so the expanded functions of the MKY34 described in 2 4 2 Receiving Non Di Data Indi vidual Data by Expanded Functions cannot be specified from the center IC 2 6 2 Using Expanded Functions of MKY34 The MKY34 has 16 bit binary up counters of 16 channels and one Serial IDentification Register SIDR as expanded functions in addition to Do and Di pins the HLS basic functions The MKY34 selects which of the function data to be embedded in a response packet RP to return according to a command from the cen ter IC Data on the expanded functions of the MK Y34 can be obtained individually by using a command to specify the function of the MKY34 for the control word in the control area of the MKY33 corresponding to the SA Satellite Address where the MKY34 is connected refer to 2 4 2 Receiving non Di Data Individual Data by Expanded Functions Table 2 3 shows the correspondence o
25. bus Xi 48 MHz TBCS BRA BW ZDAE TADS TBCH TADH UA10 UA1 UCS TRA 4 URD TRD 4 TRO 4 UD15 UD0 read TAD gt ACK TACK TBR of time The signal of the DAE is equivalent to the internal signal when the DAEA pin used refer to 4 4 6 7 Use of DAEA Pin Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Read access 182 x TBPS Full 354 x TBPS Half Read to out bus drive Read to data valid data output Read data hold Bus release Acknowledge delay Acknowledge enable Acknowledge margin Chapter 5 Ratings TEP S TECHNICA Co LTD 5 2 4 2 Write Timing without DAE control when connecting 16 bit bus Xi 48 MHz BW DAE CS UWR ACK TBCS 94454565 TADS TwA TBCH TADH TAA TACK Tws TWH Pit T AD Passage of time Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Write access 182 x TBPS Full 354 x TBPS Half Write data setup Write data hold Acknowledge delay Acknowledge enable TEP S TECHNICA Co LTD MKY33 User s Manual 5 2 5 Access Tim
26. can be up to 12 5 MHz Set this pin High or leave it open when it is not used Pin that goes High when it detects DREQ generated from Positive satellite IC detected Leave this pin open when it is not used Pin that outputs High level pulse signals for a given time right after data to be sent to final satellite got in CP during single scan Leave this pin open when it is not used Positive Pin that outputs High level pulse signals for a given time right after data received from final satellite written to BRAM in single scan Leave this pin open when it is not used Positive Continue TEP STECHNICA CO ND MKY33 User s Manual Table 3 1 Pin Functions of MKY33 Continued i Output pin that goes High for a given time when 1 82 Negative signal generated Output pin that goes High for a given time when CHECK 2 83 Negative signal generated 22 42 64 73 84 1 21 31 43 62 63 Power pin for 5 0 V supply Power pin connected to 0 V Note Pins prefixed with are negative logic active Low TEP Chapter 3 MKY33 Hardware HNICA CO LTD Table 3 2 and Figure 3 2 shows the electrical ratings of the MK Y33 pins Table 3 2 Electrical Ratings of MKY33 Negative logic 01 CO N 1 1 10 01 1 10 00 9 0 0
27. control area of the MKY33 consists only of read only flag bits This area is not affected even if data is written to the area by word access TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 2 Areas for Basic HLS Functions Only the System Control Register SCR Do area and Di area in the memory map indicated in Table 2 1 perform the basic HLS functions Various user support functions to use the HLS more effectively are allo cated to other areas 2 2 1 SCR Register The System Control Register SCR at address OOOH starts scanning in the HLS 2 2 2 Do Area The Do area from addresses 080H to OFFH has areas covering the maximum number of connected satellite ICs 63 One word corresponds to one satellite IC The lower 1 to 6 bits of the memory address of the Do area correspond to Satellite Address SA For example when writing 135AH word data to the memory address 082H 135AH can be set to the 16 bit I O output pin of the satellite with SA Caution Because there is no satellite with SA 0 the two bytes of the memory addresses 080H and 081H are unused RAM areas 2 2 3 Di Area Like the Do area the Di area from addresses 100H to 17FH has areas covering the maximum number of con nected satellite ICs 63 One word corresponds to one satellite The lower 1 to 6 bits of the memory address of the Di area correspond to Satellite Address SA For example when reading the Di area at address 104H w
28. satellite IC while power is applied to the unit terminal with the satellite IC to be scanned and the network is stable In an environment in which a correct scan has been established once if the MKY33 cannot receive response packets RPs from the satellite IC when nonresponse occurs the cause may be one of the following 1 The terminal was disconnected 2 Trouble occurred with receipt or sending of packet due to environmental problems including external noise trouble 3 The network performance limit has been reached If the link is corrected at the next scan item 1 above can be excluded as a cause Monitoring nonresponse occurrences in this way the user system can check network quality in the HLS The MKY33 uses the control word to manage the number of consecutive nonresponse refer to 2 4 1 3 Recognition of Link Status 1 The RX CHKI bit in the control word transits from 0 to 1 at the first nonresponse This state is described as the occurrence of CHECK 1 The MKY33 has a CHKI pin that outputs pulse signals for a given time when CHECK 1 occurs For details of the CHK1 pin refer to 4 5 2 Output of CHK1 Pin 2 4 4 Detecting Terminal Errors and Recognizing Poor Environment This section describes how to detect terminal errors and recognize a poor operating environment as described in item 4 of 2 4 User support Functions In the HLS if the MKY33 cannot receive a response packet RP cor
29. signal may be used which goes High while the user CPU accesses memory space other than the MKY33 1 For example the M1 signal or REF signal of the Z80 when the user CPU is the Z80 CPU Fig 4 12 2 For example a status signal indicating that the user bus accesses devices other than the MKY33 such as ROM containing frequently accessed programs C Decoder Z80B 6 MHz To other memory w Y MKY33 q G A B C O UCS Upper address 11 UA0 UA10 D0 D15 URD UWR DAE M1 signal of CPU input to DAE Fig 4 12 Usage Example of DAE Pin Caution The signal that goes Low while the user bus accesses memory space other than the MK Y33 depends on the user system The user should prepare circuits to generate appropriate sig nals TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 4 6 7 Use of DAEA Pin Figure 4 13 shows an internal equivalent circuit with which the DAEA pin pin 38 of the MKY33 DAE is associated This circuit produces the same effect DAEA as when the DAE pin is Low when the following UCS conditions are established UWR 1 The input signal of the DAEA pin is Low adiac Signal enabling access to BRAM from communication system 2 The input signal of the UCS pin is High 3 The input signal of the URD pin or UWR pin is Low Fig 4 13 DAEA Equivalent Circuit in MKY33 Figure 4 14 s
30. that can be written as FS values to the SCR System Control Register are 0 00H to 63 3FH However if full duplex mode is selected for the MKY33 writing 1 01H is protected When writing FS values to the SCR register always note the following points 1 If full duplex mode is selected for the MKY33 write any FS value greater than 3 03H to the SCR register even if only one satellite IC at SA 1 is connected or two existing satellite ICs at SA 1 and SA 2 are connected 2 Writing 0 00H to the SCR register causes the scan to stop Do not write 0 00H to the SCR reg ister except when intentionally stopping the MKY33 scanning 3 Do not write to the SCR register during scanning except when overwriting FS values or stopping scanning TEP S TECHNICA CO ND MKY33 User s Manual 2 3 2 5 Scan time The MKY33 scan time can be calculated by equations below These equations are determined by the fol lowing three elements including the values that the user system program writes to the System Control Regis ter SCR 1 Full or half duplex modes 2 Final Satellite FS value of System Control Register SCR 3 Baud rate The equation for scan time in full duplex mode 182 x FS x TBPS s 182 is a constant The equation for scan time in half duplex mode 354 x FS x TBPS s 354 is a constant The scan time calculated by the above equations is shown in Appendix 2 Scan T
31. the interrupt triggers generated by the pulse signals from the SCANR pin the user system pro gram can recognize the end timing of a single scan in the HLS to execute a program For details of the SCANR pin refer to 4 5 1 Pins Indicating Scan Timing SCANR and SCANW 2 3 4 Stopping Scan The user system program can intentionally stop the scan by writing to bits 0 to 5 FSO to FS5 of the SCR register If the user system program writes to the SCR register the next command packet CP is not transmitted The next scan is started from the satellite IC at the satellite address SA 01H In the MKY33 the scan stops right after a hardware reset is activated regardless of operation by the user system program TEP STEcuwica 170 User s Manual 2 4 User support Functions This section describes the user support functions of the MKY33 The following areas in the memory map of the MKY33 are allocated for user support functions i Control area from addresses 002H to 07FH H to C7 areas from addresses 180H to 4FFH 1 Area to reset the output of the DREQ pin to Low level by writing to the DREQR Data REQuest Reset register at address 480H The user support functions can 1 Recognize link status e g connection status and error occurrence between individual satellite ICs and MKY33 2 Receive data on expanded functions from individual satellite ICs in addition to Di data data on I O input pin
32. to the network This applies to both types of network to the MKY33 TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 3 4 Recommended Network Connection Figure 4 3 shows the recommended network connection The TRX consists of an RS485 based driver receiver LSI driven at 5 0 V and pulse transformer Recommended network cables include Ethernet LAN cables 10 5 Category 3 or higher and shielded network cables When operating the HLS full duplex mode requires two twisted pair cables and half duplex requires one twisted pair cable Full duplex communication mode Equivalent to SN751177 MKY33 LSI driven at 5 0 V Pulse transformer Two twisted pair cables with impedance of 100 Q Network cable Two twisted pair cables with impedance of 100 Q Connect a 100 Q termination resistor to the end of the network cables Connecting the resistor before or after the pulse transformer has the same effect Half duplex communication mode Equivalent to SN751177 LSI driven at 5 0 V One twisted pair cable with impedance of 100 Q Network cable Connect a 100 Q termination resistor to the end of the network cables Connecting the resistor before or after the pulse transformer has the same effect Fig 4 3 Recommended Network Connection tem Technical Guide For more information about how to select components or to get recommended components visit our Web site at www steptechnica com TEP STECHNICA CO ID
33. two word accesses and data on the two accesses watches the data is determined to be correct TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 5 Connection of MKY33 User support Functions This section describes the pin functions and connections required to use the MKY33 user support functions that supports the user system 4 5 1 Pins Indicating Scan Timing SCANR and SCANW This section describes the functions of the SCANW SCAN Write pin pin 80 and SCANR SCAN Read pin pin 81 The MKY33 scans from the Satellite Address SA 1 up to Final Satellite FS address written to the SCR System Control Register The user system can recognize whether the MKY33 scans correctly by monitoring the SCANW pin and SCANR pin It can also measure the time of a single scan At completion of reading data transmitted to the satellite IC at the FS from the BRAM the SCANW pin out puts a pulse signal that goes High for 2 x approx 82 ns at Xi 48 MHz If the user system uses pro gram that updates data in the Do area to be sent to the satellite IC at every scan a rising edge output from the SCANW pin can be used as an interrupt trigger to the user CPU In this way output signal of the SCANW pin indicates the write timing of data for updating Fig 4 16 At completion of writing data received from the satellite IC at the FS to the BRAM the SCANR pin outputs a pulse signal that goes High for 82 ns If the user system u
34. 00 354 00 472 00 590 00 708 00 826 00 944 00 1 062 00 1 180 00 1 298 00 1 416 00 1 534 00 1 652 00 1 770 00 1 888 00 2 006 00 1 092 00 2 124 00 1 152 67 2 242 00 1 213 33 2 360 00 1 274 00 2 478 00 1 334 67 2 596 00 1 395 33 2 714 00 1 456 00 2 832 00 1 516 67 2 950 00 1 577 33 3 068 00 1 638 00 3 186 00 1 698 67 3 304 00 1 759 33 3 422 00 1 820 00 3 540 00 1 880 67 3 658 00 1 941 33 3 776 00 2 002 00 3 894 00 2 062 67 4 012 00 2 123 33 4 130 00 2 184 00 4 248 00 2 244 67 4 366 00 2 305 33 4 484 00 2 366 00 4 602 00 2 426 67 4 720 00 2 487 33 4 838 00 2 548 00 4 956 00 2 608 67 5 074 00 2 669 33 5 192 00 2 730 00 5 310 00 2 790 67 5 428 00 2 851 33 5 546 00 2 912 00 5 664 00 2 972 67 5 782 00 3 033 33 5 900 00 3 094 00 6 018 00 3 154 67 6 136 00 3 215 33 6 254 00 3 276 00 6 372 00 3 336 67 6 490 00 3 397 33 6 608 00 3 458 00 6 726 00 3 518 67 6 844 00 3 579 33 6 962 00 3 640 00 7 080 00 3 700 67 7 198 00 3 761 33 7 316 00 3 822 00 7 434 00 29 50 59 00 59 00 118 00 88 50 177 00 118 00 236 00 147 50 295 00 177 00 354 00 206 50 413 00 236 00 472 00 265 50 531 00 295 00 590 00 324 50 649 00 354 00 708 00 383 50 767 00 413 00 826 00 442 50 885 00 472 00 944 00 501 50 1 003 00 531 00 1 062 00 560 50 1 121 00 590 00 1 180 00 619 50 1 239 00 649 00 1 298 00 678 50 1 357 00 708 00 1 416 00 737 50 1 475 00 767 00 1 534 00 796 50 1 5
35. 3 Chapter 4 Connecting MKY33 4 1 Connecting Buffer ees eran boris none u u 4 4 42 Supplying Driving Clock and Hardware Reset Signal 4 5 4 2 4 Supplying Driving Clock l l 4 5 4 2 2 Supplying Hardware Reset Signal 4 5 43 Connecting Network Interface l u u 4 6 4 3 1 Selecting Communication Mode Using 4 6 4 3 2 RXD1 and RXD2 Pins and Two Types of Network 4 6 4 3 3 Connecting TXE Pin and TXD Pin J nennen u u 4 6 4 3 4 Recommended Network Connection nennen nnns 4 7 435 Setting Baud Rate aee 4 8 4 4 Connecting User u hee ete 4 9 4 4 1 Data Storage Method u u u u u u u uu 4 9 4 42 Function of ASWA P Pih ua sassa ss 4 9 4 4 3 Connection to 8 bit User Bus U 4 10 444 Connection to 16 bit User Bus l l u u u u u 4 11 4 4 5 Recognition of Access J J U rere rre
36. 93 00 826 00 1 652 00 855 50 1 711 00 885 00 1 1 770 00 914 50 1 829 00 944 00 1 1 888 00 973 50 1 001 00 1 947 00 1 003 00 1 031 33 2 006 00 1 032 50 1 061 67 2 065 00 1 062 00 1 092 00 2 124 00 1 091 50 1 122 33 2 183 00 1 121 00 1 152 67 2 242 00 1 150 50 1 183 00 2 301 00 1 180 00 1 213 33 2 360 00 1 209 50 1 243 67 2 419 00 1 239 00 1 274 00 2 478 00 1 268 50 1 304 33 2 537 00 1 298 00 1 334 67 2 596 00 1 327 50 1 365 00 2 655 00 1 357 00 1 395 33 2 714 00 1 386 50 1 425 67 2 773 00 1 416 00 1 456 00 2 832 00 1 445 50 1 486 33 2 891 00 1 475 00 1 516 67 2 950 00 1 504 50 1 547 00 3 009 00 1 534 00 1 577 33 3 068 00 1 563 50 1 607 67 3 127 00 1 593 00 1 638 00 3 186 00 1 622 50 1 668 33 3 245 00 1 652 00 1 698 67 3 304 00 1 681 50 1 729 00 3 363 00 1 711 00 1 759 33 3 422 00 1 740 50 1 789 67 3 481 00 1 770 00 1 820 00 3 540 00 1 799 50 1 850 33 3 599 00 1 829 00 1 880 67 3 658 00 1 858 50 1 911 00 3 717 00 4 EP T Appendix HNICA CO LTD App 5 E North America Distributor Trans Data Technologies Inc 340 Arthur Ave Roselle IL 60172 Telephone 630 440 4075 Facsimile 630 539 4475 e mail info steptechnica us http www steptechnica us Developed and manufactured by Ste
37. MKY33 User s Manual 4 3 5 Setting Baud Rate The MKY33 baud rate is determined by the settings of the BPS0 pin pin 76 and 51 pin pin 77 Figure 4 4 shows the baud rates corresponding to the settings When both the BPS0 and 51 pins are kept Low the baud rate is 1 4 of the clock frequency supplied to the EXC pin pin 78 For example when the clock frequency supplied to the EXC pin is 5 MHz the baud rate is 1 25 Mbps The maximum clock frequency that can be supplied to the EXC pin is 12 5 MHz with a duty ratio ranging from 40 to 60 when Xi 50 MHz When not supplying a clock frequency to the EXC pin leave the EXC pin open or connect it to VDD or GND because the EXC pin is connected pull up resistor internally 7 In this setting the transfer rate is 6 Mbps a i lt e BPS Hi Hi Lo Lo 76 BPS0 Hi Lo Hi Lo BPS0 Transfer rate 12 Mbps 6 Mbps 3 Mbps EXC 111 EXC is enabled 78 in this setting EXC clock frequency of four times the external transfer rate is input Kept High or Low or left open when not used Duty ratio 40 to 60 equency lt 12 5 MHz M Fig 4 4 Setting of Baud Rate by 50 and BPS1 Pins TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 4 Connecting User Bus This section describes how to connect the user CPU and access time necessary for access to the MKY33 from the user system program In this section the bus
38. MKY33 is not used The 0 pin is an input pin and so connect a pull up or pull down resistor of about 47 k to the AO pin or connect to VDD GND or to the address signal AO of the user bus to prevent the AO pin from being input an undefined level 3 The SWAP pin pin 36 of the MKY33 does not function in MKY33 connected with 16 bit user bus It is an internally pulled up input pin so leave the SWAP pin open or connect it to VDD 4 Connect data signals DO to D15 of the user bus to the UDO to 01315 pins pins 13 to 20 pins 23 to 30 of the MKY33 5 Connect the RD signal of the user bus to the URD pin pin 33 of the MKY33 the WR signal to the UWR pin pin 34 When the CS pin pin 32 of the MKY33 is Low the RD and WR signals of the user bus are activated 6 Connect a signal that the user bus generates to determine the memory allocation of the MKY33 to the UCS pin pin 32 of the MKY33 The UCS input pin is activated when it is Low The area from memory addresses OOOH to 4FFH of the MKY33 is occupied by the MKY33 Even if the UCS pin is Low the unoccupied area from memory addresses 500H to 7FFH is not accessed in the same way as when the UCS pin is High A10 to AO UA10 to UAO 53 58 60 65 59 57 56 54 52 51 49 10 to AO 27 to 30 17 to 20 23 to 26 13 to 16 D7 to DO UD15 to UDO 50 48 46 44 40 41 45 47 MD7 to MDO WB and ZSWAP can be set to open 36 Setting a
39. RP from the satellite IC is input to the RXD1 pin or RXD2 pin Connect the TRX so that a serial pattern signal for the RP transmitted from the satellite IC will be input to the RXD1 pin or the RXD2 pin The RXDI pin or the RXD2 pin is pulled up in MKY33 When the user system uses a single network leave either the RXD1 pin or the RXD2 pin open or connect it to VDD or GND Reference In half duplex mode the signal output from the TXD pin of the MKY33 may be input directly to the RXDI pin or the RXD2 pin while the MKY33 is transmitting a command packet CP The MKY33 is designed not to input data when the TXE pin is High when operated in half duplex mode so there is no problem 4 3 3 Connecting TXE Pin and TXD Pin In the MKY33 the TXD pin outputs a serial pattern signal for a command packet CP transmitted to the sat ellite IC If the MKY33 is set to full duplex mode the TXE pin is always High If the MKY33 is set to half duplex mode the TXE pin is High only while the TXD pin outputs the serial pattern signal for the CP to the satellite IC The TXD pin alternately outputs High and Low levels with a time width of 2 x TBPS while it does not output the serial pattern signal for the CP to the satellite IC Design the TRX connected to the MKY33 so that the enable pin of the TRX driver is activated when the TXE pin is High thereby enabling the serial pattern signal for the command packet CP output from the TXD pin to be transmitted
40. a to initialize the entire memory area of the MKY33 in step 1 above In most cases the operation in step 2 above can be omitted 2 3 2 Start This section describes the starting MKY33 2 3 2 1 Starting Scan The MKY33 a center IC in the HLS starts a scan when 01H to 3FH are written as Final Satellite FS values to bits 0 to 5 FSO to FS5 of the System Control Register SCR Fig 2 1 The scan is continued until the user system program writes 00H intentionally to bits 0 to 5 FSO to FS5 of the SCR register or until a hard ware reset is activated 2 3 2 2 Role of SCR The MKY33 scans the satellite ICs at satellite addresses up to Final Satellite FS values written to the SCR register beginning with Satellite Address SA 1 The FS values do not have to match the number of existing satellite ICs Determine the FS values according to the purpose of the user system If this register is read after power on and when no write has been executed an undefined value is read When a hardware reset is activated the MKY33 recognizes 0000H internally even if the read data is an undefined value Address 000H Bit 45 14 13 12 1 10 9 8 7 6 5 4 3 2 1 0 22253554 51 5 Fs4 2 Fso T RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW Fig 2 1 Details of SCR TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 3 2 3 Usage when FS Values Do N
41. areas of response data for the com mands Table 2 2 Response Data Storage Areas for Commands Response data Response data Command Reference Command Reference storage area storage area Note Each command returns to 0 after command execution is completed TEP STECHNICA CO ID MKY33 User s Manual 2 4 2 2 Use of Commands 1 to 6 and Command Options If the user system program sets any of commands 1 to 6 the designated command continues to execute until the user system program rewrites When the user system program wants to execute any of commands 1 to 6 just once and return the command immediately to 0 simultaneously set 1 to the Automatic Clear Flag ACF bit 4 in the control word when setting any one of the commands 1 to 6 in the control word Then the command returns to command 0 and the ACF also returns to 0 after a link with the target satellite IC is established once by the designated command that is after command execution is completed The processing can automatically go round commands 0 to 6 one by one When the user system program sets 1 to the Automatic Round Flag ARF bit 5 in the control word the command is updated automati cally so that the processing can go round it each time the execution of the designated command for the target satellite IC is completed When the user system program sets command 0 and then sets 1 to the ACF and ARF the p
42. ata transmitted to the satellite IC from the BRAM or writes data got from the satellite IC to the BRAM which is required for scanning during a gap when the user bus is not accessing the MKY33 The dynamic arbiter consists of the bus selecting circuit on the MKY33 and communication system 8 Kept waiting for this time period Longer waiting time requires longer access time Kept waiting for longest time when access from user bus immediately after 2 immediately respond communication system starts access Access from user bus zzz i Bus switching to BRAM Time Access from communication system C i 1 Default 4 If access from the user bus precedes access communication system from the communication system the access from the communication system is kept waiting Fig 4 10 Operation of Bus Arbiter TEP S TECHNICA Co LTD MKY33 User s Manual 4 4 6 2 Enable Control of Dynamic Arbiter The MKY33 has the DAE Dynamic Arbiter Enable pin pin 37 and DAEA Dynamic Arbiter Enable Automatic pin pin 38 as input pins for enable control of the dynamic arbiter Processing the DAE and DAEA pins allows the user system to operate the dynamic arbiter Therefore the time for the user bus to access the MK Y33 varies depending on the processing of these pins 4 4 6 3 Fixing Access Time If the DAE pin of the MK Y33 is kept Low and its DAEA pin High the dynamic arbiter is always e
43. ated When FS value 5 set to bits 0 to 5 FSO to FS5 of SCR register with three satellite ICs connected to MKY33 with SA 1 to SA 3 The number of consecutive nonrespose set to two control words at addresses 008H and OOAH is counted at every scan and reaches 7 If an additional satellite IC with SA 5 is connected at the next scan the number of consecutive nonrespose set to the control word at address 00AH and the RX CHKI flag bit and RX CHK2 flag bit are cleared to 0 respectively and new link is established between the MKY33 and the satellite IC with SA 5 enabling to recognize that the HLS is operating correctly When link continued between MKY33 and satellite IC The number of consecutive nonrespose set to the control word and the RX CHKI flag bit and 2 flag bit remains 0 continuously If a link with the satellite IC suf fered temporarily interference from external noise the number of consecutive nonres poses and the flag bit are 1 only at the scan If a user system that wants to recognize whether the Di state is always the latest the user system can determine whether data is obtained from the latest scan or the previous scan by checking the con trol word when reading Di data from the Di area TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 4 2 Receiving non Di Data Individual Data by Expanded Functions This section describes how to 2 Rec
44. basic functions Therefore fix command 0 to the control word in the control area of the MKY33 corresponding to Satellite Address SA where MKY35 is connected No other operations are required Reference If any command other than command 0 is set accidentally to the target control word where e the 5 is connected this will not affect the functions and operation of the MKY35 In this case the MKY35 embeds 0000H within a response packet RP to return The MKY35 has eight operation modes IO modes 1 to 6 and PWM Pulse Width Modulation modes 1 and 2 MKY35 pins select these modes to set The meanings of data set to the Do area of the MKY33 and data returned to the Di area vary according to each mode 2 7 2 Examples of Using MKY33 Di Do Areas for MKY35 Example 1 When operation mode of MKY35 with SA 4 is IO mode 1 All the I O pins of the MKY35 are for inputs The state of 16 bit pins can be stored to the Di area at address 108H of the MKY33 Data set to the Do area at address 088H of the MKY33 has no meaning Example 2 When operation mode of MKY35 with SA 10H is IO mode 4 The MKY35 has 16 I O pins 12 for output and 4 for input The state of I O pins for input can be stored to the lower bits 0 to 3 of the Di area at address 120H of the Bits 4 to 15 are always at 0 Of the data to be set to the Do area at address of the MKY33 the data of bits 0 to 3 has no meaning and the data
45. ccess speed Refer to 4 4 6 Access Time Fig 4 7 Connection to 16 bit User Bus TEP STEcuwica 17 User s Manual 4 4 5 Recognition of Access The conditions for recognizing that the MKY33 is accessed from the user CPU are as follows 1 Read When both UCS pin and URD pin Low For example when only the URD pin is Low read access is not started and data is not output to the data bus 2 Write When both UCS pin and UWR pin Low For example when both the UCS pin and UWR pin are Low and only the UCS pin goes High write access is assumed to have been terminated and data on the data bus is input When the MKY33 recognizes the read and write accesses in 1 and 2 above the ACK pin pin 35 of the MKY33 changes from High to Low The ACK pin changes from Low to High when the access from the user bus finishes Fig 4 8 The access from the user bus must be continued until the output signal of this ACK pin changes from Low to High BM AN Readaccess Write access Passage of time Passage of time Address Address cs CS RD WR Data Data TRO TWP ACK ACK 2 Fig 4 8 Output Signal of ACK Pin The signal output from the ACK pin can be used as a wait request signal for access to the MKY33 from the user CPU Chapter 4 Connecting MKY33 TEP S TECHNICA CO LTD 4 4 6 Access Time T
46. ding on frequencies and circuit board shapes ultrasonic cleaning may cause resonance affecting lead strength 5 5 Recommended Reflow Conditions Package surface temperature t1 tw Time Parameter Symbol Pre heat time 60 to 120 s Pre heat temperature 150 to 180 G Temperature rise rate 2 C to 5 C s Peak condition time 10 3 s max Peak condition temperature 255 5 C Cooling rate 2 to 5 C s High temperature area 220 C 60 s max Removal temperature lt 100 C Caution The recommended conditions apply to hot air reflow or infrared reflow Temperature indi cates resin surface temperature of the package Appendix Appendix 1 Memory Address List Appendix 2 Scan Time Table TEP S TECHNICA CO LTD Appendix Appendix Appendix 1 Memory Address Map List Appendix Table 1 List of MKY33 Memory Addresses Corresponding to Satellite Addresses SA and Commands Control App 3 TEP STECHNICA CO ID MKY33 User s Manual Appendix 2 Scan Time Table Appendix Table 2 Scan Time Based on FS Values and Baud Rates Unit us 118 00 236
47. e occurrence of consecutive link errors and to cope with the errors When not used leave this pin open Caution The intervals when the CHK2 pin generates pulse signals may be reduced to 182 x TBPS When using the output of the CHK2 pin as an interrupt trigger to the user CPU even when the interrupt is triggered frequently check the performance of the user CPU and capability of the user program 4 5 4 Output of DREQ Pin The output of the DREQ Data REQuest pin pin 79 goes High when it detects a request issued from the satellite IC Monitoring the signal of the DREQ pin enables to detect a request DREQ issued from the sat ellite IC A rising edge of this signal can be used as an interrupt trigger to the user CPU When the user sys tem program wants to change the output level of the DREQ pin from High to Low write 00H to the DREQR at address 480H of the MKY33 after clearing the DREQs of the control words corresponding to all satellite ICs Caution 1 For details of the DREQ refer to 2 4 2 5 Detection of Request from Satellite IC 2 If OOH is written to address 480H of the MKY33 with the DREQs of all control words not cleared the signal of the DREQ pin once goes Low and then goes High immediately TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 6 Connection Example of MKY33 Figure 4 17 shows an example of the MKY33 connected to a 16 bit user bus It shows the connection in both full a
48. ect this pin to GND manufacturer test pin Write control output pin that connects to buffer RAM Connect this pin to the WR pin of buffer RAM Input pin that selects type of buffer RAM Be sure to fix this pin at High Negative Positive Pin that sends command packet CP to satellite IC Connect it to a drive input pin including driver etc This pin goes High when the output signal of the TXD pin Positive is enabled Connect it to a gate pin including driver etc Input pin that inputs response packet RP from satellite IC Positive This pin takes precedence over the RXD2 pin when a response packet is received simultaneously Input pin that inputs response packet RP from satellite IC Positive Set this pin High or leave it open when it is not used Input pin that selects MYK33 communication mode Positive Keep this pin High when selecting full duplex mode and Low when selecting half duplex mode Input pin that selects width of connected user bus Set this pin Low when connecting to an 8 bit user bus Set this pin Low or leave it open when connecting to a 16 bit user bus Positive Positive Driving clock input pin 48 MHz recommended Positive Input pin that selects MK Y33 baud rate Positive Input pin that selects MK Y33 baud rate Clock input pin that is used as the baud rate depends on the external clock Positive The baud rate is 1 4 of the supplied frequency which
49. eive data on expanded functions except Di data data on I O input pin of each satellite IC from individual satellite ICs in 2 4 User support Functions The expanded functions of the satellite IC can be specified by setting commands to bits 0 to 3 in the control word Fig 2 4 Commands that specify expanded functions Command Commands to FH can be set Number of consecutive i Commands 8 to FH return to nonresponses Unused when a response packet RP is 1 ACF received from the satellite IC and 1 RX CHK2 Automatic command clear setting bit command execution is completed Nonresponding Flag Bits 0 to 3 are cleared to 0 regardless of the bit 4 setting indicating nonresponse after command execution made consecutively three or more times 1 RX CHK1 1 DREQ 1 ARF Nonresponding flag Automatic read setting bit Executes commands 0 to 6 automatically Fig 2 4 Commands Specifying Expanded Functions If the user uses basic HLS functions operated by the procedure in 2 3 Initialization Start and Operation of MKY33 command is set to 0 2 4 2 1 Relationship between Commands and Response Data Storage Areas When command 1 is set response data received by response packet RP from the satellite IC is stored in the area on the memory map When command 2 is set the response data received from the satellite IC is stored in the C2 area on the memory map Table 2 2 shows the storage
50. ernal access disable 182 x TBPS Full 354 x TBPS Half Write access Write data setup Write data hold Acknowledge delay Acknowledge enable TEP S TECHNICA Co LTD MKY33 User s Manual 5 2 6 Access Timing without DAE Control when Connecting 8 bit Bus This section describes the access timing without DAE control when connecting a 8 bit bus 5 2 6 1 Read Timing without DAE control when connecting 8 bit bus Xi 48 MHz BW DAE UCS URD UD7 UDO read ACK TBCS ors TADS TBCH TADH UA10 UA0 er TRA TAA 4 TRD TBR 4 TRO TAD TOA TACK Passage of time The signal of the DAE is equivalent to the internal signal when the DAEA pin used refer to 4 4 6 7 Use of SDAEA Pin Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Read access 182 x TBPS Full 354 x TBPS Half Read to out bus drive Read to data valid data output Read data hold Bus release Acknowledge delay Acknowledge enable Acknowledge margin TEP S TECHNICA CO LTD Chapter 5 Ratings 5 2 6 2 Write Timing without DAE control when connecting 8 bit bus Xi 48 MHz TBCS TBCH geese BW DAE TADS TADH UA10 UA0 EE CS TwA TAA gt
51. f MKY34 functions selected by commands to MKY34 data obtained by the MKY33 Table 2 3 MKY34 Functions Selected by Commands and Data SSO Sp asss Function of MKY34 4 data obtained by MKY33 storage area Obtain state of DiO to Di15 pins State of DiO to Di15 pins Obtain value of counter ch1 Four digit hexadecimal value of counter ch1 Obtain value of counter ch2 Four digit hexadecimal value of counter ch2 Obtain value of counter ch3 Four digit hexadecimal value of counter ch3 Obtain value of counter ch4 Four digit hexadecimal value of counter ch4 Obtain value of counter ch5 Four digit hexadecimal value of counter ch5 Obtain value of counter ch6 Four digit hexadecimal value of counter ch6 Obtain value of SIDR Value of SIDR 16 bits Obtain state of DiO to Di15 pins State of DiO to Di15 pins Reset counter ch1 to 0000H 0000H Reset counter ch2 to 0000H 0000H Reset counter ch3 to 0000H 0000H Reset counter ch4 to 0000H 0000H Reset counter ch5 to 0000H 0000H Reset counter ch6 to 0000H 0000H Obtain value of SIDR Value of SIDR 16 bits Chapter 2 MKY33 Software TEP S TECHNICA CO LTD 2 6 3 Example of Using Commands for MKY34 e Example 1 Step 1 Step 2 Step 3 e Example 2 Step 1 Step 2 Step 3 Step 4 Example 3 Step 1 Step 2 Step 3 When monitoring counter ch1 of MKY34 with SA 3 regularly and clear ing if necessary Us
52. gnal supplied to the DAE pin to be kept High and the time for access from the user bus and the time obtained from addition of both duration of the High level and the access time at access from the user bus following the High level of the DAE pin described in 4 4 6 4 Speeding Up Access Time are limited as shown in Table 4 3 If the time limit is exceeded the MK Y33 can neither read data transmit ted to the satellite IC from the BRAM nor write data received from the satellite IC to the BRAM which are required for the scanning and the scanning pauses until the next gap occurs The minimum time at Low level of the DAE pin when the MKY33 recognizes that the dynamic arbiter is enabled is 100 ns Table 4 3 Allowable Time Obtained from Addition of High Level Time of DAE Pin to Access Time Full duplex Half duplex Unit 15 2 30 4 60 7 118 182 x TBPS 354 x TBPS TEP User s Manual 4 4 6 6 Example of Signal Supplied to DAE Pin A appropriate signal generated to the user bus by the signal output from the user CPU which is supplied to the DAE pin is usually Low and goes High 450 ns earlier immediately before the user bus accesses the MKY33 In addition the signal must not exceed the allowable time shown in Table 4 3 including the time for the user bus to access the MKY33 To generate such a signal by a signal output from the user CPU the following
53. he ratings of the MKY33 5 1 Electrical Ratings Table 5 1 lists the absolute maximum ratings of the MKY33 Table 5 1 Absolute Maximum Ratings Vss 0 V Power supply voltage 0 3 to 7 0 Input voltage i Vss 0 3 to 6 0 Output voltage Vss 0 3 to 6 0 Peak output current Other than Type A and D Peak Peak output current Type A and D Peak Allowable power dissipation 570 Operating temperature 40 to 85 Storage temperature 65 to 150 Table 5 2 lists the electrical ratings of the MKY33 Table 5 2 Electrical Ratings Ta 25 C Vss 0 V Operating power supply voltage Vi VDD or Vss Mean operating current f 50 MHz output open External input frequency Input to Xi pin Input pin capacitance Output pi it 0 utput pin capacitance f21MHz TA 25 I O pin capacitance Rise fall time of input signal Rise fall time of input signal Schmitt trigger input TEP S TECHNICA CO LTD User s Manual 5 2 AC Characteristics Table 5 3 lists the measurement conditions for AC characteristics of the MKY33 Table 5 3 AC Characteristics Measurement Conditions Output load capacitance Power supply voltage Temperature 5 2 1 Clock and Reset Timing Passage of time Xi 7 TXIL TRST Xi RST Clock period width 20 83 48 Hz Clock High level width 710 4
54. he time for access to the MKY33 memory from the user bus can be fixed or variable This section details the access time referring to the access processing and internal workings of the MKY33 A time such as 450 ns defined in this section is explained assuming that 48 MHz clock is supplied to the Xi pin of the MKY33 for driving clock 4 4 6 1 Dynamic Arbiter in MKY33 The MKY33 does not have internal memory Therefore the buffer RAM BRAM described in placed near the MKY33 When the user bus accesses the MKY33 memory the MKY33 mediates access to BRAM Fig 4 9 The bus arbiter that selects access rights to the BRAM in the MKY33 operates as follows Communication 4 1 Connecting Buffer RAM must be User bus system 1 The bus arbiter usually selects the com munication system Fig 4 10 1 2 The bus arbiter selects the user bus Fig 4 9 Dynamic Arbiter when it recognizes access from the user bus Fig 4 10 2 3 When the bus arbiter recognizes access from the user bus during access from the communication sys tem the bus arbiter cannot select the user bus until access from the communication system is com pleted Fig 4 10 3 4 When the communication system requests access during access from the user bus the communication system cannot get bus arbitration until access from the user bus is completed Fig 4 10 4 As described above the MKY33 reads d
55. hen the 16 bit I O input pin of the satellite IC with SA 02H is 79C4H 79C4H data can be read which is the same as the input pin of the terminal Caution Because there is satellite with SA 0 two bytes of addresses 100 101 unused RAM areas TEP STECHNICA User s Manual 2 3 lnitialization Start and Operation of MKY33 This section describes initialization start and basic operation of the MKY33 2 3 1 Initialization Before turning on the MK Y33 set a regulator circuits such as DIP switches that regulates the input level of the pin to determine communication mode full duplex or half duplex and baud rate For details refer to 4 3 1 Selecting Communication Mode Using FH Pin and 4 3 5 Setting Baud Rate After the MKY33 is powered on be sure to perform the following operations 1 Write data to initialize the entire memory area from 000H to 4FFH in the memory map of the MKY33 2 Write the Do output state initial data of the satellite IC to the Do area from 080H to OFFH Ifthe user system has no need to set an initial value to the output of the I O pin of the termi Qasa nal the user can omit step 2 above At the initial start up of the user system the I O pin state of the terminal is almost always at the reset default value of the satellite IC The reset default value of the satellite IC also corresponds to Write 00H dat
56. hows a usage example of the DAEA pin Keeping the DAE pin High and the DAEA Low causes this circuit to operate as if the DAE pin goes Low when the user bus accesses devices other than the MKY33 Using the DAEA pin can reduce the logic gate components shown by the dotted lines in Figure 4 14 Decoder To another ROM and SRAM at A B C Upper address 11 a Bus controller static memory control signal generating circuit etc Y Circuit in which DAE enters enabled state when devices other than MKY33 accessed Same operation Fig 4 14 Usage Example of ZDAEA Pin TEP STECHNICA CO LTD MKY33 User s Manual 4 4 7 Cautions for Connecting User Bus This section describes the precautions for connecting the user bus to the MKY33 4 4 7 1 Maintaining End of Access The MKY33 has the dynamic arbiter described in 4 4 6 1 Dynamic Arbiter in To operate the dynamic arbiter correctly the end of the access must be maintained Therefore a non access period of about 43 ns is required after one access to the MK Y33 finishes Fig 4 15 This is not a major problem for con necting to a commonly used user bus However take this into consideration when designing the user system so that the MKY33 is accessed only in the logic circuit without using the CPU C D Data not guaranteed even if address changed in middle of the access for two reads UA0
57. ibed in 2 4 1 Recognition of Link Status between Satellite ICs and issue command 7 as a dummy Also in a user system that uses the output signals of the DREQ pin described in 4 5 4 Output of DREQ Pin write 00H to DREQR Data REQuest Reset at address 480H of the MKY33 when DREQs from all satellite ICs are cleared 2 6 5 Initializing MKY33 when using battery protected MKY34 If the user uses the MKY34 satellite IC with battery protected StepTechnica recommends the user recog nize the state of the advanced function corresponding to each command in the MKY34 by initializing the MKY33 After operating step 2 described in 2 3 1 Initialization set the command in the control word corresponding to the start of the target Satellite Address SA to 30H This operation can provide the values of six channels of 16 bit binary up counters staying in the MKY34 after scanning is executed seven times If there is an MKY34 with the DREQ in the control word at 1 issue command 7 to obtain the value of the Serial IDentification Register SIDR of the MKY34 TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 7 Operating MKY33 for MKY35 This section describes how to operate the MKY33 for the MKY35 or a kind of satellite IC Refer to MKYS5 User s Manual before understanding this section 2 7 4 Handling of MKY35 From the viewpoint of the MKY33 operation system the MKY35 satellite IC supports only the Do and Di pins the HLS
58. ignals from the MWR pin only when the MKY33 writes data to the BRAM TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 2 Supplying Driving Clock and Hardware Reset Signal This section describes how to supply a clock that drives the and a hardware reset signal 4 2 1 Supplying Driving Clock Supply an oscillator generated 48 MHz clock to the Xi pin pin 75 of the MKY33 for driving clock in accordance with the following specifications The MKY33 executes all operations using the clock signal supplied to the Xi pin If a clock signal is not supplied the user system program does not have read and write access to the MKY33 memory 1 Usually supply a 48 MHz external clock The upper frequency is 50 MEZ and the lower frequency is not provided 2 Electrical characteristics of the Xi pin VIH min 3 5 V VIL max 1 5 V 3 Clock with a signal rise and fall time of 20 ns or less 4 Clock with a minimum Hi level or Low level time of 5 ns or more 5 Clock with jitter component of 500 ps or less 6 Frequency accuracy of 1000 ppm 0 1 or better 4 2 2 Supplying Hardware Reset Signal When a Low level signal is supplied to the RST ReSeT pin pin 39 the MKY33 is hardware reset If a period in which the Low level signal has been supplied is less than one clock the signal is ignored to pre vent malfunction To reset MKY33 completely the RST pin must be kept Low 10 or more clock while supply
59. ime Table TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 3 3 Basic Operation The user system program can operate the satellite IC connected to MKY33 by read access or write access to each area in the memory map during scanning For example writing 135AH word data to the memory address 082H the 16 bit I O output pin of the satellite IC with SA 01 comes into the 135 state For example reading the Di area at address 104H when the 16 bit I O input pin of the satellite IC with SA 02H are 79 user system program can read 79 data identical to the input pin state of the terminal During this operation the user system program can easily control the system like PIO Parallel I O which is one of CPU resource except the signal delay in the scan time When the HLS is operated this way constancy is completely maintained This is most common usage of the HLS and is also available for various applications The end timing of a scan in the HLS is called SCAN Read timing Fig 2 2 Full duplex Passage of time iP P PS PS PS PSP Pa PS PS PS PS PS RP RXD The end of waiting for RP from the final satellite IC refers to SCAN Read timing Half duplex eM PAL TS e D Fig 2 2 Position of SCAN Read Timing The MKY33 outputs pulse signals from the SCAN Read SCANR pin at the SCAN Read When the user CPU receives
60. ing a driving clock Fig 4 2 The RST pin is connected to an internal Schmitt type input buffer so a constant rise time circuit can be connected directly at power on No response to Must be kept Low for 10 or more clock periods less than 1 clock Fig 4 2 Hardware Reset Caution Design the circuit so that a hardware reset is surely activated immediately after MK Y33 power on TEP User s Manual 4 3 Connecting Network Interface This section describes connection of a network interface I F The network I F of the MKY33 consists of the RXD1 pin pin 70 RXD2 pin pin 71 TXE pin pin 69 and TXD pin pin 68 The MKY33 has two receiving pins RXDI pin and RXD2 pin so the user system which uses the MKY33 as the center IC of the HLS can build two types of network cables Fig 4 3 4 3 1 Selecting Communication Mode Using FH Pin When connecting the network I F select full duplex or half duplex mode using the FH pin pin 72 When full duplex mode selected set the FH pin High and when half duplex mode selected set the FH pin Low When connecting the TRX driver receiver to the network I F conform to this setting Caution The setting of the FH pin is one of the elements determining scan time Do not change the level of the FH pin during scanning 4 3 2 RXD1 and RXD2 Pins and Two Types of Network In the MKY33 a response packet
61. ing with DAE Control when Connecting 16 bit Bus This section describes the access timing with DAE control when connecting the 16 bit bus 5 2 5 1 Read Timing with DAE control when connecting 16 bit bus Xi 48 MHz BW DAE UCS URD UD15 UDO read ACK TIAD TADS TADH UA10 UA1 P TRA TAA lt P4 TRD TBR le TRO Tai TAD ToA TACK Passage of time 4 The signal of the DAE is equivalent to the internal signal when the DAEA pin used refer to 4 4 6 7 Use of DAEA Pin Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Internal access disable 182 x TBPS Full 354 x TBPS Half Read access Read to out bus drive Read to data valid data output Read data hold Bus release Acknowledge delay Acknowledge enable Acknowledge margin Chapter 5 Ratings TEP S TECHNICA Co LTD 5 2 5 2 Write Timing with DAE control when connecting 16 bit bus Xi 48 MHz BW DAE UWR ACK TBCS ees TADS CS TIAD TWA TADH TAA TACK Tws TWH Pit T AD Passage of time d Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Int
62. lt UWR Tws TwH gt ACK TACK Passage of time 4 gt TBcs Bus change setup 50 5 Bus change hold 0 ns TpAES DAE Setup 100 ns TDAED DAE delay 30 ns TADS Address setup 0 ns TADH Address hold 0 ns TAA Access to access 2 x TXI m ns TWA Write access TACK 2 ns Tws Write data setup 5 ns TWH Write data hold 0 ns TAD Acknowledge delay 25 ns TACK Acknowledge enable see 540 ns TEP S TECHNICA Co LTD MKY33 User s Manual 5 2 7 Access Timing with DAE Control when Connecting 8 bit Bus This section describes the access timing with DAE control when connecting the 8 bit bus 5 2 7 1 Read Timing with DAE control when connecting 8 bit bus Xi 48 MHz BW DAE UCS URD UD7 UDO read ACK TIAD TADS TADH UA10 UAO lt l TRD TBR TRO TRH lt gt TAD TOA Passage of time The signal of the DAE is equivalent to the internal signal when the DAEA pin used refer to 4 4 6 7 Use of DAEA Pin Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Internal access disable 182 x TBPS Full 354 x TBPS Half Read access Read to out bus drive Read to data valid data
63. m the Do pin of each corresponding satellite IC Area for basic functions 100H to 17FH i When a scan is started data in the Di pin of each corresponding sat IC is stored in the area from addresses 102H to 17FH 180H to 1FFH 200H to 27FH 280H to 2FFH Area to store data responding to commands to be set as control 300H to 37FH words corresponding to each satellite IC 380H to For details refer to 2 4 User support Functions 400H to 47FH 482H to 4FFH 500H to 7FFH Unused area System Control Register Register to which Final Satellite FS values controlling scan written Data REQuest Reset Writing to this register enables the output of the DREQ pin to be reset Low Each symbol A in the Write Right column in the above table has the following meanings The MKY33 memory has some areas that are write protected when a valid FS Final Satellite value is writ ten to the SCR System Control Register at address OOOH to start scanning Each symbol indicates the states of those areas This area can always be written O Only the lower byte of the control word can be written during scanning Only the lower byte is written even if this area is written by word access A Writing to this area is ignored X Only read access from this area is permitted during scanning The memory addresses of each area corresponding to Satellite Addresses SA are shown in
64. nabled In this case the access time of the user bus is fixed at the longest time as described in step 3 in 4 4 6 1 Dynamic Arbiter in MKY33 Fig 4 11 And if the access from the user bus is recognized during access from the communication system the user bus selection is kept waiting until access from the communication system is completed N Read access Write access When an address is determined and CS and RD When an address is determined to prepare write data are set Low data is output The access is the same and CS and WR are set Low the data can be written as that of commonly used SRAM The access is the same as that of commonly used SRAM Passage of time Passage of time Address Address CS CS RD WR Data Data MKY33 bus Bus MKY33 TRO M pu TwP J Fig 4 11 Concept of Access Time by Fixed time Method Table 4 1 indicates the access times by fixed time method TRO max is the time required for the MKY33 to finish outputting data during a read operation TwP min is the minimum time for which access must be continued required during a write operation Table 4 1 Access Time by Fixed time Method 8 bit wide connection WB pin Low 16 bit wide connection WB pin High 8 bit wide connection WB pin Low 16 bit wide connection WB pin High TEP Chapter 4 Connecting MKY33 ST ECHNICA CO LTD 4 4 6 4 Speeding Up Access Time
65. nd an 8 bit and big endian user bus indicates address 000 the MKY33 recognizes address 001H When the user bus indicates address 001H the MKY33 recognizes it address 000H The SWAP pin allows the MKY33 to identify the address signal AO of the big endian user bus with that of the little endian user bus Caution When using byte access in the MKY33 connected with a 16 bit user bus the SWAP pin doesn t function due to a logic circuit i e it cannot absorb the address differences caused by endian This is because the significance of the address signal AO In the MKY33 con nected with a 16 bit bus StepTechnica recommends word access be used to access TEP STEcuwica 17 User s Manual 4 4 3 Connection to 8 bit User Bus This section describes how to connect the MKY33 to an 8 bit user bus Fig 4 6 1 Set the WB pin pin 74 of the MKY33 Low level 2 Connect address signals AO to A10 of the user bus to to UAIO pins pins 2 to 12 of the MKY33 3 For a big endian user bus keep the S WAP pin pin 36 Low level for a little endian user bus set the SWAP pin 36 pin High or leave it open 4 Connect data signals DO to D7 of the user bus to the UDO to UD7 pins pins 13 to 16 and pins 23 to 26 of the MKY33 Since the UD8 to UDI5 pins pins 17 to 20 and pins 27 to 30 of the MKY33 are unused input output pins connect a pull up or a pull down resistor of about 47
66. nd half duplex modes The baud rate is 6 Mbps The pins of user support function are left open MKY33 32 O UCS User bus A10 to A0 UA10 to UA0 27 to 30 17 to 20 23 to 26 13 to 16 D7 to DO UD15 to UDO Sei esse Half duplex mode 33 Equivalent to ADM1485 2 I 74 ENS Network cable WB and SWAP can be set to open 36 T i i 38 r Pulse transformer Access 37 570ns 77 ch ME MEM NM E E iD DEED Connect a termination resistor to the end of the network cable 48 MHz clock 75 39 Low level reset o 83 82 BRAM 80 79 28 14 73 84 7 7 1 Unused pins at upper 777 addresses kept Low 22 1 e 77 2 42 m 777 64 62 63 61 31 777 TEP STECHNICA CO D MKY33 User s Manual Chapter5 Ratings This chapter describes the ratings of the MKY33 5 1 5 2 5 3 5 4 5 5 Electrical Ratings iusti edi uuu 5 3 AG 5 4 Package Dimensions cereus 5 15 Recommended Soldering Conditions 5 16 Recommended Reflow Conditions 5 16 TEP S TECHNICA CO LTD Chapter 5 Ratings Chapter 5 Ratings This chapter describes t
67. ng 8 bit Bus 5 12 5 2 7 1 Read Timing with DAE control when connecting 8 bit bus 5 12 5 2 7 2 Write Timing with DAE control when connecting 8 bit bus 5 13 5 2 8 Buffer RAM Access Timing U eene nennen nennen nnne 5 14 5 2 9 Output Timing of CHK1 CHK2 SCANR and 5 14 5 3 Package DiM nsionS cci inita sicca daa dise a hewn aa CR HU SUE sasa sassa ss TRUE Med 5 15 5 4 Recommended Soldering Conditions 5 16 5 5 Recommended Reflow Conditions eere 5 16 Appendix Appendix 1 Memory Address Map List J J J App 3 Appendix 2 Scan Time Table l u u T App 4 vii TEP o p MKY33 User s Manual Figures Fig 1 1 Basic Operation ot MKY33 ci ee 1 4 Fig 2 1 Details of 2 6 Fig 2 2 Position of SCAN Read Timing 2 9 Fig 2 3 Configuration of Control 2 11 Fig 2 4 Commands Specifying Expanded
68. nizes access from user bus and changes from Low to High when access from user bus finishes Negative Input pin that selects whether to reverse signal input from AO pin in MKY33 Negative Set this pin Low when connected to a big endian user bus Set this pin High or leave it open when connecting to a lit tle endian user bus Input pin for enable control of dynamic arbiter To operate the dynamic arbiter input appropriate signals generated according to the user bus timing For how to use this pin refer to 4 4 6 Access Time Negative Input pin for enable control of dynamic arbiter Negative Set this pin Low when generating the DAE signal in the MKY33 Keep it High or leave it open when it is not used MKY33 Hardware reset input pin 39 Negative Keep this pin Low for 10 or more clock right after power on or when resetting hardware intentionally 47 45 41 40 44 46 Positive 48 50 49 51 52 54 56 57 Positi 11 bit address bus that connects to buffer RAM 59 65 60 Ed Connect this pin to the AO to A10 pins of buffer RAM 58 53 8 bit bidirectional data bus that connects to buffer RAM Connect this pin to the DO to D7 pins of buffer RAM Continue TEP Chapter 3 MKY33 Hardware HNICA CO LTD Table 3 1 Pin Functions of MKY33 Continued eS en Read control output pin that connects to buffer RAM Negative Connect this pin to the RD pin of buffer RAM Positive Be sure to conn
69. of bits 4 to 15 are sent to the 12 I O pins for output Example 3 When operation mode of MKY35 with SA 26H is PWM mode 1 and motor speed controlled by PWM ratio The MKY35 has 16 I O pins 8 I O pins are for input and input data can be stored to bits 0 to 7 at address 14CH Di area of the MKY33 The state set to bits 8 to 11 at address OCCH Do area of the MKY33 is sent to the output pins The value set to bits 0 to 5 at address OCCH of the MK Y33 indicates the PWM ratio that can be used to control the rotational speed of a motor Bits 6 and 7 at address OCCH of the MK Y33 are used to instruct the rotation direction and stop of the motor Caution For details of the functions of the MKY35 for each bit at addresses in the above examples Di area Do area refer to MKY35 User s Manual TEP S TECHNICA Co LTD MKY33 User s Manual 2 8 Operating MKY33 for MKY37 This section describes how to operate the MKY33 for the MKY37 or a kind of satellite IC Refer to MKYS37 User s Manual before understanding this section 2 8 1 Handling of MKY37 From the viewpoint of the MKY33 operation system the MKY37 satellite IC supports only the Do and Di pins the HLS basic functions Therefore fix command 0 or 8 to the control word in the control area of the MKY33 corresponding to Satellite Address SA where MKY37 is connected No other operations are required Table 2 4 Correspondence Issued by MKY33 of MKY37 C
70. of each satellite IC 3 Check network quality 4 Detect terminal errors and recognize a poor operating environment 2 4 4 Recognition of Link Status between Satellite ICs and MKY33 This section describes the operation in 1 above 2 4 1 1 Control Area and Control Words To use the expanded functions of each satellite IC operate control words arranged in the control area from memory addresses 002H to 07FH of the MKY33 In the control area one control words are arranged one word per satellite IC The lower 1 to 6 bits of the memory addresses to specify the arrangement correspond to Satellite Address SA For example the memory address 006H is a control word corresponding to the satellite IC with SA TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 4 1 2 Control Word The control word in the control area is a 16 bit register The lower bits 0 to 3 are an area to which com mands are written Bits 4 and 5 are used to set command options The upper bits 8 to 15 are read only flag bits indicating status Figure 2 3 shows configuration of the control word Command Commands to can be set Commands 8 to Fu return to OH Number of consecutive nonresponses Unused when a response packet RP is 12 received from the satellite IC and 15 RX CHK2 Automatic command clear setting bit command execution is completed Nonresponding Flag Bits 0 to 3 are cleared to 0 regardless of the bit 4
71. ommands 3 Function of 7 Data stored in response packet in MKY33 0 0H Samples Di0 0115 pin states State of DiO to Di15 pins Di 1 1H to 7 7H Does not sample STB2 not output 0000H C1 to C7 8 8H Samples Di0 to 0115 pin states State of DiO to Di15 pins Di 9 9H to 14 EH Reference Does not sample STB2 not output 0000H C1 to C7 If any command other than command 0 or 8 is set accidentally to the target control word where the MKY37 is connected this will not affect the functions and operation of the 7 In this case the MKY37 embeds 0000H within a response packet RP to return 22 Chapter 3 MKY33 Hardware This chapter describes the MKY33 hardware such as pin assignment pin functions and I O circuit types TEP Chapter 3 MKY33 Hardware HNICA CO LTD Chapter 3 MKY33 Hardware This chapter describes the MK Y33 hardware such as pin assignment pin functions and I O circuit types Figure 3 1 shows the MK Y33 pin assignment VDD LLL VDD MA7 MWR C L MS TXD LL DAEA TXE TE p LT RXD1 4SWAP TECHNICA FH LL UWR VDD C L URD WB C L LT UCS Xi C L LL GND BPS0 C L LJ UD15 MKY33 EXC LL LL UD13 DREQ LL UD12 SCANW tj UD7 SCANR 1 UDG CHK1 LL 1
72. ot Match Number of Existing Satellite ICs This section describes a case where FS values written to the System Control Register SCR do not match the number of existing satellite ICs e Example 1 When 20 existing satellite ICs connected consecutive SAs beginning with 1 set and FS value 8 08H The satellite ICs at SA 1 to SA 8 will be scanned The satellite ICs at SA 9 to SA 20 14H will not be scanned even if the satellite IC is powered on In this case the scan time is calculated by an equation with FS 8 e Example 2 When 20 existing satellite ICs connected consecutive SAs beginning with 1 set and FS value 30 1EH The satellite ICs at SA 1 to SA 20 14H respond to a scanning and become available when the user system reads and writes data from and to each area in the mem ory map of the MKY33 In this case the scan time is calculated by an equation with FS 30 IEH When additional 10 satellite ICs at SA 21 15H to SA 30 1EH are connected they also respond to a scanning and become available when data the user system reads and writes from and to each area in the memory map of the MKY33 Ref These examples indicate that the scan time can be speeded up to the time that the user sys ReTerence 5 Aaa tem requires and satellite ICs can be hot swappble 2 3 2 4 Restrictions on Values Written to SCR and Causions The numeric values
73. output Read data hold Bus release Acknowledge delay Acknowledge enable Acknowledge margin Chapter 5 Ratings TEP S TECHNICA Co LTD 5 2 7 2 Write Timing with DAE control when connecting 8 bit bus Xi 48 MHz BW DAE UWR ACK TBCS eco TADS CS TIAD TWA TADH TAA TACK Tws TWH Pit T AD Passage of time gt The signal of the ZDAE is equivalent to the internal signal when the DAEA pin used refer to 4 4 6 7 Use of DAEA Pin Bus change setup Bus change hold DAE Setup DAE delay Address setup Address hold Access to access Internal access disable 182 x TBPS Full 354 x TBPS Half Write access Write data setup Write data hold Acknowledge delay Acknowledge enable TEP S E er e T User s Manual 5 2 8 Buffer RAM Access Timing Xi 48 MHz momo MRD MD7 MD0 BRAM to MKY33 5 gt Mec MKY33 to BRAM MWR TMRW TMWP TMWR 4 gt Symbol Memory read access Read to write Write to read Write pulse Address data setup Address data hold 5 2 9 Output Timing of CHK1 CHK2 SCANR and SCANW TrRG 1 CHK1 CHK2 TTRG
74. pTechnica Co Ltd 757 3 Shimo fujisawa Iruma shi Saitama 358 0011 TEL 04 2964 8804 FAX 04 2964 7653 http www steptechnica com info steptechnica com Hi speed Link System Center IC MKY33 User s Manual Document No STD HLS33 V6 3E Issued April 2009
75. pplication program changes the 4 When the user system program refer output state of the I O pin of the terminal ences the input state of the I O pin of the terminal read the Di area of the MKY33 memory refer to 2 2 3 Di Area 5 When the user system program changes the output state of the I O pin of the terminal write data to the Do area of the MKY33 memory refer to 2 2 2 Do Area 6 When the user system program wants to use various user support functions of the MKY33 memory Fig 1 1 Basic Operation of MKY33 and recognize the state of the HLS the user system program must have read or write access to the given memory address of the MKY33 allocated to each function Steps 1 to 3 above is equivalent to the initialization of the MKY33 Steps 4 and 5 above refer to the basic procedure for operating the MKY33 Step 6 above 18 the applied use of the MKY33 This applied use will certainly help the user system programmer and system engineer to effectively use the functions of the HLS for the user system Reference j If the user system has no need to set an initial value at the output of the I O pin of the termi nal the user can omit step 2 above At initial start up of the user system the I O pin state of the terminal is almost always at the reset default value of the satellite IC The reset default value of the satellite IC also corresponds to initializing all of the memory areas of the MK Y33 u
76. pter 4 Connecting MKY33 2 1 usar er 2 3 2 2 Areas for Basic HLS Functions 2 5 2 3 Initialization Start and Operation of MKY33 2 6 2 4 User support Functions J 2 10 2 5 Notes on Accessing 2 17 2 6 Operating MKY33 for 2 18 2 7 Operating MKY33 for 2 21 2 8 Operating MKY33 for MKY937 2 22 TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD Chapter2 MKY33 Software This chapter describes software for using the MKY33 It assumes the environment has been created enabling access to the MKY33 from the user system program through the connection between the user CPU and the MKY33 based on the descriptions in Chapter 4 Connecting MKY33 2 1 Memory Map The areas corresponding to the registers and various functions listed in Table 2 1 are all allocated in the memory map of the MKY33 Table 2 1 Memory Map of MKY33 Address value Area name Description 002H to Control control words corresponding to each satellite IC are Area for basic functions to OFFH Do When a scan is started data in the area from addresses 082H to OFFH is output fro
77. rectly and continuously from a specific satellite IC nonresponse occurs consecutively the cause may be one of the following 1 The terminal was disconnected 2 The system operating environment is extremely poor 3 The network performance limit has been reached If a specific satellite IC continuously makes no response it is likely that the cause is 1 The terminal was disconnected above However if the user system does not intend to disconnect a specific terminal a terminal error is assumed If there is no terminal error the likely causes are 2 The system operating environment is extremely poor or 3 The network performance limit has been reached above The MKY33 uses the control word to manage the number of consecutive nonresposes refer to 2 4 1 3 Recognition of Link Status 1 The RX CHK2 bit in the control word transits from 0 to 1 when the third nonresponse occurs This state is called the occurrence of CHECK 2 The MKY33 has a CHK2 pin that outputs pulse signals for a given time when CHECK 2 occurs For details of the CHK2 pin refer to 4 5 3 Output of CHK2 Pin TEP Chapter 2 MKY33 Software ST ECHNICA CO LTD 2 5 Notes on Accessing MKY33 This section describes the notes for the user system program to access the MKY33 2 5 1 Byte Access and Word Access The HLS handles data in 16 bit words If the user system uses the MKY33 connected to the user CPU via the 8 bit bus
78. rocessing automatically goes round commands 1 to 6 just once returning to command 0 each time command execution for the target satellite IC is completed Caution 1 When a link with the target satellite IC is established the ACF is cleared and the com mand is updated by the ARF Therefore if the link is incorrect clearing and updating will be carried over to the next scan 2 To execute any one of the commands 1 to 6 just once the user system program must return the command to command 0 after writing the command and a link with the target satellite IC is established This timing must be managed by the user system program In contrast using the ACF eliminates the need for the user system program to manage the timing StepTechnica recommends the ACF be used to manage timing 2 4 2 3 Commands 7 8 and F Commands 7 8 and F return to command 0 regardless of the setting condition of the ACF after a link with the target satellite IC is established once that is after command execution is completed 2 4 2 4 Commands 9 to E Commands 9 to E return to command 0 regardless of the setting condition of the ACF after a link with the target satellite IC is established once One word of the C1 to C6 areas where response data received by response packet is stored is forcibly cleared to OOOOH For example if data at address 2EEH is and BH is set to the control word at address O6EH the control word at address
79. s always updated each data in Step 3 above can be obtained continuously When 4 with SA 15 issues serial ID send request Check that the DREQ in the control word at address 01EH is 1 detection of request Set command 7 to address 01 After address 01 returns to command 0 refer to address 49EH of the C7 area to obtain data from the Serial IDentification Register SIDR of the MKY34 TEP STECHNICA 170 User s Manual 2 6 4 Note on MKY34 Serial ID Send Function The DREQ in the control word of MKY34 may become 1 after the MKY34 is turned on even when the does not use the serial ID send function for command 7 This event is the same state as the state where a rising edge signal is input to the SLD pin within the MKY34 due to abnormal events including drift in power supply to power pins after the 4 is turned on If a user system needs to deal with this terminate the serial ID send function started by the MKY34 as fol lows 1 In a user system that does not use the serial ID send function of the MKY34 issue command 7 as a dummy Also in a user system that uses the output signals of the DREQ pin described in 4 5 4 Out put of DREQ Pin write 00H to DREQR Data REQuest Reset at address 480H of the MKY33 when DREQs from all satellite ICs are cleared 2 If 1 had been set to the DREQ in the control word when the newly linked MKY34 was recognized as descr
80. ses program that gets data in the Di area sent from the satellite IC at every scan a rising edge output from the SCANR pin can be used as an interrupt trig ger to the user CPU In this way output signal of the SCANR pin indicates the read timing of the latest data Fig 4 16 Satellite address satellite identification number FS 2 FS 1 FS 1 2 3 MKY33 CP Ra Rag RK Satellite RP FS 3 FS 2 FS 1 2 Passage of time Timing when SCAN Read signal i generates Timing when E Write signal 7 generates ae If the access from the communication system to BRAM is kept waiting for the maximum time depending on the operating state of the arbiter each of SCANR and SCANW may move for 1CP 2CP for mutual intervals W Y 4 Generation intervals of SCAN Write and SCAN Read signals Sm Passage of time Same as system scan time response speed If the access from the communication system to BRAM is kept waiting for the maximum time depending on the operating state of the arbiter each of SCANR and SCANW may give or take for 1CP 2 Fig 4 16 Signals Indicating Scan Timing TEP CO User s Manual 4 5 2 Output of CHK1 Pin The MKY33 has a CHK1 CHecK 1 pin pin 82 that outputs a pulse signal that goes High for 2 x approx 82 ns at Xi 48 MHz when the RX CHK1 bit of the control word becomes 1 from
81. setting indicating nonresponse after command execution made consecutively three or more times 1 RX CHK1 15 DREQ 15 ARF Nonresponding flag Automatic read setting bit Executes commands 0 to 6 automatically Fig 2 3 Configuration of Control Word Caution Bit 15 and bit 9 in the control word is fixed at 0 Bits 7 and 6 are unused bits and remain initialized unless otherwise intentionally operated by the user system program 2 4 1 3 Recognition of Link Status 1 If the MKY33 cannot receive any response packet RP from the satellite IC after scanning the number of consecutive nonresponses is counted as the number of consecutive nonresponse in bits 12 to 14 in the con trol word If the number of consecutive nonresponse is one or more the bit 10 in the control word is 1 If the number of consecutive nonresponse is three or more the flag bit 11 RX CHK2 in the control word is 1 If the satellite IC is not connected to the network or is not turned on the number of con secutive nonresponse is 7 and thereby the RX CHK1 flag bit and 2 flag bit are 1 respectively Caution The number of consecutive nonresponse is not counted beyond 7 even if there are seven or more consecutive nonresponses TEP S TECHNICA Co LTD MKY33 User s Manual 2 4 1 4 Recognition of Link Status 2 If the MKY33 receives a response packet RP from the satellite
82. signals such as address and data including control sig nals such as chip select CS read RD and write WR output directly from the user CPU are collectivelly called the user bus Signals traveling via a bus driver or bus controller are also called the user bus 4 4 1 Data Storage Method All the registers of the MKY33 are aligned on 2 byte boundaries to optimize word access with the 16 bit bus When using byte access with the 16 bit bus register addresses vary depending on the endian of the user bus Figure 4 5 shows an example of reading the same register with a big endian user bus and a little endian user bus When the MKY33 is connected with the 16 bit bus StepTechnica recommends word access be used to access except that the user system program uses byte access after it identifies differences between register addresses 74 N SCR System Cotrol Register Little endian address 001H 000H Big endian address 000H 001H 15 14 13 12 10 9 8 7 6 5 4 3 2 1 0 511511 5 12 515 rss Fs Fst Fso Fig 4 5 Differences between Addresses Access Depending on Endian 4 4 2 Function of SWAP Pin When connecting an 8 61 user bus the MKY33 has a function SWAP pin to absorb the above address differences When the SWAP pin is Low the MKY33 inverts a signal level input to the AO pin internally recognizes the level When the SWAP pin is Low a
83. sing 00H data in step 1 above In most cases the operation in step 2 above can be omitted TEP Chapter 1 Outline of MKY33 HNICA LTD 1 3 Features of B Features of Basic Functions of as Center in HLS 1 Can be connected to 8 16 bit CPU 2 Can be connected to big little endian CPU 3 Has dynamic arbiter enabling much faster user CPU access time 4 Supports standard baud rates of 12 6 and 3 Mbps and baud rates via external clocks 5 Supports full and half duplex modes 6 Supports installation of two network types two RXD pins 7 Occupies 1280 byte area from addresses OOOH to 4FFH 8 Operates on 5 0 V single power supply and available in 0 8 mm pitch 84pins QFP E User support Functions of MKY33 and Features 1 Can recognize link status e g connection status and error occurrence between individual satellite ICs and MKY33 2 Can receive data on expanded functions except Di data data on I O input pins of each satellite IC from individual satellite ICs 3 Can check network quality 4 Can detect terminal errors and recognize a poor operating environmental TEP STECHNICA CO D MKY33 User s Manual Chapter 2 MKY33 Software This chapter describes software for using the MKY33 It assumes the environment has been created enabling access to the MKY33 from the user system program through the connection between the user CPU and the MKY33 based on the descriptions in Cha
84. ually set command 0 to address 006H and refer to the Di area at address 106H Use the interval timer etc of the user CPU to set command 1 and the ACF to address 006H regularly After address 006H returns to command 0 refer to address 186H of the area to obtain the value of the counter ch1 of the MKY34 Set command 9 to address 006H when clearing the counter chl of the MKY34 After returning to command 0 data at address 186H of the C1 area can be recognized as OOOOH as a value after clearing When always obtaining Di state of MKY34 with SA 3DH and all counter values for six channels Set 1 to the ARF in the control word at address 07AH After scan times of seven scans go by The Di state of the MKY34 can be obtained by referring to address 17AH of the Di area The value of counter ch1 of MKY34 can be obtained by referring to address of the C1 area The value of counter ch2 of the MKY34 can be obtained by referring to address 27AH of the C2 area The value of counter ch3 of the MKY34 can be obtained by referring to address 2FAH of the C3 area The value of counter ch4 of MK Y34 can be obtained by referring to address 37AH of the C4 area The value of counter ch5 of the MKY34 can be obtained by referring to address 3FAH of the C5 area The value of counter ch6 of the MKY34 can be obtained by referring to address 47AH of the C6 area Because memory corresponding to MKY34 with SA 3DH i
85. upport Functions ertet eas s cundi ni a uu C Ra 2 10 2 41 Recognition of Link Status between Satellite ICs and MKY33 2 10 2 4 4 1 Control Area and Control Words eese 2 10 2 4 1 2 Control Word nene enne 2 11 2 4 1 3 Recognition of Link Status 1 2 11 2 4 1 4 Recognition of Link Status 2 2 12 2 4 1 5 How To Recognize Link Status between Satellite ICs and MKY33 2 12 2 4 2 Receiving non Di Data Individual Data by Expanded Functions 2 13 24 21 Relationship between Commands and Response Data Storage Areas 2 13 2 4 2 2 Use of Commands 1 to 6 and Command Options 2 14 2423 Commands 7 8 and F U ausa aaa 2 14 2424 Commands 9 to 2 14 2 4 2 5 Detection of Request from Satellite 2 15 2 4 3 Checking Network Quality l 2 16 2 4 4 Detecting Terminal Errors and Recognizing Poor Environment 2 16 TEP S TECHNICA Co LTD MKY33 User s Manual 25 Notes on Accessing MKY933
86. ve any internal memory Therefore a buffer RAM BRAM must be placed near the MKY33 The pins of the MKY33 are assigned so that lines to connect the MKY33 and static RAM SRAM which serves as the BRAM should not cross on a circuit board Figure 4 1 shows the connection between the MKY33 and BRAM The user should have BRAM Center IC MKY33 E 4 BRAM Connection r Unused pins at upper addresses are kept Low 855 4 4 4 3 38 37 36 35 34 3 3 3 3 2 2 2 2 2 2 2 2 SOROOOOOA SO Fig 4 1 BRAM Connection Use on 8 bit wide SRAM with an access speed of 20 ns or faster as BRAM To connect BRAM follow the following steps 1 Fix the MS pin pin 67 of the MKY33 at High 2 Connect the to MATO pins pins 49 51 52 54 56 57 59 65 60 58 53 of the MKY33 to the AO to 10 pins of the BRAM If the memory capacity of the BRAM is large there will be unused address input pins Fix the unused pins at Low 3 Connect the MD0 to MD7 pins pins 47 45 41 40 44 46 48 50 of the MKY33 to the DO to D7 pins of the BRAM 4 Connect the MRD pin pin 55 of the MKY33 to the RD pin of the BRAM 5 Connect the MWR pin pin 66 of the MKY33 to the WR pin of the BRAM 6 Fix the CS pin of the BRAM at Low The MRD pin of the MKY33 is usually kept Low The MKY33 changes the level of the MRD pin to High to output Low level write pulse s

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