Home

Service Manual Model 181 Digital Nanovoltmeter

1. AA ARAN O U DA A 1 4 Output BOmsec cm 21 6176 a Seriate ian Output 10msec cm 2V CM usos senes WU RA A ANA ORES Integrator Output T msac cm BM Zem eder abet i whee AR EE be ra khe Se o A D Output Buffer Output 100msec cm by icnm Noisy Q413 TOAV Poem BOISE WEE I X HEN Reda d Quiet Q413 av cm D IB CIT is quar Lx xe CO OR REOR CR naci ac wr s cr aci ol E CE 8 T Noisy U401 10pV fom 50ms cm iii ORE E SATTA RE HR HA 69699 E E eee Quiet U401 10uV cm 50ms cm Yi YT GU GU GE 8 OR AA YO RET ES Nanovolt Preamp PC 526 Component Location Diagram No 303770 Rev Co Analog Board PC 529 Component Location Diagram No 30503D Rev Jo Display Board PC 530 Component Location Diagram No 305320 Rev E Digital Board PC 531 Component Location Diagram No 30576D Rev J sheet 1 of 2 Digital Board PC 531 Component Location Diagram No 30576D Rev J sheet 2 of 2 Nanovolt Preamp PC 526 Schematic Diagram No 305860 Rev A sss Analog Board PC 529 Schematic Diagram No 30585D Rev Ce Display Board PC 530 Schematic Diagram No 30584D Rev LC Digital Board PC 531 Schematic Diagram No 305830 Rev F 8 6811 62 Digital Board
2. 3 4 Performance Verification Procedure 3 5 Initial CONndItONS CRAS ES oed ih rr aes Go Pee eons ba 3 6 DC Voltage Accuracy Check 2V to 1000V 3 7 DC Voltage Accuracy Check 2mV to 200mV EA 3 8 Hi Resolution Check yep des OU teats ae Eq ae cd NG Sones u DN ED o ate See eg en DU os 3 9 Damping Function CROCK dX DE ERA S AAA 5 Rueda AN 3 10 Filter Function Check 3 11 GIS CROCE ei d aie as ee FU DNA GU ig COG HOED CU Ud 4 Theory of Operation 4 1 General a o SS ee sees apuma yuaya asa NF aka 4 2 Power Supply e noe qe o MA Qu at ae aS 4 6 IEEE Standard Interface 4 7 Digital Section FEN 2 4 8 Microcomputer Memory suse ace ERGO UR RR AO ae heed y vs 4 9 A D Converter Contra a ee ll 4 10 A D Op rati n s px ey one he eed rd der Ea deb aar bd apasqa felt da ied Oo beca edel del ids 4 11 Single Slope Phase isc ces RED Feed be ev mede
3. Allowable Reading Range Applied Voltage 1 at 18 C to 28 C 2V 1 89985 to 1 90015 20V 19 0000V 18 9979 to 19 0021 200V 190 000V 189 979 to 190 021 1000V 999 84 to 999 16 3 7 DC Voltage Accuracy Check 2mV to 200mV CAUTION Do not exceed maximum allowable input volt age instrument damage may occur Maximum allowable input is stated in the specifications 3 1 PERFORMANCE VERIFICATION G 3 2 Obtain a low thermal cable and divider box as described in Section 5 Connect the low thermal cable between the 181 and the divider box Connect the DC calibrator as shown in Fiqure 3 2A For the 2mV and 20mV ranges Allow a few minules for thermal FMF s to settle out Use Figure 3 38 for the 200mV range Set tho OC calibrator for 0000000 output Select the appropriate range as given in Table 3 3 Select the range manually by pressing the appropriate Front Panel button or select the range automatically by issuing the ap propriate command over the bus Zero the 181 by pressing the ZERO button on the Front Panel or by issuing the appropriate command over tho bus Apply the required voltage as specified in Table 3 3 Verify that the displayed reading 5 within specifications Note the reading Repeat steps D through G on the remaining mV ranges Reverse the polarity of the source and set tt to 0000000 out put Rezero the 181 by pressing the ZERO button twic
4. 1 Test point A 10V 10 Bootstrap supply for Input FETs 2 Berq Pin C 10V 10 Bootstrap supply for Input FETs 3 U402 Pin 13 0 to 15V pulses Gate drive for 0419 4 1 U402 Pin 14 Oto 15 pulses Gate drive for Q420 5 403 Pin 13 Oto 15 pulses Turns on Filter and corresponds to Step 3 Buffer whilo Q419 is on pulses 6 Drain of O413A B BV 5 Input to HI Q412 Pin 6 base Gain Amplifier 7 Drain of O413B 5 5V 4 596 input to Hl Q412 Pin base Gain Amplifier 8 0412 Pin 7 10V 5 Input 10 404 9 404 Pin 1 OV t50mv Bootstrap Common 10 4018 Pin 5 0 to 1V pulses Input of 4018 which 5 the Buffer between the 2nd and 3rd pole ot the Filter 11 U401V Pins 6 and Oto 1V pulses Output of U401B 12 U401A Pin 8 5 6V 4 1096 Bootstrap Supply to 401 13 U401A Pin 4 5 6V 10 Bootstrap Supply U401A 14 U401A Pin 3 0 to 1V pulses Input to U401A isolate probe capacitance with a 1K resistor 15 U401A Pins 1 and 2 0 to 1V Output of Nanovolt Preamp 10mV applied to the mV input terminal with 20mV range selected NOTE Ali voltages referred to Input LO with input shortened and 20mV range selected TABLE 5 7 DCV ATTENUATOR TROUBLESHOOTING Step Item Component Required Conditions Remarks Select 2V range Apply 1V K301 Pin 7 Head 1V input signal K301 is engaged Source of Q304 Read 1V input signal Select 20V range Apply 10V to input K302 P
5. ODD eric RO ER eed DYGN YU EOG O 5 12 D A Calibration aea e ae So 289 dud I ad hunu ma ILS pau er or o 5 13 Nanovolt Preamp Calibration 0 0 FE YNE ss SERES 5 14 Troubleshooting oss Vies cp petra girata Edie 5 15 Special Handling of Static Sensitive Devices 4 4 44 5 16 169800 oso cuori ers rr DIAU ET Pare Cae IR 5 17 A D Converter and Display ra ra RE KN NEEN A KEEN be EORR TRA ACER 5 18 Display A EE EE MSE EE 5 19 Nanovolt Preamp Noise Troubleshooting 4 44 44 5 20 Preamp Noise Troubleshooting Checks 5 21 Checks of Preamp ZORO cse uu u sasa Rd EAE OER RWY RUP OR x ot ded Race S QN ON nd eel 9 5 22 Buffer CROCK an cece ph hk miw asta pedi ee eee 5 23 input Currant Chock ee ee UR 24 Bootstrap Chack EDT 5 25 Low Noe Supply Check Aen REDE ss ee ee TRAN R13 hE ded RYE dew ORE ROLE UR e ES O 5 26 Current Bias Check Pc 0 0 5 27 Input FET Replacement ENEE E E 5 28 Nanovolt Preamp Troubleshooting radi REGOORRG d Ra VEA E RT 8 29 Volts Attenuator Troubleshooti
6. ne e MAINTENANCE Output Pin A crimps to the center conductor of the triax cable Pin B crimps to the inner copper shield of the triax cable The case connects to the outer shield of the triax cable FIGURE 5 2 Connector Assembly To prepare a low noise triaxial cable for either direct con nections to a source or for connector assembly the steps outlined below should be followed A Gently cut through the outer insulation without cutting the outer shield B Using a sharp point unravel the braided shield Twist the braid outer shield and thoroughly clean off traces of graphite D Gently cut through the inner insulation without cutting the inner shield E Using a sharp point unravel the braided shield F Twist the braid inner shield and thoroughly clean off all traces of graphite G Cut the center conductor to the proper length and strip the insulation off of the center conductor H Refer to Figure 5 2 and crimp the center conductor to Pin A Crimp the inner shield to Pin B Place the outer shield braid between the two washers and secure the back of the connector as shown FIGURE 5 3 Male to Male Connector Refer to Figure 5 4 for a complete picture of the Calibrator to Voltage Divider to 181 Connection 5 2 MODEL 181 CJ Connection Cable Model 181 1000 to 1 Divider FIGURE 5 4 Divider Connection 5 4 Environmental Conditions Calibr
7. 1 2 Warranty Information NEE NEL EA UNO LE MM eee ON 1 3 Manual Addenda e masa aa a aa lA 1 4 Safety Symbols and Terms ORA ERR Pu Ed EE qup 2 ACCGBSSOFIBS Saa dob bar sa deed apap fie ics ied ek Del B Qe I Beret Dub are ae 1 2 1 General a GN n DA DU On yd a byd IAN NC ydy o 1 2 2 Model 1483 Low Thermal Connection Kit 8 AG 1 2 3 Model 1484 Refill Kit 4 ina 1 2 4 Model 1485 Female Connector sus 1 2 5 Model 1486 Male Connector we 2 6 Model 1488 Sh rting Plug CW Y Y Y E Mi PEAS a E A aeos 1 2 7 Model 1503 Low Thermal Solder and Flux 12 1 2 8 Model 1506 Input Cable iet oe 1 2 9 Model 1507 Input Gablo cria reacia errada Let ed dise drid se ie 1271 2 10 Model 1815 Maintenance Kit EEEE E 2 11 Model1019 Universal Rack Mounting Kit 2 2 3 Performance Verification Y Y hr ha e aree 3 1 Generali a LEITET KE 3 2 Recommended Test Equipment ci ee RE CY UG GAU ais YY AG ADO Y S o eno 3 3 Environmental Condition8 Y RR RR ee
8. EC 4 12 Serial Parallel Conversion Isolator Control 4 13 Clock Circuit TN 22 IEEE 99 2 0 4 4 DIO 22 cede NY 4 15 D A Converter iena 4 16 Nanovolt Preamp er ha a 4 17 Low Noise Deserteur l l uyan lah Qu EE Pk a 4 18 L inaarity aNd G N WEE AS AA S Put Cp IRURE DR dge 4 19 Feedback Elements uos xd Eee ded cc a a hac ca o EA 4 20 010561 Nulla sehe rer EGRE OEI O OO FUR SO Paes FFYN 4 21 NMRR Filter and Buffer _ __ Ea a RR bs CX a wes eee ages a 4 22 DIMEGONOCUON osa a ecco aa a vda e ER EEG ARI 4 23 Inip t PROTOGION sr ow EE aa SEER FE cgit acd s 4 24 Input Mux Pumpout e da s O UR DL Fn 4 25 00181519 167 reparto e a ran edu apos aano he paaa E E ar 4 26 a MUX Z RT E erc 4 27 A D 69 67186 ioco lue er RY E Be ee nag aeg a RO A a aq 4 28 TIMING O O O Oi Na
9. 1 1 4 0MHZ Chrystal R3 183 C LT Y 102 3 84MHZ F 1 4 HC 18 t1 Nl means Page 2 of 2 of Schematic 30583D Followed by part description REPLACEABLE PARTS MODEL 181 TABLE 6 2 Replaceable Parts List PC 529 Schematic 30585D Circuit Schematic PC Board Mfr Mfr Keithley Desig Description Location Item No Location Code Desig Part No OluF 1200 Polyprop 1 4 B3 STD C 286 01 luf 50V Cer 5 C4 8121 050 651 C 237 104M lF 50 Cer 6 2 UK16 104 C 238 1 eluF 50V Cer 7 C2 UK16 104 C 238 1 luF 50V Cer 8 E4 i 8121 050 651 C 237 1 104M luF 50V Cer 9 D4 8121 050 651 C 237 1 104M luF 50V Cer 2 10 04 UK16 104 C 238 1 3600pF 500V 5 Polysty 11 03 Type SX C 138 3600pF l 5pF 50V Cer Tube 12 C3 301 000 COK0 C 282 1 5pF 159 Silicon 100V 16 04 1N4148 RF 28 Silicon 100V 10mA 17 04 1N4148 RF 28 Molex Connector 8 Pin 22 E4 09 52 3082 332 Molex Connector 12 Pin 21 E2 09 52 3122 5 332 12 Relay Sp DT 67 4 RL 6 RL 68 Relay Sp DT 88 B4 RL 68 RL 6 N Channel JFET to 92 26 C2 PF 5301 6 9 N Channel JFET to 92 27 C3 PF 5301 TG 139 N Channel JFET to 92 28 82 i PF 5301 TG 139 N Channel JFET 10 92 29 82 PF 5301 TG 139 N Channel JFET to 92 30 82 5301 6 139 N Channel JFET to 92 31 82 PF 5301 TG 139 N Channel JFET to 92 32 B2 PF 5301 TG 139 N Channel JFET to 92 33 82 PF 5301 TG 139 N Channel JFET to 92
10. FIGURE 5 6 DC Calibrator Kelvin Varley Divider and 181 5 14 TROUBLESHOOTING The troublehsooting instructions contained in this section are intended for qualified personnel having a basic understanding of analog and digital electronic principles and components used in a precision electronic test instrument Instructions have been written to assist in isolating the defective circuit or subcircuit Isolation of the specific defective component has been left to the troubleshooter MODEL 181 NOTE For instruments that are still under warranty less than 12 months since date of shipment if the instruments performance is outside of speci fications at any point contact your Keithley representalive or the factory before attempting troubleshooting or repai other than fuse replacement 5 15 Special Handling of Static Sensitive Devices CMOS and NMOS devices are designed to function at very high impedance levels for low power consumption For this reason normal static charge build up on your person or clothing can be sufficient to destroy these devices Step 1 lists the static sensitive devices in your Model 181 The remaining steps provide instruction on how to avoid damaging them when they must be removed replaced 1 Slatic sensitive devices Reference Keithley Part No Designation IC 250 U104 IC 251 U120 U121 IC 247 U117 PRO 106 00 2716 U102 PRO 107 00 2716 U103 LSI 6 U108 LSI 18 U109 LSI 28 U110 LSI 14 U131
11. She ESS RA ca Reference Supply u aao Oo do Wade va des ERE RR A Shielded ENCIORUTA cori PL e Y Connector Assembly resina pri ii ir Male to Mala Connector a serre REGE Ed KT dU er O E ii E Divider Connection esse ERE RI RE Ra Xe A EE eis WEN RR Vade xe Preamp e o ss Ee YN eg O DC Calibrator Kelvin Varley Divider and 181 0 Model 1815 Calibration Cover hh NEE EN ENNER esS 9 90 9 69 a 4801 Clock 1usec cm 2 61 eda ka RR ERRARE GR RR RUE E aa REX ORA EORR 2 4kHz Clock 2usec cm 29 0617 is oes dcc d os Ier dcc CERERI e dyn EUR REA dore bee EX quA UN a Pace d es ET Input Disable 181118 em 2M T CTIT vic caducis paean ER TU HOHER OCHO aT CINE a REG EK ERE E Input Disable SOmsec cm AV il A OD e Ga AT101 Output 10msec cm ZW GITIG oa ac GS Oe ROSE EEGEN Strobe Pulses T msec cm 2V cm A perra DUR whee Lena AT103 Output TOmsac em 2V cm_
12. Channel FET NPN Silicon NPN Silicon NPN Silicon PNP Darlington NPN silicon NPN silicon 3 3K 10 1 4W Comp 3 3K 10 1 4W Comp 3 3K 10 1 4W Comp 10K Cermet Trimmer 4 A3 F4 01 1 H1 A3 F5 06 4 4 03 6 6 H51 F1 51 H51 5 1 1 4 313 250 1517 151 MS3102A 16 115 639 1517 1517 552791 1 FAC 301 09 50 3031 SWD 100 09 70 D9 70 09 70 09 65 1031 ITE 392 2N3904 2N3904 2N3904 D45E1 2N3565 2N3565 CR25 CR25 CR25 72PMR RF 46 FU 17 08 RP 11 RP 11 2 3 BP 11 2 88 1 0 CS 377 CXS 254 CS 287 3 CH 14 CS 338 12 305754 CS 338 13 CS 338 14 CS 288 3 TG 128 TG 47 TG 47 TG 47 32469 1 TG 39 16 9 TF 99 R 76 3 3K R 76 3 3K R 76 3 3K RP 97 10K 6 3 MODEL 181 REPLACEABLE PARTS TABLE 6 1 Replaceable Parts List PC 531 Schematic 0 Circuit Schematic PC Board Mfr Mfr Keithley 0651 Description Location Item No Location Code Desig Part No 10K Cermet Trimmer 86 C4 72PMR RP 97 10K R 107 R 108 R 109 R 110 R 111 R 112 R 113 R 114 R 115 R 116 R 117 R 118 R 119 R 120 R 121 R 122 R 123 R 124 R 125 R 126 R 127 R 128 R 129 R 130 R 131 R 132 R 134 5 101 5 102 5 103 106 107 166 3K 1 1 8W MTF 87 C5 58 R 176 166 3K 108 8K 1 1 8W MTF 88 05 R 176 108 8K 4 32K 1 1 84 Fixed 89 05 MFF 1 8 R 88 4 32K 392K 1
13. Name and Telephone No Company Date List all control settings describe problem and check boxes that apply to problem DiIntermittent Ll Analog output follows display Particular range or function bad specify IEEE failure LJObvious problem on power up Batteries and fuses are OK Front panel operational All ranges or functions are bad Checked all cables Display or output circle one L Drifts Unable to zero Unstable Will not read applied input Overload L Calibration only CIC of C required Data required attach any additional sheets as necessary Show a block diagram of your measurement system including all instruments connected whether power is turned on or not Also describe signal source Where is the measurement being performed factory controlled laboratory out of doors etc What power line voltage is used Ambient Temperature _________ F Relative humidity aA Y A Other Any additional information If special modifications have been made by the user please describe Be sure to include your name and phone number on this service form
14. i 325 5 12 noe EC Y cinctes sc COMMON M ul E DENCTES ANALOG COMMON e oa scs FACTORY SELECTED visa LEE 6 7 8 gt Rem Es t DRNDIRS FACTORY SELECTED NA O 6 P 5 d 30 6 Nr A 9 a NI y SIONAL CONDITIONING amp A D CONVERTER gt VOPR reer INPL E mafT 52 v a T i MARS OR m did 3s Q Hin YSI data madd eie NTS J SCHEMATIC PC 529 B v h pom PRL 1525 4 LANALOG BOARD I CED ee a a 305850 Form ag 5 D E F G H Figure 6 6 Analog Board PC 529 Schematic Diagram Dwg No 30585D 6 23 6 24 99 5 9 9850 ON BAAQ wesbeig 368 98 25 EG Id pieog 1 0516 9 antiy 7 3 a gt g 111 32 magi Ki oen rin g3sn LON 035 SNOILVNOIS30 SNOILVNOIS30 211 3026 211 13006 1S3HOIH MUN UE AU OL Y WCH WCH GIN 958 3 3041401 x34 03 GINAY sea c rego wow lowe dere chi gt l CI KEES EH 21 Koo Y H 1 d r 0 390 t Ol pozsa NONNO U q D 2 D dp LE 111919 e 584 DMS Ces IMS 39 as x 8 abt 2 ai 5 aol E ce PES m i bona 3 F I H
15. 1 8W Fixed 90 5 MFF1 8 R 88 392K 108 8K 15 1 8W MTF 91 C5 CMP1 10 R 176 108 8K 1M 15 1 8W MTF 92 05 MFF1 8 R 176 1M 402K 15 1 8W Fixed f 93 C5 MFF 1 8 R 88 402K 10K 105 1 4W Comp 94 C2 CR25 R 76 10K 10K 10 1 4W Comp 95 D2 CR25 R 76 10K 1502 10 1 4W Comp 96 02 CR25 R 76 150 1500 10 1 4W Comp 97 02 CR25 R 76 150 1502 10 1 4W Comp 98 03 25 R 76 150 1200 10 1 4W Comp 99 04 CR25 R 76 120 1209 10 1 44 Comp 0 2 CR25 R 76 120 10K 10 1 4W Comp 101 02 CR25 R 76 10K 10M 10 1 4W Comp i 102 03 CR25 R 76 10M 4 7K 10 1 44 Com 103 E3 CR25 R 76 4 7K 4 7K 105 1 4W Comp 103 3 CR25 R 76 4 7K 222 10 1 4W Comp 105 E4 25 R 76 2 1 5K 10 1 4W Comp 106 3 CR25 R 76 1 5K IK 10 1 44 Comp 107 E3 CR25 R 76 1K 10K 10 1 4W Comp 108 E5 CR25 R 76 10K 1K 1 1 2W MTLG 109 F5 d CMF 1 4 R 94 1K Thich Film Resistor 110 F5 43101 TF 99 IM 10 1 4W Comp 111 61 CR25 R 76 1M 3 3K 10 1 4W Comp 2 113 1 CR25 R 76 3 3K Switch 119 A1 NE 15 SW 466 Switch 120 62 SW 425 Switch 121 65 SW 377 Quad 2 Input Nand 132 C 741 163 Quad Exclusive OR SE 136 2 NM7486N 116 MODEL 181 REPLACEABLE PARTS TABLE 6 1 Replaceable Parts List PC 531 Schematic 30583D Continued E E berid Description Location Item No Location Code Desig Part No U 108 6010 RAM 133 C MC6R1OL LSI 6 1 9 RD Micro Processor 8
16. 7 850 Nid I 190 8 0 3 0 335 G t H Tian j SZ 135330 Ivy I 12 6612 86122 WEEE d 000 i 27 5582 sipu d 400005 Re 000 1 JA 2 Oe l at 001 y y eoru Re C A X a D SR 2 SE bu i 4 A civo 8 agi LN i S nn TA TON TI a n ET coor Aug y 9010 A 3 A AH 600 bo iG sti FS Gh e 5079 30 5 3 20 the sio 6019 3 b ER 2 NS cord tovoj 5 1002 62t4 OfvH 12by diviso S vov oed Mp 9060 7 207 3 1 14 Nu xe ad E d Oip2 0 x6 65 X6 6r E ASH O Sipu Biby S set SODA aa Ta 134 ifidino i YI TINY mm SE O 4 299 ASI vu 131 7 O NIV IH ASI uei 011331084 305860 H 9 a a 2 g A B D E F 6 H 099900 SE zone irmJecono 2 CRM vere os 199 Gop RELEASED Es PREAMP Ta 7 8 JppEp 344 4 C309 9 16 80 7 D INHI Te 15225 remover e319 ADDED 22 1 UT CHARGE agas BED 2 9 101 e BR O 7 DIVIDER 5 Y DISPENSER N 15 O E ate R32 839 8320 R328 R340 1001 K30 468 25k ae 4 1 VINPUT uo R33 830 15 HI RSE R341 5 L30 200K 2V 100 100 i m CAL Cw 3
17. 72PMR VAR1 10 VARI 10 7 PMR 72PMR 3299W TYPEGR MFF1 R FMM 1 8 FF 1 8 6 4 TG 84 TG 84 47 29198 29198 R 247 200K R 76 47K R 76 R20K R 76 390k RP 97 200 RP 97 20 R 263 1kK R 263 4 990K 3 78 97 RP 97 2Y RP 104 200 R 2 680K R 295 19 95K R 295 46K R AB 10K R 76 2 0M TF 87 R 76 33F R 76 33K TF 85 R 88 2 74K R 88 6 49K 6 7 REPLACEABLE PARTS TABLE 6 2 Replaceable Parts List PC 529 Schematic 30585D Continued MODEL 181 Circuit E Schematic PC Board Mfr Mfr Keithley Desig Description Location Item No Location Code Desig Part No R 330 R 331 8 332 R 333 8 334 R 335 R 336 R 337 R 338 R 339 R 340 R 341 R 342 R 343 R 344 1 301 302 303 U 304 U 305 u 306 U 307 U 308 U 309 U 310 U 311 VR 301 VR 302 VR 303 VR 304 4 64K 1 1 8W Mtf 1009 10 1 4W Comp 910K 10 1 4W Comp IM 10 1 4W Comp 1M 105 1 4W Comp IM 10 1 4W Comp 2 7K 10 1 4W Comp 3 92K 1 1 8W Fixed 39 2K 1 1 8W Fixed 24 9 1 1 8W Fixed 2 5K 1 1 8W Mtf 328K 1 1 84 Mtf IM 10 1 4M Comp IM 10 1 4W Comp 100k Cermet Trimmer Operational Amplifier Operational Amplifier Operational Amplifier Voltage Reference Operational Amplifier Operational Amplifier Quad Comparator Quad Comparator Quad 2 Input Nor Gate Dual D Flip Flop Comparator 5 1V 10 Zener 6 4
18. Service Manual Model 181 Digital Nanovoltmeter 1981 Keithley Instruments Inc October 1981 Cleveland Ohio U S A Document Number 30816 KEITHLEY Model 181 Service Manual Addendum INTRODUCTION This addendum to the Model 181 Service Manual is being provided in order to supply you with the latest information in the least possible time Please incorporate these changes into the manual before servicing the Model 181 Model 262 Low Thermal Voltage Divider This addendum concerns availability of the Keithley Model 262 Low Thermal Voltage Divider which is recommended for verifying accuracy and calibrating the Model 181 mV ranges The Model 262 is a precision low thermal divider with divider ratios of 1051 1051 1041 and 105 1 A low thermal male to male output cable is included with the Model 262 Note that Model 181 veri fication and calibration procedures that use the Model 262 are included in the Model 262 Instruc tion Manual Section 2 page 2 2 Include the Model 262 Low Thermal Voltage Divider in the list of available accessories Table 3 1 page 3 1 Replace Item B in the table with the Model 262 Table 5 1 page 5 1 Replace Items B and F with the Model 262 30816 B 1 9 89 TABLE OF CONTENTS SECTION TITLE 1 General InTormatill accionaria a a 1 1 ye Ul oo 6s Ges er eR es HN uqa ES SS BG uwa a quas ws
19. 34 B3 PF 5301 TG 139 N Channel JFET to 92 35 C2 PF 5301 TG 139 PNP Silicon to 92 36 C2 2N3906 TG 84 NPN Silicon to 92 3712 2N3904 TG 47 NPN Silicon to 92 38 C3 2N3904 TG 47 N Channel FET to 92 39 C3 SF51192 TG 128 PNP Silicon to 92 40 C3 2N3906 16 84 6 6 REPLACEABLE PARTS MODEL 181 TABLE 6 2 Replaceable Parts List PC 529 Schematic 305850 Circuit Schematic PC Board Mfr Mfr Keithley Desig Description Location Item No Location Code Desig Part No PNP Silicon to 92 PNP Silicon 10 92 PNP Silicon NPN Silicon to 92 NPN Transistor Package NPN Transistor Package 200K 1 8W Fixed 47K 10 1 4W Comp 820K 10 1 4W Comp 390K 10 1 4W Com 2002 Cermet Trimmer 209 Cermet Trimmer 1K 1 1 104 Mtf 4 99K 1 1 10W Mtf Thick Film Resistor 20K Cermet Trimmer 2K Cermet Trimmer 1000 Cermet Trimmer 680K 10 1W Comp 19 95K 1 1 84 WW Factory Selected Factory Selected 46K 1 1 8W WW 10K 1 1 8W MTLF 2 2M 10 1 4W Comp Thick Film Resistor 33K 10 1 4W Comp 33K 10 1 4W Comp Thick Film Resistor 2 74K 1 1 8W Mtf 6 49K 1 1 8W Mtf 41 C3 42 D3 43 03 44 02 45 03 46 04 53 83 54 82 56 83 59 C2 61 B3 62 N3 63 C3 64 C3 65 83 66 B4 67 R4 68 C4 69 B4 70 4 71 C4 72 C4 73 C4 74 03 75 03 76 02 77 78 C2 79 03 80 4 81 D4 2N3906 2N3906 2N3906 2N 39n4 MS 281 CR25 CR25 CR25 72PMR
20. 5 Zener 6 2V Zener 6 2 0 Zener 82 D4 83 04 116 B2 117 B2 118 82 119 82 120 04 121 04 122 04 123 04 124 04 125 04 126 R2 127 B2 128 R2 91 C3 92 C3 93 03 94 C4 95 C4 96 D3 97 02 98 D2 99 02 100 03 101 04 105 82 106 3 107 53 108 3 MFF 1 8 CR25 CR25 CR25 CR25 CR25 CR25 MEF1 8 MFF1 8 MFF1 8 MEF 1 8 CR25 CR25 3686 F 1 104 LF351N LM339 LM339 741502 MC74574N LM 311 1N751 1N4571 1N827A 1N827A R 88 4 64K R 76 100 R 76 910K R 76 1M R 76 1M R 76 1M R 76 2 7K R 88 3 92K R 88 39 2K 24 OK R 176 2 5K R 176 328K R 76 1M R 76 1M RP 97 100K 30167 30163A 30154A 29996n 30154A 1C 176 IC 219 IC 219 C 179 IC 216 1 3 0 59 07 60 07 8 07 48 MODEL 181 Replaceable Parts List PC 526 Schematic 30586D Circuit Desig Description AUF 16V CerD AuF 16V CerD 047uF 100V Polyprop 5uF 50V Polycarb 510pF 500V Polysty 047uF 100V Polyprop 047uF 100V Polyprop 015uF 200 Polycarb 015uF 200V Polycarb 10uF 20V Tan 10uF 20V Tan 10uF 20V Tan 10uF 20V Tan 1uF 16V Ceramic 1uF 16V Ceramic 22pF 500V Polysty 5000pF 500V Polysty Diode Diode Diode Diode Current Regulator Diode Current Regulator 12 Pin Connector Relay NPN Silicon PNP Silicon N Channel J FET N Channel J FET N Channel FET TABLE 6 3 REPLACEABLE PARTS Part No C 238 1 C 238 1 C 306 0
21. Digit and Annunciator Drive 10 11 12 13 High Enable 6 U201 Pin 1 13 9 7 Digit and Annunciator Drive Output Digit Drivers 17202 Pin 1 13 9 7 Low Enabled 7 Q201 208 5 Volts on Emilter Segment Drivers 8 35202 20 Segment Drive Output of seqment Pin 1 2 4 6 7 High Enabled drivers Colloctors of 9 10 0202 0208 9 J1008 Pin 13 TTL level Digital Pulses Press 5201 5207 5208 10 41008 Pin 12 TTL level Digital Pulses Press S202 S206 S209 11 1008 Pin 11 T TL level Digital Pulses Press S203 S205 S210 12 41008 Pin 10 TTL level Digital Pulses Press 5204 5211 MODEL 181 FIGURE 5 8 480kHz Clock 1 896 6 2V cm U309A Pin 3 FIGURE 5 9 2 4kHz Clock 2usec cm 2V cm U105 Pin 1 FIGURE 5 10 Input Disable 10msec cm 2V cm U127B Pin 5 MAINTENANCE ee w wa ks FIGURE 5 11 Input Disable 50msec cm 2V cm J1010 Pin 2 FIGURE 5 12 AT101 Output 10msec cm 2V cm AT101 Pin 4 ki m m L sv AJ FIGURE 5 13 Strobe Pulses 10msec cm 2V cm AT102 Output Pin 4 5 9 MAINTENANCE MODEL 181 FIGURE 5 14 AT103 Output 10ms c cm 2V cm FIGURE 5 17 Integrator Output 10msec cm 5V cm 103 Pin 4 306 Pin 6 FIGURE 5 15 AT104 Output 50msec cm 2V cm FIGURE 5 18 A D Output Buffer Output 100msec cm 5V cm AT104 Pin 4 emitter of Q313 LELLE TE A EE ERN FIGURE 5 16 V F Output 1
22. RS 85 DI 855 8 A2 RS2 82 52 5205 5 82 ke 2 Faedo s 2853 53129 5 Belo pa Call qu 5 RESET Q RESET DAC Zoe 8518 5 ce 3 lee Ae ra DAC cs 05 ER 05 B6 5 q ru FC DT logic S lt IFC EA qnd 9658 LIE i 24 4 MOTHER 66468 Pa Jg BOARD 5 d PASE2 RIGO 335 7 DZ og sna es Zing 1 5i TEES 3 t 2 52 633 A 6 5 fe se 5 05 2 La RFC 06 06 2 L 57 met D 0 ALL des DIVA VDC ASE 4 2 BUS COMMON R L RESIRTOR WALES ARE N OHMS UNLESS MERWISE MARKET M MEGOHWS LQ CAPACITOR VALUES ARE IN MICROFARAOS MISHEST SCHEMAT C UNLESS OTHERWISE MARKED pF PICOFARADS BU y DESIGNATIONS ED 8 oan iar eo i NY ut TES SONAL COMMON A07 AD pue CRIO 12 F 62 ol DENCTES DIGITAL COMMON V 2 S BE WEE AT MU NOSE SCHEMATIC DESIGNATIONS Ny DENCTES ANALOG COMMON i NOT USED LENOTES FRONT PANEL CONTROL e Me PIODE 5 PUI _ ADO Tory OSS ENOTES REAR PANEL MOUNTING aic Twio2 wik ICR riet INTERNAL ADJUST SRO JY RO wp en ES Fa YMI E iN ATES C ca ei SENOTES CASS SO CONNECTION SECH SCHEMATIC PC SU POWER SUPPY IEEE 30583D SHEET TOF 2 2 HEN run RETIREES Fara ata ERAS Figure 6 8 Digital Board PC 531 Schematic Diagram Dwg No 305830 6 27
23. Wirewound Low Thermal Construction N A 1000 01 tOppm C Wirewound Low Therma Construction Model 1483 Low Thermal Construction Kit Refer to Figure 5 1 for recommended construction of the Voltage Divider The connections on the Model 1485 tow Thermal Female Connector should be clean before being camped The connections on the binding posts should be clean and soldered with Cadmium solder The camp cos nectors and the Cadmium solder are provided im the Mode 1483 Low Thermal Connection Kit insulating foam is to be wrapped around the resistors to impede ar currents which could cause thermal EMFs The connection from the 181 to the divider is made by a low thermal cable terminated by tei 1486s Male Low Thermal Connectors This cable will aise have to be constructed Refer to Figure 5 2 arid 5 3 The following materials are required for construction of specus cables Model 1482 Low Thermal Input Cable Model 1486 Male Low Thermal Connector 2 WA 29 Washer 119166 Strain relief com TABLE 5 1 RECOMMENDED TEST EQUIPMENT Item Description Specifications Mf Model A DC Calibrator 1 9V 19V 190V 1000V Fluke 332D Voltage Divider DMM Kelvin Varley Divider Low Thermal input Cable C D E Maintenance Kit F G 001 10ppm 01 10ppm Oscilloscope 2mC cm Tektronix 7603 003 1d Racal Dana 5900 Keithley 1815 720A Keithley 1481 Ithaco 1201 H Low Noise Preamplifier 5 1
24. use the following procedure A Select 2V range B From a zero reading apply a Full Scale signal and observo the settling time C Press tho DAMPING button to turn the function on From a zero reading apply a Full Scale signal and observe settling time D The settling lime wil be longer with DAMPING on This difference will reveal that the DAMPING function is operating properly 3 10 FILTER Function Check Upon Power up the Filter function is disabled Pl To check to see that the FILTER is operating properly use the following procedure A Select 2V range B Press the DAMPING button and then from a zero reading apply a Full Scale signal Observe the settling time C With DAMPING on press the FILTER button From a zero reading apply a Full Scale signal Observe the settling lime D The settling time will be longer with the FILTER enabled This difference reveals that the FILTER is operating properly This procedure will only work when DAMPING is on 3 11 NOISE Check Noise is defined on lowest range as peak to peak excursion over a period of two minutes tested after warmup while the input is shorted with the Model 1488 MODEL 181 PERFORMANCE VERIFICATION Procedure for checking noise D Depress Filter button A Short the mV input with a Model 1488 Low Thermal Short E Depress ZERO button Observe the mahest and iowest B Select the 2mV range readings for a penod of 2 minutes The difference sto C
25. 0 00596 1 54 0 01 2d 5 017 RANGE RESOLUTION CMRR 16068 on mV ranges 140dB on V ranges at DC and line fre quency 50 or 80Hz 1kQ unbalance IEEE 488 BUS IMPLEMENTATION Multiline Commands DCL LLO SDC GET Uniline Commands IFC REN EOI SRO ATN PROGRAMMABLE PARAMETERS Front Panel Controls Range Filter Zero Damping Hi Resolution Internal Parameters SRQ Response Trigger Modes Data Terminators ADDRESS MODES Talk Only and Addressable TRIGGER MODES One Shot Updates output buffer once at first valid conversion after trigger on TALK and or GET Continuous Updates output buffer at all valid conversions after trigger GENERAL NOISE Less than 30nV p p on lowest range with Filter on INPUT CAPACITANCE 5000pF on mV ranges SETTLING TIME 0 55 to within 25 digits of final reading with Filter on Damping off FILTER 3 pole digital RC 0 8 1 or 2 seconds depending on range CONVERSION SPEED 4 readings second DISPLAY Seven 13mm 0 5 in LED digits with appropriate decimal point and polarity OVERLOAD INDICATION Display indicates polarity and OFLO ANALOG OUTPUT drett States dU Kingdom and West Germany as well as ir the Check the sido front cover of this manual fo 1 3 Manual Addenda Improvements or changes to the instrument wh ch occur after the printing of this manual will be explained on a manual addendum 1 4 Safety Symbols and Terms Thi
26. 18 is the A D Buffer Output Waveform The 181 is on the 20mV range with 10mV applied to the input This waveform begins with a 200msec delay and then a signal in tegrate takes place After the signal integrate the preamp zero takes place Then a 2V cal is performed When the 2V cal is complete another 200msec delay occurs The 200msec delays are to allow sufficient time for the preamp to settle After the delay and another preamp zero an A D zero takes place Notice the two zeroes are different in value Another 200msec delay occurs and the whole phase starts over again 5 18 Display Board The Display Board circuitry has two drive circuits that operate the display The segment drive circuitry 0201 thru 0208 is connected to all displays in parallel The digit drive circuitry enables all segments of a single digit one at a time All signals are referenced to digital common Check these circuits per Table 5 5 5 19 Nanovolt Preamp Noise Troubleshooting Begin the troubleshooting procedure by checking the 2V range If this range is noisy the A D or digital circuitry are most likely at fault If the 2V range is quiet the nanovolt preamp is most likely at fault Components suspected of generating noise should be checked That is the noise level of the device should be measured and verified as out of spec before replacing the device MODEL 181 For examining the noise level of the devices utilize the Ithaco Model 1201 Low Noise Preamp
27. 530 Schemate Na 30584D Fausse 67 D Digital Board PC 531 Schematic No 30583D tapia h 8 Replaceable Parts List PC 531 Schematic 305630 Opto Isolator Opto Isolator Opto Isolator Opto Isolator Opto Isolator 10 16V CerD luF 16V CerD lut 16V CerD luF 16V CerD 0068uF 500V CerD 22pF 1000V CerD 22pF 1000V CerD luF 16V CerD luF 16V CerD 390pF 500V CerD Lut 16V CerD 195 02 196 02 197 03 198 03 199 03 4 A3 5 A2 6 B2 7 62 3 C2 9 C2 10 C2 11 B2 12 B2 13 4 14 02 MOC5005 1C 292 M0C5005 C 292 MOC5005 1C 292 MOC 5005 292 5 1C 292 UK16 104 C 238 UK16 104 C 238 UK16 104 C 238 UK16 104 C 238 5HGAD68 C 22 0068 00220 C 64 22pF 0020 C 64 22pF UK16 104 C 238 1 UK16 104 C 238 1 00391 C 22 390pF UK16 104 238 1 REPLACEABLE PARTS Circuit Schematic PC Board Mfr Mfr Desig Description Location Item No Location Code Desig TABLE 6 1 Replaceable Parts List PC 531 Schematic 305830 Continued luF 16V CerD lut 16 CerD luF 16V CerD luF 16V CerD lut 16V CerD lut 16V CerD luF 16V CerD 68pF 1000V CerD 47pF 1000V CerD luF 16V CerD luF 16V CerD 6 8uF 25V Electro 1500uF 25V Electro 1500uF 25V Electro 15004F 25V Electro 6 8yF 25V Electro 6 8uF 25V Electro 2200pF 500V CerD 10 000yF 10V Electro 0O2uF 500V CerD 6 8yF 25V Electro 6 8uF 25V Electro 100pF 35V Electro 100u
28. 6 77509 u u EET CR ku m Model 1506 AAA TT Modal l AAA A E eet Model Bs PPP Model Ello EE cer Seen IS ene arsed Sach oH wake Hie DCV Performance Check RYNG A R ce qb De 2mV and 20mV Performance Check cessere pe a ia ta 200 Millivolt Performance Check E na SS Lat Enable weis i Siem ped id Re SO RURSUS IERI A by ei Da o A D Control Logic SE qued Charge Balance Timing E GUDD DUE us Single Slope Timing Charge Balance Single Slope Phase Simplified Nanovolt Preamp Schematic loppa NVPA Showing Filter amp Drift Correction er Preamp A D Timing REY RR RR pera ra Pai E ed gu V Range A D TIMING 2 u uy ERE w YA e 2727 071 PER Transconductance Amplifier iene ia tiri Lea e ei Simplified A D Diagram a E 111186983885
29. C307 328K 0316 C205 ee COMMON caol P 4 n Ea LO 1 SIGNAL COMMON ae R330 2 P 88 uso4 amp Vy REA chy 2 LO 1995 i L e 464 45y A D COMMON 302 SEE SCHEMATIC LO 108 15 wo 2 y NE A2 C302 6 cw Y VO io Y SSE V MD IO MEG R314 NS 5 0328 Q32IA 2 ADJ 20K BOOTSTRAPPED JOIO 3216 0 e 0 2 INPUT BUFFER x ae 3 up o i 20v Das Osy id 40 Q ADI a D R3278 O LOK R327J H 5 IK 32 p 40 cw TRANSCONDUC TANCE 9 200v R309 AMP N w ADJ 200 sos dan 3 Q320A u O R323 3 eh e JI009 8 7 cw 0957 O COMPARATOR R3IO UT Ady 20 TO 89 4 HIGHEST SCHEMATIC NY DESIGNATIONS USED 4 SCHEMATIC JIOIO DESIGNATIONS NOT USED ZERO 1 507 A4 4 gt r 6 R324F J003 THRU JI008 Pase iod asa R308 3319 2 7K CLOCK 8 5 f mere 4 2 R326 7 4BOKHZ Em STES 5 33K NOTES by 5 s 1200v 19 U3080 i ALL RESISTOR VALUES ARE IN OHMS UNLESS MARKED 14 Mas OTHERWISE K KILOHMS MEGOHMS lc 2 8 7270 0 30K 2 ALL CAPACITOR VALUES ARE IN MICROFARADS UNLESS DISABLE MARKED OTHERWISE pt PICOFARADS l 204 20v U308C 7 ES A Jv 7 4 3244 3 D DENOTES FRONT PANEL LOCAT ON SEE a mimi tn ai 30K 4 OB CENTIES NTERNAL CONTROL ne PREAMP v 308A 5 X DENOTES SIGNAL COMMON K s 56
30. Calibration Covor and two Extender Cables The Calibration Cover is necessary to stabilize internal temperature when calibrating the Model 181 It also can be used to locate adjustments quickly and easily The two extender cables permit easy accoss lo the individual PC boards contained in the Model 181 Figure 2 8 Model 1815 MODEL 181 2 11 Model 1019 Universal Rack Mount Kit Tho Model 1019 is a single dual rack mounting kit for the Modol 181 The overall dimensions are 5 inches 133mm high and 19 inches 483mm wide Figure 2 9 Model 1019 MODEL 181 PERFORMANCE VERIFICATION Section 3 Performance Verification 3 1 GENERAL Performance verification may be done upon receipt of the instrument to ensure that no damage or misadjustment has occurred during transit Verification can also be performed whenever there Is question of the instrument s accuracy and following calibration if so desired NOTE For instruments that are still under warranty less than 12 months since date of shipment contact your Keithley representative or the factory immediately if the instrument falls outside of specifications as determined by the Performance Verification in paragraph 3 6 3 2 Recommended Test Equipment Recommended test equipment for performance verification 1s listed in Table 3 1 Alternate test equipment can be used However if the accuracy of the alternate test equipment is not at least three times
31. O 2 4 HE coro OU ior gt EY Cem A 50 0 DE LE 57 mec oF 66 77 SVM OE Pa 2 SM DEI GE gei TE Cy Gc EGEY 22 7 wR gagonw3ay 8 38 iV NrOmivy BGE f Os20y rs dH v 30752 98 SY OS w ASAE f 2303 4213727 ERR 23232 4 lt DB NON E COT 5 EM TASER n oL VC ow SI ITA Sw TEG YNN y RI sym s SYR P Sum Gi WR T9 TAC 2 W NM 5 OL Quer SET NS EE OZESGOE ON Bg uei6eig uone207 iuauodwo OES Id 809 Aejdsi Ca 310Bt4 6 17 Da MA m Sen T E wav SESE b bw 1674 Win 0 Lara LU Na Lei NIMC SNA ep AE Ha th ALEA d SEMAS GL FMS NOt 17 Q SAIL ONY S Ad SVM OA Lew ELE 8 9 BS J ree Rc cp a tes Bee Othe eU _ i gt ph fu SED Fem cb th LA RI 516323 SEE Pane 2 EREN larson Y peral sae A 2 E 1 CL Pos P ud ie Fia NOT s EOD WS TA A HDN f SO Mia KEP NUT 25 i SiO 2 i23 run lt D mu Te Te Cm ua En O Lo oa T Sect Te En
32. PC 531 Schematic Diagram No 30583D Rev F sheet 2of2 hi LIST OF TABLES TITLE PAGE Recommended Test Equipment for Performance Verification DC Voltage Performance Check 2V to 1000V L DC Voltage Performance Check 2mV to 200mV Microcomputer Memory Map Gaim E xus u esa adea ex exer SASS EA PEE XXe E ARR quic cd 6 Recommended Test Equipment re yy EN EN ANN AN GR DU AAA RR ACER REA EDU dor Pa voltage Divider Parts LIS MCCC EENEG M Power Supply 0 196148 way ud arde VEI HY NOD d A D CORVOROT edere pr TAL g kt LIS e DITER A Ron e RIA NA WAD AO bib dod 4 Qa R L Preamp Troubleshooting E ee a ee DCV Attenuator Troubleshooting aa Replaceable Parts List PC 531 Schematic 30583D Replaceable Parts List PC 529 Schematic 30585D Replaceable Parts List PC 526 Schematic 30586D Replaceable Mechanical Parts bw NN GU n MODEL 181 GENERAL INFORMATION Section 1
33. Since this differential is auto zeroed out by drift correction circuitry which will be discussed later and the A D itis only necessary to make suro the offset does not drive the amplifier output beyond its 12V operating range The largest concern is the 2mV range where the gain is equal to 1000 On this range it can be seen 25mV x 1000 25V which is well beyond the possible range of the amplifier Using VR and a pair of film resistors R423 and R424 an effective conslant current null is provided The ratio formed by R423 and R424 x 2VR provides the voltage This voltage is con stant with respect to the gate of O413A because of the bootstrap R417 provides the current and is selected to provide 2bmV offset correction range 4 21 NMRR Filter and Buffer Additional NMRR is provided in the preamp using a three pole cascaded filter As can be seen from Figure 4 7 the three poles are provided by three RC networks By effectively switching the fillers in and out the following sequence of events occur When FFT 0419 turns on so does 0405 0407 and 0409 The filters are now in the circuit and the input signal is now filtered and amplified The filter settling time is equal to 200 milliseconds After the 200 millisecond interval the signal integration is done by the A D FET 0420 now turns on and FETs 0419 0405 0407 and 0408 turn off Since no filter is in while the amplifier looks at zero settling time depends on amplifie
34. a current which goes to the integrator when reguested Figure 4 11 shows how the circuit operates The transconduc tance amplifier provides excellent current linearity between phases of lo lott hi FIGURE 4 11 Transconductance Amplifier Vin Rin Thus when Vin Vin max losas O pos full scales 16 made ay Van 0 loft zero Vin Vin Vin max fo lolf R as 2 date Hrs tos i ATI 4 9 OL f Single Slope V Comparator Iss Ica Comparator V Output Single Input Mux Input Buffer RS eS Ce Bs Transconductance 7 ir 00 0 74874 4 7K es e erar Te C V Charge i VI C US Balance Input es loFFSET Diable Output I d Ps E I O Lines From FIGURE 4 10 Simplified A D Diagram NOILVH3dO JO AHO3HL LGL TAJON MODEL 181 4 31 Integrator The integrator has been designed to guard against the most common problems associated with high speed integrator operation Active integrators have two major problems which limit their high speed performance the crossover distortion and the gain bandwidth of the integrator amplifier These ef fects can be seen by looking at the integrator model in Figure 4 12 When a voltage step appears at Vin the amplifier witl not respond immediately and C will initially be a short circuit Then y Ho e o lo Ro 4 Rin as shown in the equation the effect is that the wrong current will be
35. a pe IA JA OM Vine AS weu Wee A kg oa y C 41 E i e e y CEP UNE 0 gt E nic 275 ilo ARA mi B e E SOLER Z sn Ie E 5 St D J DAL zr gt Kaze i ms lease nis x x x Liar En EN te D NM zo O MR d E 4 2 w E te Role bes Cam lt 52 ket d Aaa Suha M 2 Figure 6 1 Nanovolt Preamp PC 526 Component Location Diagram Dwg No 303770 Q 0S80 ON BMG ueiBerq uone2907 3 09 0 6 G Od peog Bojeuy 2 9 9 8144 05 7 7 no 2 OW 7 OEC WO SW YD Wie e cer LL VA ad ST EE Les _ sedl Loess 55 i09 e 5 25177 3 ed Ke 3x3 s ER Eege WED E E u 5 F r UN l 5 vC 5255 CS E DET J 1 riet ri Mejia TRI StS Sas 82 91 i reso Se e O A A KS PARA Aea Alie tin arl a UEN 4 ah 22 x 3 2 au FOSS 7 EE BE gt i TUEZ7O S2 7 FEE IGI li PETITE NET ENTM _ 7 s KI TREN CD TYEE REH ET A EAE 7 po 10 al 4 18 1 i 3 JJ OW la ON Lava wall r d al n
36. applied to the capacitor until the amplifier recovers It can also be seen that a bipolar input amplifier was used for the integrator charge could be conducted away from the capacitor and cause significant errors To guard against these problems the 181 uses a bias resistor on the integrator output to 15V to keep Ro small into the MHz region and all inputs to the integrator are current sources A FET input op amp is used which allows a few volts to appear on the summing junc tion with no loss in charge FIGURE 4 12 Integrator 2 Output THEORY OF OPERATION 4 32 Reference Supply The reference supply is shown in Figure 4 13 The A D was designed for low noise and linearity This means that accuracy and stability must be provided by the reference sappiy Tre heart of the reference supply circuit is a buned layer zenes diode with an on board heater The zener is used because of its stability low nose low dynamic resistance and iow temperature coefficient qualities tis driven by a constant i rent developed by U305 Since the zener is well reguiated ctas immuned to power supply variations Super stable tracking resistors are used in the reference to provide a very stahle 2 volt reference Reference Divider FIGURE 4 13 Reference Supply 4 11 4 12 MODEL 181 Section 5 1 GENERAL This section contains information necessary to maintain the Model 181 Adjustment Calibration troubleshooting and f
37. better than the instrument specifications additional allowances must be made in the readings obtained TABLE 3 1 RECOMMENDED TEST EQUIPMENT FOR PERFORMANCE VERIFICATION pecifications _ 001 10667 007 Description __ DC Calibrator Fluke Fluke Kelvin Divider Low Thermal Cable Low Thermal FMFs 6 3 3 Environmental Conditions All measurements should be made at an ambient temperature within the range of 18 C to 28 C 65 F to 82 F and a relative humidity of less than 80 3 4 Performance Verification Procedure Use the following procedure to verify the basic accuracy of the Model 181 for DC voltage If the instrument is out of specification at any point perform a complete calibration as described in the calibration section unless the instrument 15 still under warranty as noted above CAUTION The performance verification and all service infor mation is intended for qualified personnel using accurate and reliable test equipment WARNING Some procedures require the use of high voltage Take care to prevent contact with live circuits which could cause electrical shock resulting in injury or death 3 5 Initial Conditions Before beginning the verification procedure the instrument must meet the following conditions If the instrument has been subjected to extremes of temperature allow sufficient time for internal temperatures to reach environmental conditions specified Typically it take
38. ott cg and enabling Dj What has happened is that 1 8 was turned on for one clock cycle 2 microseconds and then was turned off The earliest it can turn on again is One clock later Each time Ica is turned on the counter is incremented by Q2 The input is disabled after precisely 16 67 milliseconds If this time interval there were 8000 480 4 clock cycles and the maximum number of times Q2 could qo high and be counted was 4000 This concludes the Charge Balance Phase 4 11 Single Slope Phase At the end of the Charge Balance Phase the Output of ire cr tegrator is resting at some positive voltage There the Sire Slope Enable line is energized This causes 1 to hos era tne integrator The single slope comparator outpat also pos tye and it will not switch until the integrator output crosses vere 3 84MHz clock is counted from when the Single Slope Enable is energized until the Single Slope Comparator changes state Vo crosses zero When this occurs Single Slope Enable is shut off and the counting process is stopped Because of the ratios of 14 4 and the clock ratios one charge balance count is weighted as 1024 single slope ceo nts This gives a composite count of 4 096 million 4 12 Serial Parallel Conversion Isolator Control One of the many functions of the VIA is to transter data tro the digital side to the analog side of the opticabisulators Wit the strobe line PB7 Hi a data transfer starts One tiyte of data 15 s
39. volts and R421 R422 and R413 scale the output voltages VR to the desired 10 volt level By providing the attenuation above 0 3Hz C412 and C413 pre vent amplification of U405 s input voltage noise 404 bootstraps these supplies to improve amplifier linearity The noise contribution from reference zeners VR403 and VR404 is Supermatch Amplifier 15 Low Noise High Impedance Wm E a c p Input Amplifier ea J C408 l Output 8418 Amptifier i R429 10v 6 5 6V j 5 6 2 Output i i Gain 75 000 L a f m al on l i 10 7 i i NZ XZ Offset Nu Min Loop Gain 175 000 Low Noise Bipolar Suppbes i E lea e I s Gv FIGURE A 6 Simplified Nanovolt Preamp Schematic 181 1300WN NOILVH3dO 40 AYOSHL THEORY OF OPERATION negligible The bootstrap supply is decoupled from the input via C414 C415 R425 and R426 Rejection from the 15V sup plies is critical as well Therefore current regulators CR406 and CR407 are a necessity Rp gt 1M chm since Rs
40. zero conversion C405 prevents preamp slewing bet ween signal and zero FET switching from affecting the charge on C404 4 23 Input Protection CR402 and CR403 prevent input stage foldover which would severely drop input impedance during overload This also prevents long recovery time caused by unbalancing power dissipation between O413A and O413B 0410 and 0411 pre vent the amplifier from getting lost during a range change or severe overload by clamping the summing junction at 1V CR404 CR405 R427 and R428 provide a ground referenced 0 7V threshold for the protection circuitry High impedance gt 10 ohm is not affected by the protection circuit for input voltages less than 1 volt because of low leakage FET pair 0415 and 0416 However for inputs greater than 1 voit the input voltage is clamped and current limit is provided through R436 4 24 Input Mux Pumpout Input Mux spikes caused by gate to channel capacitance of the input mux FETs 10419 Q420 are attenuated tu applying an approximately equal but opposite polarity spike C416 R403 R404 R412 and 0408 provide this spike cance lation C417 acts to filter the high frequency components ot the pumpout R412 allows adjustment to less than 2 milivirts p p across C4 7 with a 10 meg shunt across the input 4 25 FET Multiplexing Input and filter FET multiplexing is accomplished using the open collector comparators U402 and U403 reference for the comparators is provi
41. 0msec cm 2V cm U126 Pin 13 5 10 MODEL 181 C Setting Offset Null 1 Remove R423 and R424 2 Place a 20KQ potentiometer across the three Berg pins on the preamp board Connect the wiper of the pot to the cen ter Berg pin pin B Connect the other pins of the pot to the other two Berg pins pins A B 3 Select the 2mV range and short the input 4 Adjust the 20KQ potentiometer until the U404 Pin 6 is less than 0 5V Measure the resistance of the potentiometer from the wiper to both ends 5 Replace R423 and R424 with the nearest value 1 film re sistors as measured on the potentiometer 5 22 Buffer Check A Select the 200mV range Short the input B Monitor UAOT Pin 1 and verify the noise level as less than 20 aV p p If the noise level is greater than 200 p p replace U401 Refer to Figures 5 19 and 5 20 for noise level The output of U401 is sensitive to probe capacitance Isolate with a 1K resistor If U401 is quiet proceed to Paragraph 5 23 FIGURE 5 20 Quiet 0413 10xV cm 50ms cm MAINTENANCE 5 23 Input Current Check Perform the following checks at less than 8096 relative humidity A Select the 20mV range Instali a shielded 1MQ resistor across the input Select the following functions Damping In Filter in Hi Res off B Check the display for less than 500 digits If the reading is out of spec note whether it is positive or negative C If the display is negative and greater than 500
42. 1 Pin 3 Referenced to the emitter of Q313 Remarks Turn on Power and select 20mV range Short the mV inputs and V 0 0000 5 digits 0 0000 Hi Res Engaged Refer to Table 5 2 5 6V 5 6V 10V 10 2 Cal BAM 5 TTL level square wave at 3 84MHz Rate TTL level square wave at 480kHz rate Refer to Figure 5 8 TTL level pulses at 2 4kHz rate Refer to Figure 5 9 15V See Waveform of Figure 5 18 2 49V 7 175mV See Waveform of Figure 5 17 TTL level pulses Refer to Figure 5 10 TTL level pulses Refer to Figure 5 16 DV 796 350mV TTL level pulses Refer to Figure 5 12 TTL level pulses Refer to Figure 5 13 TTL level pulses Refer to Figure 5 14 TTL level pulses Refer to Figure 5 15 voltage and waveform measurements are referenc ed to input LO unless otherwise noted Bootstrap Supply Bootstrap Supply Output of Reference Supply 2 if Calibrated measure with a high impedance voltmeter 10 3 84MH2 Clock 480kHz Clock 2 4kHz Clock Gate Drive ot Q309 A D Buffer Output with 10mV apphed Transconductance Amp GAMP bias Integrator Output Waveform input Disable V F pulses to Counter Charge Dispenser Bias Charge Balance Single Slope Waveform at At101 Reference to Analag Out LO Strobe pulses of AT102 Data to U120 Ciock pulses for shift registers U120 and U121 5 7 MAINTENANCE Figure 5
43. 118 all bits OM yields 10V output at 8 4 4 VR102 is configured as a reference for the D A circuit R107 R108 R109 and U119B scale the reference to 10V R107 provides an adjustment range on the 10V reference which calibrates positive Full Scale An offset for U119A is provided by R111 R112 R106 and VR102 This offset plus R113 and R114 provide the scaling which translates the OV to 10V swing output of 1118 to the desired 2 to 4 2V swing R106 calibrates negative full scale by altering the offset voltage on U119A Capacitor C137 filters the output and prevents it from appear ing like a staircase waveform VR103 VR104 and R130 are configured as protection in case the analog output terminals should be momentarily shorted together or tied to greater than 30V 4 16 Nanovolt Preamp During the theory of operation of the Nanovolt preamp it will be helpful to refer to the Schematic Diagram 30856D 4 17 Low Noise Design One of the major reasons for utilizing a differential input stage is the Supply Noise Rejection Without proper matching power supply noise would have to be on a submicrovolt level which would be impossible at low frequencies Both bias cur rent noise and voltage noise are the major components of Supply Noise In order to minimize voltage noise a pair of low noise bipolar supplies are generated on the Nanovolt Preamp board using U405 and its associated components VR403 and VR404 serve as references 6 2
44. 2 134 C3 MCRAn2P 1 18 U 110 6522 PIA 135 03 SYPRR LSI 2R U 116 Latch Tristate Output c 14 4 7415374 16 7 117 Multiplyinq DAC B5 147 84 7 41 16 247 U 118 FET Input Op Amp C5 143 C4 LF351AN 10 248 119 FET Input Op Amp DS 194 04 LF 5 10 246 U 120 8 Rit Shift Reqistor Gal 145 E 4n94 10 261 U 121 A Rit Shift Reqistor G4 146 E anaa 10 26 U 122 Dual D Flip Flop n3 147 2 741574 144 U 123 Dual 4 it Counter 62 GAl 148 62 SN74LS303 10 213 124 Display Driver 149 E SN75492N C 169 U 125 Dual 4 Bit Counter 66 15n n3 74 390 IC 212 U 126 Quad 2 Input Nand Gate sgyl 151 E3 741 emm 163 U 127 Ouad 2 Input Nand Gate SEV 152 E3 MC74LSO0RP IC 215 U 128 5V Regulator C2 153 E2 MC7805CP 32468 1 U 129 15 Regulator C2 154 3 LM341P15 32468 2 130 15 Regulator 1 155 F3 79M15CU 32468 3 U 131 TEEE Interface Chip F2 156 E5 MC68488 LST 14 U 132 Tri state Buffer F4 157 E5 741 3679C 0 161 133 Bidirectional Rus Driver G2 158 F5 MC 344 71 10 229 134 Bidirectional Bus Driver 03 159 F5 MC 3447 1C 229 U 135 5V Regulator C4 160 F4 MC7BLOSALP 10 223 U 136 15V Regulator C3 161 F4 0 17 137 15V Requlator C3 162 F4 TM320L 715 C 253 VR 102 6 2V Zener Diode BS 171 1N4577050 n7 58 VR 103 5 1 Zener 16 172 E5 18751 DZ 59 Zener Diode 06 173 F5 1N751 07 9 5 1 4 1 4 Jumper BA 177 83 1 3
45. 400 Ova Co 3 925 Id KEEN EC RA LE i I l x E A 3 KEE E Ss 036 30 c de 522 EE NOI I VNOI TILYA HOS cy 2 ca 011 891530 211 25 JUVW3HOS 1S 30008 yh a5 wS E lee aron Be MS 9 ASA i 11 0928 058 5 AS 2 To 7 wee m n a T bi 0099 3 NO 1238803 A 4980 9 y 001 l N 0 1 S ET ci _ dre JAHA lH I Db 301vA 03123135 AHOLIVI SILONID 73 aun X Iori x Pa I NIOJ 1531 310N30 a E 5 S AS SE eg INIMISNFOY TvN431N 310 10 85 g orn J NOWINCD TENS 53400 N MEN 2 AS SOvsviOOid 49 3SIMH3HIO CINUYN SSINN d 015 ASI 0 SQvuviOU2IN NI 38 SINIVA TW 2 0 O 1 P 9384 8 Sino 3 ISIMYIHLO 48 i 531Nn SMHO NI 387 S3n VA SOLSISIS E i D ON S310N 5 D CK ASI I ol gt JN XNA LAdNI 2 S 6s m 3209 ems teur ire e d d Ee e 11081404 Q n an EE el va ue ey i ix ASI ex Oeu POLPO i NOMAO2 zi 5 HA rn 002 EE 5 A 2007 stoy vEDY GA 1 INOZ e wi
46. 413 8421 R422 and R413 for poor solder joints or defects Do not advance to the next step unless VR noise level is less than 10zV p p 5 26 Current Bias Check Monitor the noise level on the emitter of Q414 for less than 20 p p If 0414 emitter has a noise level greater than 204V p p replace 0414 If replacing 0414 did not solve the noise problem examine R431 thru R433 for poor solder joints or defects Refer to Figures 5 21 and 5 22 5 27 Input FET Replacement A if the 181 is still noisy after all the previous checks have been made the problem is apparently the input FET Q413A and B B Replace Q413A and B with Keithley Part No 30809 which is a matched set Reselect R423 and R424 as stated in Paragraph 5 21 Verify noise and drift performance 5 11 MAINTENANCE 5 28 Nanovolt Preamp Troubleshooting The Nanovolt Preamp operation is explained in the Theory of Operation 11 15 recommended that the troubleshooter read the Nanovolt Preamp section of the Theory of Operation before troubleshooting the Preamp The following Table 5 6 is a step by step procedure to breakdown and isolate the problem quickly and easily FIGURE 5 22 Quiet U401 104V cm 50ms cm 5 29 DC Volts Attenuator Troubleshooting The DC Volts Attenuator is made up of a precision voltage divider R313A B C and D R314 R315 R309 R310 and R311 ranging relays K301 and K302 and input protection FETs O301 and 0302 The Attenuator is locat
47. 47 C 201 5 C 138 510pF C 306 047 C 306 047 C 221 015 C 221 015 C 179 10 C 179 C 179 C 179 C 238 C 238 C 138 C 138 RF 28 RF 28 RF 28 410 10 10 1 1 22pF 5000pF TG 140 TG 140 CS 337 12 RL 59 TG 47 TG 84 TG 139 16 9 TG 128 6 9 MODEL 181 6 10 TABLE 6 3 Replaceable Parts List PC 526 Schematic 30586D Continued N Channel FET N Channel FET NPN Silicon N Channel J FET NPN Monolithic Pair Matched J FETS NPN Silicon N Channel FET N Channel FET N Channel FET N Channel FET N Channel FET N Channel FET Part No TG 128 TG 128 TG 47 TG 139 TG 142 TG 141 TG 143 TG 128 TG 128 TG 128 TG 128 TG 128 TG 128 Circuit Desig R 88 200K R 76 33K R 76 22K R 76 22k R 76 33K R 88 200K TF 87 RP 89 1K RP 89 100 RP 89 1K RP 89 20K R 88 200K R 263 199 3K 263 21 538 R 263 199 3K R 88 75K R 176 49 9K R 176 49 9K R 88 100K 200K 1 1 8 Mtf 33K 5 1 4W Comp 22K 595 1 4W Comp 22K 596 1 4W Comp 33K 595 1 4W Comp 200K 1 1 8W Mtf Thick Film 1K 1096 Cermet Trimmer 100 ohm 1096 Cermet Trimmer 1K 1096 Cermet Trimmer 20K 1096 Cermet Trimmer 200K 195 1 8W MF 199 3K 0 1 1 10W Mtf 21 93K 0 195 1 10W Mit 199 3K 0 196 1 10W Mtf 75K 196 1 8W Mtf 49 9K 0 196 1 8W Mtf 49 9K 0 196 1 8W Mtf 100K 1 1
48. 4TOpF w V gt 8 2 I o Mhix gt C 24 GND 0126 5l i Tos C A D 137 COMMON OFF 3201 2 15 O DGTAL CIT D GT AL 2 JIGi2 F101 e VEI FOR ISV BLU o DAL 178 gt 6 Ny FOR es PAGE 2 230v 5 ZONE 5 Ci30 c LA ZIO CA CI BLU 10000 me 25905 map K 4 DIGITAL COMMON Ris2 IM C 40 MAINFRAME GROUND SL REW 68 I SECTION o Ca 6 RI ca m Y 402K E Sy 5 pm Samo amp RH IE AA gt RED 6 BIT Mar x JACKS SI O es Te NM se qa REAR PANEL 2 1 Qus BITS 1 pane m BIT 8 spell p t9 BL i BIT y 7 57 Sp 5 TO BIT 6 lt X 7 MOTHER BIT 5 SA o 4 BOARD Ui PAGE 2 AD SAI UNIBG UF EL 1 BIT 4 REF y BIT 3 i ar 2 A BIT SBIT i Bir 4 d 5 EN 6 5 20 1 2 t 2 OR E NY 5v 07 W ome A FEN YN 5 D E F G H TOAMETED 2 OF aD TEA Lee ez 41 9397 17460 APPED 139 Cap A ADDED DER amp Qlo 27 REMOVED 5 2278 TOP 125789 vRIO3 104 4 ANS a ax 7 Gece reo OF 5 RIM IF WAS 1504 RIZO 2 WAS 1204 8 2430 152571 Rossa CID MOT 1 ct was IEEE SECTION e 15 lo H 6 ee ler SR Ag 37 857 Vi X BAV 6 Bg 23 6 RI DAV AI
49. 5V are for the digital sec tion of the 181 The key to the Analog Digital isolation is the split bobbin transformer T101 The digital supply winding along with the primary windings are at the bottom half of the bobbin and the analog supply windings are located at the top of the bobbin 4 5 The six supplies operate from four separate windings of transformer 1101 The four windings are fed into four full wave bridge rectifiers Two rectifiers for the analog section CR105 and CR106 and two rectifiers for the digital section CR104 and CR107 Capacitors C128 C123 and C127 bypass regulators U128 5V U129 15V and U130 15V respec tively These are the analog supplies Capacitors C134 and C135 filter the input voltage to U136 and U137 respectively Capacitors C132 and C133 bypass regulators U136 and U137 respectively Capacitor C130 filters the output of 08104 Regulator U135 receives its input from the regulated output of U136 Q103 and Q105 are configured as a high current gain voltage regulator Q104 completes the unity gain loop by compensating the Vge drop of Q103 CR101 provides short circuit limiting to the circuit 4 6 IEEE Standard Interface While studying the theory of operation of the IEEE Standard Interface it will be helpful to refer to the Schematic Diagram 30583 sheet 1 of 2 The entire IEEE Interface circuitry is located on the mother board The Standard Bus Connector is located on the rear panel The primary address
50. 6 28 L 6 9 6 9 OR ON Daat wesBeig 23eueu2S LES Dd pieog 05600 8 9 anbi H 2362 13398 02960 n QuvOG N3HLOM 20005 an a Ire wr is atte AG Case 9 95 ES noe aM TES CIN a 283 2902 08708 dng 30 NY 2872 03 8O3 NOILO3NN 2 J DELS A to 97 BI ten JB IH 1 0 gane 2HWO9v dWWN3td 32012 j NONE Cast ZA no Onse Ag T AG INEA e 5 SSA 33A I INTRO So ON 65 215 60 85 2 25 sE ajoo en 95 15 0 en 5 8 cO yiya S8 po 5 9119 5 Bees 8 a A z 9 as ti 3 1 zy y OS Gor asan Goo 907 Ge 1 y l oan Leg E S E d l 220 eo alzo 202 0 8 3 LAO 3 NOMADI 915 ASHES ASI ASHES ASI i AGE M9 NOWMOO G v i AN NOWNOD OWN 00 4 60014 NOILY TOSI AGOSI gt gt z REH Z EE i 39v4 335 O9 L N 895 CL SO z merz 3 3 311920 2 FO lt PON SNO LYN I fost Daves s ete Som YDA Cm pito ETE ES TOCA 121 perl LS i __ A eT H H3CNIYW3H e 13915 a
51. 8W Mtf REPLACEABLE PARTS MODEL 181 REPLACEABLE PARTS TABLE 6 3 Replaceabie Parts List PC 526 Schematic 30586D Continued Circuit Keithley Desig Description Part No 56 2K 1 1 8 Mtf 56 2K 1 1 8 Mtf 196 1 8W Mtt 4 178 Mti 100K 5 1 4W Comp 100K 5 1 4W Comp 2K 0 1 1 10W WW 2K 0 1 1 10W WW 15K 1 1 8 Mtf 4 99K 196 1 8W Mtf 1K 196 1 8W Mtf 22 2K 0 196 1 10W Mtf 200 ohm 0 1 1 10W WW 1K ohm 1 2W ww Dual Op Amp Quad Comparator Quad Comparator Selected Int Circuit Dual Op Amp Selected Int Circuit Zener Diode 6 2V Zener Diode 6 2V Zener Diode 6 4V Zener Diode 6 4V Zener Diode 4 7V Zener Diode 4 7V R 88 56 2K R 88 56 2K R 88 Hop R 76 100K R 76 100K R 291 2K R 291 2K R 88 15K R 88 4 99K R 88 1K R 263 22 2K R 291 200 R 290 1K 30475A 1C 219 1C 219 30154 30477 30167 DZ 48 DZ 48 DZ 60 DZ 60 DZ 67 67 Followed by part description Selected at factory 6 11 REPLACEABLE PARTS 6 12 TABLE 6 4 Replaceable Mechanical Parts Keithley Part No Description Quantity BOTTOM COVER 30541 30544 FA 143 FE 14 TOP COVER 30540 TP 8 1 617 322 FRONT PANEL 30539 30589 BP 11 0 BP 11 2 181 303 1 REAR PANEL 30596 BP 11 0 BP 11 2 FH 24 FH 25 MC 77 CS 254 Bottom Cover Tilt Bail Drive Pin Foot
52. Digital Supply Input of 15V Regulator 15V Digital Supply Input of 15V Regulator 5V Digital Supply Input of BV Regulator Input to Output Regulation Transistor Referenced to Input LO Referenced to Analog Output LO 5 17 A D Converter and Display Proper operation of the A D converter and the display should be verified before troubleshooting the nanovolt preamp and signal conditioning circuits Certain basic checks aro listed Tables 5 4 and 5 5 These checks should be made to ascertain that the A D converter circuit is functioning properly The cir cuit diagram of the A D converter is located on two Schematics 305851 and 30583D Sheet 2 of 2 Reading the Theory of Operation for the A D converter is strongly recom mended before troubleshooting the A D There are several waveforms provided to help isolate the problem MODEL 181 TABLE 5 4 A D CONVERTER Item Component MAINTENANCE Required Conditions Display Check main power supplies U301 U301 Pin 4 U305 Pin 6 Source of Q309 Anode of VR302 U127C Pin 8 U123A Pin 5 U309A Pin 3 U105 Pin 1 U110 U307 Pin 14 H324 Pin 5 Emitter Q313 U302 Pin 2 11306 Pin 6 R327 Pin 7 U127B Pin 5 U122A Pin 6 O320C Pin 6 U309B Pin 5 U126 Pin 13 P1010 Pin 3 U309 Pin 10 U303 Pin 2 U110 Pin 16 AT101 Pin 4 AT102 Pin 4 U126 Pin 2 U120 Pin 1 U121 Pin 1 AT103 Pin 4 U120 Pin 2 AT104 Pin 4 U120 Pin 3 U12
53. F 35V Electro luF 16V CerD luF 50V Polycarb luF 20V Tant 470pF 2000V Cer 680pF 2000V CerD Diode Rectifier Bridge UK16 104 UK16 104 16 4 16 4 16 4 UK16 104 UK16 104 DD 680 Type 838 UK16 104 UK16 104 25UKB6R8DM 25ULA1500 25ULA1 500 25ULA1500 25UKB6R8DM 25UKB6R 80M TYPE831 100P10 000 TYPE811 25UKB6R8D17 25UKB6R8017 35ULA100 35ULA100 UK16 104 625BIA105 821A105K020N 470pF 680pF 1N4607 2735 MODEL 181 Keithley Part No C 238 1 C 238 1 C 238 1 C 238 1 C 238 1 C 238 1 C 238 1 C 64 68pF C 64 47pF C 238 1 C 238 1 C 314 6 8 C 314 1500 C 314 1500 C 314 1500 C 314 6 8 C 314 6 8 C 22 2200pF C 304 10 000 C 22 02 C 314 6 8 C 314 6 8 C 295 100 C 295 100 C 238 1 C 215 1 C 204 1 C 324 470pF C 324 680pF RF 41 RF 48 MODEL 181 REPLACEABLE PARTS TABLE 6 1 Replaceable Parts List PC 53 Schematic 305830 Continued Circuit mr PC Board Mfr Mfr Desig Description Item No Location Code j Desig I Rectifier ridqe G 4 RF Schematic Keithley Location Part No Rectifier Bridqe 6 WO4M 29 46 Rectifier Bridge Fuse 1 4A 115V Fuse 1 8A 230V Binding Post Red Binding Post Black Millivolt Input Connector Binding Post Red Binding Post Black IEEE Connector Power Connector Connector 100uH Choke 12 Pin Connector Ribbon Cable Assembly 13 Pin Connector 14 Pin Connector 3 Pin Molex Connector
54. General Information 1 1 INTRODUCTION The Keithley Model 181 is a 5 and 6 digit DC voltmeter with resolution to 10nV The Model 181 is a unique DC voltmeter in the respect that it combines microprocessor technology for full programmability with a new concept in nanovolt front ends it provides highly accurate stable and low noise readings from 10 to 1000VDC on 7 voltage ranges The 2V through the 1000V ranges utilize the 5 way binding posts The 2mV through the 200mV ranges utilize the special low thermal input connector The service manual contains the necessary information for calibrating and maintaining the Model 181 This information is provided in various sections throughout the manual These sections are listed as Performance Verification Theory of Operation and Maintenance Calibration Along with this section General Information this manual also inciudes the Accessories a Parts List and the Schematic Diagrams 1 2 Warranty Information The warranty is given on the inside front cover of this manual If there is a need to exercise the warranty contact the Keithley representative in your area to determine the proper action 10 be taken Keithley maintains service facilities in the United DC VOLTS ACCURACY i rdg digits 24 HR 22 24 C 1 YR 18 28 C 0 00696 5 dn 0 01596 5d 0 00696 2 dr 0 01596 2d 0 00696 2 d 0 015 2d 0 00496 1 56 0 007 2d 0 004 1 59 0 01 2d 0 004 0 0 01 0
55. H At ONLY A 1 A 1 HIVA MAX LINE VOLTAGE SELECTED INTERNAL nac duas 77 gi Hv CO ib DIL 21 visow E Keithiay istrumentis lac 28775 Aurura Hoad Cleveland Ohio 44135 1216 248 0400 Telex 98 5469 5151 1 Dan ee FIGURE 1 2 Rear Panel 1 2 MODEL 181 ACCESSORIES Section 2 Accessories 2 1 GENERAL This section describes the various accessories and options avallable for use with the Model 181 2 2 Model 1483 Low Thermal Connection Kit Ihe Model 1483 Kit contains a crimp tool shielded cable an assortment of copper lugs copper wire cadmium solder and nylon bolts and nuts is a complete kit for making very low thermal measuring circuits The kit enables the user of the Mode 181 to maintain the high thermal stability of the nanovolimeter in his own application Figure 2 1 Model 1483 2 3 Model 1484 Refill Kit The Model 1484 Refill Kit contains replacement parts for the 1483 Kit It contains copper lugs cleaning pads splice tubes alligator clips 10 foot shielded cable a spool of copper wire nylon screws and nuts and 10 feet of cadmium solder 2 4 Model 1485 Female Connector The Model 1485 Low Thermal connector is to be used with the Model 1481 1482 or the 1486 for constructing low thermal shielded connections to the low voltage circuits Figure 2 2 Model 1485 2 5 Model 1486 Male Connector The Model 1486 Low Thermal Connector is a mating connect
56. H 4 s 4 801 t gt lt EX 623 i AS 1 M 5 S 2 po birra cr hi Li un E ERE COS C EN i S oi amp OA 09 1301 v mere neve x 8 wee x EN vivo viva 420282 320282 320282 9 20282 20282 920282 82024 2028 tl 219 rid OI 6 31 SI H31S193H Lanz Cy a a x i ic Via 59 Yo CN A Vy Vi a CDL i 8625 2028 tozo 5028 9020 2 a Wo AS OS OI 21028 0 2 YI0Z3 8 Ot tl vo 2 q202n A A 3z0en 4202 vzozn i 7 AS e i s I oio l c L e t CI 114 AOZ 2 0001 rs 5 250 91250 1280 I b dp l 8311183 SNIdAVO 0837 6280 02250 8926 340438 M Mi 1S 06 A 60 ei I NOMNOD 10 310N3Q 4 i i e t s e 5 s 8 4 10B1NO2 T3NYd 1NOHJ S310N30 O de dp dp dp oi 50 8 4082 8 X meet a_ s NI Aug SINIYA HOLIOYdvO Cv 2 6 SAHOTIYN AA 35 883 0 038 1 606 d SAHO NI 38 SINIYA sOlSIS34 TIY SJLON F 505955 v B cC D A POWER SUPPLY l NGC TIGI USO WHT BRN iN our Hamis Q Ci26 GND ce 500 U29 66 c Y iN cur ME 5 eg 1 L GND 3 Gan 5 RI c SIGNAL ANALOG I 139 COMMON
57. IC 229 U133 IC 229 U134 2 The above integrated circuits should be handled and transported only in protective containers Typically they will bo received in metal tubes or static protective foam Koop the devices in their original containers until ready for use 3 Remove the devices from their protective containers only al a properly qrounded work bench or table and only afler grounding yourself by using wrist strap 4 Handle the devices only by the body Do not touch 0 pins D Any printed circuit board into which a device is to be inserted must also be grounded to Ihe bench or table 6 Use only grounded tip soldering trons 7 Use only anti static type solder suckers 8 After soldering the device into the board or properly inserting if into the mating receptacle the device is adequately protected and normal handling can be resumed 5 16 Line Power In general start toubleshooting with the Line Power Checks and Main Supplies listed in Table 5 3 These checks will verify that the power supplies are providing the correct voltages to the electronic components MODEL 181 MAINTENANCE KELUHLEY 1815 CALIBRATION COVER mw RANGE 180000mVv AFTER ZEROING 20nw RANGE 19 0000 ny AFTER ZEROING ok MODEL 181 CALIBRATION FOLLOW NUMBERED SEQUENCE 200mv RANGE py SET RANGE APPLY VOLTAGE TO APPROPRIATE INPUT CONNECTOR ADJUST FOR DISPLAY INDICATED t D PUMPOLT Alli SEE MANUAL iS 2 000
58. PANEL SHIELD NOT SHOWN 181 303 FRONT PANEL 30539 TRANG IRMER R179 kg PANEL OVERLAY 2 BB 90 0 7 version GONNE SOR cs 338 4 MOTHER BOARD DIGITAL Pc 531 i PUSHBUTTON POWER Ge TE E 29465 3 30599 DISPLAY BOARD TILT BAT NOT SHOWN ec 530 30544 Figure 6 9 Mechanical Parts Locations MODEL 181 APPENDIX APPENDIX A MODEL 181 IEEE ADDENDUM The IEEE section in your Model 181 may have Texas Instruments SN75160s for U406 and U407 instead of the intended Motorola parts MC3447s The Texas Instruments parts are readily identifiable by removing the top cover and looking at the IEEE section located at the rear of the instrument If two chips are on a separate PC board and wired into the oriqinal sockets on the mother board then they are the Texas Instruments SN75160s These parts T I SN75160 DO NOT correspond to the oriqinal Schematic 30977D Everything between the 68488 chip and the connector J1006 is different when the T I SN75160s are installed The result is the same but the operation is accomplished differently than with the Motorola s MC3447s Shown on the next page is the alternate configuration for the T I SN75160s TO IEEE BUS 6 8 NDAC 7 NRFD 5 EO tI ATN 0 580 7 REN 9 IFC DIOI 2 hide DI03 33 16 4 0104 i3 DIOS DIO6 iS 03 29 12 16 DIOB INSTRUMENTS SERVICE FORM Model No C Serial No
59. PLACEABLE 5 Section 6 Replaceable Parts 6 1 GENERAL This section contains information for ordering replacement parts The Replaceable Parts List is arranged in alphabetical order of the circuit designations of the components cross reference list of manufacturers containing their addresses is given in Table 6 1 6 2 Ordering Information To place an order or to obtain information concerning replace ment parts contact your Keithley representative or the factory See the inside front cover for addresses When ordering include the following information A Instrument Model Number B instrument Serial Number C Part Description D Circuit Designation if applicable E Keithley Part Number 6 3 Factory Service If the instrument is to be returned to the factory for service please complete the Service Form which follows this section and return it with the instrument TABLE 6 1 6 4 Component Layouts The component layouts are as follows A Nanovolt Preamp Board PC 526 Dwa No 3037 70 Figure 6 1 B Analog Board PC 529 Dwg No 305030 Figure 6 2 C Display Board PC 530 Dwg No 805320 Fiqure 6 3 D Digital Board mother board PC B31 Dwg Ni 305760 Figure 6 4 6 5 Schematics The Model 181 nas four schematic diagrams and they ate as follows A Nanovolt Preamp Board PC 526 Schematic No 305860 Figure 6 5 B Analog Board PC 529 Schematic No 305850 Figure 6 6 C Display Board PC
60. PP Deen Cate oes mis 4 29 Mu PETS Bardem Ead ue RITA asun pug dm autos O MICE 4 30 Transconductance Amplifier GAMP eee 4 31 o ee re e ERE a 4 32 Reference Supply ee ee YW DWY NY GRUG Y ee ee aelred TABLE OF CONTENTS CONTINUED SECTION TITLE PAGE 5 Maintenance eh a DC EUR Id ED v a i Mos apa d d CB Oddo A f a cd RR AR 5 1 o meer Sree E i 5 2 Recommended Test Equipment 23 a A en 5 3 Voltage Divider OY O tar eee se AS 5 4 Environmental Conditons ei pex ents obs Ad RE dE E GU a nee ENEE I 5 5 85 151 10 116 201 1 11 8 8655 ALL RR dr e o a OR AO OUR OG 5 6 Installation of the Calibration COVOL iii UOYD e 5 7 A D Calibration 2V Ranga crol CAG R Ed 5 8 TOM Gu Adjustment cidade Tm I 5 9 20V Range Adjustment e du SE dE EEN NEE SEN e ah WENDID KESE 5 10 200V Rande AdjuStf ent FRONTE AH one EROR OR de oo SAER ed RR Pd e 5 11 1000V Range Adjustment
61. Preamp A D Timing 4 8 MODEL 181 ON signal OFF S line bOmsec opp Input Disable THEORY OF OPERATION Dummy ON Integrate 16 6611136 All 4msec ON MT Ref FET ON A D Zero orp 4 BET 4msec 1 M FIGURE 4 9 V range A D Timing TABLE 4 4 MUX FETs Range S Line Mux _ FET Relay 58 2 S7 20V S7 200V S6 1000 S5 0306 K301 ON Not Muxed 0304 K301 ON Not Muxed Q304 K302 ON Not Muxedi 0305 0307 Note that the FETs are muxed measurements 4 29 Mux FETs The Mux drive to the gates is the same as for the Mux FETs of the Preamp Q304 Q309 are low leakage devices which require high gate resistance to prevent demodulation of high frequen cy noise which results in tens of microvolts of offsets R333 R335 R342 and R343 are provided for this reason U30 and 11308 are open collector comparators that are used to drive the FETs The reference for the comparators are provided by 324 and R324K U301 and its associated components provide a bootstrapped unity gain input buffer 3313 provides high current output capability Figure 4 10 is a block diagram of the A D converter 4 30 Transconductance Amplifier GAMP This amplifier performs two functions A The GAMP provides an offset current so that the bipolar in put voltage supplied to it is converted to a unipolar output current B The GAMP converts the input voltage to
62. Slope Begin Single Slope Enable 3 84MHz Comparator 16 66ms Input Disable f Single Slope Begin FIGURE 4 2 A D Control Logic While the Integration period is taking place pulses from the V F are inputted into the 16 bit counter U123B When the counter overflows after 16 counts clock pulses are generated which the VIA counts in an internal counter These clock pulses become the most significant bits of the result 24 Bit Result 8 Bits These bits are generated by clock pulses during the Charge Balance phase 4 Bits This is the remainder left on the 16 bit counter during the CB phase 8 Bits These counts are accumulated in the 16 bit counter during the single slope phase 4 Bits This is the remainder left on the 16 bit counter during the single slope phase MODEL 181 me SIUSI Charge Balance Ka I _ Start Stop 16 66ms Input Disable i 4f i Clear i I Counter Strobe Integrator i A Waveform Figure 4 3 Charge Balance Timing At the end of a charge balance phase 4 bits of data are left on the 16 bit counter This data is obtained by setting the remainder line to 1 and strobing the counter and waiting for the counter to overflow The number left on the counter is equal to 16 minus the number of strobe pulses This data now becomes the next 4 bits of the 24 bit result The single slope phase begin
63. Top Cover Foam Shield Front Panel Front Panel Overtay Binding Post Black Binding Post Red Shield Rear Panel Binding Post Black Binding Post Red Fuse Carrier Body Fuse Carrier Serial No Labe AC Connector MODEL 181 MODEL 181 TABLE 6 5 Cross Reference of Manufacturers MFR FEDERAL MFR CODE NAME AND ADDRESS SUPPLY CODE CODE NAME AND ADDRESS Allen Bradley Corp Grayhill Inc Milwaukee WI 53204 La Grange IL 60525 Analoq Devices Inc Norwood MA 02026 Hewlett Packard Co Palo Alto CA 94304 American Components Inc Conshohocken PA 19423 Intersil Inc Cupertino CA 95014 IIT Semiconductor Lawrance MA NIRA Ampheno Broadview IL 60153 Bomar Crystal Co Middlesex NJ 08846 K amp Flectronics Co Minneapolis MN 55435 Inc CA 92507 Bourns Riverside Keithley Instruments Inc Cleveland OH 44139 Components Inc Biddeford ME 04005 Little Fuse Inc Des Plaines IL C amp K Components Inc Watertown MA 02158 Mallory Indianapolis IN 46206 Caddock Riverside Menco Inc CA 92507 Morristown NJ 07960 Centralab Division Milwaukee WI 53201 3M Company St Paul MN 5510 Mo lox Downers Grove IL 50515 Corcom Chicago It 60639 Monsanto S
64. Turn on HI RES so that 6 digits are displayed be less than 30 counts 30nV p p 3 3 3 4 MODEL 181 THEORY OF OPERATION Section 4 Theory of Operation 4 1 GENERAL This section contains in depth discussions of the major circuit blocks which are listed below A Power Supply included on Motherboard PC 531 page 6 27 B IEEE Standard Interface included on Motherboard PC 531 page 6 27 Digital Section included on Motherborad PC 531 page 6 27 D Display Display Board PC 530 page 6 25 E D A Converter Motherboard PC 531 page 6 27 F Nanovolt Preamp Nanovolt Preamp Board PC 526 page 6 21 G A D Converter Analog Board PC 529 page 6 23 There are several figures and tables provided with each major circuit block that will aid in their explanation 4 2 Power Supply While studying the theory of operation for the Power Supply it will be helpful to refer to the Schematic Diagram 30583D Sheet 1 of 2 4 3 The AC power is brought into the 181 by a recessed line plug J1011 Fuse F101 and line plug J1011 are located on the rear panel Switch S101 is the main power switch and it is located on the Front Panel Switch S102 is the 115V to 230V configuration switch and is located internally 4 4 The regulated portion of the 181 power supply is sec tioned into six different supplies There are three supplies 15V 15V 5V for the analog section of the 181 The other three supplies 15V 15V
65. ation of the Model 181 should be performed under laboratory conditions having an ambient temperature of 23 C 1 C and a relative humidity of less than 60 NOTE Calibration should be performed by qualified personnel using accurate and reliable equipment 5 5 CALIBRATION PROCEDURE Perform the following procedures and make the adjusiments indicated to calibrate the Model 181 WARNING Some procedures require the use of high volt age Take care to prevent contact with live circuits which could cause electrical shock resulting in injury or death CAUTION Do not exceed maximum allowable input volt age Instrument damage may occur Maximum allowable input is Slated in the specifications 5 6 Installation of the Calibration Cover 30915C The Calibration Cover is included the Model 1815 maintenance kit The calibration should be performed using the calibration cover The cover permits access ta the Model 181 adjustments while allowing the instrument to reach normal internal operating temperature Install the cover as follows 1 Remove the two rear panel screws that secure the top cover in place 2 Remove tho top cover by lifting firmly upward 3 Install the cal cover in place of the top cover install the two screws that secured top cover in Stop 1 4 The instrument should stabilize for 4 hours at the specified environmental conditions 5 7 A D Calibration 2V Range 1 1 Dopress the power button Th
66. d Deau Qc REDD lesm Soe 1 U34 D an I006 29225 s m wio p 6 Em TTA 51 64 A4 form 26518 Figure 6 4 Digital Board PC 531 Component Location Diagram Dwg No 30576D 9 0 ON Bag welberg uongoo1 1uouoduio 1 9 4 pieog 6 pg any jig SM Do EIN S Fe sym in E EA Uem A mL STI Pam T ee OL ma tr 34 cim DOUG oT G9 mor her cis Fr E 2 AST SS ev MIT 4 2 gt gt 7 OL 7r Crag meda v 2 sera 7 4 fa zi d ng gy EC een T d Y OY gt miden ee Ray PDA MA ru GW Lage miii 1932 FEA Ree Tma Lugar Ge uan mir gemy e SAE Mi sit i P wees oc swr c3a0w y 83 18 p 58 SWILI Cot pu WAS EA AW 1800110000 Ep Se soe Tes T 110 dd ma am 7 D A n f 3 AA i durar De Ze Neby gu caw AM a zc m m zen Cl S eem GEM 2 eai nd A fiii 6 196 20 amp 9 129 Q98S0 oN mg ujejBeig 3 8 9 25 9 5 Jd dueeJg MOAOUPN 9 o4nDig H 9 E 3 a 2 g Sites 1 09890 r RH 070 9001r KA f eo 4 Uta Sion I 0200 3 4 LIOAONYN i Ge 9 Gone
67. d 10 input lines are bare copper cold welded joints The sensitive input circuitry is covered both sides of the board with a relatively airtight compartment to eliminate thermal gra dients caused by air current flow and to act as an electrostatic shield 4 27 A D Converter While studying the A D conveter theory of operation it willbe helpful to refer to the Schematic Diagram 30585D Analog Board PC 529 The 181 analog board PC 529 contains the A D converter and high voltage signal conditioning circuitry O301 Q302 VR301 R301 R302 and R317 make up the input protection tor the A D C301 provides improved NMRR above 80117 and pro lects K301 from V Hz signals On the 2V range the signal is applied directly to the A D through Q304 R313 is the input attenuator which acts as a precision 10 to 1 100 to 1 and 1000 to divider depending on range Refer to Table 4 3 TABLE 4 3 GAIN RESISTORS FOR VOLTS 20V 10 to 1 R315 200V 100 to R309 IV 1000 to 1 R310 Adjustment R314 trims the total resistance of R313 and is set to center position unless R309 R310 or R315 ends up out of range during calibration When this happens adjusting R314 brings the adjustment back in range Input Mux Preamp Delay ON t e gt sig Zero OFF 200ms MODEL 181 4 28 Timing When reading this section on timing reference to Figures 4 8 and 4 9 will be helpful On the mV ranges the sequence starts with S9 going high Thi
68. d on Pins 4 15 of U117 The signals should be switching from 0 volts to 5 volts toggl ing This should be done with the Analog Output Gain Switch to X1 If the pins are toggling proceed to the analog section of the D A circuit If the pins are not toggling pro ceed to Step 3 3 Monitor bits 1 4 of U117 to see that they are toggling If they are not toggling check U110 If the pins are toggling then proceed to Step 4 4 Monitor bits 5 12 of U117 to see that they are toggling If they are not toggling and Pin 11 Enable of U116 is toggling then U116 is bad If Pin 11 Enable of 116 5 not toggling then check U110 If Pin 5 12 of U117 are toggling then the digital section of the D A circuit is functioning properly 5 32 Switch Input Section Troubleshooting The switch input section is shown on Schematic 30583D Sheet 2 of 2 and consists of U104 Q102 R101 8129 and R133 Check that the Front Panel Range and Function Switches operate properly Also check that the appropriate frequency was displayed upon power up If the Front Panel Switchs operate properly and the appropriate frequency was displayed upon power up then the Switch Input Section is operating properly If the Front Panel Switches are not operating properly or an inappropriate reading for frequency was displayed upon power up then check U104 Q102 R101 R129 and R133 MODEL 181 MAINTENANCE TABLE 5 6 PREAMP TROUBLESHOOTING item Component
69. ded by R407J and R407K along with 5 supply The N channel FETS employed throughout the circuitry require a DN to TOV Vas to shut them off and 2N to 1V to saturate them turn therm on In al cases tne gate drive is the same Turn off is provided by driving the gate to 15V Turn on is provided by driving the gate to the channel potential tdrain source voltage Bootstrapping is provided where needed to bring gate voltage up to channel voltaqe 4 28 Input Mux Special consideration is given to input multiplexing of Q419 and 0420 which needs to be thermally stable in order to man tain low drift Low thermal drift is accomplished through the use of PC board layout techniques and copper leaded FETs An isothermal surface is created by placing the two FETs O419 and O420 extremely close to each other The pads to which Q419 and Q420 are soldered are heat sinked together with thermal compound which is held in place with 8 specially molded retainer cup Any temperature gradients af fecting one FET affects the other FET equally and they cancel Low thermal connection is made to these FETs through thin copper PC tapes The tapes must be thin so they can support thermal gradients The source of 0419 terminates at a large bare copper pad to which protection resistor R436 with bare THEORY OF OPERATION copper lugs is bolted The opposite end of R436 is bolted lo a bare copper lug to which the input cable ts fastened The HI an
70. digits lift the gate lead of Q416 from the PC board and then check the display for less than 500 digits If the display is Still out of spec replace Q419 and 0420 and resolder the gate of Q416 D If the display is positive and greater than 500 digits lift the gate lead of Q 15 Check the display for less than 500 diqits and if it is in soec after the qate lead has been lifted off the PC board replace Q415 Otherwise 0413 is at fault 5 24 Bootstrap Check Monitor U404 Pin 3 for less than 107 p p noise Monitor U404 Pin 1 for less than p p noise If Pin 1 has a greater amount of noise than Pin 3 replace U404 5 25 Low Noise Supply Check A Select the 20m V range Monitor the noise level on U405 Pin 5 Verify that it is less than 104V p p If Pin 5 noise level is greater than 100 p p the possible causes are com ponents VR404 and CR406 B If U405 Pin 5 noise level is less than 108 p p verify that U405 Pin 3 noise level ts less than 104V pp If U405 Pin 3 noise level is greater than 104V p p the possible causes are VR403 or CR407 C If U405 Pin 3 noise level is tess than 108 p p verity that 114055 Pins 7 and 1 noise level is less than 104V p p If U405 pins 7 and 1 noise level is greater than TOV p p replace U405 After U405 ts replaced verify that Pins 7 and 1 are 10 p p D have been verified as having less than 104V p p noise this is not the case examine the associated com ponents C412 C
71. e Apply the input as in step G Verify the displayed reading with opposite polarity is the same as in step G 3 digits Model 181 332D Figure 3 2A 2mV and 20mV Performance Check JO O O O O 3 o O DEDS Figure 3 28 200 Millivolt Performance Check MODEL 181 TABLE 3 3 DC VOLTAGE PERFORMANCE CHECK Allowable Reading at 18 C to 28 C 1 89967 to 1 90033 18 9970 to 19 0030 189 970 to 190 030 Applied Voltage 1 90000mV 19 0000mV 190 000mV 3 8 HI RESOLUTION Check Upon power up the 181 will be in the 5 digit mode of reso lution 80 To check the HI RES function proceed as follows A Short the volts LO and HI together Press the ZERO button on the Front Panel This will obtain a stored baseline B Apply the signal and the displayed reading will equal the difference between the stored baseline and the input signal C Press the ZERO button again and the reading that will be displayed is rough Rough data is different from the reading obtained in Step B because rough data will include the signal and various offsets When offsets equal tho stored baseline the two readings will be the same By sceing 8 dif lerence betweon rough data and Step B this wili contirm that the ZERO function is operating properly 3 9 DAMPING Function Check Upon power up the DAMPING function is off DO To check to see that tho DAMPING function is operating properly
72. e Adjustment 3 Repeat Step 3 of A D Calibration but use the 20V range input 19 0000 and adjust R315 to obtain a reading of 19 0000 1 digit If the reversal in Step 5 Paragraph 5 7 is greater than 3 digits refer to the troubleshooting section 5 10 200V Range Adjustment 4 Repeat Step 3 of A D Calibration but use the 200V range in put 190 000V and adjust R309 to obtain a reading of 190 000V t 1 digit If the reversal in Step 5 paragraph 5 7 is greater than 3 digits refer to the troubleshooting section 5 11 1000V Range Adjustment 5 Repeat Step 3 of A D Calibration but use the 1000V range in put 1000 00V and adjust R310 to obtain a reading of 1000 00 1 digit If the reversal in Step 5 paragraph 5 7 is greater than 2 digits refer to the troubleshooting section 5 12 D A Calibration 6 1 Select X1 on the analog output switch located on the rear panel Connect the Model to analog output 2 Select the 2V range and input 2 10000V Verify that the 181 display reads OFLO 3 Adjust R106 for an output voltage of 2 000V 05 1mV read on the display 4 Input 2 10000V into the 181 and verify that the 181 display reads OFLO 5 Adjust R107 for an output voltage of 2 000 0596 1 read on the display 5 13 Nanovolt Preamp Calibration Cannot be done until 2V range is calibrated 1 Pumpout A Connect a 108 probe to the 181 Preamp Input input Connect the
73. ed on the Analog Board PC 529 The Attenuator divides the input signal to the appropriate switching FET MODEL 181 5 30 IEEE Bus Circuit Troubleshooting Bus address toggle switches S103 set the Bus address The address cannot be changed while power is applied To change this address select new address by 103 and cycle the power 1 Visually check the 181 display to see that it is operating properly If it is nonfunctional flickering or displaying incorrect data then check the display circuit U110 U201 U202 U203 O201 0208 If the display is operating properly then proceed to Step 2 2 Program the controller to input any command string and output data Check buffers U133 and U134 for input and output of data Check T R1 Pin 27 and T R2 Pin 28 of U131 for toggling 0 to 5V switching 3 Check to see that the Bus Address can be changed Turn off the instrument and toggle in a different Bus Address Turn power on and see that the new Bus Address is present by appropriate controller address 5 31 D A Circuit Troubleshooting 1 Visually check the 181 display to see if it is operating properly If it is nonfunctional flickering or displaying incorrect data then check the display circuit U110 U201 U202 U203 0201 0208 If the display is operating properly then proceed to Step 2 2 Input a ramp voltage of 2V to 2V at a 5Hz rate to the Banana Jacks on the 2V range Using an oscilloscope measure the signals locate
74. for 2 to 1000V ranges DIMENSIONS WEIGHT 127mm high x 216mm wide x 359mm deep x 8 x 1418 Net weight 3 85kg 8 ibs ACCESSORY SUPPLIED Model 1506 Low Thermat Input Cable ACCESSORIES AVAILABLE Model 1019 Rack Mounting Kit Model 1483 Low Thermal Connection Kit Model 1484 Refill Kit for 1483 Kit Model 1485 Female Low Thermal Input Connector Model 1486 Male Low Thermal Input Connector Model 1488 Low Thermal Shorting Plug Model 1503 Low Thermai Solder and Flux Model 1506 Low Thermal input Cable 4 ft Clips Model 1507 Low Thermal Input Cable 4 ft Lugs Model 1815 Maintenance Kit 1 1 GENERAL INFORMATION NOTES 1 NMRR specilications applies for input signals less than 120mV peak to peak on the 2mV and 2016 range 1 2V peak ta peak on the 200mV range and less than 2X full scale peak to peak on all other ranges This is necessary in order to prevent A D saturation 2 ACCURACY SPECIFICATION The accuracy specifications are defined exclusive of noise MODEL 181 3 ZEROING The term when properly zeroed means rezeroing during warmup first 4 hours and after ambient changes in temperature of greater than 1 C O MN Li LI Ll FIGURE 1 1 Front Panel ANALOG OUTPUT IK HE PEE HE ses AN E UON V MAX CAUTION DISCONNECT LINE CORO BEFORE SERVICING 488 INTERFACE y ADINMESSAHBLI aQ O s I 0 IINE HATING 4 HN
75. from driving inputs to U401B out of their common mode range during overload MODEL 181 DC Amplifier Input Mux 2 I DUCES E a INHI 0419 i E l INLO O 1 V 3 1 4 N sig sig THEORY OF OPERATION Drift Filter and Filter Correction Buffer FIGURE 4 7 NVPA Showing Filter and Drift Correction 4 22 Drift Correction The offset resistors R423 and R424 bring the amplifier into the operating range The offset can only be nulled to 2mV referred to the input At the output on X1000 2V can be present The A D would be overloaded by 2 4V which means the 2V component must be offset to OV for OVin This offset correction is provided by C404 Q406 and low leakage buffer U401B When Q420 is on and when the A D ts not looking at preamp zero during the A D zero cycle Q406 turns on and stores the offset voltage present on the DC amplifier output on 404 Then this capacitor holds this value during the next two conversions 5 sec until it is updated This correction occurs two times a second Leakage off this capacitor will yield offsets on the 200 millivolt range with input shorted The major source of leakage is U401B and Q406 These two devices are selected for leakage to maintain less than 15 microvolts of drift over a conversion cycle of 50 millisecond This is the time it takes to do a full preamp signal
76. ge 100 20mV range and 10 200mV range ap propriate film or wirewound resistors are chosen as feedback elements Refer to Table 4 2 TABLE 4 2 GAIN RESISTORS Adjustment 2mV R409 R414 R435 1000 R403 200 R410 8415 R435 100 R410 200 R411 R416 R434 10 R411 The 20mV adjustment depends slightly on 2mV gain Thus 2mV gain should be adjusted before the 20mV adjustment is completed The 200mV adjustment is independent of all others FET 0418 selects the 2mV and 20mV legs FET O417 selects 20mV leg Relay K401 selects 20mV 4 19 Feedback Elements Thermal drifts in the input amplifier are relatively unimportant since they are autozeroed out Slowly varying drift com ponents such as solder joints reed relay contacts are of little significance Therefore no special low thermal terminals are necessary in the feedback loop However for the nanovolt ranges 2mV 20mV it is necessary lo use wirewound resistors wherever low voltage signals are present This is why R435 is a wirewound element whereas R434 R409 R416 are film resistors Film resistors display much higher voltage noise whereas wirewounds are available whose noise approaches theoretical limits R436 is selected as 200 ohms since the Johnson noise of this value is negligible compared to amplifier noise 4 6 MODEL 181 4 20 Offset Null The input FET match provides 25mV differential offset voltage referred to the amplifier input
77. ides a 20 millisec ond pulse upon power up to get the dynamic buffers and clock of the processor running properly The Reset circuit consists of U105 U106 R103 R134 C103 and C105 There are two in puts to this circuit the 2 4kHz clock and the Latch Fnabie The 2 4kHz clock is counted by U105 and Latch Enable is used to clear U105 Refer to Figure 4 1 In normal operation Later Enable pulses iow for 1 microsecond every 833 microseconds 1 2kHz rate The display multiplexing is the sarne rate as this The voltage on capacitor C105 rises exponentially while Latch Enable is LO A clear pulse is applied to U105 and the CLEAR line to the microprocessor remains HI when Latch Enable returns to HI and while the voltage on C105 is above the threshold of NAND gate U106B Therefore normally U105 ac cumulates a few counts and is cleared transient can mask the Latch Enable pulses or a lost program can prevent their appearance at all not Latch Enable pulses occur for 53 3 milliseconds 128 counts will be allowed to accumulate in U 105 and its output will go HI The 105 output is inverted b U106D and resets the microprocessor and the VIA The Heset line is held LO for 53 3 milliseconds which is greater thar the required minimum 20 milliseconds This assures proper reset 4 1 THEORY OF OPERATION R103 and C138 make up a delay circuit that provides a reset delay of 3 milliseconds which permits the reset circuit to ignore any trans
78. ient which does not affect the microprocessor or program execution i nsient Latch Enable Es lus Trans e uL Ge Ve m y CLR Da 8 7 106ms Lu FIGURE 4 1 Latch Enable 4 8 Microcomputer Memory The microcomputer utilized in the 181 uses partial Memory decoding The address lines A11 A12 Ald and A15 determine whether the EPROMS 0102 and U103 VIA AU 110 IEEE 488 U131 RAM UTOB Or swilch port is selected for use Direct memory addressing can be utilized because the 6810 U108 and 6802 U109 RAM are located in lower 256 bytes When A12 A14 and A15 are a logic 1 and the EPROMS are selected A11 determines which of the two EPROMS is enabled The lower 2 bytes of program memory are con tained in EPROM U103 the upper 2k bytes of program memory are located in EPROM U102 The program contained in these two chips is actually located in DOOO DFFF However it also appears to the microprocessor at FODO FFFF because of the partial memory decoding mentioned earlier This permits the Vectors to be decoded at FFF7 to FFFF TABLE 4 1 MICROCOMPUTER MEMORY MAP Hex Address FEFFE FREE Restart Vector FFFC FFFD NMI Vector not used FFFA FIER Software Interrupt Vector 8 8 IRO Vector 0000 Program Memory C800 Switch Port 8000 8007 IEEF 488 4000 VIA 0080 QOFF 6810 RAM 0000 007F 6802 RAM 4 9 A D Converter Contro
79. in 7 Read 1V Source of Q304 Select 200V range Apply 100V to input Read 1V Select 1000V range Read 1V R310 wiper 5 13 MAINTENANCE 5 33 Digital Troubleshooting 1 6 Monitor the clock on the 2 Line Pin 37 or U109 for a 1MHz square wave Monitor the clock on Pins 38 and 39 of U109 for a square wave Check the Reset line Pin 40 of U109 It should be logic Hi Display will be blank if the Reset line is a logic LO Check CA2 Pin 39 of U110 for clear pulses at a 1 2kHZ rate Check CS Pin 23 of U110 for U110 to be accessed with a low true signal If CS2 is not accessed with a low true signal then check the address lines A11 A12 A14 and A15 on U101 to seo that they are switching between OV BV If the ad dress lines are switching then check U101 Check the VMA line Pin 5 of U109 Pin 1 of U101 to see that it is switching between OV and BV PC 526 TOP VIEW Q413 30805 BOTTOM VIEW 1 Drain 2 Gate 3 Source MODEL 181 7 Check IRO for a logic low every 8334 seconds 1 2kHz rate NOTE If the previous troubleshooting checks reveal no problem then the unit must be returned to the factory for repair This is due to the complexity of the troubleshooting equipment required 5 34 3413 Installation Use Figure 5 23 to install the matched J FET pair Keithley P N 30809 in PC 526 Figure 5 23 Q413 Installation MODEL 181 RE
80. io Applied Expected Input Reading This is the reading to expect on the 181 when 900000V 15 applied from the calibrator into the divider and the divider resistances turn out to be as the example shows Adjust R409 to obtain the calculated reading 25 digits Be sure to allow sufficient settling time for the instrument E Dial the output of the calibrator to n output of 0 000000 Allow the instrument to settie Check to see if zero has changed The input connector thermal EMFs may or may not have settled so Zero may not be the same If zero has changed rezero and repeat Step D unul the result is repeatable 5 3 MAINTENANCE 20 Millivoll Range A Select the 20mV range and rezero the 181 B Repeat Step 3D except for a calibrator output of 19 00000V and adjust R410 for the reading calculated 4 10 digits 5 200 Millivolt Range A Select the 200mV range B Connect the DC calibrator Kelvin Varley Voltage divider and 181 as shown in Figure 5 6 C Dial the DC calibrator to 0000000 and press the zero button on the front panel D Dial the Kelvin Varley Voltage Divider to 0100000 and the DC calibrator to 1 900000V Adjust R411 for a displayed reading of 190 0000 10 digits This completes tho full calibration of the 181 If calibration cannot be accomplished proceed to troubleshooting information in this section DN 0o Oo DO HI LO GND HI LO 1506 Cable 9 666568 1 00000
81. is turns the unit ON With the cal cover installed allow four hours warmup timo The four hour warmup time allows the 181 to achieve optimum drift performanco 2 Connect LO lead of the DC calibrator to earth ground Connect the output of the calibrator A to the banana jack inputs Vollage Ranges on the 181 No input leads are to be connected to mV input 3 Dial the DC calibrator to ZERO Select the 2V range Press the Zero button Check the Front Panel to see that the Zero MODEL 181 LED is lit Dial an output of 1 90000V on the calibrator Adjust R316 on the Analog Board until the display reads 1 90000V 1 digit Take note of the reading 4 Press the ZERO button on the 181 twice to rezero the instrument Reverse the polarity of the input Dial an out put Of 1 90000V on the calibrator A Make sure the 181 reads the same as in Step 3 3 digits If the reversal error is out of specification then Model 181s with Potentiometer R344 can be adjusted as in Step 5 For 181s without R344 and out of reversal error specification refer to the troubleshooting section 5 Adjust R344 until the reading is the same as in Step 3 t3 digits 5 8 10Meg Adjustment 2 Adjust R314 for the center of its span When a problem is en countered adjustment runs to the limit of its span during adjustment of step 3 4 or 5 use R314 to bring the adjustment on range Then go back and recalibrate the 20V 200V and 1000V ranges 5 9 20V Rang
82. j LI 2 el ICID 4 Nab Oo ODD 39vc LH NOI1238 Wa o q gt o U O e z CN ERRANT esi 2su 152 D a c a e Me eg I scali Le Lieu B DA SE ATE o RU CA bi oy NOdd 3 EA AS CI 21 tw Om lt NOY OR A N gt s ip aenooonoaodgdadtddddddd Si m z 4353 Out Pa Ou HI f O 43 w oo t I ads 8 8 1 v i B O 10 Al dI 259 3 P 2 IRA zd 0 Res 1 senes 53 ae O IH TAA I LES 2 j 28 01 2 an SS E T 2099 v 600 49 m um A 50 Em DIER 59 D ES 021 23 8012 o 8 ed NND C eG o e AS iq Ges do HN da 7 bOIM 22 AS DUI 13538 30583D a v Hy exc CE 9 159 TOP COVER SSS 30540 TOP COVER SHIELD 617 322 REAR SHIELD 3080 NANOVOLT PRE AMP BOARD 526 GROUND CLIP 181 304 FRONT CAN 30808 TOP SHIELD 30882 CASE BOTTOM SHIELD 181 302 ANALOG BOARD 529 FRONT
83. l During the theory of operation of the A D converter control il will bo most helpful to refor to the Schematic Diagrams 4 2 MODEL 181 30583D Sheet 2 of 2 and 305850 The digital control circuits of the 181 A D are located an Schematic 30583D Sheet 2 of 2 while the circuits that they control are located on Schematic 30585D The conversion from analog data to digital data begins with the integration cycle Refer to Figures 4 3 and 4 4 An inte gration cycle begins with the appropriate signals to the input amplifier and preamplifier enabled by one or more of the 51 thru 12 lines going to a logic 1 The charge balance line will go to a logic 1 after the microprocessor waits for the input to settle The D input of U122A also goes to a logic 08 is gated to U123B through U127B This clears the 16 bit counter U123B The Q output of U122A will enable the input signal to the integrator on the next rising edge of the 2 5kHz clock The microprocessor waits 16 66 milliseconds the inte gration period for 60Hz 20 00 milliseconds for 50Hz then the charge balance start line goes to logic 0 At the next rising edge of the clock the Q output goes to a logic 1 again This will disable the input to the integrator and ends the exact 16 66 millisecond integration period Charge Balance Flip Flop 18 5 La Input Disable Shift Register 2 5kHz___CK Single Siope Single Slope Flip Flop Start Stop Single
84. lifier Item H of Table 5 1 Set the gain to 1000 and the bandwidth to 1 30Hz An X1 shielded probe is recommended for use The output of the Model 1201 premaplifier should be plugged into an oscilloscope The oscilloscope can then be set to the desired sensitivity e g 10V on scope 10mV referred to the input It is not uncom mon to have 60Hz pickup superimposed on the noise waveform The 60Hz can be ignored as long as it is low less than 200 p p referred to the input 5 20 Preamp Noise Troubleshooting Checks The Nanovolt Preamp operation is explained in the Theory of Operation is recommended that the troubleshooter read the Nanovolt Preamp section of the Theory of Operation before troubleshooting the Preamp Table 5 6 is a step by step pro cedure to breakdown and isolate the problem 5 21 Checks of Preamp Zero A Select 2mV range Short the mV input with a low thermal shunt B Monitor U404 Pin 7 fora reading of less than 2V If Pin 6 is within 2V proceed to Step 2 If Pin 7 is greater than 2V reselect R423 and R424 per the following procedure 5 8 TABLE 5 5 DISPLAY Item Component i Required Condition _ _ Remarks _ Turn on Powor All voltages referenced Select 20mV DC range to Analog Output Low Short input 2 U203 Pin 14 5 Volts 4 596 If Low Chock Per Table 5 2 3 U203 Pin 8 TTL level Square Wave at 1 2kHz Clock for Display Rate 4 U203 Pin 1 TTL level digital pulses 5 U203 Pin 3 4 5 6
85. nati OH 45242 Siemens Corn Iselin NJ 08830 25088 Siqnetics Corn Sunnyvale CA 94086 18324 Sprague Electic Co Visalia CA 93278 14659 Superior Flectric Bristol CT 58474 Synertek Santa Clara CA 95051 Texas Instruments Inc pallas TX 75231 01295 Teledyne Mountain Vinw Ca 94040 15818 TRW Electric Components IRC Boone NC 28607 1150 United Chemi Con Inc Rosemont IL 60018 Victoreen Instruments Cleveland 44193 Table 6 6 Parts List Additions Schematic PC Board Circuit Dwg No and Item No and Keithley Desig Description Location Location Part No Choke Rear Panel Assembly 30585 A1 PC 529 Line Sr 0583 4 Choke 30583 D5 PC 531 224 G6 Pin 30585 A1 PC 529 129 B1 Pin 30585 A2 PC 529 130 A1 Connector 30586 PC 526 34 C3 Zener Diode 30586 A1 PC 526 120 D3 Zener Diode 30586 A2 PC 526 121 D3 Integrated Circuit 30586 D1 PC 526 110 C3 Integrated Circuit 30586 D5 PC 526 112 C3 6 14 519 pud mets oe ry VRADS Caig B Vie A0 U efe gt tea Sows ok i yL Ce I E aa us te 3 SL ADT a DAG lt BB CN AS LAI Se At ESL Ee Fa Kat 5 Kine S m d H MN d E a a e ER
86. ng 5 30 IEEE Bus Circuit Troubleshooting ya ER YN WAG DY A AN e 5 31 D A Circuit Troubleshooting A AN ss ad A UV Ae ER aa 5 32 Switch Input Section Troubleshooting 5 33 Digital Troubleshooting emp Gag i O RG op Si ede sorbet KR eee Y Sa 6 Replaceable Parto Ges per Oh Os CRGO I i 6 1 O iii e ROTTI 6 2 Ordering Information RARA YNYD YS 6 3 107 Sorice rmm 6 4 Component Layouts ovi edat cria ps 6 5 M MS Tu YU oo eae E Appendix A E EE Eege ed HERS 1 11 FIGURE 4 4 4 11 4 10 4 12 4 13 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 5 10 5 11 5 12 5 13 5 14 5 15 5 16 5 17 5 18 5 19 5 20 5 21 5 22 6 1 6 2 6 3 6 4 6 5 6 6 6 8 6 8 LIST OF ILLUSTRATIONS FIO PANEL RR R ar Paneli ee GOD uu asum IS aw he een DDA Model 1489 uu su akuy a asa QG ua a Vi Su yaa wu Qusa mE Model 1485 1 Model 1486 aaa aa a lli Mod l 1488 WEE 5 6
87. of VR403 and VR404 is approximately 100 ohms The key to maintaining low current noise in the drain circuit of Q413 is the selection of a low noise high gain device for Q414 and maintaining low emitter and base impedances over the bandwidth R431 R432 and R433 provide bias for O414 and are referenced to VR for low noise contribution Noise contribution from the second stage depends upon drain loads of O413 gain of the first stage and input noise of the second stage O412 is a precisely matched low noise amplifier tran sistor pair which act as the second stage for the 181 preamp In addition to low noise this transistor pair 0412 is required because of its high CMRR performance 4 18 Linearity and Gain In a differential DC amplifier nonlinearities in the input stage provide the limitation to gain linearity under the closed loop condition In fact no amount of loop gain can cancel these nonlinearities The input FETS are square law devices which means the output current varies as the square of the Vos In order to cancel this nonlinearity a second FET is used as load to the first FET differential pair The degree of linearity depends upon the matching between the two devices The total amplifier loop gain must be kept high so that closed loop gain is independent of open loop gain This eliminates problems with gain drifts due to time temperature variations inside the loop To maintain stable closed loop gains of 1000 2mV ran
88. or for the Mode 1485 The Model 1486 contains gold plated tellurium copper pins This connector is specially manufactured by Keithley Instruments It can be used to construct a custom length low thermal cable to connect the 181 to the particular measurement set up 7 po easur FR PR DE A EV sz 2 now Aun 7 r Figure 2 3 Model 1486 2 6 Model 1488 Shorting Plug The Model 1488 is useful for checking proper operation and for calibrating the Model 181 Its electrical and thermal construction minimizes errors caused by thermal EMFs The Model 1488 is very useful for checking the Model 181 s offset and drift Figure 2 4 Model 1488 2 7 Model 1503 Low Thermal Solder and Flux fect a s consists of flux and 4 ounces of cadmium solder iis atest to solder connections for iow voltage megsurermer ts Figure 2 5 Model 1503 2 8 Model 1506 Input Cable The Model 1506 is a taxia 1 2M 4 ft cable designed to provide excellent shielding for the sensitive input connections to the Model 181 it has a low thermal connector and two copper alligator clips One Model 1506 is supplied with every 181 Figure 2 6 Model 1506 2 9 Model 1507 Input Cable The Mode 1507 a teaser 1 2M 4 ft cable lt is similar to tus Model 16506 tat os terminated with copper spade tugs 2 1 ACCESSORIES 2 10 Model 1815 Maintenance Kit The Model 1815 5 Model 181 Maintenance Kit that consist of a
89. other end of the probe to the input of the Ithaco Low Noise Preamp Connect the output of the Preamp to the oscilloscope A low thermal connec tion is not necessary here MAINTENANCE B Adjust R412 until AC pumpout 1 1000H2 B is Jess than 2mV p p 2 Gain The test fixture 1000 to 1 divider for gain adjustment mist have low thermal connections to the nanovolt preamp A precision 1000 to 1 divider is recommended so that a standard DC calibrator can be used UM IMV out 3 2 Millivolt Range 9 Measure the resistors in the divider separately uss the 5900 ton 90 day spec Fake note of each resisTaece arg use the following formula to get an exact fanu Lesser Resistance a AE E Lesser Resistance Greater Resistance Rato For Example Lesser Resistance 990 Greater Resistance 100 7 99 99 100 02K 0009888 Ratio B Connect the DC calibrator 1000 to 1 divider and the Rl as shown in Figure 5 5 Allow approximately one minute for thermal EMFs to settle out Turn HI RES on Model 181 332D FIGURE 5 5 Preamp Calibration C Select the 2mV range Dial the OC calibrator to 0 0000 and press the ZERO on the front panel of the 181 D Apply 1 90000V to the divider box Allow the 181 to settle Now take the ratio just calculated and multiply it by Full Scale which will be applied by the calibrator For example 0009888 x 1 900000V 1 8 8 2 Rat
90. r speed and is 4 milliseconds The zero is then in tegrated by the A D The reason the filter must shut off is so the A D can record amplifier zero right after it records signal By keeping the time delay between signal and zero as small as possible effective noise and drift are reduced to the desired level Concurrently filtering of normal mode signals is accomplished only when needed when looking at the signal The first pole is formed by R416 C407 and 0409 The on resistance of 0409 maintains closed loop gain at all fre quencies greater than 10 which maintains amplifier stability The second pole is formed by C406 R406 and 0407 it is buf fered from the third pole by U401B The third pole is formed by R401 C403 and O405 All three poles have the same ume con stant of 10 milliseconds U401A buffers the output of the third pole Buffers U401A and U401B are bootstrapped in a similar fashion to the input amplifier VR401 and VR402 provide the 6 2 reference and emitter followers Q401 and 0402 supply the current to U401 R407C and R407D bias the references The effect of this bootstrap is to provide higher CMRR to U401 therefore improving linearity The bootstrap circuit adds a pole 0 the frequency response of 114018 The dominant pole formed by R407A R4078 C404 and C402 maintains stability of the bootstrap circuit Q403 and 0404 are low capacitance FETs used as diode clamps to the bootstrap circuit to prevent latch up resulting
91. s The information is updated at a 1 2kHz rate which means each digit is on for 833 microseconds Each up date begins by presenting new segment information on the VIA 1 0 bus PAO PA7 and outputting a clock pulse on CA2 The clock pulse goes to U203 which is a shift register on the display board U203 shifts a digit enable bit to the next digit to be enabled Every eight times the display is updated a digit enable bit is generated at PB5 and goes to the enable data input of the shift register V201C V202B and V202C drive the rows of the switch matrix The switches are arranged in a 4 by 4 matrix eleven of which are used The columns of the switch matrix go to Bits 0 3 of the switch port The switch port is located on the motherboard in Schematic 30583D Sheet 2 of 2 Section E5 The segment drivers are 3201 3206 In addition to driving the various segments they also activale the appropriate LED s 4 15 D A Converter The heart of the D A section is U117 shown on Schematic 30583D Sheet 1 of 2 It is a standard 12 bit D A converter Data for the D A is multiplexed with the display data and is latched into U116 This data is converted into an output cur rent U118 is configured as a current to voltage converter Capacitor C110 compensates for output capacitance of U117 The output voltage from U118 swings from OV to 10V since output current flows through RF which is internal to U117 AD7541 bits off yields OV output at U
92. s WARNING will be used throughou the manua whenever a danger exists that could result in personal injury O death There is also an explanation of the potential danger tha exists This CAUTION will be used throughout the manual whenever a hazard exists that could damage the instrument The symbol AN on Ihe instrument denotes rat Mes usen should refer to the operating instruc bors The symbol N On the instrurnent detigtes hot un more may be present on the Ternaralis TEMPERATURE COEFFICIENT MAXIMUM NMRR t 9brdg digits C INPUT ALLOWABLE LINE 0 18 C 28 36 C RESISTANCE INPUT FREQUENCY 0 002 3 d 120V 9048 0 002 0 59 120v gt 8068 0 002 96 0 120v 8066 0 000796 0 24 1000V 60dB 0 000896 0 29 1000V 6068 1000 1000V 0 000896 8 0 001296 0 26 When properly zeroed 10 seconds maximum 35V rms continuous Accuracy 0 15 of displayed reading 1 Time Constant 400ms Level 2V full scale on all ranges X1 or X1000 gain ISOLATION Input LO to Output LO or power line ground 1400V peak 5 x 105VeHz greater than 1099 paralleled by 1500pF WARMUP 1 hour to rated accuracy when properly zeroed ENVIRONMENTAL LIMITS Operating 0 C to 35 C 0 to 80 relative humidity Storage 25 C to 65 C POWER 105 125V or 210 250 internal switch selected 50 60Hz 30VeA maximum INPUT CONNECTORS Special low thermal for 200mV and lower ranges Binding posts
93. s action turns on the signal mux FET 0419 and turns off Q420 200msec delay time ts allowed because of the preamp NMRR filter After 200msec signal integration is performed by the microprocessor controlled A D converter few milli seconds must elapse after integration is finished before Q419 can turn off and Q420 turn on Once this zero FET is turned on 0420 only 4msec wait is necessary because the filter has also been switched off The zero integration is then performe by the A D A few milliseconds after preamp zero is completed auher S3 or 54 is turned on H after the previous preamp cycle S3 is turned on 54 will turn on this lime and vice versa After Amsac amplifier delay time allowing USOT to settle either an A D zero or an A D cal integration will be performed Once all four inteqrations have been obtamed the updated reading can be calculated from Veg Venio Reading Viet VA2D Zero Each integration is performed over a one line cycle 16 66msec for 60Hz 20 0msec for 50Hz A total of four readings per sec ond are obtained in this manner Considering V ranges the sequence is exactly the same except that 0306 off Instead the appropriate signal FF Tos turned on depending on range Refer to Table 4 4 a 4ms Input Disable OFF s 1 c 16 66ms OFF pt FET ON opt 5 A D Zero FET Sg Preamp Out ON RES E ams OFF d FET Du mmy i d 0 FIGURE 4 8
94. s one hour to stabilize a unit that is 10 C 18 out of the specified temperature rango 11 takes approximately fous hours warm up for optimum drift performance 3 6 DC Voltage Accuracy Check 2V to 1000V Range CAUTION Do not exceed maximum allowable input volt age Instrument damage may occur Maximum allowable input s stated in the specifications A Dial the DC cahbrator to 0000000 and connect it to the mwc five way binding posts on the Front Panel of the 18 B Select the appropriate range as given in Table 32 Sers the range manually by pressing the appropriate front pane button or select the range automatically by issuing the appropriate command over the bus C Zero the 181 by pressing the ZERO button on the Front Panel or by issuing the appropriate command over the Dus D Set the calibrator to the value given in Table 32 Semi n each range and apply the required voltage as specified Table 3 2 Venfy that the displayed reading is within the Allowable Reading Note the readings Obtared on each range Set the DC calibrator to 0000000 Reverse the input leads G Zero the 181 by pressing the ZERO button or the front Panel or by issuing the appropriate command over the bus Repeat Step D Verify that the displayed reading 5 the same as in Step D 3 digits i nD D BDCZ 3220 Ut HI 7 i Figure 3 1 DCV Performance Check TABLE 3 2 DC VOLTAGE PERFORMANCE CHECK 2V to 1000V
95. s with the Single Slope Start line setting the D input of U122B to 1 On the next rising edge of the 3 84MHz clock it is now inputted to the 4L S393 where it is counted similar to the charge balance phase The single slope phase ends when the comparator goes to 0 and gates off the 3 84MHz clock from the counter The remainder left on the counter is again read as in the charge balance phase This result is added to the charge balance counts to generate the 24 bit result 3 84MHz Single Slops l i 1 1 Single Slope Single Slope Comparator 1 1 I 1 1 i I Integrator N I Waveform I Strobe Pulses aF Remainder FIGURE 4 4 Single Slope Timing THEORY OF OPERATION 4 10 A D OPERATION The A D operates in two phases first the charge balance phase C8 and the single slope phase SS Figure 4 5 shows Charge Balance Phase A CB phase started atto O wier the input disable is released connecting 1 to the integrato and Vo ramps positive The D flip flop acts as a comparator and provides timing and control After Va exceeds the D threshold of U301A Ol goes high at a positive qon coma edge At the next clock edge negative going Q goes high ang connects IcB to the integrator HWH is greater han Zei maximum so that Vo immediately ramps negative Qe is iow at this time which set and holds Qi low At the next negative going clock edge 1 cycle later Q goes low again turning
96. switches are located next to the Bus Connector The primary address switches not only select the primary address but they also permit seiecuon of 31 primary talker listener address pairs Binary 11111 15 reserved for Untalk and Untisten commands To address the 181 tne IEEE 488 controller must send the primary address of the 181 NOTE The primary address is updated only upon power up In reference to the Schematic Diagram 305830 it is clear that U 131 is the heart of the IEEF chip which is capable of perform ing all IEEE Talk Listen protocols The data lines are DE through D7 The tri state IEEE Bus buffers U133 and U124 are used to drive the output The data is buffered by U133 and U134 and is transmitted to the Bus by connector J1006 The thick film resistor network R131 provides the necessary puli up resistors for the primary address switch bank 5103 The pro cessor reads these switches and then knows which Talker and Listener address to assign the 68488 chip and thus the 181 This section is accessed with ASE This signal is derived from the 68488 chip and enables the tri state buffer J132 placing the address on the data bus DO 05 4 7 Digital Section During the theory of operation of the digital section d wdi De The digital section of the 181 has a power on reset circuit which resets processor U109 the versatile interface adapter VIA U110 and the IEEE chip U131 upon power up to insure proper system operation The Reset line prov
97. t louis MO 631 Coto Coi Co Inc Providence RI 02905 Continental Wirt Warminster PA Motorala Semi Products Inc Phoenix A7 28 Murata Coro of America Elmsford NY 10521 CTS Corporation Elkhart IN 46514 National Semi Corn Santa Clara CA 94086 Dale Electronics Columbus NE 68601 Inc CA 91776 Flectro Cuhe San Gabriel NEC Microcomnuter Inc Lexington MA 02173 Nichicon Corp Chicago IL 60645 Electronic Devices Inc Yonkers NY 10710 EMC Industried Inc Hatboro PA 19040 Nytronics Components Group Darlington 29532 Erie Technological Prod Erie PA 16512 Pattison Sunnly fo Cleve and OH 44125 Pomona Flectric Pomona CA 91766 Fairchild Instruments Mountain View CA 94043 Precision Resistive Products Mediapolis JA 53217 General Electric Co Syracuse NY 13201 FEDERAL REPLACEABLE PARTS SUPPLY CODE 81973 50444 12293 15238 806 76915 9021 8003 272 4 76541 047113 51406 27014 28088 13324 3125 15818 052786 6 13 REPLACEABLE PARTS MODEL 181 TABLE 6 5 Cross Reference of Manufacturers MFR FEDERAL CODE NAME AND ADDRESS SUPPLY CODE RCA Corporation Nashville TN 37207 Richey Nashville TN 37207 Schuster Electric Co Cincin
98. tored in the senal register SR of the VIA and automatically clocked through the optical isolators usina the clock CB1 and data CB2 lines of the senal port Another eight bits of data are sent in a similar fashion Fhe strobe bne PB7 is brought LO then HI again to latch the data into the output of these registers 4 13 Clock Circuit The 3 84MHz clock is a Pierce oscillator using 1101 as the gain element and a 3 84MHz crystal Y 101 as the feedback element L101 and C119 act as a parallel resonant load R124 R125 and C122 provide appropriate level shifting compatible with the TTL input of U127C The output of U127C provides a buffered TTL compatible 3 84MHz clock with 123A which runs the charge balance circuitry within the A D The 2 4kHz clock is obtained by further dividing the 3 84MHz clock with U123A and U125 This clock is used to provide an exact 16 66 milisec ond or 20 millisecond window and provides the interrupts for the microprocessor and the reference timing for the Reset and Transient Recovery circuit 4 3 THEORY OF OPERATION Input Disable Integrator SS Enable MODEL 181 Single Slope Comparator C B Comp Timing To Counter FIGURE 4 5 Charge Balance Single Slope Phase 4 14 Display During the theory of operation of the Display it will be helpful to refer to the Schematic Diagram 30584D The display information is outputted on PAO through PA7 on the VIA 1 0 bu
99. use replacement procedures are provided Calibration should be performed yearly every 12 months or whenever 24 hour specifications are desired or whenever performance verifi cation see Section 3 indicates that the Model 181 is out of specifications if any step in the calibration procedure cannot be performed properly refer to the troubleshooting nfor mation in this section or contact your Keithley representative or the factory NOTE Because of special handling expertise and equipment that is required it is strongly recom mended that the 181 be sent back to the factory for service and or calibration WARNING All service information is intended for quali fied electronic maintenance personne only 5 2 Recommended Test Equipment Recommended test equipment for calibration 15 listed in Table 5 1 Alternate test equipment may be used However the accuracy of the alternate test equipment must be at least three times better than the Model 181 specifications or equal to Table 5 1 specifications 5 3 Voltage Divider The Voltage Divider B recommended is not readily available on the commercial market The following information is pro vided in order that this divider may be constructed MAINTENANCE 5 Maintenance TABLE 5 2 VOLTAGE DIVIDER PARTS LIST Keithley EN Part Number Description BP 11 0 Black Binding Post BP 11 1 Red Binding Post Model 1485 Low Thermal Female Input Connecter N A 100k 01 10ppm C
100. v OUT WHEN DISPLAY READS OFLO ANAL OC OUT 2v RANGE 3 1 90000V FS 2 000v OUI WHEN DISPLAY 200V RANGE READS OHO 160 000v EN O 5 O 20V RANGE 19 0000V ADJ FOR CENTER C READJUS IF E 4 on E ARE OUT OF RANGE 1000 RANGE 1000 00V O CAUTION MAINTAIN LOW TERMINAL AT GROUND POTENTIAL WARNING DISCONNECT LINE CORD BEFORE SERVICING USE INSULATED TOOL FOR ADJUSTMENTS FIGURE 5 7 Model 1815 Calibration Cover This is what the top of the calibration cover looks like Follow the procedure and locate the adjustment as shown above 5 5 MAINTENANCE TABLE 5 3 MODEL 181 POWER SUPPLY CHECKS _Item Component Required Conditions Remarks 102 Line Switch Must be set to F101 Line Fuse J1101 Line Cord Continuity Plugged into live Outpul of U128 Input of U128 Output of 1129 Input of UT29 Output of U130 Input of U130 Output of U137 Input of U137 Output of U136 Input of U136 Cathode of CR101 or Collector of Q105 Input of U135 Emitter of Q105 F5VDC 4 596 4 7 6V Minimum 15V 5 17 9V Minimum 15V 5 17 8V Minimum 15V 5 17 8V Minimum 15V x 596 17 9V Minimum 5V 5 14 25V Minimum 6 7V Minimum 115V or 230V as appropriate receptacle Turn on power BV Analog Supply input of 4 BV Reaulator 15V Analog Supply Input of 15V Regulator 15V Analog Supply Input of 15V Regulalor 15V

Service Manual Model 181 Digital Nanovoltmeter

Contents

Download Pdf Manuals

Related Search

Related Contents