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Series 12000A Microwave Synthesizers - Giga

1. 4 11 4 7 Microwave Signal Conditioning Subsystem 6 7 4 15 4 7 1 4 15 4 8 Interface Assembly AT 7 acies ecd HA EEEa RE EEEN RAN 4 16 4 9 Down Converter AS fics aa den ca aetate qa Desks deans ada pae van ch aeu Cg dud 4 17 4 10 Automatic Eevel Control ie ded te Re de E RE T Ra 4 10 1 General Architecture eect ded ue dur eria dug oa cid al 4 10 2 CW Operation 5 ide deve rase rye eave ux andes dex orans idu qa V ais 4 10 3 Linear AM Operation 4 10 4 Logarithmic Scan AM Operation 4 10 5 Pulse Modulation PM Operation 4 10 6 Digital Communication Controls and Calculations 4 24 5 Replaceable Parts 5 1 12000A Replaceable 5 1 6 Troubleshooting 6 1 12000A Fault Isolation scence tetti EIE REN eae aes 6 1 Index Series 12000A Microwave Synthesizers Index Index 1 Manual 31232 Rev A7 October 2003 Preface List of Figures Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 2 6 Figure 2 7 Figure 2 8 Figure 2 9 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 4 1 Figure 4 2 Figure 4 3 Figure 4 4 Figure 4 5 Figure 4 6 Fi
2. Is pulse totally Modulation Modes Continued Series 125XXA 127XXA Only Verify input signal if Yes OK then repair replace i ive inoperative Y Is the pulse shape the ek Repair replace A6 A8 problem 17 Note 15 Is pulse on level RORIS Yes gt occur above amp below Yes Repair replace accuracy the problem 2 GHz Y Does the problem Yes occur above I Yes gt Repair replace A17 2 GHz No Note 16 Is pulse on off ratio tr the problem Repair replace A3 A8 Yes Note 17 Does the problem occur above amp below Yes Repair replace 2 GHz Does wid problem Repair replace A3 A6 occur above Yes gt A17 2 GHz Y Note 18 Repair replace A3 A8 Note 19 Publication 31232 Rev A7 October 2003 Troubleshooting Notes Note Description for Series12000A Fault Isolation Trees 125XXAl 127XXA The referenced LEDs are located on the edge of the A4 Distribution PC board away from the power supply assembly Green LEDs indicate that the monitored power supply is on they do not indicate that the supply is within tolerance Monitors are provided for the 4 12 standby supply the 6 and 12 volt main supplies Red LEDs indicate that the corre
3. 0 01 Hz Accuracy 0 01 Hz Timebase Accuracy THD 1 Typical FM Output 2 Vp p into 1 MO Pulse Modulation Source Rate 1 Hz to 3 MHz Range Resolution 1 Hz to 1 kHz 1Hz 1 kHz to 10 kHz 10 Hz 10 kHz to 100 kHz 100 Hz 100 kHz to 1 MHz 1 kHz Rate Resolution 1 MHz to 3 MHz 10 kHz Accuracy 2 5 of range maximum value fj lt 100 KHz 4 of range maximum value fm 100 KHz to lt 1 MHz 10 of range maximum value fp gt 1 MHz Jitter Same as instrument timebase Publication 31232 Rev A7 October 2003 1 6 1 4 Pulse Start Variable Delay Referenced to Sync Output Range Specifications 0 to 1 67 seconds Resolution 10 ns Accuracy 2 5 of setting or 20 ns whichever is greater Jitter 0 01 of setting or 100 ps whichever is greater 1 6 1 5 Pulse Width Range 0 to 1 67 seconds Resolution 10 ns Accuracy 2 5 of setting or 20 ns whichever is greater Jitter 0 01 of setting or 100 ps whichever is greater Publication 31232 Rev A7 October 2003 1 25 Series 12000A Microwave Synthesizers 1 6 1 6 Pulse Modes Triggered Gated Delayed Singlet Doublet Triplet or Quadlet and Free Running Interval Range 100 ns to 1 67 seconds Resolution 10 ns Accuracy 2 5 of setting or 20 ns whichever is greater Jitter 0 01
4. 200 MHz 400 MHz 750 MHz 1500 MHz 3 GHz 6 GHz 12 GHz 18 GHz Spurious Signals Tests 2 2 3 3 Frequency MHz 770 550 Harmonics Non Harmonics 1513 425 4004 000 9182 433 17361 522 2 2 4 3 100 Hz 1 kHz 10 kHz 100 kHz Single Sideband Phase Noise dBc Hz 1 MHz 1513 425 4004 000 9182 433 17361 522 2354 1 349 RF Output Power Test Result 2 2 5 3 Max Power Level Power Level 1 0 GHz 4 0 GHz 2 2 5 4 Step Attenuator Test Frequencies 12088 17 0 GHz Publication 31232 Rev A7 October 2003 2 19 Series 12000A Microwave Synthesizers SERIES 12000A MICROWAVE SYNTHESIZERS Performance Verification Test Data Sheet Page 2 of 2 Serial Number Tested By Date Quality Assurance Amplitude Modulation Test SERIES 12500A 12700A ONLY AM Depth 10 Frequency 1 5 GHz Int Ext Int Ext Int Ext Sinewave Square Wave Triangle Wave 2 3 1 3 Frequency 10 GHz Int Ext Int Ext Int Ext Sinewave Square Wave Triangle Wave AM Bandwidth Spec 3 dB Frequency 1 5 GHz 2 3 1 4 Frequency 10 GHz Frequency Modulation Test SERIES 12500A 12700A ONLY Poor oie Deviation 5 7 6
5. 3 6 2 Amplitude Modulation Calibration DC Source Voltmeter Computer 12000A MICROWAVE SYNTHESIZER IEEE 488 Series 125XXA 127XXA Only Figure 3 3 Amplitude Modulation Calibration Connection Connect the UUT and computer to the IEEE 488 bus If the 12000A has not been previously warmed up allow 15 minutes of warm up In the Characterize section click on the Calibration box Follow the on screen prompt window for step by step instructions The steps are outlined below for convenience 1 The first step requests a zero volts input to the UUT AM connector Simply leave the input open as there is an internal 600Q resistor to ground This test calibrates any zero offset errors Since AM is DC coupled any DC component or zero error will result in a level shift Press when ready 2 When the prompt requests a 1 0 volt DC input connect the DC source to the AM input connector and monitor the AM input connector with the voltmeter Set the DC source to 1 00 volts 1 005 volts It may be helpful to put a resistor of about 6000 ohms in series with the source and the AM input This will make setting the DC source less critical as it provides a 10 1 divider Be sure to measure the voltage at the AM input connector with everything connected This test calibrates the full scale of the AM Press OK when ready 3 The next step will again request a zero volts in
6. Publication 31232 Rev A7 October 2003 4 10 3 Theory of Operation Linear AM Operation Most of the sophistication present in the ALC result from the requirement to deliver accurate carrier level regulation and low distortion high modulation index upward and downward Linear AM at all modulating frequencies between DC and 150 KHz Three significant architectural features were employed to meet these requirements 1 The servo control element sees a linear voltage control loop in both the feedback and feedforward directions This is accomplished despite the nonlinear transfer characteristics of the detector and gain control elements by the two lookup tables Therefore the instantaneous open loop RF voltage envelope is proportional to the count value entering the integrator comparator and any error in the RF voltage is proportional to comparator output and thence the rate of accumulator slew Finally the instantaneous open loop RF voltage envelope is also proportional to the accumulator count value These design measures combine to provide for low distortion closed loop Linear AM at all modulation levels and all RF carrier levels The basic Linear AM process is similar to that found in other closed loop level control systems The number representing the desired or demanded RF output voltage feeds the comparator reference input through a multiplier and the other multiplier input receives the modulating signal input When this modulati
7. 50 Q Nominal Publication 31232 Rev A7 October 2003 Specifications 1 5 5 Pulse Square Wave Modulation PM Specifications apply with Scan AM and FM off PM may be operated with FM 1 5 5 1 PM Basic Operation On Off Ratio gt 80 MHz Rise Fall Times Rise Time Frequency Range lt 10ns gt 500 MHz lt 50 ns 64 to 500 MHz lt 350 ns 25 to 64 MHz 500 ns lt 25 MHz Overshoot Undershoot amp Ringing lt 10 gt 500 MHz Settling Time to within 1 dB lt 75 for pulse width gt 75 ns Level Pulsed Output Accuracy Reference to CW Output Power at 25 10 C 0 5 dB gt 100 ns pulse width 1 dB pulse width between 100 ns and 75 ns Typical Requires a typical setup time of 100 ms after initial setting Typical Settling Time for a Series of Leveled Pulses 100 us RF will be on with TTL level demand pulse at Pulse Modulation Demand Pulse Polarity Input BNC either at high or low logic level selectable Time Between Start of Demand Pulse Video In amp Start of RF Pulse lt 50 ns Minimum Required RF OFF Time between Pulses 100 ns Publication 31232 Rev A7 October 2003 1 21 Series 12000A Microwave Synthesizers Delivered Minimum Pulse Widths Minimum Width Frequency Range 20 ns gt 500 MHz 100 ns 64 to 500 MHz 1us lt 64 MHz 1 5 5 2 Internally Generated PM Envelope See Option 24 specificatio
8. A11 CPU Board 6 2 10 8 Downconverter 6 2 11 AG A7 A17 Microwave Assembly Board The following instructions are provided to assist in the removal and replacement of the various subassemblies in the 12000A 6 2 1 Top amp Bottom Covers 1 Unplug the line cord from the instrument 2 Remove the eight screws on each cover Four at the front four at the rear 3 Lift the cover off Note that the cover has a lip on each side Lift the cover from the front or rear edge 4 When re installing the covers be sure to use the longer 4 screws at the corners 6 10 Publication 31232 Rev A7 October 2003 6 2 2 6 2 3 Troubleshooting Side Covers 1 Remove the top and the bottom covers 1 2 Remove the four 10 flat head screws located at the front and rear edges The front screws also mount the handles 3 Remove the four 4 flat head screws located on the top and bottom edges of the cover 4 Lift the cover off 5 When replacing the side covers see the following notes a For instruments without provision for rack slides the side covers are identical It is only necessary to be sure that the edge of the cover with the bent lip is at the top of the instrument b The side covers for instruments that accept rack slides are different When installed the ventilation holes go toward the top of the instrument There are three 10 press nuts to mount the slides The pair with the closer spacing g
9. Leveling Complete and Interrupt Request There is also a bi directional 8 bit data bus Publication 31232 Rev A7 October 2003 Replaceable Parts 5 1 Series 12000A Replaceable Parts Table 5 1 Series 12000A Replaceable Parts List P N Item Description 30572 A1 Synthesizer PCA 31288 A1 A1 Synthesizer Front End assembly 31542 A1 A2 Track Filter assembly 30580 A3 ALC PCA 30584 A4 Distribution PCA 30570 A6 01 20GHz Output module 30577 A7 8 20GHz Multiplier module 30596 A8 Downconverter assembly 31632 A9 Power Supply assembly 30751 A10 keyboard PCA 30755 A11 Main Processor PCA 30913 A15 Time Base PCA 30771 A16 Modulation Generator PCA 31740 A17 Interface PCA 31891 A18 Power Supply Filter PCA 31807 Upper rear mount feet 31917 Lower rear mount feet 30727 Handle MPBO 02001 Option 26 Attenuator IMC0 00002 320 x 240 LCD Module KGRO 15025 1 50 diameter knob with spinner FSAC 00200 2A SB Fuse 3AG HFBI 00014 Mount bail HFFL 63202 Left front feet HFFR 63202 Right front feet BHGO 05000 Fan finger guard BHS0 05000 Fan screen BD00 05012 12VDC 4 5 8 fan JRAB 00200 SMA Bulkhead connector JRDF 00004 BNC panel mount connector Publication 31232 Rev A7 October 2003 5 1 Series 12000A Microwave Synthesizers 5 2 Publication 31232 Rev A7 October 2003 Troubleshooting 6 1 Series 12000A Fault Isolation Trees T
10. Scan and Pulse square wave Modulation PM using whatever arbitrary modulation waveform or timing it receives from the modulation signal sources outside of or within the 12000A chassis for the Series 125XXA 127XXA models Closed loop power control of an RF amplifier subsystem can be maintained by the ALC from 20 dBm to 20 dBm Open loop power control used for Log AM can range from 20 dBm to 50 dBm When the optional 110 dB automatically controlled 10 dB step attenuator is installed the range is expanded down to 130 dBm This electromechanical attenuator permits the RF amplifier subsystem to operate between 0 dBm and 10 dBm for all 12000A output CW levels and AM carrier levels except above 10 dBm Log AM fiduciary levels range between 5 and 15 dBm Under normal closed loop critically damped operation leveling time is about 100 Useconds jamming measured saved and updated final drive level requirements as a function of 12000A output power into the integrator accumulator just before the leveling loop is closed leveling time can be reduced to a few microseconds The 12000A contains up to three RF amplifier subsystems for 10 MHz to 2 GHz A8 for 2 GHz to 20 GHz A6 A7 A17 and for 20 GHz to 40 GHz A5 Each of these subsystems contains analog RF gain control elements that the ALC uses as the final drive to control output power level At the output of each of these subsystems is a directional coupler diode envel
11. AM may be operated simultaneously with FM AM Specifications apply with FM turned off AM Envelope Parameters Modulation Depth to 90 0 dBm output power Settable to 95 0 Modulation Resolution 1 Modulation Bandwidth DC to 150 kHz 3 dB 9 0 dBm output Modulation Accuracy 10 of depth setting e g A setting of 50 may be within a 40 to 60 reading Publication 31232 Rev A7 October 2003 1 5 1 2 1 5 1 3 1 5 2 Externally Supplied AM Envelope Waveform Specifications Any waveform compatible with bandwidth considerations Scaling O V to 95 V Input Voltage Minimum 1 V Maximum 1 V p p for 50 depth 10 depth 1 kHz modulation rate Input Impedance 600 Q Nominal Internally Generated AM Envelope See Option 24 specifications in Section 1 6 1 Scan Modulation See Option 29 specifications in Section 1 6 2 Publication 31232 Rev A7 October 2003 1 15 Series 12000A Microwave Synthesizers 1 5 3 Frequency Modulation FM Specifications apply with Scan AM and PM off FM may be operated simultaneously with Linear AM and or PM PM amp Linear AM not allowed simultaneously 1 5 3 1 Wide Mode Envelope Parameters Maximum Deviation See table contained in Section 1 5 3 2 Minimum Deviation 10 kHz at 4 8 GHz Other ranges proportionally Modulation Resolution 1 kHz Deviation lt 1 MHz 10 kHz
12. Option 24 Iv CPU gt Rev F Option 36 Ive Option 29 System is 1H aigedranics mode Pause Close After the power is cycled click the Read button under Parameter Block prior to doing the frequency response to verify the new date and time for the Modulator in the Characterization Publication 31232 Rev A7 October 2003 Calibration 2 Now press the Detector Linearization button The monitor screen will now show the power meter readings if that mode is selected In addition the bottom lines of the main window will show the test being performed and the readings as they are taken This process will take about 20 minutes for 01 to 20 GHz instrument 3 After the Detector Linearization is done the frequency response calibrations may be performed Instruments with Option 26 Attenuator require two calibration runs one at 5 dBm the other at 5 dBm Instruments with Option 20 require an additional run at 16 dBm The level is selected in the Setup area of the main window Measurements taken at 5 or 5 are known as Low Power The one at 16 is High Power For units without Option 26 i e no Attenuator enter 1 in the RF Box under setup NOTE You must press Enter after changing the RF level parameter fj 12000A Cal version 3 38 19th March 2002 View Check Connection Setup GPIB Addresses 12000A Unit Power Meter fio Freq Counter Pad dB 0 RF Low P
13. Start amp Stop Freq Resolution 0 1 Hz Standard 1 kHz Option 36 Minimum Sweep Width 100 Hz Standard 1 MHz Option 36 Maximum Step Width From the minimum frequency to the maximum Frequency of the Series 12000A as configured Sweep Width Resolution 0 1 Hz standard 1 kHz Option 36 Sweep Time 1 ms to 200 sec Sweep Time Resolution 10 us Minimum Sweep Rate 100 kHz sec Maximum Sweep Rate 8 ms octave Sweep Linearity Better than 0 03 of sweep width relative to the 0 V to 10 V Ramp Output BNC voltage Swept time 100 sec Typical Sweep Modulation Formats AM or Pulse Modulation Publication 31232 Rev A7 October 2003 1 11 Series 12000A Microwave Synthesizers 0 to 10 V Ramp Output Vout 10 V fout fstart fstop fstart Frequency Ramp sweep mode Vout 10 V Pout Pstart Pstop Pstart Power Ramp sweep mode Vout 0 to 10 V ramp 8 current set sweep rate Ramp during CW mode 0 5 GHz Output Vout 0 5 V Fout in GHz Sweep Modes FA lt F1 F2 lt FB Start Stop Sweeps up or down from a preset start frequency F1 to a preset stop frequency F2 StartlA FA lt F1 AF lt Sweeps up or down from a preset start frequency F1 through a preset sweep width AF FA lt CF AF 2 lt FB CTRIA Sweeps up or down through a preset sweep width AF centered symmetrically about
14. Synthesizers Due to variation in components on the ModGen board the delays for the three counters used in pulse modulation can be inaccurate These inaccuracies can be minimized by the software in the ModGen device driver Each counter must be calibrated individually Calibration is achieved by setting the counter of interest to a known value and allowing it to count down At the same time the number of clock cycles from the on board 10 MHz reference is monitored When the counter counts down to zero the number of 10 MHz clock cycles is compared to an expected value The difference between the original input value and the measured value is used to derive a calibration factor used by the ModGen device driver software 3 7 2 Equipment Required UUT 3 7 3 Software Any version of the Series 12000A Microwave Synthesizer firmware greater than VO72 B48 18 is sufficient Note that the menus for calibrating the ModGen option will not be visible if the board is not installed 3 7 4 Procedure 1 Turn on the Model 12000A Microwave Synthesizer 2 Allow the boot process to complete 3 Press the CONFIG key in the System group on the front panel 4 Press the Service softkey 5 Press the Mod Gen Testing softkey 6 Press the PM softkey 7 Using the cursor keys highlight the delay counter Start Pulse Interval you wish to calibrate 8 Press the Start Cal softkey This completes the cal process for the selected delay counter 9
15. but the gain control elements and other aspects of the RF amplifier subsystem and RF source offset drifts with temperature and time Therefore each time the AM ON switch is actuated the system first switches briefly to CW and a closed loop single point calibration is performed at the fiduciary level This offset calibration is performed each time the 12000A carrier frequency and or fiduciary power level is changed Publication 31232 Rev A7 October 2003 4 10 5 Theory of Operation Pulse Modulation PM Operation The RF output level for PM Square Wave Modulation is entirely under closed loop control but there are several differences in the way this control must be effected The pulse timing when the RF output is on or off is independent of the method used to control the output level The digital demand pulses from the external source or optional internal Modulation Generator directly operate the set of RF on off switches in the RF amplifier subsystem In CW and Linear AM operation the 12000A is delivering RF at all times so the feedback signal is automatically always present at the envelope detector and the RF Leveling A D converter input For PM however a feedback signal is present only while the RF pulse is on which for very short pulses such as 50 nSec can be an extremely short percentage of time Therefore special circuitry is needed to capture detected pulse level and hold it a long enough time for the control syst
16. the YIG driver to coarse tune the YIG and the FM coil to close the loop the YIG DAC is not used and the loop voltage is fed to the main coil via the remaining driver circuitry This permits ramp sweep to operate by stepping the frequency in very small sub hertz steps at a high rate of speed Publication 31232 Rev A7 October 2003 4 4 7 1 4 7 2 4 7 3 4 7 4 4 7 5 4 7 6 Theory of Operation Microwave Signal Conditioning Subsystem A6 A7 Microwave Signal Conditioning Subsystem A6 A7 4 7 1 Output Module 4 7 2 PIN Diode Pulse Modulator NIA 4 7 3 Gain Blocks A1 A4 4 7 4 Switched Low Pass Filter 4 7 5 Directional Detector 4 7 6 A7 Multiplier 2 22 2 L 2j 2 2 A6 Output Module The output module is a wide band component 2 20 GHz that provides most of the processing functions of the microwave signal such as amplification harmonic filtering amplitude modulation and pulse modulation It can accept the 01 2 GHz signal from the optional Digital Down Converter A8 to provide 01 to 20 GHz coverage from a single test port and features a built in 2 20 GHz directional detector as part of the ALC function PIN Diode Pulse Modulator Located at the input of the module J1 this component provides high speed amplitude modulation of the 2 8 GHz signal delivered from the synthesizer module Pulse modulating the 2 8 GHz signal provides the added benefit that sub
17. 0 Adjust the oscilloscope sweep time to 5 ns div Measure and record the rise and fall times between the 10 and 90 points Repeat Step 4 for each of the test data sheet frequencies within the operating range of the instrument Publication 31232 Rev A7 October 2003 Performance Verification 2 3 5 Pulse Modulation Overshoot amp Settling Time 2 3 5 1 Description A crystal detector is connected to the 12000A terminated in 50 Q and monitored with an oscilloscope NOTE itis very important to use either the specified detector or one with similar rise time characteristics Even when terminated in 50 Q with a short cable the detector parameters can markedly influence the measurement 2 3 5 2 Equipment Required UUT e Oscillator e Pulse Generator e Crystal Detector e Coaxial Cable Oscilloscope MICROWAVE SYNTHESIZER UUT A Pulse Generator 500 INPUT Series 12500A 12700A Only Figure 2 10 PM Overshoot and Setting Time 2 3 5 3 Procedure Connect the equipment as shown in Figure 2 10 The cable from the detector to the oscilloscope should be kept as short as possible Press PRESET on the 12000A and set the frequency to the first test data sheet frequency within the operating range of the instrument Enable external pulse modulation at a 1 MHz rate and 0 5 ms width on the 12000A Press PULSE and use the softkey to turn on pulse modulation Set the oscilloscope to 5 mv div and
18. 2 Recommended Test 3 1 3 3 Time Base Calibration fee fierce runs erras Me en pred na 3 2 3 4 Output Amplitude Calibration 3 3 3 4 1 ALC Characterization Instructions cesses 3 4 3 5 Modulation Calibration 3 5 3 5 1 Amplitude Modulation Calibration sess 3 7 3 5 2 Scan Modulation Calibration sesssssssssssssssss esse eene 3 8 Manual 31232 Rev A7 October 2003 i Series 12000A Microwave Synthesizers 4 Theory of Operation 4 1 Model 12000 Theory of Operation 4 1 4 1 1 Overall System description cece cece eee eect ee eene 4 1 4 2 Power Supply Subsystem AQ 4 2 4 3 Power Distribution Subsystem 4 4 3 4 3 1 Electrical Operation Circuit Description 4 3 4 4 CPU Su bsystenm A ican cee ena celer eine enitn ne uve e Eo ue ee Re us 4 6 4 5 Front Panel Subsystem ATO crees dra eese rne ee dn nono sop are ae a e 4 8 4 6 Time Base Module Subsystem 15 4 10 4 6 1 Synthesizer Subsystem A1
19. 3 div Bandwidth 5 7 div Bandwidth 4 8 div 2 3 2 3 Deviation 5 7 6 3 div Bandwidth 5 7 div Bandwidth 4 8 div Pulse Modulation Test SERIES 12500A 12700A ONLY Frequency GHz 2 3 3 On Off 2 3 4 Rise Fall 2 3 5 Overshoot Settling 2 3 6 Accuracy 2 20 Publication 31232 Rev A7 October 2003 Calibration 3 1 Introduction 125XXA 127XXA Introduction Calibration 124XXA The Series 12000A features completely closed case calibration There are no mechanical adjustments anywhere in the instrument and all calibration is done under computer program control Prior to performing any of the calibration procedures allow the instrument to operate for at least 30 minutes The calibration process is divided into sections of related steps Each section should be performed in its entirety NOTE In order to verify performance after calibration refer to Chapter 2 The Calibration Control Program runs on a Pentium based Windows 95 98 PC The computer may use either a Capital Equipment Corporation CEC488 IEFE 488 interface or a National Instrument 488 interface Please refer to the instructions below on installing the program 1 Insert CD ROM into CD ROM drive 2 Open the Windows Explorer program by right clicking the Start button and selecting Explore 3 Select D drive for opening and reading the CD ROM
20. FPGA program file has been transmitted to the Synthesizer and the Synthesizer has responded with an error message and or a non matching data byte rather than an OP COMPLETE message and a matching data byte The contents of the Synthesizer DSP HIP status and data registers are displayed 7 Synth FPGA load opn timeout The entire Synthesizer FPGA program file has been transmitted to the Synthesizer but after 1300 microseconds no response has been received 8 Synth FPGA load opn error The entire Synthesizer FPGA program file has been transmitted to the Synthesizer and the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed 9 Synth DSP code rdbck timeout A byte of the Synthesizer DSP operational code file has been transmitted to the Synthesizer but after 65 microseconds no response has been received 10 Synth DSP code rdbck err A byte of the Synthesizer DSP operational code file has been transmitted to the Synthesizer and the Synthesizer has responded with an error message and or a non matching data byte rather than an OP COMPLETE message and a matching data byte The contents of the Synthesizer DSP HIP status and data registers are displayed 11 Synth DSP code load opn timeout The entire Synthesizer DSP operational code file has been transmitted to the Synthesizer but after 65 microseconds no response has been received 6 18 Publication 31232
21. Frequency Modulation Test NIA y 2 12 2 3 3 Pulse Modulation On Off Ratio Test NIA y 2 15 2 3 4 Pulse Modulation Rise amp Fall Time Test NIA y 2 16 2 3 5 Pulse Modulation Overshoot amp Settling Time NIA y 2 17 2 3 6 Pulse Modulation Accuracy Test NIA y 2 18 Use the Performance Verification Test Data Sheet provided at the end to record your data The data sheet is compatible with all three models ag NOTE Units that have Option 24 will have these tests repeated using the internal generators Publication 31232 Rev A7 October 2003 2 9 Series 12000A Microwave Synthesizers 2 3 1 2 3 1 1 2 3 1 2 2 3 1 3 2 10 Amplitude Modulation Test Description The output from the 12000A is connected to a discriminator The discriminator output is monitored on an oscilloscope to determine deviation and bandwidth Equipment Required UUT e Mixer Divider e Oscillator e Measuring Receiver MICROWAVE SYNTHESIZER UUT 12520A Local Oscillator Giga tronics Mixer Divider 0000 000 Series 12500 12700 Illustrated 10 dB Attenuator Measuring Receiver SENSOR IN Figure 2 6 Amplitude Modulation Test Procedure AM Depth 1 Set UUT to 1 5 GHz with level set at O dBm Connect UUT output to the Mixer Box RF input connector with a 10 dB pad 2 Connect LO Source output to the Mixer Box LO input connector Set LO frequency to 130 MHz higher than UUT
22. MHz 250 kHz lt 750 Hz gt 2 4 10 MHz 5 MHz lt 1 5 kHz gt 4 8 20 MHz 1 MHz lt 3 kHz gt 8 16 40 MHz 2 MHz lt 6 kHz gt 16 20 80 MHz 4 MHz 12 kHz Publication 31232 Rev A7 October 2003 1 17 Series 12000A Microwave Synthesizers 1 5 3 3 Internally Generated FM Envelope See Option 24 specifications in Section 1 6 1 1 5 3 4 Externally Supplied FM Envelope Waveform Any waveform compatible with bandwidth considerations Rate DC to 8 MHz Input Sensitivity Settable 1 V p p for maximum Peak deviation FM deviation control set to maximum Input Impedance 50 Q Nominal 1 18 Publication 31232 Rev A7 October 2003 1 5 4 1 5 4 1 1 5 4 2 Phase Modulation oM Specifications Specifications apply with SCAN AM and PM off may be operated simultaneously with Linear AM and or PM PM amp Linear AM not allowed simultaneously Wide Mode Envelope Parameter Maximum Deviation See table contained in Section 1 5 4 2 Maximum Resolution 10 kHz at 4 8 GHz other ranges proportional Modulation Resolution 01 radians at 4 8 GHz other ranges proportional Flatness 2 dB for rates from 100 Hz to 100 kHz Modulation Accuracy 5 relative to FM at max deviation 100 kHz modulation rate Distortion 5 1 MHz deviation Incidental AM lt 0 2 MHz of deviation Narrow Mode Envelope Parameter
23. Operation CW Operation Frequency Continued CW bevel ipo die dag ues Modulation Modes Modulation Modes Continued Series 12000A Microwave Synthesizers List of Tables Table 1 1 12000A Model Numbers Table 5 1 12000A Replaceable Parts List iv Manual 31232 Rev A7 October 2003 About this Publication This publication contains the following to describe the service components of the Giga tronics Series 12000A Microwave Synthesizers Preface In addition to a comprehensive Table of Contents and general information about the publication the Preface also contains a record of changes made to the publication since its production Chapters 1 Specifications Brief introduction to the instrument and its performance parameters for all three models Section 1 4 begins data for native performance specifications for the Series 125XXA 127XXA models 2 Performance Verification Defines procedures to verify the performance of the 12000A series Section 2 3 begins modulation related performance verification issues that are native to the Series 125XXA 127XXA models 3 Calibration Provides procedures for inspection calibration and performance testing 4 Theory of Operation Section provides the instrument s block diagram level descriptions and its circuits for maintenance and app
24. Pulse Modulation On Off Ratio Test 2 3 3 1 Description The 12000A is set toa CW frequency at a power level of 0 dBm A spectrum analyzer is used to view the signal The pulse modulation is then enabled and the resulting waveform is measured 2 3 3 2 Equipment Required UUT e Spectrum Analyzer e Pulse Generator e Coaxial Cable MICROWAVE SYNTHESIZER UUT Pulse Generator Spectrum Analyzer Figure 2 8 Pulse Modulation On Off Ratio Test 2 3 3 3 Procedure 1 Connect the equipment as shown in Figure 2 8 Allow 30 minutes warm up time 2 Enter the first frequency on the test data sheet within the frequency range of the instrument The RF power level should be at O dBm Select external pulse modulation PM on the 12000A 3 Tune the analyzer to the source frequency select an analyzer span of O Hz and fine tune the analyzer to place the line at the top of the screen graticule adjust analyzer reference level as needed 4 Setthe pulse generator for a 100 Hz square wave press PULSE then use the softkey to turn on the pulse modulation 5 Adjust the analyzer sweep time to display a few cycles of the waveform Use internal triggering Reduce resolution bandwidth and carefully retune the analyzer center frequency until the maximum resolution is achieved Read and record the peak to peak value use marker delta 6 Repeat steps 3 4 and 5 for all other test data sheet frequencies which are within the range of the i
25. Repair replace A3 A7 if gt 2 GHz or A8 if 2 GHz 6 6 Publication 31232 Rev A7 October 2003 6 1 6 Modulation Modes Series 125XXA 127XXA Only Fault Isolation Tree Modulation Modes Troubleshooting carrier shift the input OK now External FM 15 FM totally Yes Py Problems inoperative Repair replace A1 No Is the deviation Check input level UN I No deviation setting OK Yes gt Done correct D now Yes No Note 11 is the frequency I No Repair replace A1 response correct Yes No Note 12 Is there a significant Check tebe sure mere 9 Yes is no DC component at Yes gt Done Publication 31232 Rev A7 October 2003 Y Extrernal AM Is AM totally Ye Problems inoperative es Repair replace No Check input level OK gt Done Note 18 Is the depth correct now Yes No 1s the frequeney No gt Repair replace response correct Yes No Note 14 Is there a significant level shift r Yes gt Check to be sure there is no DC component at the input OK now 6 7 Series 12000A Microwave Synthesizers 6 1 7 6 8 External Pulse Problems Modulation Modes Continued
26. Rev A7 October 2003 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Troubleshooting Synth DSP code load opn err The entire Synthesizer DSP operational code file has been transmitted to the Synthesizer and the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed YIG Cal xx synth operation timeout Data and strobe have been sent for one of the twelve Synthesizer YIG calibrations but after 2 5 seconds no response has been received YIG Cal xx synth operation error Data and strobe have been sent for one of the twelve Synthesizer YIG calibrations and the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed YIG Cal xx data readback timeout One of the twelve Synthesizer YIG calibrations has completed successfully and a request has been sent to retrieve the results but after 75 seconds no response has been received YIG Cal xx data readback error One of the twelve Synthesizer YIG calibrations has completed successfully a request has been sent to retrieve the results but the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed A1A2 Cal xx operation timeout Data and strobe have been sent for one of the 41 calibrations but no response has be
27. after 10 seconds no response has been received ALC A5 det lin table build error The ALC A5 CW detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC A17 det pulse table build timeout The ALC A17 PULSE detector linearization table coefficients have been transmitted to the ALC but after 10 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC A17 det pulse table build error The ALC A17 PULSE detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC A8 det pulse table build timeout The ALC A8 PULSE detector linearization table coefficients have been transmitted to the ALC but after 10 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC A8 det pulse table build error The ALC A8 PULSE detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC 5 det pulse table build timeout The ALC A5 PULSE detector linearization table coefficients have been transmitted to the ALC but after 10 seconds no respon
28. and set source leveled output to 10 dBm 3 Connect Direct output of Mixer Box to the HP 8902 Measuring Receiver RF input 4 Connect Modulation Output Audio Input to channel 2 of Oscilloscope a Set to 500 mV per Division 5 On Measuring Receiver press FREQUENCY and verify 130 MHz on receiver 6 Select AM set measuring receiver filters to 50 Hz and 15 KHz Press PEAK PEAK 2 MODE 7 On UUT turn AM on Set depth to 50 Connect the DS 345 Function Generator at 1 KHz modulation to the AM input Set scope to 50 Ohm termination and sinewave amplitude for a Publication 31232 Rev A7 October 2003 2 3 1 4 10 11 12 Performance Verification 2 V ppsignal Press AM button on Measuring Receiver Verify a reading of 40 0 to 60 0 on the measuring receiver Set external function to SQR Turn off all filters on the measuring receiver Verify a receiver reading of 40 0 to 60 096 Typical Set external function to TRI and verify that the measuring receiver reads 40 0 to 60 096 Set UUT to 10 GHz Repeat Steps 2 to 8 At 1 5 and 10 GHz check AM Depth at 30 90 modulation Verify accuracy of 1096 of reading at each step Enter data in the AM Modulation Test AM Depth area of the Series 12000A Microwave Synthesizers Performance Verification Data Sheet Section 2 3 1 3 Procedure AM Bandwidth Set UUT to 1 5 GHz with level set at 0 dBm Set AM Depth to 5096 1 KHz rate Sinewave Verify a 5096 reading on H
29. apart with a pocket knife blade or equivalent 5 When replacing these assemblies first plug 2 into A1A1 then plug the pair into 1 then fasten with the four 4 screws To replace the A1 assembly reverse the above procedure Be certain that all connectors are properly aligned The 10 MHz blue cables are connected by pressing straight down over their sockets When tightening the three coaxial cables on A1A1 observe proper torque procedures Publication 31232 Rev A7 October 2003 Troubleshooting 6 2 5 A15 Timebase This assembly must be removed in a static controlled environment 1 2 Remove the bottom cover 1 Remove the A1 synthesizer assembly 4 Disconnect the 10 MHz coax cables blue cables When removing these use the proper removal tool or pull straight up with small tweezers held parallel to the board Disconnect the black cable connector Press the lock release on the cable connector to release Disconnect the ribbon cable Using a nut driver or similar tool unscrew the four mounting fasteners These are threaded onto studs on the chassis and pass through rubber vibration isolating grommets They are often quite tight To replace the 15 assembly reverse the above procedure Be certain that all connectors are properly aligned Be certain that the 10 MHz cables are connected to the correct sockets The 10 MHz blue cables are connected by pressing straight down over their sockets 6 2
30. centered in the page This calls attention to a situation or an operating or maintenance procedure or practice which if not strictly corrected or observed could result in temporary or permanent damage to the equipment or loss of effectiveness Notes NOTE A NOTE Highlights or amplifies an essential operating or maintenance procedure practice condition or statement Publication 31232 Rev A7 October 2003 vii Series 12000A Microwave Synthesizers viii Publication 31232 Rev A7 October 2003 Record of Publication Changes This table is provided for your convenience to maintain a permanent record of publication change data Replacement pages will be issued as a TPCI Technical Publication Change Instructions and will be inserted at the front of the binder Remove the corresponding old pages insert the new pages and record the changes here The TPCI Number and Date issued are found in the TPCI footer Date Publication 31232 Rev A7 October 2003 ix Series 12000A Microwave Synthesizers X Publication 31232 Rev A7 October 2003 Specifications 1 1 Introduction Specifications Introduction 125XXAJ 124XXA 127 1 1 1 Environmental Standards The Series 12000 are Microwave Synthesizers with Step Ramp Series 127XXA Only and List Sweep capability the instruments operate over a wide range of microwave
31. entire ALC PM FPGA program file has been transmitted to the ALC but after 1300 microseconds no response has been received SERIES 125XXA 127XXA ONLY ALC PM FPGA load opn err The entire ALC PM FPGA program file has been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC prog mem test timeout The ALC board has been commanded to test program memory but hasn t responded after 1 second ALC prog mem test err The ALC board has been commanded to test program memory and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC lin mem test timeout The ALC board has been commanded to test detector linearization memory but hasn t responded after 1 second ALC lin mem test err The ALC board has been commanded to test detector linearization memory and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC delin mem test timeout The ALC board has been commanded to test modulator delinearization memory but hasn t responded after 1 second ALC delin mem test err The ALC board has been commanded to test modulator delinearization memory and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC
32. establish program control 3 8 Publication 31232 Rev A7 October 2003 Calibration 3 5 Output Amplitude Calibration Output Amplitude Calibration 125XXAl 124XXA 127XXA 3 5 1 ALC Characterization Instructions There are number of steps in this section These steps provide data that the instrument ALC system needs to properly control the control output amplitude The steps must be performed in the order specified The entire process is managed by the Calibration Control Program running on the PC Please read the section which describes the individual test for information on when re calibration is necessary ag NOTE Do not use Channel B on a 2 Channel Meter Computer 12000A MICROWAVE SYNTHESIZER Series 12500 12700 Only 8650A UNIVERSAL POWER METER Figure 3 1 Output Amplitude Calibration Connection 1 Connect the sensor to the meter calibrator use the N to adapter and allow at least 15 minutes for the sensor and meter to reach thermal equilibrium Then perform a sensor calibration 2 Now connect the equipment as shown above The 80313A sensor connects to the 12000A RF out connector If the 12000A has a type N connector use the N to K adapter The 12000A should have its IEEE address at 6 the default The power meter should be at address 10 If the 12000A has not been previously warmed up allow 15 minutes of warm up Wh
33. frequencies power levels and in a variety of modulation modes The 12000A can generate output signals over a frequency range of 10 MHz to 20 GHz the frequency range is dependent on the specific model number Table 1 1 lists the models with their respective frequency range The RF output can be Fixed CW Step Ramp or List Sweep with External Frequency Amplitude or Pulse Modulation The Series 124XXA is a CW ONLY Microwave Synthesizer Option 29 Scan Modulation and Option 24 Internal Modulation Generator are only available on Series 125XXA 127XXA models Table 1 1 Series 12000A Model Numbers Series 12400A Series 12500A Series 12700A CW Generator Signal Generator Swept Signal Generator Frequency Range Step Sweep No Modulation Step Sweep Modulation Step and Ramp Sweep Modulation 12408A 12508A 12708A 10 MHz to 8 GHz 12428A 12528A 12728A 2 GHz to 8 GHz 12420A 12520A 12720A 10 MHz to 20 GHz 12422A 12522A 12722A 2 GHz to 20 GHz Observe the publication s legend header sections as a way to assist in the operability of the Series 12000A purchased Operation from the instrument s front panel is detailed in Chapter 2 of the Operation Manual Instructions on how to operate the instrument from a remote host computer over the GPIB General Purpose Interface Bus can be obtained from Chapter 3 of the Operation manual 1 1 1 Environmental Standards All Series 12000A models are environmentally tested
34. input open as there is an internal 50Q resistor to ground This test calibrates any zero offset errors Since FM is DC coupled any DC component or zero error will result in a frequency shift Press OK when ready 2 When the prompt requests a 1 0 volt DC input connect the DC source to the FM input connector and monitor the FM input connector with the voltmeter Set the DC source to 1 00 volts 005 volts It may be helpful to put a resistor of about 500 ohms in series with the source and the FM input This will make setting the DC source less critical as it provides a 10 1 divider Be sure to measure the voltage at the FM input connector with everything connected This test calibrates the inside the loop portion of the FM approximately DC to 15 kHz Press OK when ready 3 The next step requires that the 8902 Modulation analyzer be connected to the 12000A Since the test is run at a frequency of 5 GHz it is necessary to use a special downconverter mixer that includes a divide by 40 The LO is set to 5450 MHz at 10 dBm and connected to the mixer LO port 4 Connect the 12000A to the mixer RF port 5 Connect the mixer divide by 40 IF out to the 8902 input 6 Connect the audio source to the 12000A FM input Set the source to 190 kHz at 2 00 Volts peak to peak 0 01 volts An oscilloscope is NOT accurate enough to set this level Use a calibrated source or a digital voltmeter which will accurately measure 150 kHz Be sure to
35. is provided by the A3 ALC PC assembly This board receives level detector signals from A6 and A8 and returns modulator control signals Publication 31232 Rev A7 October 2003 4 1 Series 12000A Microwave Synthesizers vNOLLO3HIG ESTAS SY31 NY ZHOZ 01 ZHIN OL NIVO IHVA uddnoo ZHIN 9 SL OL x HOlO313Gd AdOTSANA ZH9 9 9 32159 AONANOAYSA Sd3lS 8P OL HOLIMS TOYHLNOD gp OLL 00 HO12313S 13441 YOLVNNALLV DILVINOLNY os o1 NY 901 O o1 02 ZH9 91 8 suaridLL TON ODA ZH9 OZ 0 ZHIN OL AONanoaud ZHD8 0 v HOlOa3l3Gd 3dO 3AN3 Y31dNOD GNV4d TWNOILOAYIC SHualdrldl wv ZHD OZ 03 ZHD Z NIVO IHVA 5931115 HOLIMS SSVd YOLOATAS Figure 4 1 Overall Block Diagram Publication 31232 Rev A7 October 2003 42 4 2 Theory of Operation Power Supply Subsystem A9 Power Supply Subsystem A9 124XXA denm The Power Supply Assembly consists of two separate power supplies that will accept inputs of 85 to 264 VAC from 47 to 63 Hz Standby 12v Unswitched supply that is operational whenever the AC line cord is plugged in Main Supply Switched Supply that is controlled by the front panel power switch with outputs of 6v 6v 12v and 12v The standby power supply is used to provide continuous voltage to the time base oscillator and the YIG heater when the instrument is turned off When the instrument is turned on a dio
36. rdbck timeout A byte of the ALC DSP external memory operational code file has been transmitted to the ALC but after 65 microseconds no response has been received ALC DSP ext code rdbck err A byte of the ALC DSP external memory operational code file has been transmitted to the ALC and the ALC has responded with an error message and or a non matching data byte rather than an OP COMPLETE message and a matching data byte The contents of the ALC DSP HIP status and data registers are displayed ALC DSP ext code load opn timeout The entire ALC DSP external memory operational code file has been transmitted to the ALC but after 5 seconds no response has been received ALC DSP ext code load opn err The entire ALC DSP external memory operational code file has been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC init timeout The entire ALC DSP operational code file has been transmitted to the ALC but after 5 seconds no response has been received ALC init error The entire ALC DSP operational code file has been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC mod delin table build timeout The ALC modulator delinearization table coefficients have been transmitted to the ALC but after 10 seconds no respo
37. should not vary from one sweep to another Review the waveform and identify the nulls where the voltage transitions through the nulls are steeper and linear for a 50 mV range above and below the null Perform the FM modulation tests at these frequency nulls For certain frequencies which may be identified by experiment the mixer will produce a DC voltage near zero The number of null frequencies can be increased by making the delay lines longer in absolute terms or by increasing the ratio between their lengths If the output becomes frequency modulated the mixer output voltage will change and the voltage variation will be proportional to FM deviation The polarity of the voltage change may be either directly or inversely related to the direction of frequency deviation When voltage levels have been established for different frequencies the mixer output can be monitored on an oscilloscope to provide a continuous display of FM deviation Procedure 1 Connect the FM test fixture to the RF OUT connector of the 12000A as shown in Figure 2 7 Monitor the mixer output with the oscilloscope Set the 12000A to any null frequency between 4 0 and 7 99 GHz that is at a frequency where the mixer output voltage is zero 10 dBm out no modulation 2 Establish the voltage at 1 MHz above and 1 MHz below the null frequency Adjust the oscilloscope gain and the 12000A output power level near 5 dBm to place the null point at the center of the screen and
38. static controlled environment 1 2 Remove the top cover 1 Disconnect the two power connectors P701 P702 and the peripheral buss connector P101 When removing the peripheral buss connector press the locking ear outward to release the connector Disconnect all of the blue cables When removing these use the proper removal tool or pull straight up with small tweezers held parallel to the board Disconnect the twister pair coaxial cable connector at P301 Press the lock release on the cable connector to release Remove the nine 6 screws around the perimeter of the board and the one 6 screw in the center Carefully lift the board out of the instrument To replace the A3 assembly reverse the above procedure Be certain that all connectors reproperly aligned The blue cables are connected by pressing straight down over their sockets Publication 31232 Rev A7 October 2003 Troubleshooting 6 2 8 A16 Modulation Generator Board Series 125XXA 127XXA Only This assembly must be removed in a static controlled environment 1 2 Remove the top cover 1 Disconnect the power connector P400 and the peripheral buss connector P100 When removing the peripheral buss connector press the locking ears outward to release the connector Disconnect the blue 10 MHz cable When removing this cable use the proper removal tool to pull straight up with small tweezers held parallel to the board Disconnect the twister pair
39. telling it to get ready for SP FPGA startup program file data but after 500 msec no response has been received ALC SP FPGA cfg error The command has been sent to the ALC telling it to get ready for SP FPGA startup program file data and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC SP FPGA load opn timeout The entire ALC SP FPGA startup program file has been transmitted to the ALC but after 1300 microseconds no response has been received Publication 31232 Rev A7 October 2003 6 19 Series 12000A Microwave Synthesizers 6 20 26 21 28 29 30 31 32 33 34 35 36 37 38 39 ALC SP FPGA load opn err The entire ALC SP FPGA startup program file has been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC PM FPGA cfg ack timeout The command has been sent to the ALC telling it to get ready for PM FPGA program file data but after 500 msec no response has been received SERIES 125XXAJ 127XXA ONLY ALC PM FPGA cfg error The command has been sent to the ALC telling it to get ready for SP FPGA program file data and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC PM FPGA load opn timeout The
40. the 1 MHz deviation points at 3 divisions above and 3 divisions below the null point 3 Set the 12000A to Narrow EXT FM with 1 MHz deviation Connect the function generator set to a 100 kHz rate SINE wave 1 Vp_p Verify that the waveform is 6 divisions peak to peak 4 Adjust the 12000A FM deviation for exactly a six division peak to peak display Vary the function generator from 10 Hz to 1 MHz and verify that the display remains between five and seven divisions peak to peak 5 Vary the function generator from 1 MHz to 8 MHz and verify that the display remains between 4 and 8 divisions 6 Establish the voltage at 10 MHz above and below the null frequency Adjust the oscilloscope gain and the 12000A output power level near 5 dBm to place the null point at the center of the screen and the 10 MHz deviation points at 3 divisions above and 3 divisions below the null point terminate the Mixer output in 50 Q 7 Set 12000A to Wide EXT FM with 10 MHz deviation Set the function generator to 100 kHz Verify that the waveform is 6 divisions peak to peak 8 Adjust the 12000A FM deviation for exactly a 6 division peak to peak display Vary the function generator from 100 Hz to 1 MHz and verify that the display remains between 4 7 and 1 3 divisions 9 Vary the function generator from 1 MHz to 8 MHz and verify that the display remains between 4 and 8 divisions Publication 31232 Rev A7 October 2003 Performance Verification 2 3 3
41. 0 gt 6t3 gt DU 3 lt 100 gt 6t4 gt DU 7 lt 100 gt 6t5 gt xPBYC VersionNumber 100 6 10 lt 10000000 000000 lt 2100 gt 6t11 gt XPBYVD FreqMax lt 100 gt Br11 20199000000 000000 2100 Bt 22XPBVD FregStepMinc100 Halten error Bypass Prompts 3 24 Publication 31232 Rev A7 October 2003 4 1 Theory of Operation Series 12000A Theory of Operation Theory of Operation 125XXAJ 124XXA 127XXA 4 1 1 Overall System Description Overall System description The Series 12000A is designed using a modular architecture where each basic system functional block is contained on a printed circuit or microwave module DC power for the instrument is provided by a commercial switching power supply This supply provides regulated voltages of 6 6 12 and 12 volts The supply is filtered to reduce switching transients and routed to the A4 Distribution PC assembly This board provides fuse protection routing and turn on timing for the supplies to the various other assemblies in the instrument The A4 board also supplies switching and conditioning for the control lines to the various microwave modules the step attenuator and Option 20 High Power The reference frequency for the instrument 10 MHz is supplied by the 15 Time Base PC assembly The 11 CPU PC assembly supplies all the necessary data processing and control for the instrument Its inputs include the IEEE 488 bus the RS232 serial port an
42. 10 dB Volt and these are obtained by the Variable Gain adjustment block in the Sig Proc FPGA Log AM operation is carried out totally open loop unlike its calibration which is done closed loop by the CW infrastructure Open loop operation is needed for two reasons 1 The speed is too high for the 10 KHz feedback control system a 50 dB change over a usecond or less is guaranteed 2 A 60 dB range below the fiduciary level is guaranteed Owing to the high speed involved the 10 dB step electromechanical attenuator is much too slow during operation but is used to set the fiduciary level More than 40 dB below the fiduciary level there is insufficient feedback signal level coming from the detector to operate the servo loop Although the Figure shows a single gain control point in the RF amplifier subsystem there are actually two cascaded gain control points each controlled separately or in unison by the ALC Each gain control point has a range of at least 40 dB Only one of them is used in CW Linear AM and Pulse Modulation while the other is maintained at minimum attenuation In Log AM both are needed to obtain the 60 dB or more range During factory Log AM Scan Characterization which can be repeated periodically in the field open loop measurements are made using an external power meter A D A converter count vs power output scale is obtained for many frequencies over the 12000A frequency range The shape of this scale is stable
43. 125XXA 127XXA Models Only Publication 31232 Rev A7 October 2003 6 5 Series 12000A Microwave Synthesizers 6 1 5 CW Level Fault Isolation Tree CW Operation Level Output Amplitude is Incorrect or Unstable Is any modulation Turn Modulation m Yes gt 3 on off Y lathe AEG mode No Set ALC to Internal correct Yes Does level error occur above amp I Yes gt Is error small Yes gt Recalibrate below 2 GHz RE 7 10 No Does the step Replace the No attenuator operate No attenuator properly all four power Operate at the 1 Check 4 fuses supplies reaching No problem frequency A3 power supply Yes __ Repair replace Repair replace A6 Is the Set to DA Is T too ves gt A7 if 32 GHz or A8 P if lt 2 GHz Y Y Is J601 close to OV 22 Return to leveled Repair replace A17 GHz power Is 301 Yes if 22 GHz or A8 if Is J603 close to OV lt 2GHz J302 lt 3 volts lt 2 GHz No Yes Y Repair replace A6 A7 if gt 2 GHz or A8 __ Repair replace close to 0 V if lt 2 GHz Yes No Repair replace A6
44. 31232 Rev A7 October 2003 69 70 71 72 73 74 75 76 Troubleshooting ALC A8 PM det zero timeout The ALC has been directed to find A8 PM detector zero but after 5 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC A8 PM det zero error The ALC has been directed to find A8 PM detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC A5 CW det zero timeout The ALC has been directed to find A5 CW detector zero but after 5 seconds no response has been received ALC A5 CW det zero error The ALC has been directed to find A5 CW detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC A5 PM det zero timeout The ALC has been directed to find A5 PM detector zero but after 5 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC A5 PM det zero error The ALC has been directed to find A5 PM detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC AM zero timeout The ALC has been directed to find AM input zero but after 5 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC AM zero error The ALC has been directed to find AM in
45. 6 assembly modulator iot 16 Pulse level accuracy when the RF is on problems which occur above 2 GHz would most likely be caused by a fault on a the A3 assembly It is possible however that a defect on NIA 4 the A17 assembly could cause a problem since the detector buffer amplifier is located here 17 Pulse level accuracy when the RF is on problems which occur below 2 GHz would most likely be caused by a fault on a the A3 assembly It is possible however that a defect on NIA Ni the A8 assembly could cause a problem since the detector buffer amplifier is located here 18 Pulse on of ratio problems could be caused by the amplifiers on the A3 assembly the E driver amplifiers on A17 or by the RF module A6 19 Pulse on of ratio problems could be caused by the amplifiers on the A3 assembly or by 4 the driver amplifiers and modulators on A8 Publication 31232 Rev A7 October 2003 6 9 Series 12000A Microwave Synthesizers 6 2 Series 12000A Disassembly Assembly Instructions Model Series 12000A Disassembly Assembly Instructions 125XXAI ooa 6 2 1 Top amp Bottom Covers 6 2 2 Side Covers 6 2 3 6 2 4 1 Synthesizer 6 2 5 A15 Timebase 6 2 6 4 Distribution Board 6 2 7 Automatic Level ALC Board Limitations Apply 6 2 8 A16 Modulation Generator Board NIA 6 2 9
46. 6 A4 Distribution Board This assembly must be removed in a static controlled environment 1 2 10 11 12 Remove the bottom cover 1 Remove the A1 Synthesizer assembly 4 Disconnect any power connectors P403 P410 the main power supply input connector P401 the fan power connector P302 and the standby power connector P402 Disconnect the peripheral buss connector P101 and the module cables P102 and P201 When removing these connectors press the locking ears outward to release the connector Disconnect the cables to the A15 and A11 boards P305 and P301 Disconnect the connector on the wire going to the YIG oscillator This connector is in line with the wire Disconnect the optional step attenuator ribbon cable at P303 and or the optional cable to the high power assembly at P304 Remove the five spacers that are used to mount the A 1 assembly Lift the A4 assembly out of the instrument Note that there is a locating pin on one corner of the board To re install the assembly reverse the above procedure First align the hole in the corner of the board with the locating pin Press the board onto the pin Now install the five spacers Re connect all the cables Be certain that the connectors are properly mated and aligned Publication 31232 Rev A7 October 2003 6 13 Series 12000A Microwave Synthesizers 6 2 7 6 14 A3 Automatic Level ALC Board This assembly must be removed in a
47. Analog test timeout The ALC board has been commanded to test the analog input circuitry but hasn t responded after 1 second ALC Analog test err The ALC board has been commanded to test the analog input circuitry and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC DSP code rdbck timeout A byte of the ALC DSP internal memory operational code file has been transmitted to the ALC but after 65 microseconds no response has been received Publication 31232 Rev A7 October 2003 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 Troubleshooting ALC DSP code rdbck err A byte of the ALC DSP internal memory operational code file has been transmitted to the ALC and the ALC has responded with an error message and or a non matching data byte rather than an OP COMPLETE message and a matching data byte The contents of the ALC DSP HIP status and data registers are displayed ALC DSP code load opn timeout The entire ALC DSP internal memory operational code file has been transmitted to the ALC but after 10 msec no response has been received ALC DSP code load opn err The entire ALC DSP internal memory operational code file has been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC DSP ext code
48. C loop is established between the ALC Module A3 and the Frequency Extension Module A5 via the AM drive signals from the former and the sampled output signals from the latter The Interface Board conditions the signal from the ALC Board to provide the appropriate modulator voltage for both leveling and amplitude modulation For min attenuation VI 20V V2 10V For max attenuation V1 10V V220V The input control voltage to J4 on 5 1 is volts for min attenuation and 3 volts for max attenuation 4 8 Publication 31232 Rev A7 October 2003 4 4 4 4 1 4 4 1 1 4 4 1 2 4 4 1 3 4 4 1 4 4 4 1 5 4 4 1 6 Theory of Operation CPU Subsystem A11 CPU Subsystem 11 125XXA a 4 4 1 Memory Resources 4 4 2 Reset Circuitry The CPU board is the main control element within the instrument Following is a brief list of the resources and functions that the board provides Memory Resources e 2Mof0 wait state SRAM e 1 M of Flash memory e 1 M of battery backed SRAM expandable by memory expansion board Next Step Sequencer Provides high speed sequencing of signals used to change frequencies or power levels Peripheral Bus Interface An 8 bit parallel interface to all other modules in the GT12000A Video Controller Provides interface to a 320 x 240 pixel LCD display on the front panel Front Panel Interface Provides keyboard LED Knob and Piezo Buzzer interfaces GPIB Pro
49. CONVENTIONS aa e a a aean aa vii R cord of Manual Changss i yet ao eene ages nak de d a eaa e a ix 1 Specifications 1 1 HAEFO DUCTION ccc 1 1 1 1 1 Environmental Standards sess sese senes 1 1 1 2 Performance Specifications 1 2 1 3 General Specifications Vivier conv esaga ded ure MEI ep ek ra e eden 1 13 2 Performance Tests 2 1 INTRODUCTION NORTE DOTT QT DIU EIL UIT 2 1 2 1 1 Recommended Equipment esse ener 2 1 2 2 Performance Tests RA e RE eon A os od ate 2 2 1 Introduction 2 2 2 Frequency Range Resolution and Accuracy 2 2 3 Spurious Signals Tests 2 2 4 Single Sideband Phase Noise 2 2 5 RF Output Power Tests eic aod Meer pie a us 2 2 6 Pulse Modulation On Off Ratio Test 2 2 7 Pulse Modulation Rise and Fall Time Test 2 2 8 Pulse Modulation Overshoot and Settling Time 2 2 9 Pulse Modulation Accuracy Test 2 2 10 Frequency Modulation Tests sss eene 3 Adjustments 3 1 Introduction Hicks sched Bee dan cabins Mea Geen ote E Fo oat ew ue x ORE iden eio 3 1 3
50. D converter samples its input data at a 10 MHz rate but only every other sample is used The 1 MHz low pass filter prevents aliasing of the higher frequency components The DC signal level at the ALC Board input varies from several Volts to several millivolts as the 12000A RF output varies from 20 dBm to 20 dBm In order to maintain an adequate count value per dB set point resolution for small signals without overloading the A D converter when the signal is large the gain is adjusted in seven steps over a 250 1 range by the Variable Gain amplifier The Gain Offset amplifier is used mainly to shift the voltage scale from 0 3 Volts to 1 4 Volts needed by the A D converter input The buffer amplifier includes insertion of an offset voltage by the Zeroing D A converter During each 12000A boot up process the correct D A converter value is determined for each gain setting so that the zero signal A D count level is consistent over time regardless of long term offset drift in the diode detector carrier preamplifier or elsewhere Inside the Sig Proc FPGA the feed forward Linear AM modulator and power set multipliers are locked to multiply by one The integrator accumulator counts up or down depending upon whether the Power Set input level is higher or lower than the instantaneous signal level delivered by the A D and Linearization RAM The speed of counting is directly proportional to the magnitude of this disparity and Integrator Gain Number
51. Deviation lt 1 MHz at 4 8 GHz other range proportionally Flatness 2 dB for rates from 100 Hz to 1 MHz 3 dB to 8 MHz Residual FM See table contained in Section 1 5 3 2 Modulation Accuracy 5 at max deviation 190 kHz modulation rate Distortion lt 5 1 MHz Deviation Incidental AM lt 0 2 MHz of Deviation 1 16 Publication 31232 Rev A7 October 2003 Specifications 1 5 3 2 Narrow Mode Envelope Parameters Maximum Deviation See table below Modulation Resolution 10 Hz Deviation lt 10 kHz 1 kHz Deviation gt 10 kHz at 4 8 GHz other ranges proportional Flatness l 2 dB for rates from DC to 1 MHz Measured at 1 V p p input i e 500 KHz Deviation 3 dB for 1 MHz to 8 MHz Residual FM Same as CW Modulation Accuracy 5 at max Deviation 190 kHz modulation rate Distortion lt 0 2 MHz of Deviation Incidental AM lt 5 1 MHz deviation 1 10 KHz 4 8 range Frequency GHz Max Wide Deviation Pk Max Narrow Deviation Pk Wide Mode Residual FM 010 to 016 40 kHz 2 kHz lt 200 Hz gt 016 to 032 80 kHz 4 kHz 200 Hz gt 032 to 064 160 kHz 8 kHz lt 200 Hz gt 064 to 125 320 kHz 16 kHz lt 200 Hz gt 125 to 25 640 kHz 32 kHz 200 Hz gt 25 10 5 1 25 MHz 64 kHz lt 200 Hz gt 5 1 2 5 MHz 125 kHz lt 375 Hz gt 1 2 5
52. GPIB Display Window under the GPIB Address box shown below The GPIB Address box initially shows GPIB until an address is selected GPIB send receive in memo puts the information in the same block the one on the left as the data This allows easily seeing what command produced a specific data point Show Power Meter puts the power meter readings in the left block Testing Firmware V 73 B49 15 Cil OF Xx MEUM On Error v GPIB send in Display GPB v GPIB receive in Display GPIB send in Memo GPIB receive in Memo v Show Power Meter Bt XPBVL SerialNumber 100 Br 117018 2100 BtS XPBVL ModelNumber 100 Bt XPBVD FregMin lt 100 Br10 10000000 000000 2100 Bt 1 XPBVD FreqMax lt 100 gt 6r11 lt 20199000000 000000 lt 2100 gt 6t12 gt xPBYD FregStepMin lt 100 gt 6r12 lt 0 100000 lt 2100 gt 32x H 100 Br 3 0 Halt on error Bypass Prompts sf Publication 31232 Rev A7 October 2003 3 23 Series 12000A Microwave Synthesizers This view illustrates the ability to filter the GPIB traffic A setting of 255 causes the display to show traffic to any GPIB device on the bus Entering a specific address will show traffic for that device only Testing Firmware 73 B49 15 Cil BGE XI View On Error Power Meter 828 Br1 0 No error 2100 Brl Time Out lt c1 00 gt 6t2 gt 1P lt 10
53. Giga tronics www gigatronics com Giga ErOnics 67120004 Microwave Synthesizer enn E q oa Gigaz ErOmnics 61120004 Microwave Synthesizer egi gt EN Series 12000A Microwave Synthesizers Service Manual Ame 4999 dec 2 DS E X imi 5 Publication 31232 Rev A7 October 2003 2 um S Giga tronics Incorporated v 4650 Norris Canyon Road San Ramon CA 94583 4 ISO 9001 925 328 4650 800 726 4442 925 328 4700 Fax v Customer Service 800 444 2878 925 328 4702 Fax n P S3 95 Contificati All technical data and specifications in this publication are subject to change without prior notice and do not represent a change without prior notice and do not represent a commitment on the part of Giga tronics Incorporated 2002 Giga tronics Incorporated All rights reserved Printed in the USA WARRANTY Giga tronics Series 12000A instruments are warranted against defective materials and workmanship for three years from date of shipment Giga tronics will at its option repair or replace products that are proven defective during the warranty period This warranty DOES NOT cover damage resulting from improper use nor workmanship other than Giga tronics service There is no implied warranty of fitness for a particular purpose nor is Giga tronics liable for any consequential damages Specification and price change privileges are reserved by Giga tronics MODEL NUMBERS Th
54. IB Address block Similarly set the power meter address Leave the counter address set to 1 At this time a counter is not needed 2 Click on Connection and select the PC GPIB controller which will be used National Instrument or CEC 3 Click on the Read Parameter Block bar and the program interrogates the 12000A The 12000A display will be blank The program puts the 12000A in DU mode which only displays communication errors Publication 31232 Rev A7 October 2003 3 3 Series 12000A Microwave Synthesizers 4 When this process starts a timer window will appear to insure that the 12000A is fully stabilized before measurements are made Click OK button to see how much time remains Action Required x Unit should remain powered up for another 18 seconds before characterization starts 1 Cancel A window will now appear that lists the dates for the current calibration Note that the Detector CW and Loop Gain dates are always the same since this data is loaded from a generic table and is not instrument specific Characterization Date done by 3 36 _ 3 x Modulator AM PM 11 12 99 10 47 Detector CW 11 12 98 11 07 Loop Gain 11 12 98 11 24 Frequency Comp 0 dBm to 15 dBm 02 08 00 16 27 Frequency Comp with Attenuator lt 0 dBm Unknown Frequency Comp High Power gt 16 dBm Unknown AM Linear Calibration Unknown Scan Unknown FM Linearization Unknown A
55. P 8902 with filters turned off On receiver press RATIO then the LOG LIN button display indicates 0 00 dB Vary the frequency of the external DS 345 Function Generator from DC to 150 KHz Verify that the amount of change is within the 3 dB window Repeat steps 1 to 3 for 10 GHz Complete the AM Modulation Test AM Bandwidth area of the Series 12000A Microwave Synthesizers Performance Verification Data Sheet Section 2 3 1 4 Publication 31232 Rev A7 October 2003 2 11 Series 12000A Microwave Synthesizers 2 3 2 2 3 2 1 2 3 2 2 2 3 2 3 2 12 Frequency Modulation Test Description The output from the 12000A is connected to a discriminator The discriminator output is monitored on an oscilloscope to determine deviation and bandwidth Equipment Required UUT e Function Generator Oscilloscope e Digital Voltmeter e FM Test Fixture Oscilloscope MICROWAVE SYNTHESIZER UUT FM Test Fixture Voltmeter Figure 2 7 Frequency Modulation Test Delay Discriminator Description In order to calibrate and test the frequency modulation circuits a special test fixture must be assembled The recommended FM test fixture includes an RF splitter two lines of unequal length and an RF mixer The RF output of the 120004 is divided by the splitter into two signals unequally delayed Different length cables determine the number of frequency nulls or 0 volt outputs found in the frequency band of i
56. Repeat 7 8 for each delay counter to be calibrated Publication 31232 Rev A7 October 2003 3 21 Series 12000A Microwave Synthesizers 3 8 Monitor Functions 125XXAJ 127XXA Monitor Functions 124XXA The monitor window is provided to allow viewing data or IEEE 488 bus traffic Since the calibration processes involve significant amounts of data both the 8650A power meter and the unit under test are operated in modes that do not involve displaying any information on the instruments displays The monitor screen allows the user to see the data The view below is a typical display with the bus traffic monitor turned on See the following pages for more details Testing Firmware 73 B49 15 Cil OF XI View On Error Power Meter GPIB_Display 6t1 gt Err lt 100 gt 6r1 lt 0 No error 2100 Brl Time Dut c100 Bt2 IP 100 Bt3 DU 3 100 Bt4 DU 7 100 BIB XPBVC VersionNumber 100 6t1 O XPBVD FregMinc100 6 10 lt 10000000 000000 lt 2100 gt 6t11 gt PBVD FreqMax lt 100 gt 6 11 lt 20199000000 000000 lt 2100 gt 6t12 gt PBVD FreqStepMin lt 100 gt 5r12 0 100000 2100 Br 32 X4HA 100 Br13 0 4 Halt on eror Bypass Prompts of 3 22 Publication 31232 Rev A7 October 2003 Calibration This view shows the choices available for the monitor screen GPIB send receive in display puts the information in the
57. The 80313A sensor connects to the 12000A RF out connector If the 12000A has a type N connector use the N to K adapter The 12000A should have its IEEE address at 6 the default The power meter should be at address 10 3 If the 12000A has not been previously warmed up allow 15 minutes of warm up 4 In the Characterize section click on the Modulator Scan box The purpose of this test is to build a table of correction values These values when applied during Scan Modulation operation create a linear change in the output level in dB as the input voltage is varied from 0 to 6 volts Scan Modulation is run open loop once the selected CW output level has been set The correction factors are interpolated for frequencies between the calibration points This routine will take 85 minutes for a 01 to 20 GHz instrument Publication 31232 Rev A7 October 2003 3 19 Series 12000A Microwave Synthesizers The following window will display during the calibration process In addition the monitor window may be placed in the Power Meter mode to view the data as it is taken 12000A Cal version 3 17 10th July 2001 v SWEEP Upton 26 feel me ele Sin Wigatronics mode 3 20 Publication 31232 Rev A7 October 2003 Calibration 3 7 ModGen Pulse Modulation Calibration Option 24 3 7 1 Description Perform calibration of the ModGen Pulse Modulation function in the Series 12000A Microwave
58. Variation lt 0 5 dB MHz Output Switching Time lt 500 20 ms with attenuator change Output Impedance 50 nominal Publication 31232 Rev A7 October 2003 Specifications Output SWR lt 2 0 1 Typical Level Drift lt 0 05 dB hour Max 0 1 dB 24 hours Publication 31232 Rev A7 October 2003 Series 12000A Microwave Synthesizers 1 2 3 Spectral Purity Harmonics Frequency GHz Harmonic dBc Power dBm 0 01 to 0 10 30 6 0 10 to 2 50 6 gt 2to 20 55 6 Subharmonics None 0 01 2 GHz 0 01 2 GHz 55 dBc gt 2 GHz A subharmonic is defined as any 4 7 or multiple of the fundamental RF Output Nonharmonics lt 60 dBc from 0 01 to 16 GHz offsets gt 300 Hz lt 55 dBc from gt 16 to 20 GHz offsets gt 300 Hz Single Sideband Phase Noise dBc Hz CW mode all power levels Offset from Carrier Freq GHz 100 Hz 1 kHz 10 kHz 100 kHz 1 MHz 0 25 101 101 109 122 129 0 5 95 95 103 122 124 2 87 92 94 120 125 4 81 86 88 110 130 6 81 83 83 110 130 8 75 80 80 105 130 10 75 80 80 105 125 18 68 73 73 97 120 20 68 73 73 97 120 Residual FM Hz rms CW Mode Frequency Range Post Detection Bandwidth Hz GHz 300 to 3000 50 to 15000 lt 2 GHz Decreases by 7 per oct Decreases by 7 per oct 2to lt 4 lt 6 lt 45 4to lt 8 l
59. a preset center frequency CF AMKR FA lt Mx My lt FB Sweeps up or down from a preset start frequency Mx through a preset marker My Sweep Functions Auto Continuous recycle of the preset sweep 3 A single cycle of the preset sweep initiated by manual operation of the front panel push button or Single reception of the corresponding GPIB command EXT A single cycle of reset sweep initiated by a trigger from an external source Frequency Markers Twelve intensity video and or amplitude markers individually selected from either the front panel or via the GPIB Resolution Sweep width 4000 Accuracy Same as Sweep linearity except the marker may vary 25 mV relative to the linear 0 to 10 V RAMP OUT Amplitude Markers A 10 to 10 dB change in RF output during analog frequency sweep Video Markers TTL level output or 5 V Intensity Markers Provides a timed dwell of frequency sweep 1 12 Publication 31232 Rev A7 October 2003 Specifications 1 4 2 Ramp Power Sweep Continuous sweep self generated within the instrument Can be operated simultaneously with digital frequency sweep Range 10 dBm to maximum power up or down 120 dBm is maximum power with Option 26 Sweep Time Any Sweep Mode 2 ms to 200 sec in five ranges Minimum sweep time is determined by the sweep width and the maximum sweep speed Range Resolution 2 ms
60. alleled and feed J8 the remaining one feeds the inputs of the other eight buffers which feed the remaining coaxial output connectors When there is no external frequency reference signal present the oscillator tuning control voltage is maintained by the CPU at a level determined at the last calibration The CPU can constantly read the control voltage and adjust it by controlling a digital potentiometer Whenever an External Frequency Reference signal is present an envelope detector senses the signal and provides an output to switch control of the VCXO to a phase lock loop This PLL locks the VCXO to the external source with a very slow loop to filter most of the noise from the external signal Divider U2A allows the PLL to accept a 5 MHz external source in addition to a 10 MHz one 4 14 Publication 31232 Rev A7 October 2003 Theory of Operation 4 6 1 Synthesizer Subsystem A1 90 d EF i N 95 N os 70 a E E on 15 L __ _1 T VISITE 5 ir b P E 5 5 9 2 Y 5 o 4 48 GHz YIG T ATA 250 500 MI Divide By 1 4 Four 8 Bit ECL Divider Fract N Contrd Integrator oD bho Phase Detector c 10 in 10 MHz in Peripheral Bus Figure 4 5 A1 Synthesizer Block Diagram The A1 PC Assembly is used to generate the
61. and hold circuit and peak detector Reset controls For all pulses longer than several hundred nanoseconds the pulse height is re read every 200 nanoseconds Each time the Pulse Modulation On switch is operated or the 12000A frequency or RF output level is changed before the pulse pattern is admitted the system is switched briefly to CW operation and the D A converter count noted Then the system is switched back to the Pulse chain and its zeroing is adjusted until the same D A converter count is obtained Thus the long term accuracy of CW is obtained for PM Publication 31232 Rev A7 October 2003 4 29 Series 12000A Microwave Synthesizers 4 10 6 4 30 Digital Communication Controls amp Calculations In addition to the signal chain components A D D A Sig Proc FPGA and lookup table RAMs and Detected Pulse Acquisition Timing FPGA the following major digital components are present on the ALC Board The Digital Signal Processor DSP U104 receives demanded level data from the Host CPU It also receives polynomial coefficients from the CPU and expands them to calculate the lookup tables which it sends to the Linearization and De linearization RAMs via the Sign Proc FPGA over the lower 16 lines of its 24 line parallel bus It coordinates all activities on the board with the help of its intra board serial bus I O system This serial bus services the System and I O CPLDs the Detected Pulse Acquisition Control FPGA and the three
62. auxiliary serial DACs The system CPLD U202 operates all the chip selects It also operates the twelve switches that control the main D A converter drive to the various RF amplifier subsystem gain control elements and the Load command for the three serial DACs The data and timing for these functions come from the serial bus Finally along with the DSP this CPLD is connected directly to the Peripheral Bus so that it can provide its hardware support including boot support The I O CPLD U203 contains the latches that operate all the analog switches except for those following the D A converter including gain setting detector source selection modulation type source selection CW PM selection and filter selection It also drives the DSP Reset The control and data come from the serial bus In addition to the servo integrator and signal processing functions the Sig Proc FPGA serves as the distribution device for all parallel data and address lines used by the Linearization and De linearization RAMs It does this in order to intersperse loading new tables in one memory segment at the same time alternate clock cycles while using a previously loaded segment for leveling All communication between the 12000A Host CPU A11 and ALC Board is provided by the Peripheral Bus Dedicated inputs include Read Write and Reset controls Sweep Synchronization Marker and Sweep Start Timing Strobe and RF ON Dedicated outputs include Ready to Level
63. basic synthesized signal for the instrument All elements of this function other than the YIG oscillator and the YIG driver FET are contained on the board or on the attached A1A1 and A1A2 assemblies The assembly provides all the frequencies from 1 to 8 GHz The synthesizer may be logically divided into a number of sub blocks These are 1 The primary synthesis loop 2 The high resolution DDS 3 The YIG oscillator main tune coil driver 4 The frequency modulation system and 5 The control system Publication 31232 Rev A7 October 2003 4 15 Series 12000A Microwave Synthesizers 4 6 1 1 4 16 Primary Synthesis Loop The primary synthesis loop consists of the Phase Detector Integrator Loop Amplifier YIG Oscillator A1A1 A1A2 and the Divide by N The 10 MHz reference input for the phase detector is produced on the A15 Timebase board and is an isolated output to avoid adding any noise to the signal On the Al assembly the 10 MHz is normally routed directly to the phase detector A divide by four pre scale is used when in the wide FM mode The other input to the phase detector comes from the output of U510 a programmable 8 bit counter The preset inputs of this counter are controlled by FPGA U508 The primary purpose for this FPGA is to do the necessary tasks to implement the Fractional N required to obtain 4 MHz resolution in the main loop The input to the 8 bit counter comes from the output of the A1A2 tracking filter Thi
64. connector at P101 Disconnect the remaining twisted pair connectors Press the lock release on the cable connector to release Remove the six 6 screws around the perimeter of the board and lift out the assembly To replace the A16 assembly reverse the above procedure Be certain that all connectors are properly aligned The blue cable is connected by pressing straight down over its socket 6 2 9 A11 CPU Board This assembly must be removed in a static controlled environment 1 2 Remove the top cover 1 Remove the A3 ALC assembly 7 Remove the shield plate by removing the nine 6 screws with their lock and flat washers Disconnect the main power connector P702 the backlight power connector P503 and the peripheral buss connector P402 When removing the peripheral buss connector press the locking ears outward to release the connector Disconnect the blue 10 MHz cable J101 When removing this cable use the proper removal tool or pull straight up with small tweezers held parallel to the board Disconnect the LCD flex cable J501 When removing this cable pull straight out parallel to the board Disconnect the twisted pair connector J601 Press the lock release on the cable connector to release Disconnect the remaining four ribbon cables Publication 31232 Rev A7 October 2003 6 15 Series 12000A Microwave Synthesizers 9 10 11 12 Disconnect the back up battery P201 Disconnect
65. cy accurate it accurate OK now Note 7 Yes Repair Replace Locked A1 A1A1 or A1A2 Yes L Note 8 v E Is any Repair Replace No modulation on A1 A1A1 or A1A2 Yes Yes Turn modulation off Y od NS Repair Replace Locked A1 A1A1 or A1A2 u Note 8 Y Is the Is any J Julai Yes urn modulation eee i modulation on off yV Continues on next PN page Is an external reference in use m Yes gt No Y Disconnect the external reference Repair Replace A1 A1A1 or A1A2 Rh Note 8 Repair Replace A15 Time Base Publication 31232 Rev A7 October 2003 CW Operation Frequency Continued CW Operation Frequency Continued From Previous Page v Are there Are the spurious Troubleshooting No gt Repair Replace the A1 Assembly Yes gt discrete spurious es signals that are out of harmonics of the spec carier No Yes 3 Y End Is the output level ML set to lt 10 ko dBm Are the spurious signals present for carriers below 2 GHz Note 9 Yes gt Repair Replace the A8 Downconverter Set the output level to lt 10 dBm No Y Repair Replace the A6 Assembly Modulation modes apply to Series
66. d the front panel It controls most of the other instrument PC assemblies via a peripheral data bus The 11 outputs include many of the rear panel BNC connectors and the display Frequency synthesis and frequency modulation are controlled by the Al Synthesizer PC assembly This board in conjunction with the 4 8 GHz YIG oscillator supplies signals from 1 to 8 GHz The output from 1 is routed to the and A8 microwave assemblies The Frequency Extension Module A5 accepts input signal from module A7 in the range of 10 20 GHz and creates signals in the range of 20 40 GHz using frequency doublers The output signals are amplified modulated when required and filtered to remove the undesired harmonics The module also accepts the input signals from A6 in the range of 01 20 GHz and multiplexes to the main output providing a full 01 40 GHz out wide band directional detector provides RF level to D C voltage output over the combined frequency range of 2 40 GHz The A6 assembly contains the amplifiers amplitude control elements and harmonic filters for the 2 40 GHz frequency range The A8 assembly contains the same elements for the 01 2 GHz portion of the output range Microwave module A7 houses the multipliers and filters to produce 8 40 GHz Its output is routed to A6 for amplification and level control The output of A6 is optionally routed through the step attenuator Control of the amplitude functions leveling and amplitude modulation
67. de Residual Column Section 1 5 3 Phase Offset Mode Range 180 to 180 degrees Resolution 01 degrees maximum Step Size 01 to 180 degrees Accuracy Not specified This is relative mode of operation and is designed to be used interactively Publication 31232 Rev A7 October 2003 1 3 Series 12000A Microwave Synthesizers 1 2 2 1 4 RF Output Maximum Leveled Output 0 to 35 C Frequency Range GHz Output Power dBm Option 26 dBm 0 01 to 2 15 dBm 14 dBm gt 2to lt 8 15 dBm 15 dBm 8 to 15 15 dBm 13 dBm gt 15 to 20 15 dBm 12 dBm Incremental Level Range 20 Typical to 25 dBm 120 to 25 dBm Option 26 Resolution 0 01 dB entry and display Minimum Calibrated Output Level 120 dBm with attenuator Option 26 10 dBm without attenuator Option 26 RF Off Attenuates the output to lt 140 dBm at the output connector Flatness 0 5 dB 10 dBm to maximum specified power at 25 10 C Internally Leveled CW or Frequency Step or Ramp Mode Add 0 1dB 10 dB with attenuator option 2 5 dB with Option 20 At 35 to 55 C maximum output power is 13 dBm flatness 1 dB Typical temperature coefficient is 0 025 dB per degree See Section 1 3 3 for Option 20 limitations involving use with the 124XXA Resolution Add 0 2 dB to Flatness Internally Leveled CW Frequency Step or Ramp Maximum Slope of Level
68. de steering network on the 4 assembly switches both the time base and the YIG heater to the main supply The standby supply is then used to run the cooling fan Publication 31232 Rev A7 October 2003 4 3 Series 12000A Microwave Synthesizers 4 3 Power Distribution Subsystem A4 Power Distribution Subsystem A4 125 124XXA oe 4 3 1 Electrical Operation Circuit Description The 4 Distribution assembly is used to condition and distribute the main power supply voltages and various locally generated voltages to the other assemblies In addition it provides control for the A5 A6 A7 A8 modules the fan the step attenuator and the high power option 4 3 1 Electrical Operation Circuit Description m gt Control Peripheral Analog Switch Data Bus FPGA Metrix o gt A8 Control _ gt To Fan REI ADC Misc Voltages Step Attenuator gt gt To Step Attenuator Controller High Power Opti E M To High Powe i Controller idis LO sey Ij 48 3 Volts 5 Volts 10 Volts endy LC o 5 Standby 18 Volts 5 Volts 10 Valts Supply Figure 4 2 A4 Distribution Block Diagram 4 3 1 1 FPGA Interface The instrument Peripheral Data Bus provides data from the CPU to the on board FPGA U101 This device has i
69. description 4 1 Performance Specifications 1 2 Performance Test and Calibration Performance Tests 2 2 Recommended Equipment Performance Tests 2 2 Frequency Modulation 2 12 Frequency Range Resolution and Accuracy 2 3 Introduction 2 2 Pulse Modulation Accuracy Test 2 11 Pulse Modulation On Off Ratio Test 2 8 Pulse Modulation Overshoot and Settling Time 2 10 Pulse Modulation Rise and Fall Time Test 2 9 RF Output Power Tests 2 7 Single Sideband Phase Noise 2 6 Spurious Signals Tests 2 4 Power Distribution Subsystem A4 Power Supply Subsystem A9 4 2 Preparation 4 Pulse Modulation Accuracy Test 2 11 Pulse Modulation On Off Ratio Test 2 8 Pulse Modulation Overshoot and Settling Time 2 10 Pulse Modulation Rise and Fall Time Test 2 9 2 1 4 3 R Recommended Equipment 2 1 Recommended Test Equipment 3 1 Record of Manual Changes ix RF Output Power Tests 2 7 S Scan Modulation Calibration 3 8 Single Sideband Phase Noise 2 6 Spurious Signals Tests 2 4 Synthesizer Subsystem A1 System Description Introduction 1 1 4 11 Index 1 Series 12000A Microwave Synthesizers T Theory of Operation 4 1 Time Base Calibration 3 2 Time Base Module Subsystem A15 4 10 Troubleshooting Fault Isolation 6 1 Index 2 Manual 31232 Rev A7 October 2003
70. dulation Calibration Connection Connect the UUT computer and Modulation Analyzer to the IEEE 488 bus The UUT should be at address 6 the default the modulation analyzer at 14 and the LO source at 7 Connect the UUT RF output to the mixer RF input and the LO source shown as a second model 12000A to the mixer LO input If the LO source is a Giga tronics model 12000A or a Giga tronics model GT9000 the program will set the frequency and power If the source is some other model set the LO source to 5450 MHz at 10 dBm CW mode and press Cancel in the source prompt window Connect the Mixer Divider IF divide by 40 output to the Modulation analyzer input NOTE The Mixer Divider is required since the 8902 is not capable of measuring the required FM deviation The divider reduces the deviation by a factor of 40 allowing the 8902 to make the measurement The step by step procedure below explains how to use the Audio Source DC Source and Voltmeter Operator actions are directed by screen prompts 3 14 Publication 31232 Rev A7 October 2003 Calibration 3 6 1 1 Frequency Modulation Instructions If the 12000A has not been previously warmed up allow 15 minutes of warm up In the Characterize section click on the FM Calibration box Follow the on screen prompt windows for step by step instructions The steps are outlined below for convenience 1 The first step requests a zero volts input to the UUT FM connector Simply leave the
71. e Series 12000A has model numbers for each instrument with a specific frequency range as described in Chapter 1 All models are referred to in this manual by the general term 12000A except where it is necessary to make a distinction between the models In these cases the specific model number s will be used DECLARATION OF CONFORMITY Giga tr Onic C Giga tronics Incorporated 4650 Norris Canyon Road San Ramon CA 94583 Tel 925 328 4650 Fax 925 328 4700 DECLARATION OF CONFORMITY Application of Council Directive s Standard s to which Conformity is Declared 89 336 EEC and 73 23 EEC EMC Directive and Low Voltage Directive EN61010 1 1993 Electrical Safety EN61326 1 1997 EMC Emissions amp Immunity Manufacturer s Name Manufacturer s Address Giga tronics Incorporated 4650 Norris Canyon Road San Ramon California 94583 U S A Type of Equipment Model Series Number Microwave Synthesizer 12000A Modei Number s in Series 12408A 12420A 12422A 12428A 12508A 12520A 12522A 12528A 12708A 12720A 12722A 12728A I the undersigned hereby declare that the equipment specified above conforms to the above Directive s and Standard s Claudio Mariotta Acting Director of Quality Assurance Full Name g 9 Position San Ramon California February 27 2002 Place Date QUF06015 2 27 02 Table of Contents About This Manuall 5 22 04 edet videt de UR tage a ool v
72. ected via a ribbon cable to A11 CPU J501 The ribbon cable carries all of the signals and power for the display Optical Encoder The encoder mounts to the front panel and is connected to the A10 Assembly with a five pin cable The optical encoder is driven by a knob on the front panel and has 64 counts per revolution Turning the optical encoder knob rapidly about 3 revolutions per second produces about 200 counts per second Publication 31232 Rev A7 October 2003 4 13 Series 12000A Microwave Synthesizers 4 6 Timebase Module Subsystem A15 Timebase Module Subsystem A15 125XXAl 124XXA 127XXA 4 6 1 Synthesizer Subsystem A1 y amp VOLTAGE 1 2 5 MHz EXT REF PRESENT aie LIMITING EXTERNAL REF IN CR3 4 01 J104 ug 10 INTERNAL REF OUT Figure 4 4 A15 Block Diagram A15 supplies several modules with a 10 MHz frequency standard There are eight low current drive outputs and one high current drive output One of the low current drive outputs feeds the rear panel BNC connector The standard is derived from an on board ovenized 10 MHz voltage controlled crystal oscillator module Regardless of whether the operating frequency is derived from the internal crystal oscillator module or an external source it is the internal module that actually feeds 10 MHz to the A15 outputs The oscillator feeds three high current buffers Two outputs of are par
73. ed in this description of the Characterization screen of the Calibration Control Program Calibration performs the necessary steps to calibrate the frequency modulation function Calibrating the Frequency Modulation also calibrates the Phase Modulation FM calibration must be done if the A1 synthesizer board is replaced AM Calibration performs the necessary steps to calibrate the amplitude modulation function This calibration of the Scan mode is also performed at this time This calibration should be performed whenever the A6 or A8 assemblies are replaced Be sure to do the Modulator characterizations first if required e Modulator Scan linearizes the modulators to provide accurate attenuation levels for the open looped deep AM Scan Modulation This calibration should be performed whenever the A6 or A8 assemblies are replaced Publication 31232 Rev A7 October 2003 3 13 Series 12000A Microwave Synthesizers 3 6 1 Frequency Modulation Calibration Audio Generator DC Source Voltmeter He 12000A Computer MICROWAVE SYNTHESIZER UUT n Series 12500A 12700A FM In pd a E E IEEE 488 4 t zs RF Out Mixer Divider 8902 Modulation Analyzer c gt BU 12000A MICROWAVE SYNTHESIZER Series 12500A 12700A Only Figure 3 2 Frequency Mo
74. el indicator LEDs are driven serially by the CPU Video Controller A Graphics Controller and 32 K x 16 SRAM provides a complete video controller to drive a 320 x 240 pixel LCD display A clock frequency of 6 25 MHz gives a display refresh rate of about 74 Hz LCD Bias and Contrast Supply U507 and associated circuitry provide a 222V bias supply for the LCD panel LCD contrast is adjusted by U506 The serial data bus controls U506 GPIB amp RS232 Interfaces A National Instruments NAT9914 provides all of the control logic for the GPIB interface A 75ALS160 and 75ALS162 function as GPIB bus transceivers The GPIB controller shares the CPU s second DMA channel with the CPUS serial port and the I O Expansion Board The CPU has two integrated serial ports A MAX213 translates TTL level signals from both ports to RS232 voltage levels The device contains built in voltage doublers to translate 5V into levels suitable for RS232 External Rear Panel Connections There are several BNC connections on the rear panel that are controlled by the CPU Trigger In Trigger Out Lock Level Out Stop Sweep I O a bi directional signal and Blank Marker This output is at 5V when MARK BLANK HIGH is at 5V 5V when MARK BLANK LOW is at 5 or OV out when both inputs are at OV 1 0 Expansion Connector P703 This connector provides address data and control signals for an additional I O port Power Supplies Linear voltage regulators convert 6
75. em to use it and until the next pulse arrives with its new level information The PM detected signal also differs from CW and Linear AM in that the narrow pulses and rapid rise time represent a much wider bandwidth than 10 KHz to 1 MHz at least 20 MHz which affects both the amplifiers and even the envelope detector itself In the respective RF amplifier subsystem a broadband higher gain preamplifier is used Its input terminates the diode detector with only 1 K Ohm needed in order for the diode to respond rapidly enough Such low terminating impedance degrades both the detected signal level and temperature stability The ALC board includes a broadband variable gain amplifier and the necessary circuitry to capture the detected pulse amplitude It is not necessary to determine the detected pulse s presence directly as its presence is directly correlated with the demand pulse albeit with a delay This delay cannot be controlled in Production with sufficient precision to capture the level in a Sample and Hold circuit by itself so preceding it is a peak detector which unlike the Sample and Hold requires no control signal to capture the level The peak detector control line shown in the Figure is used only to reset it The Pulse Level Acquisition Controller FPGA receives the Demand Pulses and passes them immediately to the RF on off switches It uses the timing of these Pulses as well as the A D converter sample clock to operate the sample
76. en received within the time allotted For cal numbers 0 and 41 this is 5 msec for the remaining calibrations this is 640 msec A1A2 Cal xx operation error Data and strobe have been sent for one of 41 A1A2 calibrations and the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed 1 2 Cal xx DSP Word 0 data readback timeout One of the 41 A1A2 calibrations has completed successfully and a request has been sent to retrieve the results but after 5 msec no response has been received MA Cal xx DSP Word 0 data readback error One of the 41 A1A2 calibrations has completed successfully a request has been sent to retrieve the results but the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed MA Cal xx DSP Word 1 data readback timeout One of A1A2 calibrations 1 39 has completed successfully and a request has been sent to retrieve the second word of results but after 5 msec no response has been received MA Cal xx DSP Word 1 data readback error One of A1A2 calibrations 1 39 has completed successfully a request has been sent to retrieve the second word of results but the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed ALC SP FPGA cfg ack timeout The command has been sent to the ALC
77. en the Fixed Frequency screen displays press the RF On button 3 Click on the Modulator Level Test button to begin the process e The Modulator routine generates a curve of attenuation verses control voltage for the modu lators at various frequencies This section must be performed whenever the A3 A6 or A8 assemblies have been changed Publication 31232 Rev A7 October 2003 3 9 Series 12000A Microwave Synthesizers 3 5 1 3 10 ALC Characterization Instructions After clicking on the Modulator button the main window will look like the following picture The monitor screen will now show the power meter readings if that mode is selected In addition the bottom lines of the main window will show the test being performed and the readings as they are taken This process will take about 55 minutes for a 01 to 20 GHz instrument NOTE When this process is finished the instrument MUST be powered down to properly store the data this occurs when it is powered back up before any other calibrations are done or before the instrument is used 12000A Cal version 3 38 19th March 2002 of XI View Check Connection 10 1 Pad dB n RF Low Power Unitis Parameter Block Setup GPIB Addresses 12000A Unit Power Meter Freg Counter Redo unte Serial Number 10011 Model 12520 Min Frea 710 MHz Max Freq 20199 MHz Option 26 Option 20 Ramp Sweep
78. ency doubler ADA2 to produce 16 20 2 GHz The four frequency bands are filtered to remove the 1 2s and 3 2s spurious signals and combined by a second SP4T switch 4 20 Publication 31232 Rev A7 October 2003 4 8 4 9 4 9 1 4 9 2 Theory of Operation Interface Assembly 17 Interface Assembly A17 124XXA MANN This printed circuit assembly is used to connect microwave assemblies A6 2 40 GHZ Output Module and A7 Multiplier Module to the rest of the system The board provides signal conditioning and routing for both the detector outputs and some of the modulator inputs Connector P1 delivers power and PIN diode switching signals to both A7 and A6 PIN diode signals for switch filters pass through resistors R8 R20 before connecting and A7 There are two amplifier channels used as detector buffers One for CW operation provides low noise low drift gain The other for pulse operation features fast rise time The outputs feed the ALC assembly Down Converter A8 Down Converter A8 4 9 1 The Source Block 4 9 2 The Amplifier amp Modulator Block NIA y 4 9 3 The Switch Filter Block 4 9 4 The Control Logic Block 4 9 5 System Interface y The Digital Down Converter module accepts signals in the range of 1 2 GHz at 4 8 dBm and outputs signals in the range of 01 2 0 GHz at 25 to 18 dBm The module also provides pulse modulation amplitude modulation harm
79. for compliance with MIL PRF 28800F Class 3 Publication 31232 Rev A7 October 2003 1 1 Series 12000A Microwave Synthesizers 1 2 1 2 1 Specifications Signal Parameters amp Operational Modes Specifications 125 127 1 2 1 CW Operation 1 2 2 RF Output 1 2 3 Spectral Purity 1 2 4 Step Frequency Sweep LS zm a pet 1 2 5 Step Power Sweep The following are specifications for the Series 12000A Microwave Synthesizers CW Operation Ranges Model 10 MHz to 8 GHz 12408A 12508A 12708A 2 GHz to 8 GHz 12428A 12528A 12728A 10 MHz to 20 GHz 12420A 12520A 12720A 2 GHz to 20 GHz 12422A 12522A 12722A Resolution 0 1 Hz Standard 1 kHz Optional Accuracy amp Stability Identical to Timebase Oscillator Timebase Internal 10 MHz Aging Rate lt 5x 10 day after 72 hours continuous oven operation Temperature Stability lt 2x 10 C 0 to 55 C 5 or 10 MHz 1 x 10 or better Software selected Timghase External 0 5 to 5 V p p into 100 Q Nominal Switching Time List Mode lt 500 us to within 1 kHz of set frequency Typical Switching Time CW Mode 35 ms to within 1 kHz of set frequency Includes IEEE overhead Typical Publication 31232 Rev A7 October 2003 Specifications Residual FM During Switching Refer to FM Table Wide Mo
80. gure 6 1 Figure 6 2 Figure 6 3 Figure 6 4 Figure 6 5 Figure 6 6 Figure 6 7 Manual 31232 Rev A7 October 2003 Frequency Range Resolution and Accuracy Spurious Signals Tests Single Sideband Phase Noise RF Output POWer TEStS utut o daas Pulse Modulation On Off Ratio Test Pulse Modulation Rise Fall Time 2 9 PM Overshoot and Setting TIME Pulse Modulation Accuracy Test Frequency Modulation Test Output Amplitude Calibration Frequency Modulation Calibration Amplitude Modulation Calibration Connection Scan Modulation Calibration Connection Overall Block Diagram A4 Distribution Block Diagram Block Diagrani sect zo kc eed Ir ER E URN ee ede 15 Block DiagranNi ioi ees Pied eter er iedDe wat deg 1 Synthesizer Block DiaQram ccccecc eee e eee ee eee eens eect ene eneeae eae eee A3 Conceptual Block Diagram Fault Isolation Tree Fault Isolation Tree Fault Isolation Tree Fault Isolation Tree Fault Isolation Tree Fault Isolation Tree Fault Isolation Tree Power On Power On Sequence Continued CW
81. he oscillator and would degrade the spectral purity of the output signal To reduce the noise capacitor C746 is connected across the main tune coil once the instrument has acquired phase lock after a frequency change The capacitor must be pre charged to exactly match the voltage across the coil prior to being connected to prevent transients ce NOTE There are no adjustments in this circuit Each time the instrument is powered up a calibration routine is run to determine the proper setting for the DAC to produce a locked condition with the loop control voltage close to zero Two points are determined one near 4 GHz and the other near 8 GHz The computer then uses this information and linearly changes the DAC output proportional to the desired frequency During instrument operation in most modes other than sweep the loop voltage is monitored and the setting of the DAC is changed one bit at a time to maintain the loop near zero This change is not noticeable and automatically corrects for any drift or non linearities Publication 31232 Rev A7 October 2003 4 17 Series 12000A Microwave Synthesizers 4 6 1 4 4 6 1 5 4 18 Frequency Modulation System External frequency modulation for the instrument is controlled entirely by this assembly Since the modulation frequency spans DC to 1 MHz it is necessary to modulate both within the loop and outside the loop Modulation inside the loop is accomplished using the DDS modulat
82. his assembly must be removed in a static controlled environment 1 23 6 12 Remove the bottom cover 1 Disconnect the three coaxial cables from the A1A1 sub assembly Disconnect the two power connectors P401 P801 the YIG P701 and FET P702 connectors and the peripheral buss connector P101 When removing the peripheral buss connector press the locking ears outward to release the connector Disconnect the two blue 10 MHz coax cables J101 J102 When removing these use the proper removal tool or pull straight up with small tweezers held parallel to the board Disconnect the twisted pair cable connector at P103 Press the lock release on the cable connector to release Remove the seven 6 screws around the perimeter of the board Note that one of these is accessible through the corner hole in the A1A2 assembly Carefully lift the board out of the instrument a To remove the ALA1 A1A2 assemblies 1 Disconnect the blue cable at J501 on the A1 synthesizer board 2 Remove the four 4 screws closest to the four corners of the assembly These screws are about 1 5 inches long 3 Carefully lift both assemblies as a unit There is a multi pin connector on the A1A2 which goes through a socket on the A1A1 and then into another socket on the 1 synthesizer board It may be necessary to rock the assembly slightly to ease removal 4 If the AIAI and A1A2 assemblies need to be separated from each other carefully pry them
83. icularly susceptible to measurement system limitations 2 2 4 2 Equipment Required UUT e Spectrum Analyzer e Coaxial Cable MICROWAVE SYNTHESIZER UUT Spectrum Analyzer Series 124XXA Illustrated Figure 2 3 Single Sideband Phase Noise 2 2 4 3 Procedure 1 Connect the 12000A RF output to the spectrum analyzer input Place the 12000A on a foam pad to isolate it from any external mechanical vibrations which could affect the phase noise measurement 2 Turn off all modulation on the 12000A 3 For the first frequency on the test data sheet within the range of the instrument press CW and enter the frequency Tune the spectrum analyzer to the generator frequency and adjust the 12000A RF level to obtain a reference of 0 dBm on the analyzer This allows direct measurement of the phase noise by the analyzer 4 Settheanalyzer span such that the desired offset is at 2 divisions select an appropriate bandwidth activate the phase noise measurement and place the marker two divisions to the right of the carrier Read the phase noise in dBc Hz Repeat for all offsets 5 Repeat steps 3 and 4 for the other test data sheet frequencies which are within range of the 12000A 2 6 Publication 31232 Rev A7 October 2003 Performance Verification 2 2 5 RF Output Power Tests 2 2 5 1 Description Although it is possible to make the following measurements manually it is extremely tedious It is recommended that an a
84. ignals If possible verify the signal levels from 17 and or 8 before replacing assemblies 6 This problem includes frequency errors phase noise problems and both harmonically and non harmonically related spurious signals It is appropriate to determine over what Ei Ni range of carrier frequencies and output amplitude levels the problem exists This will often provide additional information to help isolate the cause 7 See the calibration section of this publication for the procedure Y Y 8 If available exchange the A1A1 A1A2 assembly with a known good set and see if this 4 fixes the problem If so determine which of the two is at fault If not replace the main A1 NL assembly No re calibration is needed if just 1 1 and or A1A2 is replaced FM re Limitations y calibration is needed if A1 is replaced Reference to FM re calibration does not apply to Apply Series 124XXA Models 9 Although the A1 assembly may be the point of entry for the spurious signals poor connections on ground or power supply leads should be checked The power supply itself may be producing ripple outside the specified levels Also check if the spurious signal Ei 4 levels are affected by the amplitude setting If so the A3 ALC assembly or one of the RF modules may be at fault Try looking at the output of A1A1 at J402 with a spectrum analyzer and see if the spur is still present 10 A Yes answer here should be used only if the le
85. ing the battery will clear the non volatile memory If the 11 assembly is to be re used in this instrument do not disconnect the battery unfasten it from the chassis instead Remove the five 6 screws and lift the assembly out of the instrument To replace the 11 assembly reverse the above procedure Be certain that all connectors are properly aligned The blue cable is connected by pressing straight down over its socket a When re connecting the LCD flex cable grasp the cable near the end and press firmly and carefully into the socket The cable should have the blue plastic strip toward the PC board i e not visible after the cable is installed 6 2 10 A8 Downconverter This assembly must be removed in a static controlled environment 1 2 6 16 Remove the top cover 1 Remove the A16 Internal Modulation Generator assembly 8 if installed Remove the two white coaxial cables One is located at the front edge of the assembly the other on the inside edge near the peripheral bus cable Remove the five blue coaxial cables When removing these use the proper removal tool or pull straight up with small tweezers held parallel to the board Remove the power control ribbon cable When removing this cable press the locking ears outward to release the connector Remove the seven 6 screws around the perimeter If the A16 board was installed some of the screws are replaced with spacers remove these and lift the asse
86. ion outside the loop is summed directly into the YIG FM coil driver The signal for the Inside the Loop portion of the FM goes through active filter U312 a fixed low pass filter and the high speed ADC The digitized signal is sent to the DSP which uses it to reprogram the frequency setting of the DDS at a 1 MHz rate thus frequency modulating the DDS output Since the control is wholly digital and the input is DC coupled true DCFM is possible with full synthesizer accuracy The signal for the Outside the Loop portion of the modulation effectively everything above 15 kHz passes through a high pass filter to remove the DC component The signal for this path has its level adjusted to match the deviation of the inside the loop portion by DAC U302 and analog multiplier U303 Additional gain selection primarily for input sensitivity setting is provided by a resistor network switch U304 and amplifier U305 The output of U305 goes to the YIG FM coil driver Due to the phase shift caused by both the primary loop and the tracking filter loop it is necessary to provide additional compensation to maintain the flatness specification of the deviation Amplifiers U318 and U320 comprise active filters to produce the required correction The correction signal amplitude is adjusted using DAC POT U319 During narrow FM operation switch U604 connects the correction signal directly into the phase detector Control System The various functions and opera
87. its with firmware V073 B49 22 and higher Otherwise just perform the steps listed under 3 below 1 Click on the LCD Timebase button 2 Per the action required window set the timebase as described next 3 To set the timebase a Press the front panel LOCAL button b Connect the frequency standard to the rear panel Ref In BNC connector and make sure the instrument has had at least a 15 minute warm up c Press the CONFIG button then the Service softkey then the Hardware Testing softkey d Now press the Timebase Cal softkey Either a 5 or 10 MHz reference frequency may now be selected using the up down buttons e Press the Cal Timebase softkey to calibrate the timebase f Press the Store Cal to store the calibration 4 The Contrast Adjustment window will now appear Contrast Adjustment Iof x Value Dark Bright Move slider to adjust the Contrast then press Enter a Click on the window Use the mouser or the keyboard left and right arrow keys to move the slider pointer The word value will change to a number showing the contrast value b Press Enter after a good viewing contrast is attained Publication 31232 Rev A7 October 2003 3 7 Series 12000A Microwave Synthesizers c message window will show Characterization Complete Click OK Power the 12000A down and back up d After the Fixed Frequency screen is displayed on the 12000A click the Read button under the parameter block to re
88. iver is a high current device about 200 ma output which drives the YIG oscillator FM coil Publication 31232 Rev A7 October 2003 Theory of Operation 4 6 1 2 High Resolution DDS To enable the synthesizer to have 0 1 Hz resolution a Direct Digital Synthesizer DDS is used in conjunction with a SSB mixer in the A1A1 This DDS is programmed by the DSP and produces steps of 0 025 Hz Due to the divide by four prior to the SSB mixer in the A1A1 the DDS output is effectively multiplied by four at the output of the synthesizer 4 6 1 3 YIG Oscillator Main Tune Coil Driver The driver for the YIG main tune coil converts a voltage based command from the control system into a current which tunes the oscillator The tuning resolution is approximately 60 kHz The driver also includes the circuitry to switch in the noise reduction capacitor A 16 bit DAC U702 controlled by the DSP and amplifier U705B provide a voltage proportional to frequency Amplifier U705A compares the voltage from the DAC to the amplified voltage from the current sense resistor R724 The output of the amplifier is used to control power FET Q703 This FET in series with the supply voltage to the YIG oscillator main tune coil effectively sets the current through the coil and thus determines the frequency To maintain a fast switching speed it is necessary to minimize any capacitance across the YIG coil This however results in considerable noise being applied to t
89. ky diode pairs at the intersection of a co planar waveguide slotline junction 20 to 40 GHz amplifier recaptures some of the loss of the doublers A dual attenuator approach provides 50 dB dynamic range 10 dB is used to bring the signal into a linear range out of saturation The rest of the dynamic range is utilized for amplitude control and or AM modulation A set of three identical broadband medium power 20 40 GHz MMW amplifiers boosts the signal up to the 100 mW range Publication 31232 Rev A7 October 2003 Theory of Operation 4 3 1 12 Output Combiner Three band pass filters remove higher order and sub harmonics generated by the doubler and amplifier A diplexer low pass filter in conjunction with a PIN diode switch recombine the three bands and the 10 2 to 20 GHz input from module A6 The broadband coupler detector provides level to D C voltage conversion for 2 40 GHz Finally the signal is routed to the module s 10 MHz to 40 GHz output connector Publication 31232 Rev A7 October 2003 4 7 Series 12000A Microwave Synthesizers 4 3 2 System Interface The 5 1 board interfaces the A5 module to the 12000 system It distributes all of the power supplies and control lines to A5 via feed thru and socket connections The module receives regulated power supply voltages and TTL band switching commands from the Distribution Module A4 via a multi pin connector see attached Control Logic diagram for more detail An AL
90. lications 5 Replaceable Parts Lists replaceable parts for the Series 12000A Microwave Synthesizers 6 Troubleshooting Section contains procedures for troubleshooting and lists a series of Error codes Index Series 12000A Microwave Synthesizer A subject listing of contents for the Series 12000A data that is native to all three models Series 124XXA 125XXA and 127XXA Series 12500A 12700A Native Data Only A subject listing of contents for the Series 125XXA 127XXA models only Publication 31232 Rev A7 October 2003 Series 12000A Microwave Synthesizers Changes that occur after production of this publication and Special Configuration data will be inserted as loose pages in the publication binder Please insert and or replace the indicated pages as detailed in the Technical Publication Change Instructions included with new and or replacement pages vi Publication 31232 Rev A7 October 2003 Conventions The following conventions are used in this publication Additional conventions not included here will be defined at the time of usage Warning The WARNING statement is encased in gray and centered in the page This calls attention to a situation or an operating or maintenance procedure or practice which if not strictly corrected or observed could result in injury or death of personnel An example is the proximity of high voltage Caution CAUTION The CAUTION statement is enclosed with single lines and
91. lies only up to 30 dB and frequencies above 2 GHz is 50 dB Linearity 0 6 dB 0 20 dB 1 dB 20 50 dB Publication 31232 Rev A7 October 2003 1 27 Series 12000A Microwave Synthesizers 1 6 2 3 Internally Generated Scan AM Envelope See Specifications for Option 24 in section 1 6 1 1 6 2 4 Power 2 dB reduction in power 01 20 GHz 1 28 Publication 31232 Rev A7 October 2003 2 1 2 1 1 Performance Verification Introduction Introduction Performance Verification 2 1 1 Recommended Equipment 124XXA 125XXA 127XXA This chapter provides step by step procedures to verify performance of the Series 12000A Microwave Synthesizers for all three models Modulation related items are in Section 2 3 for the Series 125XXA 127XXA models Sectional header page references are only provided for items pertaining directly to performance verification testing The required warm up time before testing is 72 hours The warm up period can be reduced to 30 minutes if timebase accuracy is not to be tested for all three models nthese procedures the instrument being tested may be referred to as the 12000A or UUT Unit Under Test for all three models Recommended Equipment The following equipment is recommended before starting the performance test routines the recommended equipment can be substituted provided the specifications are sufficiently compatible Table 2 1 Series 12000A Reco
92. mbly out of the instrument To replace the A8 assembly reverse the above procedure Be certain that all connectors are properly aligned a The blue cables are connected by pressing straight down over their sockets Publication 31232 Rev A7 October 2003 Troubleshooting 6 2 11 A6 A7 A17 Microwave Assembly This assembly must be removed in a static controlled environment 1 2 10 11 Remove the bottom cover 1 Disconnect the RF input on the front of the assembly Semi flex which comes from the A1 synthesizer assembly Disconnect the RF input on the rear of the assembly white coax which comes from the A8 downconverter if installed Disconnect the RF output on the rear of the assembly Semi flex Disconnect the ribbon cable from P1 When removing this cable press the locking ears outward to release the connector Disconnect the five blue coaxial cables When removing these use the proper removal tool or pull straight up with small tweezers held parallel to the board Remove the four slotted head 6 screws from the top module A7 if it is installed If not these screws are phillips head and are on the A17 PC assembly Remove the two 6 screws from the back end of the A17 PC assembly and lift the entire assembly out of the instrument To replace the A8 assembly reverse the above procedure Be certain that all connectors are properly aligned a The blue cables are connected by pressing straight do
93. measure the voltage at the FM input connector with everything connected This test calibrates the outside the loop portion of the FM approximately 15 kHz to 8 MHz Press OK when ready The following windows will be displayed during the FM calibration process In addition prompt windows will appear to provide instructions for each step of the test The monitor window display the data that is being sent Action Required x N Set timebase reference if not done then click OK Cancel Action Required x Connect and set GPIB addresses of the Receiverto 14 press OK when ready Cancel Publication 31232 Rev A7 October 2003 3 15 Series 12000A Microwave Synthesizers 3 16 Action Required x N Connect and set GPIB addresses of LO 120004 or S000 to 7 press OK when ready press Cancel for manual setting of LO Cancel 12000A Cal version 3 17 10th July 2001 OO x View Check Connection Setup GPIB Addresses 12000 Unit Power Meter Freq Counter 10 1 Pad dB RF Low Power Uniti5 Parameter Block Read Serial Number 117018 Model 12720A Min Frea 10 MHz Max Freq 20199 MHz Option 26 I Option 20 M I Option 24 34 Option 36 Pulse Mod feels GiGadianics made Pause Close Publication 31232 Rev A7 October 2003 Calibration
94. ment uncertainties in the test system These include but are not limited to VSWR Cal Factor uncertainty and calibration Publication 31232 Rev A7 October 2003 2 7 Series 12000A Microwave Synthesizers 2 2 5 4 Procedure Attenuator Test Option 26 1 Connect the 12000A to the measuring receiver via the downconverter With the 12000A at O dBm and set to the first test frequency set LO 21 4 MHz above UUT set frequency Establish a reference on the receiver in a tuned RF level mode Reduce the 12000A output in 10 dB steps observing and recording the receiver reading As needed perform the recalibration requested by the receiver Plotter LI Computer IEEE 488 2 Control Bus 12520A 12720A MICROWAVE SYNTHESIZER UUT LocalOscillator Measuring Receiver RF IN Filter 21 4 MHz Figure 2 5 RF Output Power Attenuator Test 2 Repeat this procedure for the remaining test frequencies E NOTE When measuring the flatness and accuracy of the model 12000A consideration must be given to the various measurement uncertainties in the test system These include but are not limited to VSWR Cal Factor uncertainty and calibration 2 8 Publication 31232 Rev A7 October 2003 Performance Verification 2 3 Performance Tests Series 12500A 127004 Performance Tests Series 12500A 12700A 125XXA 127XXA 2 3 1 Amplitude Modulation Test NIA y 2 10 2 3 2
95. mmended Equipment Equipment Example Frequency Standard 10 MHz Stanford Research FS 725 Oscilloscope Tektronix TDS3052B or Equivalent Microwave Frequency Counter XL Microwave 3260 or Equivalent Power Meter and Sensor Giga tronics 8541C Series 8650A w 80313A Sensor or Equivalent Spectrum Analyzer 8566B or Equivalent Detector Herotek Model DZ262 44 or Equivalent Function Audio Generator Stanford Research DS 345 or Equivalent Measuring Receiver HP 89024 or Equivalent Distortion Analyzer HP 339A or Equivalent 1 0 Generator Giga tronics Microwave Synthesizer 12720A or Equivalent Universal Counter Racal Dana 2201 or Equivalent Mixer IF Amplifier w Divide by 40 Output Giga tronics Mixer Divider P N 002CA04900 Mixer For Attenuator Test Marki M40020MJ Filter 21 4 MHz Mini Circuits SVP 21 4 Fixed Attenuator 3 dB Midwest ATT 0263 03 SMA 02 Fixed Attenuator 10 dB Midwest ATT 0263 10 SMA 02 Publication 31232 Rev A7 October 2003 2 1 Series 12000A Microwave Synthesizers 2 2 2 2 1 2 2 Performance Tests a aa Performance Tests EBEN Page 127XXA 2 2 1 Introduction Performance Tests Y 22 2 2 2 Frequency Range Resolution amp Accuracy Y 2 3 2 2 3 Spurious Signals Tests Y 24 2 2 4 Signal Sideband Phase Noise Y 2 6 2 2 5 RF Output Power Tests y 27 Intr
96. mulator and feed forward Linear AM modulator multiplier inside the Sig Proc FPGA is another lookup table This De linearization RAM permits linear changes of the integrator output to result in linear changes of 12000A RF output voltage despite the grossly nonlinear mainly logarithmic transfer characteristics of the gain control elements located in the various RF amplifier subsystems The digital control signal is now converted to an analog signal and then gain and offset adjusted in separate selectable circuits to accommodate the peculiar gain control curves of each of the three RF amplifier subsystems The RF output level vs D A converter count value at various frequencies is measured and stored during the characterization process Publication 31232 Rev A7 October 2003 4 25 Series 12000A Microwave Synthesizers 4 10 2 4 26 CW Operation The selector switch in the particular RF amplifier subsystem selects the carrier preamplifier This preamplifier is also used for Linear AM and calibration of Logarithmic AM This preamplifier is optimized for voltage offset stability and low noise It includes a 20 K Ohm termination for the detector to maximize its temperature stability and output level Its DC to 1 MHz bandwidth is needed only for Linear AM only DC to 30 KHz is needed for CW At the ALC Board input is a switch not shown that selects one of the three RF amplifier subsystems or an external detector The RF leveling A
97. n 31232 Rev A7 October 2003 Performance Verification The adjusting knob on the 12000A may generate some noise spikes when it is rotated The acquisition of the various phase lock loops in the instrument can also cause transients within the specified settling time Both of these effects will disappear when a steady state condition has been reached It is important to identify the particular class of spurious signal as the specifications may be different for each If the spurious signal is an exact multiple of the 12000A RF output then the harmonic specification applies Any other spurious signals must meet the non harmonically related specification For frequencies above the fundamental range of the spectrum analyzer either a mixer supplied with the spectrum analyzer or an external mixer and local oscillator may be used to downconvert the signal Care must be taken to identify spurious signals which are inherently generated by the mixing process Publication 31232 Rev A7 October 2003 2 5 Series 12000A Microwave Synthesizers 2 2 4 Single Sideband Phase Noise 2 2 4 1 Description The test in this procedure is limited by the measuring system and verifies only the majority of the phase noise specification To completely test the phase noise specification requires a far more sophisticated measurement system This test uses the spectrum analyzer to make all measurements from 100 Hz to 1 MHz offsets The 100 Hz and 1 MHz offsets are part
98. n diode drive lines 5 or 18 volts are also supplied via U305 Publication 31232 Rev A7 October 2003 4 5 Series 12000A Microwave Synthesizers 4 3 1 8 4 3 1 9 4 3 1 10 4 3 1 11 4 6 Standby Power Supply To be able to keep the heaters on the timebase oscillator and the YIG oscillator operating with the instrument turned off a separate standby power supply is used This supply produces 12 volts The steering diodes CR418 CR419 and C420 ensure that the YIG heater and timebase are driven off the quieter 12V supply during operation When the unit is in Standby mode these diodes provide the 12SB voltage A voltage regulator composed of U405 U406 0407 and 0408 is used to produce the 5 volts needed by the timebase oscillator This supply needs to be very low noise thus the discrete regulator R432 is used to reduce dissipation in the regulator pass transistor A voltage monitor to the allows determining when the oven is at operating temperature Power Supply Sequencing U401 Q404 Q405 and the other associated circuitry are used to insure that the 12 and 6 power supplies do not come up prior to the negative supplies A delay is provided by R417 and C402 The power fail signal from the power supply is used to shut off the positive supplies first System Power Supplies Although many of the other assemblies in the instrument produce power supply voltages from the four primary supplies the A4 assembly doe
99. ng signal is at zero level its multiplier is unity causing the envelope output voltage to have its unmodulated carrier level set value As the modulating voltage varies from its maximum allowable value to its minimum allowable value the multiplier input value goes from 2 to 0 and the RF voltage goes from twice the carrier level to zero so demanded by the comparator reference input Closed loop modulation control is limited however to about 10 KHz commensurate with the highest speed at which the servo loop can apply small phase margin corrections In order to handle the full spectrum of modulating frequencies all modulation spectral content that cannot be handled by the loop bandwidth must be injected fed forward after the integrator In the 12000A the entire modulating spectrum multiplies the carrier level digital value analogous to classical analog high level AM of a Class C amplifier wherein the voltage that is proportional to RF output power is multiplied by the modulating voltage There are no crossover elements except for the servo loop itself to separate the portion of the spectrum that can and cannot be controlled by the loop The composite subsystem amplitude and phase response is completely flat up to 150 KHz there is no indication of where the modulation is inside or outside the loop The Time Delay allows the feedforward modulation information to go around the loop and reach the integrator comparator at the same time as
100. ns in Section 1 6 1 1 5 5 3 Externally Generated PM Envelope One Envelope produced by each pulse Repetition Rate 5 Hz to 5 MHz leveled DC to 10 MHz unleveled Pulse Offset Delay Output Envelope Leading Edge referenced to Input Pulse Leading Edge 50 ns typical Input Pulse Required Positive or negative going TTL voltage Level trigger pulse gt 75 ns wide leveled output gt 20 ns wide unleveled output Pulse must be able to drive a 50 ohm load Pulse Width Defined by external pulse width 1 22 Publication 31232 Rev A7 October 2003 Specifications 1 6 Supplemental Specifications Series 12500A 12 00A EE aa Supplemental Specifications Series 12500A 12700A 125 1 6 1 Option 24 Specifications NIA Y 1 6 2 Option 29 Specifications Y 1 6 1 Option 24 Internal Modulation Generator Specifications 1 6 1 1 Amplitude Modulation Source Waveform Sine square triangle ramp or Gaussian Noise Rate 0 01 Hz to 1 MHz all waveforms Resolution 0 01 Hz Accuracy 0 01 Hz Timebase Accuracy THD 1 Typical AM Output 2 Vp into 1 MQ Publication 31232 Rev A7 October 2003 1 23 Series 12000A Microwave Synthesizers 1 6 1 2 1 6 1 3 1 24 Frequency Modulation Source Waveform Sine square triangle ramp or Rate 0 01 Hz to 1 MHz all waveforms Resolution
101. nse has been received ALC mod delin table build err The ALC modulator delinearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC A17 det lin table build timeout The ALC A17 CW detector linearization table coefficients have been transmitted to the ALC but after 10 seconds no response has been received ALC A17 det lin table build error The ALC A17 CW detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed 8 det lin table build timeout The ALC A8 CW detector linearization table coefficients have been transmitted to the ALC but after 10 seconds no response has been received ALC A8 det lin table build error The ALC A8 CW detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed Publication 31232 Rev A7 October 2003 6 21 Series 12000A Microwave Synthesizers 6 22 55 56 57 58 59 60 61 62 63 64 65 66 61 68 ALC A5 det lin table build timeout The ALC A5 CW detector linearization table coefficients have been transmitted to the ALC but
102. nstrument Note that the dynamic range of the analyzer may limit its measurement capability Publication 31232 Rev A7 October 2003 2 15 Series 12000A Microwave Synthesizers 2 3 4 2 3 4 1 2 3 4 2 2 3 4 3 2 16 Pulse Modulation Rise amp Fall Time Test Description A crystal detector is connected to the 12000A terminated in 50 and monitored with an oscilloscope NOTE itis very important to use either the specified detector or one with similar rise time characteristics Even when terminated in 50 Q with a short cable the detector parameters can markedly influence the measurement Equipment Required UUT e Oscillator e Pulse Generator e Crystal Detector e Coaxial Cable Oscilloscope MICROWAVE SYNTHESIZER UUT AA Pulse Generator 509 INPUT 1 Figure 2 9 Pulse Modulation Rise Fall Time Test Procedure Connect the equipment as shown in Figure 2 9 The cable from the detector to the oscilloscope should be kept as short as possible Press PRESET on the 12000A and set the frequency to the first test data sheet frequency within the operating range of the instrument Enable external pulse modulation at a 1 MHz rate and 0 5 us width on the 12000A Press PULSE and use the softkey to turn on pulse modulation Set the oscilloscope to 5 mV div and using the RF Level control of the 12000A adjust the peak to peak oscilloscope display to fall on the dotted lines on the screen 100 and
103. nterest For the Frequency Modulation performance test the frequency band of interest is 4 to 8 GHz The procedure does not identify a specific mixer for the discriminator circuit There are two factors to consider when selecting a mixer 1 The mixer RF and LO frequency range must be greater than 4 to 8 GHz 2 low conversion loss mixer will provide a higher output Publication 31232 Rev A7 October 2003 Performance Verification Maximizing Delay Discriminator Output Obtaining a six division change on a5 mV scale may be difficult to obtain for a 1 MHz change in frequency Increasing output power will improve the output of the discriminator The output of the UUT can be adjusted to levels as high as 13 dBm or higher for the 4 to 8 GHz frequency band The output performance of discriminator is improved with a very high cable length ratio Cable length ratios of 16 to 1 48 inches to 3 inches will produce a large number of frequency nulls within the 4 to 8 GHz frequency band ag NOTE Increasing the number of frequency nulls increases the rate of change of the output voltage per unit frequency as the output transitions through the frequency null Optimal Test Performance Null Selection The maximum deviation of the Frequency Modulation test is 10 MHz The rate of change for the output voltage per unit frequency AV AF must remain constant linear for the 10 MHz deviation range Rate changes within this deviation range will res
104. nto 100 ohms Stanford Research FS 725 or Equivalent 3 2 2 Additional Requirements Series 125XXA 127XXA Only e DC Voltage Source 0 10 VDC 5 Accuracy 100 mA Tektronix PS280 or Equivalent Audio Oscillator 10 Hz 200 kHz 2 V p p 01 V into 50 ohm Stanford Research DS 345 or equivalent e HP 8902A Measuring Receiver e Giga tronics Series 12520A or 12720A Synthesizer Giga tronics Mixer Divider P N 002CA04900 e Digital Voltmeter 72 digits Fluke 8920A or Equivalent 3 2 Publication 31232 Rev A7 October 2003 Calibration 3 3 Calibration Program Initialization 125XXA 127XXA Calibration Program Initialization 124XXA Connect the 12000A to the computer IEEE 488 interface and start the 12000A Calibration Program The following window will display Click Connection and select which GPIB Controller card to use fj 12000A Cal version 3 38 19th March 2002 i OF xi View Check Connection Setup GPIB Addresses 12000A Unit Power Meter Freg Counter 10 1 Pad dB RF Low Power Unitis Parameter Block Read Parameter Block Serial Number Model Min Frea Max Freg Option26 Option 20 Ramp Sweep Option 24 CPU gt Rev F Option 36 E P 29 Haye made Git Testares Status Report 1 Besure that the 12000A address is set to the same value as the setting in the GP
105. oduction The procedures in this section verify the electrical performance of the 12000A using the specifications in Chapter 1 Use Section 2 1 for features that are applicable to all three models Use Section 2 3 for native specification data for the Series 125XXA 127XXA models Each of the performance tests includes a list of recommended test equipment There is a consolidated list at the beginning of this chapter Equivalent test equipment can be substituted provided that the accuracies and specifications are sufficiently compatible A test data sheet is included for entering the various readings taken The specification and tolerance range is listed for ease of verification It is suggested that copies be made of the manual sheets When automated tests are run a printed data sheet is produced Performance verification is recommended at least every two years or more often when required to ensure proper operation of the instrument Each procedure specifies a required warm up time if the procedure is to be done individually Only one warm up period is required for a sequence of tests Test equipment must be warmed up according to specifications Publication 31232 Rev A7 October 2003 Performance Verification 2 2 2 Frequency Range Resolution amp Accuracy 2 2 2 1 Description Connect the 12000A RF output to the input of a frequency counter The internal timebase of the counter is a reference for the 12000A to eliminate timebase erro
106. oes toward the rear of the instrument Rear Panel 1 Unplug the instrument line cord 2 Remove the top and bottom covers 1 3 Remove the two side covers 2 4 Ifthe instrument has rear panel RF output disconnect the coaxial cable from the rear panel output connector 5 Locate the two coaxial cables running from the rear panel Ref In and Ref Out connectors to the A15 Time Base Assembly Release the connector on the A15 by pressing on the lock release while gently pulling on the connector If necessary remove the cables from any plastic clips that hold the cables to the chassis 6 Remove the eight 10 flat head screws located at the four corners of the rear panel casting 7 Remove the five 6 pan head screws on the rear panel Four of these are located near the power entry connector the other one is in the BNC connector area 8 Carefully pull the panel loose from the four side rails Note that the panel will only have sufficient cable slack to move about 2 inches 9 To re install the panel carefully push the assembly onto the four side rails Be sure no cables are pinched 10 Fasten the five 6 pan head screws then the eight 10 flat head screws Be sure to put the 10 screws in the outside holes closest to the covers 11 Re connect the cable to the A15 board and if necessary the RF output Publication 31232 Rev A7 October 2003 6 11 Series 12000A Microwave Synthesizers 6 2 4 A1 Synthesizer T
107. of setting or 100 ps whichever is greater NOTE The interval between pulse one and pulse two and the interval between triplets and quadlets are the same The start delay for pulse one is independent 1 6 1 7 Externally Triggered PM Envelope One PM envelope produced by each trigger Repetition Rate 5 Hz to 5 MHz Pulse Delay Set by internal delay control Pulse Width Set by internal width control Input Trigger Required Positive or negative going TTL Level trigger pulse gt 20 ns wide unleveled or gt 75 ns wide leveled 1 6 1 8 PM Sync Output TTL levels into a 50 Q load 50 ns pulse coincident with start delay 1 6 1 9 PM Video Output TTL levels into 50 Q load 1 26 Publication 31232 Rev A7 October 2003 1 6 2 1 6 2 1 1 6 2 2 Option 29 Scan Modulation Specifications Specifications apply with FM and PM turned off Envelope Parameters Frequency of Operation Specifications 0 01 to 20 GHz Scan Mode Range 0 to 60 dB gt 10 dBm Settable to 65 dB Resolution 0 1 dB Scaling 0 dB V to 65 dB V Input Voltage Minimum 0 V Maximum 6 V Step Response 1 microsecond for 50 dB change lt 10 ms 1 GHz Frequency Response DC to 150 kHz sine wave Input Impedance 600 Q Nominal Accuracy at cal points 0 25 dB plus 5 of depth in dB For 01 to 2 GHz specification app
108. ol buttons to select which calibration process is to be performed The Parameter block also changes and shows the serial number frequency range and which options are present This completes the initialization of the Calibration Control Program The various calibration processes may now be performed The top button allows calibrating the timebase and setting the contrast of the LCD if desired These functions may also be performed at any time from the Config menu on the instrument See the next page for a detailed description of the process to calibrate the timebase NOTE The Modulator Level Test must be performed prior to performing AM Calibration or Frequency Response Publication 31232 Rev A7 October 2003 Calibration 3 4 Timebase Calibration Timebase Calibration 124XXA 125XXAJ 127 The timebase oscillator used in the 12000A operates at a frequency of 10 MHz and uses Electronic Frequency Control to adjust its output frequency The calibration is performed entirely by the 12000A without the need for an external computer Prior to performing this calibration the instrument should be connected to the mains for at least 24 hours It is not necessary to have the instrument on Note that calibration accuracy is directly related to the accuracy of the external standard NOTE Updating firmware may clear the calibration data NOTE Use the LCD Timebase button for un
109. olumn information is sent to 11 CPU via connector P1 The keyboard is an 8 7 switch matrix of 50 pushbuttons The row outputs are configured as open collector outputs Normally they are all driven low at the same time When a button is depressed the low is transferred to one of the column inputs and the FPGA interrupts the CPU The CPU then scans each keyboard row to determine which button was pressed Continuous scanning of the keyboard is avoided to reduce EMI Piezo Buzzer The buzzer interfaces with 11 CPU via P1 The piezo buzzer interface can produce a continuous 2 5 kHz tone a5 kHz tone single click The CPU controls tone duration by turning the tone on or off The click is a single 100uS pulse applied to the piezo buzzer Piezo volume can be set to 8 different levels Level 0 is off and level 7 is the highest volume level LEDs Serial data from A11 CPU via P1 enters two 8 bit shift registers where it is converted to parallel data that is routed to two 8 bit Latches The latches store the LED information and also drive the fourteen front panel LEDs Inverter Supply This supply is attached to the A10 Assembly The supply accepts 5V from the A11 CPU Assembly and outputs 230VAC to the LCD assembly for backlight illumination LCD Module The assembly is attached to the A10 Assy LCD data and contrast signals come from the A11 CPU Assembly The display is mounted to the Signal Generator s front panel and conn
110. olution This tests each divider stage 4 Connect the 12000A RF Output to the 500 MHz to 26 5 GHz input on the counter and continue with the divider tests 5 To check that the multipliers are functioning properly refer to the test data sheet and program each of the listed frequencies into the 12000A by entering for example CW 2 0 0 1 MHZ For each listed frequency the counter should read the entered frequency 1 Hz plus or minus the counter resolution Ignore all frequencies outside the range of the instrument under test Publication 31232 Rev A7 October 2003 2 3 Series 12000A Microwave Synthesizers 2 2 3 2 2 3 1 2 2 3 2 2 2 3 3 24 Spurious Signals Tests Description The output of the 12000A is connected to a spectrum analyzer Various frequencies are selected and the analyzer tuned to determine the presence of either harmonically or non harmonically spurious signals Equipment Required UUT e Spectrum Analyzer e Coaxial Cable MICROWAVE SYNTHESIZER UUT Spectrum Analyzer Series 124XXA Illustrated Figure 2 2 Spurious Signals Tests Procedure 1 Connect the equipment as shown in Figure 2 2 Allow the equipment to warm up for at least 30 minutes Press CW in the FREQUENCY field on the 12000A and enter the first test data sheet frequency within the range of the 12000A The RF amplitude should be at 6 dBm Press RF ON to turn on the RF output Be certain that all modula
111. ommand EXT A single cycle of the preset sweep initiated by each trigger from an external source EXT Step A single step of a preset step sweep initiated by each trigger input from an external source Publication 31232 Rev A7 October 2003 1 7 Series 12000A Microwave Synthesizers 1 2 5 Step Power Sweep Range LA minimum level of instrument to LB maximum level of instrument Step Size Any increment within the instrument s resolution Dwell Time May be set in 1 us increments from approximately 1 us to 200 sec Setup Time 100 us Typical Accuracy amp Stability Same as in CW when locked at each step during dwell time Modes Start Sto LA lt L1 z L2 x LB p Sweeps up or down from a preset start level L1 to a preset stop level L2 StartlA LA lt L1 AL lt LB Sweeps up or down from a preset start level L1 through a preset sweep width AL LA lt CL AL 2 lt LB CTRIA Sweeps up or down through a preset sweep width AL centered symmetrically about a preset center level LF Start Steps LA x L1 Step Size x Number of Steps lt LB p Sweeps up or down from a preset start level L1 through a preset number of level steps Functions Auto Continuous cycle of the preset sweep A single cycle of the preset sweep or with stop activated a single preset step initiated by Single the manual operation of the front panel push button or reception of the corres
112. onic filtering and signal level detection for automatic level control Functional Block Diagram The Down Converter is divided functionally into four major circuit blocks The Source Block This is a chain of programmable frequency prescalers and a SP4T switch combiner The prescalers perform frequency division n 2 4 8 16 32 64 or 128 on the input signal and the SP4T selects the outputs of the various prescalers which is sent to the Amplifier and Modulator Block To prevent the generation of the sub harmonics of the desired signal that are impossible to remove later unused lower order prescalers are turned off The Amplifier amp Modulator Block This section provides signal amplification attenuation modulators and pulse modulation ON OFF for the full output frequency range of 01 2 0 GHz The amplifiers and modulators are organized in a distributed fashion to minimize the interaction over the frequency range Publication 31232 Rev A7 October 2003 4 21 Series 12000A Microwave Synthesizers 4 9 3 4 9 4 4 9 5 4 22 The Switch Filter Block The incoming signals from the Amplifier Modulator are directed into fifteen contiguous frequency bands to reduce harmonics To facilitate signal blanking and band switching from the system standpoint each filter s operating bandwidth is exactly one half octave wide and a sub multiple of the original input frequency range 1 0 1 414 GHz and 1 414 2 0 GHz The switch filte
113. ope detector and a set of video preamplifiers to provide the ALC with a monotonic DC voltage scale of instantaneous RF envelope output power During the automatic characterization procedure see Section 5 5 a record of DC voltage vs RF output power actually peak RF voltage at various frequencies is obtained The following conceptual block diagram Figure 4 6 shows the above connections between a typical 12000A RF amplifier subsystem microwave module and the ALC board Also shown is the ALC board controlling the RF on off switch which is also used as the final drive for Pulse Modulation Publication 31232 Rev A7 October 2003 4 23 Series 12000A Microwave Synthesizers VOdH DIS SH3lHrid AN JASHONWD vaa ONIOLEZ v MSM LSA NNO MvA ONLLESANI Vou Ww NIFT TWNOIS NOLLISICOOv LOA BAN ISNA AVANT SvOd4 Re eee NAM DM CMM ME E C QE CECI CC M LE ME sna TINON SAVANOHOTAL AWHSHa Sd Figure 4 6 A3 Conceptual Block Diagram Publication 31232 Rev A7 October 2003 4 24 4 10 1 Theory of Operation General Architecture Owing to the time it takes for a signal to propagate completely a
114. or the drive used on your PC for reading CD ROMs 4 Copy the 12000A Calibration folder 31232 pdf 31232 doc and the README txt files to a directory of your choice 5 Open the 12000A Calibration folder and click on 12000 exe file Drag the file onto your desktop to create the 12000A Calibration Program shortcut NOTE Do not right click the file and use Send to gt Desktop Create shortcut feature It does not create a shortcut for this program 6 Open and print the Calibration Procedure 31232 pdf or the 31232 doc prior to performing any calibration sequence 7 Double click the 12000A Calibration program icon you created in Step 5 to run the program Publication 31232 Rev A7 October 2003 3 1 Series 12000A Microwave Synthesizers 3 2 Equipment amp Documentation Required 125 Equipment amp Documentation Required oti 127XXA s See Also 3 2 2 3 2 1 Models Giga tronics 12000 Cal Software CD P N 32464 Pentium PC with Windows 95 98 Equipped with National Instrument IEEE 488 Interface Version NI 488 NI 488 2 Giga tronics 8651A or 8652A Power Meter Giga tronics 80313A Sensor Giga tronics Series 12000A Microwave Synthesizer Giga tronics Series 12000A Microwave Synthesizer Service Manual P N 31232 Male to Female Adapter Only for Synthesizer Equipped with Option 23 e 10 MHz Frequency Standard Accuracy better than 1E 10 5 to 5 V p p i
115. ot block protection is temporarily disabled and the boot block can be erased and reprogrammed NVRAM Expansion 2 512 8 Static RAMs 1 Megabyte are used to hold the instrument configuration data settings user data and list mode settings when power is removed A memory expansion connector P202 allows up to 4 more devices to be added for a total of 3 Megabytes of NVRAM storage A lithium battery provides backup power FPGA A Field Programmable Logic Array provides the following functions Next Step Sequencer Used to coordinate frequency and power level changes e Peripheral Bus Sequencer Controls the transfer of information over the Bus Front Panel Interface Provides an interface to the Keyboard Knob and Piezo Buzzer Publication 31232 Rev A7 October 2003 4 4 2 5 4 4 2 6 44 21 4 4 2 8 4 4 2 9 4 4 2 10 4 4 2 11 4 4 2 12 Theory of Operation Peripheral Bus Interface The Peripheral Bus is used to communicate with other assemblies in the instrument such as the Distribution Board the Synthesizer and the ALC The Address and Data signals are multiplexed onto a single 8 bit bus whose transfer rate is limited to 1 MHz to reduce bus generated EMI EMI reduction is accomplished by slowing down the signal edges with series resistors and capacitors Front Panel Interface Logic for interfacing to the keyboard optical encoder and piezoelectric buzzer is contained in the FPGA Front Pan
116. ow 30 minutes warm up 2 Press PRESET on the 12000A and set the frequency to the first test data sheet frequency within the operating range of the instrument 3 Settheoscilloscope to 5 mv div and using the vertical position of the oscilloscope adjust the trace to the centerline of the screen Change the level setting of the 12000A by plus and minus 1 dB and note the trace position on the screen Return to 0 dBm 4 Enable external pulse modulation at a 200 kHz rate and 0 1 us width on the 12000A Press PULSE and use the softkey to turn on pulse modulation 5 Measure and record the difference between the CW reference level and the negative peak of the pulse 6 Change the pulse width to 50 ns and again measure and record the difference between the CW reference level and the negative peak of the pulse 7 Repeat Steps 3 6 for each test data sheet frequency within the operating range of the instrument Publication 31232 Rev A7 October 2003 SERIES 12000A MICROWAVE SYNTHESIZERS Performance Verification Performance Verification Test Data Sheet Page 1 of 2 Under Test Result record measured values if any In the case of a function check or range check write OK to indicate that the unit under test meets specifications Serial Number Tested By Date Quality Assurance Frequency Range Resolution Accuracy 2 2 2 3 Frequency 12 MHz Harmonics 24 MHz 48 MHz 100 MHz
117. ower Pulse On Off PULSE ON OFF ONLY ON SERIES 12500A 12700A 60 dBc AM AM ONLY ON SERIES 12500A 127004A Functional but not specified above 0 dBm Option Activity When the option is not active the output power is reduced by 2 0 dB When active the High Power Option switches in at 11 dBm Publication 31232 Rev A7 October 2003 Specifications 1 4 1 4 1 Specifications Series 12500A 12700A Signal Parameters amp Operational Modes Specifications Series 12500A 12700A 125XXA 127XXA 1 4 1 Ramp Frequency Sweep NIA T Only 1 4 2 Ramp Power Sweep NIA E Only Refer to Section 1 2 for specifications that apply to all models Use this section for native specifications to the Series 125XXA 127XXA models Ramp Frequency Sweep A continuous sweep is generated within the instrument The continuous sweep may be operated simultaneously with digital power sweep Description Sweep Type Smooth frequency ramp progression sweep Sweep Type Either up or down in frequency Sweep Direction Either up or down in frequency Sweep Ramp Shape Linear frequency ramp with respect to time Sweep Range Linear frequency ramp with respect to time Start Frequency Accuracy Phase locked to timebase via YIG tune coil Stop Frequency Accuracy Phase locked to timebase via YIG tune coil Halted Frequency Accuracy Phase locked to timebase via YIG tune coil
118. ower Uniti5 Parameter Block Read Serial Number 10011 Model 12520 Frea 10 MHz Max Freg 20199 MHz Option 26 Option 20 Ramp Sweep Option 24 IV CPU gt Rev F Option 36 Jv Hasttodulaton M Option 29 lolx Characterize LCD TimeBase Modulator Level Test Detector Linearization Calibration AM Calibration Modulator Scan System is in Giga tronics mode Pause Close 4 Now click on Frequency Response button Frequency Response stores correction factors as function of output frequency This calibration will be required if A6 A8 or the optional step attenuator has been changed It is also recommended that this routine be run if any of the RF cables between A6 and the front rear output or the output connector itself is changed Be sure to do the Modulator characterization first if required Publication 31232 Rev A7 October 2003 3 11 Series 12000A Microwave Synthesizers 3 12 While the Frequency Response calibration is running the window will look like the following illustration below The monitor screen will now show the power meter readings if that mode is selected In addition the bottom line of the main window will show the readings as they are taken This process will take about 25 minutes for each level for a 01 to 20 GHz instrument Repeat process with RF Low Power a
119. ponding GPIB command EXT A single cycle of the preset sweep initiated by each trigger from an external source EXT Step A single step of a preset step sweep initiated by each trigger input from an external source 1 8 Publication 31232 Rev A7 October 2003 Specifications 1 3 Supplemental Specifications Supplemental Specifications 125XXAJ 127XXA 1 3 1 General Specifications V 1 3 2 Weight amp Dimensions V Y 1 3 3 Option 20 Specifications y 1 3 1 General Specifications GPIB IEEE STD 488 2 GPIB all parameters except AC power on off Remote Interfaces Serial EIA RS 232 Serial Interface DB9 Connector Operating Temperature 0 to 55 C Environmental Complies with MIL PRF 28800F Class 3 Approvals CE marked Power 90 253 VAC 47 64 Hz 400 Hz optional 150 Watts Nominal Fuse Rating 2 A SB 1 3 2 Weight amp Dimensions Item Benchtop Model Packed for Air Shipment Width 16 75 in 42 5 cm 24 in 60 9 cm Depth 21 in 21 in Height 5 25 in 13 3 cm 11 25 in 28 6 cm Volume 1850 cuin 1850 cuin Weight 30 lbs 40 Ibs Publication 31232 Rev A7 October 2003 1 9 Series 12000A Microwave Synthesizers 1 3 3 1 10 Option 20 High Power Specifications Apply from 0 to 35 C Output Power 20 dBm Flatness 2 5 dB Harmonics lt 5 dBc from 0 01 to 0 1 GHz lt 20 dBc for 0 1 to 20 0 GHz 20 dBm Output P
120. put to the UUT AM connector Simply leave the input open as there is an internal 600 resistor to ground This test calibrates the Scan mode Press OK when ready 4 When the prompt requests a 6 0 volt DC input connect the DC source to the AM input connector and monitor the AM input connector with the voltmeter Set the DC source to 6 00 volts 03 volts Be sure to measure the voltage at the AM input connector with everything connected This test calibrates the full scale of the Scan Modulation Press when ready Publication 31232 Rev A7 October 2003 3 17 Series 12000A Microwave Synthesizers The following window will be displayed during the AM calibration process In addition prompt windows will appear to provide instructions for each step of the test The monitor window displays the data that is being sent 12000A Cal version 3 17 10th July 2001 2201 3 18 Publication 31232 Rev A7 October 2003 Calibration 3 6 3 Scan Modulation Calibration Computer 12000A MICROWAVE SYNTHESIZER IEEE 488 Series 12500A 12700A Only RF Out 80313A Sensor 8650A UNIVERSAL POWER METER 1 Connect the sensor to the meter calibrator use the N to adapter and allow at least 15 minutes for the sensor and meter to reach thermal equilibrium Then perform a sensor calibration 2 Now connect the equipment as shown above
121. put zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY Publication 31232 Rev A7 October 2003 6 23 Series 12000A Microwave Synthesizers 6 24 Publication 31232 Rev A7 October 2003 Index Series 12000A Microwave Synthesizers Index Numerics 12000A Fault Isolation 6 1 12000A Replaceable Parts 5 1 A A7 Multiplier 4 15 About This Manual v ALC Characterization Instructions 3 4 Amplitude Modulation Calibration 3 7 Automatic Level Control A3 4 18 c Conventions Used in This Manual vii CPU Subsystem A11 4 6 D Down Converter A8 4 17 Electrical Operation Circuit Description FPGA Interface 4 3 Environmental Standards 1 1 F Frequency Modulation Tests 2 12 Frequency Range Resolution and Accuracy 2 3 Front Panel Subsystem A10 4 8 G General Information Environmental Standards 1 1 Performance Specifications 1 2 General Specifications 1 13 Installation Performance Specifications Performance Tests 2 2 Interface Assembly A17 4 16 Introduction 1 1 3 1 Environmental Standards 1 1 Performance Specifications 1 2 Theory of Operation 4 1 1 2 Manual 31232 Rev A7 October 2003 M Maintenance Theory of Operation 4 1 Microwave Signal Conditioning Subsystem A6 A7 Model 12000 Theory of Operation 4 1 Modulation Calibration 3 5 4 15 Output Amplitude Calibration 3 3 Overall System
122. r matrix is arranged such that the signals that pass through the six lowest frequency filter bands will be pre filtered by a filter 3 octaves higher in frequency The directional coupler and detector located at the output samples and detects the output signal level for ALC and AM purposes The Control Logic Block This portion provides proper drivers to interface between the Down Converter and the Distribution module PIN diode switch drivers and between the Down Converter and the ALC module PM and AM drivers and detector amplifier System Interface input is supplied by the 1 1 synthesizer front end and is output to the output module The module receives regulated power supply voltages and TTL commands from the Distribution Module A4 via a multi pin connector Publication 31232 Rev A7 October 2003 4 10 Theory of Operation Automatic Level Control A3 General Architecture 4 10 1 General Architecture 4 10 2 CW Operation TUM Apply 4 10 3 Linear AM Operation NIA 4 10 4 Logarithmic Scan AM Operation NIA 4 10 5 Pulse Modulation PM Operation NIA 4 10 6 Digital Communications Controls amp Calculations The Automatic Level Control ALC board A3 contains a feedback control system that maintains the RF output amplitude in accordance with the desired value It also provides linear Amplitude Modulation AM Logarithmic Amplitude Modulation
123. roubleshooting 125XXAl 127XXA 6 1 1 Power on Sequence Fault Isolation 6 1 2 Power on Sequence Fault Isolation Continued 6 1 3 CW Operation Frequency 6 1 4 CW Operation Frequency Continued N 6 1 5 CW Level Limitations Apply 6 1 5 Modulation Modes Series 125XXA 127XXA Only 6 1 6 Modulation Modes Continued Series 125XXA 127XXA Only N A Publication 31232 Rev 7 October 2003 6 1 Series 12000A Microwave Synthesizers 6 1 1 Instrument Power on Sequence Passes Yes Go To Page which relates to problem NS P 6 2 Power Sequence Fault Isolation No Completes the Initialization bar sequence No Is there any instrument function at all fan LEDs Yes Note 1 Remove the instrument bottom cover Look at the A4 Assy Are all 5 green LEDs on and all four red LEDs off Yes Repair Replace the 11 CPU Assembly Yes To Next Page N A No Check mains input No Check mains fuse on rear panel Check the outputs of the main and standby power supplies and fuses on A4 if any Red LEDs are on Isolate fault before replacing fuses 2 Publication 31232 Rev A7 October 2003 Troubleshooting 6 1 2 Power On Sequence Fa
124. round the control loop especially including through the gain control elements and RF amplifiers the servo loop bandwidth is limited to about 10 KHz However for reasons explained below all stages in the main loop are flat from DC up to almost 1 MHz The ALC servo element is a high speed digital hardware based integrator contained within a Field Programmable Gate Array Sig Proc FPGA Also contained in this FPGA is gain and offset adjustment of the digitized AM input signal and the means to apply this signal to both the input and output of the integrator The integrator is broken down into a comparator multiplier and accumulator Multiplying the difference between the desired RF voltage Power Set and instantaneous RF voltage by a selected integrator gain number allows the speed of accumulation to be controlled thus allowing the entire control loop gain to be set for the quickest stable operation Preceding the integrator is the 12 bit RF Leveling A D and lookup table Linearization RAM that allows it to see a linear RF voltage scale despite the nonlinear transfer characteristics of the diode envelope detectors in the RF amplifier subsystems Preceding the A D are two selectable gain controlled amplifier subsystems one each for CW and Pulse operation Their principal use is to convert the widely variable detected and pre amplified signals to the 1 Volt to 4 Volt scale needed by the A D Following the integrator accu
125. rs from the measurements This procedure does not check for timebase accuracy and therefore the frequency in the 12000A display should agree with the counter within the resolution of each instrument It is possible for a fault in the 12000A to cause a frequency error even though the lock indicators show normal operation For this reason a number of specific frequencies are tested Test frequencies have been selected so that any defective circuits will be easily isolated 2 2 2 2 Equipment Required UUT e Frequency Counter e Coaxial Cable MICROWAVE SYNTHESIZER UUT Frequency Counter Timebase Series 124XXA Illustrated RF OUT 500 MHz gt 500 Figure 2 1 Frequency Range Resolution amp Accuracy 2 2 2 3 Procedure 1 Connect the equipment as shown in Figure 2 1 Connect the 12000A RF Output to the 10 to 500 MHz counter input using the coaxial cable and the SMA to BNC adapter Allow the equipment to warm up for at least 30 minutes Because the 12000A and the counter use the same timebase timebase errors are eliminated The 12000A will automatically switch to the external reference when it is connected 2 Set the 12000A to 10 MHz Press LEVEL in the POWER field and enter 1 0 DBM Press RF ON in the RF OUTPUT field to turn on the RF output 3 Set the 12000A to each frequency listed on the data sheet and verify that the counter reads the set frequency plus or minus the counter res
126. s Maximum Deviation See table is on next page Modulation Resolution 01 radians at 4 8 GHz other ranges proportional Flatness 2 dB for rates from 100 Hz to 100 KHz Measured at 1 V p p input i e 500 KHz Deviation Publication 31232 Rev A7 October 2003 1 19 Series 12000A Microwave Synthesizers 1 5 4 3 1 5 4 4 1 20 Modulation Accuracy 5 relative to FM at max deviation 100 kHz modulation rate Distortion lt 5 1 MHz deviation Incidental AM lt 0 2 MHz of deviation Frequency GHz Max Wide Deviation Max Narrow Deviation 010 to 016 40 radians 02 radians gt 016 to 032 80 radians 04 radians gt 032 to 064 1 6 radians 08 radians gt 064 to 125 3 2 radians 16 radians 2 125 to 25 6 4 radians 32 radians gt 25to 5 12 5 radians 64 radians gt 5tol 25 radians 1 25 radians gt 1to2 50 radians 2 5 radians gt 2to4 100 radians 5 radians gt 4to8 200 radians 10 radians gt 8 to 16 400 radians 20 radians gt 16 to 20 800 radians 40 radians Internally Generated PM Envelope See Option 24 specifications in Section 1 6 1 External Supplied FM Envelope Waveform Any waveform compatible with bandwidth considerations Rate 10 Hz to 100 kHz Input Sensitivity Settable 1 V p p for maximum peak deviation FM deviation control set to Maximum Input Impedance
127. s frequency varies from 250 to 500 MHz over the 4 8 GHz range if the YIG oscillator The counter output drives the variable input of the phase detector flip flops U513 and gate U518 Its two outputs go to the integrator There are actually three separate integrators used The first a double integrator U601A amp U601B is used in the CW mode i e no FM and not in Ramp Sweep The extra integrator stage provides additional gain for noise suppression The second integrator U602 is used for the wideband FM mode The remaining integrator U603 is used for Ramp Sweep This mode uses the main tuning coil of the YIG oscillator rather than the FM coil Since the sensitivity and response characteristics are considerably different a separate integrator is needed Amplifier U606 provides a low impedance drive for the loop low pass filter This filter is included primarily to suppress the delete rate spur of 250 kHz produced by the Fractional N Following the filter is gain control amplifier U608 The gain of the loop will vary as the N number is changed In this case a 2 1 change will occur from 4 to 8 GHz To both maintain stable loop operation and also to allow the FM to work properly the gain of the loop must be increased as the N number increases The final elements of the primary synthesis loop are filter C742 1703 C743 and the FM coil driver U701 The filter provides additional high frequency attenuation The FM coil dr
128. s produce a number of voltages The 8 3 volt supply is used by the module for amplifier power The 18 volt supply is used to switch PIN diodes on A6 The 5 volt supply is used for logic power and PIN diode switching on A7 A7 The 5 volt supply is used for PIN diode switching on A7 The 10 volt supplies are used by the CPU board as well as A5 A6 A7 A8 Each of these supplies is produced by a three terminal regulator The 18 volts is regulated down from a 20 volt switching type boost supply U410 412 Three devices are used to supply the needed current A series of multi pin connectors distributes the four primary power supply voltages each of which is fuse protected series of green LED indicators signals that each of the primary supplies and the standby supply is active A series of red LED indicators each connected across one of the fuses signals that the corresponding fuse has been blown Source Block An amplifier provides for gain and input buffering A Wilkenson power divider samples and returns A 7 s output signal Another amplifier provides for more gain To realize sub harmonic and harmonic filter rejection a SP3T switch splits the signal into three bands The frequency ranges covered by the doublers are as shown on the block diagram Each of the succeeding circuits in the Source Block is in triplicate due to the band splitting The doublers are passive and consist of conventional beam lead schott
129. s provided on this assembly to monitor various voltages and send the information back to the CPU Inputs are provided to monitor the temperature of each of the microwave modules that has a leveling detector This data is then used for temperature compensation of the RF level The timebase VCXO control voltage is monitored to allow calibration and determine if an external source is connected Monitor lines from the step attenuator and high power options are used to determine the presence of these items Step Attenuator Option Control The optional step attenuator is controlled using driver 17304 inverters U303 and transistor Q302 Logic signals from the FPGA are used to control each of the four cells in the attenuator The cells have values of 10 20 40 amp 40 dB Each of the four cells has both an on and an off control line thus the need for eight drivers The attenuator has a mechanical device which latches the actuators so the control voltage only supplies current for a few milliseconds at each transition The attenuator is specially built to have one of the normally unused connector pins tied to ground This line is monitored to determine the presence of the attenuator High Power Option Control The optional high power amplifier assembly is also controlled from the A4 assembly 0304 and Q303 provide control for the main power to the assembly 17305 and Q305 are used to select either the 01 2 GHz range or the 2 20 GHz range Two pi
130. se has been received SERIES 125XXA 127XXA ONLY ALC 5 det pulse table build error The ALC A5 PULSE detector linearization table coefficients have been transmitted to the ALC and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC 17 CW det zero timeout The ALC has been directed to find 17 CW detector zero but after 5 seconds no response has been received ALC A17 CW det zero error The ALC has been directed to find A17 CW detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed ALC A17 PM det zero timeout The ALC has been directed to find 17 PM detector zero but after 5 seconds no response has been received SERIES 125XXA 127XXA ONLY ALC A17 PM det zero error The ALC has been directed to find A17 PM detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed SERIES 125XXA 127XXA ONLY ALC A8 CW det zero timeout The ALC has been directed to find A8 CW detector zero but after 5 seconds no response has been received ALC A8 CW det zero error The ALC has been directed to find A8 CW detector zero and the ALC has responded with an error message The contents of the ALC DSP HIP status and data registers are displayed Publication
131. sequently multiplied signals 8 20 GHz through A7 and 20 40 GHz through A5 can also be pulse modulated with no added hardware Gain Blocks A1 A4 The gain blocks are GaAs MMIC with dual gate FET cells The gain of Al and A2 are varied together for ALC and AM application A3s and A4s gain control input provides scan modulation Switched Low Pass Filter The 2 20 GHz spectrum is redirected into 5 sub bands 2 3 2 3 2 5 1 5 1 8 and 8 20 GHz with low pass filters to remove harmonics An additional switch arm on the output side can also receive the low band signal 01 2 GHz from the optional Digital Down Converter A8 Directional Detector The directional detector consists of a multi section microstrip coupler with dielectric overlay compensation built in termination and a single diode broadband detector at the coupled port A7 Multiplier The function of module A7 is to produce the 8 20 GHz signal from the 4 8 GHz received from A6 and to remove the spurious products of frequency multiplication by band pass filtering The 4 8 GHz signal Publication 31232 Rev A7 October 2003 4 19 Series 12000A Microwave Synthesizers is first multiplied by a frequency doubler ADA1 to produce 8 16 GHz The output is then split into four bands by a SP4T PIN diode switch the first three are band pass filtered to produce the following frequencies 8 10 1 GHz 10 1 12 7 GHz 12 7 16 GHz The 8 10 1 GHz band is also used to drive the second frequ
132. sponding power supply fuse is open Monitors are provided for the 6 and 12 volt main supplies 2 To isolate the power supply loads unplug the 9 pin connectors which connect the power cables from the A4 Distribution board to the other PC assemblies It will be necessary to y y remove the A1 Synthesizer assembly to access these connectors 3 The Peripheral Bus Cable is a 60 wire ribbon cable that connects the A4 A1 A11 A3 and A16 if installed Itis recommended that this cable be verified first before replacing any y y of the PC assemblies 4 The YIG Cal sequence sets the YIG to 4 5 and 7 5 GHz and adjusts the tuning current to center the PLL A failure at this point can be further isolated by removing the Instrument bottom cover then removing the coaxial cable from 1 1 J402 This cable goes to the A6 Microwave Module It is a 085 Semiflex about 4 long Connect a spectrum analyzer to J402 If a signal is present at about 10 dBm then the YIG is working If not measure y y the voltage on the end of R724 closest to the board edge It should be approximately 0 1 volts GHz If the voltage is outside the range of 0 4 to 0 85 volts the oscillator may not operate and the A1 board should be serviced A problem in A1A1 or A1A2 can also cause the YIG Cal to fail 5 The ALC Offset calibration requires that the detectors in A6 and A8 if installed be functioning as well as the circuitry on 17 and that amplifies the detector s
133. t 5 dB for units with attenuator Option 26 12000A Cal version 3 17 10th July 2001 x View Check Connection Setup GPIB Addresses 12000A Unit Power Meter Freg Counter Pad dB RF Low Power Uniti5 Parameter Block n wo gt Serial Number 117018 Model 12720 Min Frea 10 MHz Max Frea 20199 MHz Option26 Option 20 M Ramp Sweep Option 24 Code gt 34 7 Pause Jv Pulse Mod fa ps ola Systennis i Gigadtionics made Close When the process is finished the window status lines will give a successful completion message cr NOTE The instrument MUST be power cycled after the completion of each Frequency Response Click the Read button after each power up and change the RF Level box prior to the next Frequency Response calibration Publication 31232 Rev A7 October 2003 Calibration 3 6 Modulation Calibration Modulation Calibration 125XXAJ 124XXA 127XXA 3 6 1 Frequency Modulation Calibration N A 3 6 2 Amplitude Modulation Calibration N A 3 6 3 Scan Modulation Calibration NIA Y There are three separate calibration routines for the modulation functions of the 12000A Each requires a different test setup See the following sections for a complete description of the test system and sequence Modulation calibrations may be done in any order The conditions requiring re calibration are outlin
134. t 12 lt 70 8 to 16 lt 24 lt 160 16 to 20 lt 32 280 AM Noise lt 130 dB Hz from 0 01 to 2 GHz lt 145 dBm Hz at gt 2 GHz 1 6 Publication 31232 Rev A7 October 2003 1 2 4 Step Frequency Sweep Specifications Range FA minimum frequency of instrument to FB maximum frequency of instrument Step Size Any increment within the frequency resolution Dwell Time May be set in 1 us increments from approximately 115 to 200 sec Setup Time 200 us Typical Accuracy amp Stability Same as in CW when locked at each step during dwell time Modes Start Sto FA lt F1 z F2 lt FB p Sweeps up or down from a preset start frequency F1 to a preset stop frequency F2 StartlA FA lt F1 AF lt Sweeps up or down from a preset start frequency F1 through a preset sweep width AF FA lt CF AF 2 lt FB CTRIA Sweeps up or down through a preset sweep width AF centered symmetrically about a preset center frequency CF FA F1 Step Size x Number of Steps lt FB Start Steps Sweeps up or down from a preset start frequency F1 through a preset number of frequency steps Functions Auto Continuous cycle of the preset sweep A single cycle of the preset sweep or with stop activated a single preset step initiated by Single the manual operation of the front panel push button or reception of the corresponding GPIB c
135. the feedback component When the RF signal is modulated at a high level with a 150 KHz sine wave the waveform at the envelope detector output contains the fundamental and several harmonics up to 750 KHz principally at 300 KHz and 600 KHz If only the fundamental is considered harmonics suppressed the 150 KHz sine wave will have an average value that depends upon the degree of modulation causing the carrier level adjustment to become increasingly inaccurate as the modulation index is increased Therefore a 1 MHz bandpass is maintained in all analog and digital circuitry at least through Linearization RAM lookup table Similarly all circuitry between the De linearization RAM through the gain control elements must have a 1 MHz bandpass to contain the important harmonics commensurate with an exponentiated 150 KHz sine wave Before being fed to the Sig Proc FPGA the AM intended signal passes through a gain and offset adjustment that maps a 1V 1V scale to a OV 5V scale It then passes through 150 KHz anti aliasing filter and the AM 12 bit A D converter Publication 31232 Rev A7 October 2003 4 27 Series 12000A Microwave Synthesizers 4 10 4 4 28 Logarithmic Scan AM Operation Log AM uses the same 12000A input connector and A D converter but the input scale is OV to 6V for to 60 dB reduction from the fiduciary CW set point level and a 1MHz anti aliasing filter is needed The 12000A Scan Menu allows other scales than
136. tion is OFF 2 Setthespectrum analyzer to view the 12000A output signal Adjust the analyzer reference level so that the peak of the displayed signal is at the top graticule line 3 Setthe spectrum analyzer to maximum span with the signal centered on the screen Gradually narrow the span keeping the signal centered to observe any spurious signals Use appropriate resolution and video bandwidths to allow sufficient dynamic range 4 Repeat steps 2 and 3 for the other frequencies on the test data sheet which are within the operating range of the instrument Many spectrum analyzers have a tuned preselector when the frequency is above about 2 GHz This reduces the likelihood of analyzer generated spurious signals but does not eliminate the possibility If in doubt increase the RF attenuation of the analyzer by 10 dB The signal in question should be reduced by exactly 10 dB If not it is analyzer generated It is also important for frequencies below the range of the preselector that sufficient analyzer RF Attenuation be used typically 30 dB to avoid the analyzer generating harmonics of the input signal The above attenuator shift technique will also allow verification of harmonic levels If a spurious signal appears to be out of specification first check that the fundamental signal level is at 6 dBm Next verify the analyzer accuracy by connecting a known amplitude signal from the 12000A for example at the spurious frequency Publicatio
137. tions of the Synthesizer are controlled by various logic devices Commands from the host CPU are sent to the Synthesizer via the Peripheral Data Bus A DSP U104 and a CPLD U105 decode these commands and route them to the appropriate destinations Two analog output signals are generated on the Synthesizer board These are the 10 volt ramp and the 0 5 volt GHz output The 10 volt ramp is a signal used during sweep modes and goes from zero volts at the start of a sweep to 10 volts at the end of the sweep The 0 5 volt GHz signal is always present and is proportional to the operating frequency A multiple input Analog to Digital converter U710 is monitored by the control system to provide information on various voltage levels The include the PLL voltages for both the primary and tracking filter loops various FM system voltages and the YIG driver The readings are used for the calibration and automatic adjustment functions Because the synthesizer is sensitive to noise on the power supplies it uses on board regulators are provided The majority of these consist of an op amp and power transistor rather than a packaged regulator This is done to provide the lowest noise A precision reference 17807 supplies 5 volts to the regulators U810 is a switching boost type regulator used to provide 20 volts for the YIG driver and the tracking filter VCO drive The Ramp Sweep mode of operation uses a different method to achieve phase lock Rather than using
138. to 20 ms 10 us 20 ms to 200 ms 100 us 200 ms to 2 sec 1 ms 2 sec to 20 sec 10 ms 20 sec to 200 sec 100 ms Minimum Sweep Width 01 dB Maximum Sweep Speed 1 dB ms Sweep Level Resolution Any Sweep Mode 0 01 dB Start Level Accuracy Any Sweep Mode 0 2 dB to Flatness Sweep Level Linearity Any Sweep Mode 0 25 dB Sweep Modes Auto Continuous recycle of preset sweep Single A single cycle of the preset sweep initiated by manual operation of the front panel push button or reception of the corresponding GPIB command EXT A single cycle of the preset sweep initiated by a trigger input from an external source Publication 31232 Rev A7 October 2003 1 13 Series 12000A Microwave Synthesizers 1 5 1 5 1 1 5 1 1 1 14 Modulation Parameters amp Operational Modes Modulation Parameters amp Operational Modes 125 1 5 1 Amplitude Modulation AM Y 1 5 2 Scan Modulation NIA 1 5 3 Frequency Modulation FM NIA Y 1 5 4 Phase Modulation pM NIA Y 1 5 5 PulselSquare Wave Modulation PM NIA Y AM FM Pulse and Option 29 Scan Modulation driven by external waveforms is standard only on the 125XXA 127XXA models Option 24 Internal Modulation Generator provides two function generators for internally generated amplitude and frequency modulation envelope waveforms pulse generator is also provided Amplitude Modulation AM
139. ts program code stored in a fuse programmable memory chip U102 The code is loaded into the FPGA at power up The outputs from the FPGA are used to control all the functions represented on this board 4 4 Publication 31232 Rev A7 October 2003 4 3 1 2 4 3 1 3 4 3 1 4 4 3 1 5 4 3 1 6 4 3 1 7 Theory of Operation A5 A6 A7 Control Control signals from the FPGA are used to drive a series of analog switches U210 208 These switches send either a positive or a negative power supply voltage to the module interface connector P201 The voltages are used to bias the various PIN diode switches in the microwave modules and thus select filters and other operational characteristics A8 Control Other outputs from the FPGA are routed directly to the A8 microwave module via connector P102 These logic level signals are translated into appropriate analog signals on the A8 assembly for filter and other switching functions Fan Speed Control IC U302 and its associated circuitry are used to provide control of the speed of the main cooling fan Thermistor RT301 senses the ambient temperature in the instrument and U302 produces a pulse width modulated signal to control FET Q301 and thus the fan itself The circuit is set up to run the fan at a minimum speed regardless of low temperature As the temperature increases above the minimum set point the fan speed rises proportionally Analog to Digital Converter A multi input ADC U301 i
140. ttenuator serial Unknown 3 4 Publication 31232 Rev A7 October 2003 Calibration Another window is also displayed to allow viewing a variety of data See the addendum in section 3 8 for a description of the monitor features ra Testing Firmware 73 B 49 2211 Ioj X View On Error Power Meter Halt on error Bypass Prompts When the Read Parameter process is complete the main window will look approximately like this after clicking on it The FM AM or Modulator Scan Characterize buttons are not applicable to the Series Publication 31232 Rev A7 October 2003 3 5 Series 12000A Microwave Synthesizers 3 6 124XXA as depicted in the illustration below 12000A Cal version 3 38 19th March 2002 i OF Xx View Check Connection Setup GPIB Addresses 12000A Unit Power Meter Freq Counter Pad dB n RF Low Power Uniti5 Parameter Block 6 10 1 Witte Serial Number 10011 Model 12520 Min Freq 10 MHz Max Freq 20139 MHz Option26 Option 20 HampSweep Option 24 Iv CPU gt Rev F Option 36 Jv Hashiodulaton Pv Option 29 Characterize LCD TimeBase Modulator Level Test Detector Linearization FM Calibration AM Calibration Modulator Scan Frequency Response System is in Giga tronics mode PAUSE Close The window now has contr
141. ult Isolation Continued 4 From Page 1 y INIM Completes the Synthesizer FPGA amp DSP loading sequence Yes Completes the YIG Cal sequence Yes Completes the A1A2 Cal sequence Yes Completes the ALC FPGA amp DSP loading sequence Yes Completes the ALC offset adjustment No gt Check Peripheral Bus cable Repair Replace A1 Repair Replace A11 CPU No Repair Replace the YIG oscillator A1 A1A1 or A1A2 No Repair Replace A1A2 No Check Peripheral Bus cable Repair Replace A3 Repair Replace A11 CPU No Repair Replace 17 A8 or Modulation applies to Series 125 127 Models Only Publication 31232 Rev A7 October 2003 Note 3 Note 4 Note 3 Note 5 6 3 Series 12000A Microwave Synthesizers 6 1 3 64 CW Operation Frequency Fault Isolation Tree CW Operation Frequency Frequency is inaccurate or has poor spectral Note 6 purity Is the Measure Ref Out z timebase Is Ref frequency No on rear panel Is No gt No Out accura
142. ult in a non symmetrical waveform and will produce invalid test results Identifying an optimal frequency null is achieved by sweeping the frequency through the frequency range of the test and observing the Delay Discriminator waveform on an oscilloscope Recommended Test Equipment FM Delay Discriminator Digital Oscilloscope Pulse Generator with 1 shot Capability BNC Cables and Tee Recommended Configuration 1 Connect the input of the delay discriminator to the RF output of the 12000A and the output to the digital scope 2 Setthe 12000A to Sweep Mode with the following settings a Start Frequency 4 GHz b Stop Frequency 8 GHz c Sweep lype Ramp d Sweep Time 900 msec e Repeat Mode Single Sweep f Trigger Type Trigger in BNC g Power 10 dBm 3 Connect the output of the pulse generator to the External Trigger Input or second channel of the digital scope and the Trigger In of the 12000A 4 Set the trigger selection of the digital scope to the port where the trigger signal will be detected Use the BNC Tee at this port Publication 31232 Rev A7 October 2003 2 13 Series 12000A Microwave Synthesizers 2 3 2 4 2 14 5 Adjust the time base of the digital scope to 1 second for the entire span of the X axis 100 mSec typical Set the vertical scale to 100 mV per division 6 Pulse the generator to initiate the RF sweep Repeat the sweep several times The output of the Delay Discriminator
143. using the RF Level control of the 12000A and the vertical position of the oscilloscope adjust the peak to peak oscilloscope display to be from the top of the screen pulse off to 2 divisions below the center line pulse on Adjust the oscilloscope sweep time to 50 ns div Change the level setting of the 12000A by plus and minus 1 dB and note the graticule position of the pulse on level Return to the original value Measure and record the time for the pulse to be within 1 dB of its final value Change the level setting of the 12000A by plus and minus 2 dB and note the graticule position of the pulse on level Return to the original level Measure and record any undershoot overshoot of the signal Repeat Steps 4 and 5 for each of the test data sheet frequencies within the operating range of the instrument Publication 31232 Rev A7 October 2003 2 17 Series 12000A Microwave Synthesizers 2 3 6 2 3 6 1 2 3 6 2 2 3 6 3 2 18 Pulse Modulation Accuracy Test Description In this test the peak pulse level is compared to the level in the CW mode Equipment Required UUT e Oscilloscope e Pulse Generator e Crystal Detector e Coaxial Cable Oscilloscope MICROWAVE SYNTHESIZER UUT Pulse Generator 500 INPUT 2500A 12700A Only Series Figure 2 11 Pulse Modulation Accuracy Test Procedure 1 Connect the equipment as shown in Figure 2 11 The oscilloscope input impedance should be 50 All
144. utomated system be set up to take and record the data Three tests are run The first measures the maximum available output with the level control loop disabled The second verifies the accuracy and flatness across the operating frequency range at a fixed output 0 dBm The remaining test checks the step attenuator accuracy at a number of frequencies This section outlines the general procedure followed by the automated system a similar measurement could be done manually 2 2 5 2 Equipment Required UUT Local Oscillator e Measuring Receiver amp Sensor e Downconverter e Plotter e Computer amp Programs Plotter 8650A UNIVERSAL POWER METER Computer Channel A Sensor Series 12500A 12700A Illustrated RF OUT Figure 2 4 RF Output Power Test 2 2 5 3 Procedure Output Power 1 Connect the power sensor to the 12000A Disable the leveling system of the 12000A Step the frequency across the particular instrument operating range in 50 MHz increments At each point measure the power apply the appropriate sensor correction factor and plot the result 2 Using the above setup set the 12000A to 0 dBm with the leveling enabled Again step the frequency across the operating range measure correct and plot the power 3 Repeat this procedure for the remaining test frequencies ag NOTE When measuring the flatness and accuracy of the model 12000A consideration must be given to the various measure
145. vel is neither at minimum nor maximum 11 Check the input level at the FM input connector the front and rear ones tied together Instrument calibration assumes that this level is 2 V p p Check the setting for the deviation by pressing the FM button Note that since the instrument uses frequency NIA Ni multiplication and division the maximum deviation is reduced as the frequency is reduced If for example you set a deviation in narrow mode of 1 MHz at 4 GHz and then change the frequency to 1 GHz the deviation will automatically change to 250 kHz 12 The FM Narrow mode is DC coupled Any DC component on the input signal will shift the carrier at the same scaling as the deviation If for example the deviation is set to 1 MHz and there is 10 mV of offset there will be 10 kHz of carrier shift 13 Check the input level at the AM input connector the front and rear ones are tied together Instrument calibration assumes that this level is 2 V p p Check the setting for the depth by pressing the AM button 14 The AM mode is DC coupled Any DC component on the input signal will shift the carrier NIA level as would the peak of an AC component 15 If the pulse shape rise fall time overshoot etc is a problem below 2 GHz then replace the A8 downconverter all pulse shape determining circuits are on this assembly If the problem is above 2 GHz the cause could be on either the 17 board driver or the
146. vides a GPIB interface for the rear panel Rear Panel 1 0 Provides RS232 interface Blank Mark BNC Stop Sweep BNC Lock Level BNC Trigger In Trigger Out Publication 31232 Rev A7 October 2003 4 9 Series 12000A Microwave Synthesizers 4 4 2 4 4 2 1 4 4 2 2 4 4 2 3 4 4 2 4 4 10 Reset Circuitry The reset signal for the CPU is generated when the 5V supply drops below 4 65 volts The main power supply generates a power fail signal which provides at least 5mS warning before the output goes out of regulation after AC power is turned off Serial Bus The LCD contrast Front Panel LEDs calibration Trim DACs on the Time Base board and an ADC on the Distribution board are all controlled with a serial data bus Discrete I O pins from the CPU and one of the I O ports are used for this bus The pins are controlled by software to shift data serially into and out of devices The serial bus is connected to the Distribution Board via P701 Chip select outputs on the CPU enable the LCD contrast and Front Panel LED serial ports Chip selects for the calibration Trim DACs and Distribution Board ADC are controlled over the Peripheral Bus by writing values to registers on the Distribution Board FLASH Memory 4 512K x 16 word 2 Megabyte parts provide non volatile storage for firmware Jumper JP201 along with Q203 and associated components allows the FLASH boot block to be programmed If 12V is provided on the RESET pin the bo
147. volts down to 5 V and 43 3 V Publication 31232 Rev A7 October 2003 4 11 Series 12000A Microwave Synthesizers 4 5 4 12 Front Panel Subsystem A10 Front Panel Subsystem A10 125XXAl 127XXA 4 5 1 Memory Resources 4 5 2 Piezo Buzzer 4 5 3 LEDs 4 5 4 Inverter Supply 4 5 5 LCD Module 4 5 6 Optical Encoder 2 alia a 4 4 4 4 The A10 Assembly accepts outputs from the A11 CPU Assy and sends the information to a 320 X 240 dot LCD display fourteen LEDs and a piezo buzzer The contact information from the 50 pushbuttons and the optical encoder is sent to the A11 CPU Assembly 7 CCFL rti pida AS sence Keyboard Matrix 8 x 7 50 Buttons LCD Display 8 Bit Shift Register Figure 4 3 A10 Block Diagram This assembly is functionally divided into six blocks Three of the blocks are physically on the A10 PCA The other three blocks are assemblies that are attached to it Logic for interfacing to the keyboard optical encoder and piezoelectric buzzer is contained in the FPGA on 11 CPU Assembly Publication 31232 Rev A7 October 2003 4 5 1 4 5 2 4 5 3 4 5 4 4 5 5 4 5 6 Theory of Operation Keyboard Matrix There are no active parts on this portion of the assembly only switch contacts Debounce and decoding are done in software 11 CPU The row and c
148. wn over their sockets When tightening the three coaxial cables observe proper torque procedures To install the 12000A calibration program simply copy all the files in the 12000A Calibration directory to a directory on your PC Publication 31232 Rev A7 October 2003 6 17 Series 12000A Microwave Synthesizers 6 3 Series 12000A CPU Initialization Error Messages Series 12000A CPU Initialization Error Messages 124XXA Peay Wig NOTE The following error messages are listed in the order of potential occurrence 1 Synth boot load timeout Boot code has been transmitted to the Synthesizer but after 650 microseconds no response has been received 2 Synth boot load err Boot code has been transmitted to the Synthesizer and the Synthesizer has responded with an error message The contents of the Synthesizer DSP HIP status and data registers are displayed 3 ALC boot load timeout Boot code has been transmitted to the ALC board but after 650 microseconds no response has been received 4 ALC boot load error Boot code has been transmitted to the ALC board and the ALC board has responded with an error message The contents of the ALC board DSP HIP status and data registers are displayed 5 Synth FPGA RdBck timeout A byte of the Synthesizer FPGA program file has been transmitted to the Synthesizer but after 65 microseconds no response has been received 6 Synth FPGA RdBck error A byte of the Synthesizer

Series 12000A Microwave Synthesizers - Giga

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