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SERVICE MANUAL

1. oo 17 connecrion Cons poss 47 oos SHAPED mm 4 0 SHAPED mm RA se jus F 99 4 FUSE HOLDER BLX 2 FOR F501 48 HEAT RADIATOR BOARD 11 15 25 9 U501 U504 FOR HEAT RADIATION 481 HEAT RADIATOR BOARD 11x15x25 WHITE AB905 U501 U504 FOR HEAT RADIATION 59 TAPPING SCREW BT 3 8 BLACK FIXED HEAT RADIATION BOARD 3 OK BOARD ewmomuwmessrn fan RARA oO messo RESISYOR gt foras messo pwemrssron Jearmonrumrrsistor gt MICE m In SMD CAPACITOR 50V 392 10 0603 C608 C615 1 SMD RESISTOR 1 16W 15K 5 2 R614 R618 R615 R613 R609 R610 C607 C620 C605 C606 18 19 TC601 TC604 TC610 TC611 TC613 T 4209 h ew w he 2 bo bo ooo o 6P90 2 5 2 SOCKET WITH L NEEDLE ne EN MICROPHONE SOCKET CK3 6 35 4 MIC601 MIC602 EI CONNECTION CORDS 0 6 SHAPED 7 5mm JP601 JP604 4 SUBSIDIARY BOARD MATERIAL SPECIFICATIONS PART NUMBER LOCATION 60 ne R
2. 0 6 5 75mm EN 10 _ 12 1 10 11 12 13 4 5 17 e SCHEMATIC DIAGRAM OF THE AUXILIARY POWERAMPLIFYING BOARD Y303 GSADC12V O From Sub AMP Board x 920 o r S U xonon 1 1N4148 Y302 GSADC12V O pa 3 4 SR 5 L 6 7 GND To Output Board R301 02 R303 R304 R305 100 11100 100 100 100 1N4148 Y301 GSADC12V O O VD301 R307 41N4148 56k gt C302 47u 25V NOTE When repairing the power amplifying board make sure that is fixed to the big radiator board closely and rightly without any inclination in assembling the Power IC 407 408 409 and 410 Asilicon oiled mica spacer needs to be placed between IC andthe big radiator board When fixing the screws of the Power IC 407 N408 409 and N410 the insulating spacers need to be placed between the screws and the Power IC A multimeter can be used to detect whether the insulation is effective ornot Otherwise a short circuit may be resulted to burn Ics STC 9630 SERVICE MANUAL DETAILED CIRCUIT EXPLANATIONS 2 INPUT BOARD MAIN PARTS LISTOF THEINPUT BOARD MAIN PARTS LIST OF THE INPUT BOARD LOCATION SPECIFICATIONS DESCRIPTION SPECIFICATIONS PART NUMBER 1BSY02 1 Terminal Socket AV6 84 3 xp Raft Cords
3. I DP 1 25 2 a 02 3 OZ 90 MIAN SCHEMATIC DIAGRAM MH NETT THSOTOUL 0558 60EA 0558 90 A 60201 75 ODA 15 7 w I 9 6 3056 STED 9 gt secu EECA peed d 45 F V dO O NI2DAM 15 c WO 2 0 m 15 I ZESA OSL eeu 90SX OdO 44 0 EOESX HOL FOL A91 4n F ezeo IZED PS6SYA 2 c toT V 2 S L TOP 2 180 NIOOAM c 000 SOT SIO 2 5 4 T plan ALS v 11266 L y y ei ENT rd TA 86 SOI 1 8 7 p 9c OSUL TST 14336 9 112146 IST 1 9 Se 1 96 SOI 9160 V vc MOT 91 EY 8 56 101 oswa ET AST ANLy OSWA 6 SOT SID MOT OZAA MOI d 9559 SEED 7062 UND 01 A91 4n01 TI SNAJSOT Oda 10601 TI P v I __61 ODA 45 U st TS 8dcA lt 45 LL 16 op U 9 O
4. UTI 8 9066 910 dWOD OHGIA AOSI 6 004400 1970 V ASV aNDA aNDA 101 101 6620 1570 UO AOST HHT 8 9066 nel 110 2 AOSI SLTA 1445 ASV GUNDA aNDA 101 12120 101 MOST 9570 I UO TITA 017 NOST A coca VI SNQAYOZ 6620 ASV A9T AnOT OTIL JEZI Wr9 NVYGS OSSA SSA lt OSSA ssa OSSA SSA m 9 OSSA EN v o ODDA 6 Wod 1 erra 297 I mou et EEAS g EN syo 91 5652 LT ze LI tl SJ 81 _ US 1 6l EEAS DD I 3 15 UO Da YD LE _ 47085 col a Es 8 1008 lt 61 RI ZEE DO 1 oa ot 00 mm due gon sr IDA 0 ovq L lt 91 Zt DA dvolv SE lt S OCIA s a _ uce ESTA ______ 60d tr 51 E vt I OYGIA 30 28 754 v SEE 2 LOG I on ov TE LYNG OdqIA 90d 11 soa IE 5 00 n SOG 01 FDA P 0 SVING lt 6 A O3GIA rod 8 DA 6c FVING 9 1 2244 w 9c EVWA L O3GIA
5. 5 hk SUPPLY VOLTAGE 5 LI 4 OUTPUT 4 OUTPUT GND PL OO GROUND 3 L2 VEE 2 INVERTING INPUT 2 7 1 NON INVERTING INPUT 1 LO TAB CONNECTED TO PIN 3 Pin connection Top view Connection Diagram Front View Features Features e Voltage 18v Max 28v e Voltage 8V 30V e Max output peak current 3 5A e output current 4A e Output power Vs 14 4v RL 4 ohm THD 10 f 1kHz 6w e Output Power Vcc 25v V 25v Ri 8ohm Full protection function THD 1 f 1kHz 25w e Full protection function
6. Sl 4 SMD MAGNETIC BEADS FCM1608K 221T05 L305 L307 L308 L310 L311 L312 L314 L316 L324 L329 L331 L325 L326 L327 muon muon muon SMD TRIODE 0213 0217 0229 5 201 205 209 2 1 2 2 SMD TRIODE 3904 7717 es sw rmopr 7717 2 2 16 12 Yo em eje emo l 7462 fon eh 20003 fem C 9 1 w fo oo ie 0 0 w fe 3 mol fo mea ha _ 6 2 Ooo he gt gt 73 CABLE SOCKET 14P 1 0mm STRAIGHT DUAL LINE XS204 PLUG pem _ 3 C 2 POWER BOARD RESISTOR umweosssmampm 3 earnon RESISTOR umwxensssuampi 1 e METAL FILM RESISYOR gt METAL FILM RESISYOR fraw _ oxime FILM RESISTOR wass 1 METALOXIDE FILM RESISTOR wemcsssuemrrerieg 1 fam _ o fierar oxime rum resistor wimwsesuemprb eris 1 fam _ jmenvorrcemessron finesse 1 rorceraincaracitor 7 ewscemcmecsuema m roncriarscarscrron ninss caractron 14 CAPACITOR
7. em Pa 7 SUBSIDIARY BOARD 1 o MATERIAL SPECIFICATIONS PART NUMBER LOCATION SMD RADIATION DIODE RADIATION DIODE LTST COTBKT C930TBKT a3 jo C C 2 100 2 0 1 SOCKET RED BLACK A963 1 8 SUBSIDIARY BOARD 2 mare ovn pem jM LIN SMp LIGHT TOUCH SWITCH TD BXAX AD0 60GRAMPOWER 5 7 9P70 2 0 2 SOCKET WITH L NEEDLE lp Sb a THE SAME DIRECTION En EE XS901 IRSENSOR HSO038B3V BUTTONS SUPPORTING BOARD SUPPORTING BOARD GREY 00000 GREY 62 STC 9630 Service manual PHILCO STC 9630 SERVICE MANUAL CAUTIONS There is high voltage inside this unit Make sure to pull out the plug of this unit before repairing There high voltage components inside this unit Please pay attention all warnings and instructions marked on this unit to avoid electric shock Specifications ofthe replaced components must be the same as that of the original components Do not change the components specifications to prevent risks CONTENTS CAUTIONS 1 STC 9630 FEATURES 2 CIRCUIT CONNECTION DIAGRAM amp BLOCK DIAGRAM C ontents 3 DETAILED CIRCUIT EXPLANATIONS 10 THE EXPLANATION FOR KEY COMPONENTS VOLUME CONTROL IC PT2258 CPU IC AT89C2051 POWER IC TDA7377 POWER IC
8. ppp 2 Y F 7 3 Uy 11564 V G g lal EEAAI 170F 0100 6070 3070 J 8570 J LUT sss SEK 51145 E d cor 116609 V EEEPSZISEE S 689 vor vol vor STA SI 18 l NI 201 8689 NOAU90TI 00100 a gt gt gt mre MULE JEN SIS 10701 INSEE Ag taney un 114884 2 E 1231 OE ET 9 2 E i V 60124 DALH Pa int 91 4901 P TEZO 8IZIININA nis 0201 gt 0 ZI 691015 NVEGS 2252 SETO A91 4001 V 3001 Lica 8704 LINSGEH 6IZIL coca Y DEEADVA 53 MIAN SCHEMATIC DIAGRAM TVIVGS 0815 pr 6 cLVdsv IvLVaS LLVGSV I 2624 1085 A ATIVS SND 108 1 ADA SNA z0OT 7800 501 440917 OSTA HETOL 8 0 91 411 HZIL 6 601 2 SNODFOI S879 A6 5114401 6 8870 TOT 0857 TI LUIZ A91 4n01 8TITO 96170 A9T ANOTT ZALAN 2 2 SFPI
9. 5 5 1CH C 2 5 POWER R AMPLIFICATION SL SR LPF SW AMPLIFICATION SW POWER AMPLIFICATION OUTPUT BOARD CPU LED REMOTE CONTROL RECEPTION POWER SUPPL DISPLAY FRONT PANEL S CONTROL BOARD STC 9630 SERVICE MANUAL DETAILED CIRCUIT EXPLANATIONS 1 THE POWERAMPLIFYING BOARD MAIN PARTS LISTOF THE MAIN POWERAMPLIFYING BOARD LOCATION SPECIFICATIONS DESCRIPTION SPECIFICATIONS PART NUMBER R405 Carbor filmResistor 16 6800 5 SHAPED 7 5 R406 R412 R451 R455 R470 Carbor film Resistor _ 1 6W1 5K 5 SHAPED 75 R415 R419 R421 R424 R425 R428 Carbon film Resistor 1 6W4 7K 5 SHAPED 75 4 R404 R434 R437 R440 R443 R466 Carbor film Resistor 1 6 10 5 SHAPED 75 Carbon film Resistor R450 R458 R452 R454 R456 R416 R418 R422 R423 Carbor film Resistor 1 6 22 5 SHAPED 75 R426 R427 R441 R444 R459 R465 1 6 W47K 5 SHAPED 75 2 R445 R436 9 41784208429 8431 Carbor filmResistor 1 6 150 5 SHAPED75 0 11 Porcelain Capacitor Porc el ain Capaci tor SOV 151 10 2 5mm C417 C418 C418 Porcelain Capaci tor Hum ma Terylene Capacitor 100V 103 10 3 5mm Terylene Capacitor Capacitor CD 16V10U 20765112 CD CDI 1 16V47U 20905111 2 29 CD 25V22U 20965 11 2 C419 0
10. 2 NN NNN CN CN CN 000 o y y y m m m m woso 2 0 WVDD 2 AGNDX DVDA AGNDX 4 DVDB AVDDO c 5 RFOP 6 po RFON C 7 DVDRFIP AGNDO c 8 DVDRFIN 9 CDA TM2 10 CDB TM3 4 11 co AGNDT 12 mo CDD TM4 OO 13 09 AVDDT 14 pa osp V2REFO 15 MT 1 336 VREF0 16 RFGCU DVD ROM FEO 18 3 LVL c 19 WI h CEON CSO 20 It AGNDX TEO 21 m AGNDX VDDP mai 22 DVD MON DEFECT 4 23 L J1 yop LRFRP 24 Read s HRFRP 25 SW CRTP 26 so CRTPLP I 27 SINPHI TRLPA c 28 REFSIN TRLP 29 OO HALLSIN HTRC m 30 GNDP 31 REF00S DPFN 32 HALLCOS DPFO Co 33 3 AGNDX 34 m AGNDX 35 AGNDX AGNDX 36 O VDD 37 VCON SF Sb lt lt lt vw lt lt LO LO LO LO LO L LO LO LO LO oo 588 588 588 58 55 lt lt 9 5428 5 2 a 2 lt lt lt MT1336 PIN ASSIGNMENT 13 MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE MT1336 PIN DESCRIPTIONS LQFP128 RF Flag Interface DEFECT Digital Output Flag of bad
11. Column Add Bank Select Counter AO Address A1 Registers 1112 113 118 113 7 A11 BAO BA1 Mode Mode Registers HY57V641620HG 1Mx16 Bank 3 1Mx16 Bank 2 gt 1Mx16 Bank 1 1 16 0 a lt 5 8 x m Memory 5 P Array U o Q e MEE Counter Data Out Control Data Out Control Control Line Control 42 205 AND 1 ATI 0 5 SPIFNI II FRONT SCHEMATIC DIAGRAM TV8 00SH 1060 dE A91 40001 sui 1001 T vol AOT ANOZZ i DA TS JDA ve 1050 TOPOL VYD0S G4T 196914 5 9 90 9 IT 50 0095 9579 9995 ra 95 6 9888 8015 SSM SDAS ss 8 lt lt 211 6546045 9547085 Fin Yo 5 5 _ c 79 ti 11985 esyweoas lt i m IT TI S ID IT LED ZIDAS 2859 0095 lt s LO lt lt ID ISW IDAS L H 6 65 A ID m ET 8S GI SYD l j 24 6 15 vI pl B SC IND 8 235 95 LC 415 9 S D 8c yp _ LES S 1055 S DEI E A9 1 3h001 JOA 23
12. P 2154 B C250 ASTB 9 L330 139 un n IR 19 C297 5455 0201 R247 1 9204 Q 162 R262 C2137 R213 005 EE 00005 M R270 ren R280 XS302 xL 0 0203 8 LJ a 1 VD201 2 X201 onn U211 n A C a 310 58 LO Cr c3 R303 Gr OQ 8 e L SL 27 Si LIMIT GND SP Spe R223 7 R221 R215 R222 m 2 J R2108 V307 amp 3 m gt gt R339 R210 Q 5 59 IQ 5 3 UUS N QN R260 11203 1064 C242 111201 ce43 si XS202 LL Q 22 TC309 2 XS201 0302 25 L206 QJ 2 93211 er TC303 TC302 TC304 co sem 2963 0 m O amp VD2003 03 18 FUCHEN 22 ie gt gt gt gt 9 gt 55 10 SPARE PARTS LIST STC 9630 MATERIAL LIST 1 DECODE BOARD MATERIAL SPECIFICATIONS PART NUMBER LOCATION C2119 C2128 C2131 L243 L248 R205 R 1 SMD RESISTOR 1 16W 00 45 24 219 R220 R226 R240 R241 R244 R255 R 257 R259 R282 R332 R337 R2162 R297 CN NX messo onon naa ems fre _ 1 16W 330 5 MD RESISTOR 1 16W 4700 5
13. 5 0603 3 C222 C223 C333 96 16V220U 20 6 12 2 5 N N N N N nN 22 0 C225 C241 C242 C243 C254 C256 C257 33 gt SMD CAPACITOR SOV 47P 5 NPO 0603 C259 C260 C262 C266 C268 C269 C271 C216 C273 C274 C342 C2111 C2114 C2 50 MD CAPACITOR 50V 101 5 NPO 0603 10 117 2120 2123 2126 C201 C211 C221 C224 C227 C230 C23 2 C234 C237 C240 C246 C247 C251 C 253 C272 C278 C283 C289 C297 C301 C303 C312 C313 C320 C330 C332 C3 35 C339 C341 C2113 C2137 C2146 C21 50 2154 4 A SMD CAPACITOR SOV 104 80 20 0603 C201 C211 C221 C224 C227 C230 C23 2 C234 C237 C240 C246 C247 C251 C 253 C272 C278 C283 C289 C297 C301 303 312 313 320 330 332 3 35 C339 C341 C2113 C2137 C2146 C21 50 2154 SMD CAPACITOR 16V 105 80 20 0603 C315 C318 SMD CAPACITOR 10V 225 80 20 0805 2 C226 C228 C233 C238 C239 C2112 C2115 C2118 C 199 MD CAPACITOR 50V 102 10 0603 10 2121 C2124 C2127 C2148 C2122 C2129 C2130 C2133 C2135 C213 6 T Sov 103 210 0603 MD INDUCTOR 1 8UH 10 1608 MAGNETIC BEADS INDUCTOR RH354708 7 L204 L205 L209 L241 L242 L249 L250 L201 L203 L216 L239 L240 L301 L304 40 1 SMD CAPACITOR 25V 104 80 20 0603 74 MD CAPACITOR 50V 122 10 0603 un un gt QA OM La gt A 92 9 Ge 99 G 5191 4195 9 N
14. TEZISLV 201 FFI RFSUBI 200 Ex ADIN 7 67 0 68 1 INTOH 70 IR 4 71 DVDD2 CI 72 199 ADCVSS 198 BDO 4 73 5 74 197 SLCK 196 SDEN 195 SDATA 194 WOBSI 193 EZ2 UDGATE 192 DVDD3 191 p 3 IDGATE 190 VFO13 189 DVSS 188 PRST 187 XTALI 186 Eza XTALO 185 3 DVDD3 184 3 SPBCK 183 SPLRCK 182 DVDD2 181 3 SPDATA 180 5 SPMCLK 179 5 HSYN 178 DVSS 177 pea YUV7 176 5 VSYN 175 E BLANK 174 ICE UWR 5 75 URD 76 DVSS c 77 78 RD6 EG 79 RD5 c 80 RD4 CJ 81 DVDD2 82 30 MT1379 216 pins c 83 CJ 84 RD1 c 85 RDO c 86 RWE c 87 CASH 88 89 RCS 90 BAO C 91 DVSS c 92 15 93 RD14 2 4 94 RD 13 azi 95 RD12 96 DVDD3 97 173 pa YUV6 R 172 YUV5 B 171 32 DACVSSA 170 p YUV4G 169 EZD DACVDDA 168 YUV3 CVBS 167 DACVSSB 166 YUV2 Y 165 DACVDDB 164 3 YUVI C 163 DACVSSC RD11 azi 98 10 99 1379 CONFIDENTIAL NO DISCLOSURE 26 Jul 2002 Page 1of 2 YUVO CIN FS VREF DACVDDC ASDATA4 ASDATA3 ASDATA2 ASDATAO SPDIF MC DATA ACLK DVDD3 ALRCK ABCK RD16 RD17 DVSS RD18 RD19 RD20 RD21 DVDD2 RD22 RD23 DQM3 DVSS RD24 RD25 RD26 RD27 DVDD3 RD28 RD29 RD30 RD31 DVSS RA3
15. 2 MD RESISTOR 1 16W 1500 5 13 MD RESISTOR 1 16W 3300 5 1 1 16W 45 20 SMD RESISTOR 1 16W 2K 5 1 SMD RESISTOR 1 16W 1 5K 5 2 R2107 R2109 R2159 R229 R235 R246 N N R247 R254 R283 R284 R291 R296 R222 R223 R211 R2130 R2131 R2134 R R322 R323 R262 R264 R270 R277 R280 R281 R253 R227 R228 R266 R267 R2105 R2106 R2 117 R2128 R2158 R2160 R237 99 R338 R342 14 SMD RESISTOR SMD RESISTOR 1 16W 6 8K 5 SMD RESISTOR 1 16W 8 2K 5 1 SMD RESISTOR 1 16W 10K 45 12 SMD RESISTOR 1 16W 15K 5 2 SMD RESISTOR 1 16W 20K 5 SMD RESISTOR 1 16W 18K 5 2 MD RESISTOR 1 16W24K 5 RECISION SMD RESISTOR 1 16W 330K 1 2 RECISION SMD RESISTOR 1 16W 750K 1 3 MD RESISTOR 1 16W 100K 5 10 1 16W 4 7K 5 2135 R2138 R2139 R2142 R2143 R2146 R2147 R2150 R2151 R285 R2136 R2148 R2152 R2155 R201 R206 R250 R265 R303 R306 R309 R311 R319 R339 R2157 R207 R307 R203 R316 R320 R321 R204 R216 R2129 R2133 R2137 R2141 R2145 R214 9 R2132 R2156 un un N NDIA un un lt 2 2 2 2 2 9 9 9 A A A E e R333 R334 g R202 R331 R335 R208 R2111 R2116 R217 R308 R310 TC201 TC202 TC203 TC217 TC219 TC nN oc N 16V10U 20 5 11 2 221 TC233 TC236 TC240 TC241 TC30 6 TC307 TC20T7 TC208 TC211 TC213 TC23S 301 TC204 TC206 TC215 TC234 TC237 TC CD11 16V47U 20 5 11 2 11 302 TC305 TC308 TC309 MD CAPACITOR SOV 27
16. NEM E 15 1 ZOPOL t EN 10 43 9 SCHEMATIC amp PCB WIRING DIAGRAM 43 FRONT SCHEMATIC DIAGRAM 74 3 DVD2003 3 26 FUCHEN Q gt e KEY3 1 KEY2 T KEYI R409 Og 5 T 44 POWER BOARD SCHEMATIC DIAGRAM 905 vOSNO 0 6 8 MUAT6 L 20607 015 9 OSND A6 I LYG YDIOA SO8LIAT 9 A91 4n001 8021 vosn ino 8 AS VS 905 TOSNO 705 AS GS SOSND TH A91 4n001 ISOL SOSX AS c II MI RIOTT TISA oVItVWI 505 N A0S AnZy CISOL 101 14530 A91 q 001 TISOL vOSOL 101 VI H 01 L0SO SOST A00v 20508 N T 4089 LISSH EZZ 1054 cosn 9059 V 31085076 AN i PE Y N 95 WI POSA 06 414 2 6 6060 Ve coe 8 84 ASLC ines 20608 N L soraan 90sa 00r JnZ8 10601 2050 T LOOPNI 1 601 2052 AOTT W N LSdS MS 206 AOSC V9 LL 1 WV 1054 vc Q Q z 2051 NZ NZ oori NZ 45 POWER BOARD SCHEMATIC DIAGRAM 9094 2194 6064 3504 AOGE 19 1064 44 1 4495 A INO
17. DVDD2 RA10 BA1 DQMO DOMI DVSS RA4 RAS DVDD3 DMVSS RDI 100 RD8 rm 101 DVSS GJ 102 EG 103 md 104 RA11 105 RA9 4 106 107 DMVDD3 108 MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE FUNCTIONAL B LOCK IR VFD DVD module Analog x Spindle System TV encoder Front end Controller Parser Channel Decode System DRAM Audio Microphone Controller Interface Processor Input Audio DAC SPDIF MIC Servo Controller The servo control is accomplished through the servo DSP Servo Digital Signal Processor and its accessory circuits This servo DSP is capable of performing complex operations and also provides a friendly interface for the system controller By issuing type 1 and type 2 commands from the system controller the servo DSP can accomplish various complicated servo control functions such as tracking seeking and MT1336 MT1376 chip register programming As for the servo circuits it provides interface between the input servo signals and the Servo DSP It has builtin ADCs to digitize the servo control signal and DACs to provide signals for the actuator and sledge motor It also has a serial interface to communicate with the MT1336 MT1376 chip Analog Front End DPU The analog front end contains a data slicer circuit and a data PLL circuit The RF analog signal from MT1336 MT1376 is quantized by th
18. Programmable frequency error gain and phase error gain of spindle PLL to control spindle motor on CLV and CAV mode Provide a varipitch speed control for CLV and CAV mode Built in ADCs and DACs for digital servo control Provide 2 general PWM 19 control can PWM output or digital output Built in DSP for digital servo control Host Micro contioller Builtin 8032 micro controller Builtin internal 373 and 8 bit programmable lower address port 1024 bytes on chip RAM Upto2M bytes FLASH programming interface Supports 5 3 3 Volt FLASH interface Supports power down mode Supports additional serial port DVD ROM CD ROM Decoding Logic Supports CD ROM Mode 1 CD ROM XA Mode 2 Form 1 CD ROM XA Mode 2 Form 2 and CD DA formats High speed ECC logic capable of correcting one error per each P codeword or Q codeword Automatic sector Mode and Form detection Automatic sector Header verification 8 bit counter for decode completion check Programmable descrambling and error correction schemes Automatically repeated error corrections 8 bit C2 Pointer counter Decoder Error Notification Interrupt that signals various decoder errors a Provide error correction acceleration Buffer Memory Controller Supports 16Mb 32Mb 64Mb 128Mb SDRAM Supports 16 bit 32 bit SDRAM data bus interface Build in a DRAM interface programmable clock to optimize the DRAM performance Provide the s
19. TDA2003 POWER IC LM1875 STC 9630 FEATURES 5 1CH volume and level adjustment incorporate IC PT2258 and realize the standby and mute functions CPU incorporates IC AT89C2051 Small signal amplification and amplified LPF incorporate IC NJM4558 Power amplification of L SR channels incorporates power ICTDA7377 Power amplification of the channelemploys TDA2003 Power amplification of the SW channelemploys two LM1875 to form BIL Status display employs a LED digitaltube displayed range 0 16 Full functionremote control e Square power transformer bridge and full wave rectifying circuit Satellite speakers employ plastic body Subwoofer speaker s body employs xyloid MDF construction with PVC cover Satellite speakers employ 3 inch wide frequency band high performance unit Subwoofer incorporates 6 5 inch aluminum audio coil with dual magnetic circuits exclusively for the subwoofer unit All in one flat radiator board with long radiator sluts for excellent heat radiation STC 9630 SERVICE MANUAL CIRCUIT CONNECTION DIAGRAM amp BLOCK DIAGRAM CIRCUIT CONNECTION DIAGRAM POWER AMPLIFYING BOARD Transformer OUTPUT BOARD INPUT BOARD FRONT PANEL S BOARD BLOCK DIAGRAM 1 MAIN POWER AMPLIFYING BOARD R L R SL SR SL INPUT BOARD lt POWER mi AMPLIFICATION Lo SR L L 8 L RSLSR
20. and DVD RAM DAD method E HF level signal generator Sub beam added signal for 3 beams CD_ROM m One beam push pull signal generator for central servo application m High speed RF envelop detection circuit with bandwidth up to 400KHz for CD ROM Defect and Blank detection circuits F Dual automatic laser power control circuits with programmable level of LD monitor voltage Vref 1 4V voltage and V2ref 2 8V voltage generators E V20 2 0V voltage for pick up head reference m Bi directional serial port to access internal registers 11 MEDIATEK PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE DVDA L _ CDA L DVDB L INPUT MUX CDB L DVDCL CDC L DVDDL 1541 DVDRFIN ENVELOP DETECTOR MAL MB MD L AGC1 AGC2 L AGC3 RFSUBOT WOBSO LLL WOBBLE DET v20 L RFGCI IT SERIAL PORT REF and 2VREF Voltage Generator V2REFO VREFOL MT1336 FUNCTION BLOCKS DIAGRAM 12 MT1336 MTK CONFIDENTIAL NO DISCLOSUHE OSP OSN RFOP RFON LRFRP DEFECT HRFRP CRTP CRTPLP CSO LVL TEO FEO REFCOS HALLCOS COSPHI REFSIN HALLSIN SINPHI MDI2 LDO2 MDI1 LDO1 UDGATE IDGATE VFO13 SDATA SLCK SDEN MEDIATER MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE a 8 N o 7 Now Sa a e E 885 888 S 2286
21. cod IV ST 9 P von 17 vC IVIAG A OHGIA OVWA v AS occu 856041 HONASA mao ONASH oLvad LI A6 801 91 SNMLNSYI ODA SINT STA TH EI SNMLNSYI AND T E TI k e 2 82 SNO LNSSJ dND TI SASA dWOD SCTI SHAO 01 SNDS TANLITINT 6 60201 OHGIA I D 8 SNMLNSYI AND L OHdIA MI 9 SNMLNSYI AND OJAIA sui a m SNMLNS9I AND DNASA T HONASH 1 SNQ LISX SOTSX ODA 8 44660 802101 6071 ODAV ASV 91 41046 91 40022 PAW LOCOL 8070 ISX 52 12 Tf AVANT 91 VALAN 84 6121 I gt ESITO 1620 9620 S670 oLvad da sv zl ASV 8121 Il 2 gg tt 0671 6 86601 STA 8 p 91 48022 da 6371 Lo STCOIL 9 da r LNSH4 1 0 45010 124884 lozsx V ODA DDAA V V 52 MIAN SCHEMATIC DIAGRAM A9T HNLP 90ZIL a e zt e ed bel Kae MIO EEAS 69015 INVAAS voca 518 elu aND 101 101 VLIDEL SE _ 5 occa to HE G S 80124 HUME LOITA HAUGE EETA TEU OTTA q OG DA ORIG OOH G2 4
22. data output status RF SIO interface j 59 SDATA Digital IO RF serial data lO Digital input Reset active high 16 9MHz for verification RF SERVO interface IDGATE Digital Input Control signal for DVD RAM 38 VFO13 Digital Input DVD RAM Header signal 100 AC coupled DVD FF signal input A AC coupled DVD signal input AC coupled DVD RF signal input 97 AC coupled DVD RF signal input D 95 AC coupled DVD signal input RFIN AC coupled DVD RFF signal input RFIP AC coupled CD RF signal input A AC coupled CD signal input AC coupled CD RF signal input C AC coupled CD RF signal input D 94 93 9 9 RF Offset cancellation capacitor connecting RF Offset cancellation capacitor connecting RF Offset cancellation capacitor connecting 84 RF Offset cancellation capacitor connecting 88 RF AGC loop capacitor connecting for DVD ROM k P 2 1 5 3 MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Analog RF AGC loop capacitor connecting for DVD RAM RF AGC loop capacitor connecting for DVD RAM DC coupled DVD RAM main beam RF signal input A 102 DC coupled DVD RAM main beam RF signal input 103 DC coupled DVD RAM main beam RF signal input 104 DC coupled DVD RAM main beam RF signal input D D 8 1 7 01 105 DC coupled DVD RAM sub beam RF signal input A 106 DC coupled DVD RAM sub beam signal input 110 DC coupled DVD RAM
23. driver up to 16 5 It also supports DVD RAM read up to 4XS Version 2 It contains servo amplifiers to generate focusing error 3 beam tracking error 1 beam radial push pull signal RF level and SBAD for servo functions It also includes DPD tracking error signal for DVD ROM application For DVD RAM disks there are also Differential Push Pull DPP method for generating tracking signal and Differential Astigmatic Detection DAD for processing focusing signal Programmable equalizer and circuits are also incorporated in this chip to optimize read channel performance In addition this chip has dual automatic laser power control circuits for DVD ROM DVD RAM and CD ROM seperately and reference voltage generators to reduce external components Programmable functions are implemented by the access of internal register through bi directional serial port to configure modes selection FEATURES E RF equalizer with programmable f from 3MHz to 70 MHz and programmable boost from 3dB to 13dB MT1336 supports at least eight different kinds of pick up heads with versatile input configuration for both RF input stages and servo signal blocks Versatile on line AGC m 3 beams tracking error signal generator for CD_ROM application H One beam differential phase tracking error DPD generator for DVD ROM application H Differential push pull tracki ng error DPP generator for DVD RAM application m Focusing error signal generator for CD ROM DVD ROM
24. frooov 417 Joammccarsomor 10mm jac _ 08 O Jervan u wazo O revien 1 fam _ jo jo gt rere onon 2 af o _ ko _____ ressrcmercsmacsm o ressrcmercsmacsm a o 3 00 waGvericurapsispucro 3 a __ onon enan ann s _ _ He po SWITCHING POWER SWITCHING POWER 5 1 m Po on 3 Jone umm 3 1 s 0 Door fam m jon ww 32 VOLTAGE REGULATORDIODE 1 00 j man o hwenczros us _ ooo 00 Cre A SSS 3 PWOTOELECTRIC COUPLER s PO WA _ 7 2 4 noon us SSS Po o For 1 js _ a fi oo _ _ a ooo 3 js _ a
25. pickup maintenance parts during transportation and before installation the both ends of the laser diode are short circuited After replacing the parts with new ones remove the short circuit according to the correct procedure See this Technical Guide 2 Do not use a tester to check the laser diode for the optical pickup Failure to do so willdamage the laser diode due to the power supply in the tester 4 2 Handling precautions for Traverse Unit Optical Pickup 1 Do not give a considerable shock to the traverse unit optical pickup as it has an extremely high precise structure 2 When replacing the optical pickup install the flexible cable and cut is short land with a nipper See the optical pickup replacement procedure in this Technical Guide Before replacing the traverse unit remove the short pin for preventingstatic electricity and install a new unit Connect the connector as short times as possible 3 The flexible cable may be cut off if an excessive force is applied to it Use caution when handling the cable 4 The half fixed resistor for laser power adjustment cannot be adjusted Do not turn the resistor 5 Assembling and disassembling the mechanism unit 5 1 Optical pickup Unit Explosed View and Part List Materials to Pic 1 PARTS CODE PARTS NAME 14692200 1 1 IEA0311A06300 ASSY CHASSIS COMPLETE IEA0M10A15500 ASSY MOTOR SLED IEAOMI0A15501 ASSY MOTOR SLED 3 1EA2451A2470
26. short pattern for laser diode CD Soldered short pattern for laser diode DVD 5 3 2 Cautions on assembly and adjustment Make sure that the workbenches jigs tips tipos of soldering irons and measuring instruments are grounded and that personnel wear wrist straps for ground Open the LD short lands quickly with a soldering iron after a circuit is connected Keep the power source of the pick up protected from internal and external sources of electrical noise Refrain from operation and storage in atmospheres containing corrosive gases such as H2S SO2 NO2 and Cl2 or toxic gases or in locations containing substances especially from the organic silicon cyan formalin and phenol groups which emit toxic gases lt is particularly important to ensure that none of the above substances are present inside the unit Otherwise the motor may no longer run 6 Electrical Confirmation 6 1 Video Output Luminance Signal Confirmation DO this confirmation after replacing a P C B Measurement point Color bar 75 DVDT S15 Video output terminal PLAY Title 46 DVDT S15 or PLAY Title 12 DVDT S01 DVDT S01 Measuring equipment tools Confirmation value 200mV dir 10 sec dir 1000mVp p 30mV Purpose maintain video signal output compatibility 1 Connect the oscilloscope to the video output terminal and terminate at 75 ohms 2 Confirm that luminance signal Y S level is 1000mVp p 30mV 6 2 Video Output Chrominance Signal Conf
27. this pin and PLLVSS LPION LPFON LPFIP LPFIN Analog Input Negative input of loop filter amplifier LPFOP Analog Output Positive output of loop filter amplifier JITFO Analog Output RF jitter meter output JITFN Analog Input Negative input of the operation amplifier for RF jigger meter PLLVDD3 3 3V power pin for data PLL and related analog circuitry FOO Analog Output Focus servo output PDM output of focus servo compensator TRO Analog Output Tracking servo output PDM output of tracking servo compensator O G 14 TROPENPWM Analog Output Tray open output controlled by microcontroller This is PWM output for TRWMEN27nRW 2 1 is digital output for TRWMEN27hRW2 0 PWMOUT 1 Analog Output The 1st general PWM output PWMOUT2 Analog Output The 2nd general PWM output DVDD2 2 5V power pin for internal fully digital circuitry 15 16 17 FM DVSS F 2 HIGHAO Inout Microcontroller address 8 2 16MA SR PU Inout Microcontroller address 9 2 16MA SR PU Inout Microcontroller address 10 2 16MA SR PU Inout Microcontroller address 11 2 16MA SR PU Inout Microcontroller address 12 2 16MA SR PU Inout Microcontroller address 13 2 16MA SR PU DVSS Ground pin for internal digital circuitry 0 OT HIGHA1 IN HIGHA2 HIGHA3 HIGHA4 NO 5 21 MEDIATEK MT1379 PRELIMI
28. 0 HOLDER SHAFT 4 IEADSADI0 GEARRACK o o 8 IEA2511A29200 GEARDRIVE 0 00 30 6 IEA2511A29300 GEARMIDDLEA 8 16A2744A03000 SHAFLSLIDE DE NENNEN 1EA2812A15300 SPRING COMP TYOUSEI IEA2812A15400 SPRING COMP RACK I EAOB10B20100 1EA0B10B20200 SEXEA25700 SPECIAL SCREW BIN M2X1 1 SEXEA25900 SPECIAL SCREW 1 7 2 2 a s NEM EN 1 2744 03100 SHAFT SLIDE SUB 1 NN 3 2 SFBPN204R0SE SCR S TPG PAN 2X4 2 SFSFN266R0SE SCR S TPG FLT 2 6X6 SWXEA 15400 SPECIAL WASHER 1 8X4 X0 25 Note This parts list is not for service parts supply 5 2 Bracket Explosed View and Part List Materials to Pic 2 1 bracket 2 belt 3 screw 4 wheel 5 6 iron chip 7 Immobility mechanism equipment 8 Magnet 9 Platen 10 Bridge bracket 11 screw 12 screw 13 Big bracket m s 12 NE VE lt 25 pay pef mre 14 front silicon rubber 15 Back silicon rubber 16 Pick up 17 Pick up 18 switch 19 Five pin flat plug 20 screw 21 PCB 22 motor 23 Motor wheel 24 screw 25 tray Before going process with disassembly and installation please carefully both peruse the chart and confirm the materials 5 3 MISCELLANEOUS 5 3 1 Protection of the LD Laser diode Short the parts of LD circuit pattern by soldering Soldered
29. 3 3 3V power pin for internal digital circuitry 2 16MA SR 2 16MA SR 2 16MA SR 115 Ground pin for internal digital circuitry 116 DQM1 Output Mask for DRAM input output byte 1 2 16MA SR 111 112 4 5 6 7 1 1 114 MEDIATEK MT1379 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Pin Number Symbol Type Description 2 16MA SR 118 BA1 Output DRAM bank address 0 CENE 119 RA10 Output DRAM address10 120 DVDD2 2 5V power pin for internal digital circuitry 121 DRAM address 0 2 16MA SR DRAM address 1 2 16MA SR Output DRAM address 2 Output DRAM address 3 2 16MA SR DVSS Ground pin for internal digital circuitry RD31 Inout DRAM data 31 RAO 122 123 RA2 124 125 126 2 16MA SR PU PD SMT Inout 2 16MA SR PU PD SMT 127 RD30 DRAM data 30 DRAM data 29 128 RD29 Inout BM PU PD SMT 129 HD28 Inout 2 16 SR PU PD SMT 3 3V power pin for internal digital circuitry 131 HD27 Inout DRAM data 27 2 16 SR PU PD SMT 132 HD26 Inout D um PU PD SMT 133 RD25 Inout BM PU PD SMT 134 HD24 Inout 2 16 SR PU PD SMT 135 DVSS Ground pin for internal digital circuitry 136 DQM3 Mask for DRAM input output byte 3 2 16MA SR 137 DQM2 Mask for DRAM input output byte 2 2 16MA SR DRAM data 28 DRAM data 26 DRAM data 25 DRAM data 24 26 MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WIT
30. 423 C426 C427 C429 C431 C433 A 50 221 20965112 CD 25V220U 20248112 3 5 AT89C2051 DIP 40 44 460 __ Jjsscpp STC 9630 SERVICE MANUAL DETAILED CIRCUIT EXPLANATIONS 43 N403 IC 212258 DP 44 N410 IC 0 TDA7370B MULTIWATTI5V oe oO ion Om 0 7 3 5306 12 PINS 2 5nm TN T aw oo _ gt ss l lt 1 gt x o e K N MS ASTINTT 81811 807 09v ASZ NOLY AGTINOTT o ae ir vino A Lavo 15 Z er ELNO BE dNV 4NS OL p Ke 2100 5 6 NI z LLNO LNI lt lt 0 SSX 8 8 W 2 9 OZEZWAL OLVN vol 9540 AQL NOL V 4972 2679 3001 1001 ceva NAILIZ G 8072 MOGL 089 1 gino 9NI lkm sino SNI AOL AQLING fero PNI 5 Gr vas AQL NOL Hi 108 cevo I AQLINZ Zale 001 m 1NO A9LIPZZ Aus L wA 9 we LNI 190 2681 Old 95 p1e
31. 439 1440 A new 3813 50 1 1606 teen Q3nNILNOO 404 e 20807 Ac 3 L es zoen ONE 20 1192 A Toda dil posu A082 WOUL Toc ti O soso I 9084 LAG no 2060 TIa voco c cOGNOd 9060 CH O TOGL Go INDG d 2094 70634 2111 C TOSOL T 4090 lt 5 SOSNO 2 AN 20809 2081 od a ar 0 866 2 2 lt 46 SCHEMATIC DIAGRAM W BAZE v01 2090 91921 1099 1901 SOSX MOVE UR E 108SX VAG AG VAG AG 9 10 0 9 10 01 DIN HOI HOI XIN 90SX TOTAA 10 AS 1095 501 MTT 7092 2094 11921 9 31095 T0931 20901 ko A9T ANCT MI 90921 8094 0921 8SIPNI 09 SPIPNI 09 TO9DIN 8557 vooon Wb 194 VA6 601 MTT 099 1094 2100 31095 5094 10921 20901 1 50921 door 5090 MOI YO 47 25 109 6 9009 1095 SCHEMATIC DIAGRAM 0 0 uU OND uU 0 B cQ9JIN 0 48 A9T HN0TT 90LIL OHGIA S OUTPUT BOARD SCHEMATI
32. 4MA SR Videoin Data PortB 3 SMT 4MA SR Videoin Hsync_601 SMT Videoin Data PortB 4 173 174 19 1 28 MEDIATEK 1379 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Pin Number Symbol Type Description 181 SPDATA Input Audio data of SPDIF input Videoin Data PortB 5 DVDD2 2 5V power pin for internal digital circuitry 183 SPLRCK Input Audio left right channel clock of SPDIF input Videoin Data PortB 6 Videoin Data PortB 7 188 PRST Input Power on reset input active high PWMVREF ADCVDDS RFDTSLVN 29 MEDIATEK PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE IREF PLLVSS LPIOP LPION LPFON LPFIP LPFIN LPFOP JITFO JITFN PLLVDD3 FOO TRO TROPENPWM PWMOUT PWMOUT2 DVDD2 DMO FMO DVSS FG HIGHAO HIGHA1 HIGHA2 HIGHA3 HIGHA4 HIGHA5 DVSS HIGHA6 HIGHA7 AD7 AD6 AD5 AD4 DVDD3 AD3 AD2 AD1 AD0 IOA0 IOA1 DVDD2 4 IOA5 IOA6 IOA7 A16 17 18 19 IOA20 APLLVSS ON 31 216 RFIP APLLVDD3 GJ 55 215 ra 214 Eza RFDTSLVN 213 FI RFDTSLVP 212 ADCVDD3 ALE 56 57 IOWR 58 IOCSH c 59 211 Ez2 PWM2VREF 210 PWMVREF 209 ra HRFZC 208 RFRP DVSS 60 2 61 UP1 3 62 UP1 4 63 207 pz RFRP DC 5 64 206 f RFLEVEL 6 65 DVDD3 66 205 FI FEI 204 Eza CSO 203 202
33. 5 L 21 28 1 A4 Vss 22 27 23 26 oo 2 A0r 24 25 1 37 CONNECTION DIAGRAMS RESET A18 A17 gt I Il ll O O FBGA Top View Balls Facing Down A16 gt W E 268 amp 8 cO 5 8 A TI JJ TI T 2 gt O OT O 6 A5 Al O W RY BY NC A18 gt I I gt e gt W gt 2 gt lt Special Handling Instructions Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods The package and or data integrity may be compromised if the package body is exposed to temperatures above 150 C for prolonged periods of time Special handling is required for Flash Memory products in FBGA packages PIN CONFIGURATION 0 19 000 0014 DQ15 A 1 BYTE CE OE WE RESET RY BY Voc Vss NC 20 addresses 15 data inputs outputs DQ15 data input output word mode A 1 LSB address input byte mode Selects 8 bit or 16 bit mode Chip enable Output enable Write enable Hardware reset pin Ready Busy output N A SO 044 3 0 volt only single power supply see Product Selector Guide for speed options and voltage supply tolerances Device ground Pin not conn
34. 7P130 2 512 6 SHIELDED WITHNEEDLES PIN7 GROUNDED SCHEMATIC DIAGRAM OF THE INPUT BOARD To Power AMP Board 0 Signal Source si STC 9630 SERVICE MANUAL DETAILED CIRCUIT EXPLANATIONS 3 FRONT PANEL S CONTROL BOARD MAIN PARTS LIST OF THE FRONT PANEL S CONTROL BOARD MAIN PARTS LIST OF THE FRONT PANEL S CONTROL BOARD __ __ Gp m ences sm U SCHEMATIC DIAGRAM OF THE FRONT PANEL S CONTROL BOARD N901 HS0038B REMOTE XP3 12PIN STC 9630 SERVICE MANUAL DETAILED CIRCUIT EXPLANATIONS 4 POWER SWITCHBOARD MAIN PARTS LISTOF THEPOWER SWITCHAND POWER ICOF MAIN PARTS LIST OF THE WER SWIT CH AND PO WER IC OF THE AMP BO ARD DESCRIPTION SPECIFICATIONSPART NUMBER LOCATION SPECIFICATIONS TL pe ses nu en fimsutationCmnutar 0353 Mesper fee SCHEMATIC DIAGRAM OF THE POWER SWITCH BOARD SW 6A 250V TRANS 110 lE To AMP Board TK6301500 THE EXPLANATION FOR KEY COMPONENTS VOLUME CONTROL IC PT2258 Manufactured by CMOS tech
35. 824 49d AEE UMd YEE f gt V EITA SCC SPE 8ccO VIVGA r IDAS YE Wiod sl eS 2 He FI 43 o2 oo II L uu W M orcd 1848 VSCH dIddSV NZ IOZGA 15103 jaja sr Iro o jaja Sr sr sr t Sr S PO kaj 15 kal en en en st fen fen en en a 09104 ISI 05 o S RR lt gt I oo oo oo No JO FO No o IS Ne JB ca oO NI 252 ro Ja Ad un 1 4 558 01 6100 ME 2501 cot __ cor Ady 14 9 adw 14 9 uLv TITA T SNODr0SX 9ccO Y CXL TI axa 0cv 255 tozsx SIV LIV SNQ 4d0I LV 6152 TEE TEE 0223 6100 8170 LI AN dOId T 9 40 vol VOTILF 20 AIR se xe o 15 2 5 5 5 2 ro o s my
36. AGND RF path GND 114 SVDD Servo Power 117 SGND Servo GND 2120 WAVDD Wobble Power 128 118 WAGND GND Wobble GND N N N 26 27 25 24 JE 5 Power for RF output GND for RF output Power for Trimming PAD GND for Trimming PAD 22 Peak Detection Power 31 Peak Detection GND 37 54 Serial Power 39 57 Serial GND VREFO Analog output Reference voltage 1 4V V2REFO Analog output Reference voltage 2 8V Analog Output Reference voltage 2 0V N JJ m m JJ 5 m lt gt G m ap A J 16 3 MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE ALPC TRIMMING Trimming pin for ALPC1 Trimming pin for ALPC1 Trimming pin for ALPC2 Trimming pin for ALPC2 10 TM1 TM2 TM3 M4 T HIGH SPEED TRACK COUNTING TRLP Analog Low pass filter capacitor connecting TRLPA Low pass filter capacitor connecting HTRC Digital output High speed track counting digital output Negative input of amplifier for hall sensor signal Positive input of amplifier for hall sensor signal Amplifier output for hall sensor signal Negative input of amplifier for hall sensor signal REFCOS Analog input Positive input of amplifier for hall sensor signal COSPHI Analog output Amplifier output for hall sensor signal FOR MONITOR ONLY Analog output Analog output 2 2 3 PC 9 8 0 74 75 76 71 72 70 Analog output Analog output Ou
37. C DIAGRAM SAV 102 N v 201 9042 001 2040 201 TOLD 201 OLD 201 TOLD 201 1042 84 90 1 84 2021 84 84 COLT 84 COLT 84 10 7 SI AIAVAIH 114544 91 4 0 SI C 4001 SoA SOLOL Ame I OE ro E O A001 GUNDA 6 C 8 O LO 5 1945 I gt A SINO A sa 315 15 00 90 dda ADV IA NHH3D LOv VOU SOLAT A9T HN0TT TOLIL A9T HN0TT OLIL ANOCT A91 4n0001 COLDL Id 10451 OGHIA TA GONDA 8TSX 447 Xa y 25 gt AS x6 _ 15 02 gt sa OGHIA SI hI qd I TI TA II p p 3 4 9 x 11045 SA Z 49 OUTPUT BOARD SCHEMATIC DIAGRAM 1020 904 MS NHHO M v re ZOOZAAQ JP703 lt gt AN AN G NA LE ed 4 9024 Je roe 1 P 20 NET Hb dA CR 3 zon 2 e 2 OL IQ 20201 E IQ C NI 62 C708 2
38. CA 11 Odd 5851 ul TAU 6 LICEAL TEU eec 168 166 OSO OG LOEO 9020 080 toco 20 Sdi oag 1068 KC L sp 43 SOO 12 ador 382 SL 600 8050 W vL DALH 05 cL mon A5 EM MiG OEM OE aL IMS Lc cc OL HONASH 4664 ALT 1 89 OOAV OdT peed oc R 99 Avan 104684 YET S tIIHSC A TOEA OOAV OG VOL POI vor SET eg 6559 8559 9559 LED S TEITAST 7 TOEA DDATA 5 91 411 E ZOCOL 01 90 4 ASIS eS sdvi V AOL st WANA zige OOAV Od1 NHdOWIL SI lt Died 8810 6 S 810 3Sc ried JOT coed ASOTOUL 2 0 N A9T HNOTT TOCOL S 1065 VOI V OAV 6054 8054 51 SCHEMATIC DIAGRAM A OHGIA 101 101 10 6900 AOST 08 Hng I SIZT 0 0 52 ASV 101 101 8923 990 AOSI 9LTA Hng I VICI 922 101 101 6900 90 AOST ELTA Hng I EITT S 906 TA OHGIA AOSI TLTA 9 aNDA aNDA TA 101 ASV 0975 HOST 101 I UO
39. EMATIC DIAGRAM C a C2152 R271 C2151 R242 2 R272 Q216 R263 28 R244 ED een C2150 19214 9220 ei R243 ne CE e R2112 R2120 RE RLS R2125 R2116 R2128 a EDGE ER EEE 2 2 PA y cess R218 9905 R2119 9206 R2122 Q207 R2123 0220 0208 R2126 Q209 2127 9210 0219 282 TC224 5 C278 9 C280 gt Zon C225 226 YO TC230 NT 2 2 2 2 DE R2106 TC227 5 1 07 gt G R225 OKA L p GND TC236 0207 EN 3 5 TC231 9V R226 C287 839 2020 1204 555486 GND 6 53 5 5353 836 OSS NS O DE E CO DB LA C248 T AAAA TC211 L MG e 2 2 e oog Bev Q201 123 R248 AOV
40. HOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Inout DRAM data 23 2 16MA SR Videoin Data PortA 7 PU PD SMT 139 RD22 Inout DRAM data 22 2 16 SR Videoin Data PortA 6 PU PD SMT 141 RD21 Inout DRAM data 21 2 16 SR Videoin Data PortA 5 PU PD SMT 142 RD20 Inout DRAM data 20 pm 2 16MA SR Videoin Data PortA 4 PU PD SMT 143 RD19 Inout DRAM data 19 up m 2 16MA SR Videoin Data PortA 3 PU PD SMT 144 RD18 Inout DRAM data 18 2 16MA SR Videoin Data PortA 2 PU PD SMT 146 RD17 Inout DRAM data 17 2 16 SR Videoin Data PortA 1 PU PD SMT 147 RD16 Inout DRAM data 16 2 16MA SR_ Videoin Data PortA 0 148 ABCK Output Audio bit clock 149 ALRCK Inout 1 Audio left right channel clock yee 2 Trap value in power on reset PD SMT 1 use external 373 0 use internal 373 DVDD3 3 3V power pin for internal digital circuitry 151 ACLK Inout Audio DAC master clock 384 256 audio sample frequency 4MA 152 MC_DATA Microphone serial input 153 SPDIF Output SPDIF output SR ON OFF 154 ASDATAO 1 Audio serial data 0 left right channel Trap value in power on reset 1 manufactory test mode 0 normal operation 155 ASDATA1 Audio serial data 1 surround left surround right channel kad Trap value in power on reset 1 manufactory test mode 0 normal operation 156 ASDATA2 Audio serial data 2 center left channel Trap value in power on reset 1 manufactory test mode 0 normal opera
41. ISTINCTIVE CHARACTERISTICS This Data Sheet states AMD s current technical specifications regarding the Product described herein This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications Single power supply operation Full voltage range 2 7 to 3 6 volt read and write operations for battery powered applications Regulated voltage range 3 0 to 3 6 volt read and write operations and for compatibility with high performance 3 3 volt microprocessors Manufactured on 0 23 pm process technology Fully compatible with 0 32 um Am29LV160B device High performance Access times as fast as 70 ns Ultra low power consumption typical values at 5 MHz 200 nA Automatic Sleep mode current 200 nA standby mode current 9 mA read current 20 mA program erase current Flexible sector architecture One 16 Kbyte two 8 Kbyte one 32 Kbyte and thirty one 64 Kbyte sectors byte mode One 8 Kword two 4 Kword one 16 Kword and thirty one 32 Kword sectors word mode Supports full chip erase Sector Protection features A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors Unlock Bypass Program Command Reduces overall programming time when issuing mul
42. NARY SUBJECT TO CHANGE WITHOUT NOTICE CONFIDENTIAL NO DISCLOSURE Inout Microcontroller address 14 2 16 SR PU 30 HIGHA7 Inout Microcontroller address 15 2 16MA SR PU Inout Microcontroller address data 7 2 16MA SR Inout Microcontroller address data 6 2 16MA SR 33 AD5 Inout Microcontroller address data 5 2 16MA SR 2 16MA SR DVDD3 3 3V power pin for internal digital circuitry 36 AD3 Inout Microcontroller address data 3 2 16MA SR 37 AD2 Inout Microcontroller address data 2 2 16MA SR 38 AD1 Inout Microcontroller address data 1 2 16MA SR 39 ADO Inout Microcontroller address data 0 2 16MA SR 40 Inout Microcontroller address 0 IO 2 16MA SR 11 7 41 1 Inout Microcontroller address 1 IO HEGE PU NM DVDD2 2 5V power pin for internal digital circuitry IOA2 Inout Microcontroller address 2 IO 2 16MA SR PU 44 Inout Microcontroller address 3 IO 2 16MA SR PU 45 4 Inout Microcontroller address 4 IO 2 16 SR PU 46 5 Inout Microcontroller address 5 IO 2 16MA SR PU Inout Microcontroller address 6 IO 2 16MA SR PU 47 22 MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE 48 IOA7 Inout Microcontroller address 7 IO 2 16 SR PU 2 16MA SR 2 16 SR Inout Flash address 18 IO 2 16 SR SMT 52 19 Inout Flash address 19 10 53 20 I
43. O DISCLOSURE Downmix function Support IEC 60958 61937 output PCM bit stream mute mode Custom IEC latency up to 2 frames Pink noise and white noise generator Karaoke functions Microphone echo with adjustable echo level echo depth and delay length Microphone tone control with three custom second order IIR filter Vocal mute vocal assistant Key shift up to 8 keys controlled by 1 2 key Channel equalizer 30 surround processing include virtual surround and speaker separation Power down control HDCD certified TV Encoder Six 54 MHz 12bit DA converters Support NTSC PAL BDGHI PAL N PAL M interlace TV format and 480p 576p progressive TV format Automatically turn off unconnected channel s Support PC monitor VGA Support Macrovision 7 1 Progressive Output Automatic detect film or video source 8 2 pull down source detection Advanced Motion adaptive de interlace Minimum external memory requirement Audio Video Output Line in SPDIF in for versatile audio processing CCIR601 656 video input port Support picture in picture for video decoding and input source Outline 216 pin LQFP package Q 3 2 5 Volt Dual operating voltages MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Pin DEFINITIONS Current reference input It generates reference current for data PLL Connect an external 100K resistor to
44. OTATED POTENTIOMETER WHE101N 2 B10K 20 2 E ROTATED POTENTIOMETER WHE101N 2 B50K 20 VRBOI 5 100 2 0 2 SOCKET WITH 1 5 AV BOARD no wm Seraimcanonsrart nomen ovn KA jwwownwmssn fawwas 2 c jwwownwmssn a jwwowmwmmsn ew gt jwwownwmssn c rem MULTILAYER CERAMIC 0 CAPACITOR 50V 224 20 5mm ES C708 MULTILAYER CERAMIC 0 CAPACITOR 50V 224 10 5mm C708 o onome o homne o wo ooo 3 __ ao onmwwcaeew fem __ ca femmer po C Done 3 2 fe _ mremoomernssonm 7 1 noon me _ 3 me _ mm _ ows siarepsam Dou CORDS ons gt Dou T 6 MAIN FRONT PANEL MATERIAL SPECIFICATIONS PART NUMBER LOCATION CONNECT LED WITH FRONT 5 5 16x8x4 DOUBLE FACED HARD PANEL PCB fo gt 1 2 2 Men 1 1 1 1 1 1 2 1 1 1 1 1 1 1 10V100U 20 5x7 2 TC401 TC402 TC403 61 em 3 em 00 OO 00 pem m _ Oo _ ee e ne meson _________ gt _
45. PNI es ISIA HTTOL SOTAA 89 A6 90TAA LOTAA 01 20 ILHQ HOIOA 90 L6TA A91 4n01 SA SI8IOSC 00 7001 A91 4n01 5 91124 OETOL 389 PSIZA I 2 m DI SA STSIDST A91 4n01 609 a 3001 S L 6 009689 e A6 MI A91 4n01 avi 86120 16 2 L li 15 7 A M89 ESITA Et ITU PO 6181055 A91 4n01 3 809 3001 STOL HI ITU ST TALAN A91 401 LCCOL Su HUS 61170 SA SISIOSC 140 Ia n 91 4001 234 5 9 WS HO Ta as TEITO 2511 101 TI 1 SA SI8IOSC 90001 001 4 SCZIL CNDV 01 ogsy A91 4n01 96121 MI TI S117O 2001 i 6129 ie 2 THO 81103 AST ANOT 701 C Hoe SA SI8IOSC TETOLFT 6879 389 89123 SEITA 502 ae mi A91 4901 3 1011 TOL SEE 402 ANDY 201 i AST ANOT ESTO T870 1875 8 TTITO 5 5 E E 4 i vi 389 9 TETTE 1085 01 DA6 v cv Lvds 91100 A6 IVLVGS TOT 11172 4 OVLV POL Agt anor vol VAQ cara xoc 62104 7670 I 2OLST 600 vee a 0875 6LCO 8LCO 9 COL4 1609 V V F _ Ta V Tor A6 04 SCH
46. RODUCT SELECTOR GUIDE mm En 9 9m fm Max OE access time ns tog 50 Note See AC Characteristics for full specifications BLOCK DIAGRAM RY BY DQ0 DQ15 1 Vcc 5 Erase Voltage Input Output RESET Bue WE State Control BYTE gt Command Register PGM Voltage Generator Chip Enable kai OE ST Y Gating LI e 5 0 Cell Matrix 2 D D A0 A19 lt Am29LV160D 36 CONNECTION DIAGRAMS A15 1 48 1 A16 A14 2 2 47 1 BYTE A13 3 46 Vss A12 4 45 31 15 1 11 5 44 007 10 6 43 FF pou A9 7 42 006 8 41 0013 A19 9 40 1 005 10 39 0012 WE 11 Standard TSOP 38 ro pou RESET 12 37 1 Vee NC 13 36 DQ1 NC 14 35 1 RY BY 15 34 0010 A18 16 33 A17 17 AT 18 31 1 pat 19 30 008 A5 20 29 pi poo A4 21 28 3 OE A3 22 27 AAA Vss A2 23 26 L A1 24 25 A0 1 48 01 15 BYTEH 2 47 oo 14 Vss 46 A13 DQ15 A 1 D 4 45 A12 007 5 44 11 0014 C 6 43 A10 DQ6 C 7 42 Ag 0013 8 41 8 005 9 40 4 A19 DQ12 10 39 NC 004 L 11 Ho L 12 Reverse TSOP 37 Ho RESET DQ11 C 13 36 NC 14 35 DQ10 L 15 34 TT RY BY DQ2 II 16 33 mi A18 009 III 17 32 oo A17 DQ1 C 18 31 A7 C 19 30 TT 000 C 20 29 1
47. SERVICE MANUAL SIG 9630 CONTENTS 1 SAFETY PRECAUTIONS _________________________ 2 PREVENTION OF ELECTRO STATIC DISCHARGE ESD TO ELECTROSTATICALLY SENSITIVE ES ET 3 CONTROL BUTTON LOCATIONS AND EXPLANATIONS n 4 PREVERTION OF STATIC ELECTRICITY DISCHARGE 5 ASSEMBLING AND DISASSEMBLING THE MECHANISM UNIT 5 1 OPTICAL PICKUP UNIT EXPLOSED VIEW AND PART LIST MM 52 BRACKET EXPLOSED VIEW AND PART LIST eee Rec ES Peer EGCECTRIE AL DONEISIUDETIDN 6 1 VIDEO OUTPUT LUMINANCE SIGNAL CONFIRMATION e 62 VIDEO OUTPUT CHROMINANCE SIGNAL CONFIRMATION 8 7 MPEG BOARD CHECK WAVEFORM ener DES D Me ed 8 ICBLOCKDIACRAM amp DESCRIPTION 022222 0 0 727227 OO 1 7 2222222227272222222222272277277 DE NE BA Se EE 9 SCHEMATIC amp PCB WIRING DIAGRAM extra xS ek uum enis ico b Iden iw redex tremens 10 SPARE PARTS LIST SETTE Sata aa NOR OEC ee n CREAR 1 SAFETY PREAUTIONS 1 1 GENERAL GUIDELINES 1 When servicing observe the original lead dress if a short circuit is found replace all parts which have been overheated or damaged by the short circuit 2 After s
48. according to system controller request It also decrypts the scramble data of the CSS CPPM sectors Another function of system parser is providing system controller DSP a DRAM memory copy controller to enhance system controller DSP performance Video Decoder The primary function of MT1379 is to support MPEG1 and MPEG2 video decoding The video decode engine comprises of variable length decoder VLD inverse transformer IT motion compensator MC and block reconst ructor BR The video decode engine decodes the variable length encoded symbols in MPEG bitstream and performs inverse scan inverse quantization mismatch control and inverse discrete cosine transform onto the variable length decoded data The motion compensator fetches prediction data from reference picture buffer according to motion vectors and motion prediciton mode for P and B pictures Finally the block reconstructor combines both the results of inverse transformer and motion compensator to derive the reconstructed image macroblock and write back to picture buffer The video decode engine can also support JPEG and BMP file decoding by common image compression hardware kernels Video Output The Video Output unit contains Video Processor SPU OSD Cursor TV encoder units it performs Reading decoded video from DRAM buffer Scaling the image Gamma Brightness Hue Saturation adjustment and edge enhancement Reading and decoding SPU and OSD data from DRAM buffer Generating ha
49. d outputs referenced to positive edge of system clock e Data mask function by UDQM LDQM e Internal four banks operation 40 Auto refresh and self refresh 4096 refresh cycles 64ms Programmable Burst Length and Burst Type 1 2 4 8 or Full page for Sequential Burst 1 2 4 8 for Interleave Burst Programmable CAS Latency 2 3 Clocks GJYUNDAI HY57V641620HG PIN CONFIGURATION 54pin TSOP II 400 x 875mi 0 8mm pin pitch 29365286 084 6852550232605 PIN DESCRIPTION CLK Clock The system clock input All other inputs are registered to the SDRAM on the rising edge of CLK CKE Clock Enable Controls internal clock signal and when deactivated the SDRAM will be one of the states among power down suspend or self refresh Chip Select Enables or disables all inputs except CLK CKE and DQM Selects bank to be activated during RAS activity ee Selects bank to be read written during CAS activity A0 A11 Row Address RAO RA11 Column Address CAO 7 Auto precharge flag A10 Row Address Strobe Column Address Strobe Write Enable RAS CAS and WE define the operation Refer function truth table for details 41 2 YUNDAI FUNCTIONAL BLOCK DIAGRAM 1Mbit x 4banks x 16 I O Synchronous DRAM Self refresh logic amp timer Internal Row counter CLK Row active Row CKE Pre Decoders CS 0 2 D RAS P lt o S CAS 5 refresh WE Column Pre UDQ Decoders x
50. data 6 R DRAM data 5 R DRAM data 4 DVDD2 2 5V power pin for internal digital circuitry R DRAM data 3 R DRAM data 2 R R C R D7 D5 D4 D1 Inout DRAM data 1 DRAM Write enable active low 2 16MA SR DRAM columnaddress strobe active low 2 16MA SR DRAM row address strobe active low 2 16MA SR DRAM chip select active low 2 16MA SR BAO Output DRAM bank address 0 2 16MA SR DVSS Ground pin for internal digital circuitry RD15 Inout 2 16MA SR PU PD SMT 77 78 79 81 82 83 84 85 86 87 88 91 92 3 9 DRAM data 15 24 MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Inout DRAM data 14 2 16MA SR PU PD SMT 95 RD13 Inout DRAM data 13 2 16MA SR PU PD SMT RD12 Inout 1512 PU PD SMT 3 3V power pin for internal digital circuitry RD11 Inout DRAM data 11 IT um PU PD SMT HD10 Inout tI ums PU PD SMT 100 Inout 2 16 SR 101 RD8 Inout DRAM data 12 DRAM data 10 DRAM data 9 DRAM data 8 2 16MA SR PU PD SMT 102 DVSS Ground pin for internal digital circuitry 2 16MA SR KP DRAM clock enable 2 16 SR DRAM address bit 11 or audio serial data 3 channel 7 8 2 16 SR 2 16 SR 2 16 SR DMVDD3 3 3V Power pin for DRAM clock circuitry DMVSS Ground pin for DRAM clock circuitry CLK CLE RA9 RA8 7 Output DRAM address 7 2 16MA SR RA6 RA5 RA4 10 10 10 10 108 109 110 DVDD
51. e data slicer to form the EFM EFM bit stream from which the channel bit clock is extracted by the data PLL The EFM EFM bit stream and bit clock are then output to DPU for channel bit processing Data path unit DPU provides protection on data with lost synchronization patterns and demodulates EFM EFM bit stream into the channel raw data that will be corrected by the decoder The synchronization protection makes data after the synchronization pattern to be extracted even if the synchronization pattern is not found Spindle Controller The spindle controller is used to control disc spindle motor It includes a varipitch CLV clock generator a CLV CAV controller and a PWM generator The varipitch CLV clock enerator generates a reference colck for the speed of operation The CLV CAV 31 MEDIATEK MT1379 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE controller changes the mode and speed of operation according to servo register setting The PWM generator generates pulse width modulated signal to drive disc spindle motor driver CSS CPPM The CSS CPPM module provides functions necessary for decoding discs conforming to CSS CPPM specification System Parser The system parser is used to help the system controller to decode DVD SVCD VCD bitstream just after the channel decoder performing error correction Acting as a DMA master it moves bitstream data from RSPC buffer to video audio or sub picture buffer
52. ected internally 39 LOGIC SYMBOL DQ0 DQ15 A 1 CE OE WE RESET BYTE RY BY N A SO 044 16 8 HYUNDAI 8 4 HY5 V641620HG DESCRIPTION HY57V641620HG 4 Banks x 1M x 16Bit Synchronous DRAM The Hyundai HY57V641620HG is 67 108 864 bit CMOS Synchronous DRAM ideally suited for the main memory applications which require large memory density and high bandwidth HY57V641620HG is organized as 4banks of 1 048 576x16 HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock All inputs and outputs are synchro nized with the rising edge of the clock input The data paths are internally pipelined to achieve very high bandwidth All input and output voltage levels are compatible with LVTTL Programmable options include the length of pipeline Read latency of 2 or 3 the number of consecutive read or write cycles initiated by single control command Burst length of 1 2 4 8 or Full page and the burst count sequence sequential or interleave burst of read or write cycles in progress can be terminated by burst terminate command or can be interrupted and replaced by new burst read or write command on any cycle This pipelined design is not restricted 2 rule FEATURES Single 3 3 0 3V power supply e device pins are compatible with LVTTL interface e standard 400mil 54pin TSOP II with 0 8mm of pin pitch e All inputs an
53. eltrefresh mode SDRAM Programmable DRAM access cycle and refresh MEDIATEK PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE cycle timings Block based sector addressing Programmable buffering counter for buffer status tracking Maximum DRAM speed is 133 2 Support 5 3 3 Volt DRAM Interface Video Decode Decodes video and MPEG2 main level main profile video 720 480 and 720x576 Maximum input bit rate of 15Mbits sec Smooth digest view function with I P and picture decoding Baseline extended sequential and progressive JPEG image decoding RLE and non RLE BMP image decoding Support CD G titles B Video OSD SPU HLI Processor B Aud c Arbitrary ratio vertical horizontal scaling of video from 0 25X to 256X 65535 256 16 4 2 color bitmap format OSD 256 16 color RLC format OSD Automatic scrolling of OSD image Provides 4 color 32x32 pixel hardware cursor Fade in Fade out and Wipe functions as specified in the DVD Audio Specification and other slide show transition effects Progressive scan output io Processing Decoder format supports Dolby Digital AC 3 decoding DTS decoding MLP decoding for DVD Audio 1 layer 1 layer 2 audio decoding MPEG 2 2 2 channel audio decoding Dolby Pro Logic decoding High Definition Compatible Digital HDCD decoding Up to 6 channel linear PCM output for DVD Audio DVD Video 20 MT1379 MTK CONFIDENTIAL N
54. er 3 Control Button Locations and Explanations Front Panel Illustration 200000 POWER switch STOP button 1 VOLUME knob Disc tray REW button MIC 2 VOLUME knob Q OPEN CLOSE button Q FWD button SENSOR Q PLAY button Q MIC 1 jack LED display window Q PAUSE button MIC 2 jack 4 PREVENTION OF STATIC ELECTRICITY DISCHARGE The laser diode in the traverse unit optical pickup may brake down due to static electricity of clothes or human body Use due caution to electrostatic breakdown when servicing and handling the laser diode 4 1 Grounding for electrostatic breakdown prevention Some devices such as the DVD player use the optical pickup laser diode and the optical pickup will be damaged by static electricity in the working environment Proceed servicing works under the working environment where grounding works is completed 4 1 1 Worktable grounding 1 Put a conductive material sheet or iron sheet on the area where the optical pickup 1 placed and ground the sheet 4 1 2 Human body grounding Use the anti static wrist strap to discharge the static electricity from your body safety 3 1577x409x2 tiff Anti static wrist strap 1MQ onductive material sheet or iron sheet 4 1 3 Handling of optical pickup 1 To keep the good quality of the optical
55. ervicing see to it that all the protective devices such as insulation barrier insulation papers shields are properly installed 3 After servicing make the following leakage current checks to prevent the customer from being exposed to shock hazards 2 PREVENTION OF ELECTRO STATIC DISCHARGE ESD TO ELECTROSTATICALLY SENSITIVE ES DEVICES Some semiconductor solid state devices can be damaged easily by static electricity Such components commonly are called Electrostatically Sensitive ES Devices Examples of typical ES devices are integrated circuits and some field effect transistors and semiconductor chip components The following techniques should be used to help reduce the incidence of component damage caused by electro static discharge ESD 1 Immediately before handling any semiconductor component or semiconductor equipped assembly drain off any ESD on your body by touching a known earth ground Alternatively obtain and wear a commercially availabel discharging ESD wrist strap which should be removed for potential shock reasons prior to applying power to the unit under test 2 After removing an electrical assembly equipped with ES devices place the assembly on a conductive surface such as alminum foil to prevent electrostatic charge buildup or exposure of the assembly 3 Use only a grounded tip soldering iron to solder or unsolder ES devices 4 Use only an anti static solder removal device Some solder removal devices not classified as an
56. full or a partial screen or multiple OSDs can occur in a screen at the same time only if they don t occupy the same horizontal line The output image is blended with the video SPU mixed stream Cursor A hardware cursor generator is integrated in Video Ou tput Unit The cursor image is a 32x32 4 color bitmap image each colors are programmable Cursor can be enlarged by 2 in both vertical and horizontal directions Cursor image is multiplexed with video SPU OSD mixed stream Audio Interface Audio interface consists of Audio Output Interface and Microphone Input Interface Audio Output Interface The MT1379 can support up to 8 channel audio outputs The output formats can be 16 24 or 32 bit frames Left alignment right alignment or 1 5 formats are all supported With builtin PLL MT1379 can provide the audio clock ACLK for external audio DAC at 384Fs where Fs is usually 32KHz 44 1KHz 48KHz 96KHz or 192KHz ACLK can also be programmed to be from outside MT1379 When ACLK is input to MT1379 the frequency could 128 n Fs where n is from 1 to 7 Audio raw encoded data or cooked decoded data can be output on a single line using S PDIF interface The output slew rate and driving force of this pad are programmable Microphone Input Interface The MT1379 provides a microphone input interface Two independent microphones data could be input to the MT1379 There are two independent digital volume control for these two input c
57. hannels The input data formats can also be left alignment right alignment or S formats System Controller MT1379 uses an embedded Turbo 8032 as System Controller and provide ICE interface to increase the feasibility of F W development Also MT1379 includes an build in internal 373 to latch lower byte address from 8032 Port 0 and provide a glue logic free solution MT1379 supports up to 1M X 16 bits Flash ROM to store 8032 code H W related data User data etc F W upgrade can be achieved either by debug interface or by disk 33 MEDIATEK PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE ELECTRICAL HARACTERISTICS Absolute Maximum Rating Symbol Parameters Value VDD3 3 3V Supply voltage 0 3 10 3 6 VDD2 2 5V Supply voltage 0 3 10 3 0 VDDA Analog Supply voltage 0 3 to 3 6 Vin Input Voltage 0 3 to 5 5 Vout Output Voltage 0 3 to VDD3 0 3 MT1379 MTK CONFIDENTIAL NO DISCLOSURE Ambient Temperature 0 to 70 DC Charateristics symbol Parameters Mm um Mputvitgehgh 24 86 __ v Vor Output voltage high 3 0 VDD3 V Vo Output voltage low 0 5 V i Highlevelinputeurrent 10 u Lowleelimutcurnt 10 Po Powerdssapaion 1 10 w Pew Powerdownmode ____ J o w 34 dd AMD 8 3 Am29LV160D 16 Megabit 2 M x 8 Bit 1 M x 16 Bit CMOS 3 0 Volt only Boot Sector Flash Memory D
58. ications where DRAM bandwidth are critical the filters can be configured as simple line repeating to reduce the DRAM bandwidth required The Video Processor unit integrates two separate horizontal postprocessing filter a simple 2 tap linear horizontal filter and an 8 tap programmable filter These filters are provided for scaling images horizontally along the scan line These two filters is capable of generating up to eight unique subpixel values between two consecutive pixels on a scan line The generation of pixels depends on the ratio between the width of the source image and the target image SPU 32 MEDIATEK 1379 PRELIMINARY SUBJECT CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE This is a hardware sub picture decoder It decodes the compressed SPU image bitstream and CHG_COLCON commands according to SPU header information previously decoded by system controller The SPU module also allows two SPU objects to be displayed at the same time SPU image is blended with main video stream OSD The OSD module can operate with 2 4 16 256 color bitmap format 1 2 4 8 bits and 16 256 color RLC format all have 16 levels of transparency In addition it accepts an special WARP mode which inserts one programmable RLC code in the bitmap to reduce the image size stored in DRAM It also features automatic shadow outline generation in 2 color mode 2 Hilight areas 1 ChangeColor area and 1 OSDVoid area One OSD area can occupy the
59. irmation Do the confirmation after replacing P C B Measurement point Color bar 75 DVDT S15 Video output terminal PLAY Title 46 DVDT S15 or PLAY Title 12 DVDT S01 DVDT S01 Measuring equipment tools Confirmation value Screwdriver Oscilloscope 200m V dir 10 sec dir 621mVp p 30mV Purpose To maintain video signal output compatibility 1 Connect the oscilloscope to the video output terminal and terminate at 75 ohme 2 Confirm that the chrominance signal C level 15 621 mVp p 30mV 7 MPEG BOARD CHECK WAVEFORM 7 1 27MHz WAVEFORM Run 500MS s Sample ne 1 ee ets JL Vectors Vector Accumulate 001115 Dot Accumulate 50101115 25ns Chl 100mV 5005 Style Readout Graticule Format Vectors Options Full 7 2 1 51 0380 2 WAVEFORM DIAGRAM Tek 10 5 5 173 Acqs Delay Time 16 5ns ee seeren donc a been mn Intensified i Jure i R m E aue 1 Delayed Only Ch 10 Ref2 100mv Silage cibo OT EET Position 25 Time Base Main Only 10 MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSUHE 8 IC BLOCK DIAGRAM amp DESCRIPTION 8 1 MT1336 GENERAL DESCRIPTION MT1336 is a high performance CMOS analog front end IC for both CD ROM driver up to 48XS and DVD ROM
60. nology 6 channel volume control 2 control interface Features e 6 design each channel 0 79 dB 1dB STEP e Working voltage 5 8v e Audio channel separability 100dB e control interface e DIP package 1dB Step O OUT1 10dB Step OUT2 1N2 1N3 O OUT3 10dB Step O OUT4 1N4 1N5 OUT5 10dB Step OUT6 146 1dB Step j Control unit 11 1 O SDA SCL GND STC 9630 SERVICE MANUAL THE EXPLANATION FOR KEY COMPONENTS CPU IC AT89C2051 8 bit microprocessor POWER IC TDA7377 4 channel audio amplifier PDIP SOIC RST VPP 1 VCC RX1 P3 0 2 1 7 TX1 1 3 P1 6 XTAL2 4 P1 5 XTAL1 5 P1 4 INTO P3 2 6 P1 3 INT1 P3 3 7 P1 2 TO P3 4 8 P1 1 AIN1 T1 P3 5 9 P1 0 AINO GND 0 P3 7 Pin structure Features e Voltage 2 6v Max 6 6v e Max I O current 20mA e numbers 15 e RAM 128 bits e FLASH EEPROM 2K e Max work efficiency 24 MHz OUT 3 OUT 4 VCC INPUT 3 INPUT 4 CLIP DET S GND PW GND STAND BY SUR INPUT 2 INPUT 1 VCC OUT 2 OUT 1 Pin connection Top view Features e Voltage 18V Max 28V e Max peak current 3 5A Output Power Vs 14 4V Rl 4 ohm THD 10 f 1kHz 6 5w 4 Full protection function THE EXPLANATION FOR KEY COMPONENTS POWER IC TDA2003 POWER IC LM1875 Mono audio power amplifier Mono power amplifier
61. nout Flash address 20 IO 2 16MA SR OR Data PortB 0 SMT APLLVSS Ground pin for audio clock circuitry APLLVDD3 3 3V Power pin for audio clock circuitry ALE Inout Microcontroller address latch enable 2 16MA SR PU SMT Inout Flash output enable active low IO SMT IOWR Inout Flash write enable active low IO SMT IOCS Inout Flash chip select active low IO 2 16MA SR PU SMT DVSS Ground pin for internal digital circuitry Microcontroller port 1 2 Microcontroller port 1 3 Microcontroller port 1 4 Microcontroller port 1 5 UP1 6 Microcontroller port 1 6 54 55 56 57 58 59 6 O O O O DVDD3 3 3V power pin for internal digital circuitry 23 MEDIATEK 1379 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE Pin Number Symbol Type Description 67 UP1 7 Microcontroller port 1 7 0 Microcontroller port 3 0 1 Microcontroller port 3 1 70 INTO Inout Microcontroller interrupt 0 active low 2 16MA SR PU SMT 71 Input IR control signal input SMT DVDD2 2 5V power pin for internal digital circuitry UP3 4 Microcontroller port 3 4 UP3 5 Microcontroller port 3 5 75 UWR Inout Microcontroller write strobe active low PU SMT Inout Microcontroller read strobe active low 2 16MA SR PU SMT DVSS Ground pin for internal digital circuitry 807 inout RD inout
62. og Aejdsiq 01 Vid 214 664 S Ld 1 914 JG L 8074 Lid 2074 IL CN st LO ON OD i AG n Nod VETT 7978 I d AOSZTVY L 608 AST 9 8 0 022 92 00 1 Lore AGZ NOOLY AST V 5075 vOVAA LOVAA Sid 7 2 09521 10 2 fo VOOVNIL 9 617 01 AQL NOL SLOT 20714 2002 072 2 L d SCHEMATIC DIAGRAM OF THE MAIN POWERAMPLIFYING BOARD DETAILED CIRCUIT EXPLANATIONS nduj wouy DETAILED CIRCUIT EXPLANATIONS e MAIN PARTS LIST OF THE AUXILIARY POWER AMPLIFYING BOARD STC 9630 SERVICE MANUAL LOCATION SPECIFICATIONS DESCRIPTION SPECIFICATIONS PART NUMBER R306 Carbon film Resistor R307 Carbon film Resistor 1 4W4 7K 5 SHAPED 10 1 6W56K 5 SHAPED 75 R308 Metal Film Resistor 3W202 75 R SHAPED 20 x 8 4 R301 R305 Carbon film Resistor C301 CD 6 C302 CD 1W1002 5 R SHAPED 15 x 8 25V 330U 20 8 x 14 3 5 25V 47U 20 5x 112 8 VD302 Voltage Regulator Diode 6 8V12W 4 709 H4A237022HDCI2V 02 7 PINS 2 5 mm Socket 15 57 Socket 4 PINS 3 96mm 17 WW
63. rdware cursor image Merging the video data SPU OSD and cursor Video Processor The Video Processor unit controls the transfer of video data stored in the DRAM to an internal or external TV encoder It uses FIFOs to buffer outgoing luminance and chrominance data and performs YUV420 to YUV422 conversion and arbitrary vertical horizontal decimation interpolation from 1 4x to 256x With this arbitrary ratio scaling capability the Video Processor can perform arbitrary image conversion such as PAL to NTSC NTSC to PAL MPEG1 to 2 Letterbox Pan Scan conversion or zoom in zoom out It is also capible of interlace to progressive conversion The Video Processor unit performs the following functions Requests and receives the decoded picture data from the picture buffer in external DRAM for display Resample vertical data to create 4 2 2 sample format Optionally performs vertical horizontal resampling of both luminance and chrominance data Performs optional Gamma correction luminance chrominance adjustment and edge enhancement The Video Processor unit contains two 2 ap vertical filters for luminance and chrominance These filters are used to interpolate and reposition luminance and chrominance line to improve picture quality These filters are capble of generating up to eight unique subline value between two consecutive scan lines The generation of lines depends on the ratio between the height of the source image and the target image In appl
64. sub beam signal input 111 DC coupled DVD RAM sub beam RF signal input D 108 R Analog External current bias resistor R 20K 119 Wobble AGC loop1 capacitor 121 Wobble AGC loop2 capacitor 122 Wobble AGC loop3 capacitor 127 Header push pull RF output signal 1 Wobble signal output RF positive output 7 RF negative output TRACKING ERROR 3 DPFN Analog DPD amplifier negative input 3 Ton 3 DPD amplifier output 61 DPD mute control input 116 3 beam satellite PD signal negative input 115 3 beam satellite PD signal positive input 21 Tracking error output 112 CD focusing error positive input 113 CD focusing error negative input Focusing error output RF level output 20 CSO Central servo signal output ALPC c 4 ep oo m JJ JJ JJ Qo JJ TI m lt m m Qo 2 JJ o lt gt m 15 3 MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE 124 Laser power monitor input 125 Laser driver output 123 Laser power monitor input 126 Laser driver output RF RIPPLE RF top envelop filter capacitor connecting Defect level filter capacitor connecting High frequency ripple output or Blank detector output Low frequency ripple output POWER 67 69 AVDD Master PLL Filter power 65 73 AGND GND for Master PLL Filter 64 AVDD DPD Power 109 AVDD RF path Power 107
65. ti static ESD protected can generate electrical charge sufficient to damage ES devices 5 Do not use freon propelled chemicals These can generate electrical charges sufficient to damage ES devices 6 Do not remove a replacement ES device from its protective package until immediately before you are ready to install it Most replacement ES devices are packaged with leads electrically shorted together by conductive foam alminum foil or comparable conductive material 7 Immediately before removing the protective material from the leads of a replacement ES device touch the protective material to the chassis or circuit assembly into which the device will be installed Caution Be sure no power is applied to the chassis or circuit and observe all other safety precautions 8 Minimize bodily motions when handling unpackaged replacement ES devices Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity ESD notice 1885 323 2 tiff IMPORTANT SAFETY NOTICE There are special components used in this equipment which are imporant for safety These parts are marked by in the schematic diagrams Exploded Views and replacement parts list lt is essential that these critical parts should be replaced with manufacturer s specified parts to prevent shock fire or other hazards Do not modify the original design without permission of manufactur
66. tion 27 MEDIATEK MT1379 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSURE 157 ASDATA3 1 Audio serial data 3 surround left surround right channel 2 Trap value in power on reset 1 manufactory test mode 0 normal operation OR Videoin Data PortB 1 158 ASDATA4 1 Audio serial data 4 center left channel 2 Trap value in power on reset 1 manufactory test mode 0 normal operation OR Videoin Data PortB 2 DACVDDC 3 3V power pin for VIDEO DAC circuitry 160 VREF Analog input Bandgap reference voltage 161 Analog output Full scale adjustment 162 YUVO CIN Video data output bit 0 4MA SR Compensation capacitor 163 DACVSSC Ground pin for VIDEO DAC circuitry 164 Video data output bit 1 4MA SR Analog chroma output 165 3 3V power pin for VIDEO DAG circuitry 166 Video data output bit 2 SR Analog Y output 167 Ground pin for VIDEO DAC circuitry 168 Video data output bit 3 4MA SR Analog composite output 169 3 3V power pin for VIDEO DAC circuitr 170 YUV4 G Output Video data output bit 4 T 171 DACVSSA Ground pin for VIDEO DAC circuitry 172 YUV5 B Output Video data output bit 5 4MA SR Blue or CB YUV6 R Output Video data output bit 6 4MA SR Red or CR ICE Input Microcontroller ICE mode enable PD SMT BLANK Inout Video blank area active low 4MA SR Videoin Field_601 l 176 VSYN Inout Vertical sync SMT
67. tiple program command sequences Top or bottom boot block configurations available 35 Embedded Algorithms Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors Embedded Program algorithm automatically writes and verifies data at specified addresses Minimum 1 000 000 write cycle guarantee per sector 20 year data retention at 125 C Reliable operation for the life of the system Package option 48 ball FBGA 48 pin TSOP 44 pin SO CFI Common Flash Interface compliant Provides device specific information to the system allowing host software to easily reconfigure for different Flash devices Compatibility with JEDEC standards Pinout and software compatible with single power supply Flash Superior inadvertent write protection Data Polling and toggle bits Provides a software method of detecting program or erase operation completion Ready Busy pin RY BY Provides a hardware method of detecting program or erase cycle completion not available on 44 SO Erase Suspend Erase Resume Suspends an erase operation to read data from or program data to a sector that is not being erased then resumes the erase operation Hardware reset pin RESET Z Hardware method to reset the device to reading array data Publication 22358 Rev Amendment 3 Issue Date November 10 2000 P
68. tput from of SW1 amp SW2 MOP VCON SWO SW2 Analog input External input for servo input select SW1 Analog input External input servo input select NE N N N FOR SERIAL I O Ir MEDIATEK MT1336 PRELIMINARY SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL NO DISCLOSUHE 18 MTK MEDIATEK MT1379 Progressive Scan DVD Player Combo Chip 8 2 MT1379 B Super Integration DVD player single chip Servo controller and data channel processing MPEG 1 MPEG 2 JPEG video decoding Dolby AC 3 DTS DVD Audio audio decoding Unified track buffer and A V decoding buffer Video processing for scaling and video quality enhancement OSD amp Sub picture decoding Builtin clock generator Builtin TV encoder Builtin progressive video output Video input port and audio SPDIF input port Speed Performance on Servo and Decoding DVD ROM up to 8XS CD ROM up to 24XS Built in a frequency programmable clock to uP and RSPC Decoder to optimize the performance over power B Channel Data Processor Provides interface with analog front end processor Analog data slicer for small jitter capability Built in high performance data PLL for chann el data demodulation EFM EFM data demodulation Enhanced channel data frame sync protection amp DVD ROM sector sync protection B Servo Control and Spindle Motor Control

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