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MPX200 Service Manual

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Contents

1. L CN e Stel CN gt lt a gt m F1 Bel el ee lt lt Z ud gt lt sol gt eo gt C O 2 lt gt 012 512 E pij wo 2125 010 2 3 e C119 e C118 R155 3 CLE Ri 54 8141 81401 E 8139 R138 m 8137 R136 144 R135 cios 8134 75 LR132 8131 R130 zi 5 2113 i ce FB3 95 299 gt 190 Ro RBS Raol a 58 R107 29 R88 5 20 R36 R83 R86 mas Bel 2 Rod R102 8122 79 77 8100 d E A de ko Ie E 299 t 5 gt 2 o E s 82 gt 43 Exit I BS By ERE 42 oo ion C Els EE a ac ec 482 5 Q ra Ss 3 D 50 256 5 i 2 D A DATA 5 O64F5 ESA 10vun m Es 888 R46 52 49 1 43 lt gt C42 20 El SHE l gt jolie Your Notes 8 28 SHEET 1 OF 1 oo 2 gt lt 2 olf Lr Lit lt z 3 3 EE Aa Olan O 6 9 9 9 9
2. Your Notes 8 6 29 91 0002 12 21 8 Joc 1335 62 6999 00826 Ar si 3114 I 00 82 6 MO 90 60991090 3009 371 00 82 6 ANvo aayoaho 1 dlGd S NIYIN N3HOS 0511 0 VIN 0091 9 _ 1OV31NOO ON 9 9 tonoHtyL 81 tonoHtyL SJHYdS 00 6 21 00 6 51 Wir Ar 00 22 21 00 04 11 HMM 00 601100 490 43d Q3SIA3H 00 21 01 00 2 1 01 Wir 00 21 01 00 7 01 M MO 00 Z00100 490 Yad AISIAFU 90 NOILdIYIS30 SNOISIASY 7 9 38 9 89 9 LNIGS X31 ATOM dS gr 100 5 9 9 VIS LMS 0 9 L 900 en We FE Z Z E vb zona 10 91 002 8 0 ONS TVCLOHAVA 891 4 09 8 H3002N3 6914 165 4 8 1003 oi dy 1003 leg HOLIMS HOLIMS YVCLOHAVA lt 11715 ds 9LIZZ 777 269 169 E SSAY aan sin 8 OLX gi ON ux 2 9683 9 zaz 1i 199 L9420 207 92 ar 8 383 NSO 0SHOO XUA Sc 042 8 v TVCLOHAVA Seger Er ILOO LNO 72 OLQO 0ND AN SES xT 82 153
3. 8T MON FT q IOHSH3HL THA 58471 AALAN NOSSHHdWOO TYNDIS Y TWNDIS 9T MON T f 58471 JALAN TAAA 0 2 v 88 20 1 82 6 1 Your Notes 8 22 N P C AWYN ATIA 00 82 6 MO 69971 090 P 0 8 5 SAVIdSIG LNANDHS gt 00 ST 8 HMA da has 50758 1804 mmal 0ELTO VW MaVd AVO uoo TXO ON LOVALNOO AJENAN 00 0T 00 2 01 WIL IO 00 z 0t 00 8z 6 2 M 00 826000 OG 270 ALAVA NOLLIINISIA ASH SNOISIAHU 702 b 6T 781 lt LT 9T ST 71 514 DIA LNVOIAINDIS LSVH I MON b ZT II Ter at 76 nos opr e nos ap 77 moa 51 LIDIA LNVO AINDIS 79 MON 75 MON 77 v t 0 MON NWO IOO 0 02 0 2 NNnTOD LV AZ EDAT Wc v La
4. SWHAING 40 I 41111 AHENAN NOISIASY WHHNON LAHHS 6997T 090 MOOTd IOWLNOO 4 NO LON HLIM SLNHNOdNOO L pO OMS eva PO CHSN SHOLVNOISHG AONAAAAAA LSVI 9 1 5 SSION3G XX XX S _ A SISSVHO T DOTUNV TULIDIA lt v A an SNOLIOVdVO ASIMAAHLO SS3TNO S SHOLSISSH GHLWVOIGNI SSTINN Z MOT T HWV 54015159 SS3TNO I SALON 007 0 00 2 0 WIL 00 z ot 00 82 6 i 00 8Z6000 OG HIANY 270 WEDIDSHO ALIVIA NOLIdINOSSQ ASH SNOISIAHU La v 89 La z 19 9 89 8 1 2 0 2 NWNTOO 0 02 NWO IOO NNWO IOO QASt NN 089 0 A 94 er TYOOHTL TO NN 089 0 A A a TYOOHTL 20 NN 089 0 A vu a vODHTL HAIUG 1858 TT DIA MON OS t 9 a vr r od tLCOHTL 00 0 5 WIOD EP sm mos et a 8 P La sa T vU T L LTOH L 027 0 WIOD
5. 88 21 12 ev X31 92 V X31 lee va py 20 89 X zy 0c xal jy Loe zw Xa oy Leet xa 1 OV X31 0 6 x31 00 81 2 00 91 21 War At 00 12 2 00 01 11 12 Fd 00 601100 MOQ Yad QISIAIN 00 27 01 00 21 01 War 00 24 01 00 0 00 200100 Yad q3SIA3y HInY S393H9 EE SNOISIA3y Your Notes 8 d J 13348 C 1 8 25 609 00 82 6 EGET VAS 3IAVN 37119 2 68991 090 00808 MO 55 3009 348 00 82 6 SEN gell SdVO SSVdA8 9 SHOLVINOAY 008H8 HMA 002XdW d8 NIVWINSHOS NAAVHO T Heo T819 31 av Sw oudav 06710 VIN quodqaq MAVd U 09 VAG SYHOLIOVdVO SSVAAG 1OVHINOO a N N 5 a 5 VA9 VAS 22 9 gel 521000 9 9 QNO Waal S06LIN 0 LNOA NIA NIA 3SVO Z00YNL NNAOL OJUNN A0L 9 659 AND ON 86809 SdL 1no NI 799 Lego ONE E 92 00 M 52 00 67155554 Ndn19z O goose 1 91100 VAG 9 9472 8210 2007 InoA NA max 418 8 aqN9 3SVO O0f62W1 ZOOPNI 099 00 SHCL 00 9 wi Ar 00 72 21 00 04 11 HMM 00 601100 490 Yad Q3SIA34 00 27 01 00 21 01 NT AOL NN
6. 303543405 LON 309 AINO 39N3433384 904 SI ONS YIBANN 1894 2 91 094 avi di 5 02 1 0 xog 12820 0 OVE 9 66960 0 9v8 3univualn SNOISIA3Y S 5 NOOIX31 Your Notes 8 34 Lexicon Inc 3 Oak Park Bedford MA 01730 1441 Tel 781 280 0300 Customer Service Fax 781 280 0499 Email Esupport lexicon com ww lexicon com Lexicon Part No 070 14827 Rev O Printed in U S A
7. 200 24 Bit Dual Channel Processor Dart lanual Product Name Service Manual Precautions Save these instructions for later use Follow all instructions and warnings marked on the unit Always use with the correct line voltage Refer to the manufacturers operating instructions for power requirements Be advised that different operating voltages may require the use of a different line cord and or attachment plug Do not install the unit in an unventilated rack or directly above heat producing equipment such as power amplifiers Observe the maximum ambient operating temperature listed in the product specification Slots and openings on the case are provided for ventilation to ensure reliable operation and prevent it from overheating these openings must not be blocked or covered Never push objects of any kind through any of the ventilation slots Never spill a liquid of any kind on the unit This product is equipped with a 3 wire grounding type plug This is a safety feature and should not be defeated Never attach audio power amplifier outputs directly to any of the units connectors To prevent shock or fire hazard do not expose the unit to rain or moisture or operate it where it will be exposed to water Do not attempt to operate the unit if it has been dropped damaged exposed to liquids or if it exhibits a distinct change in performance indicating the need for service This unit should only be opened
8. 9 121 R23J R22 526 R21J 7 R25 201 R24 c4 A 2 ey R19 817 R16 9 9 5 3 9 9 0000 5 2 R9 9 9 5 E 1 2 z Bs He e Ri 01 Your Notes 8 30 1135 z i awos 10 mr aanssl 21 25 JON 00 NOLLVONddV 85054881 A EP ee on OMQ ON azis d ar een mm S PON IVAONddv 18N3SSY svowew orm 95680 0 138 1 QNO SNYNL Z ASSY 834 SIYIM LSIML 13 S3ONVHTTOL SIHONI NI SNOISNINIO 031319395 3SIW33H10 5531 01 1 81291 3NVN 3113 0002 191 20 4 310H M TINVA 3015 NMOHS SV WOLIOS dOL SOld D x PT 989 1 0744 ONOT E AVO4 P ui ud 5014 9 1661 0488 11 M NOLINA SALON SENI 0 1 1 8 1 9 5014 26 10 6 9 dO SZ X 4246 INN 14043 118 NNO9 GNNOYD 310N 9601 1 6 3205 MS 8911 0460 ass BONA AY 9 61 71 600 WOE FHL 303533915 LON 309 393434394 804 SI ONILSM MIGNNN 1994 71 vy1 c0L T3NVd INOX S310H N33MI38 MJLNIO ONI SIHL NO 1NOMJ JO WOLLOS
9. Component replacement and internal adjustments must be made by qualified maintenance personnel Do not replace components conditions dangerous voltages may exist even with the power cable removed To avoid power and discharge circuits before touching them with power cable connected Under certain njuries always disconnect DO NOT SERVICE OR ADJUST ALONE Do not attempt internal service or adjustment unless another person capable of rendering first aid and resuscitation is present DO NOT SUBSTITUTE PARTS OR MODIFY INSTRUMENT Because of the danger of introducing additional hazards do not install substitute parts or perform any unauthorized modification to the instrument DANGEROUS PROCEDURE WARNINGS Warnings such as the example below precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed Dangerous voltages capable of causing death are pres ent in this instrument Use extreme caution when han dling testing and adjusting CAUTION inserted backwards will be destroyed Incorrect insertion of ICs is also likely to cause to the board SAFETY SUMMARY The following general safety precautions must be observed during all phases of operation service and repair of this instrument Failure to comply with these precautions or with specific warnings elsewhere inthese instructions violates safety standards o
10. l 66AV8 1001 294 906ENZ cole 10 17 lp 13539 934 DIANNA AOT 1 939 d 10 934 MON 397100 0 39001 6 19 T9914 00440 34081 1 34081 97459 t 9g c lt AN e ISSVdX8 1003 Se i 1003 sr HOLIMSLOOS GAS GAS GAS 48000 LLOHA L 390008 89 9 JIndNIIJIN ON Your Notes GS GL 0002 12 21 8 40 9 13348 65971 090 A38 C S 56 69971 00 82 6 aanss INVS NOM 00ZXdN NIVIW IN3HOS 00 81 8 alva 31111 LLOHAbL 06 10 VIN 9 S vin 3dVdS S 8A9VIVO 534 MO wi MO 00 51 21 00 SHCL wir Ar 00 01 11 00 20 NVI 00 7 01 00601100 490 Q3SIA38 00 00100 490 Q3SIA3H HA 8390340 NOILdldoS3q SNOISIA3H 210 90 130 98 7 12 934 Sr pae 0200 love Tad 1915 68 9 0 6 2 Uvie sgle eoe 0 82 SNOLL gt IWIL 55800 on ON ON T 2 30 159 nog BO Lv oly zaz Y 90 8 902 81 802 11 yq 9 vaz 9i ea 02 Si 702 r tv Du 5 0 002 1 22201 OV
11. san When the encoder knob is turned clockwise one position the front panel LEDs will be turned off and all of the LED segments on the 7 segment displays except for the rightmost decimal point will be lit to read 8 8 8 as shown below When the encoder knob is turned clockwise one position the 7 segment displays will read r11 to indicate the test is running and the Left Green LEVEL 30dB LED will be lit NOTE From this point on each of the front panel LEDs and LED segments on the 7 segment displays can be lit individually by turning the encoder knob clockwise one position at a time When the Load button is pressed and released will be placed in the leftmost 7 segment display to indicate that the test has been exited Exit Test 12 This selection will allow the user to exit the Extended Diagnostic Mode into normal operating mode When selected the Diagnostic LEDs will read the following Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED display EFFECTS Plate 5 12 Lexicon Pressing the Load button will execute the test Initialize Test 13 This selection will initialize all of the MPX 200 system parameters to their factory default settings Before the test is executed the following test code will be displayed on the Diagnostic LE
12. 200 MAIN BOARD ASSEMBLY PART NO 120 14142 200 12169 202 09794 202 09795 202 09873 202 09894 202 09897 202 09899 202 10466 202 10557 202 10558 202 10559 202 10569 202 10597 202 10892 202 11041 202 11071 202 11072 202 11073 202 11683 202 12836 202 14619 203 10424 203 10581 203 10583 203 10840 203 10894 203 10896 203 10991 203 11075 203 11079 203 11083 203 11723 203 11734 203 12167 203 12198 203 12199 203 12491 203 13918 240 00611 240 00614 240 06611 240 06886 240 09786 240 12330 240 12848 241 00654 244 00661 244 10423 244 10768 244 14616 DESCRIPTION ADHESIVE EPOXY THERM COND POT RTY 5K15AX2 7MMFL 14 15L RESSM RO 0 OHM 0805 RESSM RO 5 1 10W 2 2K OHM RESSM RO 5 1 10W 10K OHM RESSM RO 5 1 10W 1M OHM RESSM RO 5 1 10W 470 OHM RESSM RO 5 1 10W 47 OHM RESSM RO 5 1 10W 20K OHM RESSM RO 5 1 10W 4 7K OHM RESSM RO 5 1 10W 47K OHM RESSM RO 5 1 10W 100 OHM RESSM RO 5 1 10W 10 OHM RESSM RO 5 1 10W 180 OHM RESSM RO 5 1 10W 2K OHM RESSM RO 5 1 10W 680 OHM RESSM RO 5 1 4W 75 OHM RESSM RO 5 1 4W 220 OHM RESSM RO 5 1 4W 270 OHM RESSM RO 5 1 10W 5 1 OHM RESSM RO 5 1 10W 2 7K OHM RESSM RO 5 1 10W 18K OHM RESSM RO 1 1 10W 4 99K OHM RESSM RO 1 1 10W 3 32K OHM RESSM RO 1 1 10W 10 0K OHM RESSM RO 1 1 10W 750 OHM RESSM RO 1 1 10W 340 OHM RESSM RO 1 1 10W 1 00K OHM RESSM RO 1 1 10W 1 40K OHM RESSM RO 1 1 10W 95 3 OHM RESSM RO 1 1 10W 715 OHM RESSM RO 1 1 10W 49 9K
13. 5 14 Lexicon Service Notes Voltage Regulator CAUTION THE VOLTAGE REGULATOR 025 GETS VERY HOT Always use caution when testing the unit with the PCB removed from the chassis be sure to place heatsink HEATSINK TO220 75X 5X 5 H Lexicon 704 14132 or equivalent onto the voltage regulator at U25 to dissipate excess heat and protect it from reaching thermal shutdown 5 15 Lexicon Chapter 6 Theory of Operation Main Board Schematic Walkthrough Sheet 1 This sheet shows the analog input circuitry U1 U2 the analog output 06 and the output mute circuitry 07 Input Stage Separate unbalanced 74 phone jacks J1 J2 provide input for the left and right signals A single input source will be routed to both left and right input stages if the right channel J1 is the only one used These jacks provide AC coupled chassis ground connections through integrated ground lugs This AC coupling is provided via C26 and C45 These components effectively AC couple the analog ground plane to the chassis by way of the enclosure This scheme is used to minimize AC hum loops from forming at the inputs Capacitors C26 and C47 provide protection from high frequency interference from entering or exiting the 200 via the input cables DC Blocking is incorporated by capacitors C29 and C48 in series with the input signal paths The input impedance for each channel is set by R7 and R22 Right and Left channels
14. COMPRESSOR Threshold EFFECTS Echo Delay 6 __ __ ___ EFFECTS 8 5 ____ 5 Compressor _9 CD EFFECTS Plate 13 Initialize EFFECTS Pitch Detune 13 14 EFFECTS Chorus 141 15 Unused EFFECTS Ambience 15 EFFECTS LED 0 LED On 1 Note 1 These tests reside the POST Note 2 These tests require operator interaction and judgment and do not generate an error message Note 3 These tests require operator interaction and judgment and generate an error message The Extended Diagnostics are invoked by pressing and holding the Bypass button while powering on the unit then releasing the Bypass button once the Green LEVEL 30dB LEDs have lit After the Bypass button is released the segment displays as well as the Diagnostic LEDs will indicate the test number selected and the remaining LEDs will shut off For example when the Lexichip3 ADF Test 5 is selected using the Encoder the EFFECTS Echo Delay Diagnostic LEDs will be lit This is useful for debugging the unit should any of the 7 segment displays become inoperative When a test has been selected the Load button must be pressed to execute it The leftmost 7 segment display is used to indicate the following r indicates when the test is running P indicates when the test has passed F indicat
15. SP as t 70 t 8 Pr tL Lt a aaa Y 81 t 4 v 9 t L 8 LTOH L ZODPXO vO D 20 TD SdVO SSVdAd IP 9T 5 LG ST Zt t ta 1 6 oq 8 I om mou 9 wu s 70 Daa MON Y 1MON HOLIMS c 0MON HOLIMS QASt Your Notes 8 20 7 0 O00Z TT OT SAVN 5447 mar 804 Sram 06 70 MaVd AVO uoo TXO ON LOVALNOO AJENAN 00 01 00 2 01 WIL 00 z ot 00 8z 6 2 P EN 00 8Z6000 OG 220 ALAVA NOLLIINISIA ASH SNOISIAHU 0 NWN TOD 0 NWN TIOD NWNIOD 0 NWN TIOD 7 MON ONON Z MON 11148 ONON MON HOVOSVO 0 MON 44415 TENA DNILNOU a dSVW IH3 NOL3G HOLId SNAOHD HON TENT NOVLLV CTOHSAYHL TV8 TTAT 0 NWN TOD XIN LIGH AN ISG OHOS YIdSNVZHD HOSSHAANOD TIG SLONddH 10 02 0Z MON 61
16. 401 SI Z 989 1 02 ONOT E MVOA 5914 581 7 8 3noyOL 88971 059 TAN ALL X 0 4246 50 099 UN 91 6 X Or v 5 SET NI 1 4 300801 Y3009N3 104 G3llddns 93193435 ANY LAN Szn 5 MOVA OL Alddv 5014 2 26110 6990 6SZ10 001 GNNOdNOD MNISLVIH 09 9 INN 6761 1 OSS Sg1 NI 9 6 INOYOL 069 JONA 4345 OL MAO 5914 1520 0994 X 09 97 MNOS M3AO9 40 NOLLOG S310H 0104 53903 TIOH IN3A M3AOO JO Jovdns JASNI OL 333H0V 18991 2010 S310H M Y34090 IAILOFLONd 14101 20 31193104 2 1 004 J3AOJ u 581 9 9 Sold Z 21800 099 Pd 8 6 X Or MUOS put 9 v1 c074 SN11 9 S310H 40 3903 3903 9 1 2044 NOJJ WWE ZLO WOLLO 13 34015 NO 83 02 JO 32 4915 3015110 OL INNON 2 2 21191608 86680 07 am 08 41 ST3NVd 3015 HLOG 84 MOTE 9 581 9 3NOYOL TIVAS 69721 1 94 56060 05 Lt X Z dvL MMOS 434 glovi 089f AY My319 291 avo 11491 6208 ASSY 08 581 9 INDYOL 68601 17298 8 9 X dVl NOS 581 9 7 310501 aNvd JAS OL MAD 5914 Sg1 NI 2 5 3NOYOL 68601 1997 Sold SY3HSVM OMVOSIQ 8 2 X dvl MYOS 3NOHd v i 03114405 LAN Q 85660 0 581 8 9 300401 138 1 N S 44 O
17. Connect a balanced audio cable between the Low Distortion Oscillator and the MPX 200 Left Input Connect a balanced audio cable between the MPX 200 Left output and the Distortion Analyzer Set the Distortion Analyzer to measure VRMS Turn the Input Trim knob fully clockwise Je Analog In To Analog Out Audio Test 1 Apply a 1kHz sinewave signal to the MPX 200 Left Input 775 mVRMS 2 Measure the Left Output for a level between 2 273 and 1 781 VRMS 3 Switch the cables to the Right Input Output connections and repeat step 3 4 3 200 Service Manual Response These tests will verify the frequency response specifications of the Left and Right analog inputs to the Left and Right output signal paths of the MPX 200 Analog In Analog Out Frequency Response Test Disable all Filters on the Distortion Analyzer Apply a 1kHz sinewave signal to the MPX 200 Left Input 218 mVRMS Connect the Left Output to the Distortion Analyzer Set the Analyzer for OdB reference 1kHz Sweep the Oscillator from 20Hz to 20kHz and verify the level stays within 1 0dBr throughout the sweep 6 Switch the cables to the Right Input Output connections and repeat steps 4 and 5 Or po oes THD N Measurement These tests will verify the THD N specifications of the MPX 200 Left and Right input to output circuitry Analog In To Analog Out THD N Test Apply a 1kHz sinewave signal to the MPX 200 Left Input 21
18. MPX200 Component Layout Front Panel Board MPX200 080 14718 ASSY DWG CHASSIS MPX200 080 14719 ASSY DWG SHIPMENT MPX200 Lexicon 8 1 1 2 8 9 8 00826 AT qanssi B 699912090 EN 00 82 6 MO 3009 3215 00806 AALAN 0088 6 EEE 390 sisan 05 10 VIN quodqdag ON 69 391 104100 FINN 002 3900 0544022 39 1 800 4 9 8849 1997 90 Mn 530 LNO NId es MAIA 1033 OJUNN A0L VAS XELZOS HOLIMS ly zalz er 059 VAG LEM 1 100 e MILINOILNILOd ONOW O3UNN AOL OJENN A Y 1 0 d O USWYOISNVEL MAMOd 8308 SdVO SSVdA8 9 58017114084 2 _ 930 sen _z 1 8309 200 SSA 33A oOoudhWvuWOH _z 9405 LISIYRONTOMNOO z 840 4109 5 2 8406 24001 z 8402 e 8401 JILL NOISIAJY 133HS 0 19022 9 900 vu 6971 0908 340018 TOHINOO ININNDOG 9745 1 5 u ESOFOHrZ G3TIISNILON HLIM Gb VI SIN3NOdNOO NE O3MNI LA sen LL ZMS SI4NN AOL BYLY vga LLG PLLO a3Sn SJOLYN9IS3d
19. respectively Each channel has an input impedance of 1M when used in Stereo mode and a combined input impedance of 500 when used in Mono mode Right channel only This was incorporated as a concession to guitarists Due to this relatively high input impedance the unit is susceptible to noise pickup from radiating sources particularly if the input cables are routed near the power supply of the unit so care must be taken when routing cables into the unit J1 and J2 short the input paths to ground when no input cables are plugged in This prevents noise voltages from being generated by this high impedance D1 and D2 provide clamping protection of the input signal paths into U1 and U2 while R6 and R19 provide input current limiting to U1 and U2 The diodes ensure that the non inverting inputs of the op amps never see voltages more than 0 7V above or below the positive and negative supply rails One half of U1 and U2 are used as non inverting amplifier stages These first stage components provide a DC gain of 10 55dB The input and feedback circuitry comprised of R5 and C6 for the right channel and R21 R20 and C21 for the left channel form high pass filters shelving at 2 and 9kHz This is the standard 15 50uS pre emphasis curve C5 and C20 provide closed loop frequency compensation for the input buffer stages C2 and C17 remove DC offset from the buffer output stages so that wiper noise from the Level potentiometer R1 is eliminated
20. ven 39 30 uM 8Xyl99z N 9v rly ely Lv X 900 ev 902 02 V 6L 9 YOZ sv 682 m 200 202 FP V 107 Qu a 002 z OV 200462 SN06 gt SSIDOW SELLOHA L 9 9 tl 9c INS WV 68 9 Z 042 Z ic ____ 0072 96 67 sc 97 6747 ang 65 972 9 vwz 11 86 97 6 OL 0 2 NI WON 68 9 MOL 3i bee Eo x0L pris p 22 E A SIN WON eo SLY NOH oc 82 2172 vy LZ S c 0192 192 6 2 494 S v 9 9 2 9Svz 5 7 6 evz 0 vz 072 6LN Q kan 28 9 q O3MINZ SL leas 44 705017 E ON Yl 68 9 770 ON sed ON 02 SIVZ yv YYZ er 8172 ch VZ v Nas 934 sel ae 017 86 OLS 0 Ze 19139 572 LNZ S 9 2 ve LE QAS 272 08 Vz 67 LYZ 8 072 14 9 NOYd33 4015 YISN 089 viva Tvl33S 189 9 Yo nona 4 27 9 19 23 en x i e Vie 9 88 61 gr ON ELE 9892 oza vr 2 2 4 1979 A N 1819 184 LLOHA L vin 13534 082 IM 92
21. C111 and C110 reduce RFI C109 and R147 are provisions for AC or DC coupling the mechanical shell of J6 to chassis ground Currently this is DC coupled through R147 with C109 left unpopulated R150 and C112 provide a de coupled supply voltage to the MIDI cable via FB5 and pin 4 of 46 Footswitch The tip and ring of the footswitch 74 phone jack J8 connect to FOOT TAP and FOOT BYPASS respectively through current limiting resistors R168 and R170 Capacitors C123 and C124 filter out RFI D8 and 09 help protect from over voltage or static discharge Pull up resistors R169 and R171 default the non active switch state to logic high FOOT and FOOT BYPASS fed to 023 on the previous page which allows software to determine the footswitch state C119 C120 and R166 are provisions for AC or DC coupling the mechanical shell of J8 to chassis ground Currently this is DC coupled through R166 with C119 and C120 left unpopulated Power Up Reset The 10V_UNREG voltage controls reset signaling If the voltage at the input of the 5VD regulator U25 sheet 7 is high enough to create a 2 volt or greater drop across the regulator then the differential between the voltage divider R60 and R61 at the emitter of Q3 and the regulated 5VD at the base of Q3 will be enough to turn on Q3 As Q3 turns on it charges C66 through R62 and D3 The voltage across R63 and R62 goes from OV to about 6V The voltage divider formed by R62 and R63 presents a TTL com
22. C75 C78 C82 C87 C90 C92 C95 C99 C105 C107 C113 C115 and C117 are distributed evenly throughout the PCB and provide Digital Power de coupling C4 C14 C19 C33 and C55 are distributed evenly throughout the analog section of the PCB and provide power supply de coupling of the 5VA line C15 C18 C34 and C54 are distributed evenly throughout the analog section of the PCB and provide power supply de coupling of the 5VA line 10VUN and 10VUN 10VUN is derived from the half wave rectified voltage off of the transformer Q2 R56 R57 C58 and C60 form a capacitance multiplier The value of C60 is effectively multiplied by the HFE of Q2 thereby providing an ultra clean and stable ripple filter and a large reservoir for charge Q1 R54 R55 C57 and C59 provide filtering and reserve in a similar manner for the 10VUN supply 5VD U25 D11 and C131 provide a 5 Volt regulated supply for the entire digital domain in the system Current draw through this device is very close to the limit of U25 so a heatsink must always be in place on this device especially if the boards are powered up outside of the enclosure Otherwise U25 will quickly go into thermal shutdown 6 9 200 Service Manual 5VA This is filtered and ferrite bead isolated version of the 5VD supply The current demands on this are barely appreciable on U25 FB1 and C64 provide noise isolation and charge reserve for this rail which is used to po
23. If the Bypass button is pressed after a failure has occurred the MPX 200 will attempt to continue on with the next test of the POST sequence The MPX 200 will attempt to do this every time the Bypass button is pressed If the STORE button is pressed after a failure has occurred the MPX 200 will enter the Extended Diagnostics mode If the Tap Cancel button is pressed after a failure has occurred the MPX 200 will run the test continuously The following diagram shows an example of the Diagnostic LEDs Test Error code 4 This code indicates that the Lexichip3 INT Test 4 has failed LEVEL COMPRESSOR L R 1 Threshold indicates Lexichip3 INT test Indicates Error gt 1 1 0 3dB 0 0 0 10dB 0 Gate 0 0 0 20dB Echo Delay Legend 0 LED off 1 LED on NOTE During the POST the LEVEL LEDs display the pass fail status for tests 3 6 only Power On Test Descriptions ROM Test 1 The ROM checksum is a byte size value that is stored in the last location of each bank The test adds the contents of the entire ROM including the checksum byte The result should equal zero 8 bit value 5 2 Lexicon Before the test is executed the following test code will be displayed on the Diagnostic LEDs Diagnostic LED COMPRESSOR 20dB If a failure occurs the Red LEVEL Clip LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt continuously loop the test for troubleshooting purposes If the Bypass butto
24. Livm 15 ILNMZ LN INN D HS 1 ne F nz 4 vl yowsna vausnab ON viv ON OL ey ON 0 7 dz S 902 8v saz va 7 9v eaZ Sv 202 ev ca LoL az ev 6 002 Iv XK T 0v ZHNOL 01 9087 qAS Your Notes 1 2 8 S 9 L 8 N 8 309 J33hS 9 00 82 6 Ar aanss 66991090 00806 uu NK g Ines eq s sg v o el a la 30009 azis 00806 WYO o 2laz S edIHOIX31 00 81 8 00ZXdA qg NIVW I3HOS ya 08 10 VIN QAS 102 MOL MYO UOOIX9 ON 902 L AN rn LOVYELNOD 902 01 484 NOLLVYNDIANOO Z 88H zaz MOL 684 010 aZ Ol Seu 007 MOL 064 aAG sg 93427110 os gol _ avis 44 NONIS ge 8V 09357 Linoas oq 9 oq 7 gold 89 99vt 89 8 sas 7711192 102 88 5 1587 97 1882 891 80 9 LNIZ 0 aNg nz 018 69 W 80 6 N 89 4 YMZ 19 1042 99 29302 Maz ANI9SZS4 2 VOld says i 129342 7 du AAZ 9 VOld T BE e
25. OHM RESSM RO 1 1 10W 4 75K OHM RESSM RO 1 1 10W 4 32K OHM RESSM RO 1 1 10W 374 OHM RESSM RO 1 1 10W 2 15K OHM RESSM RO 1 1 10W 316 OHM RESSM RO 1 1 10W 205 OHM RESSM THIN 1 1 10W 4 02K OHM CAP ELEC 22uF 16V RAD CAP ELEC 47uF 16V 20 RAD CAP ELEC 1000uF 25V 20 RAD CAP ELEC 4 7uF 25V 20 AX CAP ELEC 100uF 25V RAD LOW ESR CAPSM ELEC 2 2uF 35V 20 CAP ELEC 3300uF 16V 20 RAD CAP TANT 22uF 16V RAD CAP MYL 047uF 5 RAD BOX CAP MYL 22uF 50V RAD 5 BOX CAP MYL 015uF 250V INTL 6SP CAP MYL 3300pF 100V RAD 5 BOX QTY 0 00 1 00 19 00 2 00 31 00 3 00 2 00 12 00 4 00 2 00 8 00 4 00 12 00 2 00 1 00 3 00 3 00 1 00 1 00 1 00 2 00 1 00 2 00 4 00 1 00 2 00 2 00 1 00 13 00 2 00 2 00 2 00 2 00 1 00 18 00 2 00 1 00 1 00 2 00 2 00 2 00 2 00 1 00 2 00 EFFECTIVE INACTIVE Lexicon REFERENCE U10 HEATSINK R1 R72 82 94 R96 98 102 105 108 R112 146 147 156 165 R166 172 173 R128 149 R65 67 73 74 76 R83 90 92 99 100 R113 121 142 145 R154 157 7 22 91 R54 56 R130 141 R12 13 27 28 168 170 R81 126 158 161 R169 171 R6 19 68 127 75 R69 71 77 80 93 95 R101 103 104 109 111 R55 57 R66 R59 79 129 R148 150 164 R163 R46 R162 R110 R37 41 R15 R48 49 62 R4 20 R10 11 25 26 R60 R51 52 R123 R124 125 R63 R8 9 14 23 24 30 32 R36 40 42 44 R3 18 R2 17 R50 53 R5 21 R34 35 38 39 R61 C2 7 9 10 12 17 22 C24 25 44 50 51 57 58 68 85 8
26. Signal REG SEL qualifies each chip select at a base address of 0x4C00 with the three address lines ZA 2 0 In other words whatever the binary value of ZA 2 0 if it is added to 0x4C00 the address decode for each chip select output may be derived 000 0400 STAT RD Sheet 6 This sheet shows the all the impedimenta necessary to implement DSP algorithms These are comprised of the Lexichip3 the Audio Memory and the clock oscillator Lexichip3 Configuration resistors R83 R90 set the operating mode of the Lexichip3 via the internal data bus ZD 7 0 when the RESET is released The resistors set this configuration constant as follows 7 6 5 42 R84 R88 28 10 R85 R90 0 00 00 Function CHIP TRST ZCLKSEL HADEC CHIP TRST The unidirectional output buffers are enabled for normal operation EXTMCX2 Source MCX2 8X XTAL Frequency from internal PLL EXTMC Generate MC Masterclock Internally ZCLKSEL Z80 ZCLK PLL Clock Divided by 10 ZCLK clock tree output HADEC Select Z80 Address Map 0 More details below ADDRESS MAP 0 0000 3FFF 16K Common ROM ZDECO 4000 4BFF Lexichip3 Internal Decodes 4C00 4FFF 1K Expansion Area ZDEC2 5000 5FFF 4K Common SRAM ZDEC1 note 6000 FFF 8K Bank Swapped SRAM 1 16 Banks 8KB 128KB ZDEC1 8000 FFFF 32K Bank Swapped ROM 1 16 Banks 32KB 512KB ZDECO If any chip on the Z80 data bus
27. X31 6 hz 0105 ON osiarexe H 81 8n N Z 1 LONON H P 9d 2 Y xz ONE L 9 22 989 6807 880 ccu 0 912 TVCLOHAVA 989 00 9 yV 9 1nO 4048 QAGt 9 9 88 9 9 7 19 91 S3LSVN NI 310d S Your Notes 8 8 29 91 0002 12 21 8 40 13348 v 689 00 82 6 43155 ML av SAoaddy 65971 090 A38 YIGNNN 13538 8 TOULNOI NIVW IN3HOS 08410 VIN ydVd AVO 09 IX9 ON 1OVHINOO 00 8 2 00 64 01 War At 00 22 2 00 01 11 MO HA 00 601100 HOG q3aSIA3y 00 1101 wir WYO 00 21 01 MO HM W3393H9 007200100 400 Yad Q3SIA33 99 3315 3 NOlldld9s30 SNOISIA3H Mbl 027 0919 9g gavel 40 133 9d 1NM3 3 YQ INMJ L1NH3 1443 6 La INMJ 8 0 INHJ Zr 1614 007 1 9 9 v AMOY HOLIMS JOMOM HOLIMS 2 60 95 001 Nan sz ead YO LOANNOD T3Nvd LNOMA 0 39 1 400 6019 man lt 88 9 Mbl Occ 06 0 104100 IAIN 9 9 88 5 98 6 113538 YOLVYANAS 13848 113838 y6 67 PLLOHAPL LLOHA L 5
28. c ev t Your Notes 8 24 00 11 0000 8 0 69971 090 0ELTO 00 01 WIC 00 0 MO 270 I 69951 00 82 6 FETU 930551 8114 00 82 6 270 00 ST 8 Nuwaa mar 8040 manm VW MaVd AVO TXO ON LOWaLNOO AJANAN SNO LLNG WHHOS 00 2 01 WWO 00 8276 HM NELAVNG NOIIdINOSSG ASH SNOISIAHU 00 826000 00 ddd CHONVHO T sa T 009Fx0 sssappe peoy 80 1 TMOY HOLIMS 0MON HOLIMS 624 58471 NOLIN 6 4 NNWO IOO Tra SSVdAH EMS A F 25 OF ALOSSHAAINOD CMS a IONT Uum 2 m T NWNIOD LICH IMS here OF avo l 9MS TI6NT um b ICM 7 t 0 NWN IOD sea THONVO dV HOSSHAANOD TAONVO SSVdAd 0 0105 0 02 L MON 0 2 NOnTOD LV C 0 1 p e La e ev 1 Your Notes 8 26 gt Bue
29. cable from the Right input 11 Enable the Low pass filters on the Analyzer 30kHz 20kHz 12 Verify the Noise level at the Right Output is lt 95dB A A qus 4 4 Lexicon Digital O Functionality This test will verify that the MPX 200 will pass an S PDIF signal through its input and output circuitry ie OO Connect Digital signal CD player DAT etc to the S PDIF input jack on the back of the MPX 200 Connect the S PDIF output for the MPX 200 to a D A converter ex MPX 500 for conversion back to an analog signal Connect the analog output of the D A converter to your amplifier with speaker output Be sure to turn the volume down on the amplifier Set the MPX 200 System Mode for digital Input Set the MPX 500 System Mode for digital Input Start playing your digital source Turn the volume up on your amplifier and verify you have audio and that it is clean and free of any audio defects or artifacts pops clicks static etc Listening Test 1 Connect the audio input cable from the output of the Distortion Oscillator to the Left input of the MPX 200 2 Connect the audio output cable from the Right output of the MPX 200 to the input of the Headphone amplifier 3 Set the Headphone Amplifier volume control to its lowest setting 4 the Oscillator for 220Hz sinewave at 50m Vrms 5 Power on the MPX 200 and turn the program knob to the 111 program Abyss 6 Press the Edit button and tu
30. display an r to indicate the test is running The pass fail status of the test is displayed on the 7 segment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light Switch Test 8 The Switch Test is essentially two tests in one The combination of the two tests provide a means for verifying the operation of the front panel Switches 6 and Footswitches 2 along with their associated LEDs at the same time Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number the 7 segment displays oem 57 Test Test Name Diagnostic LED n 8 Switch EFFECTS Compressor Pressing the Load button will execute the test Pressing and Releasing the Load button will exit the test Footswitches When the Left Footswitch labeled Ring is pressed the Left 30dB Headroom LED will be lit When the Left Footswitch is released the Left 30dB Headroom LED will go off When the Right Footswitch labeled Tip is pressed the Right 30dB Headroom LED will be lit When the Right Footswitch is released the Right 30dB Headroom LED will go off Front Panel Switches When the Edit button is pressed and held the Edit LED will be lit When the Edit button is released the Edit LED will be turned off When the Store button is pressed and held the Stor
31. observe that the Left 30dB headroom LED is lit 2 Release the Left footswitch and observe that the Left 30dB headroom LED has turned off 3 Press and hold the Right footswitch labeled and observe that the Right 30dB headroom LED is lit 4 Release the Right footswitch and observe that the Right 30dB headroom LED has turned off Front Panel Switches Press and hold the Edit button and observe that the Edit LED is lit Release the Edit button and observe that the Edit LED has turned off Press and hold the Store button and observe that the Store LED is lit Release the Store button and observe that the Store LED has turned off Press and hold the Tap Cancel button and observe that the Tap Cancel LED is lit Release the Tap Cancel button and observe that the Tap Cancel LED has turned off Press and hold the Bypass button and observe that the Bypass LED is lit Release the Bypass button and observe that the Bypass LED has turned off Press and hold the Compressor button and observe that the Compressor LED is lit 10 Release the Compressor button and observe that the Compressor LED has turned off 11 Press and hold the Load button and observe that the Load LED is lit 12 Release the Load button and observe that the Load LED has turned off 13 Observe that the segment display reads 8 ID DT Encoder Test 9 1 Turn the encoder knob clockwise until the 7 segment display reads 9 2 Press and Release the Lo
32. of U7 is brought to a logic low the output signals at pin 4 Left channel and pin 15 Right channel are internally switched to pins 5 and 2 respectively These pins in turn are tied to analog ground thereby providing a low impedance path to ground for the OUT_RIGHT and OUT_LEFT signals Approximately 43dB of attenuation is achieved when the switch is in mute mode A dual op amp U6 and its associated circuitry comprise the output circuitry Each stage is set to a fixed gain of 10 42dB by way of R50 R51 Right channel and R52 R53 Left channel R48 and R49 set the input impedance of the op amp circuitry to 10K C49 and C56 provide high frequency compensation for the op amps this keeps the amplifiers from breaking into spurious oscillation This dual op amp is powered by 10V unregulated supplies In reality because these supply voltages are unregulated the actual measured voltages are more akin to 12V and 15V This was done to afford the widest possible headroom for the output C52 and C53 provide de coupling for these supplies An output impedance of 75 ohms is developed by R59 and R79 for the right and left outputs respectively These provide output current limiting protection The unbalanced output jacks 43 and J4 are configured so that when only the right output is used J3 the left and right signals are summed together to provide a monophonic output The left jack J4 can support stereo headphones if J3 is unused The right c
33. of the matrix rows while U2 accesses the remaining five rows and the three columns The rows are connected to the LED cathodes while the columns are connected to the LED anodes R4 R6 provide current limiting to the bases of Q1 Q3 while R1 R3 ensure that the transistors will turn off when they become inactive The outputs of U4 are series terminated with resistors R20 R27 These provide limiting of the forward current through each LED The values were chosen to limit the current sinking demands of U4 The strobe for U4 is decoded from address 0 4 02 The following table illustrates the relationship between Data Bus and LED Column division is readily implied by the table layout as well Address 0x4C02 Write Only Active LED Cathodes LED ROWO 0 D23 DualStereo D21 Chors X DISP1 SegmentF LED ROW6 6 D29 EQ 05 MID DISP1 Segment LED ROW7 7 D35 Load Button LED DISP2 Segment F D28 Adjust U3 performs in exactly the same manner as U4 The series termination resistors are designated as R12 R19 The strobe for this register is decoded from address 0 4 03 As before the column division may be implied by the table layout Address 0x4C03 Write Onl 3 Active LED Cathodes Data Bus Bit COLUMN 0 LED ROWS 0 Dii CompressoEDIT DISP2 Segment G D19 Hall DISP2 Segment E DISP2 Segment D DISP2 Segment LED ROWi4 6 DiSPS SegmentF D Thr
34. the Variac to the proper voltage 5 Verify the AC current draw is lt 25 amps Normal Power Up During normal power on the MPX 200 will perform a series of diagnostic tests These diagnostic tests should take 10 seconds or less The diagnostic test sequence is displayed on the front panel LEDs prior to the execution of the test wherever possible for troubleshooting purposes If there is a failure the test number indication LED will remain lit indicating which test has failed and the Red LEVEL Clip LEDs will be lit indicating that a failure has occurred Displaying the Test Error code on the LEDs before the test is executed makes it possible to determine which test failed if the unit hangs or crashes during the test The following is a table of the test numbers the test names and the diagnostic indicator LEDs 1 ROM Checksum Compressor 20dB 2 SRAM Compressor 10dB 3 LEXICHIP3 WCS Compressor 3dB 4 LEXICHIP3 INT Compressor Threshold 5 EEPROM Effects Gate NOTE The ROM SRAM LEXICHIP3 and CPU must be working properly in order for the Diagnostic LEDs to operate correctly If the MPX 200 powers on without a diagnostic failure the 7 segment display will read 200 all of the front panel LEDs will light in sequence from left to right and the unit will enter normal operating mode Note When the tests are loaded a small r will appear in the display This indicates that the test is running When the tests are actua
35. the LEDs before each test is executed By displaying a test error code on the LEDs before the test is activated it will be easier to determine which test failed if the unit hangs or crashes during the Burn In loop The test numbers and names are also displayed on the 7 segment display along with the Pass fail status of each test 9 13 200 Service Manual Before test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED display EFFECTS Hall Pressing the Load button will execute the test The Burn In loop will continuously run the following diagnostics cer rm ap Test Test Name Diagnostic LED 1 __ COMPRESSOR 20 SRAM COMPRESSOR 10 COMPRESSOR 2 4 INT COMPRESSOR Threshold 5 EFFECTS Eko Dly F 6 EEPROM EFFECTS Gate 6 7 DRAM EFFECTS Chamber When the test is executed the 7 segment displays will indicate that the test is Running followed by the Pass fail status of the test If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light There are two options available when a test has failed during the Burn In loop 1 Press the Bypass button to continue the Burn in loop 2 Press the Tap Cancel button to run the failed test continuously
36. this format During power down the ADC digital filters and control registers are reset by signal PWR_DWN This is an active low signal and is provided by the Lexichip 3 The CODEC is brought out of power down mode when the clock signals LEX_256FS LEX_FS and LEX_64FS are stable It these clocks are present then the CODEC is placed back into power down mode R99 provides a weak pull down for PWR DWN During power down 0 the ADC DAC digital filters and control registers are reset Upon power PDN 1 the ADC initializes after a period of 516 fs The DAC initializes after a period of 512 fs The DAC uses advanced multi bit architecture and is configured to support the 125 format The DAC runs from a 256fs MC The Lexichip3 generates this Data is clocked in on the rising edge of the 64fs clock and is aligned with the second bit clock following the leading edge of each transition of the fs clock This alignment is determined by programming the Lexichip3 Serial Transmit Port SDOUTO to support 125 Digital de emphasis is hardwired for 44 1kHz support De emphasis may be turned on or off by toggling the DEMO pin either 1 De emphasis is off or a 0 De emphasis is on The XD9 port of the Lexichip3 is programmed to activate or de activate digital de emphasis C43 and C44 provide power supply de coupling of the analog supply line and voltage reference of the AK4528 while C38 de couples the digital supply line a
37. 30N3y3ajJ3y 15719 MOLOAS MSEWNN L33HS S310N3a XX XX S 9422 L SISSVHD T gt aS _ Rod 1387 Ino SJOLIOVAVO ISIMYIHLO SSTTNN 199 3NOHd 6 INV SYOLSIS3Y Q3LVOIONI ISIMYIHLO SSTTNN 2 OFUNN AOL TINO d O 1331 0 MOLL SHOLSISSY T31VOIONI 3SIMYJHLO SSIINN L SALON A VAS q 001 200 ly 99 y 4 Bie VAS SH 34022 0 9 L S00 SSA 33A 79 1 9 T 604 129 79 4 09 1 Boyz THOR NI 9 1 S0rOHr 0 9 1 900 t 9 8 1 06 22 1 VAS 089 8 94 629 1 SJ VdS 9105 I 1 VAS A 1 00290 ZS sc Vie 9 MO djis 34022 0 391 900 91 2 294 99 wor WY 00 82100 YO Yad LHS q3SIA33 Igaz _ w 1 00 22100 YO Yad 8 LHS aasIAay TM 34001 00 5 2 00 5 02 1 At u 002068 00 60100 aasIAay NO MO HMM 1 08 22 9 OO ZLIOL 0072 01 VAS wir im 0897 o f 614 9 7 00 OE 00 200100 aasIAay 891612 apsgol a NO HA 391 NIVO 29 630 1 833318 LNdNI 1431 VAS SNOISIA3y Your Notes 8 4 62 91 0002 12 21 8 40 13995 22609 00828 318 2 659 090 00826 AY J3gNnN 3009 azis 00 82 6
38. 4 SOIC ICSM DIGITAL 74HC157 SOIC ICSM DIGITAL 74VHCT138 SOIC ICSM DIGITAL 74VHCT14 SOIC ICSM LIN 4556 DUAL AMP SOIC ICSM LIN NJM4580 DUALOPAMP SOP ICSM LIN 7905 5V REG TO263 IC LINEAR LM2940C 5V REG TO220 ICSM LIN 3 3V REG LOPWR SOT23 ICSM RCVR AK4112 24B 96k VSOP ICSM SS SWITCH 74HC4053 SOIC ICSM SRAM 8KX8 80NS SOIC 50uA ICSM DRAM 1MX16 70NS SOJ ICSM EEPROM 24C32 32K SER SOIC ICSM FLASH 2M MPX200 V1 02 ICSM CODEC AK4528 24B 96k VSOP ICSM uPROC Z80 CMOS 10MHz QFP IC OPTO ISOLATOR 6N138 CRYSTALSM 11 2896MHz PAR HC49 FUSE 5X20MM SLO BLO 250A SW SL 2P2T 115 230V SEL PCRA SW RTY ENC 16POS 4BIT GRY 20MM XFORMER PCMT 115 230V 10V 1 9A CONN AC 3MC PCRA IEC 10A CONN DIN 5FC 180DEG PCRA SHLD 1 4 PH JACK PCRA 3C SW TR G FT 1 4 PH JACK PCRA 2C SW T G FT QTY 4 00 3 00 3 00 1 00 9 00 6 00 2 00 2 00 44 00 2 00 2 00 2 00 7 00 3 00 1 00 1 00 1 00 1 00 1 00 2 00 1 00 1 00 1 00 1 00 4 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 1 00 2 00 2 00 3 00 CONN RCA PCRA 1FCGX2V WH RED G 1 00 FUSE CLIP 20MM PC WSHR FL 4CLX1 40DX1 32 NYL SCRW 4 40X1 2 PHN PH ZN NUT 4 40 KEP ZN POPRVT 1 8X1 8 REG PROT HD SS WIRE 22G BLU 3 5 187QDC ST WIRE 22G BRN 3 5 187QDC ST WIRE 18G GRN YEL 7 6RING SS BRACKET KEYSTONE 633 140DX2 HEATSINK TO220 75X 5X 5 H 2 00 2 00 2 00 2 00 1 00 1 00 1 00 1 00 1 00 1 00 EFFECTIVE INACTIV
39. 4403 SOT23 ICSM DIGITAL 74HC04 SOIC ICSM DIGITAL 74HC273 SOIC LED T1 RED LITEON LED T1 GRN LITEON LED T1 YEL LITEON LED DSPLY 7SEG RED 1DIG 56 LED GRN RECT 197X 079 LED YEL RECT 197X 079 LED RED RECT 197X 079 SW PBM 1P1T 6MMSQ 250GF CABLE RIB 24 26AWG 16CX 1 2 L DESCRIPTION CHEM HEATSINK COMP SILICONE ADHESIVE SILICONE RTV CLEAR SW ROCKER 1P2T 6A 2250 VERTSLIM KNOB 69D 6MM FL BLK LINE BUTTON 24X 64 BLK W LT PIPE KNOB 85D 6MM FL BLK SPCR 4 40X1 1 4 1 4HEX NYL SPCR 141DX 250DX 375L AL SCRW 4 40X1 4 PNH PH BLK SCRW 4 40X3 8 PNH PH BLK SCRW 4 40X3 16 PNH PH NYL SCRW TAP AB 4X3 8 PNH PH BZ SCRW TAP AB 2X1 4 PNH PH BZ NUT 4 40 KEP ZN NUT 4 40 KEP ZN COVER MPX200 COVER PROTECTIVE PS 4 10X4 10 PANEL SIDE 1 71X5 42 ABS COVER PROT PS 4 1X4 1 W HOLES PANEL FRONT MPX200 PANEL SIDE 1 71X5 42 ABS HOLE LENS 8 45X1 10 MPX200 TAPE FOAM 032X 25X3 BLK TAPE FOAM 032X 25X3 BLK LABEL GROUND SYMBOL 0 5 DIA LABEL TUV CERTIFIED BAYERN LABEL S N CHASSIS PRINTED LABEL MFR ID 9X 25 SILVER DESCRIPTION CORD POWER IEC 10A 2M NA SVT CORD POWER IEC 6A 2M EURO CORD POWER IEC 5A 2M UK QTY 2 00 3 00 21 00 3 00 4 00 3 00 3 00 1 00 3 00 1 00 4 00 1 00 3 00 23 00 1 00 10 00 6 00 1 00 0 00 0 00 1 00 1 00 6 00 1 00 3 00 3 00 5 00 2 00 3 00 5 00 QTY 1 00 1 00 1 00 EFFECTIVE INACTIVE EFFECTIVE INACTIVE EFFECTIVE INACTIVE Lexicon REFERENCE PCB NE
40. 8 92 59 60 122 84 64 94 C39 C127 128 C66 131 C6 21 C29 48 C130 C30 37 7 1 200 Service Manual PART 245 00596 245 09291 245 09876 245 09895 245 10416 245 10544 245 10561 245 10562 245 10976 245 11625 245 11949 245 12485 270 06671 270 11545 300 10509 300 10563 300 11599 310 01007 310 01008 310 10510 310 10565 330 10523 330 11990 330 12452 330 12845 330 14244 330 14642 340 10877 340 11573 340 11576 340 13540 340 14643 345 14649 346 10508 350 10545 350 12637 350 14158 350 14748 355 12045 365 09883 375 02247 390 12361 440 14647 451 14648 452 14617 470 14727 510 07888 510 09790 510 11087 510 11548 510 13149 600 02227 630 14670 640 07899 643 01732 650 03970 675 09102 675 09103 675 14137 7101 14147 1704 14132 7 2 DESCRIPTION CAP CER 005uF 1 6KV Z5U CAPSM CER 470pF 50V COG 5 CAPSM CER 01uF 50V Z5U 20 CAPSM CER 10pF 50V COG 10 CAPSM CER 1000pF 50V COG 5 CAPSM CER 220pF 50V COG 5 CAPSM CER 100pF 50V COG 5 CAPSM CER 150pF 50V COG 10 CAPSM CER 47pF 50V COG 5 CAPSM CER 33pF 50V COG 5 CAPSM CER 1500pF 50V COG 5 CAPSM CER 1uF 25V 25U 20 FERRITE CHOKE 2 5 TURN FERRITESM CHIP 600 OHM 0805 DIODESM 1N914 SOT23 DIODESM DUAL SERIES GP SOT23 DIODESM GP 1N4002 MELF TRANSISTOR 2N3904 TRANSISTOR 2N3906 TRANSISTORSM 2N3904 SOT23 TRANSISTORSM 2N3906 SOT23 ICSM DIGITAL 74HCU04 SOIC ICSM LEXICHIP3B 100PIN PQFP ICSM DIGITAL 74VHCT24
41. 8 mVRMS Connect the Left Output to the Distortion Analyzer Set the Distortion Analyzer to measure THD Enable the Low pass filters on the Analyzer 30kHz 20kHz Verify the Left output THD Noise level on the Analyzer is 0 0596 Switch the cables to the Right Input Output connections and repeat step 5 DZ Crosstalk Test Analog In To Analog Out Crosstalk Test Apply a 1kHz sinewave signal to the MPX 200 Left Input 218 mVRMS Connect the Right Output to the Distortion Analyzer Enable the Low pass filters on the Analyzer 30kHz 20kHz Sweep the Oscillator from 20Hz to 20kHz and verify the level stays lt 55dB through out the sweep Switch the Input cable to the Right side and the Output cable to the Left and repeat step 4 S AR g Dynamic Range Test These tests will verify the Dynamic Range specifications of the MPX 200 Left and Right input to output circuitry Analog In To Analog Out Dynamic Range Test Apply a 1kHz sinewave signal to the MPX 200 Left Input 2 45VRMS Connect the Left Output to the Distortion Analyzer Set the Distortion Analyzer for a 0dB reference Remove the Input cable from the Left input Enable the Low pass filters on the Analyzer 30kHz 20kHz Verify the Noise level at the Left Output is lt 95dB Connect the 1kHz sinewave signal to the Right Input of the MPX 200 Move the Left Output cable to the Right Output Set the Distortion Analyzer for a 0dB reference 10 Remove the Input
42. 93000 0089 9 ga NIVW W3HOS zul 30 SWAONdA 08 10 VIN MAVd 0091 9 _ 12 1 00 6 21 00 6 51 Wir Ar 00 22 21 00 04 11 HMM 00 601100 490 43d Q3SIA3H 00 21 01 00 2 1 01 Wir 00 21 01 00 7 01 M MO 00 Z00100 490 Yad AISIAFU 90 NOILdIYIS30 SNOISIASY 88 9 88 1 88 1 viva LHO LAO 1441 110 Viva 9 0 F 859 070 44 c ZN Sn 050 0108 1555 4199 EN NSO oz m ATOM 23 UNIV 4LNOV UNIV 1LNOV 1 5 EI LA VAS ATINA 974 gt 91 22 sen HIT VAS 9 1 A XOL 664 S4r9 64 84986 O O e e L 91 6 ope 69 64 gq 3300 440081 Wo 019 3025 L Ove 992 NMG sma lt 82 9 mana 41809 ag ys Bas vor 880900 viva wa lt 189 9 81082 188 9 91 2 Ae 80 0 19 91 2 3400 604 14006 ee rO 1149 AOZ M0c 164 80H VAS SZIV MSL 19 420 via eee svig 9 8
43. AOL 00 24 01 00 v 0L NO 00 00100 Yad q3SIA3y HInY 83903H0 SNOISIA3H Your Notes 9 1 8 iss 00806 EET e 6597090 00806 MO o Aga Yann 3009 azis 00826 VO YAWYOASNVYL 0088 mysa 002XdW d8 NIVAW3HOS 31111 0 210 VIN MVO U OO ON LOVYLNOO YAWYOASNVYL OF 89 2 Oz 0 2 4 JONVHO 8 39VI 10A S 9 e e 11 Y30NN 0014 3409 9 0 x 2914 09z 910 0815 0 39 1500 6210 ov Lo 3NOLSA3y NOISNYLX3 LNOYW HOLIMS 93MOd valnaN N LNO Un O annosa sf 6 ur Nu OO INTA wir WVO LO S L ae HMM V 00 22Z100 490 Y3d 03SIATY 00 6 51 00 5 51 wir Ar 00 22 21 00 04 11 MO HMM 00 601100 490 43d Q3SIA3H 00 21 01 00 21 01 sr wo 00 21 01 00 7 01 5 MO 007200100 490 Yad GASIASY MILJVUG NOILdIYIS30 SNOISIA33 8 9 8 Your Notes OT 000Z 8T OT SAVN g 00 82 6 WYO SWHHAINHG NNATIOD MOY I 00 ST 8 HMA SILIL smaa 06 70 WW en TXO ON 69971 090 LOVALNOD vODHTL Suuvds ror SAVIdSIG LNHWO3S 5 AN y dO
44. AR FUSE REFERENCE R28 29 R1 3 R7 27 R4 6 1 4 039 41 01 3 U1 U2 4 D37 D35 36 38 43 D42 DISP1 3 D2 3 5 6 12 30 07 D1 4 8 11 31 34 SW1 6 J1 REFERENCE REGULATOR 025 SIDE PANELS MAIN BD TO FP SPCRS TO COVER 3 COVER TO FP 2 AC CONN COVER 1 REGULATOR 1 SPCRS TO MAIN BD COVER TO SIDES 4 RCA CONN 1 DIN CONN KEYSTONE TO FP 1 TO FP 3 1 REGULATOR U25 1 INSIDE TOP COVER LEFT SIDE PANEL COVER BOTTOM RIGHT SIDE PANEL FRONT PANEL RIGHT SIDE PANEL INSIDE FP NEAR PWRSW OUTSIDE BOTTOM COVER REAR COVER REAR COVER REFERENCE 7 3 200 Service Manual PART 680 10094 680 10095 680 10096 680 10097 680 10098 DESCRIPTION CORD POWER IEC 6A 2M ITAL Y CORD POWER IEC 6A 2M SWISS CORD POWER IEC 6A 2M AUSTRALIA CORD POWER IEC 6A 2M JAPAN CORD POWER IEC 6A 2M UNIVERSAL MPX200 SHIPPING MATERIALS PART NO 070 14692 070 14738 7130 14181 1730 14720 1750 14739 7 4 DESCRIPTION GUIDE USER ERRATA MPX200 GUIDE USER MPX200 INSERT FOAM ENDCAP 1UX5 5 BOX 22X8X4 DSPLY MPX200 CD LIT MULTI LANG MPX200 QTY 1 00 1 00 1 00 1 00 QTY 1 00 1 00 1 00 1 00 EFFECTIVE INACTIVE EFFECTIVE INACTIVE 03 27 01 REFERENCE REFERENCE Chapter 8 Schematics and Drawings Schematics 060 14659 SCHEM MAIN BD MPX200 060 14669 SCHEM FP BD MPX200 Drawings Component Layout Main Board
45. Ds along with the test number on the 7 segment displays Test Test Diagnostic LED display EFFECTS Pitch Detune Pressing the Load button will execute the test When the test is executed the 7 segment displays will display rSt to indicate that EEPROM is being initialized Once the EEPROM has been initialized the unit will reset and perform the POST Unused 14 This is not an actual test When executed the 7 segment displays will indicate d14 Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED display EFFECTS Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously Unused 15 This is not an actual test When executed the 7 segment display will indicate 419 Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED display EFFECTS Ambience Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously Burn In Tests 16 During the execution of the Diagnostics in the Burn In loop the appropriate test code will be displayed on the Diagnostic LEDs BYPASS STORE and TAP This code will be sent to
46. E REFERENCE C11 C31 32 35 36 C67 100 103 C1 16 74 C116 C26 45 61 71 5 8 20 23 49 56 110 112 28 47 63 73 123 124 102 104 C76 77 C41 42 C3 4 13 15 18 19 33 C34 38 40 43 52 55 65 69 70 75 78 82 86 87 89 91 93 95 99 101 105 107 113 115 117 FB1 3 FB4 5 D4 7 D1 3 5 6 8 9 D10 12 J9 AC CONN BOTTOM OF PCB J9 AC CONN BOTTOM OF PCB J9 AC CONN KEY1 J10 J11 AC CONN TO FP KEY1 U10 PART 740 11287 740 14690 DESCRIPTION LABEL S N PCB PRINTED LABEL FUSE CAUTION 250MA 250V QTY 1 00 1 00 EFFECTIVE INACTIVE 03 07 01 MPX200 FRONT PANEL BOARD ASSEMBLY PART NO 202 09795 202 09871 202 10891 202 11041 245 12485 300 10509 310 10422 330 10522 330 10536 430 07325 430 07326 430 14638 430 14644 430 14673 430 14674 430 14675 453 12166 680 14618 MPX200 MECHANICAL ASSEMBLY QTY PART NO 100 01759 120 02023 454 11095 550 11929 550 11931 550 14168 630 14688 635 12831 640 02377 640 02812 640 14115 641 10989 641 12759 643 01732 643 01732 1700 14724 1702 14177 7102 14640 7102 14687 7102 14733 1702 14744 1703 14736 7120 14686 7120 14686 1740 08556 1740 08558 1740 09538 1740 13573 MPX200 POWER CORD OPTIONS PART NO 680 09149 680 08830 680 10093 DESCRIPTION RESSM RO 5 1 10W 2 2K OHM RESSM RO 5 1 10W 1K OHM RESSM RO 5 1 10W 270 OHM RESSM RO 5 1 10W 680 OHM CAPSM CER 1uF 25V 25U 20 DIODESM 1N914 SOT23 TRANSISTORSM 2N
47. L MAD Sod 2 LIETO Or9 l X 0 MYOS 10 0Z Z HM 00 912010 093 834 3441 4 t0 02 2 Mr 10 02 2 23 09 Fr MIN 5 4245 00 10 02 2 m 00 2120100 003 Mid SINIM MS IO SHMz NV ISIL 1371 006 SNOISIA3U 2 5 9 L 8 54961 07 138 1 01 Yan NOOIX3I lt Your Notes 8 32 2 9 9 E 61 1 080 DL C U U U US No aasn ASSV van OOZXdW ININAIHS 00 6 2 3 3 ONG 557 227017 O 6L 1 UY S39NVN3101 S3HONI SNOISNZAIO 0002 030345 3SWa3hl0 SSTINA 43jqIAoyd 32 45 NI 4 14 QN3 NO 138V1 01 39V1d dyl Yv310 dvd 35079 54 14 395 TIVAS 0104 0403 YIMOd 3gAnN 404 NOG 335 ONG JHL 0402 43MOd 3lvldd0yddy 3519 J3SNI AVO4 AHL LSNNOV XO8 OINI dylid 034025 318000 0104 XO8 OLNI LINN 5 AdVL HUM 54 14 YVINONVIOJY LHONYLS 40 QN3 dN 0104 NMOHS SV 031935 30 SQN3 NO SINASNI 9 UNA 30 WOLLOS JHL NO 34V 3441 9NIyno3S 535 349 TW OS 9v8 3S 0104 OVE NI 901 OVE JANLVYILT HLM Ind Ov8 0104 35V3O3Vd NOLVINANNOOA s3ovid 2 15347 30 30 30035 15 404 1811 0608 OL 3433 OVE NI 00 lnd IM3SNI AVOJ B0 r1 220 IVIYILVA 10
48. LTLVL dBF 102 50 96 94 120 00 44 1kHz 5 Left Right Bal Gnd Sample Test Input Input Freq Imp Unbal Float Level Reading Upper Lower Filter Imp Band Rate PAGAN wersp os 9 way ss 982 740 TCR para james oo or 10500 ome 9 raros Right Bal Gnd Sample Test Input Input Freq Imp Float Level Reading Upper Lower Filter Imp Band Rate 97 2 Unbal i a i had 100 10 500 44 1kHz 100 10 500 44 1kHz 25 Unbal AMPL dBr 38 00 30 00 50 00 Lexicon Chapter 5 Troubleshooting Check the Lexicon web site for the latest software and information tto www lexicon com The Lexicon Studio downloads page The Lexicon Support Knowledgebase ttp www lexicon com kbase index asp Diagnostics Introduction This section contains the complete diagnostics descriptions for the Lexicon MPX 200 product Diagnostics Test Descriptions There are two categories of diagnostics that exist in the MPX 200 software Power On Self Tests POST and Extended Diagnostics The POST are executed automatically when the system is first powered up The Extended Diagnostics are invoked by pressing and holding the front panel BYPASS button while powering on the unit The Extended Diagnostics are used to perform functional tests that are not performed dur
49. R1 is a dual ganged pot The mechanical frame of R1 ties into the analog ground plane on the PCB via R16 and makes contact with the front panel R16 is currently not installed on the PCB therefore direct connection of analog ground and earth ground is not implemented The wipers of R1 connect directly to the non inverting inputs of the second half of devices U1 and U2 These are simple DC gain stages The gain of each stage is 21 97dB set by R2 R3 for the right channel and R17 R18 for the left channel Feedback capacitors C1 and C16 provide frequency compensation The outputs of these stages provide input to the CODEC circuitry on the next page These are signals IN LEFT and RIGHT 6 1 200 Service Manual Output Stage and Muting The output of the CODEC circuitry re enters this page as signals OUT LEFT and OUT RIGHT Provisions are made for an additional low pass filter of these signals by installing capacitors in locations R45 and R33 additionally the CODEC signal may be attenuated or padded by installing resistors in these locations but these have not been implemented in the design R33 and R45 are left as uninstalled locations C50 and C51 provide AC coupling of the OUT RIGHT and OUT LEFT signals The AC side of these capacitors are connected to two analog switches comprised of two sections of device U7 These switches provide output muting during power up and power down conditions When the MUTE signal at pins 9 and 10
50. WCS COMPRESSOR 3dB LEXICHIP3 INT COMPRESSOR Threshold 6 EEPROM EFFECTS Gate Table 2 1 747 2 SRAM COMPRESSOR 10dB 4 1 2 3 4 5 1 200 Service Manual NOTE The SRAM LEXICHIP3 and CPU must be working properly order for the Diagnostic LEDs to operate correctly Upon completion of the POST the 7 segment displays will display 200 all of the front panel LEDs will light sequence from left to right then the unit will enter normal operating mode If a POST fails the appropriate Diagnostic LED will remain lit indicating which test has failed and the Red LEVEL Clip LEDs are indicating a failure has occurred If a failure has occurred the unit should be repaired before proceeding Refer to the MPX 200 Service Manual Lexicon P N 070 14827 for more information Pass Fail Status The front panel LEVEL LEDs are used to indicate the pass fail status of the POST as follows The Green LEVEL Clip LEDs are lit to indicate when the test has Passed The Red LEVEL Clip LEDs are lit to indicate when the test has Failed Diagnostic Failures When a failure is encountered during the test sequence The test code is displayed on the Diagnostic LEDs Refer to Table 1 The Red LEVEL Clip LEDs are turned on to indicate a failure has occurred The unit stops executing the POST sequence The audio outputs are muted and the unit will not become operational
51. ad button to execute the test 3 Observe that the 7 segment display reads r 9 4 Turn the encoder one revolution in a clockwise direction one position at time The display should indicate the current position of the encoder from 0 15 5 When the test is complete the display will read 9 MIDI Test 10 1 Turn the encoder knob clockwise until the 7 segment display reads 10 2 Press and release the Load button to execute the test 3 Observe that the display reads P10 4 2 Lexicon LED Test 11 1 Turn the encoder knob clockwise until the 7 segment display reads 11 2 Press and release the Load button to execute the test 3 Observe that all of the front panel s LEDs are lit and that the segments the displays are all off 4 Observe that the colors of the LEDs are correct as shown below 1 LEVEL COMPRESSOR EFFECTS ROUTING DUAL EDIT L R YEL Threshold RED Compressor GRN Plate GRN Hall GRN GRN Mix RED Ratio Load Compressor Edit RED RED Clip RED 3dB GRN Chamber GRN Room GRN Ambience Adjust RED Threshold GRN YEL GRN 1248 108 GRN Gate GRN Flange GRNChous GRN EX GRNEQ REDAW 1 GRN j GRN ORM PORN CORN GRN Echo Delay GRN Rotry Trmio GRN Pit
52. by qualified service personnel Removing covers will expose you to hazardous voltages This triangle which appears your component alerts you to the presence of uninsulated dangerous voltage inside the enclosure voltage that may be sufficient to constitute a risk of shock CAUTION RISK OF ELECTRIC SHOCK DO NOT OPEN This triangle which appears your component alerts you to important operating and maintenance Instructions in this accompanying literature Notice This equipment generates and uses radio frequency energy and if not installed and used properly that is in strict accordance with the manufacturer s instructions may cause interference to radio and television reception It has been type tested and found to comply with the limits for a Class B computing device in accordance with the specifications of Part 15 of FCC Rules which are designated to provide reasonable protection against such interference in a residential installation However there is no guarantee that interference will not occur in a particular installation If this equipment does cause interference to radio or television reception which can be determined by turning the equipment OFF and ON the user is encouraged to try to correct the interference by one or more of the following measures Reorient the receiving antenna Relocate the computer with respect to the receiver Move the computer away from the receiver Plug the computer into a different o
53. ch Detune GRN s GRN Lv Bal RED Release i Edit Store Tap Cancel Turn the encoder knob clockwise one position Verify that all of the front panel s LEDs turn off and that the display will read all 8 8 8 as shown below NOTE All of the segments on the 7 segment displays should be except the rightmost decimal point 7 Turnthe clockwise one position 8 The display should read r11 and the Left Green LEVEL 30dB LED should be lit 9 Turning the encoder knob clockwise one position at a time observe that that each of the remaining front panel s LEDs well as the segments on the 7 segment displays can lit individually 10 Press and release the Load button to exit the test 11 The display will momentarily read 411 then display 12 og EXIT Test 12 1 Press and release the Load button to execute the test 2 The displays should read 1 and jump into normal operating mode Set power switch to the OFF position to power off the MPX 200 4 Disconnect all cables from the rear panel of the MPX 200 VO Test These tests will verify the audio performance of the MPX 200 s audio input and output circuitry Setup 1 Turn on the MPX 200 and wait for the Power On Diagnostics cycle to finish 2 Turn the Program Select Knob to Program 1 3 Press the Bypass button on the front panel and verify that the Bypass button LED lights and the display flashes bYP
54. clean solder Magnification glasses and lamps SMT Soldering Desoldering bench top repair station Test Equipment The following is a minimum suggested equipment list required for performing the proof of performance tests Amplifier with speakers or headphones Headphones Cables dependent on your signal source e Audio Input Cable balanced with shield and a XLR or plug on one end and an appropriate connector on the opposite end for connection to the Low Distortion Oscillator e Audio Output Cable balanced with shield and a plug on one end and an appropriate connector on the opposite end for connection to the Distortion Analyzer Midi cable e inch phone cable T R S Double Footswitch with 15 foot 1 4 phone plug cable configured for tip ring and sleeve Lexicon P N 750 09277 or equivalent Low Distortion Oscillator with single ended or balanced output lt 100 ohms output impedance lt 005 THD Analog Distortion Analyzer and level meter with single ended or balanced input and 20kHz or 30kHz Lo Pass Filter 100 MHz oscilloscope Digital distortion analyzer amp digital function generator e g Stanford Research Systems Model DS360 or Audio Precision System 1 with DSP Option System 2 Digital signal source CD player DAT etc D A converter ex MPX 500 Lexicon Chapter 2 General Information Periodic Maintenance Under normal conditions the MPX 200 system requires min
55. e LED will be lit When the Store button is released the Store LED will be turned off When the Tap Cancel button is pressed and held the Tap Cancel LED will be lit When the Tap Cancel button is released the Tap Cancel LED will be turned off When the Bypass button is pressed and held the Bypass LED will be lit When the Bypass button is released the Bypass LED will be turned off When the Compressor button is pressed and held the Compressor LED will be lit When the Compressor button is released the Compressor LED will be turned off When the Load button is pressed and held the Load LED will be lit When the Load button is released a will be placed in the leftmost 7 segment display to indicate that the test has been exited Encoder Test 9 During the Encoder test the Z80 microprocessor reads the value of the encoder and then expects the next value read from the encoder when the encoder position is moved will be at a predetermined incremental 5 10 Lexicon value Therefore during the test the encoder must be rotated in a clockwise direction as it s being tested or the test will fail Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Diagnostic LED display 9 __ EFFECTS Rotry Trmlo 9 __ Pressing the Load will execute the test When the test is execut
56. ed the leftmost 7 segment display will display r to indicate the test is running and the rightmost digit of the 7 segment displays will indicate the value of the 5 current position The values range from 0 15 MIDI Test 10 This test will verify that the MIDI Input and MIDI Output Thru circuits are working The test will transmit data out of the MIDI OUT jack and will attempt to read the data through the MIDI IN jack To run this test a 5 Pin Male DIN to 5 Pin Male DIN Cable also known as a MIDI cable must be connected between the MIDI IN jack and the MIDI OUT jack Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Diagnostic LED display MIDI EFFECTS Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously When the test is executed the leftmost 7 segment display will display an r to indicate the test is running The pass fail status of the test is displayed on the 7 segment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light LED Test 11 This test will verify that the LEDs and LED driver circuits are working The test has essentially three sections whic
57. erroneously drives the data bus during RESET the Lexichip3 will come up in the wrong mode and the 280 will not function properly Therefore during RESET all the relevant chip 6 8 Lexicon enables must be pulled high and the 280 must be fed clocks to allow the resistors to work as designed Proper initialization of the system is dependent on the static state of the data bus on power up The PLL TEST Pins are diode clamped by D4 to RESET This ensures that PLL is held in an inactive state until the reset cycle ends R68 R76 and C67 form a reference network for the PLL R73 and R74 provide weak pull ups for SP_MASTER and SPDIF_OUT respectively R92 and R100 provide weak pull downs for MUTE and respectively These pull down components ensure that these signals default to their active states during power up Resistors R69 R70 R71 and R77 provide RFI protection by slowing down the edge rates of LEX_FS D A_DATA LEX_64FS and LEX_256FS respectively R72 is a provision for further RFI protection Currently all that is required is for this component to be a 0 resistor R75 provides a DC coupled power source to the internal PLL on the Lexichip3 C68 and C69 de couple this supply line Audio Memory The audio memory for the Lexichip3 is provided by 1Mx16 DRAM U17 However the MPX200 only uses 8 of the available 16 data bits with the most significant byte pulled up by R114 R121 Effectively this DRAM is being used a
58. es when the test has failed d indicates when the test is done NOTE For tests that require operator interaction and judgment the 7 segment displays will not indicate when tests are running or the pass fail status of the test For these tests a is placed in leftmost 7 segment display to indicate when the tests has been exited and the test is done The Diagnostic LEDs are also used to indicate the test pass fail status as follows 5 5 200 Service Manual The Green LEVEL Clip LEDs are to indicate when the test has Passed The Red LEVEL Clip LEDs are lit to indicate when the test has Failed The following tests can be run continuously by pressing the Tap Cancel button instead of the Load button EF Test Test Name Diagnostic LED 1 Checksum COMPRESSOR 20dB 2 SRAM COMPRESSOR 10dB Zn COMPRESSOR 3dB COMPRESSOR Threshold MEE 6 6 EEPROM EFFECTS Gate 8 Switch EFFECTS Compressor 8 9 Encoder EFFECTS Rotry Trmlo 9 When a test is run continuously a Pass fail status will be displayed and updated on the front panel LEVEL LEDs and the 7 segment displays each time the test is run Extended Diagnostic Test Desriptions ROM Test 1 This is the same test that resides in the POST It was included in the Extended Diagnostics for troubleshooting purposes The ROM checksum is a byte size value that is stored in
59. eshod D31 Rato 02 follows the same model 03 and U4 for FRNT D 4 0 The series limiting resistors are designated as R R11 The address decode for this strobe is 0 4 04 Address 0x4C04 Write Onl ______ ActivelED LED_ROW16 0 DISP3 SegmentE D LCip Dp37 CcompressorButton D1 LED_ROW17 DISP3 Segment D D3 L_Signal 200 Service Manual LED_ROW18 DISP3 Segment 242 Bypass Button LED LED ROW19 DISP3 Segment B D9 10dB 3 LED ROW20 DISP3 Segment A D10 20dB U2 data bits D 7 5 are active high and they activate the three columns the columns are connected to the LED anodes so the column signals are by necessity active high As can be surmised a write must be done to this address whenever the software tries to turn on any LEDs at all The data that is latched into this register for these data bits are inverted by three of the gates inside U1 The resultant inverted bits are then used to activate three transistors Q1 Q3 that provide enough current to light the LEDs in each column Since these transistors are PNP types a second inversion takes place It could be thought of as writing a logic 1 to any of these three bits and they are current boosted to drive the LED anodes These bits are continuously written by software in a cyclical fashion no more than one of these bits is active at any given time The next table illustrates the column arrangement as it pertai
60. f design manufacture and intended use of the instrument Lexicon assumes no liability for the customer s failure to comply with these requirements General detin in manuals SAFETY SYMBOLS tions of safety symbols used equipment Instruction manual symbol the product willbe marked with this symbol when itis necessary for the user to refer to the instruction manual in order to protect against damage to the instrument indicates dangerous voltage Terminals fed from the interior by voltage exceed ing 1000 volts must be so marked The WARNING sign denotes a hazard it calls attention to a procedure practice condition or the like which if not correctly performed or adhered to could result in injury or death to personnel The CAUTION sign denotes a hazard H calls attention to an operating procedure practice condition orthe like which if not correctly performed or adhered to could result in damage to or destruction of part or all of the product The NOTE sign denotes important infor mation It calls attention to procedure practice condition or the like which is essential to highlight NOTE Electrostatic Discharge ESD Precautions The following practices minimize possible damage to ICs resulting from electrostatic disc arge or improper inser tion Keep parts in original containers until ready for use Avoid having plastic vinyl or
61. g g 4 du 9 Old SU WOH NISJZIS LL n OQ 8014 01 Vx 189700 67801 oras 99 9 dw 0 482 010d 04 ovis er 8 c dWoav ous 10302 68 6 WOW 05 29442 LNIGS 2 8019 226 8 98254 1346 1 8014 ASI 11082164 dNOGY 3128 0 8014 gv sl leaa VIVO VINIS 0 GLIVZ 84982 X31 88 21 ere _ 110795 03196 REFER vo e ege WVz LNOLSL 010006 VIT Via 88 2 BA WIOLSL ONIGS VIVd an lt 7427 gp LNOOM 184 X8 90 8 89 z Sy 02 2 072 ICIN 6772 ep 87 8 2 zv VZ Ov 24 40181 Tid 977 _ 96 5 9LIZZ cu ul SSA nd 699 890 R YYZ OOALSL Td 2 921 2 nr tvz se 2 2 vel LVZ 66 ze 102 10 1 01 AMX _ 4noosd sidav Adee Adee 264 ISWUX LL axe dWoav HN 119 9 5 INO 08 2 0 ax z 7 19682 ev m TW LSWOX 2 vola 6 YN 1 MN 6 r VOld g xWav o dWoav 3 W QASt 9 vx vola LX 9 ax 7 VOld IM 9 vx vola 8 W 9 ax 0 vola v W zn vx 8 dIHOIX31 z WX 0 vx oax ON 26 99A 20 29 29 99 99 0 6 ER old ________ 89 2 yo V VIAM NMG
62. gment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light DRAM Test 7 The DRAM test puts the Lexichip3 into a mode that allows the 280 microprocessor to read and write to the 1M X 4 DRAM through the Lexichip3 To actually test the DRAM the Z80 performs two tests a data test and an address test During the data test the Z80 writes AA hex 10101010 into all of the memory locations then reads them back to check them It repeats the process with 55 01010101 For the address test the Z80 writes a count into the memory then reads it back i e 00000001 00000010 00000011 This test will take approximately 45 seconds to complete During the test there is limited control of the front panel LEDs due to the interrupts being turned off Because of this the front panel LEDs cannot be updated to indicate the test number on the Diagnostic LEDs or the pass fail status of the test Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment display res ee oem RR Test Test Name Diagnostic LED display MEE JN DRAM EFFECTS Chamber 7 Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously 5 9 200 Service Manual When the test is executed the leftmost 7 segment display will
63. h perform the following functions 1 Turn on all of the front panel LEDs except for the LED segments on the 7 segment display 2 Turn on all of the LED segments on the 7 segment display only 3 Turn on each of the front panel LEDs and the LED segments on the 7 segment display individually 200 Service Manual Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Teys Test Test Name Diagnostic LED display EFFECTS Room Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously When the test is executed all of the front panel LEDs will be lit and the remaining LED segments on the 7 segment displays are turned off NOTE The LED colors are indicated in the diagram below LEVEL COMPRESSOR EFFECTS ROUTING DUAL EDIT E YEL Threshold RED Compressor GRN Plate GRN Hal GRN GRNMx RED Ratio 5080 RED RED 3d8 GRN Chamber GRNRoom GRN Ambience GRN GRN Adjust RED Threshold GRN RED YEL GRN GRN 1248 RED 1008 GRN Gate GRN Flange GRN Chorus GRN EX GRNEQ atak GRN GRN GEN GRN GRN 3048 RED 20dB GRNEchoDDelay GRN RotyTmlo GRN Pitch Detune GRN GRN LvBal RED Release
64. hannel is provided on the tip and the left channel on the ring of a stereo phone jack C63 and C73 provide RFI suppression at the output Like the input jack pair these jacks AC couple analog ground to chassis ground via C61 and C71 and the respective ground lugs on the jacks This is again to prevent AC hum loops from forming at the outputs Although the output op amp can drive high impedance gt 100 ohms headphones for best results a headphone amplifier should be used for low impedance phones Sheet 2 This sheet shows the CODEC device U5 the input signal DC bias circuitry R14 and R15 the single ended to differential input amplifiers U3 and the differential to single ended output amplifiers U4 Shown also are the various clock and control signals used by the CODEC Single ended to differential converter Each section of dual op amp U3 is a unity gain inverting amplifier Gains are fixed at OdB by R8 and R9 for the right channel and R23 and R24 for the left channel The non inverting inputs of each amplifier are tied to analog ground creating a virtual ground at the junctions of the input and feedback resistors for each channel Signals IN RIGHT and IN LEFT from the previous page AC coupled into the these amplifiers by C7 and C22 Each phase of the differential output signal pairs are impedance balanced via R10 R11 for the right channel and R25 R26 for the left and then AC coupled C9 C10 and C24 C25 respectively Each p
65. hase of the differential signal pairs are then DC biased via the resistors R12 R13 and R27 R28 This DC bias of 2 94V is provided by a resistive divider comprised of R14 and R15 while C12 and C13 de couple this bias voltage to remove ripple and noise Because the CODEC samples the input at 256fs R10 R11 C41 and R25 R26 C42 form low pass filters C9 C10 C24 and C25 simply provide AC coupling into the CODEC 6 2 Lexicon AK4528 CODEC The AK4528 is a high performance 24 bit A D D A device which performs anti alias filtering analog to digital conversion digital to analog conversion and digital 15 50uS de emphasis Although it supports sampling rates up to 96kHz the MPX200 only supports 44 1kHz sampling The ADC inputs are fully differential The input signal range is scaled to the VREF pin Nominally this range is defined as 0 56 x VREF Volts peak to peak With VREF equal to 5V and a DC input offset voltage of 2 9V The output code of the ADC is Ox FFFFF positive full scale and 0x800000 negative full scale The data is in 2 s complement form The input is sampled at 6415 2 8224 MHz with fs 44 1kHz Serial data is clocked in on the rising edge of the bit clock and is aligned with the second bit clock following the leading edge of each transition in the LRCLK FS This alignment is determined by setting the serial data interface pins to support the 125 format The Lexichip3 receive port SDINO is configured to support
66. he front panel registers R130 through R138 provide edge rate limitations of the data buss and reset signal going off the main PCB This is done to aid in RFI elimination ZD 7 0 is an eight bit wide data bus that functions as a control for lighting the 60 LED segments that populate the front panel This number includes each segment of three seven segment displays installed on the front panel Sheet 5 This sheet shows the Z80 processor memory interface user program storage flash ROM and chip select buffers used throughout the design Z80 Memory Flash and User Program Storage Z80 U19 handles all basic system control and user interface operation Normally the Z80 clock ZCLK is derived from the Lexichip3 M_ZCLK pin via multiplexor U9 However when is asserted before the Lexichip3 is functioning U9 feeds a clock signal generated by U14 R81 and C74 Resistors R80 provides protection from RFI 82 is a provision for further RFI protection currently all that is required is a 0 ohm resistor Also during power up reset 09 hardwires a logic low into the RST pin of the 280 this ensures that the Z80 remains at a hard reset during this time The Z80 interrupt signal ZINT is pulled high by R142 to ensure that the Z80 receives no false interrupt indications during power up This is a weak pull up and has no effect during normal operation The Lexichip3 master clock CLK_IN pin 75 is driven by an 11 2896 2 crys
67. ide read buffer that provides status of the footswitch rotary encoder and front panel push button switches to the 280 processor via the internal data bus STAT is an address decoded chip select for this read buffer Address 0x4C00 Function Switch Status read Read Only Ben ZDBusbits 7 6 5 4 30 Signal Foot Bypass Foot Switch Row1 Switch Row0 3 0 Foot Bypass oot Bypass switch is not pressed oot Bypass switch is pressed Foot Tap oot Tap switch is not pressed oot Tap switch is pressed 1 Switch Row1 This is the OR of the Bypass Edit and Tap Cancel front panel switches The actual switch status is column scan dependent 1 One of the above three switches is pressed 0 None of the above switches have been Switch Row0 This is the OR of the Store and Load front panel switches The actual switch status is column scan dependent 1 One ofthe above three switches is pressed 6 5 200 Service Manual 0 None of the above switches have been pressed ENC 3 0 This is a straight read of the rotary encoder switch SW1 Possible values range from 0000 to 1111 Resistors R158 through R161 provide pull ups for signals ENC_3 0 ensuring that a switch open condition is properly read back as a logic 1 R172 and 121 are provisions for either AC or DC coupling the mechanical shell of SW1 to digital gr
68. imal maintenance Use a soft lint free cloth slightly dampened with warm water and mild detergent to clean the exterior surfaces of the connector box Do not use alcohol benzene or acetone based cleaners or any strong commercial cleaners Avoid using abrasive materials such as steel wool or metal polish It the unit is exposed to a dusty environment a vacuum low pressure blower may be used to remove dust from the unit s exterior Ordering Parts When ordering parts identify each part by type price and Lexicon Part Number Replacement parts can be ordered from LEXICON INC 3 Oak Park Bedford MA 01730 1441 Telephone 781 280 0300 Fax 781 280 0499 email ATTN Customer Service Returning Units to Lexicon for Service Before returning a unit for warranty or non warranty service consult with Lexicon Customer Service to determine the extent of the problem and to obtain Return Authorization No equipment will be accepted without Return Authorization from Lexicon If Lexicon recommends that MPX 200 be returned for repair and you choose to return the unit to Lexicon for service Lexicon assumes no responsibility for the unit in shipment from the customer to the factory whether the unit is in or out of warranty All shipments must be well packed using the original packing materials if possible properly insured and consigned prepaid to a reliable shipping agent When returning a unit for service please include the followi
69. ing the Power On Self Tests and also for troubleshooting purposes NOTE The Extended Diagnostics can also be invoked by pressing and holding the Bypass Footswitch labeled Ring while powering on the unit Power On Self Tests POST Upon normal power up the MPX 200 will perform a series of diagnostic tests For a description of these tests refer to Table 2 1 These diagnostic tests have been designed to take less than 10 seconds The diagnostic test sequence is displayed on the front panel LEDs prior to the execution of the test wherever possible for troubleshooting purposes provided the LEDs are functioning properly NOTE The first time the MPX 200 is powered on the EEPROM will be initialized during the EEPROM diagnostic test and the 7 segment display will display rSt to indicate that the EEPROM is being initialized Once the EEPROM has been initialized the unit will reset and repeat the POST This initialization process takes approximately 40 seconds otherwise the POST would normally take approximately 10 seconds Throughout this document these LEDs will be referred to as the Diagnostic LEDs These LEDs are used to indicate the corresponding test number and are turned on before each test is executed Displaying the Test Error code on the LEDs before the test is executed makes it possible to determine which test failed if the unit hangs or crashes during the test Diagnostic LED ROM Checksum COMPRESSOR 20dB LEXICHIP3
70. into memory Following this test is an Address test to verify all the address lines are active Finally the memory is checked for 05 Before the test is executed the following test code will be displayed on the Diagnostic LEDs Diagnostic LED Lexichip3 WCS COMPRESSOR 3dB If a failure occurs the Red LEVEL Clip LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt continuously loop the test for troubleshooting purposes If the Bypass button is pressed the failure is ignored and the next test will be executed If the Tap Cancel button is pressed the CPU will attempt to go into a mode where it can execute the test continuously Lexichip3 INT Test 4 The Lexichip3 INT test will verify that the Lexichip3 interrupt INT is working and occurring at the proper intervals The Lexichip3 will provide MPX 200 with the interrupt INT to the Z80 s maskable interrupt line Before the test is executed the following test code will be displayed on the Diagnostic LEDs 5 3 200 Service Manual Diagnostic LED Lexichip3 INT COMPRESSOR Threshold If a failure occurs the Red LEVEL Clip LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt continuously loop the test for troubleshooting purposes If the Bypass button is pressed the failure is ignored and the next test will be executed If the Tap Cancel button is pressed the CPU will attempt to go into a mode
71. lay will display r to indicate the test is running The pass fail status of the test is displayed on the 7 segment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light 5 8 Lexicon If the test failed the Red LEVEL Clip LEDs will light EEPROM Test 6 This test will read each byte in the User Register portion ofthe EEPROM and add them together to calculate a checksum This value is compared with the checksum value stored in the EEPROM itself This checksum will be recalculated each time a register is stored The test will also verify that the EEPROM has been initialized properly This is done by storing the software version of the EEPROM in the first five bytes of the EEPROM and then verifying the stored value is correct when the test is executed If the stored value read from the first five bytes of the EEPROM is incorrect the EEPROM will be initialized Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Diagnostic LED display 6 EEPROM EFFECTS Gate 6 Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously When the test is executed the leftmost 7 segment display will display an r to indicate the test is running The pass fail status of the test is displayed on the 7 se
72. lified signal from the S PDIF input circuitry The signals V TX FS96 AUTO and ERF allow software to determine the Validity sample rate PCM detection status and error status detected by 013 The chip is hardwired to 24 bit 125 format and it may set as a timing master or slave by toggling the DIF1 signal SP MASTER This is accomplished by programming the Lexichip3 PIOB 4 pin When this signal is low the receiver is in master mode when 0 the receiver is set to slave mode The MPX200 is always operated in slave mode The receiver is hardwired to work in parallel mode with the master clock source set to be the internal PLL Master clock output 1 is hardwired to provide 256fs locked to the recovered clock from the input data stream During a reset cycle provided by the signal RESET tied to the pin All internal analog and digital circuits become inactive along with all clocks All internal control registers are held in reset also C88 and C89 provide power supply de coupling for the Input Buffer supply pin C85 and C86 de couple the digital supply to the chip C91 and C92 de couple the analog supply to the chip R110 provides a bias current for the analog circuitry internal to the 4112 R108 and R112 are provisions for alternative DC coupling of the recovered master clock from the AK4112 and also from it s buffered equivalent as provided by U15 This was done in order to address potential radiated emissions if the product
73. lly performed two other characters will appear a P will indicate the test preformed has passed and 1 will indicate the test has failed After some of the tests when the load button is pressed and released the displays will read 4 to indicate that the test has been exited Setup 1 Connect one end of the MIDI cable to the jack on the Rear Panel of the unit labeled MIDI Out Thru 4 1 200 Service Manual 2 Connect the other end of the MIDI cable to the jack on the Rear Panel of the unit labeled MIDI In 3 Using the phone cable connect one end to the 1 4 jack marked footswitch on the back of the MPX200 Connect the other end 1 4 phone cable to the 1 4 phone jack on the footswitch Using the appropriate power cord connect the MPX 200 to an appropriate AC voltage source Set the MPX 200 into Extended Diagnostics mode to perform the following functional tests by turning the power switch to the ON position while holding down the Bypass button 7 Release the Bypass button when the Green LEVEL 30dB LED s are lit after approximately 3 seconds Qoa Switch Test 8 1 Turn the encoder knob clockwise until the display reads 8 2 Press and release the load button to execute the test 3 The display will read r 8 4 The MPX 200 is know ready to test both the footswitch functions and the front panel switches Footswitches 1 Press and hold the Left footswitch labeled Ring and
74. n is pressed the failure is ignored and the next test will be executed SRAM Test 2 The SRAM Test performed during the POST is a destructive test meaning that any data stored in SRAM will be lost The entire contents of the SRAM is tested by first writing 00 hex 00000000 binary to all of the memory locations and then verified by reading back all of the memory locations This write read sequence is also performed using the following patterns 55 hex 01010101 binary AA hex 10101010 binary and FF hex 11111111 binary Before the test is executed the following test code will be displayed on the Diagnostic LEDs Test Diagnostic LED 2 SRAM COMPRESSOR 10dB If a failure occurs the Red LEVEL Clip LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt continuously loop the test for troubleshooting purposes If the Bypass button is pressed the failure is ignored and the next test will be executed Lexichip3 WCS Test 3 The Lexichip3 WCS test will check the program memory space the Writeable Control Store of the Lexichip3 The RAM memory space is first filled with the value 55 hex 01010101 binary then each memory location is read to see if it contains 55 If 55 is in the memory location the location is filled with AA hex 10101010 binary and the next location is processed Once the RAM has been checked for 55 s and filled with AA s the process is then repeated checking for AA s and storing O s
75. nd output buffer supply pins R46 DC couples the analog and digital supplies together while providing a measure of isolation of digital switching currents from leaking back into the analog supply C39 and C40 de couple the VCOM pin of the CODEC This pin is the bias voltage of the ADC inputs and the DAC outputs this voltage is equal to VA 2 Differential to Single Ended Output Amplifiers The analog outputs of the CODEC are full differential with a full scale swing of 0 54 x VREF volts peak to peak This output signal is centered on 2 5V Both sections of dual op amp U4 are configured as unity gain second order low pass filters with an Fc 93 2kHz These filters provide summing of the differential signals for each channel into single ended signals R30 R31 R32 R34 R35 R36 C30 C31 and C32 form the low pass filter for the right channel OUT RIGHT while R38 R39 R40 R42 R43 R44 C35 C36 and C37 comprise the low pass filter for the left channel OUT LEFT Both signals are referred back to page 1 to the Output and Mute circuitry Regulated 5V rails power these op amps Sheet 3 This sheet shows the S PDIF input and output circuitry the Digital Audio Receiver Program Select rotary encoder and the glue logic necessary to implement these functions The S PDIF IO is implemented in a dual RCA phono jack 6 3 200 Service Manual S PDIF Input The S PDIF input is brought in via one half of J5 The signal is terminated int
76. nectors Coaxial RCA type 24 bit Digital S PDIF always active Sample Rates 44 1kHz Internal Audio Data Path DSP 24 bit Footswitch Tip Ring Sleeve phone jack for Bypass and Tap optional System Specifications Power Requirements 100 120 220 240V 50 60Hz 25W Environment Operating Temperature 32 to 104 0 to 40 C Relative Humidity 95 non condensing Dimensions 19 W x 1 75 H x 5 5 D 483x45x140mm Weight Unit 3 1516 1 41kg 3 1 Lexicon Chapter 4 Performance Verification This section describes a quick verification of the operation of the MPX 200 and the integrity of its analog and digital audio signal paths Initial Inspection Inspect the unit for any obvious signs of physical damage Verify that the front panel controls operate smoothly and correctly Refer to the MPX 200 Owner Manual for detailed explanations of this functionality Verify that all screws and rear panel jacks are secure Functional Tests Initial Power Up Check 1 The voltage selection switch on the MPX 200 should be checked prior to power on It is located on the right side of the unit Make sure it is switched to the proper AC voltage setting for your area 2 Connect the power cord to the back of the MPX 200 and the other end into an isolated variable output power supply Variac 3 Verify the Variac s AC voltage output is set to 0 4 Turn the MXP 200 power switch to the On position and slowly increase the AC voltage output of
77. ng information Name Company Name Street Address City State Zip Code Country Telephone number including area code and country code where applicable Serial Number of the unit Description of the problem Preferred method of return shipment Return Authorization on both the inside and outside of the package Please enclose a brief note describing any conversations with Lexicon personnel indicate the name of the person at Lexicon and give the name and telephone daytime number of the person directly responsible for maintaining the unit Do no include accessories such as manuals audio cables footswitches etc with the unit unless specifically requested to do so by Lexicon Customer Service personnel 2 1 Lexicon Chapter 3 Specifications Analog Inputs Connectors 1 4 unbalanced Impedance 500K unbalanced for Direct Instrument input unit detects a mono input on the right input A D Dynamic Range gt 95dB typical 20Hz 20kHz unweighted Levels 30dBu to 4dBu Resolution 24 Bit Analog Outputs Connectors 1 4 unbalanced Impedance 75 Ohms for Headphone output Right only used for mono output Left only used for stereo headphones D A Dynamic Range gt 100dB typical 20Hz 20kHz unweighted Levels 8dBu typical Resolution 24 Bit Frequency Response Wet Dry 20Hz 20kHz 1dB Crosstalk gt 55dB THD lt 0 05 20 2 20 2 Digital Audio Interface Input Connectors Coaxial RCA type Digital S PDIF Output Con
78. nit is suitable for use in countries where the line voltage is between 90VAC and 120VAC When SW2 is in the 240 position the windings are connected in series and the unit is suitable for use in countries where the line voltage is between 220VAC and 240VAC The secondary windings of T1 are wired in series with one end tied to power ground This boosts the other end in voltage Front Panel Board schematic Walkthrough Sheet 1 This sheet shows the front panel connector the Octal Registers and the column drivers used to activate the LEDs on the front panel Front Panel Connector Just like on the Main PCB this is not strictly speaking a connector Rather it is a 16 x 1 array of solder pads for the mounting of a semi rigid ribbon cable This is the only interface scheme between the Front and Main PCBs This cable provides power 5VD ground DGND three address decoded register strobes 6 10 Lexicon ROW 2 0 a reset line RESET two front panel switch monitoring signals SWITCH ROW 1 0 and an eight bit data bus 17 01 Octal Registers The purpose of these registers 92 04 is to latch the data value presented by the Main Board depending upon which register is selected for activation by the decoded strobes All LEDs are electrically arranged in a 21 row by 3 column matrix These three octal registers access the rows and columns of that matrix U3 and U4 perform the sole function of accessing sixteen
79. ns to these three data bits Address 0 4 04 Write Only Data Bus Bits FRNT D Z 5 0 De coupling capacitors are distributed evenly throughout the front panel PCB and provide power supply de coupling for the 5V digital line Sheets 2 and 3 These sheets show the non button related LEDs The previous section illustrates the row column arrangement of these LEDs No further discussion on this page is necessary Sheet 4 This sheet shows the arrangement of the Front Panel buttons and their respective LEDs The LEDs have been covered in previous sections and no further discussion will take place here 6 12 Lexicon Front Panel Switches Like the LEDs the switches are arranged in row column scheme The arrangement is in a 3x2 architecture Whenever a button is pressed a software scan of the SWITCH_ROWI1 0 bits at address 0x4C00 determines which button was pressed The Column signals used by the LEDs are used here as well Each column signal is applied to a forward biased diode D39 D41 The cathodes of these diodes each connect to two switches The other sides of the switches are tied in groups of three to either SWITCH_ROWO or SWITCH_ROW1 The following table illustrates the arrangement of the switch matrix Column 2 Column 1 Column 0 SWITCH ROWO Tap Cancel SWITCH ROW1 Resistors R28 and R29 ensure that the SWITCH 0 1 signals are pulled active low 6 13 Chapter 7 Parts List
80. o 750 by 129 coupled by C103 and amplified by 018 74HCU04 Current limiting resistor R127 and clamping diode D6 provide input protection R126 and R128 force one section of U18 into a semi linear mode of operation creating a gain stage that amplifies the low level signal at the input to a CMOS logic level The second section of U18 provides additional buffering of this signal R122 is a provision added to the design to bypass this gain and buffer stage for higher level signals but this provision has not been implemented C108 and R146 are provisions for either AC or DC coupling the ground signals of the S PDIF connector to chassis ground via mechanical contact with the chassis Currently the ground signals for the S PDIF input and output are DC coupled via R146 with C108 left unpopulated S PDIF Output The S PDIF OUT is generated by the Lexichip3 and buffered by two gate sections of U18 These two gates of U18 are connected in parallel to increase drive capability The resistor combination of R123 R125 forms a voltage divider that attenuates the buffered signal to 500mVp p D5 clamps this voltage to 0 7V The resultant signal is AC coupled by C100 and C101 to the output section of J5 C102 prevents high frequency radiation from getting out onto the cable connected to S PDIF out 4112 Digital Audio Receiver The digital audio receiver 4112 U13 which delivers a serial stream in 125 format to the Lexichip3 demodulates the amp
81. ound In this instance it is DC coupled through R172 and C121 is left unpopulated Sheet 4 This sheet shows the MIDI IO the Footswitch circuitry power up reset circuit and the front panel connector The MIDI and footswitch connectors provide DC connection of the digital ground plane to chassis ground on the back panel MIDI I O The MPX200 MIDI interface complies with the MIDI specification It incorporates 5 pin female DIN connectors for input thru and out J7 and J6 J6 is shared for thru and out according to how the Lexichip3 is programmed MIDI INPUT is brought in 47 and is opto coupled for ground isolation through U24 R164 provides current limit protection of U24 and D7 provides input voltage protection by clamping the input signal to no more than 0 7V at the input of U24 The output of U24 is open collector necessitating pull up resistor R163 R162 and C116 form a first order low pass filter that outputs a sinusoidal equivalent of the MIDI signal This signal is then squared up by U14 and presented to the MIDI UART within the Lexichip3 The filter and U14 are essential in that the opto isolator by itself does not provide sufficient drive capability to allow daisy chaining more than two or three units together The MIDI OUTPUT signal is generated by the Lexichip3 and is fed to current loop driver Q4 and out J6 FB4 and FBS and the connector shield ground connection reduce RFI R149 provides an input bias current to Q4 while
82. patible signal to the first section of U14 at which point it becomes inverted The second stage of U14 re inverts it back to an active low signal thereby generating a master reset signal for the front panel PCB Lexichip3 6 6 Lexicon and the AK4112A R64 is a provision for bypassing the 014 circuitry but it is not implemented in this design Front Panel Connector The front panel connector is not precisely a connector Rather it is a 16 x 1 row of solder pads that accept a semi rigid flat cable that solders directly to the Main PCB and the Front Panel PCB FB3 and C94 provide filtering of the power supply going up to the front panel Because of the high current demand of the front panel board and the multiplexing nature of LED activity FB3 provides a high impedance to switching noise that would otherwise find it s way into the supply lines to critical circuitry on the main board C94 provides a charge reservoir to meet the demand of the current supplied to the LEDs SWITCH_ROW1 is a logical OR signal of the Bypass Edit and Tap Cancel switches on the front panel SWITCH_ROWO is a logical OR signal of the Store Compressor and Load switches on the front panel ROW _REGI2 0 are address decoded strobes for three registers on the front panel board Further enhancement and address mapping of these strobes will be provided in the walk through for the Front Panel PCB FP_RESET is as the name implies an active low reset signal for t
83. rn the Mix up to 100 7 Put on the headphones and bring the volume up on the Headphone amp to a comfortable listening level 8 Sweep the input knob over its entire range and verify there are no pops clicks distortion or static noises heard when turning the knob 9 Swap the cables from the Left Input Output connectors to the Right Input Output connectors and repeat the above procedure Shock Test Note To prevent damaging the unit keep the other sides of the unit touching the work surface at all times 1 2 3 While listening to the unit with the headphones lift a corner of the MPX 200 off of the table approximately 4 inches and then drop Verify that there is no lose of audio or distortion during this action Repeat this test lifting at each of all four corners of the MPX 200 4 5 200 Service Manual Lexicon Audio Precision Summary This chart represents a summary of test Audio Precision test equipment settings and parameters used by Lexicon Manufacturing in production testing of all MPX 200 product This is provided as a reference and supplement to bench test settings found in the proof of performance in this manual Left Right Bal Gnd Sample Test Input Input Freq Imp Unbal Float Level Reading Upper Lower Filter Imp Band Rate Sa 997 A DXTALK 11dBu 11dBu 997 25 Ohm Unbal Float LEVEL dBFS 98 50 54 94 120 0 WEN 44 1kHz A DDYNR 50dBu 50dBu IS Ohm F
84. s 1Mx8 device Note that all address decoding RAM EN ROM_EN etc is done within the Lexichip3 That is the primary reason the 280 cannot function if the Lexichip3 is improperly initialized at the rising edge of RESET The address bus and memory control signals provided by the Lexichip3 are series terminated by resistors R93 through R98 and R101 through R107 This is done to provide RFI protection Since the most active signals on this bus are LEX 0 and LEX 1 these are the ones that will cause the most emission therefore R93 and R101 are set to 180 ohms this value effectively slows down the edge rates of these two signals The remaining bus signals LEX_A 2 9 are less active and therefore do not require edge rate reduction R94 R96 through R98 R102 R105 and R106 are set to 0 ohms Control signals CAS RAS and WE require edge rate reduction due to their high level of activity Therefore R95 R103 and R104 are 180 ohms Master Clock Generator Y1 C76 C77 and R91 comprise the master clock generator Signal LEX_256FS is equal to the frequency generated here 11 2896MHz Pins 74 and 75 on the Lexichip3 are essentially the output and input of a CMOS buffer respectively Sheet 7 This sheet shows the power supply scheme used in the 200 It includes the circuitry used to derive 10VUN 5VD 5VA 3 3VD 10VUN and 5VA as well as the rectifier circuit coming off the power transformer secondary Bypass capacitors C65 C70
85. ssing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously When the test is executed the leftmost 7 segment display will display an r to indicate the test is running The pass fail status of the test is displayed on the 7 segment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light Lexichip3 ADF Test 5 This test will verify that the Lexichip3 Audio Data File memory is working The Lexichip3 Audio Data File ADF is a fast synchronous 128 SRAM that provides audio data buffering and storage for external memory references Serial I O and the Host to Lexichip data port ADF locations also function as ARU Registers and as scratchpad memory This test will verify that the Lexichip3 Audio Data File is working Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays Test Test Name Diagnostic LED display Lexichip3 ADF EFFECTS Echo Delay Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously NOTE During the Lexichip3 ADF test several LEDs may flicker This is normal operation and not considered a failure in the unit 66 27 When the test is executed the left most 7 segment disp
86. styrofoam in the work area Wear an anti static wrist strap Discharge personal static before handling devices Remove and insert boards with care When removing boards handle only by non conduc tive surfaces and never touch open edge connectors except at a static free workstation Minimize handling of ICs Handle each IC by its body Do not slide ICs or boards over any surface e Insert ICs with the proper orientation and watch for bent pins on ICs Use anti static containers for handling and hu od make a plasticlaminated workbench antestatic wash wih a solution of Lux liquid detergent and allow to ary without rinsing x x Lexicon Table of Contents 200 Service Manual CS TREE 8 1 FS 8 1 Lexicon Chapter 1 Reference Documents Required Equipment Reference Documents MPX 200 Owners Manual Lexicon P N 070 14738 or latest revision Required Equipment Tools The following is a minimum suggested technician s tool kit required for performing disassembly assembly and repairs Clean antistatic well lit work area 0 Phillips tip screwdriver 1 Phillips tip screwdriver Flat Blade screwdriver Ya Hex Nutdriver 5 8 Hex Nutdriver 7 16 Hex with Full Hollow Shaft and plastic insert to prevent Front Panel from scratches Combination Wrench Solder 63 37 Tin Lead Alloy composition low residue no
87. sure that the location or position of the unit does not interfere with its proper ventilation For example the unit should not be situated on a bed sofa rug or similar surface that may block the ventilation openings or placed in a cabinet which impedes the flow of air through the ventilation openings Wall or Ceiling Mounting Do not mount the unit to a wall or ceiling except as recommended by the manufacturer Power Sources Connect the unit only to a power supply of the type described in the operating instructions or as marked on the unit Grounding or Polarization Take precautions not to defeat the grounding or polarization of the units power cord Not applicable in Canada Lexicon Power Cord Protection Route power supply cords so that they are not likely to be walked on or pinched by items placed on or against them paying particular attention to cords at plugs convenience receptacles and the point at which they exit from the unit Nonuse Periods Unplug the power cord of the unit from the outlet when the unit is to be left unused for a long period of time Water and Moisture Do not use the unit near water for example near a sink in a wet basement near a swimming pool near an open window etc Object and liquid entry Do not allow objects to fall or liquids to be spilled into the enclosure through openings Cleaning The unit should be cleaned only as recommended by the manufacturer Servicing Do not a
88. tal All the system software and programs are stored in 256Kx8 Flash ROM 020 Resistors R143 through R145 ensure that the default states of ROM A16 ROM A17 and ROM EN inactive ROM A 16 17 are pulled inactive low while ROM EN is pulled inactive high The Z80 s memory is a 8Kx8 SRAM U16 User programs are stored in a 4kx8 serial EEPROM U8 The serial data line SERIAL DATA is bi directional R66 prevents excessive current in either the EEPROM or the Lexichip3 during power up when both chips might drive the line R67 provides pull up for this data line while R65 provides a pull up for the EEPROM CLK The audio memory for the Lexichip3 is provided by 1Mx16 DRAM 017 Located on Sheet 6 Note that all address decoding RAM EN etc is done within the Lexichip3 That is the primary reason the Z80 cannot function if the Lexichip3 is improperly initialized at the rising edge of RESET 6 7 200 Service Manual Chip Select Buffers U22 currently is the only chip select buffer used on the MPX200 Provision has been made to add a second one 021 in order to separate out read from write chip selects but this has not been implemented Resistor R154 guarantees that chip select signal REG_SEL is held in an inactive state during power up R157 merely acts as an enable for the chip itself Resistors R139 through R141 provide RFI protection by slowing down the edge rates of signals ROW REG 0 ROW 1 and ROW REG 2
89. the last location of each bank The test adds the contents of the entire ROM including the Checksum byte The result should equal zero 8 bit value Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays mE id Test Test Name Diagnostic LED display COMPRESSOR 20dB Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously 66 77 When the test is executed the leftmost digit of the 7 segment display will display to indicate the test is running The pass fail status of the test is displayed on the 7 segment display and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light SRAM Test 2 The SRAM Test performed during the Extended Diagnostics is a non destructive test The non destructive test will test one memory location at a time saving the contents from the location being tested into a 5 6 Lexicon register and then restoring the value when it s done The entire contents of the is tested by writing 00 hex 00000000 binary and verified by reading the same value back from each memory location This write read sequence is also performed using the following patterns 55 hex 01010101 binary AA hex 10101010 binary and FF hex 11111111 binary This test
90. to verify all the address lines are active Finally the memory is checked for 0 5 Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment display 7 segment Test Test Name Diagnostic LED display Lexichip3 WCS COMPRESSOR 3dB Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously 66 77 When the test is executed the leftmost 7 segment display will display r to indicate the test is running The pass fail status of the test is displayed on the 7 segment displays and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light 5 200 Service Manual If the test failed the Red LEVEL Clip LEDs will light Lexichip3 INT Test 4 This is the same test that resides in the power up diagnostics was included in the Extended Diagnostics for troubleshooting purposes The Interrupt test will verify that the Lexichip3 interrupt ZINT is working and occurring at the proper intervals The Lexichip3 will provide MPX 200 with the interrupt ZINT to the Z80 s maskable interrupt line Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment displays mma d Test Test Name Diagnostic LED display Lexichip3 INT COMPRESSOR Threshold Pre
91. ttempt any service beyond that described in the operating instructions Refer all other service needs to qualified service personnel Damage requiring service The unit should be serviced by qualified service personnel when the power supply cord or the plug has been damaged objects have fallen or liquid has been spilled into the unit the unit has been exposed to rain the unit does not appear to operate normally or exhibits a marked change in performance the unit has been dropped or the enclosure damaged 200 Service Manual RE NR minim net must be connected to an electrical ground The instru ment s equipped with a three conductor AC power cabie GROUND THE INSTRUMENT ize shock hazard the instrument chassis and cabi The power cable must either be plugged into an approved three contact electrical outlet or used with a three contact to two contact adapter with the grounding wire green firmly connected to an electrical ground safety ground at the power outlet The power jack and mating plug of the power cable meet international Electrotechnical Commission IEC safely standards DO NOT OPERATE IN AN EXPLOSIVE ATMOSPHERE Do not operate the instrument in the presence of flammabie gases or fumes Operation of any electrical instrument in such an environment constitutes a definite safety hazard KEEP AWAY FROM LIVE CIRCUITS Operating personnel must not remove instrument covers
92. utlet so that the computer and receiver are on different branch circuits If necessary the user should consult the dealer or an experienced radio television technician for additional suggestions The user may find the following booklet prepared by the Federal Communications Commission helpful How to identify and Resolve Radio TV Interference Problems This booklet is available from the U S Government Printing Office Washington DC 20402 Stock No 004 000 00345 4 Le present appareil numerique nemet pas de bruits radioelectriques depassant les limites applicables aux appareils num riques de la class prescrites dans le Reglement sur le brouillage radio lectrique edicte par le ministere des Communications du Canada Copyright 1999 Lexicon Inc All Rights Reserved Lexicon Inc e 3 Oak Park e Bedford MA 01730 1441 e Tel 781 280 0300 e Customer Service Fax 781 280 0499 Lexicon Part 070 14827 Rev 0 Printed in the United States of America Safety Suggestions Read Instructions Read all safety and operating instructions before operating the unit Retain Instructions Keep the safety and operating instructions for future reference Heed Warnings Adhere to all warnings on the unit and in the operating instructions Follow Instructions Follow operating and use instructions Heat Keep the unit away from heat sources such as radiators heat registers stoves etc including amplifiers which produce heat Ventilation Make
93. was found to be radiating beyond acceptable limits R108 and R112 may be replaced by ferrite beads It was found to not be necessary so R108 and R112 are 0 ohm resistors This device is run off of 3 3 Volts DC All the on this device is 5 Volt tolerant U15 buffers the 256fs master clock and the Serial data to the Lexichip3 This buffer provides level translation between the 3 3V logic level of the Receiver to the 5V logic level of the Lexichip3 Series resistors R109 and R111 provide protection from signal over and under shoot which can cause the unit to radiate high frequencies LRCLK BICK provide 44 1 kHz frame clock LEX FS and 64fs LEX 64FS when the receiver is in master mode In slave mode these pins become inputs and Lexichip3 provides the clocks U15 is a 4 bit wide read buffer that provides status of the 4112 to the Z80 processor via the internal data bus SP STAT is an address decoded chip select for this buffer Address 0 4 01 Function Digital Audio Receiver Status 6 4 Lexicon Read Only Digital Audio Receiver Status ZD Bus Bits Function __2 1 0 FS96 Validity Auto 1 AC 3 or MPEG Detect 0 No Detection FS96 1 Fs gt 88 2kHz 0 Fs lt 54 kHz ERF This bit is the logical OR of PLL Parity Biphase and Frame Length status 1 PLL unlocked Biphase Parity or Frame Length error 0 No error Validity Direct status of validity bit U23 is an eight bit w
94. was included in the Extended Diagnostics for troubleshooting purposes Before the test is executed the following test code will be displayed on the Diagnostic LEDs along with the test number on the 7 segment display Test Test Name Diagnostic LED display SRAM COMPRESSOR 10dB Pressing the Load button will execute the test Pressing the Tap Cancel button will run the test continuously 66 77 When the test is executed the leftmost digit of the 7 segment display will display to indicate the test is running The pass fail status of the test is displayed on the 7 segment display and front panel LEVEL LEDs If the test passed the Green LEVEL 30dB LEDs will light If the test failed the Red LEVEL Clip LEDs will light Lexichip3 WCS Test 3 This is the same test that resides in the power up diagnostics It was included in the Extended Diagnostics for troubleshooting purposes This test will check the program memory space the writeable control store of the Lexichip3 The RAM memory space is first filled with the value 55 hex 01010101 binary then each memory location is read to see if it contains 55 If 55 is in the memory location the location is filled with AA hex 10101010 binary and the next location is processed Once the RAM has been checked for 55 s and filled with AA s the process is then repeated checking for AA s and storing O s into memory Following this test is an Address test
95. wer much of the analog domain in the system 3 3VD U12 provides a low current supply for the AK4112 U13 This is the only device that requires a 3 3 Volt supply voltage 5VA U11 and C84 regulate the half wave rectified voltage from the power transformer to 5 Volts This rail is used to power most of the circuitry in the analog domain in the system Rectifier 010 012 C122 C127 and C128 comprise a classic half wave rectifier circuit of the power transformer secondary AC voltage The positive side of the rectifier D12 C127 and C128 uses a much larger filter capacitor scheme because the current draw from this side of the rectifier is much higher than on the negative side Sheet 8 This sheet shows the AC power entry power transformer voltage select switch front panel power switch and chassis grounding scheme Power is brought onto the PCB via IEC connector J9 Digital ground is tied to the Earth ground lug of this connector via R173 This same point ties the front panel to Earth by way of a keystone bracket that mechanically attaches to a threaded stud on the front panel C130 provides a common mode filter across the LINE and NEUTRAL AC lines F1 is a 250mA slo blo fuse in series with the LINE and power switch lines J10 and J11 SW2 is a voltage select switch that configures the dual winding interconnections on the power transformer 11 primary When in the 120 position the windings are connected in parallel and the u
96. where it can execute the test continuously EEPROM Test 6 This test will read each byte in the User Register portion of the EEPROM and add them together to calculate a checksum This value is compared with the checksum value stored in the EEPROM itself This checksum will be recalculated each time a register 1 stored The test will also verify that the EEPROM has been initialized properly This is done by storing the software version of the EEPROM in the first five bytes of the EEPROM and then verifying the stored value is correct when the test is executed If the stored value read from the first five bytes of the EEPROM is incorrect the EEPROM will be initialized Before the test is executed the following test code will be displayed on the Diagnostic LEDs Diagnostic LED 6 EEPROM EFFECTS Gate If a failure occurs the Red LEVEL Clip LEDs will be turned on in addition to the Diagnostic LED and the CPU will attempt continuously loop the test for troubleshooting purposes If the Bypass button is pressed the failure is ignored and the next test will be executed If the Tap Cancel button is pressed the CPU will attempt to go into a mode where it can execute the test continuously 5 4 Lexicon EXTENDED DIAGNOSTICS The following tests are available in the Extended Diagnostics Test Test Name Diagnostic LED LED Display 1 COMPRESSOR 204 COMPRESSOR 1048 COMPRESSOR 3dB ___3 1

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