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DEFIGARD 5000 - Infiniti Medical

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5. R137 R138 DEFIGARD 5000 Circuit D fi pr amplificateur pas mont not mounted Defi preamplifier board APPROV MODIFICATION ART WSM00S0A CK RH CK PRT WSMO0050 PCBI ECL100 ECL100 ECLIO1 DGW WSM0050AREF101 SCHILLER 01 05 01 05 04 05 SHT 1 1 MEDICAL S A S Dimensions 261 mm x 145 mm Diagrams and layout drawings WSM0050_PCB2 0 48 0065 7 5 June 2005
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7. 1 DEFIBRILLATOR olal 2 JP3 JP1 3 1 1 _1 1 2V of 3 1 fo fol te eno avi ol 12 POWER SUPPLY dde IIS Sp H is DC lt o 1300M loko ko ko elo lo PIER RISE ee o gt Ie H ELCTR GND Lo 3 10 0108 A nie 00 o ollo DKY1 Lom 10 o J 12V 3 o tho SOS Wrer a o oc cons LPP One 00000000000000000000 Q 7 SET CPU o GND B05M 30M lalo 53 8 8 CON20 JP2 1203 ON20 CON3 1044 1 a5 J501M 3 10 0082 9 O79 MODO 1 1 1 1219M J100 UBAT CO 0 CON20 i oa gt MODA RD DER 0 A 0 04 RxD_DEFI tite E pa eed HDQ_B1 CO o 7 O1 READY TxD_DEFI TO H 310 073 4 TxD_DEFI_ TXD_POWER C 049 0470 TXD_POWER GND TO H BATTERY 1 3 op REC DE uC RST O H 3e o DE uC_RSTRXD POWER se He H RxD_POWER UBAT2 Co 0 2 pekeee ju foo suo fo fm Joo on gt ot READY GND_CPU 9 0 a eno CHARGE_LED C 0 7 7 0 ots CHARGE LED HDQ_B2 O 0 04 1 5 it O lt gt FPSB FPRLED O 59 945 FPR LED DC_LED 09 04 pc LED GND Lo ot DU QU o lo FPS KEY
8. BY Riis R143 ON NO Ol la RIZ c96 Be Q13 DZ5 DZ6 2120214 R241 alas h ayanbi 3 Riss RL60 D42 D43
9. Es 2 fa ut 8 o 36 RIT s u2 u3 Es A E o D L ot fo fo fe al fo 81 a I ISISI est OO LA E us I m 5 o E Oo LIRE mm 5 olla Bs E RIIR Sime s fe bl E a pu 014 ape us fa el Rr75 CRr30 R50 amp uo El as A Cost Sl y S In e E T4 R27 R41 RIS R48 D2 R66 L2 IN 8 sl lal 04 05 le 8 at a x E El cis R9 x c20 c19 gt pas mont not mounted Dimensions 97 mm x 66 mm DEFIGARD 5000 Circuit stimulateur Stimulator board DRAWN APPROV MODIF
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11. a o ES A R205 R228 R105 R404 R227 Riaz RISE DEFIGARD 5000 pas mont not mounted Circuit D fi pr amplificateur Defi preamplifier board Dimensions 261 mm x 145 mm ao ART WSM00S0A CK RH PRT WSM0050_PCB2 cuil ECL200 paw wsmoosoArEF200 SCHILLER 04 05 04 05 SHT 1 1 MEDICAL S A S Diagrams and layout drawings 7 3 CPU BOARD part no 3 2852 The part number of this board is 3 2652 or WSMOOS57A 0 48 0065 7 6 June 2005 Diagrams and layout drawings D2652BA 0 48 0065 7 7 June 2005 Diagrams and layout drawings S2652CA D2652CA 0 48 0065 7 8 June 2005 Diagrams and layout drawings 7 4 POWER BOARD part no 3 2653 The part number of this board is 3 2653 or WSMO0065A 0 48 0065 7 9 June 2005 Diagrams and layout drawings D2653BA 0 48 0065 7 10 June 2005
12. J405M q qe J401M Etiquette N s rie E J404M Dimensions 160 mm x 61 mm APPROV MODIFICATION CK NF ECL100 01 05 ECL100 01 05 DEFIGARD 5000 Circuit clavier haut Top keyboard ART WSM0062A WSM0062 PCBI DGW WSM0062AREF100 SC HILLER 1 1 MEDICAL S A 8 Diagrams and layout drawings 7 6 KEYPAD BATTERY BOARD part no WSM0060A This circuit is made up of three different snap off circuits When the circuits are separated each has a different part number WSMOO60B DG5000 SIDE KEYPAD PCB WSMO060C DG5000 BATTERY 1 PCB WSMO0060D DG5000 BATTERY 2 PCB2 0 48 0065 7 13 June 2005 Diagrams and layout drawings WSM0060_PCB1 0 48 0065 7 14 June 2005 osfizs cilleeeeeccccccen Dimensions 170 mm x 101 mm DEFIGARD 5000 Circuit batterie et clavier Battery boar
13. R26 T3 PL R l COMA E RIS R5 oO ps D7 g Jem ci5 uo TRL RZ R62 ait R21 us JP2 JPL gt pas mont not mounted Dimensions 97 mm x 66 mm DEFIGARD 5000 Circuit stimulateur Stimulator board DRAWN APPROV MODIFICATION E ART WSM0059A K JM PRT WSMO0059 PCBO ECL000 ECLO000 DGW WSM0059AREF000 S Cc H L E E R 11 04 11 04 SHT 1 1 MEDICAL S5 A S Diagrams and layout drawings WSM0059_ PCB1 0 48 0065 7 17 June 2005 LE C38 R5 R74 R38 R34 633 R73 Len Lato s o B C39
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16. 2V 302 2202 4000 Z Q The two hysteresis comparators U43B and U43C also attack window comparator U48A and U48B open collector in order to generate a signal that makes it possible to permit the delivery of the shock only when the patient impedance is located from 30 Q to 220 Q The output signal of the window comparator U48A and U48B is transmitted to the defibrillator control circuit by means of optocoupler U50 Signal PIMP_DEFI is used by the defibrillator control circuit in order to verify the proper contact of the defibrillation electrodes When the patient impedance ranges from 30 Q to 220 Q signal PIMP_DEF is in the high state TRANSMISSION OF QRS PULSES QRS pulses from the 10 channel ECG preamplifier are transmitted by means of transistor Q32 and optocoupler U49 which isolates the 10 channel ECG preamplifier and the defibrillator control circuit Output signal QRSTRIG_DEF is used by the defibrillator control circuit to synchronise the defibrillation shock with the QRS wave while functioning during cardioversion 0 48 0065 5 5 June 2005 Technical description of boards 5 2 2 3 CIRCUIT INTERFACE D ENTREE The input interface circuit performs the following functions e Interfacing of signals from defibrillation cartridges e Interfacing of signals to defibrillation cartridges OVERALL DESCRIPTION The input interface circuit forms the signals from the defibrill
17. MMMM SERIAL NUMBER 0001 0002 9998 9999 INVERTER SPECIFICATION R amp D GREEN C amp C TECH GHO25A DATE 2001 03 30 11 RELIABILITY TEST SPEC NO ITEM CONDITIONS AND METHOD High Temperature Temp 70C Storage Test uration 500hrs Low Temperature emp 30C Storage Test uration 500hrs Temperature Humidity Storage a np 40 emperature np gt High Humidity Operation test E oda Temp 30C 70C 250cycle Thermal Shock Test 30min 30min Amplitude 1 5mm Frequency 10 55Hz Position three perpendicular planes Duration 1000hrs High Temperature Operation test ue Low Temperature Operation test A Vibration test 1 MATERIAL LISTS FOR SAFETY GHO25A 1 1 LIST SYMBOL NAME TYPE NO MANUFACURER DESCRIPTION L FILE NO E10480 4510018452001 LITTELFUSE INC CSA FILE NO LR29862 Fl FUSE LE NO E2062 SSQ1 BEL CSA FILE NO LR39772 WONKYENG U E202541 L FILE NO PCB FR 4 YOUNG EUN ELECTRONICS UL FILE NO E173507 ULATOR PC TEIJIN CHEMICALS UL FILE NO E50075 M A 1 DAISUNG ae TELECOMMUNICATIONS E NAMYANG T1 TRANSFORMER TS 121A ELECTRONICS KYUNGIN 1 ELECTRONICS DONGHUNG CO ECTOR 53261 0590 MOLEX YLON 4 6 UL94V 0 CN1 CO ECTOR SMO2B BHSS JST PA46 UL94V 0 INS
18. QE amp cig sE x C423 A ST 2 S guest e a Q401 z HA CE D521 al mM 517 Z RETA Bild 5 EM TR500 g S pa ma SSB C440 x 18 g Lo ll Rees El S poa U amp T bss Qj JH G Os 502 Ms QE R407 5 CRE a A SH 2N Cal p53 8 eS x par TP531 TPS32 7 genk aeaea sod e Ly R429 S Sl ls KUELKOERPER GROSS 3 gt Se 08h SE a o En o oa LE z e eR ol O canne R556 le x E D520 an azsa Ren UE E Ep GOsz8b504 f ess n u o J v 2 D a p 0515 5 ay E D ae E me eue gt 00 3808 E Rose ODO O 2 ZJE AN E Cor B la soy C510 R548 R527 PHO TP 411 o C526 C527 usos Eg casn E 10 eses 0 O ble USO Um S ON Ele al C5254 C428 5 i paz 9 o Feb E us12 DO A401 R554 X pstajusoala oy 2e S1500 os2a 7 Em y PP masa J 5407 m g a 504 Usos dep j ER E E alg a Os C539 D SR R563 0 bao U Je ce T400 z 8 Roop pia Q5 1 fo 180 JBP 4 x 15e AA o Rtas T E L502 O KUEHLKOERPER GROSS 1 mM ee r BAO csas 2 0510 KUEHLKOERPER GROSS C540 A RE dEl Dicke Draete 0411 C524 L D CD CD CD CD CD KUEHLKOERPER KLEIN 3 CD Cre Ca Gor xy Title DE4 6 POWER BOARD Schiller AG Project DG 5000 D ZOD BA Altgasse 68 Drawn By HPSCH Entw HPSCH Prod DATE 25 01 05 Sheet 1 of 2 CH 6340 Baar Diagrams and layout drawings 7 5 UPPER KEYPAD BOARD part no WSM0062A 0 48 0065 7 11 June 2005 Diagrams and layout drawings WSM0062_ PCB1 0 48 0065 7 12 June 2005
19. 0 48 0065 5 21 June 2005 Technical description of boards TDEF Test defibrillator Logical signal from the circuit including the defibrillator test circuit detection core which is used to differentiate external defibrillation and a defibrillator test During a defibrillator test signal TDEF switches to low during the shock gt Signal TDEF is active when low active at O V THVM Transformer High Voltage Measurement Analogue signal that makes up the first channel for measuring the charging voltage of the HV capacitor This measurement is taken by means of the primary winding of the HV converter Signal THVM is taken into account by the defibrillator microcontroller to stop charging the HV generator gt Signal THVM ranges from 0 to 4 V maximum gt Scale factor THVM V U yr V 850 where U yr gt charging voltage of the HV capacitor CHVM Capacitor High Voltage Measurement Analogue signal that makes up the second channel for measuring the charging voltage of the HV capacitor This measurement is taken by means of two voltage dividers with a high resistive value which are referenced to the ground and balance the high voltage circuit voltage Signal CHVM is taken into account by the defibrillator microcontroller and transmitted by the serial link to the host CPU to display the energy stored corrected for 50 Q The signal is also used if there is a fault in the stopping of the charge by latch FDU The maximum charging
20. PULSE WIDTH_ OVER RUN and FREQUENCY OVER _ RUN safety circuits cease to operate FREQUENCY OVER RUN safety circuit Signal PACE _MEASURE is applied by means of follower U1A at the input of comparator U2B which forms signal PACE_MEASURE that is used to apply pacing pulses with currents as low as 25 mA The signal delivered by the output of comparator U2B attacks the input of monostable U6B on its falling edge U6B delivers a pulse that is active when high which sets the maximum limit of the pacing frequency The pulse is applied simultaneously with the signal delivered by comparator U2B to logical gate U5C If the duration between two consecutive pacing pulses is smaller than the duration of the pulse delivered by monostable U6B the output from logical gate U5C switches to low and triggers latch R S At its FREQUENCY_OVER_RUN output latch R S delivers error signal PACER_FAIL that blocks the transistor that controls the delivery of pacing pulses and cancels the pacing current by affecting the control signal of the current generator At the same time signal PACER_FAIL is also transmitted to microcontroller U13 U13 transmits the information by means of the serial link to the Analogue microcontroller that stops the pacemaker Latch R S is reinitialised by signal FOR_INHIB that is active when low The OVER RUN FREQUENCY safety circuit is disabled when the pacemaker is in CS Overdrive mode Such disabling is activated by means of sig
21. 5 2 1 DEFIBRILLATOR PCB The Defibrillator PCB part no WSM 0050_ PCB includes the various parts below e ECG preamplifier The ECG preamp part acquires the ECG signal collected through the defibrillation electrodes and measures the contact impedance e Input interface circuit The input interface circuit part acts as the interface between the various defibrillation cartridges and the defibrillator control circuit e Defibrillator control circuit The defibrillator control circuit part controls the charging and discharging of the HV capacitor through the electrode cartridges or the keys on the front of the device e High voltage circuit and HV capacitor The high voltage circuit charges and discharges the HV capacitor and measures the charging voltage and the patient current during the defibrillation shock e IGBT control circuit The IGBT control circuit controls the IGBTs of the high voltage unit in order to generate a pulse biphasic waveform with patient impedance compensation e Fault detection circuit The fault detection circuit monitors the critical components in order to detect any fault 5 2 2 FUNCTIONING OF THE DEFIBRILLATOR PART The explanation of the working of the defibrillator part refers to chart DG 5000 Defibrillator 5 2 2 1 OVERALL DESCRIPTION The defibrillator circuit has seven connectors e connector JP1 3 contacts for powering the defibrillator circuit e connector JP2 20 contacts for connecting with the CPU board a
22. L0 2 lan E DE 7 PIMP_DEF V V V ER AE rinvooreograpseuressg A A pi 3 connecteur JP2 m vers carte CPU Host Sch No v n 3 piena ena NO gt me ew Sew E eae Bloc diagramme Defibrillateur DG 5000 one SCHILLER avant O5 os merit MEDICAL S A S Z Project 04 101 E 02 DG5000 PCB No 1310050 PCBO Date 21 02 05 4 rue Louis Pasteur E ZAE Sud BP50 A l l N Size A3 Dramby RH Art No WSVO050A Shet 1 of 1 67162 WISSEMBOURG CEDEX 0 48 0065 June 2005 Technical description of boards 5 3 CPU BOARD part no 3 2852 This circuit has the part number 3 2652 or WSMO0057A 5 3 1 General The CPU board is the main board of DG5000 It contains the operating system Linux all the associated applications the display and the management of the keypad the management of all the signals from the sensors and the management of all the inputs and outputs devices The CPU board can be divided into two large parts CPU board ANA part The CPU board contains the Coldfire microprocessor the RAM and flash memory and devices such as Ethernet USB the TFT controller the graph LPT the clock RTC the sound OKI Buzzer and serial links These serial links enable the board to communicate with the other boards of DG5000 DEFIBRILLATOR and POWER and the ANA part and the outside environment RS232 A programmable component CPLD is used to decode addresses selecting the right device generate reset s
23. O45 TA ECG CKIN CO O0 0440 CKIN c lt mte lt GND me lo OG GND cs HO 72 18 19 Leurs 19 Ss GC 9 ET re S79 ON MEDI2 GND CF 0020 TP 202 SND IT GND o lo GND 1 i L LJ L_J 12V 50 04 gt 12V CON20 CON20 Ha CS 2 o o ES 412V NiBP 4 38 0003 Limande 12V o 12V GND 4 lo GND 4 15 0016 Gnd 5 To of 3 ono NIBP CAS GND 730 GND HO RESET_NIBP Spo O S gt RESET_NIBP Sch N RXD_NIBP y tO O gt RXD_NIBP p chema No TXD_NIBP lt O lo TXD_NIBP Interconnection DG5000 V1 0 SCHILLER CON10 7 7 MEDICAL S A S 3 10 0095 Project 101_DG5000 PCB No Date 13 12 04 le motos Pasteur IU LT 7 A ZAE Sud BP50 Size A2 Drawn by HZ NF Art No Sheet 1 of 1 67162 WISSEMBOURG CEDEX Diagrams and layout drawings 7 2 DEFI BOARD part no WSM0050A 0 48 0065 7 3 June 2005 Diagrams and layout drawings WSM0050_PCB1 0 48 0065 7 4 June 2005 J3 R423 C18 R265 xB p47 1Q
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26. 50 foo tft ko e foo o ERRE eu feo ee e 5e o 4 MICRO 2 GND e H o 4 GND RTS_232 40 GND_MIC CAVE Lo 0430 047 cave RXD_232 HO E No LO LO Fons canse teo TES bo of ST of 8 char Leo pets d didididi d ddd ddd Microphon KEYBOARD 2 SED z 11 1111 o o 1 p P TER El bo Oo of a pa ess eee rio KEY o ORO 04320 Oo kevo CONDE 9999999 forte 2 bord 9999 bons BF KEY 0 D 043370 07 44 gt KEY 0 KEY 1 ha O Hia 70 OF GF KEY re 3 10 0086 KEY Lo 073470 07 44 gt KEY 1 KEY_2 fo Op 5570 Op ap KEY 2 i GND KEY 2 Oy TO oO KEY 2 KEY_3 Ome TO TO Oa KEY_3 TD 30 Ethernet RRITE pie KEY 3 OO oo 07 gt KEY 3 KEY O 02729 07 GH KEYA TD 0 10BaseT 1 1 UU T va KEY_4 DOE H te 07 3 4 KEY 4 KEY OH Te 0 O OS KEY 5 RD O UUUUTUUUUUUUUU DU UUUU MIC WM 034B KEY 5 O 04320 047 gt KEY 5 KEY_6 Os Tte 0o 3 3570 oi KEYS to ITOITSULLLLOOT aaa EEN KEY_6 OT OF a KEY_6 PUSH TO ao gt KEY_7 m Te arza agoan 22 3399 GND o lo o GND ROTA o l o o o S ROTA RD Co 5605 D RRROUOE 59 GND CR op eo ROTB Hro oiite Of Fy gt ROT LH 88 S 5b 86 GND o O oK end BRT_ADJ 550 OS 0457 BRT_ADJ o Fe e H2V o o o lo 12V y y 24 24 24 241 CONS Rot Push conio 3 10 0098 CONIO FPR_LED o o o o FPR LED ide FPS KEY 25 o 25 25 lo oL 2 5 FPS KEY TIM ANA LED lt 26 Lo of 2 1
27. 6 2 DG5000 SIDE KEYPAD PCB WSM0060B This circuit has 7 push buttons and acts as the interface between the user and the machine The control signals go through connector J702M circuit UPPER KEYPAD and then to the CPU 5 6 3 DG5000 BATTERY 1 PCB WSM0060C This circuit is screwed to the lower battery tank and is only used as an adapter for battery 1 Contacts JP1 JP2 and JP3 form the connection with the battery and connector J306M is used to connect the assembly to the power circuit 5 6 4 DG5000 BATTERY 2 PCB WSM0060D This circuit is screwed to the upper battery tank and is the adapter for battery 2 and the interface for the graph signals 0 48 0065 5 38 June 2005 Technical description of boards 5 7 PACEMAKER BOARD part no WSM0059A 5 7 1 General The pacemaker is an optional feature of DG5000 It is fitted perpendicular to the defibrillator board It is mechanically held in place by two guides that are fixed on the defibrillator board The electrical connection between the pacemaker and the defibrillator is made by two board to board connectors Connector JP1 carries the pulses delivered by the pacemaker and connector JP2 carries the power supply and the pacemaker communication and control signals photo 1 ho TEL UT 1 aa LIU ie a JP2 easy x 2 See E E The pacemaker is controlled from the control keys on the front panel lt has three operating modes and delivers current regulated rectangular pacing p
28. During the pre charge completed and hold phases the stored energy is measured by signal CHVM Signal CHVM is directly taken at the terminals of the HV capacitor by means of resistive dividers with a high ohmic value R251 R252 and R259 and R253 R254 and R206 referenced in relation to the ground The two symmetrical voltages obtained are amplified by differential amplifier U4C TRIGGERING OF THE DEFIBRILLATION SHOCK If during the hold phase the two keys Charge Shock of the handheld paddle electrodes or the Shock key on the front is pressed the defibrillator triggers the defibrillation shock When the two keys Charge Shock of the handheld paddle electrodes or the Shock key on the front of the device are pressed in line DKY2 is connected to the ground When line DKY2 is low patient relays RL2 and RL3 are excited by two independent control channels The first channel for activating the patient relay RL2 RL3 is made up of transistor Q12B and buffer U21D driven by signal UPRA generated by microcontroller U16 When one of the Shock keys is pressed comparator U22D makes signal DDIS2 switch to low Signal DDIS2 is taken into account by microcontroller U16 When signal DDIS2 is active for more than 150ms U16 generates a high level on signal UPRA for 100ms The second channel for activating the patient relay is made up of transistor Q12A that is activated directly by line DKY2 and transistors Q9 and Q10 In order to excite the patient relay the two
29. ECG through the defibrillation electrodes APEX ECG signal from the defibrillation electrode connector Signal APEX is used to acquire the patient s ECG signal through the defibrillation electrodes connected to the defibrillation electrode connector During the defibrillation shock signal APEX is connected to the high voltage circuit of the defibrillator by the patient relay gt signal for acquiring the ECG patient through the defibrillation electrodes INH_PACE Pacemaker Inhibition Logical signal generated by the microcontroller in the floating part of the 10 channel ECG preamplifier circuit for activating an analogue switch in the amplification chain of the ECG signal if pacemaker pulses are recognised Signal INH_PACE is referenced in relation to FGND If pacing pulses are detected signal INH_PACE becomes active for the duration of the pacing pulse gt Input signal INH_PACE ranges from OV to 5V The signal is active when low active at OV 10 Hz 10 Hz Test Signal Logical signal generated by the microcontroller in the floating part of the circuit 10 channel ECG preamplifier circuit which is used to test the ECG acquisition chain when the device is switched on During the test of the ECG signal acquisition chain the 10 Hz signal produces a 10 Hz square signal oscillating between 0 V and 5 V When the 10 Hz signal is inactive it is at 5 V gt The 10 Hz input signal oscillates from 0 V to 5 V during the acquisition chain tes
30. High speed response Low power consumption LVDS interface Applications Information Appliance Industrial Application C Copyright AU Optronics Inc 2004 All Right Reserved G1045N03 V 0 No Reproduction and Redistribution Allowed NJO 2 1 Display Characteristics The following items are characteristics summary on the table under 25 C condition Items Unit Specifications Screen Diagonal inch 10 4 Outline dimension mm 236 0 W x 174 3 H x 5 6 D Active Area mm 211 2 H x 158 4 V Resolution H x V 800 R G B x3 x 600 Pixel Pitch mm 0 264 H x 0 264 V Pixel Arrangement R G B Vertical Stripe Display Mode TN mode Normally White Typical White Luminance ICFL 4 5 mA cd m 230 Typ center Contrast Ratio 500 1 Typ Optical Rise Time Fall Time msec 10 25 Typ Viewing angle CR 10 60 60 35 65 L R U D Nominal Input Voltage VDD Volt 3 3 Typ Typical Power Consumption Watt 3 3 Typ VDD line VCFL line Weight Grams 280 Typ 10 Surface treatment Anti glare hard coating 3H Electrical Interface 1 channel LVDS Support Color Native 262K colors RGB 6 bit driver Temperature Range Operating C 0 to 50 Storage Shipping C 20 to 60 C Copyright AU Optronics Inc 2004 All Right Reserved G104SN03 V 0 No Reproduction and Redistribution Allowed NJO 2 2 Functional Block Diagram The following diagram shows the functional b
31. Ho o o o 1 _FPS_KEY AC_LED o o o o AC LED ll ODOSTSULULLDONTENTIT 6 LI LT ANA LED bo QT ot OS ana ten eo Pow po o S 6 lo 6 GND_POW CON6 CON6 2227550502203 34 dd 7 CONI4 e 8 8 8 Eee a 7 DT TE SN 6660h matanre0000 in 5 ANA_KEY lt A TO OC CANA KEY ONOFF_1 CO 04390 043 gt ONOFF 1 3 10 0092 SO REFREESS 222 o GND_KEY Tat Hr wte GND_KEY ONOFF 2 ST loo H ONOFF_2 1555 l 55 CHA ER GND_CPU to Hr mo H GND 12V w te 94a Ho 70 J603F J105F JP4 GND_CPU CO a SAA END LA Oo HH 3 op ifo Pods ne OND IOP ags fee Orr aa BR St 73 SNP CONIO CONI0 som 999 14 14 14 14 ism 3 10 0103 1302M amp CON3 Adapter for CONI CONI CONI PACE ON CP po OT 1519 22570 PACE ON 1 peer 1 eT roe 1 1304M kb electrodes J604F J106F IPS RS 2 OT GER AO Oa END est 1 F 1 P QRS_TRIGGER 470 047 am TO OF GF 0RS_TRIGGER 3V3 T 04370 04330 ava SEE act HO LU upat2 90 oK mvo2 RxD_PACE CO 9 35H 0 GC RD PACE HV AO Oo Oo sv RES GND 30 LU HDQ B2 L E e TxD_PACE IO oi 0H TxD_PACE HV O H OH av Eg AC2 T o 27 GND CONI CONI CONI sv cpu CS To of 8 nio H sv 24v MOT 20 Ho o 3455 24v mor wzi Lo 1 1 5V_CPU o 3 10 0091 o o 5V 24V_PH lt t 0 O T 24V PH OU vv CHE THa 12 p 10 LIL Se dl Connection to t 3 to 1 PACE POS 12V 216 0 12V i j i a ce 3 10 0089 t
32. U24A U24B and U24C if the paddle electrode cartridge is used Pressing the Analyse key on the front is recognised by means of signal ANAKEY which switches to the low level when the key is pressed OUTPUT SIGNAL INTERFACE The DEFI READY indication LEDs of the handheld paddles are switched on by means of lines READY and READY These signals are generated by transistor Q24 and open collector driver U12F and also buffer U21A driven by signal EPDU generated by the defibrillation microcontroller U16 If the adhesive electrode cartridge is being used the LED of the Analyse key on the front is switched on by line ANALED Line ANALED is driven by transistor Q23 and driver U12A which is driven by signal ANKL generated by defibrillation microcontroller U16 0 48 0065 5 6 June 2005 Technical description of boards 5 2 2 4 DEFIBRILLATOR CONTROL CIRCUIT The defibrillator control circuit part carries out the following functions Self test of the defibrillator part Transfer of information through a serial link to the CPU board Handling of information from defibrillation cartridges Control of the charging of the high voltage capacitor Measurement of the energy stored in the high voltage capacitor Triggering of the defibrillation shock if the Shock key is pressed Control of synchronised shock Determination of patient impedance during defibrillation shocks Control of the pulse biphasic waveform with patient impedance compensation Safety discha
33. are pressed The syncing signal QRSTRIG_DEF is taken from the floating part of the 10 channel ECG preamplifier and transmitted to the defibrillator control circuit by means of an optocoupler in the defibrillator ECG preamplifier part During the first current pulse of the defibrillation wave the high voltage circuit measures the patient current value by means of current transformer TR2 which generates signal IPAT after it is formed This piece of information enables the defibrillator control circuit to determine the patient resistance in order to drive the IGBT control circuit The high voltage circuit also enables the safety discharge of the HV capacitor through a power resistance and the safety discharge relay The safety discharge of the HV capacitor is driven by the defibrillator control circuit signal WDRA The safety discharge may be initiated either directly by the microcontroller of the defibrillator circuit or by information transmitted by the serial link from the CPU board PATIENT INSULATION FROM THE HIGH VOLTAGE CIRCUIT The patient is insulated from the high voltage circuit by means of the open contacts of patient relay RL2 and RL3 of the defibrillator part In the idle position the HV contacts of the defibrillation electrodes are connected to the optional pacemaker if it is present During the 100 ms activation time during the defibrillation shock the pacemaker is disconnected from the defibrillator through working contacts of the
34. cable ties and disconnect the wires Lift off the capacitor using a tool e g screwdriver for leverage as it has been glued in place with strong glue NARRAR ITA CF2HC2 84 9y CF2HC2 12A 3V AU ll il CU Y e f AN gi lili 7 dunt n 4 89 0008 CREHC2 12A 3 i rv BI Um h s cats er 3 ls CEED 4 LEER Y After removing the fully discharged high voltage capacitor from the lower part short the three terminals of the capacitor with conducting wire While replacing the HV capacitor glue it onto the support with a piece of double sided adhesive tape Twist the wires and connect them minding the polarity Also make sure that the wire path is as instructed Check that nothing has been forgotten before you start up the device w Caution This operation relates to an essential component of the high voltage part It may only be performed by specially authorised personnel who have been trained in repairing FRED easy devices The delivered energy must undergo testing 0 48 0065 Page 4 4 June 2005 Replacement of parts 4 3 Reassembling the device Reverse the procedure to reassemble the device Place the boards one layer after the other starting from the bottom Do not forget to connect the various cables Important Follow the connection direction of the DEFI input HV cables refs 4 and 5 see photograph View of front Check if all the boards in their grooves Chec
35. cuve batterie Print batteria Clavier sup rinur wainat 15 WaM144117 Print battere WIM 1744205 Support candensateur Blndage print r tro csiage W3M144 164 _ isolant blilage cran 4144713 Isolanti r sistance de d charge WSM144216 Bingaga CPU Wann 4a2a7 Blindage Spo VIARA14 6218 Blindage ECG sup vizta144220 Blindage CPU fin 6 28 1056 VIIA1AA 224 Blindage stimulateur a i 6 28 0051 waratagzi9 Bindegs ECG inf 4_ 6 28 0055 Wah 144223 Bliedape defi uc 26 W3M144221 Dindaon pr ampk d fi Wen744222 Blindage DEFI OSC W3M1d4252 Bindage CPU PNI version 1 WIM144728 Isvlant blindage CPU PNI NAN 44238 Isalant bindage 5902 WAM144240 isolant blindage ECG 4144247 isolant bandage r tro clairage TETE Bois avant VARSA 4176 Bailes am re Condersateut PA R sistance de d cnarge LCD displa Enregistreur W21144954 Su tactode arri re droit WAMAL10 1 169 45 1 aren Weana4e ten Support Mectrods avant gauche _ 46 1 wsmanso4 Price d fi 0 48 0065 __ Suppart lectrode avant droit i p 21 2 30 41 a is 37 48 G 36 42 i 32 13 2 16 6 E l c 8 A AH Page 4 7 June 2005 Replacement of parts 0 48 0065 WaM144103 VIH 144238 V4M144239 VaM 344240 W4M144100 LM ad 105 8810001 W4M144212 WIMI24188 3 10 0400 _W3M1446204 Blindoge due Ressort de maintien ches Su ippo
36. from microcontroller U27 that triggers the safety latch when the device is powered up before it is tested by the microcontroller Signal SFDU is active for 5 ms gt Input signal SFDU is active when low active at 0 V RFDU Reset Failure Detection Unit Logical signal that directly resets the safety latch to zero after it is tested when the device is powered up Signal RFDU is active for 5 ms gt Input signal RFDU is active when low active at 0 V CHVM Capacitor High Voltage Measurement Analogue signal that makes up the second channel for measuring the charging voltage of the HV capacitor This signal is used to activate the safety latch if there is any fault in stopping the charge The maximum charging voltage must not exceed 3 4 kV gt Signal CHVM ranges from 0 to 4 V maximum gt Scale factor CHVM V U yr V 850 where U yy gt charging voltage of the HV capacitor DUFD Discharge Unit Failure Detection Analogue signal that corresponds to the mid point of the two transistors that activate the patient relay Signal DUFD triggers the safety latch when one or both relay activation transistors conduct for more than 2 5 s That makes it possible to detect any short circuit in one of the two transistors or both gt Input signal DUFD ranges from 0 V to the DC power supply voltage IGFD IGBT Failure Detection Analogue signal that corresponds to the differential potential between the mid points of the two branches
37. is low In synchronised mode signal SYNC is high gt Output signal SYNC is active when high for synchronised shocks 0 48 0065 5 23 June 2005 Technical description of boards SFDU Set Failure Detection Unit Logical signal from the defibrillator microcontroller which trips the safety latch when the device is powered up before it is tested by the microcontroller Signal SFDU is active for 5 ms gt Output signal SFDU is active when low active at 0 V RFDU Reset Failure Detection Unit Logical signal that directly resets the safety latch to zero after it is tested upon power up Signal RFDU is active for 5 ms gt Output signal RFDU is active when low active at 0 V PHASE1_C Phase 1 conduction Logical signal that makes the first phase IGBTs conduct The signal is only generated during the defibrillation shock The Ton Toff ratio of the signal is variable depending on the patient impedance Output signal PHASE1_C is active when high PHASE1_B Phase 1 blocking Logical signal that blocks the first phase IGBTs During the charge pre charge completed and hold phases signal PHASE1_B has a period of 16 ms and is offset by 8 ms in relation to signal PHASE2_B During the shock phase signal PHASE1_B is generated after every 30 ms and offset by 5 ms in relation to signal PHASE2_B When it is active signal PHASE1_B has a duration of 200 us Output signal PHASE1_B is active when high PHASE2_C Phase 2 conducti
38. monitor defibrillator designed for in hospital use It is started up by keeping the On Off key on the upper keypad pressed down for two seconds or more Power supply The device is powered by the mains a battery lithium ion battery only or an external 9 48 VDC power supply It has a fixed battery in the lower slot which can be charged from the mains or the external VDC power supply The capacity of the battery is sufficient for 70 shocks at the maximum energy or 2 hours of monitor operation A second removable battery optional may be inserted in the upper slot to double the life Defibrillation DEFIGARD 5000 is a defibrillator that uses pulse biphasic waveforms Multipulse Biowave The device offers two operating modes the semiautomatic mode called SAD and the manual mode These two operating modes depend on the type of defibrillation cartridge inserted There are three types of cartridge adhesive electrode cartridge internal electrode cartridge and handheld paddle electrode cartridge A window on the screen indicates the defibrillator settings Possibilities offered by the defibrillator Manual defibrillation with adhesive electrodes For manual defibrillation with adhesive electrodes you need to use the cartridge for adhesive electrodes The charge and energy selection buttons are located on the side keypad whilst the shock button is located on the upper keypad Semiautomatic defibrillation with adhesive electrod
39. pacing pulses supplied by the pacemaker output stage This line is reference in relation to PACE_NEG and insulated during the shock by the inverting contacts of the patient relay gt Line PACER_POS corresponds to the pacing pulses generated by the pacemaker 0 48 0065 5 28 June 2005 Technical description of boards vers carte alimentation vers carte CPU vers cassette de d fibrillation JPI 10 20 304 C S V E 3 WY 12V ey JP8 PACER ON OFF E QRS TRIG PACER ey RxD PACER Be ry TxD PACER aa a o7 123 5V CPU Dr y JP2 101RD DER V7 20 5D DER DE uC RST GND CPU LH so PR LED 60 LPS KEY ro eee IES go LANA KEY aol GND CPU 410 GND CPU 1901 SND PU D e O OFF PACER OS TRIG PACER 470 RD PACER 180 D PACER 190 SV U no a lt W E L W a JP3 ae PCIS 30 ELECTR DKYI 40 WREF 2 FRP LED 7 DKY2 33 MODO MODI do READY 100 Te qe READY 120 aac FPS KEY OL CIRCUIT DECOMMANDE DEFIBRILLATEUR TEST_DEFI lt OPTION HZ TEST DEHBRILLATEUR 50 Ohm 50W PACER_ON OFF QRS TRIG PACER RxD PACER TxD_PACER OPTION STIMULATEUR APEX lt A STERNUM lt J PACE POS I gt pe PACE_NEG E CHVM THVM APEX CTFC IPAT STERNUM gt pky2 CIRCUT gt ENVG Potentiel flott
40. switches to high When signal LHVC is high transistor Q5 unlocks the HV generator built around U1 Q6 Q7 and associated components leading to the charging of the HV capacitor 40 UF 3 1 kV by means of the secondary winding of transformer HT TR1 MEASUREMENT OF THE CHARGING VOLTAGE OF THE HV CAPACITOR The charging voltage of the HV capacitor is measured by means of two different circuits The first circuit that measures the charging voltage of the HV capacitor is made up of resistors R251 R252 and R259 and also R253 R254 and R260 which directly take the charging voltage at the terminals of the HV capacitor Signals HV_M and HV_M generated by the resistive divider attack the differential amplifier U4C which supplies signal CHVM used as the measuring signal by microcontroller U16 Signal CHVM indicates the charging voltage of the HV capacitor divided by 850 The second circuit that measures the charging voltage of the HV capacitor only generates a signal during the charging phases of the HV capacitor The measurement signal is taken by means of the primary winding of HV transformer TR1 which reflects the charging voltage of the HV capacitor when transistor Q7 is blocked The signal from the primary winding of TR1 is taken by transistor Q3 and the associated components Stages U2A and U2C make up the forming circuits of the signal supplied by Q3 The output signal from U2C THVM also indicates the charging voltage of the HV capacitor divided by
41. the 12 leads of the ECG the SPO2 curves disappears but the saturation rate remains displayed NIBP function optional The NIBP may be set to Adult or Infant For each configuration you can take manual continuous or cyclical measurements The Sys Dia and MAP values are displayed on the screen Memory function The ECG curve and the trends are saved in a compact flash memory in the device Data transmission function connection for GSM or standard modems is provided for transmitting the 12 lead ECG USB connector is provided for retrieving data from the device An Ethernet link for upgrading software All the connectors are located at the rear of the device Recorder function optional The recorder can print ECG SPO2 or trend curves 0 48 0065 Page 1 8 June 2005 Manufacturer Device type Dimensions Weight Protection case Power supply Voltage Power consumption Battery operation Fuses External power supply Batteriy Battery type Autonomy Environmental conditions Transport storage Operating Display Type Dimensions Printer Resolution Paper Print speed Recording tracks Connections Interfaces D fibrillation pulse form Operation 1 4 Technical specifications SCHILLER MEDICAL DEFIGARD 5000 289 x 271 x 177 mm height x width x depth 5 3 kg IPX 1 100 240 VAC 50 60Hz 120 VA Up to 2 hours option with additional battery up to 4 hours 2 x 200 mAT at 250
42. the Analogue microcontroller that stops the pacemaker 0 48 0065 5 45 June 2005 Technical description of boards PULSE WIDTH OVER RUN safety circuit Signal PACE_MEASURE is applied by means of follower U1A at the input of comparator U2B which forms signal PACE_MEASURE which is used to apply the pacing pulses with currents that are as low as 25 mA The signal delivered by the output of comparator U2B attacks its rising edge at the input of monostable U6A U6A delivers an active pulse with the low status that sets the maximum limit of the pacing pulse width The pulse is applied simultaneously with the signal delivered by comparator U2B to logical gate U4B If the pacing pulse duration exceeds the duration of the pulse generated by monostable U6A the output of logical gate U4B switches to low and triggers latch R S At its PULSE_WIDTH_OVER_RUN output the latch delivers the error signal PACER_FAIL which blocks the transistor that controls the delivery of pacing pulses and cancels the pacing current by modifying the control signal of the current generator At the same time signal PACER_FAIL is also transmitted to microcontroller U13 which transmits the information by means of the serial link to the Analogue microcontroller that controls the stopping of the pacemaker Latch R S is reinitialised by signal FOR_INHIB which is active when low If there is a fault that affects the pacing current by reducing its amplitude beyond 25 mA the CS
43. the ON OFF signal to the ground and starts the device with the help of the CPU Pressing the button once again sets of the device stopping procedure Pressing the Charge Shock button S2 switches signal FPS KEY to the ground Signal FPS KEY is detected by the CPU and depending on the device status it charges the capacitor or triggers the shock Three LEDs LD4 LD5 and LD6 located around the button indicate if the shock is ready Pressing the Analyse button S3 switches signal ANA KEY to the ground Signal ANA KEY is detected by the CPU and if the three LEDs LD7 LD8 and LD9 located around the button are illuminated an analysis is started The pulses of signal CHARGE LED1 make LD1 flash to show the battery charge When high signal DC LED1 switches on LD2 which shows that the external VDC power is present When high signal AC LED1 switches on LD3 which shows that the mains power is present 5 5 3 CPU interface All the signals to the CPU via connector J405M come from the following components Loud speaker J401M Microphone J402 Side keypad J403M Rotating selector J701M Recorder J703 Backlighting J704 0 48 0065 5 37 June 2005 Technical description of boards 5 6 KEYPAD BATTERY BOARD part no WSM0060A 5 6 1 General This circuit is a board made up of three different snap off circuits When the circuits are separated they have separate part numbers namely WSM0060B WSM0060C and WSMO0060D 5
44. triggering channels must be active 0 48 0065 5 10 June 2005 Technical description of boards Direct or synchronised shock operation is defined by the master microprocessor through a piece of information in the serial link In the event of synchronised defibrillation the shock is only delivered in the presence of a syncing pulse on the QRS wave signal QRSTRIG In this operating mode the shock is also given by the two distinct control channels The first of them is made up by microcontroller U16 which in this case generates signal UPRA only when the two keys Charge Shock are pressed and there is a synchronisation pulse on signal QRSTRIG The second channel is made up by gate U7C driven by U16 according to the operating mode direct or synchronous In the synchronous shock operating mode the signal SYNC is high In this case the syncing pulses from U21C and the differentiating network C146 R347 triggers high syncing pulses at the output of U7C These pulses enable the activation of transistor Q10 through open collector driver U12E If in these conditions the Shock key or keys are simultaneously pressed and a synchronising pulse is present the patient relays are activated by transistors Q9 Q10 Q12A Q12B and the associated components The activation duration of patient relays RL2 and RL3 is defined by signal UPRA which lasts 100 ms During the 100 ms of activation of patient relays RL2 and RL3 the patient is connected to the high volt
45. voltage of the HV capacitor must not exceed 3 4 kV gt Signal CHVM ranges from 0 to 4 V maximum gt Scale factor CHVM V U yr V 850 where U pr gt charging voltage of the HV capacitor CTFC Charge Transistor Fault Condition Analogue signal that is used to detect any short circuit in the Charge transistor Q1 which powers the high voltage unit The transistor is considered to have failed when signal CTFC is greater than 1 0 V before the start of the charging of the HV capacitor IPAT Patient Defibrillation Current Analogue signal that corresponds to the measurement of the patient current during a defibrillation shock The signal is used to compensate the pulse biphasic wave according to the patient impedance For a maximum voltage value of 3100 V the maximum patient current is 103 A for a patient impedance of 30 Q gt Signal IPAT ranges from 0 to 4 V maximum gt Scale factor IPAT V peak A 35 where peak patient peak current 0 48 0065 5 22 June 2005 Technical description of boards Defibrillator control circuit output signals TxD_Defi Defibrillator Data Transmitter Logical signal of data transmission from the serial link sent by the defibrillator microcontroller The data are transmitted in frames every 100 ms gt Input signal TxD_Defi is normally high The frames corresponding to the data are active when low ANALED Analyse LED Buffered logical signal that directly controls the swi
46. 0 channel ECG preamplifier the analogue switch U30C is opened by signal INH_PACE_FL in order to limit the continuous component overrun Signal INH_PACE_FL from the 10 channel ECG preamplifier circuit is sent by means of optocoupler U36 Output signal ECG_DEFI_FL is transmitted to the 10 channel ECG preamplifier through optocoupler U37 Stages U26A and U26B make up the ramp wave generator that makes it possible to modulate the cyclical ratio for the transmission of signals from the floating part to the 10 channel ECG preamplifier The ECG signal is demodulated by stages U39A and U39D hysteresis comparator and low pass filter respectively The output signal from U39D ECG DEF is the input source of the ECG signal from the defibrillation electrodes of the 10 channel ECG preamplifier The output signal from U27D that corresponds to the amplitude of the continuous component of the ECG signal is compared with reference limits through window comparator U29A and U29B If the polarisation voltage of the ECG signal is high above 1 V at the input window comparator U29 blocks transistor Q29 which activates analogue switch U30D The activation of U30D leads to the addition of 5V offset voltage through R266 at the inverting adder U51B Under those conditions the patient impedance measurement signal ZPAT becomes equal to 0 V which informs the user by means of a message CONNECT THE ELECTRODES VERIFICATION OF THE ECG SIGNAL ACQUISITION CHAIN The ECG s
47. 05 Technical description of boards ECG PREAMPLIFIER AMPLIFICATION The power supply for the floating part of the ECG preamplifier is generated through voltages VFM and VFM supplied by the 10 channel ECG preamplifier Oscillator U47 controls transformer TR3 through driver U46 The secondary voltages are rectified filtered and regulated by means of linear regulators U44 and U45 The power supply voltages obtained VFD 5 V and VFD 5 V together power all the elements of the floating part connected to the potential of the defibrillation electrodes ECG SIGNAL ACQUISITION The ECG signal collected by the defibrillation electrodes is acquired through following stages U28A U28B and resistive networks made up of R376 R384 The input stage of the ECG preamplifier is protected from the defibrillation shocks by means of sparker E3 and clipping diodes D39 and D40 The clipping diodes are polarised in relation to reference voltages 2 5 VD and 2 5 VD generated by voltage references U32 and U33 AMPLIFICATION AND PROCESSING OF THE ECG SIGNAL The two circuits U27A and U27B make up a differential amplifier with a gain of 4 Capacitor C112 is used to attenuate the amplitude of the 30 kHz sine wave signal used to measure patient impedance The two stages U27C and U27D make up an amplifier with a gain of about 47 with continuous component compensation by elements R301 and C174 If pacemaker pulses are recognised by the microprocessor of the 1
48. 130 150 180 J Internal 2 4 6 8 15 30J Tolerance at 50 Q Tolerance 50 Q 3 J or 15 the higher value is assumed urrent A ns LV 0 1 2 3 5 6 ry 8 9 time ms Charging time for shock with new batteries and after 15 discharges at max energy output From shock recommendation to shock standby 8 s pour 180 J Max energy from analysis efter 15 shocks 258 Max energy after switching on 29s Operating modes Synchronised with heart action 25 ms after R wave Unsychronised AED Cycle time shock shock lt 25s Charge control and monitoring Automatic shock recommendation of analysis in AED mode Using the set wheel on the paddle Using the device s keyboard Patient resistance 30 to 2200 Display of shock standby Key A is lit Shock delivery Safety discharge when the heart rate does not call for defibrillation after 20 seconds of the device indicating its readiness for a shock no shock is delivered there is an electrode fault the battery voltage is insufficient the device is defective the device is turned off 0 48 0065 Page 1 10 June 2005 Operation e Shock delivery Via applied disposable adhesive defibrillation electrodes Via paddles Via spoons e Defibrillation electrode connection External defibrillation Type BF Internal defibrillation Type CF e Defibrillation electrodes Adult electrode 78 cm2 de surface active Paediatric e
49. 162 Wissembourg Tel 33 0 3 88 63 36 00 Fax 33 0 3 88 94 12 82 0 48 0065 Page IV June 2005 DEFIGARD 5000 PRECAUTIONS WHILE TESTING THE DEVICE While testing the DEFIGARD 5000 defibrillator the patient may only be simulated with fixed high voltage and high power resistors that are well insulated from the ground or earth Poorly insulated devices or devices with loose contacts or devices containing components such as spark arresters or electronic flash lamps may never be used as they could irremediably destroy the device 0 48 0065 Page V June 2005 DEFIGARD 5000 CONTENTS 1 Operation 1 1 1 1 Display and controls 1 1 1 2 Explanation of symbols used 1 3 1 3 Device operation 1 5 1 4 Technical specifications 1 9 2 Testing and maintenance 2 1 2 1 Functional testing 2 1 2 2 Cleaning and disinfecting 2 1 3 Troubleshooting 3 1 4 Replacement of parts 4 1 4 1 Device disassembly procedure 4 2 4 2 Replacing the high voltage capacitor 4 4 4 3 Reassembling the device 4 5 4 4 Replacement of parts 4 6 5 Technical description of boards 5 1 5 1 Overall description of the DEFIGARD 5000 5 1 5 2 DEFI BOARD part no WSM0050A 5 2 5 3 CPU BOARD part no 3 2852 5 31 5 4 POWER BOARD part no 3 2653 5 36 5 5 UPPER KEYPAD BOARD part no WSM0062A 5 37 5 6 KEYPAD BATTERY BOARD part no WSMO060A 5 38 5 7 PACEMAKER BOARD part no WSM0059A 5 39 6 Device modifications 6 1 6 1 D finition 6 1 6 2 DEFI BO
50. 25A DATE 2001 03 30 1 APPLICATION This Document Specified The Detailed Product Requirements of Inverter GHO25A 2 SUITABLE LOAD LCD MODULE 10 4 1 LAMP TFT LCD 3 ELECTRICAL CHARACTERISTICS 3 1 Absolute Maximum Ratings ITEM INPUT VOLTAGE Vial sa OV PAE A AAA CE OPERATING TEMPERATURE STORAGE TEMPERATURE RELATIVE HUMIDITY Top 3 2 Control Signal PIN NO SYMBOL STATUS ACTION REMARKS CN1 3 BKLT_ON HIGH LAMP CCFL ON 2 450 20 V LOW LAMP CCFL OFF 0 8V MAX INVERTER SPECIFICATION R amp D GREEN C amp C TECH GHO25A DATE 2001 03 30 373 Output Characteristics ITEM SYMBOL CONDITION SPECIFICATION UNIT Vin1 V BRT RL kQ MIN DC IN our Totnes 12 09 ems f ea f es 70 mais CURRENT Sos ee nes INPUT 80 0 5 0 3 0 4 0 5 ADC CURRENT se E OPEN 2 9 E OUTPUT VOLTAGE 3 4 Test Circuit SW1 ASBL ON B BL OFF INVERTER SPECIFICATION R amp D GREEN C amp C TECH GHO25A DATE 2001 03 30 4 INTERFACE 4 1 CN1 CONNECTOR 53261 0590 MOLEX or Equivalent E O AAA 4 2 CN2 CONNECTOR SMO2B BHSS or Equivalent HOT HIGH LOW INVERTER SPECIFICATION R amp D GREEN C amp C TECH GHO25A DATE 2001 03 30 5 APPEARANCE UNIT mm 95 6 0 8 4 0 6 NOTATION OF LOT NUMBER MARKING BOTTOM OF PCB GH025A GHO25A MODEL NAME YYWWMMM YY YEAR OF PRODUCT 91 92 93 94 00 01 WW WEEK OF PRODUCT 01 02 03 04 54 55
51. 61 Redd C620 a ES Ol E ap o O O C70 L 28 esa E apra Q203 mmmH u201 p20 El 8 Deoa amp J ace UA ecto sein 2 v mp h202 aco E E304 C229 1P200 ma 00 ls lLeodio Le 729 E208 2708 ON ca B Hahaa a E24 E mM E6289 3 o N 9 E Eza GIRAS 5 N ooo ono S Ep o S CZOS N TP100 203 O E214 5 D DIE za 25 SON gan ER R ES oO O ral gt FA C7 8 Q208 1Q20 7 1Q205 0206 Arz lez Sp RE RR SEC En O ga a Q a Ezod ana 08 7S g CALS C a a 224 34 C225 Em a ans u603 amp iS mo E a 9 2 10 R a E CEL R222 fe E Ce A HE Laos U Ual O 9701 5 CE Ez E224 cf pza E 2201 cor B24 223 nn EE en Less 2 g N RES a 558 YE 8253 RE 4200 8 D204 C209 pa Y R o AT 8208 27078 O SD q a DD as 3 IE p203 S 1220 230 Dynes esis A aan E e723 EAS t Jol la a KI a a ED ES ET un b208 cit 8 RES pz S C710 8 e C448 O no ro 209 o ep AE O R256 i200 O O N Q202 5 ADO UR400 x usos T 5 RIRE m Lap N N ISIE del Q209 gt S f E gE 86203 5 ABS y 1 y CEL aak St aS Q408 SSA br BBF a i O Ben p os Sa dar HE 4b oO Sh ok L404 C40 En ED D ES FEL Leo fe O a QUE C406h KUEHLKOERPER KLEIN 2 Jep aao o Sr ial 0 5 yl JJ m50 E e C45 R426 402 EJE 5 z EP cD cD GO cD E N 5 o C416 as eels E 3 ee Ba ek re PRR DD amp R447 R446 es O ra D 7 X Rod 5 C447 HE pol anes a H E ES E 0529 el Pp Bas LE ES BE y fad D 3 E ES ES
52. 850 Signal THVM is used by microcontroller U16 to measure the charging voltage of the HV capacitor in order to stop charging the HV generator The charge stopping is adjusted by means of adjustable P1 HV SWITCHING CIRCUIT BLOCKING During the charge pre charge completed and hold phases the microcontroller generates two signals PHASE1_B and PHASE2_B which actively block IGBTs Q13 Q14 Q15 Q16 Q17 and Q18 of the HV switching circuit The IGBTs are blocked by signals PHASE1_B and PHASE2_B which control the primary current of the IGBT control cores L1 L2 L3 L4 L5 and L6 through drivers U5B U6B and transistors Q19 and Q21 While driving the cores of transistors Q19 and Q21 the secondary windings of the controls cores generate a negative gate voltage in order to effectively block the IGBTs of the two phases GENERATION OF THE BIPHASIC WAVE WITH PATIENT IMPEDANCE COMPENSATION The biphasic wave with patient impedance is generated by means of signals PHASE1_C and PHASE2 C These two signals drive the primary current of the control cores of the IGBTs by means of drivers U5A U6A and transistors Q20 and Q22 The primary current of cores is limited by resistors R237 R420 and R238 R239 While the cores are driven by transistors Q20 and Q22 the secondary windings generate positive gate voltage on the rising edges of signals PHASE1_C and PHASE2_C which makes the IGBTs of phase 1 or phase 2 conduct and negative gate voltage on the falling edges
53. ARD 6 1 6 3 CPU BOARD 6 1 6 4 POWER BOARD 6 2 6 5 UPPER KEYPAD BOARD 6 2 6 6 KEYPAD BATTERY BOARD 6 2 6 7 PACEMAKER BOARD 6 2 7 Diagrams and layout drawings 7 1 7 1 General synoptic 7 1 7 2 DEFI BOARD part no WSM0050A 7 3 7 3 CPU BOARD part no 3 2852 7 6 7 4 POWER BOARD part no 3 2653 7 9 7 5 UPPER KEYPAD BOARD part no WSM0062A 7 11 7 6 KEYPAD BATTERY BOARD part no WSMO060A 7 13 7 7 PACEMAKER BOARD part no WSMO0059A 7 15 7 8 LCD DISPLAY TFT 800X600 part no 4 30 0001 7 18 7 9 LIGHTING BOARD part no 4 24 0003 7 19 0 48 0065 Page VI June 2005 Operation 1 Operation This section briefly outlines the operating of the device For more detailed information please refer to the User s Manual 1 1 Display and controls 1 Loudspeaker 9 ECG patient cable connection 2 ON OFF key 10 NIBP connection 3 Analysis key 11 SOP2 connection 4 Shock key 12 Left paddle 5 Microphone 13 Printer start key 6 Navigation and programming key 14 Paper compartment release 7 Softkeys 15 Adapter module for the different electrodes 8 Right paddle 0 48 0065 Page 1 1 June 2005 16 17 18 19 20 21 22 23 24 25 26 27 Operation Je ne S N 10199400000xx RS 232 9 48V 25 24 23 Indicator when the device is powered from an external constant power source Indicator to indicate that the batteries are charging Indicator when the device connected t
54. CN 12V AMI 20 Support connecteur 124 Fiche tere POAG S615 June 2005 Replacement of parts IDE ARTICLE 6 28 0052 N DE FLAN DESCRIPTION _ W2M144220 Blirdage CPU ni WAMt48719 Bindsgs ECG in 6 28 0951 0 48 0065 Embase Spd Connecteur cassette Connecte cassette _Embase ECG ort Mectrods am re gauche Blindage simulateur em June 2005 Technical description of boards 5 Technical description of boards 5 1 Overall description of the DEFIGARD 5000 Overview of DEFIGARD 5000 DEFIGARD 5000 is made up of the following subassemblies The DEFI board which contains the various digital processing functions specific to the defibrillator the analogue processing functions and the high voltage circuit of the defibrillator The board may also have an optional PACEMAKER board The CPU board which contains the various digital processing analogue processing and saving functions It may also have optional SPO2 and NIBP boards The POWER board which supplies the power required for all the functions Two KEYPAD boards that act as the interface between the user and the device Two BATTERY boards that act as the interface between the batteries and the device An LCD SCREEN with a BACKLIGHTING board that acts as the visual interface between DEFIGARD 5000 and the user 0 48 0065 Page 5 1 June 2005 Technical description of boards 5 2 DEFI BOARD part no WSM0050A
55. ICATION ART WSMO059A K JM PRT WSM0059 PCBI Keno BN pew WSM00soAREFI00 SCHILLER 04 05 04 05 SHT 1 1 MEDICAL s a a Diagrams and layout drawings 7 8 LCD DISPLAY TFT 800X600 part no 4 30 0001 R f rence AUO G104SN03 0 48 0065 7 18 June 2005 NJO 1 0 Handing Precautions _ Since front polarizer is easily damaged pay attention not to scratch it N Be sure to turn off power supply when inserting or disconnection from input connector a Wipe off water drop immediately Long contact with water may cause discoloration or spots S meee was ee CE PRE When the panel surface is soiled wipe it with absorbent cotton or other soft cloth al Since the panel is made of glass it may break or crack if dropped or bumped on hard surface O Since CMOS LSI is used in this module take care of static electricity and insure human earth when handling 7 Do not open nor modify the module Assembly 8 Do not press the reflector sheet at the back of the module to any directions 9 In case if a module has to be put back into the packing container slot after once it was taken out from the container do not press the center of the CCFL Reflector edge Instead press at the far ends of the CFL Reflector edge softly Otherwise the TFT module may be damaged 10 At the insertion or removal of the Signal Interface Connector be sure not to rotate nor tilt the in
56. K c Mesure 1 Q3 HV fo U6 Ka Q7 oe IRF540Z aE G n rateur RL2C RL2B HT Relais patient 1 Protection R215 Preanpli ECG 0 01R 1 77 177 TR2 E Relais re Oscillateur lt 2 d charge a i de s curit 180kHz A Alim Push Pull ARRE IGBT fottante Driver Cassettes de Fo r gulation sfbrillati lin aire d fibrillation Pont en H DE cassette cassette 3 Internes lectrodes Stimulateur ne ELEC DEFI Collables de poings PHASE IGBT Q13 et QI4 partie flottante lectrodes patient us o gt PHASE2 IGBT Q15 Q16 Q17 et Q18 Acquisition 2 et traitenent 9 i du signal ECG D 4 2 PCS A Conmande AA 3 ELECTR 4 O gt el DKT al fibrillateur l 2 FPR LED gt k y ol Stimulateur MODO a r 8 wont R253 RS Grcuit de Pr ampli s INH_PACE a 4 commande ECG d fi 11 gt 12 R254 R252 13 R244 14 KAMTOHONDOS VFM lt t 1 x ATH AAA o p FGND lt t 2 vers vers connecteur pig z E S H Ex moo P Pr anpli cassette de Ae 2e LE PH ELE Y 10HZ lt H 5 ECG e Els Zee 7 5 d fibrillation FACE Tension Commande D tection aces 10 canaux Y AS de charge US U4A d faut Y DEF AV es es partie gt eS Mesure 2 Q19 IGBT phase 1 U4B IGBT vers connecteur JP2 ORS TRIG 9 flottante A Optocoupler m Q20 U4D carte CPU Host 10 HAS lt A CE interfacing T R260 R259 R187 R188 A QRSTRIG_DEF ala gt NZ gt U17 U18 U19 R mo A aceso 77 177 ce a 5 lt A vers A Q ala x Z Z stimulateur l C2 Ile
57. K or a SYNCHRONISED SHOCK depending on the operating mode of the device Signal SYNC drives a transistor in the patient relay activation chain Signal SYNC corresponds to signal SYNC generated by the defibrillator microcontroller and hard coupled to the QRS pulses gt Input signal SYNC is active when low active at 0 V open collector DKY 2 Discharge Key 2 Logical signal that corresponds to the signal from the two Charge Shock keys connected in series of the handheld paddle electrodes or from the Shock key on the front panel if the adhesive electrode cartridge is being used This signal is used to activate the entirely hardware channel for triggering the shock gt Input signal DKY 2 is active when low and when the Charge Shock key or keys is are pressed in 0 V when the key is pressed PHASE1_C Phase 1 conduction Logical signal that makes the first phase IGBTs conduct This signal is only generated during the defibrillation shock The Ton Toff ratio of the signal varies depending on the patient impedance gt Output signal PHASE1_C is active when high PHASE1_B Phase 1 blocking Logical signal that makes the first phase IGBTs block During the charge pre charge completed and hold phases signal PHASE1_B has a period of 16 ms and is offset by 8 ms in relation to signal PHASE2_B During the shock phase signal PHASE1_B is generated after every 30 ms and offset by 5 ms in relation to signal PHASE2_B When it is active signal PHA
58. OUSOS New layout WSM0050_PCB1 goes to WSM0050_PCB2 6 3 CPU BOARD Code article Modifications 3 2652 3 2652 2652 Lac sea 05 017 002 addition of an intermediate assembly to reduce the E up power supply to 3 3 V of pin PWR Modification 05 019 003 3 2652 L4 and L501 are change of 4 7 ohms change the value of R525 Modification 05 024 007 3 2652 BE deletion of R8 and R74 addition of the connections towards J202M pin 1 and 3 Modification 05 025 008 3 2652 change the value of R73 ECG software goes to version 02 01B1 Modification 05 035 010 3 2652 Addition of a resistance of 100K between U620 1 and U627 24 CPLD software goes to version 02 01B1 0 48 0065 6 1 June 2005 Device modifications 6 4 POWER BOARD Code article Modifications 3 2653 3 2653 Modification 05 056 024 change value of R546 and R547 6 5 UPPER KEYPAD BOARD Code article Modifications WSM0062A 6 6 KEYPAD BATTERY BOARD Code article Modifications WSMO0060A 6 7 PACEMAKER BOARD Code article Modifications WSMOO59A 000 1 version S y O 05 020 004 EMONSSA New layout WSM0059 PCBO goes to WSM0059_PCB1 0 48 0065 6 2 June 2005 Diagrams and layout drawings 7 Diagrams and layout drawings 7 1 General synoptic 0 48 0065 7 1 June 2005
59. SCHILLER MEDICAL S A S DEFIGARD 5000 Service Manual Version 01 00 SCHILLER MEDICAL S A S ZAE SUD 4 rue Louis pasteur BP 90050 F 67162 WISSEMBOURG CEDEX T l phone 33 0 3 88 63 36 00 T l copie 33 0 3 88 94 12 82 Internet http www schiller medical com E mail info schiller fr THE ART OF DIAGNOSTICS Part 0 48 0065 DEFIGARD 5000 Revision history of the service manual Version 01 00 June 2005 0 48 0065 Page June 2005 0 48 0065 DEFIGARD 5000 WARNING This manual shall be considered to form an integral part of the device described This technical manual is intended for qualified personnel and describes the operating maintenance and troubleshooting procedures for DEFIGARD 5000 Compliance with its content is a prerequisite for proper device performance and for the safety of the patient and operator The manufacturer shall only be liable for the safety reliability and performance of the device if assembly extensions adjustments modifications or repairs are performed by the manufacturer or by persons authorised by the manufacturer the electrical installation of the facility of use complies with the requirements applicable in the country the device is used in accordance with its instructions for use the spare parts used are original parts from SCHILLER This manual describes the device at the time of printing The supply of this manual does not in any event const
60. SE1_B has a duration of 200 us Output signal PHASE1_B is active when high PHASE2_C Phase 2 conduction Logical signal that makes the second phase IGBTs conduct The signal is only generated during the defibrillation shock The Ton Toff ratio of the signal is variable depending on the patient impedance Output signal PHASE2_C is active when high PHASE2_B Phase 2 blocking Logical signal that blocks the second phase IGBTs During the charge pre charge completed and hold phases signal PHASE2_B has a period of 16 ms and is offset by 8 ms in relation to signal PHASE1_B During the shock phase signal PHASE2_B is generated after every 30 ms and offset by 5 ms in relation to signal PHASE1_B When it is active signal PHASE2_B has duration of 200 us gt Output signal PHASE2_B is active when high PACE_NEG Pacer negative Reference potential of the pacemaker output stage that supplies the pacing pulses optional pacemaker This line is insulated during the shock by the inverting contacts of the patient relay gt Line PACER_NEG corresponds to the floating potential reference of the pacemaker 0 48 0065 9 25 June 2005 Technical description of boards PACE _POS Pacer positive Source of pacing pulses supplied by the pacemaker output stage This line is referenced in relation to PACE _NEG optional pacemaker This line is insulated during the shock by the inverting contacts of the patient relay gt Line PACER_POS correspond
61. T RELAY ACTIVATION TRANSISTORS The detection of faults in transistors Q12A and Q12B that activate the patient relay is achieved by means of signal DUFD If one of the transistors is shorted the idle potential of signal DUFD polarised by resistors R97 and R98 is modified The variation is detected by means of the window comparator made up of U11C and U11D After a duration of about 2 5 s fault latch U10A is tripped by means of U11A U9C and U9A As described above the tripping of the fault latch makes transistor Q25 conduct by means of signal FDUO and therefore the safety discharge of the HV capacitor see previous paragraph Monitoring of the HV switching circuit MONITORING OF THE HV CAPACITOR CHARGE VOLTAGE Overvoltage in the event of a fault in the charge stopping circuit is detected by comparator U9B which monitors the amplitude of signal CHVM When the charging voltage of the HV capacitor reaches approximately 3 3 kV signal CHVM divided by R269 and R273 makes comparator U9B trip which activates fault latch U10A by means of U9A The safety discharge of the HV capacitor and the stopping of the HV generator is achieved as described earlier see previous paragraph Monitoring of the HV switching circuit 0 48 0065 5 15 June 2005 Technical description of boards 5 2 3 CHRONOGRAMS 0 48 0065 5 2 3 1 HV CAPACITOR CHARGE CHARGE REQUEST signal DCIS A r CAE ce PA 0 al L
62. The device is blocked A selection is available to restart all the tests If the tests do not show any error the system starts up nominal operation If on the other hand a blocking error is found the error is displayed on the screen and a sound alarm is emitted till the device is switched off by the operator by pressing Off The device is blocked 2 2 Cleaning and disinfecting Caution Switch the device off before cleaning it Remove the cell before you start cleaning the device in order to eliminate the risk of the device starting up accidentally Also disconnect the defibrillation electrodes of the device before cleaning No liquid shall be allowed to enter into the device However if that does happen the device may not be used before it is verified by the after sales service department The device or electrodes may never be cleaned with substances such as ether acetone esters aromatic chemicals etc Never use phenol based cleaners or cleaners containing peroxide derivatives to disinfect the surfaces of the housing of the device e Dispose of all single use electrodes immediately after use in order to eliminate the risk of accidental reuse disposal with hospital waste e Before cleaning the electrode cables of sensors disconnect them from the device For cleaning and disinfecting wipe the cables with a gauze cloth moistened with cleaner or disinfectant Never immerse the connectors in liquid The cleaning solution used m
63. VAC 2 x 315 mAT at 115 VAC 9 48 VDC max 2 5 A The unit is suitable for use in networks according to IEC 60601 1 2 Lithium ion 10 8 V 4 3 A 70 schocks with maximum energy or 4 hours of monitoring alternately 30 min on 30 min off Temperature 10 to 50 C Relative humidity O to 95 no condensation Atmospheric pressure 700 1060 hPa Temperature 0 40 C Relative humidity 30 95 no condensation Atmospheric pressure 500 1060 hPa High resolution colour LCD 800 X 600 with backlight 214 mm x 158 4 mm 10 4 8 dots mm amplitude axis 40 dots mm time axis at 25 mm s Thermoreactive Z foldet 72 mm width length approx 20 m 25 50 mm s 3 channel display with optimal width of 72 mm ECG patient cable SPO2 PNI RS 232 Analogue for QRS trigger 1 chanel ECG and remote alarm USB Ethernet Biphasic pulsed defibrillation impulse with fixed physiological optimum phase durations Near stabilisation of the emitted energy in function with the patient resistance us ing pulse pause modulation depending on the measured patient resistance 0 48 0065 Page 1 9 June 2005 Operation Standard energy settings Adult 130 130 150 J configurable Paediatric 15 30 50 J configurable automatic switch when the paediatric electrodes are connected Paddle 0 2 4 8 15 30 50 90 130 180 J Adhesive electrodes 2 4 8 15 30 50 70 90 110
64. age circuit of the defibrillator DRIVING THE BIPHASIC WAVE WITH PATIENT IMPEDANCE COMPENSATION The first IGBT control pulse first defibrillation shock pulse is generated 25 ms after the rising edge of signal UPRA That first pulse of signal PHASE1_C makes the first phase IGBTs conduct namely Q13 and Q14 While the IGBTs are conducting the microcontroller measures the patient peak current The patient peak current is measured by means of signal IPAT taken from the patient discharge circuit by current transformer TR2 The signal from the secondary winding of current transformer TR2 is filtered and buffered by U2B and the associated components before it is amplified by U2D to supply signal IPAT From the charging voltage of the HV capacitor signal CHVM and the patient current value signal IPAT microcontroller U16 determines the value of the patient impedance After calculating the patient impedance value microcontroller U16 direct adapts the cyclic ratio of the IGBT control signals to the patient impedance Signals PHASE1_C and PHASE2_C lead to the driving of the IGBTs of the first phase Q13 Q14 and the second phase Q15 Q16 and Q17 Q18 respectively Durations Ton and Toff determined by microcontroller U16 of signals PHASE1_C and PHASE2_C make the IGBTs of the high voltage switching circuit conduct or not in order to generate the pulse biphasic wave with patient impedance After 100 ms signal UPRA deactivates patient relay RL2 RL3 Mi
65. al i Patient rela y URRA activation a i 1 l l 0 T 100 ms J t Patient i i l i current i l l I i lot i i i i Defi state H l 1 1 0 i i t I I WAIT CHARGE READY shock INTERNAL STATE STATE STATE STATE DISCHARGE 1 1 0 48 0065 5 18 June 2005 Technical description of boards 5 2 4 DESCRIPTION OF SIGNALS The names of signals refer to chart DG 5000 Defibrillator circuit 5 2 4 1 ECG PREAMPLIFIER ECG preamplifier input signals VFM Positive floating power supply voltage 5 V supply voltage generated in the floating part of the 10 channel ECG preamplifier circuit gt This power supply voltage ranges from 4 8 V to 5 2 V VFM Negative floating power supply voltage 6 V supply voltage generated in the floating part of the 10 channel ECG preamplifier gt This power supply voltage ranges from 5 5 V to 6 5 V FGND Floating reference potential Reference potential floating ground of the floating part of the 10 channel ECG preamplifier gt Floating reference potential 0 V STERNUM ECG signal from the defibrillation electrode connector Signal STERNUM is used to acquire the patient ECG signal by means of the defibrillation electrodes connected to the defibrillation electrode connector During the defibrillation shock signal STERNUM is connected to the high voltage circuit of the defibrillator by the patient relay gt Signal for acquiring the patient
66. amal nains 5 os ON_OFF_P CO Hy ON_OFF_P VFM Co 044 TO H M 1217F TA S lt o H QRS_TRIGGER 0 043 ORS TRIGGER FGND 9 9370 9477 FOND A ex x a 3 lt 7 o RxD_PACE C O 5 RxD_PACER VFM C O AAA 0 0 vm GND 5 aa g Es a a7 lo TxD_PACE Lo 047 TxD_PACE ECG_DEFI TO H 5 T 4 5 ECG DEFI ALARM OC Lo Connection to okl 3 10 0101 5505 284 k4aoo0d 30 Le gt To os GND_CPU 5 GND_CPU 10HZ lt 0 ST 0 lt lt 10HZ m Te al DC INZOSFERAAZZS oz ZOAN pry oT GND gt end Z_ELEC_DEFI 49 9H 0 Z ELEC DE HH externa 0 gt F00FFFOO 700 0090 HO o PACE_NEG 5V_CPU wte 5V_CPU INH PACE 0 o FO 0477 INH PACE 0 ddd ER GND ollo GND DEFI_AVAILABLE 01104 So 045 gt DEFI AVAILABLE 50 Ek ARS_TRIG F Cheto 55 oS ars TRIG F SYNC_OUT oo buffer fo ho reo o IE Re Kb k BATTERY 2 VREF HO o 3 10 0099 o lo VREF 1e 229 PACE_NEG 10 ECG OUT 0 CONIO CONIO 503 504M gt PACE_POS KEYBOARD 1 OON DBO all si 664664555555 LON 008 Soa 665 NE J401M J405M J204M 1 1 1 1 1 1 J216M O gt SPEAKER_1 SPEAKER_1 2 0 0430 040 SPEAKER_1 3 10 0100 AL24444144441 2 2 SPEAKER 2 SPEAKER 2 HO o 2 2 10 o SPEAKER 2 GND HON 99 19999 ON2 ON OFF zo H 104 ON OFF FTO RS232 3 10 0085 st GND_POW ST Ht H GND_POW s Jo A TAPS PPMP MEN a Aes c GND o e H ono CTS 232 CH 0 zte MICRO_1 MICRO 7 H r H MICRO TXD_232
67. ant DAS HAUTE TENSION O ECG d fi I gt LHVCb I gt EPDU gt UPRAb omom AS D D D A Zan Ft 255 A EL dj Bm SFDU RFDU CIRCUIT DE DETECTION FDUO DEDEFAUT Potentiel flottant du Pr ampli ECG 10 canaux QRS_TRIG_DEF PIMP_DEF Synoptique Defibrillateur DG5000 o A Project 101 DG5000 PCB No WSM0050 Date 14 02 05 Size A3 Dramby RH Art No Sheet 1 of 1 vers pr ampli ECG 10 canaux SCHILLE MEDICAL S A 4 rue Louis Pasteur ZAE Sud BP50 67162 WISSEMBOURG CEDEX 0 48 0065 5 29 June 2005 Technical description of boards TDEF EPDU UPRA IPAT PHASE2_B PHASE2 C Commande d Conmande des D tection rl IGBT phase 2 Q21 U2B Relais patient D37 test D fi PH3 PH4 Ha R sistance Alim se gt gt 4 5V Test D fi U13 TR Circuit HT a 50 Ohm Relais patient 2 Z N RL3B vers JP1 Ql UCHARGE HV JPS carte 1 RES T Convertisseur HT gt ct mr Power e Suppl 0 J2 TRI co ERS 177 Tension z Y m decharge
68. ar shape and the amplitude of the current of the first pacing pulses delivered after the occurrence of the variation are no longer as required The number of non conforming pulses remains limited to three The chronogram below Fig 4 has been obtained for variation of 200 Q to 1000 Q FIG 4 DE ET OT ed Y Sudden increase in patient impedance 5 7 4 2 Measuring circuit The measuring circuit is chiefly made up of an ADC U12 which is controlled by microcontroller U13 through an SPI serial link made up of signals CLK_ADC CS_ADC DI_ADC and DO_ADC The measurement circuit is responsible for measuring the following parameters e Pacing current PACE MEASURE e Charging voltage of capacitor C16 CAPA e Voltage at the patient terminals IMP1 and IMP2 The reference voltage of the ADC is delivered by D16 It is equal to 2 5 V Pacing current PACE MEASURE is measured at the terminals of measuring resistor R66 The voltage developed at the terminals of the measuring resistor by the pacing current is applied by means of follower U1A at the input of ADC U12 Network R55 C33 makes up a low pass filter and R55 R56 in association with D11 offer protection from overvoltage The charging voltage of capacitor C16 is measured by means of measuring bridge R39 R40 and R25 delivered by signal CAPA The signal is applied by means of follower U1D at the input of ADC U12 The charging voltage of capacitor C16 is controlled by the vol
69. ard fault 1 Replace the CPU board NIBP error 1 NIBP module fault 1 Replace the NIBP board DEFIBRILLATOR ERROR MESSAGES Board error 1 DEFI board problem 1 Replace the DEFI board in DEFI window PROCESSOR ERROR 1 DEFI board fault 1 Replace the DEFI board PROGRAM ERROR 1 Program problem with 1 Reload the program DEFI board ERROR DETECTION CIRCUIT ERROR 1 DEFI board fault 1 Replace the DEFI board SELECTED ENERGY 1 DEFI board fault 1 Replace the DEFI board VOLTAGE REFERENCE ERROR SHOCK BUTTON ERROR 1 Problem with handheld 1 Replace the cartridge paddle cartridge 2 UPPER KEYPAD board 2 Replace the UPPER fault KEYPAD board 0 48 0065 Page 3 1 June 2005 Replacement of parts 4 Replacement of parts This section addresses the issue of how to dismantle DEFIGARD 5000 in order to replace faulty parts The warnings below apply to all work inside the device The DEFIGARD 5000 is a defibrillator with a high voltage capacitor that can be charged to a fatal voltage The device may only be dismantled by specially authorised and trained personnel Before any work on an open device you need to IMPERATIVELY CHECK IF THE HV CAPACITOR IS PROPERLY DISCHARGED Caution Before dismantling the device remove the battery or the cell from its slot Caution The device contains circuits sensitive to electrostatic discharge All work on the DEFIGARD 5000 device shall be performed in accordance with ESD rules The repairs shal
70. at 5 V WDRA Energy Dump Relay Activation Logical signal that activates the safety discharge relay of the high voltage unit through a transistor The signal is active during the entire duration of the defibrillation cycle During a battery test signal WDRA is not activated gt Output signal WDRA is active when high active at 5 V LHVC Load High Voltage Capacitor Logical signal that directly activates the HV generator in order to charge the HV capacitor The signal is active throughout the duration of the charging of the HV capacitor till charging stops gt Output signal LHVC is active when high active at 5 V EPDU Enable Patient Discharge Unit Logical signal that switches on the shock delivery hardware circuit through a transistor The signal is active during the entire hold phase till the shock is delivered gt Output signal EPDU is active when high active at 5 V UPRA Micro Controller Patient Relay Activation Logical signal from the defibrillator microcontroller which activates a channel for triggering the patient relay by means of a transistor The signal is active for 100 ms during the defibrillation shock gt Output signal UPRA is active when high active at 5 V SYNC Synchronisation Logical signal that controls either a DIRECT SHOCK or a SYNCHRONISED SHOCK depending on the operating mode transmitted by the microprocessor of the CPU board by means of the serial link In the direct mode signal SYNC
71. ation about the malfunctioning of the defibrillator part Information about the standby phase of the defibrillator part Information about the charging phase of the HV capacitor Information about the pre charge completed status Information about the hold phase of the HV capacitor Information about the application of the shock defibrillation Information about the safety discharge phase Real time information about the energy stored during the charging or hold phase of the HV capacitor Information about operating in direct or synchronous mode Information about the energy delivered during the application of the defibrillation shock Information about the peak current during the application of the defibrillation shock Information about the identification of the defibrillation cartridge put in place and the connection of a pair of adhesive electrodes Information about the pressing of a graph triggering key on the handheld paddle electrodes Information about the pressing of the Analyse key on the front of the device Information leading to a battery test Information about the energy selected if an adhesive electrode cartridge is in use Information about the triggering of the pre charge to the selected energy value Information about the triggering of the charge to the selected energy value Information about the safety discharge of the HV capacitor CONTROL OF THE HIGH VOLTAGE CAPACITOR CHARGE STANDBY PHASE During the standby phase microcontro
72. ation cartridges and controls the functioning of the indicators of the handheld paddle electrodes or the front of the device If the handheld paddle electrode cartridge is being used the input interface circuit generates analogue voltage corresponding to the selected energy signal AWSEL The various signals PCIS DKY1 and DKY2 relating to the pressing of Charge Shock keys in order to set off the charging of the HV capacitor or the defibrillation shock Besides the input interface circuit also supplies a signal when the graph starting key is pressed namely signal RECB The LEDs of the handheld paddles are switched on by signal DEFREADY from the defibrillator control circuit If the adhesive electrode cartridge is being used the signals for energy selection and triggering the charging of the HV capacitor come from the CPU board through the serial link Signal ANAB corresponds to pressing the Analyse key Signal ANAKL is used to control the lighting of the Analyse LED Signals DMPR and DMTP are used to verify the presence of a defibrillation cartridge and for the identification of the type of cartridge by the defibrillator control circuit INPUT SIGNAL INTERFACE The energy selection by means of the knob on the handheld paddles is achieved by analogue voltage WREF made up by divider R101 and R336 in parallel with the resistor put into the circuit by the energy selector in the paddles themselves Signal WREF is buffered by voltage follower U22A before
73. ay be any cleaning or disinfecting solution that is commonly used in hospitals e Proceed likewise with the device housing with a cloth moistened with cleaner or disinfectant No liquid may be allowed to penetrate into the device during the operation 0 48 0065 Page 2 1 June 2005 Troubleshooting 3 Troubleshooting This section addresses the troubleshooting procedures for DEFIGARD 5000 If you have trouble locating or correcting the problem contact the after sales service department of SCHILLER CE If an error message is displayed before you call in a Schiller technician note the error number and restart the device to check that the reason for the problem is not merely a program crash Precautions during troubleshooting While testing the DEFIGARD 5000 defibrillator the patient may only be simulated with fixed high voltage and high power resistors that are well insulated from the ground or earth Poorly insulated devices or devices with loose contacts or devices containing components such as spark arresters or electronic flash lamps may never be used as they could irremediably destroy the device Danger Before any work on an open device you need to IMPERATIVELY CHECK IF THE HV CAPACITOR IS PROPERLY DISCHARGED POSSIBLE CAUSES CORRECTIVE ACTION in the ECG window in the SPO2 window in the NIBP window Analogue board 1 CPU board fault 1 Replace the CPU board 1 POWER board fault 1 Replace the POWER board 1 CPU bo
74. ches on the high voltage unit The transistor is considered to be failing if signal CTFC is greater than 1 0 V before the starting of the charging of the HV capacitor IPAT Patient Defibrillation Current Analogue signal that corresponds to the measurement of the patient current during a defibrillation shock This signal is used to compensate the pulse biphasic wave on the basis of the patient impedance With a maximum charging voltage of 3100 V the maximum patient current is 103 A with a patient impedance value of 30 Q gt Signal IPAT ranges from 0 to 4 V maximum gt Scale factor IPAT V peak A 35 where peak gt patient peak current DUFD Discharge Unit Failure Detection Analogue signal that corresponds to the mid point of the two transistors that activate the patient relay Signal DUFD triggers the safety latch when one of the two relay activation transistors conducts for more than 2 5 s That makes it possible to detect any short circuit in one of the two transistors or both gt Input signal DUFD ranges from 0 V to the power supply voltage of the DC line IGFD IGBT Failure Detection Analogue signal that corresponds to the differential potential between the mid points of the two branches of the H bridge The signal is amplified and its amplitude is compared to a reference limit Signal IGFD triggers the safety latch when the IGBT or IGBTs of one branch of the H bridge conduct s for more than 1 5 s That will enabl
75. col ANALYSIS WAITING Ask analysis No VF CIRCULATION SIGN Wait 1s Wait 3 minutes SHOCK 2 CASYSTOLIE gt Wait 1 minute No No VF CIRCULATION SIGN Manual mode The manual mode is accessible directly when the device is turned on or when the Physician key is pressed while in the semiautomatic mode It unlocks the use of the defibrillator allowing the operator to control the device entirely In the manual mode the user can defibrillate patients synchronously with an ECG Pacemaker optional For the pacemaker function you need to use the cartridge for adhesive electrodes The keys for starting up the pacemaker and setting the pacing frequency or current and the fixed demand or overdrive mode are located on the side keypad If the pacemaker is operating the defibrillation function is disabled ECG function This module is always powered and the ECG signal can be collected with 3 4 or 10 lead cable Depending on the configuration the device can display up to 12 leads at the same time Four amplitude values may be set 0 25 0 5 1 and 2 cm mV as may two signal scanning speeds 25 and 50 mm s The QRS frequency is also displayed 0 48 0065 Page 1 7 June 2005 Operation SPO2 function optional The window of this function is only displayed on the screen when the SPO2 connector is detected by the device The window displays the SPO2 curve and the saturation rate When the screen displays
76. crocontroller U16 deactivates all its outputs signals EPDU WDRA and EHVG are switched to low leading to a safety discharge of the energy remaining in the HV capacitor During the defibrillation shock microcontroller U16 also calculates the energy delivered to the patient and transmits the corresponding information and the value of the peak current and the patient impedance to the master microprocessor of the CPU board SHOCK OUTSIDE THE NOMINAL IMPEDANCE RANGE When the Shock key or keys is are pressed microcontroller U16 first checks the status of signal PIMP which corresponds to the patient impedance range in which the defibrillation shock is permitted When signal PIMP is high the patient impedance ranges from 30 Q to 220 Q and the defibrillation shock is allowed When signal PIMP is low microcontroller U16 does not permit the defibrillation shock and directly leads to a safety discharge of the HV capacitor Signal PIMP is taken from the ECG preamplifier part and transmitted by optocoupler U50 HV CAPACITOR SAFETY DISCHARGE The HV capacitor safety discharge may be initiated either directly by microcontroller U16 when it enters the safety discharge phase or by a safety discharge command from the master microprocessor of the CPU board or by the fault detection circuit by means of fault latch U10A In any event the safety discharge of the HV capacitor is triggered by a return to the low level of signal WDRA 0 48 0065 5 11 June 2005 T
77. d and keyboard APPROV MODIFICATION ART WSM0060A CK NF PRT WSM0060_PCB1 ECL100 ECL100 DGW WSMO060AREF100 SCHILLER 01 05 01 SHT 1 2 MEDICAL S A S WSM0060D kkkk 000 000 sx 30900NSM O kkkk 000 VWSM0060B DRAWN APPROV MODIFICATION CK NF ECL100 01 05 ECL100 01 05 DEFIGARD 5000 Circuit batterie et clavier Battery board and keyboard ART WSMO0060A PRT WSM0060 PCB1 DGW WSMO060AREF100 S C HILLER 2 2 MEDICAL S A S Diagrams and layout drawings 7 7 PACEMAKER BOARD part no WSM0059A 0 48 0065 7 15 June 2005 Diagrams and layout drawings WSM0059_PCBO 0 48 0065 7 16 June 2005 R65 R74 cz ers_ R2 RI o A Fc uag O uz ERIZ CRI E a3 ci
78. e SPO2 1 100 PP 25 240 min Displayed range 1 100 e Saving ECG 1 hour Events 500 0 48 0065 Page 1 11 June 2005 Testing and maintenance 2 Testing and maintenance This section describes the test and maintenance procedures recommended with DEFIGARD 5000 2 1 Functional testing The device runs an automatic test every time is switched on The test lasts less than 5 seconds and consists in checking all the hardware functions If a blocking error is found an error message is displayed on the screen and a sound alarm is emitted till the device is switched off by the operator by pressing the Off key The device is blocked and goes off automatically after five minutes The device can run a periodic automatic test at a configurable frequency That automatic test may be daily weekly or user defined by indicating the number of days between two tests 1 to 30 days A key for immediately starting up the test is available as well During the self test all the hardware functions and the battery charge status are tested No information is displayed on the screen during the test The test result is saved and can be retrieved subsequently The last 30 tests are saved If the tests do not show any error the system goes off automatically If on the other hand a serious error is found a sound alarm is emitted for 10 seconds every 2 minutes till the device is switched on again At that time the error is displayed on the screen
79. e Tmin 100 ms t signal 0 t signal PHASE2_B NN 0 t signal 0 l t I UCHARGE i Drain Charge UBATT Transistor gt 0 t signal WEAS Internal discharge relay activation gt 0 t I LHvc I I I I l VDS i a Switching stc ins t ON EU i beea 70 V transistor i I I i UBATT 0 I t l signal I Mers VREF 3 65 V 0 End of charge t signal 3 65 V on pour U HT 3101 V 180J CHVM 3101 850 3 65 V 0 t 5 16 June 2005 Technical description of boards 5 2 3 2 HV CAPACITOR PRE CHARGE AND CHARGE Semiautomatic mode operation Beginning of charge signal we EHVG signal WDRA Tmax 20s signal LHVC signal Tmax 15 s EPDU 50 ms Tmax 20 s t H i UDISCHEN UBATT Drain Discharge Enable Transistor signal PHASE1_B signal PHASE2_B 0 Defi state WAIT CHARGE CHARGE READY INTERNAL STATE STATE STATE STATE DISCHARGE STATE PRE CHARGE READY STATE 0 48 0065 9 17 June 2005 Technical description of boards 5 2 3 3 HOLD PHASE AND DEFIBRILLATION SHOCK signal EHVG 0 I pS signal WDRA 0 1 l t I signal l LHVC l I i i 0 50 ms pot 1 i 1 i signal EPDU 1 j i I 0 i 50 ms t I UDISCHEN i 11 i Drain Q12B l i I I I i 0 i ot i I Button l SHOCK button i CHARGE SHOCK dipressed a l i gt 0 T min 150 ms 16sec I i i i i sign
80. e for the safety reliability and performance of the device if assembly configuration modifications extensions or repairs are made by personnel from SCHILLER MEDICAL or personnel duly authorised by SCHILLER MEDICAL the device is used in accordance with its instructions for use e Any use of the device other than as described in the instructions for use shall be made at the exclusive risk of the user e This manual covers the device version and the safety standards applicable at the time of printing All rights reserved for the circuits processes names software and devices appearing in this manual e The quality assurance system in use in the facilities of SCHILLER meets international standards EN ISO 9001 and EN 46001 e Unless otherwise agreed in writing by SCHILLER no part of the manufacturer s literature may be duplicated or reproduced 0 48 0065 Page lll June 2005 DEFIGARD 5000 Safety symbols used on the device Danger High voltage Conventions used in the manual indicates an imminent hazard which if not avoided will result in death or serious injury to the user and or others Warning indicating conditions or actions that could lead to device or software malfunctioning Useful information for more effective and practical device operation Additional information or explanation relating to the paragraphs preceding the note Manufacturer SCHILLER MEDICAL SA 4 rue Louis Pasteur ZAE sud F 67
81. e patient impedance measurement chain via the defibrillation electrodes Signal PIMP_DEF is referenced in relation to GND Signal PIMP_DEFI is high when the patient impedance is located between 30 Q and 220 Q Out of these limits the signal is low gt Signal PIMP_DEF ranges from 0 V to 5 V QRSTRIG_DEF Defibrillator QRS Trigger Signal Logical signal from signal QRS_TRIG_F transmitted by the microcontroller in the floating part of the 10 channel ECG preamplifier circuit Signal QRSTRIG_DEF is referenced in relation to GND Signal QRSTRIG_DEF is active during the QRS wave gt Signal QRSTRIG_DEF ranges from 0 V to 5 V The signal is active when low active at O V 5 2 4 2 DEFIBRILLATOR CONTROL CIRCUIT Defibrillator control circuit input signals PCIS Paddle Charge Input Signal Signal used to trigger the charge with the two Charge Shock buttons of the handheld paddle electrodes gt Input signal PCIS is active when low when either of the Charge Shock keys is pressed OV if the key is pressed ELECTR Sticking electrode connected Logical signal to detect the connection of defibrillation electrodes into the adhesive electrode cartridge gt Input signal ELECTR is active when low when a pair of adhesive electrodes is connected to the cartridge OV if electrodes connected DKY 1 Discharge Key 1 Signal corresponding to the mid point of the two Charge Shock keys connected in series of the handheld paddle electrod
82. e reception of data through the serial link from the microprocessor of the CPU board The data are transmitted in frames every 500 ms gt Input signal RxD_PACER is normally high The frames corresponding to the data are active when low PACER_ON OFF Pacemaker On Off Logical signal from the CPU board via an optocoupler which is used to control the starting or stopping the pacemaker function gt Signal PACER_ON OFF ranges from 0 to 12 V The signal is active when low pacemaker operating QRS_TRIG_PACER QRS Trigger for Pacemaker Logical signal for QRS wave synchronisation from the CPU board This signal is used for the Demand operating mode of the pacemaker gt Signal QRS_TRIG_PACER ranges from 0 to 5 V The signal has a duration of 100 ms and is active when high active at 5 V Pacemaker output signals TxD_PACER Pacemaker Data Transmitter Logical signal relating to the transmission of data through the serial link from the pacemaker microcontroller The data are transmitted in frames every 500 ms gt Input signal TxD_PACER is normally high The frames corresponding to the data are active when low PACE_NEG Pacemaker negative Reference potential of the pacemaker output stage which supplies pacing pulses This line is insulated during the shock by the inverting contacts of the patient relay gt Line PACER_NEG corresponds to the floating reference potential of the pacemaker PACE_POS Pacemaker positive Source of
83. e safety latch is voluntarily triggered upon powering up by signal SFDU to check its proper operation If any hardware faults are detected the fault latch is tripped by one of the input signals CHVM DUFD IGFD When the latch is triggered signal FDUOS is high gt Input signal FDUOS is active when high active at 5 V PIMP Patient Impedance Out of Range Logical signal from the patient impedance measurement chain Signal PIMP is high when the patient impedance is located between about 30 Q and 220 Q Outside these limits the signal is low gt Input signal PIMP is located between 0 V and 5 V QRS Defibrillator QRS Trigger Signal Logical signal from signal QRSTRIG_DEF transmitted by microcontroller in the floating part of the 10 channel ECG preamplifier Signal QRS corresponds to buffered signal QRSTRIG Signal QRS is active during the QRS wave gt Signal QRS is active when low active at 0 V MCLR Master Clear Defibrillator Microcontroller Logical signal for resetting the defibrillator microcontroller when the device is switched on or through the microprocessor of the CPU board gt Input signal MCLR is active when low RxD_Defi Defibrillator Data Receiver Logical signal of data reception from the serial link sent by the microprocessor of the CPU board The data are transmitted in frames every 100 ms gt Input signal RxD_Defi is normally high The frames corresponding to the data are active when low
84. e the detection of a possible short circuit in the IGBTs of the HV switching stage gt Signal IGFD is active when low active at 0 V APEX Apex electrode of the defibrillator connector Connection between the defibrillator pacemaker part and the patient by means of the patient electrode connector This connection makes it possible to collect the ECG signal from the patient perform cardiac defibrillation and pacing if the optional pacemaker is installed gt Line APEX is connected to the floating potential of the pacemaker by the inverting contacts of the patient relay During the defibrillation shock patient relay active the pacemaker is disconnected from the defibrillator HV circuit 0 48 0065 5 26 June 2005 Technical description of boards STERNUM Sternum electrode of the defibrillator connector Connection between the defibrillator pacemaker part and the patient by means of the patient electrode connector This connection makes it possible to collect the ECG signal from the patient perform cardiac defibrillation and pacing if the optional pacemaker is installed gt Line STERNUM is connected to the floating potential of the pacemaker by the inverting contacts of the patient relay During the defibrillation shock patient relay active the pacemaker is disconnected from the defibrillator HV circuit 5 2 4 4 FAULT DETECTION CIRCUIT Fault detection circuit input signals SFDU Set Failure Detection Unit Logical signal
85. echnical description of boards 5 2 2 5 HIGH VOLTAGE CIRCUIT The high voltage circuit part carries out the following functions Patient insulation from the high voltage circuit Charging the HV capacitor to the defined energy value Measuring the HV capacitor charging voltage Blocking the high voltage switching circuit Generating the pulse biphasic wave with patient impedance compensation Measuring the peak value of the defibrillation current Safety discharge of the HV capacitor OVERALL DESCRIPTION The high voltage circuit insulates the patient from the high voltage unit of the defibrillator by means of two patient relays The defibrillator charging circuit is directly powered by the DC voltage from the power circuit Power Board The high voltage unit is activated by the Charge transistor signal EHVG The HV capacitor is charged by the HV generator signal LHVC When the HV capacitor is charged the safety discharge relay is also activated signal WDRA During the charging of the HV capacitor the HV generator supplies a signal to measure the charge voltage by the primary winding of the HV converter signal THVM The signal is used by the defibrillator control circuit to determine the energy stored in the HV capacitor When the energy stored in the HV capacitor is equal to the selected energy the HV generator is deactivated which stops the charge When the defibrillator is in the hold phase the charge voltage is measured by two symm
86. efibrillation electrodes handheld paddles or adhesive electrodes The amplified ECG signal and the patient impedance signal are sent by an optocoupler to the floating ECG part of the 10 channel ECG preamplifier The signals are transmitted by cyclic ratio modulation The 10 channel ECG preamplifier therefore receives two possible sources of ECG signals the ECG signal through the patient cable and the ECG signal through the defibrillation electrodes The 10 channel ECG preamplifier directly controls the defibrillator ECG preamplifier if pacemaker pulses are detected signal INH_PACE The test of the ECG signal acquisition chain by the defibrillation electrodes is also controlled by the 10 channel ECG preamplifier board during the self test of DG5000 10 Hz signal The QRS signal detected and formed by the 10 channel ECG preamplifier is sent by an optocoupler to the defibrillator control circuit in order to control working during cardioversion signal QRSTRIG_DEF The defibrillator ECG preamplifier part measures the patient impedance through a 30 kHz sine wave signal After processing the signal with the patient impedance value is sent to the 10 channel ECG preamplifier The defibrillator ECG preamplifier circuit has a window comparator where the output signal is used by the defibrillator control circuit in order to authorise the defibrillation shock only if the defibrillation electrodes are glued correctly signal PIMP_DEF 0 48 0065 5 3 June 20
87. efibrillator The pre charge process is identical to the charge process and the maximum duration of the pre charge phase is 20 s When the energy stored in the HV capacitor is equal to the selected energy microcontroller U16 enters the pre charge completed phase PRE CHARGE COMPLETED PHASE After the pre charge phase the defibrillator enters the pre charge completed phase During this pre charge completed phase microcontroller U16 calculates the energy stored in the HV capacitor by means of signal CHVM and stands by for a new charging request During the pre charge completed phase signal EPDU remains low and the defibrillation charge is not validated The maximum duration of the pre charge completed phase is set to 15 s After that time microcontroller U16 triggers a safety discharge of the HV capacitor by deactivating all the outputs If during the pre charge completed phase U16 receives a new signal requesting a charge to the selected energy the microcontroller goes back to the charge phase by activating signal LHVC MEASUREMENT OF THE ENERGY STORED IN THE HIGH VOLTAGE CAPACITOR The energy stored in the HV capacitor is measures by means of two independent signals THVM and CHVM During the HV capacitor charge sequences the stored energy is measured by signal THVM Signal THVM comes from the primary winding of the HV converter and is formed by Q3 U2A and U2C Signal THVM is directly proportional to the charge voltage of the HV capacitor
88. erates signal UPRA only in the presence of a synchronisation pulse in relation to the QRS wave signal QRSTRIG If the adhesive electrode cartridge is being used the energy is selected in manual mode by means of the function keys on the front of the device and the selected energy value is transmitted by the CPU board to the defibrillator microcontroller by means of the serial link 0 48 0065 5 7 June 2005 Technical description of boards In the SAD operating mode the microcontroller of the defibrillator control circuit checks if the Analyse key of the front has been pressed signal ANAB and transmits the corresponding information through the serial link to the CPU board If the master microprocessor of the CPU board recognises VF VT the CPU board sends a request for pre charging and the selected energy through the serial link That pre charge control starts off the process of charging the HV capacitor as described above When the energy stored is equal to the selected energy the microcontroller stops the HV generator and the defibrillator circuit is located in the phase when the pre charge is completed where the defibrillation shock is as yet not authorised During that phase the microcontroller measures the energy stored in the HV capacitor by means of signal CHVM If during the previous phase an analysis of the ECG signal of the CPU board confirms VF VT the CPU board sends a new request for charging to the defibrillator circuit The de
89. es gt Input signal DKY 1 is active when low when the Charge Shock key connected to the ground is pressed 0 V if the key is pressed WREF Energy Reference Analogue reference voltage that corresponds to the energy value selected by means of the energy selector of the handheld paddle electrodes gt Input signal WREF ranges from 0 to 4 V FPR_LED Front Panel Ready Led Signal that directly controls the lighting of the LEDs corresponding to the Defibrillator Ready phase in the Shock key on the front This signal is interconnected to the Ready signal in the adhesive electrode cartridge gt Signal FPR_LED is active when high 5 V for lighting the LEDs 0 48 0065 5 20 June 2005 Technical description of boards DKY 2 Discharge Key 2 Logical signal corresponding to the signal from the two Charge Shock keys connected in series of the handheld paddle electrodes or from the Shock key on the front of the device if the adhesive electrode cartridge is being used This signal is used activate the entirely hardware channel for triggering the shock gt Input signal DKY 2 is active when low when the Charge Shock key s is are pressed 0 V if key pressed MOD 0 Defibrillator Module Presence Logical signal used to verify the presence of a defibrillation cartridge gt Input signal MOD 0 is active when low 0 V if cartridge present MOD 1 Defibrillator Module Type Analogue signal that is used to identify the type of defibrillati
90. es The same cartridge is used with adhesive electrodes The device must offer the semiautomatic function Adhesive electrodes are available for children and adults The device recognises the type of electrode applied and selects the defibrillation energy levels accordingly The control buttons for analysing and shock delivery are located on the upper keypad Internal manual defibrillation optional Use the cartridge that offers the facility to use the internal defibrillation paddles The charge and energy selection buttons are on the side keypad The shock button is located on the upper keypad Manual defibrillation with handheld electrodes optional Use the handheld electrode cartridge The charge shock button and the energy selection button can be found on the electrodes Semiautomatic mode In the SAD mode the user takes action on the basis of the messages sent by the system in accordance with AHA ERC protocols At any time except during CPR if an electrode fault is detected the AHA ERC protocol is stopped It is resumed when the fault disappears During the analysis which is set off by pressing the Analyse key if a loose contact is detected the analysis is interrupted throughout the duration of the fault It is automatically resumed when the fault disappears After an initial analysis if the analysed ECG signal is too weak a message asks the user to apply CPR cardiac pulmonary resuscitation for one minute The display las
91. es the level between control signal PACE_PULSE_CTRL and transistor Q5 that controls the delivery of pacing pulses Signal PACE_PULSE_CTRL affects the current generator adjustment voltage by means of transistor Q9 During the pacing pulse delivery phase transistor Q9 remains blocked and has no effect on the current generator adjustment voltage Away from the pacing pulse delivery phase transistor Q9 is saturated and forces the current generator adjustment voltage to zero Signal FOR_INHIB delivered by microcontroller U13 is used as the reset signal of latches R S of the safety circuits It also controls the disabling of the FREQUENCY OVER RUN safety circuit when the pacemaker is operating in Demand mode Error signal PACER_FAIL delivered by the safety circuits informs microcontroller U13 of the triggering of a safety circuit Signal PWM_I_SET delivered by microcontroller U13 controls the pacing pulse current It acts by modulating the pulse width The low pass filter built around U3B generates analogue signal ANALOG _I_ SET from the pulse width modulated signal for adjusting the current generator current The time constant by R53 R54 R64 and C25 controls the rising edge of the pacing pulse current 0 48 0065 5 47 June 2005 Technical description of boards 5 7 5 Description of signals Signal Description ANALOG_I_SET Analogue pacing current adjustment signal CAPA Analogue capacitor charge voltage measuring signal CLK_ADC Cl
92. etrical high voltage dividers at the terminals of the HV capacitor signal CHVM The two HV dividers are referenced in relation to the ground During the charge and hold phases the high voltage circuit actively blocks the IGBTs of the HV switching circuit by means of the pulse transformers associated with the IGBTs The active blocking of the IGBTs is controlled by the microcontroller signals PHASE1_B and PHASE2_B During the entire duration of the hold phase the activation of the patient relay control stage is authorised signal EPDU When the two keys Charge Shock are pressed on the handheld paddle electrodes are pressed simultaneously or the Shock key on the front is pressed the defibrillator control circuit activates the patient relay for 100ms signals UPRA and DKY2 The IGBT control circuit controls the high voltage switching stage with IGBTs in order to generate the pulse biphasic wave with patient impedance compensation signals PHASE1_C and PHASE2_C In the event of synchronised defibrillation shock synchronisation is also driven by two distinct channels The first of these is made up of signal SYNC and it directly activates the patient relay if a synchronisation pulse is present on the QRS wave while the two Charge Shock keys are pressed The second channel is made up of the microcontroller which generates the UPRA signal in the synchronised defibrillation mode only if the there is a QRS synchronisation pulse and the two keys Charge Shock
93. f transistor Q11B and signal EPDU generated by open collector driver U12C MEASURING THE DEFIBRILLATION PEAK CURRENT During the first control pulse PHASE _C of the IGBTs generated by microcontroller U16 IGBTs Q13 and Q147 are made to conduct During this conduction time microcontroller U16 acquires the value of the peak current in order to determine the patient impedance value The defibrillation peak current is measured by means of current transformer TR2 which is located in the patient discharge circuit Signal IPAT_M taken at the terminals of the secondary winding of the current transformer loaded by R262 R263 and C71 attacks follower U2B by means of a protection and clipping network to generate signal IPAT after amplification by U2D Signal IPAT has the value of the peak defibrillation current divided by about 35 P4 adjustment function SAFETY DISCHARGE OF THE HV CAPACITOR The safety discharge of the HV capacitor is achieved by means of the safety discharge relay RL1 and power resistor R240 When signal WDRA generated by microcontroller U16 switches to low transistor Q11A is blocked In that case the coil of the safety discharge relay RL1 is de excited which closes the contacts of the relay and the safety discharge of the HV capacitor into power resistor R240 5 2 2 6 FAULT DETECTION CIRCUIT The fault detection circuit part carries out the following functions e Detection of hardware faults in the critical components of the def
94. fibrillation or ventricular tachycardia An ECG microcontroller processes the data from the ECG chain and sends them to the ANA microcontroller 0 48 0065 5 33 June 2005 Technical description of boards 5 3 4 Connectors The picture below shows the connectors of the CPU board of DG5000 USB DEFI RS232 CE ETHERNET jte BDM LPT Compact Flash BDM v we para q AA SL GAO ray CH 4 CPLD CPU LCD ANA Ah ah NIBP ECG SPO2 DEFI 0 48 0065 5 34 June 2005 Technical description of boards 5 3 4 1 Components The picture below shows the main components of the CPU board of DG5000 UART ETHERNET USB RAM CPLD OKI Ethernet transfor BUZZER microcontroller 188 da g k ana LCD controller RTC LVDS transmitter H8 ON anm en ANA microcontroller ECG ANA microcontroller UART Data buffer 0 48 0065 5 35 June 2005 Technical description of boards 5 4 POWER BOARD part no 3 2653 The part number of this circuit is 3 2653 or WSMOO65A 0 48 0065 5 36 June 2005 Technical description of boards 5 5 UPPER KEYPAD BOARD part no WSM0062A 5 5 1 General This circuit is located at the top of the front housing lt enables the user to control the device through a foil and to see the proper execution of certain functions by means of indicators The circuit also includes a CPU interface function 5 5 2 Control and display Pressing the On Off button S1 switches
95. fibrillator control circuit once again activates the HV generator signal LHVC till the new selected energy is reached When the energy stored in the HV capacitor is equal to the selected energy the microcontroller stops the HV generator and authorises the defibrillation shock signal EPDU In that case the Defi Ready LEDs of the Shock key on the front go on and the defibrillation shock is triggered by pressing by the Shock button SELF TEST OF THE DEFIBRILLATOR PART The defibrillator control circuit part is powered by the 5V voltage that is generated independently by linear regulator U13 When the DG 5000 device is started up circuits U12D and U7D generate a reset of the microcontroller of the defibrillator control circuit The 5V power voltage is monitored by the BOR function integrated to microcontroller U16 which resets U16 if it fails when the voltage drops below 4 5 V The master microprocessor of the CPU board can also generate a reset of U16 through signal DE_pC_RST that drives optocoupler U19 The voltage reference of the ADC internal to U16 is made up by U20 When the DG 5000 device is switched on microcontroller U16 of the defibrillator control circuit runs a self test of the defibrillator part During the self test microcontroller U16 does the following e Configuration of input output ports Check of the proper operating of the serial link with the CPU board Check of program integrity Check of the proper operating of the fau
96. ge by the charge signal from the master microprocessor to the serial link When charging is triggered microcontroller U16 checks the Charge transistor Q1 through signal CTFC After verifying signal CTFC microcontroller U16 activates Charge transistor Q1 and Q2 through signal EHVG and open collector driver U12B The activation of Q1 generates the high current power voltage of the HV generator UCHARGE from the DC voltage supplied by the Power Board That UCHARGE voltage is protected by fuse F1 The activation of transistor Q2 generates the power supply voltage of chopping regulator U1 Microcontroller U16 also activates signal WDRA which excites the safety discharge relay RL1 by means of buffer U21E and transistor Q11A After a 50 ms time microcontroller U16 activates the HV generator by means of signal LHVC and buffer U21B When all the conditions are met the HV capacitor starts charging The maximum time of the charge initiated by signal DCIS or a charge command via the serial link is limited to 30 s in the event of a problem after which U16 triggers the safety discharge of the HV capacitor by deactivating all the active outputs 0 48 0065 5 9 June 2005 Technical description of boards In order to actively block the IGBTs of the HV switching circuit microcontroller U16 also generates two signals PHASE1_B and PHASE2 B with a period of 16 ms and a duration of 200 us The two signals PHASE1_B and PHASE2_B generate blocking pulses in the c
97. gnal CTFC Signal CTFC corresponds to the voltage present on the drain of Q1 divided by R140 and R141 During the self test signal CTFC must be close to 0 V The charging voltage of the HV capacitor is verified by means of signal CHVM also via analogue multiplexer U14 During the self test the charging voltage of the HV capacitor must be close to 0 V HV capacitor discharged In a fault is detected during the self test microcontroller U16 sends an error message to the CPU board by means of the serial link In that case U16 deactivates all the outputs so as to block the operating of the high voltage part of the defibrillator When the defibrillator circuit self test is completed without detecting a fault the defibrillator enters the standby phase 0 48 0065 5 8 June 2005 Technical description of boards EXCHANGE OF INFORMATION BY THE SERIAL LINK WITH THE CPU BOARD The transfer of information between the CPU board and the defibrillator part is achieved by means of a serial link In the defibrillator circuit the serial link is directly managed by microcontroller U16 signals RxD and TxD The transmission of the information from the serial link to the CPU board is achieved by means of optocouplers U17 and U18 The dialogue through the serial link takes place by sending a frame every 100ms The serial link transmits the following information e Information for testing proper communication between the CPU board and the defibrillator Inform
98. hannel preamplifier Used for the Demand operating mode Active when high RxD_PACER_FLOAT Reception signal of the RS 232 serial link of the floating part Signal transmitted by the Analogue microcontroller to the Pacer microcontroller TxD_PACER_FLOAT Transmission signal of the RS 232 serial link of the floating part Signal transmitted by the Pacer microcontroller to the Analogue microcontroller RxD_PACER Reception signal of the RS 232 serial link Signal transmitted by the Pacer microcontroller to Analogue microcontroller TxD_PACER Transmission signal of the RS 232 serial link Signal transmitted by the Pacer microcontroller to the Analogue microcontroller 0 48 0065 5 48 June 2005 Device modifications 6 Device modifications 6 1 D finition ECL ECL is the board modification index There are two types of ECG numbering One has three digits PNN P board version number incremented with each re routing operation NN incremented with each modification on the board NN is reset to 00 when the P version changes The other contains two letters PN of the board P board version number incremented with each re routing operation N incremented with each modification on the board N is reset to A when the P version changes 6 2 DEFI BOARD Code article Modifications WSMO0050A WSMO0050A Modification 05 016 001 addition of C181 et C182 Modification 05 021 005 PEM
99. he delivery of packing pulses by means of the OR gate made up of D12 D13 and R65 and cancels the pacing current by modifying the current generator control signal At the same time signal PACER_FAIL is also transmitted to microcontroller U13 The triggering of a safety circuit leads to the stopping of the pacemaker and the display of CS anerror message The boundary values of the pacing pulse parameters are monitored from signal PACE MEASURE The signal carries information about the amplitude of the pacing pulse current the width of the pacing pulse and the frequency of the pacing pulses The comparator built around U2B logically forms signal PACE_MEASURE It makes it possible to recognise pacing pulses with current amplitude below 35 mA CURRENT OVER RUN safety circuit Signal PACE MEASURE is applied by means of follower U1A at the input of comparator U2A The comparison limit of U2A which is achieved by the divider bridge made up of R63 and R68 sets the limit of the pacing current that triggers the CURRENT_OVER_RUN safety When the limit has been overrun the output of comparator U2A triggers latch R S which delivers error signal CURRENT_OVER_RUN By means of diode D2 this signal generates signal PACER_FAIL that blocks the transistor that controls the delivery of pacing pulses and cancels the pacing current Signal PACER_FAIL is also transmitted to microcontroller U13 which transmits the information by means of the serial link to
100. ibrillator OVERALL DESCRIPTION The fault detection circuit monitors the critical fault conditions that may be generated by a technical fault in the defibrillator part When the DG 5000 device is switched on the defibrillator control circuit tests the fault detection circuit to verify proper operation signals SFDU and RFDU The fault detection circuit monitors the following fault conditions e Abnormal leakage currents from the IGBT switching circuits signal IGFD e Short circuit in the patient relay activation transistors signal DUFD e Charging voltage of the HV capacitor out of the limits signal CHVM The various fault conditions above trigger latch U10A which directly deactivates the whole high voltage unit and also leads to a safety discharge of the HV capacitor The safety latch also supplies a fault signal to the defibrillator control circuit microcontroller signal FDUO which deactivates all its outputs and sends an error message to the CPU board FAULT DETECTION CIRCUIT TEST When the DG 5000 is switched on microcontroller U16 tests the working of fault latch U10A When the 5 V supply voltage appears the circuit made up of R128 and C49 leads to a reset of latch U10A by mans of gate U7A During the self test microcontroller U16 triggers fault latch U10A by means of signal SFDU and gate U7D After verifying the proper operating of the latch by reading signal FDUO microcontroller U16 resets the fault latch to zero by mea
101. ignal acquisition chain is verified when the device is switched on through the 10 Hz signal generated on the 10 channel ECG preamplifier and transmitted in the floating part by optocoupler U35 Signal 10 Hz_FL ranging between 5 V and 5 V controls transistor Q28 which generates a differential signal with an amplitude of about 1 5 mV The signal is injected at the inputs of the differential amplifier U27A and U27B through analogue switches U30A U30B and resistors R319 and R320 The control signal of U30A and U30B is also generated by signal 10 Hz FL through D2 R323 and C92 While verifying the acquisition chain the oscillator used for measuring the patient impedance built around U31A and U31B is blocked by means of transistor Q27 PATIENT IMPEDANCE MEASUREMENT Patient impedance is measured by oscillator U31A and U31B which injects a sine wave current of about 30 kHz into the patient through networks R374 R373 C172 R258 and R375 R372 C171 R257 The sine wave oscillator is protected during the defibrillation shock by sparker E2 and clipping diodes DZ29 and DZ30 Patient impedance is measured by processing the amplitude of the 30 kHz signal contained in the ECG signal The 30 kHz is extracted by means of cells C160 R134 and C161 R135 which are preceded by voltage followers U25A and U25B Stage U25C makes up a differential amplifier with a gain of 10 The following stage U25D is a peak to peak rectifier where the amplification is adjustable w
102. ignals and some control signals managing the LPT port keypad and the rotating button The ANA part is based on an Atmel microcontroller that manages the analogue signals of the sensors Spo2 NIBP ECG and the VF data for detecting fibrillation It communicates all the signals to the Coldfire microprocessor by means of a serial link The board is supplied with power by the POWER board 0 48 0065 5 31 June 2005 Technical description of boards 5 3 2 Functional diagram P riph riques Compact Flash BDM Ethernet CPLD TFT UNE n wW Data buffers LPT RTC KEYPAD UART DEFI POWER ANA ANA part CAS MS11 O a a E N N mM r CPU part Microcontroller UART H8 ECG Microprocessor Microcontroller 0 48 0065 5 32 June 2005 Technical description of boards 5 3 3 Explanation of the various assemblies 5 3 3 1 CPU board The CPU is a Motorola Coldfire microprocessor which executes the different programs starting up operating system and applications The flash memory contains the bootloader booting program and the operating system The programs that are running are contained in the RAM working memory The BDM Background Debug Mode connector is used to debug and develop applications and hardware It is also used for hardware tests A console connected to the RS232 output of the CPU shows what the microprocessor is doing and sends it instructions The CPU board acce
103. it attacks analogue multiplexer U14 The type of defibrillation cartridge put in place in DG5000 is identified by means of analogue voltage MOD1 polarised by R280 R330 and a fixed resistor inside the various cartridges The insertion of a defibrillation cartridge in the slot provided for that purpose is recognised by means of signal MODO The connection of a pair of adhesive electrodes at the connector provided on the adhesive electrode cartridge is detected by signal ELECTR which switches to the low status in that case The triggering of a charge by means of the handheld paddles is achieved by signal DCIS which corresponds to the pressing of one of the keys Charge Shock on the paddle electrodes Signal DCIS is generated by comparator U22B and the associated components from signal PCIS from the handheld paddle electrodes Signal DCIS switches to the low level when a Charge Shock key is pressed Signal DDIS1 corresponds to pressing a Charge Shock key The signal generated by comparator U22C is used by the defibrillation microcontroller during the defibrillation shock Signal DDIS2 from line DKY2 corresponds with the second signal used by defibrillation microcontroller U16 during a defibrillation shock Signal DDIS2 generated by U22D switches to the low level when the two Charge Shock keys are pressed The pressing of the graph starting key on a handheld paddle is detected by signal REC and through comparators U23A U23B and logical gates
104. ith P2 which is used to make the overall adjustment of the gain of the patient impedance measurement chain Peak to peak rectifier U25D is followed by unit gain differential amplifier U51A The output of U51A supplies an analogue voltage located from 0 V and 5 V proportional to the patient impedance The output signal of inverting adder U51B attacks the cyclical report modulation stage made up by comparator U26C Signal IMP_ELEC_DEFI_FL is transmitted to the 10 channel ECG preamplifier by optocoupler U38 controlled by transistor Q31 0 48 0065 5 4 June 2005 Technical description of boards The signal is demodulated by means of stages U39B and U39C and the associated components Operational amplifier U39 which demodulates signals ECG _DEFI and Z ELEC DEFI is powered through linear regulator U40 which supplies a stabilised 4 5 V voltage The output signal of demodulation stage U39C attacks differential amplifier U42B which generates signal Z PAT proportional to the patient impedance Signal transfer function Z_PAT V 0 01 x Patient impedance Q Adjustable P3 is used to adjust the zero point 0 Q corresponds to 0 V in Z PAT The signal proportional to patient impedance Z_ PAT attacks three hysteresis comparators U43B U43C and U43D The comparator outputs attack a non inverting adder stage U43A which generates signal Z ELEC _DEFI transmitted to the 10 channel ECG preamplifier represented below signal Z_ELEC_DEFI 3V
105. itute permission or approval to modify or repair a device The manufacturer agrees to supply all the spare parts for a period of ten years All rights reserved for the devices circuits processes and names appearing in this manual The DEFIGARD 5000 device shall be used as described in the User s Manual The device may not be used for any purpose that has not been specifically described in the manual as such use could be hazardous Page June 2005 DEFIGARD 5000 SAFETY INFORMATION e The product is marked as follows CE 0459 in accordance with the requirements of Council Directive 93 42 EEC relating to medical equipment based on the essential requirements of annex I of the directive e It fully meets the electromagnetic compatibility requirements of standard IEC 60601 1 2 EN 60601 2 Electromagnetic compatibility of medical electrical devices e The device has undergone interference suppression in accordance with the requirements of standard EN 50011 class B e In order to optimise patient safety electromagnetic compatibility accurate measurement indication and proper device performance users are advised to use only original spare parts supplied by SCHILLER Any use of accessories other than original accessories shall be at the exclusive risk of the user The manufacturer shall not be liable for any damage due to the use of incompatible accessories or consumable supplies e The manufacturer shall only be liabl
106. k that the cables will not get caught when the device is closed Put the device into this position and connect the four cables Front Set the device straight and place the boards in the three grooves right hand side The battery tank wiring must be placed between the board and tank The external VDC connector must be place between the tank and the bottom of the 0 48 0065 Page 4 5 June 2005 Replacement of parts Place the boards in the three grooves left hand side Fold the cable It must not get caught in the housing when it is closed The battery tank wiring must lie alongside the tank 4 4 Replacement of parts o Parts may only be replaced by personnel who have been specially trained and authorised by SCHILLER Besides the replacement parts shall be original SCHILLER parts Ce To order a new part from SCHILLER provide the part number and the serial number of the device located under the device After that specify the item code of the part 0 48 0065 Page 4 6 June 2005 Replacement of parts o REP OTE CODE ARTICLE DESCRIPTION ERTA RE W3M144119 _ Prick ALIM Prrd sup rieur Claviar Kontal Print chier frantal Bouton menu WAN144105_ 204144108 VIARIA 2109 S lecteur rotatil Crochet Axe de rotation crochet weanat4etit wianei4e104 VIAL 116 VI214144128 se g W3M144089 HA Le Contact de d chame Couverde
107. l be performed on an antistatic mat connected to the earth and the operator shall wear an antistatic strap also connected to the mat In the event of any work on the high voltage part of the defibrillator remove the antistatic strap Caution A general device test shall be performed each time the device is opened 0 48 0065 Page 4 1 June 2005 Replacement of parts 4 1 Device disassembly procedure Unfasten the 8 screws at the locations shown by the arrows 0 48 0065 Page 4 2 June 2005 Replacement of parts Now remove the two parts View of the front Rep 5 wey i ot Es ANR Lies 4 igs AM y UC AN F oe 0 48 0065 Page 4 3 June 2005 Replacement of parts 4 2 Replacing the high voltage capacitor ing This operation relates to the high voltage capacitor which can carry fatal charges Before starting to work take care to discharge the high voltage capacitor completely The terminals of the high voltage capacitor must never be touched directly The high voltage capacitor may never be replaced by people other than specially authorised and trained personnel The replacement of the HV capacitor is an extremely rare operation as the life of an HV capacitor is very long However if that is ever necessary the HV capacitor may be replaced in accordance with the instructions below IMPORTANT IMPERATIVELY CHECK IF THE HV CAPACITOR IS PROPERLY DISCHARGED Take off the
108. lectrode 28 cm2 de surface active Electrode cable length 2m e VF VT detection Shock recommendation in case of VF and VT VT gt 180 p min Sensitivity 98 43 Specificity 99 8 These values have been found with the AHA database which contains cases of VF and VT with and without artefacts Conditions required for ECG analysis Minimum amplitude for the signals used gt 0 15 mV signals of lt 0 15 mV are considered to show asystole Definition Sensitivity Correct detection of heart rates for which defibrillation shocks are recommended Specificity Correct detection of heart rates for which defibrillation shocks are not recommended e ECG Leads Simultaneous synchronous recording 12 leads Patient cable 3 4 10 lead cable type CF Heart rate 30 300 beats min Lead display Selection of 1 to 12 simultaneous leads Band pass 0 5 35 Hz or 0 05 150 Hz depending on the ECG source e NIBP non invasive blood pressure Measurement Automatic or manual Measuring method Oscillometric Connection Type CF Measurement range Adults Sys 30 255 mmHg dia 15 220 mmHg Neonates Sys 30 135 mmHg dia 15 110 mmHg Accuracy 3 mmHg et 2 B min e SPO2 pulsoximetry Amplifier Masimo Using the Monitor Normal and sensitive Accuracy SPO2 Adults 1 100 2 Neonates 70 100 3 PP 25 240 min 4 Calibration range 70 100 Connection Type CF Measurement rang
109. ller U16 dialogues with the master microprocessor of the CPU board by means of the serial link The high voltage circuit of the defibrillator part is disabled The controlling of the charging of the HV capacitor is started either by signal DCIS if the handheld paddle electrode cartridge is being used or by the master microprocessor of the CPU board via the serial link if the adhesive electrode cartridge is being used In semiautomatic mode two pieces of information are used to trigger the charging of the HV capacitor the pre charge information and the charge information In both cases the procedure of c charging the HV capacitor is identical The difference lies in the status of the defibrillator after charging is complete lf the HV capacitor is charged by the pre charge command the defibrillator goes into the pre charge completed state when charging is complete During the pre charge completed phase the defibrillator stands by for a new charging request and does not allow the delivery of defibrillation shocks If the HV capacitor is charged by the charge command the defibrillator enters the hold phase when charging is complete During the hold phase the defibrillator authorises the defibrillation shock When the charging or pre charging is triggered the master microprocessor also sends a signal corresponding to the selected energy CHARGE PHASE The charge phase is either triggered by signal DCIS or while using the adhesive electrode cartrid
110. lock of the 10 4 inches Color TFT LCD Module 1 channel LVDS gt DC gt Power 3 3V No EEPROM TFT LCD 800 3 600 Pixels 4 5 mA typ DC Power C Copyright AU Optronics Inc 2004 All Right Reserved G104SN03 V 0 No Reproduction and Redistribution Allowed amp l IT SSHI ACONS 1SP A0LIINNDO ONIIVN T SAZ0 ASHE IST AULIINNOSHOITHIVAIENI HI d02 M6T 41 SYH ASOLOSNNOD 202109 13 0 Mechanical Characteristic LCM outline dimensions SdAl SOLIINNOT 2 0F 24 Ol 39Nv23 101 041419 39SNAT SALON F A T T des l e AT w j e aloe lu I HA 110 rm 1y y 1 Da Da roll NI a co oN a Y 5 lu Oo M po IS IN ja Is 2 3 E F 5 SEFR e T S3LN3D VIV JALIY Sm Se ue al 00 E m m Z D A y o g q _ Zo Y 8SIX2 112 YJ SAILOV v io gt 009X008 gt YDAS UIDZ Y 01 dal 1 U E y 1 Y Ww e Le pola al La SOS Sra v0 ET vay 3ALLIW2Tt2 T 801 EEY Wad 13230512 i E 0F9 C BT q G1045N03 V 0 No Reproduction and Redistribution Allowed C Copyright AU Optronics Inc 2004 All Right Reserved Diagrams and layout drawings 7 9 LIGHTING BOARD part no 4 24 0003 R f rence AUO GHO25A 0 48 0065 7 19 June 2005 INVERTER SPECIFICATION R amp D GREEN C amp C TECH GHO
111. lt detection circuit Check of the proper operating of the ADC Check of the proper operating of the voltage reference of the fault detection circuit U8 and analogue multiplexer U14 e Check of signal DDIS2 e Check of the status of the Charge transistor Q1 e Check of the charging voltage of the HV capacitor During the self test all the output ports of the microcontroller are deactivated The operating of fault latch U10A is tested by signal SFDU which must trigger latch U10A by means of gate U7B In order to check the proper working of the latch microcontroller U16 reads signal FDUO by means of multiplexer U15 During the test signal FDUO must be high When the test result confirms the proper operating of the safety latch microcontroller U16 resets U10A by means of signal RFDU The ADC internal to microcontroller U16 is tested by reading the 5 V and GND voltage via analogue multiplexer U14 Voltage reference U8 2 5 V is also verified by analogue multiplexer U14 That voltage reference is used by the fault detection circuit comparators During the self test the microcontroller also checks the status of buttons Charge Shock by means of signal DDIS2 Signal DDIS2 comes from the serial arrangement of the two keys Charge Shock and is formed by U22D and the associated components During the test when the two keys are not pressed signal DDIS2 must be on the high level The status of Charge transistor Q1 is verified by means of si
112. nal FOR_INHIB The other safety circuits remain operational The RESET signal generated by voltage supervisor U14 also affects signal PACER_FAIL in the same way as the three safety circuits However the RESET pulse does not lead to the stopping of the pacemaker It only prevents the delivery of a parasite pulse during the pacemaker starting and stopping phases 0 48 0065 5 46 June 2005 Technical description of boards 5 7 4 4 Control and monitoring circuit The control and monitoring circuit is chiefly made up of microcontroller U13 It operates with an 11 0592 MHz clock delivered by oscillator Q14 It delivers the various control and monitoring signals and receives the status signals from the safety circuits It also supports communication signals with the ADC the Analogue microcontroller and the 8 channel preamplifier Signals CLK_ADC CS_ADC DI ADC and DO_ADC form a synchronous serial link that communicates with ADC U12 Signals RxD_PACER and TxD_PACER form an RS232 serial link that communicates with the Analogue microcontroller Signal QRS_TRIGGER_FLOAT delivers to microcontroller U13 the QRS synchronisation information fro the Demand operating mode Signal LOAD_CAPA controls and monitors the charging of capacitor C16 Transistor Q3 translates the level between control signal LOAD_CAPA and transistor Q4 that controls the charging of capacitor C16 Signal PACE_PULSE_CTRL controls the delivery of pacing pulses Transistor Q12 translat
113. nd the front e connectors JP3 amp JP4 high voltage contacts connected to the HV cables of the defibrillator electrode base e connector JP7 10 contacts connected to the floating part of the 10 channel ECG preamplifier e two connectors JP3 14 contacts connected to the LV cables of the defibrillator electrode base The power circuit of the defibrillator part which charges the HV capacitor is directly powered by DC voltage with a protective fuse voltage DC_FUSED The defibrillator control circuits the IGBT control circuits and the fault detection circuit is powered by 5 V generated on the defibrillator board from the 12 V voltage The ECG preamplifier circuit is powered from the power supplied by the 10 channel ECG preamplifier via connector JP7 The voltage references used by the defibrillator part are generated locally on the defibrillator circuit 0 48 0065 5 2 June 2005 Technical description of boards The defibrillator function of DG 5000 is a sequential circuit with six distinct phases 1 Standby phase Phase where DG5000 is on monitoring function the defibrillator part is standing by no demand for a charge 2 Charge phase Phase during which the HV generator charges the HV capacitor 40 UF 3 1 kV The charge phase in the semiautomatic mode may be initiated by two different controls 1 Pre charge control 2 Charge control 3 Pre charge completed Phase that follows initiation by the pre charge control in semiau
114. ndependent channels The first channel for triggering the shock is directly made up of the signal resulting from the serial arrangement of the two keys Charge Shock in the handheld paddle electrodes signal DKY2 The second channel for triggering the defibrillation shock is made up of the microcontroller of the defibrillator control circuit signal UPRA lasting 100 ms The two signals above activate the patient relay of the high voltage unit After a 25 ms time the first defibrillation pulse is generated by the IGBT control circuit During the first pulse the microcontroller measures the defibrillation current by means of signal IPAT in order to determine the patient impedance Once that has been determined the microcontroller adapts the cyclic ratio of the defibrillation wave to the calculated impedance During the shock the IGBTs are driven by the IGBT control circuit signals PHASE1_C and PHASE2_C to generate the pulse biphasic wave with patient impedance compensation After a duration of 100ms signal UPRA deactivates the patient relays and disables the IGBT control circuit The microcontroller deactivates all the outputs and the energy remaining in the HV capacitor is dissipated in the safety discharge circuit During the defibrillation shock the microcontroller calculates the energy delivered and transmits the value and the peak current and the patient impedance to the CPU board In the case of synchronised defibrillation the microcontroller gen
115. ns of signal RFDU MONITORING OF THE HV SWITCHING CIRCUIT Abnormal leakage currents from the IGBT switching circuits are detected by means of two resistor chains R243 R244 R187 and R245 R246 R188 that form a potential balancing network of the two points at the middle of the H bridge If the leakage current is too high the potential is no longer balanced The two signals IGBT_FD1 and IGBT_FD2 at the output of the balancing network attack differential amplifier U4D through the protection and clipping networks When the amplitude at the output of U4D exceeds the limits set by window comparator U4A and U4B signal IGFD switches to low The negative voltage of circuit U4 is generated locally on the board by means of U3 and the associated components Signal IGFD makes fault latch U10A trip by means of comparators U11B U9D and U9A The tripping of the fault latch makes transistor Q25 conduct through signal FDUO which deactivates signal EHVG In that 0 48 0065 5 14 June 2005 Technical description of boards case the power supply voltage UCHARGE disappears which stops the HV generator if it is charging and the leads to the safety discharge of the HV capacitor The tripping of fault latch U10A also generates fault information recognised by microcontroller U16 by means of signal FDUOS Microcontroller U16 deactivates all its outputs and supplies an error message transmitted to the CPU board by means of the serial link MONITORING OF THE PATIEN
116. ntrol of the defibrillator shock control circuit see Fig 1 The pacemaker is made up of two distinct areas namely e The non floating area e The floating area Insulation between the non floating and the floating area is achieved by optocouplers and a transformer The non floating area is chiefly made up of communication circuits and the DC DC converter which supplies power to the floating area The floating area is made up of the control monitoring measurement safety and power circuits Fig N 1 CPU ANALOG BOARD WSM0057 PACE MAKER BOARD WSM0059 DEFIBRILLATOR BOARD WSM0050 To High Voltage Unit A RL3C Output Rela 12V ON OFF Floating Floating ped ORS_TRIGGER PACH RxD_PACER TxD_PACER Je RL2B Output Relay STERNUM RL3B Output Relay The pacemaker power supply is protected by a 750 mAT 125 V fuse 0 48 0065 5 40 June 2005 Technical description of boards 5 7 3 Description of the non floating area The non floating part is powered from the CPU board ANALOGUE board with 12 V and 5 V The floating area power voltages are generated from the 12 V supply through the DC DC converter 5 7 3 1 DC DC converter The DC DC converter is powered from the 12 V voltage lt provides the power supply of the floating area to the secondary windings of transformer TR1 It is built around control circuit U7 and operates in the free running mode at 90 kHz The
117. o the main Swing out fastening bows Additional battery option Signal output QRS Trigger 1 channel ECG remote alarm USB connector Mains connector Potential equalisation External 9 48 VDC connector RS232 interface Ethernet connector 0 48 0065 Page 1 2 June 2005 Operation 1 2 Explanation of symbols used Symbols used on the device BF type signal input protected from defibrillation wt CF type signal input protected from defibrillation C 0459 Notified body of the CE certification G MED Follow the instructions for use y Potential equalisation X Device may not be disposed of with domestic refuse Symbols used on the electrode package 0 48 0065 Open the electrode package Peel off the protective foil Disposable item do not reuse Do not bend packing Storage temperature for the electrodes Expiration date Page 1 3 June 2005 Operation Symbols used on the battery 0 48 0065 The unit component can be recycled Battery may not be disposed of with domestic refuse Do not burn the battery Do not saw up the battery Do not crash the battery The battery can be recharged Do not short the battery SxXHOBOXE Storage temperature for the battery Unlimited 0 40 C Page 1 4 June 2005 Operation 1 3 Device operation DEFIGARD 5000 is a
118. oating part The floating part is made up of the control monitoring measurement safety and power circuits Fig 2 TRANSISTOR DE CONTR LE TRANSISTOR DE COMMANDE DE LA CHARGE DU DE LA DELIVRANCE DES TRI CONDENSATEUR Cstim IMPULSIONS DE STIMULATION 3 L2 Q4 Q3 lt lt gt Ustim PACE POS gt PROTECTION 4 F_Uaux g Cstim L_PACE_NEG gt Cl6 R39 R41 ne 499K 499K FGND_PM R40 R42 R48 499K 499K 499K CAPA lt 1 t a lt R25 R26 R27 o 10K 10K 10K a S 3 FGND_PM FGND_PM FGND_PM PACE_PULSE_CTRL ANALOG I SET GENERATEUR gt DE COURANT IMP1 IMP2 Y L PACE MEASURE MESURE COMMANDE R66 RESISTANCE DE MESURE CONTR LE ISR DU COURANT DE STIMULATION FGND_PM lt gt SECURITE 5 7 4 1 Power circuit The role of the power circuit is to supply energy and form the pulses delivered by the pacemaker The pacing pulses are rectangular in shape and their current is regulated The power circuit is made up of the following elements e An induction coil L2 to limit the capacitor charging current C16 e Full wave rectification D2 D3 D4 and D5 e A transistor Q4 that controls the charging of the capacitor C16 and the storage of the pacing pulse energy e A capacitor C16 that stores the pacing pulse energy e A transis
119. ock signal from ADC U12 Delivered by microcontroller U13 CS _ADC Selection signal of ADC U12 Delivered by microcontroller U13 Active when low CURRENT_OVER_RU N Error signal delivered by safety circuit CURRENT _OVER_ RUN Active when high FREQUENCY OVER RUN Error signal delivered by safety circuit FREQUENCY_OVER_RUN Active when high DI_ADC Data signal that microcontroller U13 sends to ADC U12 DO_ADC Data signal that microcontroller U13 receives from ADC U12 IMP1 Analogue signal for measuring the voltage on the positive pacemaker output The difference from the signal measured at IMP2 provides the voltage at the patient terminals IMP2 Analogue signal for measuring the voltage on the negative pacemaker output The difference from the signal measured at IMP1 provides the voltage at the patient terminals PACE _MEASURE Analogue signal for measuring the pacing current ON OFF_PACER Control signal for starting up the pacemaker Active when low PACER_FAIL Error signal delivered by the safety circuits Active when high PULSE _WIDTH_OVE R_RUN Error signal delivered by safety circuit PU_LSE_WIDTH_OVER_RUN Active when high PWM_I SET Pacing current adjustment signal Pulse width modulated QRS_TRIGGER_FLO AT QRS sync signal of the floating part Used for the Demand operating mode Active when high QRS_TRIGGER_PAC ER QRS sync signal delivered by the 8 c
120. of the H bridge The signal is amplified and its amplitude compared to a reference limit Signal IGFD triggers the safety latch when the IGBT or IGBTs of a branch of the H bridge conducts for more than 1 5 s That makes it possible to detect any short circuit in the IGBTs of the HV switching stage gt signal IGFD is active when low active at 0 V Fault detection circuit output signals FDUO Failure Discharge Unit Output Logical signal that corresponds to the triggering of the safety latch The latch is triggered upon power up to check if it is operating correctly It is triggered by means of signal SFDU If any hardware fault is detected the fault latch is triggered by one of the input signals CHVM DUFD IGFD When the latch is triggered signal FDUO is high gt Output signal FDUO is active when high active at 5 V 0 48 0065 5 27 June 2005 Technical description of boards 5 2 4 5 OPTIONAL PACEMAKER Pacemaker input signals 12 V 12 V Supply The 12V power supply voltage is used to supply the current required for the operating of the stage that generates the pacing pulses gt The 12 V power supply voltage comes from the power supply circuit of DG5000 5 V_CPU 5 V Supply The 5 V_CPU power supply voltage powers the non floating control circuit of the pacemaker circuit gt The 5 V power supply voltage comes from the CPU board of DG5000 RxD_PACER Pacemaker Data Receiver Logical signal relating to th
121. of 281 ana ted V_USB 1 Lo 1 1 LE 27 27 27 27 NE 2 Turn Button zt H ROTA Ana KEY OH tO Hi TO 04 ANA KEY D 30 USB o OS SO 5 0437 ROT_B GND_KEY CH 5555 O 551_ OND KEY D O O 3 10 0087 o BL_ONOFF lt 90 Oo 0451 BL_ONOFF GND _ o SPO Masi o lo gt PUSH GND o l o o o GND asimo Push Button 5 o 5 31 o1 31 LS 31 CON4 LAISSES SN no Et ETR Pa a E DIM CONS CONS VON 33 3333 331 1 1 FoM 3 te Hr te Hr mon 5V_SPO2 zte 04 5v_spo2 i 4 VCCTPH 5e Oo 0 SRS vecteH GND_SPO2 70 o 4 GND_SPO2 27 or 2 GND lt A TO Sp 9 9 gt TM 472 ora PRINTER 0 H GND STRB1 F 370 0473779 0437 sTRBWF GND_SPO2 so H GND_SPO2 e H GND STRB2 F C tE O73 310 Hs STRB2 F 3 H po mow TPCF O 0339 04H TP Cr GND_SPO2 50 5 GND_SPO2 o 04 vecTPH TPLE O oO OF SC TPF RESET_SPO2 0 04 gt RESET_SPO2 6 o 845 m TPDF t Lo of 40 o op SUS teo Po o F0 04 4 sTRBWF VOCPMD O Oo OT vccPmD RXD_SPO2 Do o gt Rxd_sPo2 3 TO OK STRB2F SENSPMD 33 Os OF GF SENSPMD TXD_SPO2 eo OH TxD_SPO2 fo Spo Ere e AS Sag Sa age CONI0 CONIO 3 10 0096 11 O OL rPDF am LS LS o 45 lo OL ani OOMS Se pen 12 o of 12 vecpmp az HB 16 of 46 46 Lol of Sr 012 ANODE tto ot ANODE 18 to of S55 sense 20 PH 40 ES of 47 El oO sv pH CATHODE 2 lo of 2 CATHODE 14 14 T 48 48 48
122. of signals PHASE1_C and PHASE2_C which blocks the IGBTs of phase 1 or phase 2 The biphasic wave defibrillation shock with patient impedance compensation is achieved by the successive conducting and blocking phases of IGBTs Q13 Q18 which form an H bridge enabling biphasic discharge The first phase of the biphasic wave is provided by conduction by Q13 and Q14 and the second by conduction by Q15 Q16 and Q17 Q18 The high voltage switching circuit with IGBTs is connected to the patient by means of the patient relay made up of RL2 and RL3 The patient relay control is made up of signal UPRA and line DKY2 The first signal UPRA which drives transistor Q12B is generated by microcontroller U27 of the defibrillator control circuit Signal UPRA has a duration of 100 ms The second control signal comes directly from the serial application of the two Charge Shock keys of the handheld paddle electrodes or the Shock key on the front of the device In the direct shock operating mode Q10 saturated line DKY2 activates transistor Q9 which saturates Q12A by means of network D6 C91 and R123 Transistor Q10 controls the hardware of the patient relay in the event of a synchronised shock When the two transistors Q12A Q12B conduct and the defibrillator is in the hold phase the patient relay is activated for a duration of 0 48 0065 5 13 June 2005 Technical description of boards 100 ms The defibrillation shock is authorised during the hold phase by means o
123. on Logical signal that makes the second phase IGBTs conduct The signal is only generated during the defibrillation shock The Ton Toff ratio of the signal is variable depending on the patient impedance Output signal PHASE2_C is active when high PHASE2_B Phase 2 blocking Logical signal that blocks the second phase IGBTs During the charge pre charge completed and hold phases signal PHASE2_B has a period of 16 ms and is offset by 8 ms in relation to signal PHASE1_B During the shock phase signal PHASE2_B is generated after every 30 ms and offset by 5 ms in relation to signal PHASE1_B When it is active signal PHASE2_B has duration of 200 us gt Output signal PHASE2_B is active when high 5 2 4 3 HIGH VOLTAGE CIRCUIT High voltage circuit input signals DC DC Power Supply Filtered power supply voltage from the power supply circuit of DG5000 The DC power supply voltage is used to supply current for the working of the HV generator while charging the HV capacitor gt The DC power supply voltage ranges from 9 V to 15 V EHVG Enable High Voltage Generator Logical signal buffered open collector that that switches on the high voltage unit When it is active the signal activates the Charge transistor and the power supply of chopping regulator U1 in order to authorise a request for a charge of the HV capacitor or a battery test gt Input signal EHVG is active when low active at O V open collector WDRAb Energy Dum
124. on cartridge gt Input signal MOD 1 ranges from 0 to 5 V gt If handheld paddle electrodes cartridge signal MOD 1 0 6 V gt If internal electrode cartridge signal MOD 1 2 6 V gt If adhesive electrode cartridge signal MOD 1 3 0 V with child electrodes gt If adhesive electrode cartridge signal MOD 1 3 4 V with adult electrodes REC Recorder Start Analogue signal that corresponds with the status of the Recorder key on one of the two handheld paddle electrodes which is used to trigger the graph from the electrodes gt During the standby phase the REC input signal ranges from 0 to 5 V with the key pressed in gt During the hold phase the REC input signal ranges from 4 0 V to 3 6 V with the key pressed in FPS_KEY Front Panel Shock Key Logical signal that is used to trigger the shock by means of the Shock key on the front panel The signal is interconnected with signals DKY1 and DKY2 in the internal electrode and the adhesive electrode cartridges gt Input signal FPS KEY is active when low when the internal or adhesive electrode cartridges are used and the Shock key on the front is pressed in 0 V if key pressed ANAKEY Analyse Key Logical signal corresponding to the status of the Analyse key on the front gt Input signal ANAKEY is active when low 0 V when the key is pressed FDUOS Failure Discharge Unit Output Logical signal that corresponds to the tripping of the safety latch Th
125. ores that drive the gates of the IGBTs through drivers U5B and U6B and transistors Q19 and Q21 Microcontroller U16 generates these IGBT blocking pulses during the charge pre charge completed and hold phases During the charge phase of the HV capacitor microcontroller U16 measures the charging voltage of the HV capacitor through signal THVM via multiplexer U14 The energy stored in the HV capacitor is calculated by U16 When the value is equal to the selected energy U16 deactivates the LHVC signal which stops the charging of the HV capacitor HOLD PHASE When the defibrillator enters the hold phase microcontroller U16 determines the energy stored in the HV capacitor by means of signal CHVM and checks that it is located within the permitted tolerances If that is not so U16 triggers a safety discharge of the HV capacitor During the hold phase microcontroller U16 activates signal EPDU which makes Q11B conduct through open collector driver U12C In these conditions the defibrillation shock may be delivered to the patient The hold phase does not last longer than 20 s after which microcontroller U16 triggers a safety discharge PRE CHARGE PHASE In the semiautomatic mode using the adhesive electrode cartridge the master microprocessor of the CPU board initiates a pre charge of the capacitor during the analysis of the ECG signal The pre charge command and the selection of the corresponding energy value is transmitted by the serial link to the d
126. p Relay Activation Buffered logical signal that activates the safety discharge transistor of the high voltage unit by means of a transistor The signal is active during the entire duration of a defibrillation cycle During a battery test signal WDRAb is not activated gt Input signal WDRAb is active when high active at 5 V 0 48 0065 5 24 June 2005 Technical description of boards LHVCb Load High Voltage Capacitor Buffered logical signal that directly activates the HV generator in order to charge the HV capacitor The signal is active during the entire duration of the charge phase of the HV capacitor till charging stops gt Input signal LHVCb is active when high active at 5 V EPDU Enable Patient Discharge Unit Logical signal buffered open collector that switches on the shock delivery hardware circuit by means of a transistor This signal is active during the entire duration of the hold phase till the shock is delivered gt Input signal EPDU is active when low active at 0 V open collector UPRAb Micro Controller Patient Relay Activation Buffered logical signal from the defibrillator microcontroller that activates one channel for triggering the patient relay by means of a transistor This signal is active for 100 ms during the defibrillation shock gt Input signal UPRAb is active when high active at 5 V SYNC Synchronisation Logical signal buffered open collector that controls either a DIRECT SHOC
127. patient relay An ECG signal taken by the defibrillation electrodes is sent by means of optocoupler U37 in the floating part of the 10 channel ECG preamplifier The floating part of the defibrillation ECG preamp is further insulated by optocouplers U35 U36 U38 and transformer TR3 0 48 0065 9 12 June 2005 Technical description of boards CHARGING THE HV CAPACITOR TO THE DEFINED ENERGY VALUE If the handheld paddle electrode cartridge is being used the energy is selected by means of signal WREF If the adhesive electrode cartridge is being used the energy is selected by the master microprocessor which transmits the corresponding information to microcontroller U16 via the serial link After receiving a charge request either through signal DCIS or through charge information in the serial link the microcontroller checks the CTFC signal to check that there is no voltage at the drain of the Charge transistor Q1 When that condition is met signal EHVG switches to low which makes Q1 and Q2 conduct When Charge transistor Q1 conducts that makes voltage UCHARGE appear When Q2 conducts chopping regulator U1 is supplied with 12 V Microcontroller U16 also controls the activation of the safety discharge relay RL1 by signal WDRA and transistor Q11A In those conditions the contacts of the safety discharge relay RL1 are open making it possible to charge the HV capacitor The charging of the HV capacitor is started by means of signal LHVC which
128. primary windings of transformer TR1 are attacked in the push pull mode by means of a power stage made up of Q1 and Q2 The activation of the DC DC converter is controlled by signal ON OFF_PACER delivered by an output latch of the Analogue microcontroller It also corresponds to the starting up of the pacemaker Fuse F1 750 mAT and diode D1 protect the pacemaker if there is a short circuit and or an incorrect polarity in the 12 V power supply voltage The time constant of circuit R3 C1 determines the chopping frequency of the converter and the time constant of circuit R11 C1 determines the dead time between the chopping pulses 5 7 3 2 Communication circuits Communication circuits are essentially made up of optocouplers U8 U9 and U10 and associated control transistors Q7 and Q11 They are powered in the non floating area by 5 V and in the floating area by F UPM Signals TxD_PACER and RxD_PACER form a serial RS 232 link that takes care of communication between the pacemaker microcontroller and the analogue microcontroller It operates at a 4800 baud rate Signal QRS_TRIGGER delivers the heart frequency pulse required for the pacemaker when it operates in the Demand mode The signal is delivered by the 8 channel preamplifier Note Signal TxD_PACER is delivered continuously when the pacemaker is started up The frame recurrence frequency is 512 ms 0 48 0065 5 41 June 2005 Technical description of boards 5 7 4 Description of the fl
129. rge of the high voltage capacitor OVERALL DESCRIPTION The defibrillator control circuit contains a microcontroller that carries out all the functions described above When the device is switched on the defibrillator control circuit runs a self test of the defibrillator part The microcontroller of the defibrillator control circuit exchanges information with the CPU board through a serial link that is decoupled from the CPU board by an optocoupler During manual use handheld paddle electrode cartridge the microcontroller of the defibrillator control circuit takes account of the various signals from the input interface circuit in order to control the high voltage circuit Signal AWSEL is an analogue voltage that is determined by the energy selected by means of the knob on the handheld paddle electrodes The two signals DMPR and DMTP indicate the presence of a defibrillation cartridge and the type of defibrillation cartridge respectively If the graph triggering key on the handheld paddle electrodes is pressed signal RECB the microcontroller transmits the information corresponding with the pressing of the key to the CPU through the serial link Signal PCIS which indicates the pressing of one of the Charge Shock keys of the handheld paddle electrodes sets off the charting of the HV capacitor at the selected energy Before triggering the charging of the HV capacitor the microcontroller of the defibrillator control circuit checks if the Charge transi
130. s to the pacing pulses generated by the pacemaker High voltage circuit output signals THVM Transformer High Voltage Measurement Analogue signal that makes up the first channel for measuring the charging voltage of the HV capacitor The measurement is taken by means of the primary winding of the HV converter Signal THVM is applied by the defibrillator microcontroller to stop charging the HV generator gt Signal THVM ranges from 0 to 4 V maximum gt Scale factor THVM V U yr V 850 where U yr gt charging voltage of the HV capacitor CHVM Capacitor High Voltage Measurement Analogue signal that makes up the second channel for measuring the charging voltage of the HV capacitor The measurement is taken by means of two voltage dividers with a high resistive value referenced to the ground which balance the voltage of the high voltage circuit Signal CHVM is applied by the defibrillator microcontroller and transmitted by a serial link to the host CPU to display the stored energy corrected for 50 Q The signal is also used if there is any fault in the stopping of the charge by means of latch FDU The maximum charging voltage of the HV capacitor must not exceed 3 4 kV gt Signal CHVM ranges from 0 to 4 V maximum gt Scale factor CHVM V U yr V 850 where U pr gt charging voltage of the HV capacitor CTFC Charge Transistor Fault Condition Analogue signal for detecting any short circuit of Charge transistor Q1 which swit
131. ss the flash memory and RAM directly But data buffers are used for access to the different devices The CPLD handles address decoding and generates the Chip Select signals that individually activate each device It also manages the signals of the keypad and the rotating button the LPT port and the different control signals The compact flash memory contains the applications and configurations options The CPU board of DG5000 has USB and Ethernet connections for communicating with the outside A 10 4 TFT screen is interfaced with a flat jumper An RTC Real Time Clock keeps the time of the device and wakes it up from time to time to perform the tests Alarms are generated by a Buzzer and an OKI component saves conversations and plays them back A QUAD UART is used for interfacing 4 serial links These links are used to communicate with the buzzer the Defibrillator boards defibrillator status the power board battery status and the ANA part data from NIBP SPO2 ECG PACE and VF sensors 5 3 3 2 ANA part The ANA microcontroller collects the analogue signals from the various sensors Spo2 NIBP ECG PACE and VFVT It communicates all the signals to the Coldfire microprocessor through a serial link ANA A CAS module is connected to the CPU board to calculate the non invasive blood pressure NIBP An MS11 module is used to calculate the SPO2 rate and pulse Microprocessor H8 is used to process signals and diagnose ventricular
132. stor is operating correctly by means of signal CTFC When the test is completed the defibrillator control circuit generates the Charge transistor activation signal signal EHVG The safety discharge relay is also excited by means of signal WDRA When the different operations are performed the charging of the HV capacitor is triggered by the activation of the HV generator signal LHVC While the HV capacitor is being charged the microcontroller measures the energy stored in the HV capacitor through signal THVM The microcontroller also generates two signals that block the IGBTs signals PHASE1_B and PHASE2_B If during the charging of the HV capacitor the user selects a lower energy value the microcontroller sets off a safety discharge of the HV capacitor by deactivating all the active outputs deactivation of signals LHVC WDRA and EHVG If the user selects a higher energy the microcontroller sets off a compensation charge by means of signal LHVC till the new selected energy value is reached When the stored energy is equal to the selected energy the microcontroller stops the HV generator by means of signal LHVC The defibrillator is now in the hold phase during which the two LEDs of the handheld paddle electrodes are switched on by means of signals EPDU and READY During this phase the stored energy is measured by signal CHVM During the hold phase simultaneously pressing the two keys Charge Shock triggers the defibrillation shock through two i
133. t Normally signal inactive the 10 Hz signal is at 5 V QRS_TRIG_F QRS Trigger Signal Logical signal generated by the microcontroller in the floating part of the 10 channel ECG preamplifier circuit enabling the operating of synchronised defibrillation Signal QRS_TRIG_F is referenced in relation to FGND The duration of pulse QRS_TRIG_F is 100 ms Signal QRS_TRIG_Fest is active during the QRS wave gt Input signal QRS_TRIG ranges from 0 V to 5 V The signal is active when low active at 0 V 0 48 0065 5 19 June 2005 Technical description of boards ECG preamplifier output signals ECG_DEFI Defibrillator ECG Signal Analogue signal that corresponds to the ECG signal of the patient collected by means of the defibrillation electrodes Signal ECG_DEFI has a gain of 35 in relation to the input signal gt Signal ECG_DEFI is located in the 0 V to 5 V range centred on 2 048 V Z_ELEC_DEFI Defibrillator Electrode Impedance Signal Analogue signal where the amplitude in steps corresponds with an impedance range connected between the two defibrillation electrodes This signal is used to determine the patient electrodes impedance range in order to check if the defibrillation electrodes are stuck properly gt Signal Z_ELEC_DEFI ranges from 0 V to 3 V maximum DEFI_AVALAIBLE Defibrillator Available Signal gt Signal DEFI_AVALAIBLE is connected to FGND PIMP_DEF Patient Impedance Out of Range Logical signal from th
134. tage difference between signals IMP1 and IMP2 measured at the patient terminals When it drops the charging voltage of capacitor C16 drops as well However the maximum value is capped at 186 V and the minimum value is limited to 70 V The voltage at the patient terminals are measured by means of measuring bridge R41 R42 R26 and measuring bridge R47 R48 R27 which delivery signals IMP1 and IMP2 The two signals are applied by means of followers U1B and U1C at the inputs of ADC U12 0 48 0065 5 44 June 2005 Technical description of boards 5 7 4 3 Safety circuits The safety circuits are responsible for ensuring that the pacemaker does not deliver pacing pulses with parameters that exceed the maximum boundary values Fig 6 SAVE TASE C20 Y de Qi 150U 250V FGND PM cis gt Y SECURITE CAVE_PACE PACE MEASURE N PACER FAIL CURRENT_OVER_RUN R29 SECURITE l dl PULSE_WIDTH_OVER_RUN R52 06 FGND_PM FGND_PM FGND_PM SECURITE PACER FAIL FREQUENCY_OVER_RUN 2 R66 15R 1206 Y FGND_PM The safety circuits have an effect on the following parameters e Pacing current CURRENT OVER RUN e Pacing pulse width PULSE WIDTH_ OVER RUN e Pacing frequency FREQUENCY OVER RUN When the value of a parameter is exceeded the appropriate safety circuit delivers an error signal that directly blocks the transistor that controls t
135. tching on or flashing of the corresponding LED of the Analyse key on the front panel gt Output signal ANALED is active when high 5 V to switch on the LED READY Defibrillator Ready inverse Buffered logical signal that allows the switching on of the Defibrillator Ready indicator LED in the handheld paddle electrode that has the Recorder key that is used to trigger the graph gt Output signal READY is active when low 0 V for switching on the LED READY Defibrillator Ready Buffered logical signal that enables the switching on of the Defibrillator Ready indicator LED in the handheld paddle electrodes with the energy selector and the Defibrillator Ready LEDs in the Shock key on the front panel Output signal READY is either at a high impedance or at 5 V maximum DEFREADY Defibrillator Ready Logical signal that corresponds to the buffered EPDU signal generated by the microcontroller of the defibrillator part The signal is active during the entire duration of the hold phase The duration of the signal is limited to 20 seconds maximum gt Input signal DEFREADY is active when high active at 5 V EHVG Enable High Voltage Generator Logical signal that powers the high voltage unit When it is active the signal activates the Charge transistor and the power supply to chopping regulator U1 in order to authorise a request for charging the HV capacitor or a battery test gt Output signal EHVG is active when high active
136. terface Connector of the TFT module 11 After installation of the TFT module into an enclosure do not twist nor bend the TFT module even momentary At designing the enclosure it should be taken into consideration that no bending twisting forces are applied to the TFT module from outside Otherwise the TFT module may be damaged 12 Cold cathode fluorescent lamp in LCD contains a small amount of mercury Please follow local ordinances or regulations for disposal 13 Small amount of materials having no flammability grade is used in the LCD module should be supplied by power complied with requirements of Limited Power Source or be applied exemption 14 The LCD module is designed so that the CFL in it is supplied by Limited Current Circuit Do not connect the CFL in Hazardous Voltage Circuit C Copyright AU Optronics Inc 2004 All Right Reserved G104SN03 V 0 No Reproduction and Redistribution Allowed NJO 2 0 General Description This specification applies to the 10 4 inch color TFT LCD module G104SN03 V O This module is designed for General Display The screen format is intended to support the SVGA 800 H x 600 V screen and 262k colors RGB 6 bits data driver All input signals are LVDS interface compatible The module does not contain an inverter card for backlight Features SVGA 800 H x600 V resolution 1 CCFL Cold cathode Fluorescent Lamp High contrast ratio High transmittance ratio Wide viewing angle
137. tomatic mode when the selected energy has been reached After pre charging is completed the delivery of the defibrillation shock is not allowed 4 Hold phase Phase that follows initiation by the charge control when the selected energy is reached This phase lasts for no more than 20 seconds when the HV capacitor remains charged DG5000 is ready to deliver a defibrillation shock 5 Shock phase This is the phase where DG5000 delivers the pulse biphasic defibrillation shock with patient impedance 6 Safety discharge This is the phase where the energy stored in the HV capacitor is delivered into a safety discharge circuit of DG5000 5 2 2 2 ECG PREAMPLIFIER The preamplifier part carries out the following functions Powering the floating defibrillator ECG part Acquisition of the ECG signal Amplification and processing of the ECG signal Verification of the acquisition chain Patient impedance measurement Transmission of QRS pulses from the 10 channel ECG preamplifier OVERALL DESCRIPTION On the defibrillator PCB the floating part of the defibrillation ECG preamplifier is located under the two metal shields that occupy the space under the high voltage capacitor The floating power of the defibrillation ECG preamplifier is provided through transformer TR3 from the voltages supplied by the 10 channel ECG preamplifier The defibrillator ECG preamplifier part amplifies the ECG signal and measures the patient impedance sent by the d
138. tor Q5 that controls the delivery of pacing pulses e A current generator Q13 U3A that controls the current amplitude of the pacing pulses 0 48 0065 5 42 June 2005 Technical description of boards The rectangular shape of the pulse delivered by may be truncated chipped at the corner at the end of the plateau in the event of pacing at the maximum patient impedance and current The energy of the pacing pulses is supplied by capacitor C16 The capacitor charge from compensating the energy delivered starts at the end of each pacing pulse Fig 3 The charging voltage of capacitor C16 is measured by means of the divider bridge made up of R39 R40 and R25 The amplitude of the charging voltage of capacitor C16 is controlled by the measurement of the voltage at the patient terminals It is used to limit the power dissipated into the current generator when the patient impedance becomes low The voltage at the patient terminals is measured by means of the measurement bridges made up of R41 R42 R26 and R47 R48 R27 Voltage at the capacitor terminals Capacitor charge control signal Pacing pulse delivery control MA signal 0 48 0065 5 43 June 2005 Technical description of boards The voltage of capacitor C16 is controlled on the basis of the measurement of the voltage at the patient terminals during the pacing pulse preceding the capacitor charge In the event of sudden variation increase in patient impedance the rectangul
139. ts during that time when pressing the Analyse key starts off the analysis cycle After an initial analysis if there is noise in the ECG signal a message is displayed for one minute to ask the user to apply CPR cardiopulmonary resuscitation The display lasts during that time when pressing the Analyse key starts off the analysis cycle 0 48 0065 Page 1 5 June 2005 Operation The energy is selected automatically by the system in accordance with the AHA ERC protocol An energy sequence is available Shock 1 Shock 2 Shock 3 Energy selected 130 J Energy selected 130 J Energy selected 150 J Shock N Energy selected 150 J If VF is recognised during the analysis the software automatically starts charging the capacitor with the appropriate energy If the charge lasts too long it is discharged internally The shock is delivered manually Pressing a key automatically delivers the energy stored in the capacitor The system receives the values of the delivered energy the patient current and the patient impedance If the shock is not given within a given time or if the system detects a heart rhythm that does not call for a shock the energy is discharged internally 0 48 0065 ERC 2000 one minute protocol Ne CIRCULATION SIGN Wait 1s SHOCK 1 Wait 5s ANALYSIS 2 VF ANALYSIS WAITING Ask analysis Page 1 6 No VF Wait 1 minute June 2005 Operation ERC 2000 three minute proto
140. ulses The Fixed operating mode is an asynchronous pacing mode that delivers pulses at the user defined frequency The pulse width is 40 ms The Overdrive operating mode is also an asynchronous pacing mode lt delivers pacing pulses at a frequency that is three times the frequency set by the user The pulse width is 20 ms The Demand operating mode is a synchronous pacing mode It is regulated by signal QRS_TRIGGER and its rate is determined by the user defined frequency The pulse width is 40 ms The current regulation of pacing pulses is specified for patient impedance values ranging from 200 Q to 1000 Q However it remains operational for impedance values located between 0 and 200 Q Beyond 1000 Q current regulation is no longer operational The rectangular shape of the pacing pulse gradually tends to become trapezoidal as the impedance increases The HV capacitor C16 may be charged to voltages above 200 V d Before any work on the pacemaker make sure that it is discharged 0 48 0065 5 39 June 2005 Technical description of boards 5 7 2 Structure The pacemaker is under the control of the analogue microcontroller of the CPU board ANALOGUE board by means of an RS232 serial link and dedicated control signals The pacemaker output channel is multiplexed with the defibrillator output channel with the help of an output relay In the absence of a defibrillation shock the pacemaker channel remains selected The output relay is under the co

DEFIGARD 5000 - Infiniti Medical

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