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HP 16510B 35 MHz State/100 MHz Timing Logic Analyzer Service

1. n BNC TEE Sg FIGURE 3 1 8 CLK BIT P P R o 0 D B _ E z 5 ra 520 DATA 5 FIGURE BNC 3 1 8 GND 8 16510 T803 01 89 Figure 3 29 Equipment Setup For Test 7 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence 3 22 HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 30 Seiting for the HP 8161A Parameter Input Mode Period PER Width WID Leading Edge LEE Trailing Edge TRE High Level HIL Low Level LOL Delay DEL Double Pulse Output Mode Output A Output B Norm 1205 60 10 ns 1ns 1ns 1ns 1ns 3 2V 3 2V DV DV 40 ns Ons 60 Enable Enable 46 GONG Mr fo 8 OV q 10NS CLOCK OUTPUT B E mat 120NS F NA DATA OUTPUT A ov 40NS et 6 NS gt 1651 WF 2 2 89 Figure 3 30 Pulse Generator Waveform For Test 7 3 Assign the pod under test to Analyzer 1 in Configuration screen as shown in figure 3 4 4 Set up Format screen as in figure 3 31 assigning a falling clock edge as master clock and rising edge of same clock as slave clock Refer to steps a through c if unfamiliar with the
2. OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER B B BNC gan mm FIGURE 3 1 8 CLK BIT P P R o 0 D B _ E S ra 500 DATA BITS FIGURE BNC 3 1 8 GND 8 16510 T803 01 89 Figure 3 11 Equipment Setup For Test 2 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence 3 7 HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 12 Seiting for the HP 8161A Parameter Output A Output B Input Mode Norm Period PER 28 6n8 Width WID 18 6 ns 18 6 ns Leading Edge LEE 1ns 1ns Trailing Edge TRE 1ns 1ns High Level HIL 32V 32V Low Level LOL OV DEL Ons Ons Output Mode Enable Enable 28 6NS DATA OUPUT A CLOCK OUTPUT B 5 ra ov 16510W09 6 89 Figure 3 12 Pulse Generator Waveform For Test 2 3 Assign the pod under test to Analyzer 1 in the Configuration screen as shown in figure 3 4 4 Assign appropriate clock a rising edge a clock period lt 60 ns and bits 0 through 7 of the pod un der test to a label in the Format screen as shown in figure 3 13 State Timing A Format 1 Run Clock Period Clock Sun lt 60 ns Jt ymbols Pod Al TT
3. i BOTTOM CARD IS 16530 EX15 Figure 6 13 Endplate Overlap Any filler panels that are not used should be kept for future use Filler panels must be installed in all unused card slots for correct air circulation 6 16 HP 16510B Service 6 9 Probe Cable Replacement CAUTION The effects of ELECTROSTATIC DISCHARGE can damage electronic compo nents Use grounded wriststraps and mats when performing any kind of service to this instrument or the cards in it Procedure a Turn the insrument power switch off unplug power cord and disconnect any input or output connec tions b Starting from the top loosen thumb screws on all filler panel s and card s c Starting from the top begin pulling all filler panel s and card s out half way See figure 6 14 CAUTION All multi card modules will be cabled together Care should be taken to pull these cards out together A CARD C4 NEXT LOWEST U 16530 EX13 Figure 6 14 Endplate Overlap d Pull the HP 16510B State Timing Module to be serviced completely out HP 16510 Service e Lay card on antistatic mat with cable s flat and pointing out to rear of card See figure 6 15 16510 1 Figure 6 15 Antistatic Mat f Using a No 10 torx driver remove four screws that hold cable retainer
4. 5 3 5 2 Replaceable Parts y yt top at ee ieee 5 5 LIST OF FIGURES FIGURE TITLE PAGE 251 Endpate Overlap eet Seege 2 2 2 2 Gable POSON A atat etie olet ttc ets 2 3 2 22 EndplateOv nap ET 2 3 Kn Bee TEE 3 1 3 2 Equipment Setup For Test 1 e png od ene i etie Rr re 3 2 3 3 Pulse Generator Waveform For 1 3 3 3 4 Configuration Screen 3 3 3 5 Format Screen For Pod 1 and J Clock 3 4 3 6 Format Screen Clock Assignment 3 4 3 7 Format Screen Bit Assignment l n s Sans 3 5 e NEE 3 5 ooh ete Ge 3 6 3 10 Switching To Next Probe Cable 3 6 3 11 Equipment Setup For Test 2 eene en terrenis nennen nns 3 7 3 12 Pulse Generator Waveform For Test 2 I 3 8 3 19 Format Scre eNi sineret eei ete d vetet ted ee 3 8 3 14 Trace SCION x tionen e fugiet ede deatur te feat em ede tet e fe nus 3 9 3 15 BE te Re E sos ated enter Ls e e Det uS erect rere NU Shi ura aE 3 9 3 16 Equipment Setup For Test 3 3 10 3 17 Pulse Generator Waveform For Test 39 3 11 3 18 Listing nec eeu dict e Pad dae ta e Pena EL adea 3 12 3 19 Equipment Setup For Test 4 00000 nne nennen nnne nennen nes 3
5. iayta tes EE 3 1 3 2 Recommended Test Equipment 3 1 3 9 Test Record s tete ob teme aa i santa ta ped vea re ER kos 3 1 3 4 Performance Test Interval 3 1 3 5 Performance Test Procedures 3 1 3 6 3 1 3 7 Clock Qualifier and Data Input Tests 1 3 2 3 8 Clock Qualifier and Data Input Tests 2 3 7 3 9 Clock Qualifier and Data Input Tests 3 10 3 10 Clock Qualifier and Data Input Tests 4 3 13 3 11 Clock Qualifier and Data Input Tests 5 3 16 3 12 Clock Qualifier and Data Input Tests 6 3 19 3 13 Clock Qualifier and Data Input Tests 7 3 22 J14 aleh Tesi EE 3 25 3 15 Threshold Accuracy Test eie reete T 3 29 HP 16510B Table of Contents SECTION IV Adjustments 4 1 S Introduction inte a eee IA 4 1 4 2 Calibration Interval e be B n 4 1 4 3 Safety e MEET 4 1 4 4 Recommended Test Equipment u 4 1 4 5 Extender Board Installation 4 1 4 6 instrument eoo ed treo und xen eae 4 4 4 7 Adjustment And Calibration Check 4 4 SECTION V Replaceable Parts 5 1 tem
6. 5 VOLTS lt DATA BUS BUS INTERFACE ANALYZER DATA BUS IMB CONTROL IMB BUS 1MB 16510836 Figure 6 1 16510B Module Block Diagram 6 1 HP 16510 Service Interface and IMB The microprocessor interface circuits include the system data transceiver and the address buffers The intermodule bus circuitry IMB enables the state timing analyzer module to trigger arm other modules or be triggered armed by the state of another module in the mainframe Probes The probes are a passive design Each probe pod contains 16 data input lines which can be used for either state or timing measurements and a state clock input Each pod has a common ground for state mode and grounding at the probe tip for timing measurements Pod Termination and Comparators Input data from the probe pods are terminated by an RC network This termination network along with the probe tips provide a 10X input attenuation Input data is then compared to a user defined threshold level If threshold levels are valid the comparators shape the data and clock signals into square waves and output them as single ended signals at ECL levels Data Acquisition Data acquisition in the state mode happens when some combination of one or more of the five state clocks match a user defined pattern The data acquisition circuits monitor the input data clocks and analyzer configuration
7. Figure 3 20 Pulse Generator Waveform For Test 4 16510 WF08 7 87 3 Assign the pod under test to Analyzer 1 in the Configuration screen as in previous test figure 3 4 4 Assign appropriate clock a falling edge clock period gt 60 ns and bits 0 through 7 of the pod under test to a label in the Format screen See figure 3 5 5 Configure the Trace screen without sequencing levels and set Count to States See figure 3 8 3 14 HP 16510 Performance Tests 6 Touch Run The State Listing screen will be displayed and should list all F s as shown in figure 3 21 State Timing Listing 1 Harkers off Label gt States Base gt Relative 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Figure 3 21 Listing Screen Note To ensure a consistent pattern of F s in the listing use the Roll field and knob to scroll through the State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clocks lines J K L M and N 8 Remove the pod body with probe tip assemblies still connected to test connector from probe ca ble of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 6 and 7 until all pods have been tested pods 2 and 4 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the t
8. Figure 3 6 Format Screen Clock Assignment HP 16510 Performance Tests b Touch the Bit Assignment field and turn on bits 0 through 7 asterisk on dot off See figure 3 7 State Timing A Format 1 Clock Period 2 gt 60 ns Figure 3 7 Format Screen Bit Assignment 5 Configure the Trace screen without sequencing levels and set Count to States as shown in figure 3 8 Refer to steps a and bif unfamiliar with the menus a Touch Count then States then touch Anystate b Touch Prestore then touch Off State timing Trace 1 Sequence Levels While storing anystate TRIGGER on times ff Store anystate 2 Count States Prestore Off Label gt Base gt Figure 3 8 Trace Screen 3 5 HP 16510B Performance Tests 6 Touch Run The State Listing screen will be displayed and should show all F s for the channels un dertest See figure 3 9 State Timing Listing 1 Run Markers att Label gt States Base gt Relative 1 2 3 4 5 6 7 8 9 Figure 3 9 Listing Screen Note To ensure a consistent pattern of F s in listing use Roll field and knob to scroll through State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clock lines J K L
9. 2 4 2 1 2 1 Introduction This section explains how to initially inspect the HP 16510B State Timing Module how to prepare it for use storage and shipment Also included are procedures for module installation 2 2 Initial Inspection Inspect the shipping container for damage If the shipping container or cushioning material is damaged it should be kept until the contents of the shipment have been checked for completeness and the module has been checked mechanically and electrically The contents of the shipment should be as listed in the Accessories Supplied paragraph located in Section 1 Procedures for checking electrical performance are in Section 3 If the contents of the container are incomplete there is mechanical damage or defect or the instrument does not pass the performance tests notify the nearest Hewlett Packard office If the shipping container is damaged or the cushioning material shows signs of stress notify the carrier as well as the Hewlett Packard office Keep the shipping material so the carrier can inspection it The Hewlett Packard office will arrange for repair or replacement at Hewlett Packard s option without waiting for claim settlement 2 3 Preparation for Use WARNING Read the Safety Considerations in the front of this manual and in Section before installing or operating this module HP 16510B Installation SECTION Il Installation 2 4 Power Requirements
10. U 16530 EX13 Figure 4 1 Endplate Overlap d Pull card to be serviced completely out e Push all other cards back into card cage but not completely in so they won t be in the way for extender board installation HP 16510B Installation f Slide extender board completely into card cage making sure it is firmly seated in backplane connecter g Plug HP 16510B card into extender board See figure 4 2 29 a TA SA d e 2 as 16510 EX04 Figure 4 2 Extender Board And Module 4 3 HP 16510B Installation 4 6 Instrument Warmup Adjustments or calibration checks should be performed at the instruments environmental ambient tem perature and after a 15 minute warm up 4 7 Adjustment and Calibration Check There is one calibration check on the HP 16510B card If calibration is out there will be one adjustment to make This adjustment is preset at the factory and normally should not need adjustment If after refer ring to the section Performance Test Interval the reference voltage is suspected as a problem perform the following procedure Description This procedure will check and adjust the 5 Volt reference for the D A converter Equipment pii iMi LEID EIL DI Er Son HP 3478A Procedure a Connect the posit
11. IC 0 threshold 0 This test checks the threshold memoru and CPU interface for the specified state timing acquisition chip Figure 6 6 Chip 1 Test Run Screen h Touch Run then drag finger to Single or Repetitive i During the time a Single run or a Repetitive run is executing the Run field will change to Stop 6 5 HP 16510 Service j To stop a Repetitive run touch Stop See figure 6 7 To exit the test touch Done State Timing A Chip 1 Tests runs failures communication 58 1 IC 94 threshold 109 This test checks the threshold memory and CPU interface for the specified state timing acquisition chip Cesta Figure 6 7 Stop Field k To exit the self tests touch the following fields in the numbered sequence below 1 State Timing 2 Test System 3 Configuration 4 Exit Test Insert the Operating System disk and touch the box to Exit Test System See figure 6 8 Test System Exit Test SYSTEM OPT 1 OPT 2 SLOT A SLOT B SLOT C SLOT D SLOT E 2 00 2 00 box to Exit Test System SLOT A SLOTB SLOTC SLOTD SLOTE 0 Card ID codes 31 none none none none Figure 6 8 Exit Test System 6 6 16510 Test Descriptions Chip 1 Tests This test checks the threshold memory and CPU interface for the specified state timing acquisition chip Chip 2 Tests This test checks the thre
12. as 54201 50 OhmiFeegthr L 2 5 heehee cad hae aie ee d ina ie dined HP 10100C EK EE 1250 0781 HP 10503A hayaya Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as in figure 3 19 Figure 3 19 Equipment Setup For Test 4 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER B AB m 1 BNC TEE 5 0 Ai FIGURE 3 1 8 CLK BIT Lis e R o D 5 _ E S 520 DATA 5 FIGURE BNC 34 8 TEE GND 8 1651 5 3 1 89 3 13 HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 20 Seiting for the HP 8161A Parameter Output A Output B Input Mode Norm 7 Period PER 60ns Width WID 11 ns 10 ns Leading Edge LEE 1ns 1ns Trailing Edge TRE 1ns 1ns High Level HIL 3 2 V 3 2 V Low Level LOL DV DV Delay DEL Ons Ons Output Mode Enable Enable Seta SEN zi 5 CLOCK OUTPUT B aS OV ra 60NS M be 5 DATA OUPUT
13. 1651 TS05 02 89 Figure 3 22 Equipment Setup For Test 5 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence 3 16 HP 16510 Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 23 Seiting for the HP 8161A Parameter Output A Output B Input Mode Norm 7 Period PER 57215 Width WID 20 ns 10 ns Leading Edge LEE 1ns 1ns Trailing Edge TRE 1ns 1ns High Level HIL 1 9 V 1 9 V Low Level LOL 1 3 V 1 3 V Delay DEL 18 6 ns Ons Double Pulse 28 6 ns Output Mode Enable Enable 28 6NS 10 5 ra CLOCK OUTPUT B Lann 2ns gt 20NS F DATA OUTPUT A see Note below see Note below 1 9V SS ov 16510W11 6 89 Figure 3 23 Pulse Generator Waveform For Test 5 Note The voltage levels of the waveforms must have the correct amplitude at the logic analyzer probe tips The pulse generator output may have to be increased slightly to compensate for the loading by the logic analyzer 3 Assign the pod under test to Analyzer 1 in the Configuration screen as shown in figure 3 4 4 Assign appropriate clock a rising edge clock period lt 60 ns and bits 0 through 7 of the pod under test to a label in the Format screen See figure 3 13 5 Config
14. 4 4 4 7 Adjustment And Calibration Check 4 4 4 1 Introduction This section provides information on when to calibrate the module and how to calibrate adjust and warm up the module Also included in this section are equipment setups a list of recommended test equipment and a procedure for installation of the extender board 4 2 Calibration Interval To maintain proper operation of the HP 16510B State Timing Module calibration should be performed at approximately two year intervals when the instrument is being used under normal operating conditions If the instrument is used more than one shift per day it may have to be calibrated more often New modules are preadjusted at the factory to meet the specifications listed in Section 1 of this manual Before any adjustments are made to the module the performance tests in Section III should be done If the performance tests are within specifications then adjustments are not necessary If adjustments are necessary refer to the safety summary at the front of this manual HP 16510B Adjustments SECTION IV Adjustments 4 3 Safety Requirements Specific warnings cautions and instructions are placed wherever applicable throughout the manual These must be observed during all phases of operation service and repair of the module Failure to comply with them violates safety standards of design manufacture and intended use of this module Hewlett Packard assumes no li
15. 6 12 HP 16510B Service ACQUISITION CABLE Troubleshooting Sheet 6 FROM TROUBLESHOOTING SHEET 2 5 POSSIBLE CABLE PROBLEM CONNECT A TARGET SIGNAL SOURCE FOR PROBE TESTING OR PERFORM DATA INPUT TEST 2 IN PARAGRAPH 3 9 SEE NOTE 4 NOTE 4 YOU MAY USE YOUR OWN SIGNAL SOURCE AND MAKE A STATE OR TIMING MEASUREMENT OR FA NO TROUBLE FOUND Y SWAP SUSPECT POD S WITH KNOWN GOOD POD S SEF NOTE 5 NOTE 5 DURING FAULT ISOLATION IT S OK Y REDO DATA INPUT TEST 2 THE FAILURE S FOLLOW THE SUSPECT CABLE Y REPLACE CABLE CS NO REPLACE STATE ZTIMING CARD 715651529 2 GO TO TROUBLESHOOTING SHEET 2 Figure 6 10 Troubleshooting Flowchart PERFORM DATA INPUT TEST 2 IN PARAGRAPH 3 9 SWAP CABLES WITH DIFFERENT HP PART NUMBERS 6 13 HP 16510 Service 6 8 Module Replacement CAUTION The effects of ELECTROSTATIC DISCHARGE can damage electronic compo nents Use grounded wriststraps and mats when performing any kind of service to this module Installation Considerations The HP 16510B State Timing Module s can be installed in any available card slot and in any or der Cards or filler panels below the slot intended for module installation do not have to be removed The probe cables do not have to be removed to install the module Procedure a Turn instrument power switch off unpl
16. Minimum duration is 30 ns to 10 ms with 10 ns or 0 01 resolution whichever is greater Accuracy is 0 ns to 20 ns Trigger occurs at pattern duration Less Than Duration Maximum duration is 40 ns to 10 ms with 10 ns or 0 01 resolution whichever is greater Pattern must be valid for at least 20 ns Accuracy is 20 ns to 0 ns Trigger occurs at the end of the pattern Glitch Edge Triggering Trigger on glitch or edge following valid duration of asynchronous pattern while the pattern is still present Edge can be specified as rising falling or either Less than duration forces glitch and edge triggering off 1 8 HP 16510B General Information Table 1 2 HP 16510B Operating Characteristics cont Measurement and Display Functions Autoscale Timing Analyzer Only Autoscale searches for and displays channels with activity on the pods assigned to the timing analyzer Acquisition Specifications Arming Trace Mode Labels Indicators Activity Indicators Markers Trigger Each analyzer can be armed by the run key the other analyzer or the Intermodule Bus Single mode acquires data once per trace specification repetitive mode repeats single mode acquisitions until stop is pressed or until time interval between two specified patterns is less than or greater than a specified value or within or not within a specified range There is only one trace mode when two analyzers are on Channe
17. RERUN MAINFRAME TEST 7 VALID STATE TIMING ID PRESENT AT THE APPROPRIATE CARDSLOT EXIT TEST SYSTEM 2 SEE NOTE 2 T1651526 NO D GO TO TROUBLESHOOTING GO TO TROUBLESHOOTING SHEET 1 SHEET 4 Figure 6 10 Troubleshooting Flowchart HP 16510B STATE TIMING I D Troubleshooting Sheet 4 4 FROM TROUBLESHOOTING o SHEET 3 TURN OFF POWER PUT SUSPECT STATEZTIMING CARD IN ANOTHER CARDSLOT 5 VALID STATEZTIMING ID PRESENT AT THE APPROPRIATE REPLACE THE MOTHERBOARD CARDSLOT 2 NO Y REPLACE THE STATEZTIMING CARD 71651527 GO TO TROUBLESHOOTING SHEET 2 Figure 6 10 Troubleshooting Flowchart HP 16510B Service 6 11 HP 16510B Service HP 16510B SELF TEST Troubleshooting Sheet 5 FROM TROUBLESHOOTING SHEET 1 GO TO TEST SYSTEM SCREEN RUN STATEZTIMING SELF TESTS SEE NOTE 3 NOTE 3 SELF TESTS MAY BE RUN INDIVIDUALLY OR ALL ANALYZER TEST DO E s GO TO TROUBLESHOOTING SELF TESTS SHEET 6 PASS FROM TROUBLESHOOTING SHEET 2 DOES THE PERFORM THE THRESHOLD TEST THRESHOLD ADJUSTMENT FAIL TO TROUBLESHOOTING SHEET 2 REPLACE STATE TIMING CARD T1651528 C GO TO TROUBLESHOOTING SHEET 1 Figure 6 10 Troubleshooting Flowchart
18. Equipment Equipment required to test and maintain the HP 16510B State Timing Module is listed in table 1 3 Other equipment may be substituted if it meets or exceeds the critical specifications listed in the table HP 16510B General Information Table 1 1 HP 16510B Specifications HP 16510B SPECIFICATIONS Probes Minimum Swing 600 mV peak to peak Threshold Accuracy Voltage Range Accuracy 2 0V to 2 0V 150 mV 9 9V to 2 1V 300 mV 2 1V to 9 9V 300 mV State Mode Clock Repetition Rate Single phase is 35 MHz maximum With time or state counting minimum time between states is 60 ns Both mixed and demultiplexed clocking use master slave clock timing master clock must follow slave clock by at least 10 ns and precede the next slave clock by gt 50 ns Clock Pulse Width gt 10 ns at threshold Setup Time Data must be present prior to clock transition gt 10 ns Hold Time Data must be present after rising clock transition on all pods 0 ns Data must be present after falling clock transition on pods 1 3 and 5 0 ns Data must be present after falling clock transition on pods 2 and 4 1 ns Timing Mode Minimum Detectable Glitch 5 ns wide at the threshold HP 16510 General Information Table 1 2 HP 16510B Operating Characteristics HP 16510B OPERATING CHARACTERISTICS Probes Input RC 100 2 shunted by approximately 8 pF at the probe tip TTL Threshold Preset 1 6 vol
19. GO TO TROUBLESHOOTING SHEET 3 FROM TROUBLESHOOTING SHEET 3 5 CAN YOU VERIFY THE USER PROBLEM p GO TO TROUBLESHOOTING SHEET 5 y CO TO THE TEST SYSTEM SCREEN RUN TEST DOES THE MAINFRAME TEST GO TO MAINFRAME RUN TROUBLESHOOT ING OK DONE TROUBLESHOOT ING SHEET 2 71651524 Figure 6 10 Troubleshooting Flowchart 6 8 HP 16510B Service HP 16510B MAIN TROUBLESHOOTING FLOWCHART Troubleshooting Sheet 2 FROM TROUBLESHOOT ING SHEET 1 4 6 GO TO TEST SYSTEM SCREEN NOTE 1 SELF TESTS MAY BE RUN INDIVIDUALLY OR RUN RUN ALL ANALYZER TESTS STATE TIMING SELF TESTS SEE NOTE 1 DO ALL SELF TESTS PASS d GO TO TROUBLEHSOOTING SHEET 5 YES EXIT TEST SYSTEM IS THE USER PROBLEM STILL PRESENT TO TROUBLEHSOOT ING SHEET 6 71651525 Figure 6 10 Troubleshooting Flowchart 6 9 6 10 HP 16510B Service HP 16510B STATE TIMING I D Troubleshooting Sheet 3 FROM TROUBLESHOOT ING SHEET 1 GO TO TEST SYSTEM SCREEN RUN MAINFRAME TEST 7 INTERMODULE TEST NOTE 2 STATE TIMING ID 31 15 VALID STATE TIMING ID PRESENT AT THE PROBABLE APPROPRIATE CARDSLOT SOFTWARE PROBLEM SEE NOTE 2 NO oo TURN OFF POWER AND RESEAT CARDS Y
20. Waveform Screen Return to the Format screen and change User defined Pod Threshold to 9 9 V Adjust power supply for output of 10 2 V Touch Run Data displayed on the Waveform screen should be all high for the pod under test as in previous figure 3 42 Adjust power supply for output of 9 6 V Touch Run Data displayed on the Waveform screen should be all low as in previous figure 3 43 Return to the Format screen and change the User defined Pod Threshold to 9 9 V Adjust power supply for output of 9 6 V Touch Run Data displayed in the Waveform screen should be all high for pod under test as in fig ure 3 42 Adjust power supply for output of 10 2 V Touch Run Data displayed in the Waveform screen should be all low for pod under test as in fig ure 3 43 Remove pod body with probe tip assemblies still connected to test connector from probe cable of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 2 through 78 until all pods have been tested pods 1 through 5 Disconnect lower eight bits from test connector Attach bits 0 through 7 to test connector and re peat steps 2 through 79 until the upper eight bits of all pods have been tested pods 1 through 5 HP 16510B Performance Tests Table 3 1 Performance Test Record Hewlett Packard Tested By Model 16510B Work Order N
21. 13 3 20 Pulse Generator Waveform For Test 4 3 14 3 21 LISUAG SCreen o tette o prae art eda nee tert E rotis 3 15 3 22 Equipment Setup For Test 5 enne entente nennen nns 3 16 3 23 Pulse Generator Waveform For 5 3 17 3 24 Listing Screen se e Int Lr er ipae h e ento n ep ege dee UE de 3 18 vii HP 16510B Table of Contents FIGURE viii 3 25 3 26 3 27 3 28 3 29 3 30 3 31 3 32 3 33 3 34 3 35 4 1 4 4 4 5 5 1 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 6 10 6 11 6 12 6 13 6 14 6 15 6 16 6 17 LIST OF FIGURES TITLE PAGE Equipment Setup For Test 6 2 34 carere eiTe cena enc tac acuta ed 3 19 Pulse Generator Waveform For Test gp 3 20 io Ehe E a i el ER E 3 21 SCE i rei deed rattraper aes yasa 3 21 Equipment Setup For 7 3 22 Pulse Generator Waveform For Test 7 enne 3 23 Format SClEGM inves D crash uba 3 24 Listing ScreeN RE 3 24 Equipment Setup For Glitch 3 25 Pulse Generator Waveform For Glitch 3 26 Configuration Screen 1 erede 3 26 le NEE 3 27 Trace Sore u c fee fer edu veg 3 27 l iStifig S
22. Configuration Cards 25 MHz STATE 100 MHz TIMING Controller RS 232C Printer Figure 4 4 Startup Screen d Touch the pod A1 threshold field labeled TTL See figure 4 5 State Timing A Format 1 Sumbols Figure 4 5 Pod Threshold Field e Touch User and set threshold to 9 9 Volts then touch Done HP 16510 Installation f With a non metallic adjustment tool adjust the variable resistor R76 until the multimeter reads 0 99 Volts 0 001 V 9 Setuser defined threshold level to 9 9 Volts h Read the voltage displayed and note the difference between this reading and 0 99 Volts Adjust R76 so this difference in halved 0 001 V Examples If reading is 0 95 V the difference is 04 V Adjust R76 for 0 97 V If reading is 0 97 V the difference is 02 V Adjust R76 for 0 98 V i Turn instrument off and unplug the power cord j Disconnect test equipment and remove the HP 16510B card from the extender board k Remove the extender board from the mainframe l To reinstall the module refer to steps dthrough iof paragraph 2 7 Module Installation TABLE OF CONTENTS REPLACEABLE PARTS 5 1 5 1 5 2 5 3 5 4 5 5 5 6 dreet L SQ Q qawa ea 5 1 ADDIP6VIALIONS eiii buka eb d v te ae rtm 5 1 Replaceable Parts EISt 1 5 ete te dte fete tede 5 1 Ordering Inform
23. Cree cde dade ois oon cce 3 28 Equipment Setup For Threshold Accuracy 2 nene 3 29 Format S Creer iet ede dei whan eae da eren Do ege khay Re eR 3 30 Tracee SCOE ER 3 31 Waveformi 3 21 Waveform Screen iki IRE HO Ene ade eek eee 3 32 Enidplate Overlap 2 einen Ger reti Sau etit ani 4 2 Extender Board And Module 4 3 Adjustment Pot Locaton 4 4 Startup Screen ee ate etii tee ibt e re 4 5 Weieen DT 4 5 Parts Identifleati n uu u s aa pedal dae 5 4 HP 16510B Module Block Diagram U 6 1 SlAMUPSSCKES Meee ee E hA erste kuypa ted Ge 6 3 Load Test System ati eee 6 4 T st Syst m SCI EE 6 4 Main Test M en0 ERE 6 5 Chip 1 Test Run 5 6 5 Stop eae vee 6 6 Exit Leet Meet tetra a tie 6 6 ei mearum 6 7 Troubleshooting Flowchart eee u Saa trennen nnne 6 8 Endplate Overlap E 6 14 Gable orte e tere Ee reed erteilen e m e 6 15 Ernisplate Overlap TEE 6 16 obra iibi E 6 17 Car
24. Figure 2 3 Endplate Overlap i Any filler panels that not used should be kept for future use Filler panels must be installed all unused card slots for correct air circulation HP 16510 Installation 2 8 Operating Environment The operating environment is listed in table 1 2 of Section 1 of this manual Note should be made of the non condensing humidity limitation Condensation within the instrument can cause poor operation or malfunction Protection should be provided against internal condensation The HP 16510B State Timing Card will operate at all specifications within the temperature and humidity range given in table 1 2 However reliability is enhanced when operating the module within the following ranges e Temperature 20 C to 35 C 68 F to 95 F e Humidity 20 to 80 non condensing 2 9 Storage The module may be stored or shipped in environments within the following limits e Temperature 40 C to 75 C e Humidity Up to 90 at 65 C Altitude Up to 15 300 meters 50 000 feet The module should also be protected from temperature extremes which cause condensation on the module 2 10 Packaging The following general instructions should be used for repacking the module with commercially available materials e Wrap module in anti static plastic e Use a strong shipping container A double wall carton made of 350 Ib test material is adequate Use a layer of shock ab
25. Period 10 ns Maximum Time Covered By Data 5000 seconds Minimum Time Covered by Data 10 24 us Glitch Capture Mode Data sample and glitch information stored every sample period Sample Period 20 ns to 50 ms in a 1 2 5 sequence dependent on s div and delay settings Memory Depth 512 samples channel Time Covered by Data Sample period X 512 Waveform Display Sec div 10 ns to 100 s 0 01 resolution Delay 2500 s to 2500 s presence of data dependent on the number of transitions in data between trigger and trigger plus delay transitional timing Accumulate Waveform display is not erased between successive acquisitions Overlay Mode Multiple channels can be displayed on one waveform display line Primary use is to view summary of bus activity Maximum Number Of Displayed Waveforms 24 HP 16510 General Information Table 1 2 HP 16510B Operating Characteristics cont Time Interval Accuracy Channel to Channel Skew 4 ns typical Time Interval Accuracy sample period channel to channel skew 0 01 of time interval reading Trigger Specification Asynchronous Pattern Trigger on an asynchronous pattern less than or greater than specified duration Pattern is the logical AND of specified low high or don t care for each assigned channel If pattern is valid but duration is invalid there is a 20 ns reset time before looking for patterns again Greater Than Duration
26. Qty 5 E3 5959 9335 0 NA Ground Lead 5 inch Qty 5 E4 5959 9334 9 NA Ground Lead 2 inch Qty 5 H1 16500 22401 5 2 Endplate Thumbscrew H2 0515 0430 31 3 M3 X 6 PH T10 Endplate Screw H3 0515 0665 6 4 M3 X 14 PH T10 Retainer Screw MP1 16510 40501 6 1 Card MP2 16510 40502 7 1 Probe Cable Retainer 0510 0684 9 2 Thumbscrew Retaining Ring MP4 16500 29101 6 1 Ground Spring MP5 16510 94302 7 1 State Timing Label MP6 16500 41201 3 5 Probe Cable ID Clip MP7 01650 94303 7 1 Probe and Cable Numbering Label MP8 16500 94303 7 1 Cable Numbering Labels 5 5 Service 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 TABLE OF CONTENTS 6 1 a p rg d utate les 6 1 Recommended Test Equipment 6 1 Module Block Diagram And Theory Of 6 1 Self Tests ana a 6 3 Troubleshooting Auxiliary Power 6 7 Troubleshooting The HP 16510B uuu u 6 7 Module Replacement Probe Assembly Replacement 6 17 6 1 Introduction This section contains information for servicing the HP 16510B State Timing Analyzer Module Included is a block level theory and procedures for self diagnostics a
27. See figure 3 10 Repeat steps 3 4 7 until all pods have been tested pods 1 through 5 Make sure the appropriate pod and clock are assigned 3 24 HP 16510B Performance Tests 3 14 Glitch Test Description This performance test verifies the glitch detection specification Specification Minimum detectable glitch 5 ns wide at the threshold Equipment Pulse Generalot u Quan um map HP 8161A 020 OScillOSCOPG atatum Aten tat i 54201 50 OHM FOCUS tae leet tue oc 10100 uM 1250 0781 BNG Gable 2 serch umasa HP 10503A Test Connector 1 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 33 The clock inputs are not used for the glitch performance test Using the oscilloscope make sure the pulses are 5 ns wide at the threshold 1 6V OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER A A P P 520 DATA BITS n FIGURE B 8 BNC 3 1 E TEE GND 8 15510 7502 02 89 Figure 3 33 Equipment Setup For Glitch Test Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope mus
28. When everything matches the analyzer will trigger and data storage begins Data acquisition in the timing mode happens when input data matches a user defined timing pattern or range When the acquisition chips are in agreement that their patterns match the analyzer begins to trigger asynchronously at an internal clock rate specified by the user and data storage begins HP 16510B Service 6 5 Self Tests Self tests for the HP 16510B State Timing Analyzer Module will identify the improper operation of major functional areas in the module They are not intended for component level diagnostics If there are multiple state timing modules they must be selected for testing at the main Test System menu All self tests can be run without access to the interior of the instrument If a failure is found the troubleshooting chart in paragraph 6 7 will instruct you to change the module or cable CAUTION The effects of ELECTROSTATIC DISCHARGE can damage electronic compo nents Grounded wriststraps and mats should be used when you perform any kind of service to this instrument or the cards in it Self Test Access Procedure a Disconnect all inputs and turn power switch on b From the startup screen shown in figure 6 2 touch Configuration field then touch Test Figure 6 2 Startup Screen HP 16510 Service c Insert the PV Test System disk and touch box to load Test System See figure 6 3 System Test SYSTEH OPT 1 OP
29. alternating F s and 0 use the Roll field and knob to scroll through the State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clocks lines J L 8 Remove the pod body with probe tip assemblies still connected to test connector from probe ca ble of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 Gand 7 until all pods have been tested pods 2 and 4 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the test connector 9 Disconnect lower eight bits from test connector Attach bits 8 through 15 to test connector and re peat steps 3 4 6 7 and 8 until upper eight bits of all pods have been tested pods 2 and 4 3 12 HP 16510 Performance Tests 3 10 Clock Qualifier and Data Inputs Test 4 Description This performance test verifies maximum clock rate with counting mode and the setup times for the fall ing edge of all clocks to pods 2 and 4 Specification Clock repetition rate With time or state counting mode on minimum time between states is 60 ns Setup time Data must be present prior to clock transition gt 10ns Equipment Puke Generalo Du 8161 020 e pet S
30. for both markers and statistics are kept only when both patterns can be found in an acquisition Statistics are minimum X to 0 time maximum X to 0 time average X to 0 time and ratio of valid runs to total runs Starts acquisition of data in specified trace mode In single trace mode or the first run of a repetitive acquisition STOP halts acquisition and displays the current acquisition data For subsequent runs in repetitive mode STOP halts acquisition of data and does not change current display State listing timing waveforms interleaved time correlated listing of two state analyzers time tagging on time correlated state listing and timing waveform display state listing in upper half timing waveform in lower half and time tagging on Timing Waveform Pattern readout of timing waveforms at X or 0 marker Bases Binary Octal Decimal Hexadecimal ASCII display only and User defined symbols HP 16510B General Information Table 1 2 HP 16510B Operating Characteristics cont Auxiliary Power Power Through Cables 2 3 amp 5V maximum per cable Current Draw Per Card 2 amp 5V maximum per HP 16510B Operating Environment Temperature Instrument 0 to 55 C 32 to 131 F Probe lead sets and cables 0 to 65 C 32 to 149 F Humidity Instrument up to 95 relative humidity at 40 C 122 F Altitude To 4600 m 15 000 ft Vibration Operation Random vib
31. measurements are traceable to the United States National Bureau of Standards to the extent allowed by the Bureau s calibration facility and to the calibration facilities of other International Standards Organization members WARRANTY This Hewlett Packard product is warranted against defects in material and workmanship for a period of one year from date of shipment During the warranty period Hewlett Packard Company will at its option either repair or replace products which prove to be defective For warranty service or repair this product must be returned to a service facility designated by HP Buyer shall prepay shipping charges to HP and HP shall pay shipping charges to return the product to Buyer However Buyer shall pay all shipping charges duties and taxes for products returned to HP from another country HP warrants that its software and firmware designated by HP for use with an instrument will execute its programming instructions when properly installed on that instrument HP does not warrant that the opera tion of the instrument or software or firmware will be uninterrupted or error free LIMITATION OF WARRANTY The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by Buyer buyer supplied software or interfacing unauthorized modification or misuse operation outside the environmental specifications for the product or improper site preparation or maintenance NO OTHER WARRANTY I
32. onto card See figure 6 16 N WES Sic RETAINER SCREWS 4 UPPER 16510 BOARD MOUNTING SCREWS 2 LOWER CABLE RETAINER CABLE Figure 6 16 Retainer And Screws 6 18 HP 16510B Service g Remove cable s from card connector s and install new cable s See figure 6 17 CABLES 16510ZEX02 Figure 6 17 Card Connectors h Install cable retainer i At this point go to step g of the paragraph 6 8 Module Replacement and continue installation of cards SAFETY CONSIDERATIONS GENERAL This is a Safety Class instrument provided with terminal for protective earthing OPERATION BEFORE APPLYING POWER verify that the power transformer primary is matched to the available line volt age the correct fuse is installed and Safety Precautions are taken see the following warnings In addition note the instru ment s external markings which are described under Safety Symbols WARNING e Servicing instructions are for use by service trained person nel To avoid dangerous electric shock do not perform any servicing unless qualified to do so e BEFORE SWITCHING ON THE INSTRUMENT the protec tive earth terminal of the instrument must be connected to the protective conductor of the mains powercord The mains plug shall only be inserted in a socket outlet pro vided with a protective earth contact The protective action must not be negated by the use of an extension cord power cable w
33. ordering and shipment from Hewlett Packard Parts Center in Mountain View California No maximum or minimum on any mail order there is a minimum order for parts ordered through local Hewlett Packard offices when orders require billing and invoicing e Prepaid transportation there is a small handling charge for each order e invoices to provide these advantages check or money order must accompany each order Mail order forms and specific ordering information are available through your local Hewlett Packard offices Table 5 1 Reference Designator and Abbreviations HP 16510B Replaceable Parts BT CR DL DS assembly fan motor battery capacitor diode diode thyristor varactor delay line annunciator lamp LED misc electrical part REFERENCE DESIGNATOR fuse filter hardware electrical connector stationary portion coil inductor misc mechanical part electrical connector moveable portion plug ABBREVIATIONS RT TB TP A D AC ADJ AL AMPL ANLG ANSI ASSY ASTIG ASYN CHRO ATTEN AWG BAL BCD BD BFR BIN BRDG BSHG BW CAL cc CCW CER CFM CH CHAM CHAN CHAR CM CMOS CMR CNDCT CNTR CON CONT CRT cw D A DAC DARL DAT DBL DBM DC DCDR DEG DEMUX DET DIA DIP DIV DMA DPDT DRC DRVR transistor SCR triode thyristor resistor thermistor switch jumper transformer terminal board test point
34. 0 90912 PRINTED JUNE 1989 HP 16510B Table of Contents TABLE OF CONTENTS SECTION 1 General Information EH E e tele ee 1 1 1 2 Modules Covered By This Manual 2 2 1 1 123 Safety Requirements iie Eee Po ei es d hee 1 1 1 4 eee A E ARAA ATENa AAAA E ATAA ERANT RETIA 1 2 1 5 Accessories Supplied AE 1 2 1 6 Accessories Available U 1 2 1 7 7 Specifications asus 1 2 1 8 Operating Characteristics 1 2 1 9 Recommended Test Equipment 2 1 2 SECTION Il Installation 231 7 IntrOdUGtiOn dte eet b e an a deti baee 2 1 2 25 InSpectlOr iud eed LER Cual ER Ree 2 1 2 3 Preparation For Use ca eile needed pone li kL ae led 2 1 2 4 Power Requirements ne u E eee ECC E D Ue EORR 2 1 2 5 Safety Requirements EE 2 1 2 6 Probe Cable Installation 2 1 2 1 Module Installation LLL rr aa au Dog 2 1 2 8 Operating Environment 520 Sab au elie 2 4 229 StOragO Lia de yq e reati ie top iae ne oce 2 4 210 Packaglfig utu PEL ER iL GR 2 4 2 11 Tagging For Service Leu pedi HP Le eee ela aee 2 4 SECTION III Performance Tests
35. About this Manual We ve added this manual to the Agilent website in an effort to help you support your product This manual is the best copy we could find it may be incomplete or contain dated information If we find a more recent copy in the future we will add it to the Agilent website Support for Your Product Agilent no longer sells or supports this product Our service centers may be able to perform calibration if no repair parts are needed but no other support from Agilent is available You will find any other available product information on the Agilent Test amp Measurement website www tm agilent com HP References in this Manual This manual may contain references to HP or Hewlett Packard Please note that Hewlett Packard s former test and measurement semiconductor products and chemical analysis businesses are now part of Agilent Technologies We have made no chanoes to this manual copy In other documentation to reduce potential confusion the only change to product numbers and names has been in the company name prefix where a product number name was HP XXXX the current name number is now Agilent XXXX For example model number HP8648A is now model number Agilent 8648A HEWLETT PACKARD SERVICE MANUAL HP 16510B 35 MHz State 100 MHz Timing Card COPYRIGHT HEWLETT PACKARD COMPANY COLORADO DIVISION 1989 1900 GARDEN OF THE GODS ROAD COLORADO SPRINGS COLORADO U S A ALL RIGHTS RESERVED Manual Part No 1651
36. All power supplies required for operating the HP 16510B State Timing Module are supplied to the module through the backplane connector 2 5 Safety Requirements Specific warnings cautions and instructions are placed wherever applicable throughout the manual These must be observed during all phases of operation service and repair of the module Failure to comply with them violates safety standards of design manufacture and intended use of this module Hewlett Packard assumes no liability for the failure of the customer to comply with these safety requirements 2 6 Probe Cable Installation The HP 16510B State Timing Module comes with probe cables installed by the factory If a cable is to be switched or replaced refer to Probe Cable Replacement in Section 6 of this manual 2 7 Module Installation CAUTION Do not install remove or replace the module in the instrument unless the instrument power is turned off The HP 16510B State Timing Module will take up one slot in the card cage For every additional HP 16510B State Timing Module you install you will need an additional slot They may be installed in any slot and in any order The installation procedure for the module is continued step by step on the next page 2 1 HP 16510B Installation Module Installation cont CAUTION The effects of ELECTROSTATIC DISCHARGE can damage electronic compo nents Use grounded wriststraps and mats when you are performi
37. EE GND 8 16510 TS 3 01 89 Figure 3 25 Equipment Setup For Test 6 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 26 Seiting for the HP 8161A Parameter Output A Output B Input Mode Norm Period PER 1205 Width WID 60 ns 10 ns Leading Edge LEE 1ns 1ns Trailing Edge TRE 1ns 1ns High Level HIL 3 2 V 3 2 V Low Level LOL DV DV Delay DEL 40 ns Ons Double Pulse 60 ns Output Mode Enable Enable 6 NS 3 2 4 1055 CLOCK OUTPUT B ov 120NS gt 3 2 DATA OUTPUT IM q 40NS gt t 6 NS gt 16510 WF02 2 89 Figure 3 26 Pulse Generator Waveform For Test 6 3 Assign the pod under test to Analyzer 1 in the Configuration screen as shown in figure 3 4 4 Set up Format screen as in figure 3 27 assigning a falling clock edge as master clock and rising 3 20 edge of same clock as slave clock Refer to steps a through c if unfamiliar with the menus a Touch lower Clock field then touch Mixed Clocks b Assign falling edge of the appropriate clock as master clock and rising edge of the same clock as slave clock c Assign the appr
38. L Clock 11111111 _ 97 0 Figure 3 13 Format Screen 3 8 HP 16510B Performance Tests 5 Configure the Trace screen without sequencing levels and set Count to Off as shown in figure 3 14 State Timing Trace 1 Run Sequence Levels While storing anystate ha time TRIGGER on 5 Branches Df f Store anystate Count Df f Prestore Off Label Base a b c d Figure 3 14 Trace Screen 6 Touch Run The State Listing screen will be displayed and should show all 0 s for the channels un der test See figure 3 15 State Timing Listing 1 Run Markers art Label gt Base gt Figure 3 15 Listing Screen Note To ensure a consistent pattern of 0 s in listing use Roll field and knob to scroll through State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clock lines J K L M and 8 Remove the pod body with probe tip assemblies still connected to test connector from probe ca ble of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 7 until all pods have been tested pods 1 through 5 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the test connector 9 Disconnect lo
39. LOL DV Delay DEL Ons Output Mode Enable 60NS Bei Output B 3 2 V DV Ons Enable 4 10NS DATA OUTPUT Ou CLOCK OUTPUT 16510 WF07 2 89 Figure 3 3 Pulse Generator Waveform For Test 1 3 Assign the pod under test to Analyzer 1 in the Configuration screen as shown in figure 3 4 Refer to steps a and bif unfamiliar with menus a Touch Type field of Analyzer 1 then touch State b Touch the Pod field of pod to be tested then touch Analyzer 1 State Timing A Configuration Analyzer 1 Analyzer 2 Name MACHINE 1 Unassigned Pods Figure 3 4 Configuration Screen HP 16510B Performance Tests 4 Assign appropriate clock a falling edge a clock period gt 60 ns and bits 0 through 7 of the pod un der test to a label in the Format screen as shown in figure 3 5 Refer to steps a and bif unfamiliar with the menus State Timing Format 1 Run Clock Period Clock Sumbol gt 60 ns J4 ymbols Pod Al TIL Clock 11111111 9 87 0 Figure 3 5 Format Screen for Pod 1 and J Clock Test a Touch top most Clock field and set appropriate clock for a falling edge See figure 3 6 Each pod contains one clock line The clock line on pod 1 is the J clock the clock line on pod 2 is the K clock etc State Timing Format 1 Clock Period Cloc gt 60 ns
40. M and N 8 Remove the pod body with probe tip assemblies still connected to test connector from probe ca ble of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 7 until all pods have been tested pods 1 3 and 5 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the test connector 9 Disconnect lower eight bits from test connector Attach bits 8 through 15 to test connector and re peat steps 3 4 6 7 and 8 until upper eight bits of all pods have been tested pods 1 3 and 5 PROBE TIP ASSEMBLIES NEXT POD CABLE POD BODY POD 1 CABLE 16510E02 Figure 3 10 Switching To Next Probe Cable 3 6 HP 16510B Performance Tests 3 8 Clock Qualifier and Data Inputs Test 2 Description This performance test verifies the setup and hold time specification for the rising edge transition of all clocks Specification Setup Time Data must be present prior to clock transition gt 10 ns Hold Time Data must be present after rising clock transition 0 ns Equipment Puke Generalo ET HP 8161 020 OscillaScOpe ce Gen deeg HP 54201A ae ul Ne UE RTE HP 10100 EK EE HP 1250 0781 BAG PE HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 11
41. Manual supplied with each module The General Information Section includes safety requirements a product description and a list of accessories supplied and of accessories available Also included are tables listing specifications and operating characteristics and a list of recommended test equipment HP 16510B General Information SECTION General Information To complete the service documentation for your system place this service manual in the 3 ring binder with your Logic Analysis System Service Manual 1 2 Modules Covered by Manual The information covered in this manual is for the HP 16510B State Timing Module 1 3 Safety Requirements Specific warnings cautions and instructions are placed wherever applicable throughout the manual These must be observed during all phases of operation service and repair of the module Failure to comply with them violates safety standards of design manufacture and intended use of this module Hewlett Packard assumes no liability for the failure of the customer to comply with these safety requirements HP 16510B General Information 1 4 Product Description The HP 16510B State Timing Module is an 80 channel 35 MHz state 100 MHz timing logic analyzer It can be configured as two independent state analyzers or one state and one timing analyzer Some of the main features are e Simultaneous state state or simultaneous state timing analysis e Time interval nu
42. S EXPRESSED OR IMPLIED HP SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE EXCLUSIVE REMEDIES THE REMEDIES PROVIDED HEREIN ARE BUYER S SOLE AND EXCLUSIVE REMEDIES HP SHALL NOT BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAM AGES WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY ASSISTANCE Product maintenance agreements and other customer assistance agreements are available for Hewlett Packard products For any assistance contact your nearest Hewlett Packard Sales and Service Office Addresses are pro vided at the back of this manual CWA388
43. T 2 SLOT SLOT B SLOT C SLOT D SLOT E 2 00 2 00 box to Load Test System SLOT SLOTB SLOTC SLOTD SLOTE Card ID codes 031 none none none none Figure 6 3 Load Test System d From test screen in figure 6 4 touch Test System then touch State Timing If multiple state tim ing modules select the one to be tested Test Sustem Configuration Cards 25 MHz STATE 100 MHz TIMING Controller RS 232C Printer Figure 6 4 Test System Screen 6 4 16510 e Figure 6 5 is the main self test menu Self tests can be run individually by touching specific test field or all tests automatically one time by touching All Analyzer Tests When All Analyzer Tests is run the test status will change to TESTED When individual tests are run the status will change to either PASSED or FAILED State Timing Chip 1 Tests status UNTESTED Chip 2 Tests status UNTESTED Chip 3 Tests status UNTESTED Chip 4 Tests status UNTESTED Chip 5 Tests All Analyzer Tests status UNTESTED status UNTESTED Figure 6 5 Main Test Menu f Touch Chip 1 Tests g An individual test run screen see figure 6 6 will give the test name a brief description of the test number of test runs and the number of test failures State Timing A Run Chip 1 Tests runs failures communication 0 1
44. ability for the failure of the customer to comply with these safety requirements 4 4 Recommended Test Equipment Recommended adjustment test equipment is listed in table 1 3 Any equipment that satisfies the critical specifications given in the table may be substituted for the recommended models 4 5 Extender Board Installation Before any adjustments or calibration checks are done the HP 16510B Card must be installed on an extender board The procedure for this installation is on the next page HP 16510B Installation Extender Board Installation cont CAUTION The effects of ELECTROSTATIC DISCHARGE can damage electronic compo nents Grounded wriststraps and mats should be used when performing any kind of service to this module Installation Considerations e Any empty slot be used in the card cage If there are other modules installed in the card cage it will be easier to use the same slot that the HP 16510B card came out of e Cards or filler panels below the slot intended for extender board installation do not have to be re moved Procedure a Turn instrument power switch off unplug power cord and disconnect any input connections b Starting from the top loosen thumb screws on filler panel s and card s c Starting from the top begin pulling card s and filler panel s out half way See figure 4 1 A TOP CARD C4 NEXT LOWEST
45. al quantity for each part is only given once at the first appearance of the part number in the list 5 4 Ordering Information To order a part listed in the replaceable parts table quote the Hewlett Packard part number check digit indicate the quantity required and address the order to the nearest Hewlett Packard office To order a part that is not listed in the replaceable parts table include the instrument model number instrument serial number the description and function of the part and number of parts required Address the order to the nearest Hewlett Packard office 5 5 Exchange Assemblies Exchange assemblies are available when a repairable assembly is returned to Hewlett Packard These assemblies have been set up on the Exchange Assembly program This allows the customer to exchange the faulty assembly with one that has been repaired calibrated and performance verified by the factory The cost is significantly less than that of a new assembly Exchange assemblies are listed in a separate section in the replaceable parts table They have a part number in the form XXXXX 695XX where the new parts would be XXXXX 665XX Before ordering an exchange assembly check with your local parts or repair organization for procedures 5 1 HP 16510B Replaceable Parts 5 6 Direct Mail Order System Within the USA Hewlett Packard can supply parts through direct mail order The advantages are as follows Direct
46. amperes analog to digital alternating current adjust ment aluminum amplifier analog American National Standards Institute assembly astigmatism asynchronous attenuator American wire gauge balance binary code decimal board buffer binary bridge bushing bandwidth ceramic cermet resistor calibrate calibration carbon composition counterclockwise ceramic cubic feet minute choke chamfered channel character centimeter complementary metal oxide semiconductor common mode rejec tion conductor counter connector cathode ray tube clockwise diameter digital to analog digital to analog converter darlington data double decibel referenced to 1mW direct current decoder degree demultiplexer detector diameter dual in line package division direct memory access double pole double throw DAC refresh controller driver DWL ECL ELAS EXT F FC FD FEM FF FL FM FR FT FW FXD GEN GND GP GRAT GRV H HD HDND HG HGT HLCL HORIZ HP HP IB HR HV HZ yo IC ID IN INCL INCAND INP INTEN INTL INV JFET JKT K L LB LCH LCL LED LG LI LK LKWR LS LV M MACH MAX integrated circuit microcircuit electron tube glow lamp voltage regulator breakdown diode cable socket crystal unit piezo electric or quartz d
47. ation nete elo ibit 5 1 Exchange Assemblies eiecti rennen ddnde a n 5 1 Direct Mail Order System xu i dine dia ene thane 5 2 5 1 Introduction This section contains parts and ordering information for the HP 16510B State Timing Module Table 5 1 lists the reference designations and abbreviations used throughout this manual Table 5 2 lists all replaceable parts by reference designator 5 2 Abbreviations Table 5 1 lists abbreviations used throughout the manual In some cases two forms of the abbreviations are used one in all capital letters the other partially or not capitalized This was done because the abbreviations in the parts list are always all capitals However in other parts of the manual other abbreviation forms are used with both lower and uppercase letters 5 3 Replaceable Parts List Table 5 2 lists replaceable parts and is organized as follows e Electrical assemblies in alphanumerical order by reference designation e Chassis mounted parts in alphanumerical order by reference designation e Electrical assemblies and their components alpghanumerical order by reference designation The information given for each part consists of the following e Complete reference designation e Hewlett Packard part number HP 16510B Replaceable Parts SECTION V Replacement Parts e Total quantity Qty of instrument e Description of part e Check digit The tot
48. d On Antistatic Mat niet gege eoe Leo 6 18 Retainer And SCreWS iiec qan tado gae Ade 6 18 Connec te 6 19 TABLE OF CONTENTS General Information Tet Introduction a tenet can fen ceti ree ene 1 1 1 2 Modules Covered By Manual enne nennen senten nennen 1 1 1 3 Safety 1 1 1 4 Product Description u 1 2 1 5 AG6essories Suppliedu uu sect u aaa per e Pia 1 2 1 6 Accessories Available LI athe aia ER 1 2 UE te ettet ctae eo 1 2 1 8 Operating Characteristics 1 2 1 9 Recommended Test 1 2 1 1 Introduction This service manual contains information for testing adjusting and servicing the HP 16510B State Timing Module Also included are installation procedures and a list of recommended test equipment This manual is divided into six sections as follows 1 General Information Il Installation IIl Performance Tests IV Adjustments V Replaceable Parts VI Service Information for operating programming and interfacing the HP 16510B State Timing Module is contained in the HP 16510B State Timing Operating and Programming
49. e to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence 3 10 HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 17 Seiting for the HP 8161A Parameter Input Mode Period PER Width WID Leading Edge LEE Trailing Edge TRE High Level HIL Low Level LOL Delay DEL Double Pulse Output Mode CLOCK OUTPUT B DATA OUTPUT Output A Norm 57 2 ns 1ins Enable 28 6NS Output B DV Ons 28 6 ns Enable S 16NS x1 t 57 2N8 SS SOM 16510 12 6 89 Figure 3 17 Pulse Generator Waveform For Test 3 3 Assign the pod under test to Analyzer 1 in the Configuration screen as in previous test figure 3 4 4 Assign appropriate clock a falling edge clock period lt 60 ns and bits 0 through 7 of the pod under test to a label in the Format screen See figure 3 13 5 Configure the Trace screen without sequencing levels and set Count to Off as shown in figure 3 14 HP 16510B Performance Tests 6 Touch Run The State Listing screen will be displayed and should list alternate F s and 0 s as shown in figure 3 18 State Timing A Listing 1 Markers off Label gt Base gt Figure 3 18 Listing Screen Note To ensure a consistent pattern of
50. eration is suspected Further checks requiring access to the interior of the instrument are included in the adjustment section but are not required for the performance verification HP 16510B Performance Tests SECTION 111 Performance Tests 3 5 Performance Test Procedures All performance tests should be performed at the instruments environmental operating temperature and after a 15 minute warm up period 3 6 Test Connector The performance tests and adjustments require connecting pulse generator outputs to probe pod inputs Figure 3 1 is a test connector that may be built to allow testing of multiple channels up to eight at one time The test connector consists of a BNC connector and a length of wire Connecting more than eight channels to the test connector at a time will induce loading of the circuit and true signal representation will degrade Test results may not be accurate if more than eight channels are connected to the test connector The Hewlett Packard part number for the BNC connector in figure 3 1 is 1250 1032 An equivalent part may be used in place of the Hewlett Packard part 16510 07 Figure 3 1 Test Connector 3 1 HP 16510B Performance Tests 3 7 Clock Qualifier and Data Inputs Test 1 Description This performance test verifies maximum clock rate with counting mode and the setup and hold times for the falling edge of all clocks to pods 1 3 and 5 Specification Clock repetit
51. est connector 9 Disconnect lower eight bits from test connector Attach bits 8 through 15 to test connector and re peat steps 3 4 6 7 and 8 until upper eight bits of all pods have been tested pods 2 and 4 HP 16510B Performance Tests 3 11 Clock Qualifier and Data Inputs Test 5 Description This performance test verifies the minimum swing voltages of the input probes and the maximum clock rate ofthe HP 16510B when it is in single phase mode Specification Minimum swing 600 mV peak to peak Clock repetition rate Single phase is 35 MHz maximum Clock pulse width gt 10 ns at threshold Equipment Pulse G neralor 122 4 8161 020 PE 54201 50 EE 10100 BNG Cable 2 D HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as in figure 3 22 In order to most accurately measure the amplitude of the test signals from the pulse generator high impedance scope probes should be used to look at the signal levels at the output of the BNC test connector HP 16500A OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER OA OB OA OB 2 AE o FIGURE T 520 3 1 g OLK BL 5 5 P P DATA BITS 0 um FIGURE B 500 3 1 8 GND 5 8
52. gnment field and turn on appropriate eight bits to be tested on off State Timing Format 1 Run Sumbols Figure 3 40 Format Screen 3 30 HP 16510 Performance Tests 4 Configure Trace screen as shown in figure 3 41 Follow steps a through c if unfamiliar with menus a Set Acquisition mode to Glitch b Set Find Pattern to all DON T CARE x s and present for gt 30 ns c Set Then find Glitch to all OFFs s State timing 8 Trace 1 Acquisition mode Glitch Label gt Base gt Find Pattern prese Then find Edge or Glitch Figure 3 41 Trace Screen 5 Adjust the power supply output for 150 mV 6 Touch Run then drag finger to Single Data displayed on Waveform screen should be high for the pod under test See figure 3 42 State Timing A Waveform 1 Run ccumulate off Sample period 20 000 ns s Div Delau Harkers 100 ns 0 s off Figure 3 42 Waveform Screen 3 31 HP 16510B Performance Tests 7 8 20 3 32 Adjust power supply for output of 150 Touch Run Data displayed on the Waveform screen should be all low for the channels under test as shown in figure 3 43 State Timing Waveform 1 Run Accumulate Sample period 20 000 ns s Div Delay Markers 100 ns 0 s off POD 1 1 1 1 1 1 1 1 Figure 3 43
53. ication Clock repetition rate Single phase is 35 MHz maximum With time or state counting minimum time be tween states is 60 ns Both mixed and demultiplexed clocking use master slave clock timing master clock must follow slave clock by at least 10 ns and precede the next slave clock by gt 50 ns Equipment Pulse Generator uq a ua asuata a ahua ph E HP 8161A 020 OscilloSCOD6 t orat toI teet es HP 54201A 50 Ohm Feedthtu 2 rite op e petet peto et ade HP 10100C BNG te te te egeta Ae e HP 1250 0781 BNG Gable 4 suan HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 25 Connect channels 0 through 3 and 8 through 11 of the pod under test to the test connector On the slave clock transition the four bits of the lower byte are transferred to the logic analyzer and on the master clock transition the four bits of the upper byte are transferred to the logic analyzer OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER A B B A BNC C TEE 300 GND FIGURE 3 1 8 CLK BIT R 0 o D B 5 ra 580 DATA BITS FIGURE BNC 3 1 8 T
54. ing Each recognizer is the AND combination of bit 0 1 or X patterns in each label Eight pattern recognizers are available when one state analyzer is on Four are available to each analyzer when two state analyzers are on Recognizes data which is numerically between or on two specified patterns ANDed combination of 05 and or 1s One range term is available and is assigned to the first state analyzer turned on The maximum size is 32 bits A user specified term that can be anystate nostate a single pattern recognizer range recognizer or logical combination of pattern and range recognizers There are eight levels available to determine the sequence of events required for trigger The trigger term can occur anywhere in the first seven sequence levels Each sequence level has a branching qualifier When satisfied the analyzer will restart the sequence or branch to another sequence level HP 16510 General Information Table 1 2 HP 16510B Operating Characteristics cont Occurrence Counter Sequence qualifier may be specified to occur up to 65535 times before advancing to the next level Storage Qualification Enable Disable Prestore Tagging State Tagging Time Tagging Symbols Pattern Symbols Range Symbols Each sequence level has a storage qualifier that specifies the states that are to be stored Defines a window of post trigger storage States stored in this window can be qua
55. ion rate With time or state counting mode on minimum time between states is 60 ns Hold time Data must be present after falling edge of all clocks 0 ns Setup time Data must be present prior to clock transition gt 10ns Equipment Puke Generato a e E aa HP 8161 020 ce aree Sc MG enn ane deg HP 54201A ae ul Re UE RTE HP 10100 EK EE 1250 0781 BAG Cable pP HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 2 OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER A B B A BNc 500 ch FIGURE 3 1 8 CLK BIT L R 0 o D B E S ra 580 DATA BITS FIGURE BNC 3 1 8 TEE GND 8 16510 7503 01 89 Figure 3 2 Equipment Setup For Test 1 Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results Also the oscilloscope must be high impedence HP 16510 Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 3 Setting for the HP 8161A Parameter Output A Input Mode Norm Period PER 60 ns Width WID 10 ns Leading Edge LEE 1ns Trailing Edge TRE 1ns High Level HIL 32V Low Level
56. ithout a protective conductor grounding Grounding one conductor of a two conductor outlet is not sufficient protection If this instrument is to be energized via an auto transformer for voltage reduction make sure the common terminal is connected to the earth terminal of the power source e interruption of the protective grounding conductor in side or outside the instrument or disconnecting the protec tive earth terminal will cause a potential shock hazard that could result in personal injury e Whenever it is likely that the protection has been impaired the instrument must be made inoperative and be secured against any unintended operation e Only fuses with the required rated current voltage and specified type normal blow time delay etc should be used Do not use repaired fuses or short circuited fusehold ers To do so could cause a shock or fire hazard Do not operate the instrument in the presence of flamma ble gasses or fumes Operation of any electrical instrument in such an environment constitutes a definite safety hazard Do not install substitute parts or perform any unauthorized modification to the instrument Adjustments described in the manual are performed with power supplied to the instrument while protective covers are removed Energy available at many points may if con tacted result in personal injury Any adjustment maintenance and repair of the opened in strument under vol
57. ive lead from the multimeter to the TP and the negative lead to the TP GND For the location of the test points and the adjustable resistor refer to figure 4 3 M Ult t R30 m E b Eres o C37L a R cuu S R35 n gt S 1 Rab Ul lt RIB x f eg csa 50 838 u RuB CHA i e Ge rua ER Ge es7 ese 5 0 j Rs z v v ceo 1 E m 2 N in 4 i 2 n a e SE e IN x R54 1 22 bo RE 7 a P cba 70 REI te j4 B oF Ys EIH o PON sel lee E N 5 oe oe oO ac e a J x ie N n feat d c79 cao 1 N P GN TP Figure 4 3 Adjustment Pod Location HP 16510B Installation b Select a range on the multimeter that will measure as close to 5 000 Volts as possible c From the startup screen shown in figure 4 4 touch these fields in the ordered sequence below 1 System 2 State Timing If multiple HP 16510B cards pick one to be adjusted 3 Configuration 4 Format Test Sustem
58. lified Stores two qualified states that precede states that are stored Counts the number of qualified states between each stored state Measurement can be shown relative to the previous state or relative to trigger Maximum count is 4 4 x 101 Measures the time between stored states relative to either the previous state or the trigger Maximum time between states is 48 hours With tagging on the acquisition memory is halved minimum time between states is 60 ns User can define a mnemonic for the specific bit pattern of a label When data display is SYMBOL mnemonic is displayed where the bit pattern occurs Bit pattern can include 0s 1s and dont cares User can define a mnemonic covering a range of values Bit pattern for lower and upper limits must be defined as a pattern of 0s and 1s When data display is SYMBOL values within the specified range are displayed as mnemonic offset from base of range Number of Pattern and Range Symbols Combined total both analyzer machines of 200 Symbols can be down loaded over RS 232 C 1 6 HP 16510B General Information Table 1 2 HP 16510B Operating Characteristics cont Timing Analysis Transitional Timing Mode Sample is stored in acquisition memory only when the data changes A time tag stored with each sample allows reconstruction of waveform display Time covered by a full memory acquisition varies with the number of pattern changes in the data Sample
59. ls may be grouped together and given a six character name Up to 20 labels in each analyzer may be assigned with up to 32 channels per label Primary use is for naming groups of channels such as address data and control busses Provided in the Configuration State Format and Timing Format menus for identifying high low or changing states on the inputs Two markers X and 0 are shown as dashed lines on the display Displayed as a vertical dashed line in the timing waveform display and as line 0 in the state listing display HP 16510 General Information Table 1 2 HP 16510B Operating Characteristics cont Marker Functions Time Interval The X and 0 markers measure the time interval between one point on a timing waveform and trigger two points on the same timing waveform two points on different waveforms or two states time tagging on Delta States State Analyzer Only Patterns Statistics Run Stop Functions Run Stop Data Display Entry Display Modes The X and 0 markers measure the number of tagged states between one state and trigger or between two states The X and 0 markers can be used to locate the nth occurrence of a specified pattern before or after trigger or after the beginning of data The 0 marker can also find the nth occurrence of a pattern before or after the X marker X to 0 marker statistics are calculated for repetitive acquisitions Patterns must be specified
60. mber of states pattern search minimum maximum and average time interval statistics e Uses transitional timing to store data only when there is a transition e 5 clock inputs 4 clock qualifiers storage qualification time and number of state tag ging and prestore e Small lightweight probing e Configurable to 160 channels wide HP 16511 1 5 Accessories Supplied The following accessories are supplied with the HP 16510B State Timing module Quantity one unless shown otherwise e Operating and Programming Manual Set Service Manual 16 Channel Lead Sets grey tip HP 01650 61608 Qty 5 16 Channel Probe Cable HP 16510 61602 Qty 2 1 2 16 Channel Probe Cable HP 16510 61601 Qty 3 e Grabbers Set of 20 HP 5959 0288 Qty 5 sets e Probe Cable ID Clip HP 16500 41201 Qty 5 e Probe and Cable Numbering Labels 01650 94303 Cable Numbering Labels 16500 94303 e Operating System Disk 1 6 Accessories Available Termination adapter HP 01650 63201 1 7 Specifications Module specifications are listed in table 1 1 These specifications are the performance standards against which the module is tested 1 8 Operating Characteristics Table 1 2 is a listing of the module operating characteristics The operating characteristics are not specifications but are the typical operating characteristics included as additional information for the user 1 9 Recommended Test
61. menus a Touch Master Slave then touch Demultiplex b Assign a falling edge of appropriate as master clock and a rising clock edge of same clock as slave clock c Assign all channels to pod under test only bits 0 through 7 will be available for assignment The Clock Period should be set to 60 ns 3 23 HP 16510B Performance Tests State timing Format 1 Clock Period Haster Clock Slave Clock lt 60 ns b T Pod Al TTL Master Slave tttttttttttttttt 12 7 42 OT raia 0 Label POD 1 Off Off Off Off off Off Off Figure 3 31 Format Screen 5 Configure Trace screen without sequencing levels and set Count to Off as shown in figure 3 14 6 Touch Run The State Listing screen will be displayed and should list alternating F s and 0 s as shown in figure 3 32 State Timing A Listing 1 Harkers off Label gt Base gt Figure 3 32 Listing Screen Note To ensure a consistent pattern of alternating F s and 0 s use the Roll field and knob to scroll through the State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clocks lines J K L M and N 8 Remove pod body with probe tip assemblies still connected to the test connector from probe ca ble of pod under test and connect to probe cable of next pod to test
62. nd troubleshooting If the module or a cable is determined faulty procedures are provided for module and cable replacement 6 2 Safety Requirements Specific warnings cautions and instructions are placed wherever applicable throughout the manual These must be observed during all phases of operation service and repair of the module Failure to comply with them violates safety standards of design manufacture and intended use of this module Hewlett Packard assumes no liability for the failure of the customer to comply with these safety requirements 16 CHANNELS HP 16510B Service SECTION VI Service 6 3 Recommended Test Equipment Table 1 3 lists recommended test equipment Any equipment that satisfies the critical specification given in the table may be substituted for the recommended models 6 4 Module Block Diagram and The ory of Operation The following paragraphs contain block level theory of operation This theory is not intended for component level troubleshooting rather it is to be used to help isolate a module failure to card level The HP 16510B State Timing Module is a one board 80 channel state timing analyzer It will run timing data up to 100 MHz and state data up to 35 MHz See figure 6 1 PER POD DATA POD TERMINATION DATA INPUT DATA PODS DATA NETWORK DATA ACQUISITION Te J6 1 5 AND COMPARATORS 7 EXT CLKS S CLKS 8 SPER Ee e DURS D A CONVERTOR gt M
63. ng any kind of service to this module Installation Considerations e The HP 16510B State Timing Module s can be installed in any available card slot and in any or der e Cards or filler panels below the empty slots intended for module installation do not have to be re moved The probe cables do not have to be removed to install the module Procedure a Turn instrument power switch off unplug power cord and disconnect any input connections b Starting from the top loosen thumb screws on filler panel s and card s c Starting from the top begin pulling card s and filler panel s out half way See figure 2 1 H CARD 14 NEXT LOWEST 2 16530 EX13 Figure 2 1 Endplate Overlap HP 16510B Installation d Lay the cable s flat and pointing out to the rear of the card See figure 2 2 e Slide the analyzer card approximately half way into the card cage f If you have more analyzer cards to install repeat step d and Figure 2 2 Cable Position g Firmly seat bottom card into backplane connector Keep applying pressure to the center of card endplate while tightening thumb screws finger tight h Repeat for all cards and filler panels in a bottom to top order See figure 2 3 NEXT HIGHEST BOTTOM CARD MES 16530 15
64. o State Timing Card Date Tested Calibration Interval 24 Months Board No Paragraph Test Results 3 7 Clock Qualifier and Data Inputs Test 1 Passed Failed Pod 1 Pod 3 Pod 5 3 8 Clock Qualifier and Data Inputs Test 2 Passed Failed Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 3 9 Clock Qualifier and Data Inputs Test 3 Passed Failed Pod 2 Pod 4 3 10 Clock Qualifier and Data Inputs Test 4 Passed Failed Pod 2 Pod 4 3 11 Clock Qualifier and Data Inputs Test 5 Passed Failed Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 3 33 HP 16510B Performance Tests Table 3 1 Performance Test Record Paragraph Test Results 3 12 Clock Qualifier and Data Inputs Test 6 Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 Passed Failed 3 13 Clock Qualifier and Data Inputs Test 7 Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 Passed Failed 3 14 Glitch Test Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 Passed Failed 3 15 Threshold Accuracy Test Pod 1 Pod 2 Pod 3 Pod 4 Pod 5 Passed Failed 3 34 TABLE OF CONTENTS Adjustments 4 1 Introduction ert a t ete v de 4 1 4 2 Galibration Interval ata rete hne otto od tdt m dtt 4 1 SET IT 4 1 4 4 Recommended Test 4 1 4 5 Extender Board Installation AA 4 1 4 6 lhstrament exten tkt vetas
65. ock Qualifier and Data Input 7 3 22 KT 3 25 Threshold Accuracy TeSt sorata rd eed RR ERAS A RISE C 3 29 3 1 Introduction The procedures in this section test the HP 16510B State Timing Analyser s electrical performance using the specifications listed in Section as the performance standards All tests can be performed without access to the interior of the instrument At the end of this section is a form that can be used as a record of performance test results 3 2 Recommended Test Equipment Equipment recommended for performance tests is listed in table 1 3 Any equipment that satisfies the critical specifications given in the table may be substituted for the recommended models 3 3 Test Record Results of performance tests may be tabulated on the Performance Test Record table 3 1 at the end of the procedures The test record lists all of the tested specifications and their acceptable limits The results recorded on the test record may be used for comparison in periodic maintenance and troubleshooting or after repairs and adjustments have been made 3 4 Performance Test Interval Periodic performance verification of the HP 16510B State Timing Module is required at two year intervals The instrument s performance should be verified after it has been serviced or if improper op
66. opriate eight bits of pod under test channels 0 3 and 8 11 or 4 7 and 12 15 The clock period should be set to 60 ns HP 16510B Performance Tests State Timing Format 1 Clock Period Haster Clock Slave Clock 5 bol lt 60 ns J4 Jt images Pod Al TTL Haster Slave 22 111 3111 Pol 19 87 0 Figure 3 27 Format Screen 5 Configure Trace screen without sequencing levels and set Count to Off See figure 3 14 6 Touch Run The State Listing screen will be displayed and should list alternating F s and 0 s as shown in figure 3 28 State Timing Listing 1 Harkers off Label gt Base gt Figure 3 28 Listing Screen Note To ensure a consistent pattern of alternating F s and 0 use the Roll field and knob to scroll through the State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clocks lines J K L and N 8 Remove pod body with probe tip assemblies still connected to test connector from probe cable of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 6 and 7 until all pods have been tested pods 1 through 5 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the test connector 9 Disconnect bits 0 3 and 8 11 from test connect
67. or Attach bits 4 7 and bits 12 15 to test connector and repeat steps 3 4 6 7 and 8 until all pods have been tested pods 1 through 5 3 21 HP 16510B Performance Tests 3 13 Clock Qualifier and Data Inputs Test 7 Description This performance test verifies the maximum clock rate for demultiplexed clocking during state operation Specification Clock repetition rate Single phase is 35 MHz maximum With time or state counting minimum time be tween states is 60 ns Both mixed and demultiplexed clocking use master slave clock timing master clock must follow slave clock by at least 10 ns and precede the next slave clock by gt 50 ns Equipment Pulse Generator uq umuy a ua asuata a ahua ph E HP 8161A 020 OscilloSCOD6 t orat toI teet es HP 54201A 50 Ohm Feedthtu 2 rite op e petet peto et ade HP 10100C BNG te te te egeta Ae e HP 1250 0781 BNG Gable 4 suan HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 29 by connecting channels 0 7 of the pod under test to test connector During demultiplexed clocking only the lower eight bits of each pod are used OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER gt UJ
68. owel emitter coupled logic elastomeric external arads metal film resistor carbon film composition eed emale lip flop lat oam from ront gain bandwidth product full wave fixed generator ground ed general purpose graticule groove henries high hardware hardened mercury height helical horizontal Hewlett Packard Hewlett Packard Interface Bus hour s high voltage Hertz input output integrated circuit inside diameter zinch include s incandescent input intensity internal inverter junction field effect transistor jacket kilo 103 low pound latch local light emitting diode long lithium lock lockwasher low power Schottky low voltage mega 106 megohms meter distance machine maximum 5 3 HP 16510B Replaceable Parts Figure 5 1 Parts Identification 5 4 HP 16510B Replaceable Parts Table 5 2 Replaceable Parts List Reference HP Part C Qty Description Mfr Mfr Part Designator Number D Code Number 16510 13510 0 1 HP 16510B Oper System Disc 16510 69503 6 1 HP 16510B Exchange Assy Al 16510 66501 0 1 Board Assembly A2 16510 61602 2 2 16 Channel Probe Cable Long A3 16510 61601 3 3 16 Channel Probe Cable Short A4 5959 0288 4 2 Grabber Assembly Set Qty 20 E1 01650 61608 6 5 Lead Set Grey complete assembly E2 5959 9333 8 Grey Lead
69. ration 5 500 Hz 10 minutes per axis 0 3 g rms Non operating Random vibration 5 500 Hz 10 minutes per axis 2 41 g rms and swept sine resonant search 5 500 Hz 0 75 g 0 peak 5 minute resonant dwell 4 resonances per axis HP 16510 General Information Table 1 3 Recommended Test Equipment Instrument Critical Specification Recommended Use Model DMM 3 1 2 DIGIT RESOLUTION HP 3478A A PULSE 5 ns PULSE WIDTH 20 ns PERIOD HP 8161A 020 P GENERATOR 1 3 ns RISETIME OSCILLOSCOPE DUAL CHANNEL 300 MHz BANDWIDTH HP 54201A POWER SUPPLY 10 2 V TO 10 2 V OUTPUT CURRENT 0 0 4 AMP HP 6216B P 50 OHM QTY 2 HP 10100G P FEEDTHRU BNC TEE 1 MALE 2 FEMALE 2 HP 1250 0781 P BNC Cable M M 48 INCH QTY 4 HP 10503A P EXTENDER NO SUBSTITUTE HP 16500 69004 A BOARD TEST BNC F PANEL MOUNT HP 1250 1032 P CONNECTOR Adjustments Performance Tests Troubleshooting TABLE OF CONTENTS Installation eek ir tele 2 1 El Ta ln Dee INN 2 1 243 Preparation For Seu u tet u 2 1 2 4 Power Requirements 2 1 2 5 Safety Requirem nts 2 1 2 6 Probe Cable Installation 2 1 2 7 Module Installation 5 atum ee ee E em eae uis 2 1 2 8 Operating Environment 2 4 2 0 Storages scm ote relieta eeu ter ate 2 4 Ee le TLA NEE 2 4 2 11 Tagging For Service
70. shold memory and CPU interface for the specified state timing acquisition chip Chip 3 Tests This test checks the threshold memory and CPU interface for the specified state timing acquisition chip Chip 4 Tests This test checks the threshold memory and CPU interface for the specified state timing acquisition chip Chip 5 Tests This test checks the threshold memory and CPU interface for the specified state timing acquisition chip 6 6 Troubleshooting Auxiliary Power The 5 Volt auxiliary power line is protected by a current limiting circuit If current on pins 1 and 39 exceeds 2 3 amps the circuit will open When the short is removed the circuit will reset in approximately 20 ms If you suspect a problem with this circuit remove all loads from pins 1 and 39 and measure with voltmeter There should be 5 volts after the 20 ms reset time MISC EX5 Figure 6 9 Power And Ground 6 7 Troubleshooting the HP 16510B If self tests indicate a failure begin at the Start of the troubleshooting flow chart shown in figure 6 10 When a specific test fails you will be instructed to replace a faulty module or you will be referred to other flow charts for the isolation of the faulty module or cable 6 7 HP 16510B Service HP 16510B MAIN TROUBLESHOOTING FLOWCHART Troubleshooting Sheet 1 I STATE TIMIMG CARD PRESENT AT THE APPROPRIATE CARDSLOT LOCATION IN THE CONF IGURAT ION MENU
71. sorbing material 70 to 100 mm 3 to 4 inch thick around all sides of the module to provide firm cushioning and prevent movement inside the container Seal shipping container securely e Mark shipping container FRAGILE to ensure careful handling e correspondence refer to module by model number and board number 2 11 Tagging for Service If the module is to be shipped to a Hewlett Packard office for service or repair attach a tag showing owner with address complete board number and a description of the service required TABLE OF CONTENTS SECTION Ill Performance Tests 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 3 10 3 11 3 12 3 13 3 14 3 15 IATFOGUCTION kuy e ea Yen anga 3 1 Recommended Test Equipment 3 1 eet ler marku a eg 3 1 Performance Fest Interval n De e eve eevee Sag a e S 3 1 Performance Test Procedures eren d et e A 3 1 MOST s us iid erp ette erar Eoi da a adds 3 1 Clock Qualifier and Data Input Tests 3 2 Clock Qualifier and Data Input Tests 2 3 7 Clock Qualifier and Data Input Tests 3 10 Clock Qualifier and Data Input 4 3 13 Clock Qualifier and Data Input Tests be 3 16 Clock Qualifier and Data Input Tests 6 sss 3 19 Cl
72. t be high impedence 3 25 HP 16510B Performance Tests 2 Set the pulse generator as follows for the output shown in figure 3 34 Seiting for the HP 8161A Parameter Output A Output B Input Mode Norm 99 Period PER 20ns Width WID e Leading Edge LEE ins Trailing Edge TRE ins ae High Level HIL 32V Low Level LOL DN 000000 0 Delay DEL On Output Mode Enable 4 20NS DATA OUPUT 5 5 16510 WFQ1 7 87 Figure 3 34 Pulse Generator Waveform For Glitch Test 3 Assign the pod under test to Analyzer 1 in the Configuration Screen as shown in figure 3 35 Refer to steps a and bif unfamiliar with menus a Touch Type field of analyzer 1 and set to Timing b Touch pod to be tested and assign to Machine 1 State Timing Configuration Analyzer 1 Analyzer 2 MACHINE 1 Unassigned Pods Figure 3 35 Configuration Screen 3 26 HP 16510 Performance Tests 4 Assign the appropriate eight bits of the pod under test in the Bit Assignment field then assign the pod to a label in the Format screen as shown in figure 3 36 State Timing Format 1 Run Symbols Pod Al a tttttttt 2087 0 Figure 3 36 Format Screen 5 Configure Trace screen as shown in figure 3 37 Follow steps a through c if unfamiliar with menus a Set Acq
73. tage should be avoided as much as pos sible and when inevitable should be carried out only by a skilled person who is aware of the hazard involved Capacitors inside the instrument may still be charged even if the instrument has been disconnected from its source of supply SAFETY SYMBOLS Instruction manual symbol The product will be marked with this symbol when it is necessary for the user to refer to the instruction manual in order to protect against damage to the product 5 Indicates hazardous voltages Earth terminal sometimes used in manual to indi cate circuit common connected to grounded chas sis The WARNING sign denotes a hazard It calls attention to a procedure practice or the like which if not correctly performed or adhered to could result in personal injury Do not proceed beyond a WARNING sign until the indicated conditions are fully understood and met The CAUTION sign denotes a hazard It calls attention to an operating procedure practice or the like which if not correctly performed or adhered to could result in damage to or destruc tion of part or all of the product Do not proceed beyond a CAU TION sign until the indicated conditions are fully understood or met CAUTION 5 10984 CERTIFICATION Hewlett Packard Company certifies that this product met its published specifications at the time of ship ment from the factory Hewlett Packard further certifies that its calibration
74. ts 3 15 Threshold Accuracy Test Description This performance test verifies the threshold accuracy within the three ranges stated in the specification Specification Threshold accuracy 150 mV accuracy over the range 2 0 to 2 0 volts 300 mV accuracy over the ranges 9 9 to 2 1 volts and 2 1 to 9 9 volts Equipment Power Supply ux dette eere ar taut uo arid xt ies HP 6216B BNG Gables inte tatit eiat d ats HP 10503A Test Connector 1 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as shown in figure 3 39 HP 16500 POWER LOGIC ANALYZER SUPPLY OUTPUT DATA BITS ay PB 8 R o FIGURE p 8 1 E GND 5 8 16510 7501 8 87 Figure 3 39 Equipment Setup For Threshold Accuracy Note In this setup only eight channels are tested at a time to minimize loading Ground leads must be grounded to ensure accurate test results 3 29 HP 16510B Performance Tests 2 Assign the pod under test to Analyzer 1 in the Configuration screen as shown in figure 3 35 3 Configure the Format screen for User Defined pod threshold of 0 0 V for the pod under test and as sign the appropriate eight bits in the Bit Assignment field as shown in figure 3 40 Refer to steps a and b if unfamiliar with menus a Touch the Pod Threshold field then touch User defined and assign appropriate threshold volt age b Touch the Bit Assi
75. ts ECL Threshold Preset 1 3 volts Threshold Range 9 9 to 9 9 volts in 0 1V increments Threshold Setting Threshold levels may be defined for pods 1 2 and 3 on an individual basis and one threshold may be defined for pods 4 and 5 Dynamic Range 10 volts about the threshold Minimum Input Overdrive 250 mV or 30 of the input amplitude whichever is greater Maximum Voltage 40 volts peak Measurement Configurations Analyzer Configurations Analyzer 1 Analyzer 2 Timing Off Off Timing State Off Off State Timing State State Timing State State Off Off Channel Assignment Each group of 16 channels a pod can be assigned to Analyzer 1 Analyzer 2 or remain unassigned The HP 16510B contains 5 pods 1 4 HP 16510B General Information Table 1 2 HP 16510B Operating Characteristics cont State Analysis Memory Data Acquisition 1024 samples channel Trace Specification Clocks Clock Qualifier Five clocks are available and can be used by either one or two state analyzers at any time Clock edges can be ORed together and operate in single phase two phase demultiplexing or two phase mixed mode Clock edge is selectable as positive negative or both edges for each clock The high or low level of up to four clocks can be ANDed with the clock specification Setup time 20 ns hold time 5 ns Pattern Recognizers Range Recognizers Qualifier Sequence Levels Branch
76. ug power cord and disconnect any input or output connec tions b Starting from the top loosen thumb screws on filler panel s and card s c Starting from the top begin pulling card s and filler panel s out half way See figure 6 11 CAUTION All multi card modules will be cabled together Care should be taken to pull these cards out together CARD 1 NEXT LOWEST 5 2 16530 EX13 Figure 6 11 Endplate Overlap 6 14 HP 16510B Service d Pullthe faulty state timing module completely out e Push all other cards into card cage but not completely in This is to get them out of the way for state timing module installation f Replace faulty card or cable in module if faulty cable see paragraph 6 9 Probe Cable Replace ment 9 reinstall module lay cable flat and pointing out to the rear of card See figure 6 12 16510 EXO1 Figure 6 12 Cable Position h Slide card approximately half way into mainframe card slot i If there are more modules to install repeat steps and until all modules in place HP 16510B Service j Firmly seat bottom card into backplane connector Keep applying pressure to the center of card endplate while tightening thumb screws finger tight k Repeat for all cards and filler panels in a bottom to top order See figure 6 13 HIGHEST
77. uisition mode to Glitch b Set Find Pattern to all DON T CARE X s and present for gt 30 ns c Set Then find Glitch on all channels all s State Timing Trace 1 Acquisition mode Glitch Label gt Base gt Find Pattern prese Then find Edge or Glitch Figure 3 37 Trace Screen 3 27 HP 16510B Performance Tests 6 Touch Run then drag finger to Single The timing analyzer will acquire data and show glitches for channels under test as shown in figure 3 38 Select the Delay field and spin knob to ensure consis tent glitch detection State Timing Waveform 1 t Sample period 20 000 ns s Div Delay 100 ns 204 ns Figure 3 38 Listing Screen Note If sample clock and data synchronize glitches may be displayed on the Timing screen as valid data transitions 7 Remove pod body with probe tip assemblies still connected to test connector from probe cable of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 and 6 until all pods have been tested pods 1 through 5 Make sure the pod to be tested is as signed in the Configuration screen 8 Disconnect lower eight bits from test connector Attach upper eight bits to test connector and re peat steps 3 4 6 and 7 until the upper eight bits of all pods have been tested pods 1 through 5 3 28 HP 16510B Performance Tes
78. ure the Trace screen without sequencing levels and set Count to Off See figure 3 14 HP 16510B Performance Tests 6 Touch Run The State Listing screen will be displayed and should list alternating F s and 0 s as shown in figure 3 24 State Timing Listing 1 Harkers off Label gt Base gt Figure 3 24 Listing Screen Note To ensure a consistent pattern of alternating Es 0 use the Roll field and knob to scroll through the State Listing 7 Connect the next clock line to the test connector and repeat steps 4 and 6 Repeat until all clocks have been tested clocks lines J K L M and N 8 Remove pod body with probe tip assemblies still connected to test connector from probe cable of pod under test and connect to probe cable of next pod to test See figure 3 10 Repeat steps 3 4 6 and 7 until all pods have been tested pods 1 through 5 Make sure the appropriate pod and clock are assigned and all probe assemblies are still connected to the test connector 9 Disconnect lower eight bits from test connector Attach bits 8 through 15 to test connector and re peat steps 3 4 6 7 and 8 until upper eight bits of all pods have been tested pods 1 through 5 3 18 HP 16510B Performance Tests 3 12 Clock Qualifier and Data Inputs Test 6 Description This performance test verifies the maximum clock rate for mixed mode clocking during state operation Specif
79. wer eight bits from test connector Attach bits 8 through 15 to test connector and re peat steps 3 4 6 7 and 8 until upper eight bits of all pods have been tested pods 1 through 5 3 9 HP 16510B Performance Tests 3 9 Clock Qualifier and Data Inputs Test 3 Description This performance test verifies the hold time specifications for the falling clock transitions of all clocks to pods 2 and 4 Specification Hold Time Data must be present after falling clock transitions 1 ns Equipment Pule uu uu u a rh dia E HP 8161A 020 96 05 0 astutia di ceti de 54201 50 OhmFeedthtru 2 eret epi ed vere rone op dv HP 10100C BNG Tee 2 mr 1250 0781 BNG Gable uum u aq a a HP 10503A Test Connectors 2 see figure 3 1 Procedure 1 Connect the HP 16510B and test equipment as in figure 3 16 OSCILLOSCOPE PULSE GENERATOR LOGIC ANALYZER A B A B BNC TEE 5 5 0 ous FIGUR IGURE CLK BIT P R O o B 5 r DO DATA BITS FIGURE BNC 3 1 8 TEE GND In sj 8 1651 5 3 1 89 Figure 3 16 Equipment Setup For Test 3 Note In this setup only eight channels are tested at a tim
80. x bee REEL ER ban 5 1 5 2 Saa n s ayauya iver ne ativan envi 5 1 5 3 Replaceable Pans List 4e eti s 5 1 5 4 Ordering Informiati n uuu eicere tad pa deer de leue EE du 5 1 5 5 Exchange Assemblies db ODER UH dud dui S 5 1 5 6 Direct Mail Order System 5 2 SECTION VI Service od INTO CEG IN cis toe RR em RD e temi ets E 6 1 6 2 Safety Requirements L ies Led caute ded a dee 6 1 6 3 Recommended Test Equipment 2 80 8 6 1 6 4 Module Block Diagram And Theory 6 1 6 5 Self Tesis neueste niic ea 6 3 6 6 Troubleshooting Auxiliary 6 7 6 6 Troubleshooting The HP 16510 6 7 6 7 Module Replacement uu l 6 14 6 8 Probe Assembly 6 17 vi HP 16510B Table of Contents LIST OF TABLES TABLE TITLE PAGE 1 1 AP 16510B Specifications x anderen uuu aa aiiora aa den im 1 3 1 2 16510 Operating Characteristics 1 4 1 3 Recommended Test u 1 9 3 1 Performance Test 2 144 24440040011 nnns 3 33 5 1 Reference Designations and

HP 16510B 35 MHz State/100 MHz Timing Logic Analyzer Service

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