LG LAC6700R Service manual. www.s
Contents
1. i 1 i 1 5 5158 t 1 1 D 5597 3 5 8 T aca x 1 A 8 E e a BLH i f U t BE 8 1 4 Hes 82. 1 Check VCC pin 20 6 amp GND 1 gt 2 Check input 11 12 14 15 TAB OUT lt 3 Check Standby pin 4 dO 7 Follow the below list a OUT 7 0072 4 Check Mute function pin 22 5 Follow the below list x x gt Pwcnoa R Stand by Power Sound Voltage 0 to 1 5 OFF ON ON 3 5 to 6V _ OUT3 Mn e RL 5 Check Ripple pin 10 ours 2 Normally it is high about 10V T DV OUT4 9 c Mute Sound Voltage T OFF 01015 E a OUTA OFF ON 3 5 to 6V lt 43 STBY MUTE 6 Re soldering all the pin of IC 19 7 4 68 2 Prevent crack of solder line coos PRE GND Keep changed IC We request that you send it to HQ L PW GND Picture 1 Power IC desc LGE Internal Use Only 2 2 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes Ns Symptom Locatonno DISPLAY amp LIGHTING No Display or Checked the LCD DRV Vdd Q322 Q316 Q317 Some Display is broken 1 901 69 70 71 72 73 Checked the LCD DRV Ground IC901 74 Checked the LCD DRV OSC 901 75 76 Checked the LCD DRV control 1 401 75 79 85 86 1 901 77 78 79 80 Checked the LCD DRV to LCD P
3. 6 20000 8 900000 2 700000 rgPosition Coupling 2006 02 26 09 50 24 Normal YOKOGAWA E 744 MoinrSO0k gt _____ 5 Yi 6 260000 8 900000 AY 2 70000U 00 VALIV Oo 10 1 DE IC510 MLD DC Full PIN58 IC510 MCLK PIN70 C510 MDATA viai PIN72 m OG 0 mu aua 1C510 NRST Fair PIN57 IC510 STAT PIN71 Edge CHL IC510 MDATA SM PIN48 Display rgPosition Fig 14 USB D D signal 2006 05 09 19 06 18 YOKOGAWA Normal 1 5 5 15 4 UART UART 1 10 1 5 00 DC Full CH2 10 1 5 00 U diu DC Full CH3 10 1 5 00 DC Full CH4 10 1 5 00 U diu DC Full PN503 PIN3 D PN503 PIN2 0 R560 UART RX R562 UART TX Edge CH2 CH4 Display rgPosition Coupling Probe 5 Offset Next OFF 1 904 10 1 4 60 9 Full 172 LGE Internal Use Only INTERNAL BLOCK DIAGRAM OF ICs 1 1C518 701 amp 702 54580 1 1 BLOCK DIAGRAM Inverting Non inverting Output2 Input2 Input 2 8 7 6 5 oP 2 AMP2 OP AMPI 1 2 3 4 Outputl Invertin
4. 54519 4 ED 5 400 2 g2 5 R5039 R5336 R5337R5340 C594 o 16516 505 552000 XS o o 016509 0 0 o am 25903 o o BOTTOM VIEW LGE Internal Use Only 368201 Rce AX3 1 0059 JO g o o 9 wp To o momo 2 40 2 39 lt S lt OWN oa C533 5104 C531 c532 2 o
5. R491 Ov 908335 UPS o o ge 22 DL 4 ETG o o o lf 21096 Oe J1097 J1109 725 8735 5 BD a 0705 7 5 0000000000000 726 o o 18 28 D 1 oo S UNER 90 Reo sl z ps 2 300 GD cem peo J1093 0801 8720 R736 LAE o o o e 1092 R342 194 8706 703064 E HS cl 38 529 5 geo S gt 555708702555 2 s REN 8716 0009000 8105 717 9104 9 7 R315 R314 0309 o OG R318 0304 20303 o oo Vi o o 9 ay o M 8 4 120 LES ERIS BEES 615 ml H o 5 321 C428 o oo 8 R202 o 8 03059 030
6. Volume Mathusitha 1CLK 1Pulse trefe 2 KEY BLOCK KEY LIGHTING BLK 5m per Node Receiver R24FH1A Wonkwang w LCD B LIGHTING BLK 20mA per Node 2 CD MOTOR DAV IC FRONT MICOM TEL MUTE PULL UP 3 3 TUNER B 4V LPF OPAMP 5 5 5 B T3 3V MAIN STANDBY 5V B T ON 7 POWER UP FRONT USB OPTION USB SV BACK UP14V LAc6700 6750 POWER ON USB FLAGITO Main Micom Main Micom c1o59refe oti 1 2 23 2 24 LAC7700 2006 07 29 006503483 LGE Internal Use Only CIRCUIT DIAGRAMS 1 MAIN CIRCUIT DIAGRAM 12 gi AM ANT FM ANT 1101 104 04703 C701_4 7 16 0702 27 741 4 7 16 P N 65124000150 R70f Sek R710 55K 732 27 tour 702 703 712 A744 RF GND 1402 Ws 519 560P 5 8 SO ST IND Wm S METER 1 1 1104 C105 06 6 40 0 004 3 0104 im STAND BY 609 27k C818 5602 R610 27 4 Vnon inyi 4 417 1615 vcc 4 Vnon iny 5 2 3 2 5 8 7 8 9 7 0801 98160 T C806 47 16 C707 le 8806 10K A HEZE 0610 0612 4 5513 Vnon inva CREF
7. o MP LAC M7700 7750 6700 6750 EAX38244001 2007042600 5 o o m PN503 22 Q 55 1504 508 1597 1509 526 9 9 9 0502 E o Oz o BB s Pasa C557 85451 8 1 2 05 R5471 R575 o R5458 R Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 4 USB P C BOARD TOP VIEW BOTTOM VIEW 2007 03 07 LAC6700R LAC6710R LAC6750R EAX33654801 USB BOARD o 2212 5 LCD LIGHTING P C BOARD LAC7700 ar Tr 9 LCD LIGHTING PQ EAX33816101 LGE Internal Use Only 2 41 2 42 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes SECTION 3 EXPLODED VIEWS 1 CABINET AND MAIN FRAME SECTION Accessory 1 Loc No LGE Internal Use Only 3 2 3 1 Copyright 2007 LG Electronics Inc All right reserve
8. 2 21 BLOCK DIAGRAM bee and ig tt du SAM 2 23 CIRCUIT DIAGRAMS ccs te tact ttt ete bn accusest 2 25 1 MAIN CIRCUIT DIAGRAM ctt 2 25 2 1 CIRCUIT DIAGRAM rn cud 2 27 3 CDP 2 CIRCUIT DIAGRAM M MA a a 2 29 4 FRONT CIRCUIT DIAGRAM tttt ttt ttt ttt 2 81 5 USB CIRCUIT DIAGRAM ttt ttt ttt ttt 2 33 6 LCD LIGHTING CIRCUIT DIAGRAM ttt ttt 2 34 PRINTED CIRCUIT DIAGRAMS s ttt ttt 2 85 1 P CEBOABID seres DER 2 85 2 ODP PO BOARD A 2 39 S FRONT PC BOARD 2 40 A USBIPO e DDR 2 41 5 LCD LIGHTING P C BOARD ttt ttt ttt ttt 2 4 SECTION3 EXPLODED VIEWS 1 CABINET AND MAIN FRAME SECTION 44 tente anna tests tasa testa tha tasa nasa assa Ia sss assa asa sss assa asas 3 1 2 MECHANISM PICK UP SECTION 22 2 2 aun e a 3 3 SECTION 4 REPLACEMENT PARTS 157 4 1 Copyright 2007 LG Electronics Inc All right reserved 1 1 LGE Internal Use Only Only for training and service purposes SECTION 1 SUMMARY SERVICING PRECAUTIONS Always disconnect the power source before 1 Removing or reinstalli
9. m FLASH lC ze DOWNLOAD Transc DSP SEEIC 1002 ee At Ay LAC6700 6750 OPTION LAC7700 7750 External Mic MCU RST LCD RST LAC7700 7750 5700 4700 POWER FA 5 LA AM FAS L BYPASS 8 8 4V AUDIO 4 8 5 SW 5 9 5 8 y d sa SOA TB2904HQ ALL MODEL m 5 8 1047419 E VOL 40mA Radio Input QUT FLt gt M ke RN CD Input 8115 OUT FAY fo Sf AUX IN 2 Mx gt e 3 QUT ALY B T Input USB OPTION a OUT AL Li QUT ARH QUT PR y USB Oti 5 Line Mute ST BY 889 6 want REMOTE 5 5 8 KS bse 3 5 4 9 DIM 5 DIMER IN 8 5 5 8 m 9 m ACC IN Flash Memory s 5 5 5435 v 5 PART EALA PART O 2 svsrmo 3 GERM Fem BLIGHT
10. Checked RF signal 1 506 41 16 out check Fig 9 Y YES Checked the spindle NO IC506 21 motor control Fig 7 513 8 5 Y YES NO Checked the TRVP control 5 504 5 6 Fig 13 Y YES 1 506 24 Checked the tracking control Fig 6 IC513 19 20 Y YES OK Copyright 2007 LG Electronics Inc All right reserved 2 5 LGE Internal Use Only Only for training and service purposes no sound Checked the DAC signal in YES IC520 1 2 3 No ejected the CD 5 i 901 16 MAIN Checked the Eject key Checked the loading motor D6 D5 control YES C LGE Internal Use Only 2 6 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 3 USB PART TROUBLESHOOTING Something wrong with the USB Only NO USB or USB CHECK display NO Checked the USB Vdd 1C512 2 L507 L508 L509 R566 o lt o Checked the USB NO interface IC ground 511 17 37 40 61 71 YES Checked the memory NO IC505 24 IC ground 24 YES Checked the USB NO interface IC reset IC511 57 CN510 31 YES Checked the USB NO interface IC X tal X505 YES Checked the Flash NO memory option port IC511 65 lt
11. alg 1060 2 8 824 097 8 5 2 8 8 2 8 o SGND77 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 5 USB CIRCUIT DIAGRAM 6 LCD LIGHTING CIRCUIT DIAGRAM TO MAIN BOARD USB_5V IB1 0994 0992 7 6 5 4 5 LAC6750H USB L AC7700HR 2006 10 27 LCD LIGHTING EBY349B84901 500603662 2 1 D E F G H K L M N 5 T LGE Internal Use Only 2 33 2 34 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes PRINTED CIRCUIT BOARD DIAGRAMS 1 MAIN P C BOARD TOP VIEW 10 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 5 5 a R602 150 E 8 28 AGT 200 Ru 0 J1103 21095 ES Q704 Q 0 9 2 22 2 22 2 P _ R103
12. Pt ale Geo ABASAR amp 10 1 8 adi il lt ale x INANI i 1 23 x z 1 Lo TAE n moth B E 8 A a uL ME Wes 116 M i i LO h 1 1 We 8 d o 1 7 T 89 xd i 8 E i gt d E amp Ei 0 I 1 uot e Oo is 9 t ro M 2 1 94759 s TER eee 2 occa oo Bi i ets git Rex 1 T 1 il to t en 0 ANN i 0 pe be 4 455 A 1558 2s as 3 8583 88 55 Es lag jp 2 ma T S Vi 13634 az ne MS BSN Hs uide c 484444444 h p 19s XL 8 E fes an TE 4 32 E e M P p ae ar Be Ay am
13. 0 06 U 2006 12 29 11 54 13 YOKOGAWA i 2 5 5 S00ns liv Next az 2 lt Mains TOK gt gt SL SLED CON LOADING IN 10 1 5 00 U div DC Full CHZ 10 1 5 00 DC Full CH3 10 1 5 00 U diu DC Full CH4 10 1 2 00 U div x PIN504 PINS PIN504 PING R5091 SLED rage R5465 LOAD IN 0 06 U MEMINI cocer LGE Internal Use Only Fig 5 Focus control signal 2006 12 2 11 05 09 Normal YOKOGAWA 5 5 5 200 5 cene 11 CH1 10 1 1 00 AC Full CH2 10 1 1 00 U diu 100MHz CH3 10 1 1 00 U diu F Full CH4 10 1 1 00 U diu Full PN504 F PIN1 IC506 FOP R511 Fage F R517 FE PN506 F PIN4 0 15 U 58 5938nU 66 4063 0 125 000nU Li 280 0ns 400 0 5 120 015 1 4 8 333333 2 rgPosition Coupling 2 10d v Fig 7 Spindle control signal YOKOGAWA 15 44 2006 12 22 11 21 12 Epo Normal 1 5 5 TXCHumi 1 CHI 10 1 3 Pd 1 00 U div AC Full CHZ 10 1 5 00 U div AC 100MHz CH3 10 1 5 00 U div AC Full CH4 10 1 1 00 U diu Full IC506 PLLF PIN54 PN504 SP PIN7 PN504 SP PIN8 Edge CH4 futo 0 15 U Next az pa ns p 1 666667Hz Displa
14. o NO Checked the D D port 511 62 63 14 Checked the USB NO indication port IC511 27 lt Checked USB NO interface IC control 1 506 62 63 64 YES OK Copyright 2007 LG Electronics Inc All right reserved 2 7 LGE Internal Use Only Only for training and service purposes FILE display 506 26 31 57 60 79 Checked the CD DSP ground IC506 72 Checked the CD DSP reset X503 Checked the CD DSP X tal YES Fig 10 12 IC506 67 68 69 70 71 72 73 Checked the CD DSP control YES 511 22 23 IC510 50 51 NO Checked the USB data YES C Y YES USB no sound IC520 1 2 3 LGE Internal Use Only 2 8 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes WAVEFORMS Fig 1 Switching condition for loading Fig 2 Switching condition for unloading Normal Normal 2006 12 27 11 50 59 2006 12 27 11 51 15 p ES 1 ets 10 1 ane m 40 1 LOADING 4 mm DEI P 5 5 00 U diu B 5 00 U diu 3 DC Full DC F
15. Checked the CD DSP ground YES Checked the motor DRV YES VDD Checked the DSP reset YES Checked the CD DSP X tal YES Checked the disc in load switch YES Checked the loading motor control YES Checked the 8 12cm sens switch YES YES OK LGE Internal Use Only NO NO NO NO NO NO Fig 1 2 NO Fig 3 4 NO Fig 1 2 2 4 20 CN510 13 6 506 26 32 47 78 18 IC504 7 8 20 IC506 72 X503 PN504 3 CN510 12 17 513 12 14 15 PN504 1 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes No reading 8 FILE CHECK DISPLAY YES aee NO Checked the limit switch PN504 4 Fig 1 2 Checked the motor DRV NO CN510 16 mute control Y YES Checked the motor NO D5 D6 LD control Fig 3 4 Checked the CD DSP control gt 506 67 68 69 70 71 Fig 10 12 y ES NO IC506 25 Checked the focus control Fig 5 IC513 17 18 Checked the focus error IC506 25 level out FE mon Fig 5 R517 YES Checked the PLL locking NO 5 IC506 54 FSEQ Fig 9 Y YES
16. PDECK INN Deck inner SW P71 EX17 KR1 PDECK_12 8 Deck 2cm disc detect SW P70 EX16 KRO PSLED_CTRL Deck sled Loading motor selector PO6 WAIT PCDP_FEW Loading motor loading P05 CLKOUT PCDP_REW Loading motor unloading EVSS1 Ground Potential for Ports PDRV_MUTE P81 EX1 PDAC MUTE DAC mute P82 EX2 RST reset P83 EX3 PCDP_MLD DSP P84 EX4 PZERO MUTE DAC zero mute monitor P85 EX5 PISP USB Flash upgrade enable P86 EX6 PUSB POWER PBT USB power on BT power on 3 3V Ctrl P87 EX7 PUSB SW USB device detect sw P30 INTP3 RTC1HZ PUSB_RESET reset EVDD1 Positive power supply for ports P50 EX8 PUSB PROTECT Protection IC overcurrent detection P51 EX9 POPT INO For diode option check signal 1 or 2 P52 EX10 POPT IN1 For diode option check signal 1 or 2 inputi 5 11 POPT 1 2 For diode option check signal 1 or 2 input2 54 12 OUTO For diode option check signal 1 output P55 EX13 POPT_OUT1 For di
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18. 4006 ess 695 Ne 2295 1696 49 8 8995 ME 4 295 N 9 5995 5 mes 3 995 NE 01985 0406 o 0 2 es an 710 95 2795 0 1986 UN 910 eal ECON NAE 9 NN hh 196 N EN 8 8 3 8 elelee ND 2255 TOO OOOO a 50507 JuL 25 2060 E UTE pe Eie lt 8 80602 Rx 2 KET 795 ogg 9 8 gt 2 Ta eT PA 8 099 BIE em 02601 2 089 gt gt 4 anez dia 0468 m SES preo mz 1063 i 5 alls gu 5488 p 5 DH En zzz o p ey ey 5 qq 0085 1601 E 5 5 9 Cr io e ANN V 4 3 pe 11601 1 uot 8 uS 7060 hs 90507 6060 1201601 Q Lr a es 069 e e x ich 9 9060 e 2 Wy lom i d p 6201 9 wy 142 098 0607 20607 dns ey ey 4 24 4 e g E TO 5 OOOO 7 g ozz ANN
19. 2007 LG Electronics Inc All right reserved VBUP Back up In the uper table On means always On Off means compulsory Off and On Off means that it can control by control terminal Thermal protection circuit A built in thermal protection circuit TSD Thermal shut down prevents thermal damage to the IC outputs except VDD pin14 and FREG pin2 amp 3 are switched off when the circuit operates revert to the original state when the temperature drops to a certain level Overvoltage protection circuit The overvoltage protection circuit surge protector turns off all outputs without Vdd when VB voltage is more than about 21V And the overvoltage protection circuit surge protector turns off Vdd output with other all outputs when VB voltage is more than about 26V When the overvoltage protection operates on gt 18 condition the stand by current increases Overcurrent protection circuit FREG B pin2 ILMOUT pin4 CDOUT pin6 DSPOUT pin7 AUDIOOUT 10 EXITOUT pin12 VDDOUT pin14 output circuits are built in overcurrent protection circuit based on the respective output current These overcurrent protection circuits limit the current with a curve shape of 7 in the voltage current graph This prevents IC destruction due to overcurrent 2 13 LGE Internal Use Only Only for training and service purposes 3 302 3 1 BLOCK DIAGRAM Vout 4
20. 0000000000 o o 6 SD ST INT o o 7 5 o o 8 21098 Cen 2 9 9 9 8 J1102 46 o 10 6 0 s 6809 OO o 5 Se o o 911 2 ZO 4 E 2 o 2 55 5 Y o TOSS 12 00 e er te 9 e 13 C309 5 14 01 15 CE1 5 5V o 7 0 GND 1 SERES oilo amb 5 5 16 iy Cn 12 git o 15 5 0307 Ne Os lt o Cata 2007 04 04 12 2 P EAXS32849202 go 5 j p 1 8 o 1 o 5 578 d o o 2 862 9 TR 522 88 96 Ke 2 oo SF ooo 3 PEU as Um ae 0000 2 i S o CN302 NT g 1 Ss o ez X o 0 2 m a 5 3 2 lt 5 o o Oe 55 Vo Soe 19 o9 s 9 3 USB 5V TA 9 876 z Sv 5 z 2 CREE EC e Ee n cS 44500 NC 9 o 6 me 199 5299095 1 9 8 E 2 TPB 10 9 TP14
21. 14 AUX LAN 4 716 8 C705 AUX R13 OIFFG 12 QPL7 TUNER 6 TUNER L 5 ACOUTL AC2OUTL 4 VREFIN 15 100 16 26 SAOUT IMVFILOR 2 lea rU QUE RB07 10K ACIN FILOL 3 27 VFEF KOZ5 V1 C602 8715 VCC 5V 8707 2 BASSVRIN CB08 2 27 5 80810 68073 27 10 16 R7 13 6 OUTSW at 22 23 soa 24 voo 25 SAIN 8725 A736 680 2 0 0 1 537 ke 63849 6747 P714 716 Sm 9611 18K 710 yi Ts 664024 10K 4 1 16 AF MUTE S C787 OLY RB10 47K pos D LOAD Ol 2300uF DI DLOAD 1 0 0309 Rosine TGV pi x 0303 lt 2 5 nei 43055 0304 35 g C1085 z 3 8 TSB POWER amp 5 058 RESET 1 cats BRE ERE 5 885 8 RR E 588 8 dum 588 2 25888 58 15 ent PEXLVIUI 88 5 8 8 E 3 E UART AX ga PFLMDO CTR O EE E gg E PTUNER_MUTE O 7 TART TX W PLINE MUTELO S ZERO AN B4 PFRT DO E E i04 100 5
22. 2007 LG Electronics Inc All right reserved Only for training and service purposes Positive power supply 5V For Ports 5 601 TDA7419 5 1 CONFIGURATION ACOUTR AC20UTR 1 MIX OUTSW OUTRR2 ACINR FILOR 2 VREF ACINL FILOL 3 SAOUT ACOUTL AC2OUTL 4 SAIN SESL ACINL 5 VDD SE3R ACINR 6 SDA SE2L 7 SCL SE2R 8 MUTE 9 OUTLF SE1R 10 OUTLR DIFFL 11 OUTRR DIFFG 12 OUTRF DIFFR 13 OUTSW OUTLR2 CREF 14 GND D04AU1569 5 2 BLOCK DIAGRAM saour FLOR Softstep E Mono ot HPF OUTLF InGain Seftstep Treble Middle Fade AutoZero Volume Softstep HPF OUTRF di IMonoFader OUTRR OUTSW OUTLR2 MIX OUTSW OUTRR2 SUPPLY VDD GND CREF AC2INL AC2INR Copyright 2007 LG Electronics Inc right reserved 2 17 LGE Internal Use Only Only for training and service purposes 5 3 DESCRIPTION o oe s AC couping ight output 7 HPF fiter AC2OUT rignt 2 ACINR FILOR AC coupling right input HPFfilter FILO right channel SE3L ACINL Single ended input 3 left channel AC coupling left input SE2R Single ended input 2 right channel DIFFL Pseudo differential stereo input left 14 CREF Reference capacitor GND OUTRF Front right output OUTLF Front left output SCL 12C bus clock 25 SAIN Spectrum analyzer cloc
23. 401 uPD78F1164 4 1 PIN CONFIGURATION PEV CLK O PEV PPWR PAF MUTE O PSOFT_MUTE O PEALA SWI O PEALA 8 2 PSPEC CLK O PCDP PCDP 1 PCDP POWER O PDECK PDECK 12 81 PSLED CTRL O PRCP FEW O PCDP REW O EVssl PDRV MUTE O PDAC MUTE O PCDP RST O PCDP MLD O PZERO MUTE I PISP O PUSB_POWER PBT_POWER Q PUSB SW I PUSB RESET O 3 2 5 56 ES 3 22 95 y gt gt 2 5 5 25 55 55 88 2 59 225 55555555 228455555545529529295 es x d i 0 EE srg gt 9796959493929190808887 5 10 80 P140 PCLBUZO INTPS 79 L9 141 1 21 7 20 78 P142 SCRZWSCL2 77 14 5 0 02 5 2 1 4 764 9 P144 S020TxD2 P amp 4 RD 75 145 7 7 O 74L O Poomoo Pew 73 Pot To00 67 5 72 L 0 2 5 10 7 1 PSTANDBY O P77 EX23 KR7ANTP11 Pos SHORXDUSDAt LD l P76 EX22 KR6ANTP10 70 9 Po4 SCKT SCLI P75
24. IC511 REQ PIN53 IC511 DATA PIN54 Edge CH1 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes Fig 11 MLD amp MCLK 2006 07 26 09 16 06 g YOKOGAWA 1 soo Normal 50 5 5 15 4 10 1 5 00 U div DC Full 10 1 5 00 U diu DC Full s viv C510 MLD PIN58 IC510 MCLK Edge CH1 PIN70 ato 1C510 MDATA 18 900000 PIN72 ay 2 20000 Coupiing 55 Fig 12 STAT 8 NRST 2006 07 26 09 49 19 jsoo Normal YOKOGAWA 4 20 5 5 25 9 357 CH1 10 1 5 00 U div Ex ne Pall IC510 NRST mum PIN57 510 5 PIN71 510 Edge CH1 SM PIN48 Fig 13 SLED control 2006 12 29 11 54 13 1 Xu 20505 SOUS CH1 10 1 5 00 U div be Fall Ba 18 1 R904 P INS Edge oF Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes PN5041PING R5091 SLED CON R5465 LOAD IN 2 11 2006 02 26 09 16 29 Normal YOKOGAWA X 1 5 5 50 5 main 500k A
25. PAUDIO MUTE O PAUX MUTE O PLIGHT O PDIM_OUT O PQUALTY I PLEVEL 2 1 1 AVss Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 4 2 PIN DESCRIPTION Name in Micom Name in Model Enable setted Output Format Description P60 SCLO CLK N CH Clock output to TDA7419 for the volume control P61 SDAO DE N CH Data output to TDA7419 for the volume control P62 PPWR MUTE N CH To Power amp MUTE command output P63 MUTE N CH AF mute P31 TIOS TOOS INTP4 PRMC Remocon input P64 RD PSOFT MUTE CMOS Direct volume mute signal output P65 WRO PEALA SW1 CMOS EALA control output 1 P66 WR1 PEALA SW2 CMOS EALA control output 2 P67 ASTB PSECP CLK CMOS Spectrum analyze clock output to TDA7419 e P77 EX23 KR7 INTP11 PSTANDBY CMOS To PowerR amp STAND BY command output P76 EX22 KR6 INT10 PDECK LD Deck load SW P75 EX21 KR5 INT9 PCDP IBLK SubQ P74 EX20 KR4 INTP8 PCDP VDET Vibration detection P73 EX19 KR3 PCDP_POWER P72 EX18 KR2
26. as aluminum foil to prevent electrostatic charge buildup or exposure of the assembly Use only a grounded tip soldering iron to solder or unsolder ESD devices Use only an anti static solder removal device Some solder removal devices not classified as anti static can generate electrical charges sufficient to damage ESD devices 5 Do not use freon propelled chemicals These can generate electrical charges sufficient to damage ESD devices 6 Do not remove a replacement ESD device from its protective package until immediately before you are ready to install it Most replacement ESD devices are packaged with leads electrically shorted together by conductive foam aluminum foil or comparable conductive materials 7 Immediately before removing the protective material from the leads of a replacement ESD device touch the protective material to the chassis or circuit assembly into which the device will by installed CAUTION BE SURE NO POWER IS APPLIED TO THE CHASSIS OR CIRCUIT AND OBSERVE ALL OTHER SAFETY PRECAUTIONS 8 Minimize bodily motions when handing unpackaged replacement ESD devices Otherwise harmless motion such as the brushing together of your clothes fabric or the lifting of your foot from a carpeted floor can generate static electricity sufficient to damage an ESD device CAUTION GRAPHIC SYMBOLS THE LIGHTNING FLASH WITH ARROWHEAD SYMBOL WITHIN AN EQUILATERAL TRIANGLE IS INTENDED TO ALERT THE SERVICE PERSONNEL TO THE P
27. up Vdd Gnd CN801 16 15 Checked the Micom Back Up Vdd 1C301 14 D307 401 30 47 50 99 100 Checked the Micom Ground 1 401 20 51 97 98 Checked Reset 402 IC401 90 Checked the X tal X401 X402 Checked the ACC in 0301 0302 1 401 38 801 14 Checked the detachable switch SWA01 401 73 Checked the flipdown Detector CN901 19 401 74 Checked the Key line 1 401 52 53 Checked the Remocon Sens Vdd CN901 14 Q316 Q317 D307 104016 3 Not available to Volume control Checked the Encoder Volume SW901 IC401 40 41 4 Not available to Key Control Checked Tact switch SW902 SW918 Checked Key line 1 410 52 53 5 sound Checked the E VR Vdd C301 10 1 601 24 Checked the E VR Ground IC601 15 Checked the E VR control IC601 22 23 401 1 2 Checked the E VR Signal in out 1 601 5 6 7 8 9 10 11 13 1 601 17 18 19 20 Checked the E VR Mute Control 1 601 21 401 6 Power IC Checked the Power IC Vad IC801 6 20 Refer to next page Checked the Power IC Ground IC801 1 2 8 13 18 24 Checked the Power IC Control IC801 4 22 1 401 3 10 Checked the Power IC Signal in out 1 801 11 12 14 15 801 3 5 7 9 17 19 21 23 Checked the Power Mute IC801 22 4 1 1 8 4 6 1 4 1 3 Checked Power IC Standby IC801 Checked the Power IC Ripple 80
28. 1 Checked the Connector CN80 No Line out signal Checked the E VR Vdd IC301 10 Checked the E VR Ground 1 601 15 Checked the E VR control IC601 22 23 401 1 2 Checked the E VR Signal in out C601 5 6 7 8 9 10 11 13 1 601 17 18 19 20 Checked the OPAMP Vdd 701 8 702 8 Checked the Ground 701 4 702 4 Checked the Signal in out 701 3 5 7 1 702 3 5 7 1 Checked the Line out Mute circuit Q705 1C401 48 Check the Line out Jack CN703 Heard Pop Noise Checked the Mute Control IC601 21 801 4 22 401 3 6 10 Checked the AF Mute TU101 19 IC401 4 Not avaliable to Mute CN801 5 Q305 Q306 1 401 62 Checked the Mute Control 601 e IC801 4 22 401 3 6 10 Not avaliable to ANT Motor Type 301 12 13 401 87 Not avaliable to Remote Checked the Remote control CN801 6 1C402 1 2 4 Q308 Q309 External AMP 401 63 64 12 No output sound Checked Control 1 401 80 BU301 0 1 2 3 4 8 9 12 13 0 IC601 24 Copyright 2007 LG Electronics Inc All right reserved 2 1 LGE Internal Use Only Only for training and service purposes CAUTION for repair Before exchange power amp IC TB2904 for no audio problem you have to check below list
29. 151519191 iQ ID Io ID S q d Y q X Y d X 22 2 2 0 7 0 07 0 0 0 0 0 0 0 0 0 0000000 0 0 0 0 0 0 0 0 0 0 0 54 60 COM4 6 5 40 SEG39 2 SEG38 1 SEG37 VDD CU SEG36 VLCD C 70 SEG35 VLCD1 LD3811 SEG34 VLCD2 SEG33 VLCD3 SEG32 SEG31 30111771 SEG30 SEG29 SEG28 SEG27 SEG26 25 SEG25 24 J 90 00 0 Q0 D D OA NN D OO A10711 lt ow o OQ UE See IDE LLLI o o nn o 77 L SEGMENT DRIVER DRIVER gt VLCD 5X9X240 bits VLCD1 VLCD2 VLCD3 VSS SHIFT REGISTER RES H gt 1 CLOCK GENERATOR CCB INTERFACE Copyright 2007 LG Electronics Inc All right reserved 2 21 LGE Internal Use Only Only for training and service purposes 8 3 FUNCTIONS Pin No F 1 unction Active Handling when unused LC75811E Mee OO 49 SEG1 to SEG58 1 to 56 Segment driver outputs The SEG59 COM10 and SEG60 COM9 pins can be used SEG59 COM10 as common driver outputs under the set display SEG60 COM9 Technique instruction 60 58 to COM8 681061 66 59 Common driver outputs 2 Ew Oscillator connections
30. 20 500 0 1 5 5 31 Hte He 4 2 130004 5 ie 2 567 FRONT 3 3V BLUETOOTH OPTION 0341 323 250MA BAB c3e4 A329 E OAUDIO 8 4v 305 550mA DSP CD AUDIO i i i 1 i 1 i 0 3 3V 2EXT _ ssi SCTL2 EXT omo Ed 400 5 0354 1055 16 200 B TR pen USB OPTION 0 1 KOS160E ETE ean la he4 1 l 4 7 9 0307 1 MIC GND KDS181 2 I ac suc 152 1 03 19 RESET SWITCH ADD 339 CBE13408P 10 3216 LAC7700 2007 03 19 ttt 2849201 OPTION Sts TP BY32801801 N 1 1 9 i 1 1 i 1 dE 5 9 D E F G H L M N T LGE Internal Use Only 2 25 2 26 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 2 1 CIRCUIT DIAGRAM
31. 2006 2 32 2 31 Lo 5 E 3 E 3 E fp 0 198 UB Y AGT 28 GT 0868 1968 96 9968 9968 2968 E D c e e e e i en e n Uu Us 02 MET GT OD LO LO t IM 00 THM CO 63 5 E963 eal eal EP 2 590 sjaja s Nese 8 SEBBBESGBEEZOBSBASS 6 9 05 m NE SAN Spgs 2935 82935 gt 95 EPIS 5 22936 gt 22895 2255 DN w esl Gras 955 0205 9795 s a sme 6195 oS 7795 05 es Bios oN ar es n aes 1198 228 0 9 85 5795 955 55 6 0595 05936 areas 5755 7595 59 T 7795 2006 0 eS CE 5595 t6 25935 m a 21935 2795 d 95 NE SEN 0006 S 07951
32. 4 88 10 SRR F 88 47 5 073 10 VSS25_PLL DMNS IO ISP MODE VDD33 PHY vss33 EX MEM CEB DAC XTAL2 6 1086 DAC XTAL41 GPIOB7 PD 0033 9 EX MEN HOST DEV SEL 10511 0033 0 0716888 Ve 1507 1MH 11 GPIOA 3 1 ex wol2 GPIOAL4 8 013 GPIOA S 0141 GPIOAG 015 2033 i 016 UART RX 100nFC523 017 Wiss Soon ao Ss os 7 C557 8 1509 iMi 6 usavect DONO 5 0584 0585 us ext EXTO m 2 5 2 LAC M7700 CIRCUIT 2007 0104 CDP PART 1 3Y 355521501 D E H K L M N 5 LGE Internal Use Only 2 29 2 30 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 4 FRONT CIRCUIT DIAGRAM 12 LGE Internal Use Only PART 5 FRONT Y 3365390 1 LAC6700
33. 6 8201 H R326 pE R330 6 320 R316 o ri 2 0931 0 8325 e 2 9 9 90311 6 o 3200 zi 6 R31 o 1 T 4 82849202 Gos a 2207 04 04 MP e e 84358436 84308429 C413C414 R433R434 46 og 469 9 5 0321 o R337 s C319 o 11106 a La ie o o 63240 0000009 J1107 0 o N 6381 2 000 LGE Internal Use Only MAIN P C BOARD BOTTOM VIEW J1103 11104 31095 902 0 ZOOO 4 1801 o o tetetetetetelolelelelg 25 w o jsolelolelotelololetelo Sie igo On lt 9 2 ANT S RF GND 3 4 B 5V AON o Geer 5 00 o 00000000
34. 6 ANI 14 2 yo Key 2 line input P155 ANI13 PLEVEL_METER yo Level meter input P154 ANI 12 PSMETER yo Radio station s strength signal input P153 ANI11 PQUALTY yo Connect to tuner pack QUALITY P152 ANI10 PEJECT yo Eject key input P151 ANI9 PDIM OUT yo Dimmer output P150 ANI8 PLIGHT yo Backlight control output P27 ANI7 PAUX_MUTE yo AUX mute P26 ANI6 PAUDIO MUTE yo VR IC lt gt PWR mute P25 ANI5 PTEL_MUTE yo Telephone mute input P24 ANI4 PREMOTE yo External amp on P23 ANIS PPWR yo Power on P22 ANI2 PRDS DI yo From tuner pack RDS data input P21 ANI1 PDIM_IN yo Dimmer input P20 ANIO PEEPROM CE yo EEPROM Chip select P130 PPLL CE PLL chip select 131 7106 1006 PSD ST yo SD level input from Tuner pack P04 SCK10 SCL1 PART EN yo ART Enable input P03 SI10 RxD1 SDA1 PART_RX yo Data input for ART P02 SO10 TXD1 PART TX yo Data output for ART P01 TOOO PFRT_DETECT yo Front detaching attaching detect 00 1100 _ Front open close detect P145 TIO7 TOO7 RST yo Front micom LCD drv reset P144 SO20 TxD2 PCDP DO yo Data o
35. 8 PHONE IN IWET IESPFRT DI EE lesPrar Qu 3 8 PRL DI il 5640 7 0 Bad PPLL DO T STATI IB DOWNLOAD BAND OPTION MOATATOT 1 0 1401 0403 PUSB_AX PBT_AKIT 42 uPD78F 1164 x x 6 a 94SUB_CLK 32 7 x o Tas 2 RESET lesu CL 32 7681 x 0 39 R424 4 7K osos Rs x 38 0305 H DRIC CLKI 49 x POPT ouralo 37 38755 9 PEND lg MAIN CLK 19 2M BS ala _ 8 DICE zl a 5 8 Porr_ouroto 5 Detect 0 1 40K 5 5 MOTOR 88 5 lez vss 34 051605 5160 Fa E lggEVes _ _ x H 33 9307 SEED GN i par 338 SS89s2uoS22ESas5 58555 B 0405 6465 pene 9308 251797 5 4 55534 2858 38 5 Mc 16ND LOAD S W B 16 6 2 amp 8 8 Rost 2013216 SER ERE ieo poston aN ane oworooS ennn az 8 2 FREG B DOO Ex 3 z 5 8 2 2012 EE 5 gt Egg 3 SVIADIOI E ATLM 8 4 eet 3
36. An oscillator circuit is formed by connecting an external resistor and capacitor at these pins Serial data transfer inputs These pins are connected to the microcontroller CE Chip enable CL Synchronization clock DI Transfer data Reset signal input When RES is low VSS Display off to SEG58 L Vss SEG59 COM10 and 5 60 9 Vss COM1 to L VSS Serial data transfer is disabled The OSCI OSCO pin oscillator is stopped When RES is high VDD Display on after a idisplay on off controli display on state setting instruction is executed Serial data transfers are enabled The OSCI OSCO pin oscillator operates Used for applying the LCD drive 3 4 bias voltage externally Used for applying the LCD drive 2 4 bias voltage externally Used for applying the LCD drive 1 4 bias voltage externally lt Q al 5 70 71 Logic block power supply connection Provide a voltage of between 2 7 and 6 0 V LCD driver block power supply connection Provide a voltage of between 4 5 and 10 0 V vss 72 Power supply connection Connect to ground LGE Internal Use Only 9 22 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes BLOCK DIAGRAM TUNER Kwangsung Pin to Pin ALL MODEL T AM amp FM IF PLL MPX ST DECODER NEW s
37. C 5V MOTOR DV MCU LCD CE LCD CE v2 1 gm MCU 01 00 LCD DATA LCD DATA voL UP DOWN AUX R lt m LCD AST 1 1 1 1 2 WMB731 CONTROL INTERFACE CODEC us lt DIGITAL DN E 54580 DIGITAL FILTERS CD o we ADCLRC IN ADCDAT AUDIO BV BUFFERIUP gt LDO 1 8V CRYSTAL 18 432M o nnen Qao n A GP Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes FULL DOT LCD 14 SEG LCD LAC6750 7750 LAC3700 4700 5700 LAD4700 IC FRONT MICOM DRIVER IC upd7032636C NEC PT6523 FULL DOT LCD MODULE FIXED TN NEGATIVE DRIVER IC NOT FIXED 1 lt lt lt lt lt lt lt lt lt lt lt DOT LED LAC6700 7700 DRIVER IC 5 7 DOT LCD HTN NEGATIVE
38. EX21 KRS INTPS 69 1 6 7 2 O 68 O P130 P73 EX19 KR3 O 67 P72 EX18 KR2 66 P2V ANH P7V EXIT KR 0 4 uPD78F1164 65 9 P7O EX16 KRO Q 63 9 P24 ANM POSICLKOUT 0 4 2 0 2 61 L O P26 ANIS 60 50 P82 EX2 58 O 151 57 PBAJEX4 56 5 55 PBG EXG O 54 53 5 4 52 ___ 0 PI57 ANHS O 511 0 Av ES 3334353637 38 30 40 41 42 43 44 45 46 47 48 4950 5 398 2 8 582435883 sz 2350908 EE tossgoqu RES amp gs ao oe 2 22212220 132233 35035 255 a 22222222555225 33975 8 ees 9 58 3 ES 9 T LGE Internal Use Only 2 14 PFRT PCDP CLK O PCDP DI I PCDP DO O PFRT RST O PFRT OPEN I PFRT DETECT PART TX O PART PART PSD 8 1 PPLL CE O PEEPROM PDIM PRDS DI I PPWR O PREMOTE O PTEL
39. ON P 8 i 4 4 D xe Ten UPD78F 1164 w GNO SOFT DIMMER 0016 NC DATA IN RAM Serial Interface 9 MAIN CLOCK BMiz QUALITY QUT AD CONVERTER WOT CLOCK 240KHz DIMER IN ERE FLASH EEPROM SUB CLOCK 32 76 a RS TIR 8 SYSTEM CONTROL TEL MUTE 8 3 3 Buf fer PART RESET VOD 468it BBit Watch 8 VSS IN oo ENDO Operation Voltage 21504 1 8V to 5 5V ER 1 0 PORT gt E Bua in put 78K0 CPU DAC RUE Nch 0 D 1 0 4 DLOAD PORT AW 5 E CMOS 1 0 66 ENEMA ET Usa OPTION FLMDO 5 DLOAD DATA IN MD UART TX 8 DLOAD DATA OUT ART CHECK my TORT ECC In d DLOAD_CLK BIAS 760 D 1 UART_IN I BLCK 15859 1 5 5 UART QUT e EI E AE nm b E 1198 e e qe 7 Jd MAIN MICOM STANDBY le eft 0 0 214 Sji 20 FRONT 3 3V POWER SV 4 5 3 3 RESET d FRONT MICOM 9 r gr 0 sv S71335F d POWER SV hoe NT w W B T 5V u 12 i H 200 19Pin Connector Female A BUZZER CTL3 T 5 m FULdepin Connecter ILL B 4V AUX JACK STEREO etat 4 FULL DOT 14 SEG 5 7 DOT SAME 1 Mou LOOK MEL 1 CD DSP DA
40. P NO AFN35097871 LG OCTOBER 2007 39IAH3S H00792V 1 TSGON Website http biz lgservice com LG CAR CD MP3 WMA RECEIVER MODEL LAC6700R CAUTION BEFORE SERVICING THE UNIT READ THE SAFETY PRECAUTIONS IN THIS MANUAL CONTENTS SECTION 1 SUMMARY SERVICING PRECAUTIONS sse nennen ntt tenente tentent 1 2 zaHlicle gel 1 3 SPECIFICATIONS em EE 1 4 SECTION2 ELECTRICAL ELECTRICAL TROUBLESHOOTING GUIDE amp WAVEFORMS 2 1 1 MAIN FRONT amp TUNER 2 1 2 CD PART TROUBLESHOOTING stateless sens itn eae 2 4 3 USB PART 22 2 2244000000 2 7 e WAVEFORMS 2 9 INTERNAL BLOCK DIAGRAM OF ICs ttti 2 12 1 1 518 1701 amp 10709 54580 2 12 2 C301 2 12 3 C302 M LAE 2 14 4 16401 UPD78F1164 2 14 2 17 6 IC602 NJM2706 DMP24 2 19 E EE 2 20 8 C901 D38 escis
41. RESENCE OF UNINSULATED DANGEROUS VOLTAGE THAT MAY BE OF SUFFICIENT MAGNITUDE TO CONSTITUTE A RISK OF ELECTRIC SHOCK THE EXCLAMATION POINT WITHIN AN EQUILATERAL TRIANGLE IS INTENED TO ALERT THE SERVICE PERSONNEL TO THE PRESENCE OF IMPORTANT SAFETY INFORMATION IN SERVICE LITERATURE Copyright 2007 LG Electronics Inc All right reserved 1 3 LGE Internal Use Only Only for training and service purposes GENERAL Output Power Power Source Speaker impedance Ground System Dimensions W x H x D Net Weight CD SECTION Frequency Response S N Ratio Distortion Channel Separation 1kHz RADIO SECTION FM Frequency Range S N Ratio Distortion Usable Sensitivity AM MW Frequency Range S N Ratio Distortion Usable Sensitivity USB SECTION Version LGE Internal Use Only SPECIFICATIONS 50W x Max DC 12V 4Q Negative 180 x 51 x 171mm Without Control Panel 2 0kg 20Hz 20kHz 85dB 0 05 60dB 65 74 87 5 107 9 or 87 5 108MHz 53dB 0 796 12dByV 520 1720 or 522 1620kHz 45dB 1 0 28dBuV USB 1 1 1 4 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes SECTION 2 ELECTRICAL ELECTRICAL TROUBLESHOOTING GUIDE amp WAVEFORMS 1 MAIN FRONT amp TUNER PART No Symptom Check Point 1 CONTROL No Power p ON SEEK NES the Fuse CN801 Checked the Back
42. attern IC901 1 68 2 No LCD Lighting or Checked the LCD Lighting VDD Q319 Q320 0322 1C301 4 9 Color is different IC401 64 Checked the LED LD991 LD992 3 Not avaliable to LCD Lighting Checked the LCD Lighting Control CN801 11 Q303 Q304 Q321 control 401 58 Checked the LED LD991 LD992 4 No Key Lighting Checked the LED Lighting Vdd 1C301 4 9 1C401 64 Checked the LED LD901 LD921 5 Don t moved Level bar Checked the Level Meter control IC601 25 26 IC401 9 54 6 Not avaliable to Dimmer control Chekced the Dimmer control CN801 11 Q303 Q304 1IC301 4 9 Nol Symptom Check Pomt _LocationNo TUNER FUNCTION Not available to Tuner Checked the Tuner Vdd TU101 4 16 1C301 10 IC401 39 Q350 Q351 Checked the Tuner Ground 0101 3 5 10 17 Checked the PLL data TU101 11 12 13 14 15 1 401 67 68 44 45 46 Checked the RF signal in TU101 1 2 Checked the S Meter control TU101 7 Checked the SD amp ST IND TU101 6 Tuner no sound Checked the Tuner Signal out TU101 8 9 IC601 6 Checked the AF mute TU101 19 IC401 4 3 Not available to RDS Checked the RDS data TU101 20 21 65 83 Copyright 2007 LG Electronics Inc All right reserved 2 3 LGE Internal Use Only Only for training and service purposes 2 CD PART TROUBLESHOOTING Something wrong with the CD player No loading 1 Checked the Vdd YES
43. d Only for training and service purposes 2 MECHANISM PICK UP SECTION D d P 4 4 De M San ae nu Cr S E Les e 2 2 QN LGE Internal Use Only 3 3 3 A Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes
44. e SDA AMAFAPX p RDS ROS DATA PEMODULATOR Ei AUTO ALIGMENT PROGRAM EQ OPTION Lace700 6750 7700 7750 NUM2706 DMP24 EALA SHINWA CDCO3 VE SHINWA MECHA CDCO3 VE PN501 15P ALL MODEI DSP MN6627954 DAC OP AMP SDRAM 16M M12L16161A IC 505 PN504 8P MUX BA5810FP MOTOR DIRVER IC MUX usa 4 SB OPTION BLU a fw o BLUETOOTH OOTH MODU
45. g Non VEE Input 1 inverting Input 1 2 1 301 HA13173AH 2 1 BLOCK DIAGRAM VB DBUP C4 8 100uF 0 1uF QS vauP Over voltage detect CTL 1 O 13 gt 27 CBUP 10042 CTL2 O I E CTL3 VDDOUT CVDD 4 gt gt DSPOUT 7 cpsp DEXT1 lt 10uF DExT2 Th p CDOUT CEXT p 6 lt i VRE 7 0 1uF m A 0 tuF 77 E AUDIOOUT 9 ZZ CAUDIO 10uF GND GND RFREG2 LGE Internal Use Onl E Copyright O 2007 LG Electronics Inc All right reserved y 2 12 pyrig 9 Only for training and service purposes 2 2 PIN FUNCTION Note1 Pin name GND Function Ground Protection function Normal operation Note2 TSD On Note3 VB 24V Note3 VB 50V FREG_B External Trs bass drive Note4 FREG_F FREG feedback terminal ILMOUT 8 4V output for JLM 500mAmax CTL4 FREG control terminal CDOUT 8 0V output for CD 1 3Amax Note4 DSPOUT 3 3V output for DSP 250mAmax Note4 1 2 3 4 5 6 7 8 VB Battery CTL3 ILM control terminal AUDIOOUT 8 4V output for AUDIO 500mAmax Note4 CTL1 DSP CD Audio control terminal EXTOUT High side output 600mAmax Note4 CTL2 EXT control terminal VDDOUT 5 7 output for micro controller Note4 Note1 Note2 Note3 Note 4 Copyright
46. k input spn ay 27 vr OY LGE Internal Use Only 2 18 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 6 602 NJM2706 DMP24 6 1 CONFIGURATION 1 LPF 13 2 14 VREFOUT 3 MOUT 15 VREFIN 4 Ca 16 SW1 5 Cr 17 SW2 6 BASSFIL1 18 ealaFIL 7 BASSFIL2 19 HFFILL 8 BASSVRIN 20 HFFILR 9 BASSVROUT 21 ROUT 10 ealaVRIN 22 LOUT 11 ealaVROUT 23 RIN 12 GND 24 LIN 6 2 BLOCK DIAGRAM 24 23 22 21 20 19 18 17 16 15 14 13 5 Vref 5 3D FILTER H eala L BYPASS sw H eala_Bass L BYPASS 1 2 3 4 5 6 7 8 9 10 11 12 Copyright 2007 LG Electronics Inc All right reserved 2 19 LGE Internal Use Only Only for training and service purposes 7 801 TB2904HQ 7 1 BLOCK DIAGRAM TAB 1 Voc2 OUT1 C4 O 0 4 C1 PRE GND PRE GND PW GND LGE Internal Use Only 2 20 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 8 901 1103811 8 1 CONFIGURATION Or 9
47. n mw 874 HOSCESLT WOd us oa E ra LM E 060 tet Hp RL g gle 8 E BIS x 4 8 ES 1999 a g zla lael 78 2 aj NDA BB 251 1 GEI Foor 8 Boat 8 E awl 4 Sot E 8 arco 8 H 2051 E es 1 m5 i zu x Bes 88 ces Kis 8 ST c 1 ae T T 8089 r3 Ez 5 52 4 zig TS 4 5 E 8 ois 8 pz gs 8 Eye ET 4 4 Le z 8064 4 gx reso n Bly d Sib 5 E dcn 1 1 4 5 8 mi 8 5 3 T 9 9 vl ma 98 0 9 90009 E e e g B3 e 8 3233 8 T 5 BS EB a a b d 2 lee mem x x 11 47501 2 o M lt LGE Internal Use Only 2 28 2 27 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 3 2 CIRCUIT DIAGRAM 12 11 35 584
48. ng any component circuit board module or any other instrument assembly 2 Disconnecting or reconnecting any instrument electrical plug or other electrical connection 3 Connecting a test substitute in parallel with an electrolytic capacitor in the instrument CAUTION A wrong part substitution or incorrect polarity installation of electrolytic capacitors may result in an explosion hazard Do not defeat any plug socket voltage interlocks with which instruments covered by this service manual might be equipped Do not apply power to this instrument and or any of its electrical assemblies unless all solid state device heat sinks are correctly installed Always connect a test instrument s ground lead to the instrument chassis ground before connecting the test instrument positive lead Always remove the test instrument ground lead last 1 The service precautions are indicated or printed on the cabinet chassis or components When servicing follow the printed or indicated service precautions and service materials 2 The Components used in the unit have a specified conflammability and dielectric strength When replacing any components use components which have the same ratings Components marked in the circuit diagram are important for safety or for the characteristics of the unit Always replace with the exact components 3 An insulation tube or tape is sometimes used and some components are raised above the printed writing board for
49. o 7090999969090090 LGE Internal Use Only 2 37 2 38 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 3 FRONT P C BOARD TOP VIEW 2 CDP P C BOARD o E e Oo E JI Sis H e t 96 o pjoo ocaso o 2 07 o o9 49 Z x 20 9 8 o c o E gem 2 2 gt 5 i Sess im E 5 o E S 1 41 96 a 5 lt 8 een essu H 9 c goss gt R907 LDS E DICITO o R9500 9 895 ELM 59910 1 0908 6 ak EAX33654101 20 2007 03 15 25806 SS D Aes Bia b 3H e S 50 o2 929 5 E 251 Oo 8 O FC D GND o xu usen 5 5 5
50. ode option check signal 2 output P56 EX14 POPT OUT2 For diode option check signal 3 output P57 EX15 PACC IN P17 EX31 TIO2 TOO2 OUT ACC P16 EX30 T101 TOO1 INTP5 PVOLA Encoder volume terminal A input P15 EX29 RTCDIV RTCCL PVOLB Encoder volume terminal A input P14 EX28 RxD3 PUSB RX PBT RX Data input for USB BT P13 EX27 TxD3 PUSB_TX PBT_TX Data output for USB BT P12 EX26 SO00 TxDO PPLL DO Data output for PLL IC P11 EX25 SIO0 RXDO PPLL DI Data input for PLL IC 10 4 5 output for PLL IC AVREF1 A D converter reference voltage input Positive power supply for P20 to P27 P150 to P157 and A D converter P110 ANOO PLINE MUTE Line out mute P111 VNO1 PTUNER_MUTE Tuner lt gt VR IC mute Copyright 2007 LG Electronics Inc All right reserved AVREFO Only for training and service purposes 2 15 D A converter reference voltage input Positive power supply for P110 P111 and D A converter LGE Internal Use Only Name Model Enable setted Output Format Description AVSS P157 ANI15 PKEY1 yo Key 1 line input P15
51. safety The internal wiring is sometimes clamped to prevent contact with heating components Install them as they were 4 After servicing always check that the removed screws components and wiring have been installed correctly and that the portion around the service part has not been damaged Further check the insulation between the blades of attachment plug and accessible conductive parts LGE Internal Use Only 1 2 Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes ESD PRECAUTIONS Electrostatically Sensitive Devices ESD Some semiconductor solid state devices can be damaged easily by static electricity Such components commonly are called electrostatically sensitive devices ESD Examples of typical ESD devices are integrated circuits and some field effect transistors and semiconductor chip components The following techniques should be used to help reduce the incidence of component damage caused by static electricity 1 Immediately before handling any semiconductor component or semiconductor equipped assembly drain off any electrostatic charge on your body by touching know earth ground Alternatively obtain and wear a commercially available discharging wrist strap device which should be removed for potential shock reasons prior to applying power to the unit under test 2 After removing an electrical assembly equipped with ESD devices place the assembly on a conductive surface such
52. ull 12 8 S W PN504 PIN3 12 8 S N PN504 PIN3 PN504 PIN1 PN504 PIN1 EPI PN504 PIN4 Oo PN504 PIN4 LIMIT S W PIN4 4 Mu PIN4 Aio LIMIT 0 00 U 0 00 Fig 3 Motor control signal for loading Normal 2006 12 29 11 32 56 JE YOKOGAWA 4 5 5 5 200ns liv Tee 3 7 CH1 10 1 i 3 5 00 U div Full 10 1 De Pall 5 00 Ura 10 1 2 00 U div D6 REW FEW Full D5 FEW SLED CON p R5091 SLED CON 4 aye R5465 LOAD IN m LOADING IN Fig 4 Motor control signal fo 2006 12 29 11 35 24 YOKOGAWA 7 5 5 5 200ns liv 2 lt gt gt FEW SLEDCON LOADING IN r unloading CH1 10 1 5 00 U div DC Full 10 1 5 00 DC Full CH3 10 1 5 00 U diu DC Full CH4 10 1 2 00 U div DC Full D6 REW D5 FEW R5091 SLED CON R5465 LOAD IN Edge CH4 F Copyright 2007 LG Electronics Inc All right reserved Only for training and service purposes 2 9 2006 12 29 11 53 46 N YOKOGAWA lormal 2 5 5 S00ns div CHainrl k gt gt SLED CON 2 10 1 5 00 U div DC Full CH2 10 1 5 00 DC Full CH3 10 1 5 00 U diu DC Full CH4 10 1 2 00 U div x PIN504 PINS PIN504 PING R5091 SLED zage R5465 LOAD IN
53. utput for CDP P143 SI20 RXD2 SDA2 PCDP DI yo Data input for CDP P142 SCK20 SCL2 PCDP CLK yo CLK output for CDP P141 PCLBUZ1 INTP7 PFRT_CE yo Data enable output to front micom LCD drv P140 PCLBUZO INTP6 PBEEP yo CMOS Buzzer output P120 INTPO EXLVI PEXLVI yo 0 Low voltage detector Connect to P47 INTP2 PFLMDO_ CTR Disc download FLMDO control Connect to FLMDO Pin93 P46 INTP1 TIO5 TOO5 PRDS CLK yo From tuner pack RDS data input P45 SO01 PFRT DO yo Data output to front micom LCD drv 44 5101 PFRT DI Data input from front micom LCD P43 SCKO01 PFRT_CLK yo CLK output to front micom LCD drv P42 T104 TO04 PANT yo Antena control output P41 TOOL1 Download CLK yo CLK for onboard debugger P40 TOOLO Download_lO Data for flash memory programmer Pull up register 10K RESET System reset input P124 XT2 Sub clock 32 768 KHz 123 1 Sub clock 32 768 KHz FLMDO Flash memory programming mode setting P122 X2 EXCLK X tal 19 2 MHz P121 X1 X tal 19 2 MHz REGC Connect to VSS via a capacitor 0 47 to 14F VSS Ground EVSSO Ground Potential for Ports VDD Positive power supply 5V EVDDO LGE Internal Use Only 2 16 Copyright
54. y Coupling Fig 9 PD RFOUT 2006 03 28 23 31 39 gue E 5005 5 YOKOGAWA CH1 10 1 0 200 U div DC Full 10 1 Mi 0 200 DC Full CH4 10 1 0 200 U diu DC Full IC506 PD41 gt BOD AutoLevel 0 LGE Internal Use Only IC506 SPOUT PIN21 IC506 RFOUTA6 2 10 Fig 6 Tracking control signal 2006 12 27 10 56 26 gucci Normal YOKOGAWA 200ns liv 144 Mainil k gt gt 19 1 1 00 U diu Full 10 1 0 500 U diu 100 2 CH3 10 1 9 500 U diu Full CH4 10 1 1 00 U diu C506 TRP R5013 PN504 T PIN2 PN506 T PIN3 m mes R517 TE 8 4 0 15 U E E Fig 8 LRCK BCK DATA from DAC 2006 03 28 22 51 a Normal Yokocawa 200 5 5 10 1 2 00 U div DC 10 1 2 00 U diu DC Full CH3 10 1 2 00 U diu DC Full IC520 PIN1 IC520 PIN2 IC520 PIN3 gt BOD AutoLevel 9 200000 3 200000 RT 90046 9 000000 25 0000 Cursori 4 00div lor izontal p 2 4 004 Fig 10 8 DATA maen 13 34 57 Eo Normal QKOGAWA 1 5 5 j NT 15 liv 2 00 U div DC Full CH2 10 1 2 00 U div Full M 2 00 105414 PIN52
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