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equipo para domótica basado en el estándard x10. interfaz usb

1. HID IN Report Transfer Descriptor Table for F WIZARD DEFINED_REPORT_STORAGE ELSE _IDO RPT SIZE EQU 8 7 data bytes report ID 8 bytes unused _SM RPT SIZE EQU 3 2 data bytes report ID 3 bytes _LG RPT SIZE EQU 5 4 data bytes report ID 5 bytes AREA data RAM REL CON EXPORT _IDO_RPT_PTR _IDO_ RPT PTR BLK 8 Allocates space for report IDO unused EXPORT _SM_ RPT PTR _SM_RPT PTR BLK 3 Allocates space for report IDI EXPORT LG RPT PTR _LG_RPT PTR BLK 5 Allocates space for report ID2 AREA bss RAM REL CON EXPORT SM RPT STS PTR Document Number 001 13629 Rev D Page 25 of 26 0 Cypress USBFS Device PERFORM T 9M RPT STS PTR USBFS XF EXPORT LG RPT STS PTR LG RPT STS PTR USBFS XF R STATUS BLOCK T R_ STATUS BLOCK AREA func lit ROM REL CON LITERAL EXPORT USB DO C1 IO IN RPTS TD_START_TABLE 3 TD ENTRY USBFS DS RAM _IDO RPT SIZE _IDO_ RPT PTR NULL PTR IDO unused TD ENTRY USBFS_ DS RAM SM RPT SIZE _SM_RPT PTR SM RPT STS PTR ID1 TD ENTRY USBFS DS RAM LG RPT SIZE _LG RPT PTR _LG RPT STS PTR
2. Symbol Description Min Typ Max Units Notes Fimo2asv Internal Main Oscillator Frequency for 24 MHz 5V 23 04 24 24 9625 MHz es for 5V operation using factory trim values Fimo2a3v Internal Main Oscillator Frequency for 24 MHz 3 3V 22 08 24 25 92b c MHz Trimmed for 3 3V operation using factory trim values Fimousssy _ Internal Main Oscillator Frequency with USB 5V 23 94 24 24 06 gt MHz 10 C lt Ta lt 85 C Frequency locking enabled and USB traffic present 4 35 lt Vdd lt 5 15 Fimousgsy Internal Main Oscillator Frequency with USB 3 3V 23 94 24 24 062 MHz 0 C lt Ta lt 70 C Frequency locking enabled and USB traffic present 3 15 lt Vdd lt 3 45 Foput CPU Frequency 5V Nominal 0 93 24 24 9626 MHz Fopu2 CPU Frequency 3 3V Nominal 0 93 12 12 96 gt MHz FBLk5 Digital PSoC Block Frequency 5V Nominal 0 48 49 928 b d MHz Refer to the AC Digital Block Specifications Feik3 Digital PSoC Block Frequency 3 3V Nominal 0 24 25 92b d MHz F32K1 Internal Low Speed Oscillator Frequency 15 32 64 kHz Jitter32k 32 kHz Period Jitter o 100 ns Step24M 24 MHz Trim Step Size 50 kHz Fout48M 48 MHz Output Frequency 46 08 48 0 49 928 MHz Trimmed Utilizing factory trim values Jitter24M1 24 MHz Period Jitter IMO Peak to Peak 300 ps FMAX Maximum frequency of signal on row input or row output 12 96 MHz TRAMP Supply Ramp Time 0 T us a 4 75V lt Vdd lt 5 25V b Accuracy deri
3. SMBS Description Min Typ Max Units Notes Trscik Rise Time of SCLK 1 20 re Trscik Fall Time of SCLK 1 20 Tsscik Data Set up Time to Falling Edge of SCLK 40 E T S Tuscik Data Hold Time from Falling Edge of SCLK 40 E E ng Fgcix Frequency of SCLK 0 z EE Terasee Flash Erase Time Block T 10 me Twrite Flash Block Write Time 30 ae Toscik Data Out Delay from Falling Edge of SCLK E 45 TE Vdd gt 36 Toscik3 Data Out Delay from Falling Edge of SCLK z 50 ns 02 VidZ38 February 15 2007 Document No 38 12018 Rev J 37 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 10 AC IC Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ty lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 28 AC Characteristics of the C SDA and SCL Pins for Vdd Standard Mode Fast Mode Symbol Description Min Max Min Max Units Notes Fsciiec SCL Clock Frequency 0 100 0 400 kHz THDSTAI2C Hold Time repeated START Condition After this period 4 0 0 6 Ss the first clock pulse is generated TLowi2c LOW Period of the SCL Clock 4 7 1 3 s
4. LCD_DrawBG Description Draws the horizontal bar graph starting at character location bRow bCol with a character length of bLer to column position of bPixelColEnd C Prototype void LCD DrawBG BYTE bRow BYTE bCol BYTE bLen BYTE bPixelColEnd Document Number 001 13569 Rev E Page 7 of 13 Re P cypress LCD Too Box Assembly Note When using the large memory model calls to LCD_DrawBG should be made using an under score in front of the function name call LCD DrawBG mov A 25h Set bPixelColEnd 25 push A mov A 06h Set bLen 6 pixel columns push A mov A 03h Set bCol 3 push A mov X SP Setup data pointer X dec X mov A 01h Set bRow 1 gt the second line call LCD_DrawBG add SP 3 Restore the stack Parameters bRow Defines the starting character row range of O to number of rows minus1 bCol Defines the starting character column range of 0 to number of character columns minus 1 bLen Defines the length of the bargraph in whole characters bPixelColEnd Defines at which pixel column to draw the following Note Solid bar graphs draw all the pixel columns from the first pixel column of the character defined by bRow and bCol to the pixel column specified by bPixelColEnd Line bar graphs draw the specific pixel column specified in the define character For line bargraphs bLen 1 and bPixelColEn
5. lita interrupci n Timer los m dulos LCD y Leds se espera configuraci n Timer8 Enablelnt habil LCD_Start se activan EDI Start LED2 Start ED3 Start ED4 Start while USB bGetConfiguration USB USB_INT_ REG USB_INT_SOF_MASK 141 Pablo Desviat Cruzado while 1 if SOF Flag SOF Flag 0 llega aqui cada ms Si se presiona alg n boton en el PC lights report USB_INTERFACE_0_OUT_RPT_DATA 0 ledl lights report amp 0x01 00000001 led2 lights report 0x02 gt gt 1 00000010 led3 lights report amp 0x04 gt gt 2 00000100 led4 lights report amp 0x08 gt gt 3 00001000 a Dispositivo I 2 gt 3 2 if ledl 1 amp amp enviadol 0 si estaba apagado LED1_Switch 1 habitaciones 0 1 if enviadol 0 Habitacion 1 62 S gt 3 while i lt 21 envio de unidad dato unidadl i if dato 1 pulso pasocero i else pasocero i while i lt 21 envio de unidad dato unidadl i 142 Pablo Desviat Cruzado if dato 1 pulso pasocero Lt 18e asocero me BO SO 1 07 pasocero pasocero pasocero pasocero pasocero pasocero SS SeSSeSsSsosee Encender x2 while i lt 21 envio funcion dato unidadON i if
6. Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM8_ Start Description Starts the PWM8 User Module If the enable input is high the Counter begins to down count C Prototype void PWM8_Start void Assembly call PWM8 Start Parameters None Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM8_ Stop Description Stops the counter operation C Prototype void PWM8 Stop void Assembly call PWM8 Stop Parameters None Return Value None Side Effects The output is reset low and writing to the Period register causes the Counter register to update with the Document Number 001 13581 Rev F Page 8 of 19 Pe SPJ Cypress 8 Bit Pulse Width Modulator new period value The A and X registers may be altered by this function FUNCTION PWM8_WritePeriod Description Writes the Period register with the period value The period value is transferred from the Period regis ter to the Counter register immediately if the PWM8 is stopped or when the counter reaches the zero count C Prototype void PWM8 WritePeriod BYTE bPeriod Assembly mov A bPeriod call PWM8 WritePeriod Parameters bPeriod bPeriod value is a value from 0 to 255 and is passed in the Accumulator Return Value None Side Effects The A and X registers may be altered by this function FUN
7. Insert your custom code below this banner NOTE interrupt service routines must preserve the values of the A and X CPU registers r 7 r r r push X push A call Timer16 wReadTimer mov wElapsedTime 1 A mov wElapsedTime X call Timerl6 Stop pop A pop X r Insert your custom code above this banner r r PSoC_UserCode END Do not change this line reti The same code in C is as follows Note that the interrupt routine must be written in assembly include lt m8c h gt part specific constants and macros include PSoCAPI h PSoC API definitions for all User Modules WORD wElapsedTime void main Timer 6 WritePeriod Oxffff Timerl6 WriteCompareValue 0x0001 Timerl6 EnableInt M8C EnableGInt 16 while wElapsedTime 24 Bit Timer Sample Firmware Source Code In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based i e zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT types ins
8. Symbol Description Min Typ Max Units Notes Ret Resistor Unit Value Continuous Time 12 2 kQ Cgc Capacitor Unit Value Switched Capacitor 80 fF 3 3 9 DC POR and LVD Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ty lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V or 3 3V at 25 C and are for design guidance only Note The bits PORLEV and VM in the table below refer to bits in the VLT_CR register See the PSoC Mixed Signal Array Technical Reference Manual for more information on the VLT_CR register Table 3 15 DC POR and LVD Specifications Symbol Description Min Typ Max Units Notes Vdd Value for PPOR Trip positive ramp VPPOROR PORLEV 1 0 00b 2 91 V VPPORIR PORLEV 1 0 01b 4 39 V VPPOR2R PORLEV 1 0 10b 4 55 V Vdd Value for PPOR Trip negative ramp VepoRo PORLEV 1 0 00b 2 82 V VPPoR1 PORLEV 1 0 01b 4 39 V VPPoR2 PORLEV 1 0 10b 4 55 V PPOR Hysteresis VPHo PORLEV 1 0 00b 92 mV VrH1 PORLEV 1 0 01b 0 mV VpH2 PORLEV 1 0 10b 0 mV Vdd Value for LVD Trip VLvDo VM 2 0 000b 2 86 2 92 2 988 v VLvD1 VM 2 0 001b 2 96 3 02 3 08 V VLvD2 VM 2 0 010b 3 07 3 13 3 20 v VLVD3 VM 2 0 011b 3 92 4 00 4 08 v VivDa VM 2 0 100b 4 39
9. Interrupt Type PWM Block Diagram Data Path width n 8 or 16 Functional Description The PWM User Module employs one to two digital PSoC blocks each contributing 8 bits to the total resolution To form a 16 bit pulse width modulator the two consecutive blocks are linked so their internal carry terminal count and compare signals are synchronously chained This concatenates the individual Count Period and Compare registers data registers DRO DR1 and DR2 respectively to provide the required 16 bit resolution The PWM API provides functions that may be called from C and assembly to stop and start operation of the Counter and to read and write the various data registers The data register values may also be established by using the Device Editor Once started the Count register is decremented on the rising edge of each clock cycle at which the active high enable input signal is asserted The Count register is reloaded with the value in the Period register on the risking clock edge following a terminal count when the count register reaches zero The Period register can be modified with a new value at anytime When the PWM is stopped writing a value to the Period register also changes the value in the Count register While the PWM is running writing the Period register does not update the Count register with the new Period value until the next reload occurs following terminal count Because the terminal count is reached when the count
10. BPOCCocooss COoCCoCoCoOoSD oco0c0000000 vsisi vis visivi sis 20000900000 PBODOODOCOD BODODODODOD ACLlTatmoowur o C000U6000O Cooocgocecog Coooeogcecoa FH 6 004010 8 SAEC REFERENCE JEDEC PKG WEIGHT TBD 1 00 MAX NOTE 1 JEDEC STD REF MS 026 MOLD PROTRUSION END FLASH SHALL NOT 3 DIMENSIONS IN MILLIMETERS STAND OFF 0 05 MIN 0 15 MAX R 0 08 MIN 0 20 MAX DETAILA 0 20 MAX Sew a DETAIL A TOP LEFT CORNER CHAMF ER 6 00 0 1G MO 195 NEW PKG 51 85209 B 2 BODY LENGTH DIMENSION DOES NOT INCLUDE MOLD PROTRUSION END FLASH EXCEED 0 0098 in 0 25 mm PER SIDE BODY LENGTH DIMENSIONS ARE MAX PLASTIC BODY SIZE INCLUDING MOLD MISMATCH R 0 08 MIN 0 20 MAX GAUGE PLANE N 0 60 0 15 1 00 REF NOTE PKG CAN HAVE OR 4 CORNERS CHAMFER 51 85048 C February 15 2007 Document No 38 12018 Rev J 41 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 4 Packaging Information 4 2 Thermal Impedance Table 4 1 Thermal Impedance for the Package Package Typical 0 56 QFN 12 93 C W 68 QFN 13 05 C W 100 VFBGA 65 C W Ty Ta POWER x OJA To achieve the thermal impedance specified for the QFN package the center thermal pad should be soldered to the PCB ground plane 4 3 Solder Reflow Peak Temperature Following is the
11. Digital Analog 1 O IM P2 3 Direct switched capacitor block input 2 O M P2 1 Direct switched capacitor block input 3 O M P47 4 O M P4 5 5 O M P4 3 6 O M P4 1 7 O M P3 7 A M P2 3 1 42 P2 2 A 1 M 8 O M P3 5 A M P2 1 P2 41 e P2 0 A l M 9 O M P3 8 edo 3 40 el P4 6 M j 4 B E P4 4 M nto A Lo mesi bs 2d PALM M P4 1 PB 6 P4 0 M 12 10 M IP55 7 1 M P3 7 7 QFN 3 q P3 6 M 13 _10 M__ P5SI8 M P3 5 la 8 Top View B el P3 4 M E AE A a M P3 3 34 e P3 2 M 15 O M P1 7 12C Serial Clock SCL M P3 1 234 P3 0 M 16 O M P1 5 12C Serial Data SDA M P5 7 2 P5 6 M 17 O M P8 M P5 5 31 P5 4 M 18 O M P1 1 12C Serial Clock SCL ISSP SCLK M P5 3 eq P5 2 M 19 Power Vss Ground connection M PS 1 2 8 P5 0 M 20 USB D SEN 21 USB D ae a a a N 22 Power Vdd Supply voltage ES a4 3 ez 0000 Llpooa 23 O P7 7 TAS aise 24 10 P7 0 DP a 25 O M P1 0 12C Serial Data SDA ISSP SDATA SS E Q 26 10 M P12 Ss 27 O M PA 28 O M P1 6 29 O M P5 0 Type a 30 10 M IP52 Digital Analog N me Description 31 O M P5 4 O M P2 6 External Voltage Reference VREF input 32 O M P5 6 O M PO O Analog column mux input 33 O M P3 0 O IM Po 2 Analog column mux input 34 O M P3 2 O M PO 4 Analog column mux input VREF 35 O M P3 4 10 M PO 6 Analog column mux input 36 O M P3 6 Power Vdd Supply voltage 37 O M P4 0 Power Vss Ground connection
12. Functional Description The USBFS User Module provides a USB full speed Chapter 9 compliant device framework The user module provides a low level driver for the control endpoint that decodes and dispatches requests from the USB host Additionally this user module provides a USBFS Setup Wizard to enable easy descriptor construction You have the option of constructing an HID based device or a generic USB Device You make your choice when you select the USBFS User Module Once you add an instance of a USBFS User Module you switch between an HID device and a generic device by deleting and then adding a new instance of the USBFS User Module USB Compliance USB drivers may present various bus conditions to the device including Bus Resets and different timing requirements Not all of these can be correctly illustrated in the examples provided It is your responsibilty to design applications that conform to the USB spec USB Compliance for Self Powered Devices In the USB Compliance Checklist there is a question that reads Is the device s pull up active only when Vpus is high The question lists Section 7 1 5 in the Universal Serial Bus Specification Revision 2 0 as a reference This section reads in part The voltage source on the pull up resistor must be derived from or controlled by the power supplied on the USB cable such that when Vpys is removed the pull up resistor does not supply current on the data line to which it is
13. Re pr od S37 cypress LCD Too Box Note For some displays it may be good design practice to tie signals DBO 3 on the display to GND with 10K resistors Functional Description The LCD User Module uses a single I O port to interface to an industry standard Hitachi HD44780A LCD controller This type of display has a simple interface consisting of 8 data bits read write R W register select RS and an enable E signal To reduce the number of pins required the 4 bit interface mode is used The LCD to PSoC block diagram and the table below describe the 4 bit interface connections On some displays DBO DB1 DB2 and DB3 may need to be pulled down to V with a 10K resistor Pulling these signals low ensures that the 4 bit mode is entered properly LCD to PSoC Interconnect PSoC Pin LCD Pin Description Port X0 DB4 Data Bit 0 Port X1 DB5 Data Bit 1 Port X2 DB6 Data Bit 2 Port X3 DB7 Data Bit 3 Port X4 E LCD Enable Port X5 RS Register Select Port X6 R W Read Not Write A cursor position function places the cursor at any location For two line by 16 character displays the upper left corner is position 0 0 and the lower right corner is position 1 15 Refer the following figure Col 0 Col 15 Row 0 Row 1 Cursor Position Low level commands are provided to write data to the display Data and Control registers The LCD manufacturer s data sheet should be reviewed for specific features and font informa
14. Turn off LED at start up include m8c inc include PSoCAPI inc area text ROM REL export _main _main mov a 0x00 Call LED_Switch mov A 0x01 Call LED_Switch then tur part specif PSoC API de Turn Do user stu Turn On LED A sample project written in C follows LED ED User Module n it on WOW ic constants and macros finitions for all User Modules Off LED Sample C Code for the LED Turn LED off then its state then stay in a loop and invert include lt m8c h gt include PSoCAPI h void main LED_Start LED_Switch 1 while 1 LED_Invert Configuration Registers None Document Number 001 13570 Rev A part specific constants and macros PSoC API definitions for all User Turn on LED Flash LED Page 5 of 6 LED Document Number 001 13570 Rev A Revised October 7 2008 Page 6 of 6 Cypress Semiconductor Corporation 2005 2008 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life support life saving cri
15. respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned control to its caller The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions 24 Bit Timer API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for Timer24 CONSTANT Timer24_PERIOD Description Represents the value chosen for the Period field of the Timer24 in the Device Editor The value can have a range between 0 and 16777215 CONSTANT Timer24_COMPARE_VALUE Description Represents the value chose for the PulseWidth field of the Timer24 in the Device Editor The value can have a range between 0 and 16777215 FUNCTION Timer24_Enableint Description Enables the interrupt mode operation Note however that global interrupts must also be enabled before interrupts will actually be serviced C Prototype void Timer24 Assembly call Timer24 _ Parameters None Ti EnableInt void p EnableInt Document Number 001 1
16. 1 99 Parameters none Returns none E E E E OS EE SE E ES E E E E E E E E E E E E E E E E E E E A ES EE E E E E O E A E EE E O SS E E O EE E E E E O A E E E E include m8c inc part specific constants and macros Document Number 001 13625 Rev E Page 26 of 42 aa 0 Cypress 8 Bit Timer PERFOR include memory inc Constants amp macros for SMM LMM and Compiler include PSoCAPI inc 7 PSoC API definitions for all User Modules export main _main mov A 0x63 call Timer8 WritePeriod mov A 0x00 call Timer8 WriteCompareValue M8C_EnableGInt call Timer8 Enablelnt call Timer8 Start terminate jmp terminate The same code in C is as follows KKKKK KKK KK KK KK KK KK KK KKK KK KK KKKKKKKKKKKKKKKKKKKKKKEKKKKKKKKKKKKKKKKKKKKKKK This sample shows how to create an interrupt every 1 ms The interrupt should be set to interrupt on the terminal count event The capture input should be connected to LOW The clock should be connected to 24V2 VC2 with the 24V1 VC1 clock divisor set to 16 and the 24V2 VC2 divisor set to 15 So PERIOD Count 1 ms 1 24 MHz 16 15 1 99 Parameters none Returns none FR eA A AA A A A I AA AA A I AA I AA A A AA A A RARA ARA Y include lt m8c h gt part specific constants and macros include PSoCAPI h PSoC API definitions for all User
17. DB 00h String should always be null terminated ENDLITERAL A sample project written in C is as follows Sample C code for LCD Print the string PSoC LCD on the top row starting at the 6th location on an LCD bi include lt m8c h gt part specific constants and macros include PSOoCAPI h PSoC API definitions for all User Modules void main char theStr PSoC LCD Define RAM string LCD Start Initialize LCD LCD Position 0 5 Place LCD cursor at row 0 col 5 LCD PrString thestr Print PSoC LCD on the LCD Document Number 001 13569 Rev E Page 12 of 13 Y Cypress LCD Tool Box PERFORM Document Number 001 13569 Rev E Revised June 15 2009 Page 13 of 13 Cypress Semiconductor Corporation 2002 2009 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life support life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected
18. E Page 7 of 42 cr PRESS 8 Bit Timer produces a nondeterministic procedure of servicing shared interrupt requests but does not require any RAM Selecting OffsetPreCalc causes firmware to calculate the source of a shared interrupt request only when an overlay is initially loaded This calculation decreases interrupt latency and produces a deterministic procedure for servicing shared interrupt requests but at the expense of a byte of RAM InvertCapture This parameter determines the sense of the enable input signal When Normal is selected the enable input is active high Selecting Invert causes the sense to be interpreted as active low InvertCapture applies only to the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families of PSoC devices Application Programming Interface The Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level This section specifies the interface to each function together with related constants provided by the include files Note In this as in all user module APIs the values of the A and X register may be altered by calling an API function It is the responsibility of the calling function to preserve the values of A and X prior to the call ifthose values are required after the call This registers are volatile policy was selected for efficiency reasons and has been in force since version 1 0 of P
19. En X 10 se usan trenes de pulsos de 120kHz sincronizados con el cruce por cero de la l nea Estos trenes de pulsos tienen una duraci n de 1ms 1 420 kHz ims 2 778 ms 5 556 ms 33 8 333 ms Figura 5 1 X10 y se al senoidal 75 Pablo Desviat Cruzado A Cuando se quiere transmitir un 1 binario se transmite el tren de 120kHz con una duraci n de 1ms cuando se transmite un 0 binario simplemente no se transmite nada Cada medio ciclo de onda de la se al de corriente alterna es capaz de transportar un bit de informaci n Un mensaje completo de X 10 est compuesto por un c digo de inicio 1110 seguido por un c digo de casa y un c digo llave dependiendo si el mensaje es una direcci n o un comando Las tablas 5 1 y 5 2 muestran las direcciones y c digos empleados en este protocolo Direcci n C digos de Casa Casa ESA C Tabla 5 1 C digos de Casa 76 Pablo Desviat Cruzado A cada unidad que exista en la casa sensor dimmer persiana etc se le asigna un c digo de casa y un c digo llave Esta unidad s lo responder a la unidad central cuando sus c digos casa y llave coincidan con los de la petici n Si hay alguna unidad que tenga los mismos c digos que otra ambas responder n al llamado Se tienen 16 posibles c digos de casa y 16 posibles c digos llave para una unidad con estas combinaciones se pueden
20. ID2 ENDLITERAL ENDIF WIZARD DEFINED REPORT STORAGE Document Number 001 13629 Rev D Revised June 12 2009 Page 26 of 26 Cypress Semiconductor Corporation 2005 2009 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life support life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges PSoC Designer and Programmable System on Chip are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and
21. Las ventajas de poder controlar el dispositivo desde el ordenador y la reducci n del tama o hacen de este nuevo emisor un elemento atractivo para el consumidor y que seguro tendr una buena aceptaci n dentro del mundo de la dom tica A esto se a ade la posibilidad de futuros desarrollos que puedan hacer que el producto se aun m s atractivo con la incorporaci n de un receptor dotando al dispositivo de una comunicaci n bidireccional y haciendo posible que se desarrollen incluso controles de consumo intensidad etc de elementos del hogar Destacar el programa de monitorizaci n dise ado que le a ade un valor extra al proyecto y que hace que el producto sea m s visual y sobretodo mucho m s intuitivo Todo esto hace que sea interesante incluso para clientes que rechazan la automatizaci n de sus casas por las dificultades de uso 128 Pablo Desviat Cruzado A Por ltimo recordar que el protocolo utilizado es X10 y que por tanto no necesita de ninguna instalaci n suplementaria a la hora de llevar nuestro aparato a los hogares de los consumidores puesto que utiliza la instalaci n el ctrica de cada casa para el env o y recepci n de la informaci n Resumiendo si se estudian posibles soluciones a los problemas que tiene este protocolo como por ejemplo el ruido introducido por los electrodom sticos en la red y se hace especial hincapi en las ventajas de este emisor peque o tama o conexi n
22. 001 13569 Rev E Page 9 of 13 E 24 CY PRESS LCD Tool Box bHeight Defines the height of the vertical bargraph in whole characters bPixelRowEnd Defines at which vertical pixel row to draw to i t LCD_DrawVBG 1 5 2 16 LCD_DrawVBG 1 3 2 12 LCD_DrawVBG 1 1 2 5 Examples of Vertical Bar Graphs Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified Optional Functions LCD_Control Description Writes a byte to the LCD Control register Review the specific LCD data sheet for specific LCD valid commands C Prototype void LCD Control BYTE bCmd Assembly mov A 03h Load data to be written to Control register call LCD Control Call function Parameters bCmd Byte value to send to the Control register Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently on
23. 28 Pin CY8C29466 24PXI PDIP PSoC Device Sample 28 Pin CY8C27443 24PXI PDIP PSoC Device Sample PSoC Designer Software CD Getting Started Guide USB 2 0 Cable 5 3 2 CY3210 PSoCEval1 The CY3210 PSoCEval1 kit features an evaluation board and the MiniProg1 programming unit The evaluation board includes an LCD module potentiometer LEDs and plenty of bread boarding space to meet all of your evaluation needs The kit includes m Evaluation Board with LCD Module MiniProg Programming Unit 28 Pin CY8C29466 24PXI PDIP PSoC Device Sample 2 PSoC Designer Software CD Getting Started Guide USB 2 0 Cable 5 3 3 CY3214 PSoCEvalUSB The CY3214 PSoCEvalUSB evaluation kit features a develop ment board for the CY8C24794 24LFXI PSoC device Special features of the board include both USB and capacitive sensing development and debugging support This evaluation board also includes an LCD module potentiometer LEDs an enunci ator and plenty of bread boarding space to meet all of your eval uation needs The kit includes m PSoCEvalUSB Board m LCD Module m MiniProg Programming Unit m Mini USB Cable m PSoC Designer and Example Projects CD m Getting Started Guide m Wire Pack 5 4 All device programmers can be purchased from the Cypress Online Store Device Programmers 5 4 1 CY3216 Modular Programmer The CY3216 Modular Programmer kit features a modular pro grammer and the MiniProg1 programming unit The modular programmer i
24. Figura 8 3 Hardware setup esesseseseessssseerrrsrsrsrsrrersrsesesesntntsrerrernenrsrereeeee 111 Fig ra 5 4 Conexi n LEDS iii dai dois idas 111 Figura 8 5 Diagramas de flujo del dispositivo y del host 112 Pisura 8 0 USB Wizard dadas naaa 114 Figura 9 1 Programa dise ado de monitorizaci n de luces onionccnninnnc 117 Figura 9 2 Comprobaci n conexi n USB usina ad 118 Figura 9 3 Encendido de la habitaci n Lestat 119 Figura 9 4 Se al mandada ON habitaci n T onnicicicicncnnnoninicnancnnanininncnananoso 120 Figura 9 5 C digo de dispositivo habitaci n 1 0 eee eects 120 Figura 9 6 Pasos por cero 10M urraca 121 Figura 9 7 C digo de encendido rata 121 Figura 9 8 Se al mandada OFF habitaci n 1 oo eee eeeeseeeeeteeeeeeee 122 Figura 9 9 C digo de dispositivo habitaci n 1 ooooniicininicinnnnonicnnnncnninnananos 122 Figura 9 10 Pasos por cero 10ms urinaria 123 Figura 9 11 C digo de apagado s ssssesssssesssesesrsesrsrrsrresesessrstsrerrersrsesrsreeeee 123 Figura 0 1 Esperando continuan da 131 Figura 0 2 Conexi n tarjeta USB usina ii td 131 Figura 0 3 Conexi n establecida suis ani ici 132 Figura 0 4 Estado LED todo apagado hee 132 Figura 0 5 Habitaci n ais paola dk 133 Figura 0 6 Habitaci n Zi ii a ita 134 ta 0 7 Habitaci n AAA E 135 Figura 0 8 Habitaci n Api a 136 Figura 0 9 Varias habitaciones ciencia ola 137 Figura 0 10 Habitaciones apagadas visionado cidade 138 Figura
25. Power Low 0 8 MHz Power High 0 8 MHz BWopsts_ Large Signal Bandwidth 1V pp 3dB BW 100pF Load Power Low 300 kHz Power High 300 kHz Table 3 26 3 3V AC Analog Output Buffer Specifications Symbol Description Min Typ Max Units Notes Trop Rising Settling Time to 0 1 1V Step 100pF Load Power Low 3 8 us Power High 3 8 us Tsob Falling Settling Time to 0 1 1V Step 100pF Load Power Low 2 6 us Power High 2 6 us SRros Rising Slew Rate 20 to 80 1V Step 100pF Load Power Low 0 5 V us Power High 0 5 V us SRrog Falling Slew Rate 80 to 20 1V Step 100pF Load Power Low 0 5 V us Power High 0 5 V us BWogss Small Signal Bandwidth 20mV 3dB BW 100pF Load Power Low 0 7 MHz Power High 0 7 MHz BWoLs Large Signal Bandwidth 1Vpp 3dB BW 100pF Load Power Low 200 kHz Power High 200 kHz February 15 2007 Document No 38 12018 Rev J 36 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 9 AC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 27 AC Programming Specifications
26. blocks as shown in the figure below Analog System Block Diagram All 1O Except Port 7 NS Fi A Po 6 PO 7 _y 4 PO Pol5 4 Pola Po 3 q Pole Port qs Polo ste P2 6 Analog Mux Bus n 8 dE P24 2 E P2 2 E P2 0 He Y Y Aca 0 ACH 1 0 Array Input Configuration wa 1 AnalogReference _ Interface to RefHi Reference lt AGNDIn Digital System RefLo Generators lt Refin AGND ja Bandgap M8C Interface Address Bus Data Bus Etc Al The Analog Multiplexer System The Analog Mux Bus can connect to every GPIO pin in ports 0 5 Pins can be connected to the bus individually or in any com bination The bus also connects to the analog system for analy sis with comparators and analog to digital converters It can be split into two sections for simultaneous dual channel process ing An additional 8 1 analog input multiplexer provides a sec ond path to bring Port 0 pins to the analog array Switch control logic enables selected pins to precharge continu ously under hardware control This enables capacitive mea surement for applications such as touch sensing Other multiplexer applications include m Track pad finger sensin
27. eligi este protocolo y no otro 81 Pablo Desviat Cruzado lt Do Capitulo 6 PSoC En este proyecto como ya se ha indicado se va utilizar un micrcocontrolador PsoC de la compa a Cypress concretamente el modelo CY8C24894 Figura 6 1 CY8C24894 El CY8C24894 viene en un circuito integrado de 56 pines Sus dimensiones son 8mm x 8mm x Imm y dentro de este peque o microcontrolador se ocultan multitud de componentes como se muestran en el siguiente diagrama de bloques 4 6 Digital Analog Block Block 50 I Pins Figura 6 2 Componentes CY8 C24894 82 Pablo Desviat Cruzado A La CPU del CY8C24894 es un M8C que puede funcionar hasta 24 Mhz El M8C es una versi n mejorada del M8B que se usa en dispositivos USB de baja velocidad adem s a ade modos de direccionamiento y una instrucci n TST que quita el cuello de botella provocado por el acumulador La memoria RAM ha sido extendida a 1024 bytes y est dividia en cuatro paginas de 256 bytes Un set a adido de instrucciones auto indexadoras y CPU flag bits hacen que las operaciones multi paginas sean m s eficientes La memoria de programa incluye un programa de supervisi n basado en la ROM y 16 KB de memoria flash El M8C es soportado por el compilador de C iMAGEcraft El CY8C24894 posee cuatro bloques digitales programables y seis bloques anal gicos programables Adem s contiene 49 lineas IO de las cuales 47 p
28. junio de 1879 que ha sido considerada como texto mod lico manteni ndose en vigor durante m s de un siglo hasta el a o 1985 en que fue sustituida por la nueva Ley de Aguas A finales de los a os veinte la estructura de la generaci n el ctrica en Espa a hab a cambiado radicalmente en comparaci n con la de principios de siglo se hab a multiplicado la potencia instalada por 12 hasta alcanzar 1 154 MW y el 81 de la producci n era de origen hidroel ctrico en 1929 En los a os siguientes hasta 1936 se produjo un aumento moderado del consumo el ctrico si se tiene en cuenta el bajo grado de electrificaci n existente el 5 anual de tal forma que a principios de dicho a o la potencia instalada ascend a a 1 491 Mw y exist a un cierto exceso de capacidad de producci n 18 Pablo Desviat Cruzado E La Guerra Civil y la posguerra Durante los a os en que se produjo la Guerra Civil y los primeros a os de la posguerra se produjo un estancamiento de la capacidad de producci n ya que aunque entraron en servicio algunas instalaciones otras fueron destruidas o seriamente da adas La sequ a de 1944 45 impidi atender una demanda creciente con lo que el exceso de capacidad de producci n de la d cada anterior se convirti en un importante d ficit En los a os de la posguerra de austeridad y escasez a los problemas internos vinieron a sumarse los derivados de la Segunda Guerra Mundial y el bloqueo inter
29. licos e incluso el control del PC con su DVD y sus fotos v deos y m sica digitales De esta forma el sistema dom tico puede crecer indefinidamente integrando sistemas especialmente dise ados para su funci n espec fica pero que tras un correcto an lisis se pueden integrar en el conjunto formando un sistema amigable y no sofisticado que facilita el d a a d a y evita la dispersi n tecnol gica en continuo aumento que sufren nuestros hogares Las prestaciones de un sistema dom tico son 52 Pablo Desviat Cruzado Seguridad mediante el sistema se podr realizar simulaciones de presencia en su vivienda as como si provee de detectores de intrusi n movimiento fuga de agua entre otros el sistema mediante una centralita pueda dar aviso a una central de alarmas o bien a tel fonos particulares programados en caso de que haya una intrusi n o alguna aver a t cnica en su vivienda adem s de poder conocer el estado de la vivienda desde cualquier lugar del mundo Confort mediante la administraci n de estos dispositivos se podr actuar sobre ellos desde sus propios pulsadores o si se prefiere para mayor comodidad mediante mandos a distancia se podr n controlar todos los dispositivos ya sea luces persianas o bien electrodom sticos desde una mismo sitio adem s seg n el mando se puede configurar de tal forma que con un solo mando se pueda por ejemplo controlar el sistema de luces de encendido apaga
30. tom 10 puesto que para generar el PWM de 120 Khz se necesita estar 41 microsegundos en estado alto y 41 microsegundos en estado bajo Figura 7 14 Se al 120 KHz InterruptType se selecciona cu ndo se quiere que este m dulo de una interrupci n ClockSync se elige el sincronismo del m dulo en funci n del reloj utilizado 100 Pablo Desviat Cruzado A InvertEnable se elige c mo se quiere que el bloque se active Si est seleccionado Normal el m dulo estar encendido cuando est a nivel alto 101 Pablo Desviat Cruzado Bloque Timer8 asa Este bloque se utiliza para generar una sefial de diez milisegundos simulando el paso por cero de la se al de alterna de la red Por supuesto si el PsoC llegar a conectarse a la red no habr a necesidad de este bloque puesto que como ya se ha visto se ha dise ado un detector de paso por cero Figura 7 15 M dulo Timer8 Properties Timer8 Timer8_1 Su configuraci n es la siguiente Timer User Module Version Clock Capture TerminalCountO ut CompareQut Period Compare alue CompareT ype InterruptT ype ClockSyne TC_PulseWidth InvertCapture Figura 7 16 Configuraci n Timer8 registro de comparaci n Timer8 2 6 WC3 Low None None 9 0 Less Than Terminal Count Sync to SysCik Full Clock Normal elegido el VC3 para tener un reloj de 10 Khz 10
31. types Document Number 001 13625 Rev E Page 31 of 42 0 Cypress PE RFORM 8 Bit Timer instead of pushing the argument on the stack when it sees the pragma fastcall declarations in the Timer32 h file The following is assembly language source that illustrates the use of the APIs The interrupt should be set The capture equal being measured Description This sample shows how to capt The count resolution is 1 us ture an event wit with a bounded to interrupt on th a bounded time limit time limit of 16 seconds the Compare Less than input should be connected to the event that The clock should be connected to 24V2 VC2 is The 24V1 divider set to 3 the timer ElapsedTime 1 MHz The interrupt e ae ae AAR SS a ERE A SR A I IR ETA NARRAR E PAE AER RP RR SEE PERERA RETA Constants amp macros for SMM LMM and Compiler definitions for all User Modules Create a stack frame for arguments set the period to a Max count set the compare value to trigger at 16 secs 4 294 967 295 16 000 000 4 278 967 295 timer interrupt mask enable global interrupts VC1 divider should be set to 8 and the 24V2 VC2 Computed time lapse is OXFFFFFFFF dw The foreground routine sets and s
32. v deo e internet La tecnolog a PLC utiliza la red de distribuci n de baja tensi n entre el centro de transformaci n y el terminal de red como medio de 47 Pablo Desviat Cruzado transmisi n accediendo al bucle local del abonado hogares o empresas a trav s del terminal de electricidad del abonado Figura dena lt Power Line Communications es una Telefon a r yotras redes 5 tecnolog a de acceso y hogar que Fibra ptica utiliza la red el ctrica de baja tension r radioenlace o 7 para la transmisi n de voz y datos PLC MT pao Centro S Servicios M f vr r Nh gt Potencia 50 dBm Hz IN nina Punto Multipunto gt a gt 3 f cK Transformador MTIBT 100 300 viviendas Spread Spectrum Banda 1 6 30Mhz Velocidad 2 20 Mbit s Figura 2 9 Esquema PLC Por tanto PLC requiere del despliegue de una red de transmisi n de telecomunicaciones adem s de la utilizaci n de la red el ctrica Lo que se est haciendo es conectar redes internas y externas de electricidad con redes de telecomunicaciones Dentro de la tecnolog a PLC se distinguen la red externa de transmisi n y la red interna de comunicaci n dentro del hogar o del negocio del usuario final La red externa o tecnolog a de acceso a la ltima milla permite el transporte de se ales hasta el usuario final v a el centro de transformaci n local y la red el ctrica La red interna
33. 0 11 Salida del PropraA a 139 Indice de tablas Tabla 5 1 Codigos de Casa Tabla 5 2 C digos de llave Pablo Desviat Cruzado Parte I MEMORIA Pablo Desviat Cruzado E Capitulo 1 INTRODUCCI N 1 Motivaci n del proyecto Este proyecto surge a partir de la idea de automatizar una vivienda sin necesidad de hacer uso de m s cables que los que ya est n siendo utilizados en la instalaci n el ctrica de la casa Con esta premisa se eligi el est ndar X10 para llevar a cabo esta idea La principal ventaja por la que se ha elegido este est ndar para el desarrollo del proyecto es porque este protocolo est especialmente orientado hacia la utilizaci n de la red el ctrica de las viviendas utilizando corrientes portadoras para controlar cualquier dispositivo a trav s de la l nea de corriente domestica Con este protocolo se maneja un direccionamiento sencillo que se puede utilizar en la red para identificar cualquier elemento caracter stica que vendr muy bien si lo que se pretende es poder automatizar diferentes dispositivos dentro de la vivienda Otras de las diferentes caracter sticas del X10 y que reflejan el por qu se eligi este protocolo son Es est ndar debido a las caracter sticas de la corriente el ctrica domestica 220 V y 50 Hz Es flexible y facil de usar gracias a como est constituida la red en el hogar Pablo Desviat Cruzado A No hay que config
34. 027 1 6 x BG 0 010 1 6 x BG 0 018 V AGND Column to Column Variation AGND Vdd 2 0 034 0 000 0 034 v RefHi Vdd 2 BandGap Not Allowed RefHi 3 x BandGap Not Allowed RefHi 2 x BandGap P2 6 P2 6 0 5V Not Allowed RefHi P2 4 BandGap P2 4 Vdd 2 Not Allowed RefHi P2 4 P2 6 P2 4 Vdd 2 P2 6 0 5V P2 4 P2 6 0 075 P2 4 P2 6 0 009 P2 4 P2 6 0 057 V RefHi 3 2 x BandGap Not Allowed RefLo Vdd 2 BandGap Not Allowed RefLo BandGap Not Allowed RefLo 2 x BandGap P2 6 P2 6 0 5V Not Allowed RefLo P2 4 BandGap P2 4 Vdd 2 Not Allowed Z RefLo P2 4 P2 6 P2 4 Vdd 2 P2 6 0 5V P2 4 P2 6 0 048 P2 4 P2 6 0 022 P2 4 P2 6 0 092 V a AGND tolerance includes the offsets of the local buffer in the PSoC block Bandgap voltage is 1 3V 0 02V February 15 2007 Document No 38 12018 Rev J 28 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 3 8 DC Analog PSoC Block Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 14 DC Analog PSoC Block Specifications
35. 1 Paquetes de datos manejados por el CY8C24894 El maestro programa paquetes cada milisegundo Siempre manda una trama de comienzo SOF Start Of Frame cada milisegundo la cual puede ser usada como referencia de tiempo Hay mucha cantidad de software corriendo en el host controller que decide qu paquetes deber an ser alojados en cada dispositivo con cada trama la mayor a de los paquetes SOF es una excepci n incluyen la direcci n de dispositivo objetivo y el dispositivo solo necesita responder a esos paquetes que incluyen su direcci n A cada dispositivo le corresponde una direcci n nica que se le asigna cuando se conecta al host 107 Pablo Desviat Cruzado A Hay un proceso definido para un nuevo dispositivo que se una al las conexiones USB Este proceso llamado enumeraci n requiere que el dispositivo de informaci n en un formato predefinido llamado descriptors al host de tal manera que l pueda identificar el dispositivo y sus caracter sticas El host utiliza esta informaci n para decidir si el dispositivo puede conectarse y de ser as le asigna una nica direcci n y carga el driver del dispositivo La siguiente figura muestra a nivel de software una conexi n USB de un dispositivo Cabe destacar los niveles de capas de software en el PC y la estructura jer rquica del dispositivo ReadFile WriteFile Real Worid Figura 8 2 Vista de software de una conexi n USB 108 Pablo
36. 1 7 100 Pin Part Pinout On Chip Debug The 100 pin TQFP part is for the CY8C24094 On Chip Debug OCD PSoC device Note This part is only used for in circuit debugging It is NOT available for production Table 1 7 100 Pin Part Pinout TQFP Pn 3 8 A Pin S 2 Ue N o wo Name Description gt cw Name Description o E No e a lt a lt 1 NC No connection 51 IO M P1 6 2 NC No connection l M P5 0 3 IO M PO 1 Analog column mux input M P5 2 4 IO M P2 7 M P5 4 5 10 M P2 5 M P5 6 6 IO 1 M P2 8 Direct switched capacitor block input M P3 0 7 IO 1 M P2 1 Direct switched capacitor block input M P3 2 8 IO M P4 7 58 IO M P3 4 9 O M P4 5 59 IO M P3 6 10 IO M P43 60 HCLK OCD high speed clock output 11 1O M P4 1 61 CCLK OCD CPU clock output 12 OCDE OCD even data IO 62 Input XRES Active high pin reset with internal pull down 13 OCDO OCD odd data output 63 IO M P4 0 14 NC No connection 64 IO M P4 2 15 Power Vss Ground connection 65 Power Vss Ground connection 16 IO M P3 7 66 IO M P4 4 17 lO M P3 5 67 IO M P4 6 18 lO M P3 3 68 IO I M P2 0 Direct switched capaci
37. 121 2 Pablo Desviat Cruzado De nuevo se conect la salida de la tarjeta al osciloscopio obteni ndose los siguientes resultados Acq Complete M Pos 488 0mns CHT Acoplamiento Limitar Ancho Banda EN 50MHz Ganancia Variable Invertir CH1 2 00 M 100mns CH1 1 044 5 Sep 09 00 16 lt 10Hz TDS 10028 17 17 07 04 09 2009 Figura 9 8 Se al mandada OFF habitaci n 1 Si se vuelve a analizar en detenimiento esta se al se comprueba como los c digos son mandados correctamente tanto el de dispositivo como el de funci n al igual que la espera a los pasos por cero AM Acq Complete M Pos 117 0ms CHI j j Acoplamiento Limitar Ancho Banda ig soMHz Ganancia Variable Voltaje Invertir NO CH1 640mY CHI 2 00 M 25 0ms 5 Sep 09 00 43 lt 10Hz TDS 1002B 18 43 44 04 09 2009 Figura 9 9 C digo de dispositivo habitaci n 1 122 Pablo Desviat Cruzado lt Do Acq Complete M Pos 506 0ms CURSORES Tipo Fuente at 70 00ms zz 14 29Hz Cursor 2 523ms 80 0mY CH1 2 004 M 25 0ms CHI 640m Utilice el mando multiuso para mover el Cursor 1 TDS 10028 18 44 51 04 09 2009 Figura 9 10 Pasos por cero 10ms SA Acq Complete M Pos 117 0ms CH1 Acoplamiento Limitar Ancho Banda E 60MHz Ganancia Variable Invertir CHI 2 004 M 25 0ms CHI Z 640m 5 Sep 09 0043 lt 10Hz TDS 1002B 18 43 44 04 09 2009
38. 2 BG 0 10 Vdd 2 BG Vdd 2 BG 0 10 Vv RefHi 3 x BandGap 3 x BG 0 06 3x BG 3 x BG 0 06 Vv RefHi 2 x BandGap P2 6 P2 6 1 3V 2 x BG P2 6 0 113 2x BG P2 6 0 018 2xBG P2 6 0 077 V z RefHi P2 4 BandGap P2 4 Vdd 2 P2 4 BG 0 130 P2 4 BG 0 016 P2 4 BG 0 098 v RefHi P2 4 P2 6 P2 4 Vdd 2 P2 6 1 3V P2 4 P2 6 0 133 P2 4 P2 6 0 016 P2 4 P2 6 0 100 v RefHi 3 2 x BandGap 3 2 x BG 0 112 3 2 x BG 3 2 x BG 0 076 Vv RefLo Vdd 2 BandGap Vdd 2 BG 0 04 Vdd 2 BG 0 024 Vdd 2 BG 0 04 Vv RefLo BandGap BG 0 06 BG BG 0 06 V RefLo 2 x BandGap P2 6 P2 6 1 3V 2 x BG P2 6 0 084 2 x BG P2 6 0 025 2xBG P2 6 0 134 V RefLo P2 4 BandGap P2 4 Vdd 2 P2 4 BG 0 056 P2 4 BG 0 026 P2 4 BG 0 107 v RefLo P2 4 P2 6 P2 4 Vdd 2 P2 6 1 3V P2 4 P2 6 0 057 P2 4 P2 6 0 026 P2 4 P2 6 0 110 v a AGND tolerance includes the offsets of the local buffer in the PSoC block Bandgap voltage is 1 3V 0 02V Table 3 13 3 3V DC Analog Reference Specifications Symbol Description Min Typ Max Units BG Bandgap Voltage Reference 1 28 1 30 1 32 V AGND Vdd 22 Vdd 2 0 03 Vdd 2 0 01 Vdd 2 0 005 V AGND 2 x BandGap Not Allowed AGND P2 4 P2 4 Vdd 2 P2 4 0 008 P2 4 0 001 P2 4 0 009 v AGND BandGap BG 0 009 BG 0 005 BG 0 015 V z AGND 1 6 x BandGap 1 6 x BG 0
39. 50 48 2 No Tape and Reel 56 Pin 8x8 mm QFN CY8C24894 24LFXI 16K 1K 40C to 85C 4 6 49 47 2 Yes CEN CY8C24894 24LFXIT 16K 1K 40C to 85C 4 6 49 47 2 Yes Tape and Reel 68 Pin OCD 8x8 mm QFN CY8C24094 24LFXI 16K 1K 40C to 85C 4 6 56 48 2 Yes 68 Pin 8x8 mm QFN CY8C24994 24LFXI 16K 1K 40C to 85C 4 6 56 48 2 Yes 68 Pin 8x8 mm QFN CY8C24994 24LFXIT 16K 1K 40C to 85C 4 6 56 48 2 Yes Tape and Reel 100 Ball OCD 6x6 mm VFBGA CY8C24094 24BVXI 16K 1K 40C to 85C 4 6 56 48 2 Yes 100 Ball 6x6 mm VFBGA CY8C24994 24BVXI 16K 1K 40C to 85C 4 6 56 48 2 Yes 100 Pin OCD TQFP CY8C24094 24AXI 16K 1K 40C to 85C 4 6 56 48 2 Yes a This part may be used for in circuit debugging It is NOT available for production 6 1 Ordering Code Definitions CY 8 C 24 xxx SPxx _ Package Type Thermal Rating PX PDIP Pb Free C Commercial SX SOIC Pb Free Industrial PVX SSOP Pb Free E Extended LFX LKX QFN Pb Free AX TQFP Pb Free BVX VFBGA Pb Free Speed 24 MHz Part Number Family Code Technology Code C CMOS Marketing Code 8 Cypress PSoC Company ID CY Cypress February 15 2007 Document No 38 12018 Rev J 46 7 Sales and Company Information m a AA _ _ CYPRESS vate a PERFORM To obtain information about Cypress Semiconductor or PSoC sales and technical support reference the following information Cypress Semiconductor 198 Champion Court San
40. 5F RW 9F INT_MSK2 DF RW DBBOODRO 20 AMX_IN 60 RW AO INT_MSKO EO RW DBBOODR1 21 WwW AMUXCFG 61 RW Al INT_MSK1 El RW DBBOODR2 22 RW 62 A2 INT_VC E2 RC DBBOOCRO 23 ARF_CR 63 RW A3 RES_WDT E3 Ww DBBO1DRO 24 CMP_CRO 64 A4 DEC_DH E4 RC DBB01DR1 25 Ww ASY_CR 65 A5 DEC_DL E5 RC DBB01DR2 26 RW CMP_CR1 66 RW A6 DEC_CRO E6 RW DBBO1CRO 27 67 A7 DEC_CR1 E7 RW DCBO2DRO 28 68 MUL1_X A8 Ww MULO_X E8 Ww DCB02DR1 29 Ww 69 MUL1_Y A9 Ww MULO_Y E9 Ww DCBO2DR2 2A RW 6A MUL1_DH AA R MULO_DH EA R DCBO2CRO 2B 6B MUL1_DL AB R MULO_DL EB R DCBO3DRO 2C TMP_DRO 6C RW ACC1_DR1 AC RW ACCO_DR1 EC RW DCBO3DR1 2D WwW TMP_DR1 6D RW ACC1_DRO AD RW ACCO_DRO ED RW DCBO3DR2 2E RW TMP_DR2 6E RW ACC1_DR3 AE RW ACCO_DR3 EE RW DCBO3CRO 2F TMP_DR3 6F RW ACC1_DR2 AF RW ACCO_DR2 EF RW 30 ACBOOCR3 70 RW RDIORI BO RW FO 31 ACBOOCRO 71 RW RDIOSYN B1 RW F1 32 ACBOOCR1 72 RW RDIOIS B2 RW F2 33 ACBOOCR2 73 RW RDIOLTO B3 RW F3 34 ACB01CR3 74 RW RDIOLT1 B4 RW F4 35 ACBO1CRO 75 RW RDIOROO B5 RW F5 36 ACBO1CR1 76 RW RDIORO1 B6 RW F6 37 ACBO1CR2 77 RW B7 CPU_F F7 RL 38 78 B8 F8 39 79 B9 F9 3A 7A BA FA 3B 7B BB FB 3C 7C BC FC 3D 7D BD DAC_D FD RW 3E 7E BE CPU_SCR1 FE 3F 7F BF CPU_SCRO FF Blank fields are Reserved and should not be accessed Access is bit specific February 15 2007 Document No 38 12018 Rev J 20 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 2 Register Reference Register Map Bank 1 Table Configuration
41. A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_Write Compare Value Description Modifies the value of the Timer s Compare register In order to avoid unexpected side effects the Timer should be disabled not yet enabled via the Start API function or by first calling the Stop API function C Prototype void Timer24 WriteCompareValue DWORD dwCompareValue Assembly mov X dwCompareValue move address of compare value into X call Timer24 WriteCompareValue Parameters dwCompareValue The value is from 0 to the period value Document Number 001 13625 Rev E Page 19 of 42 cr PRESS 8 Bit Timer Return Value None Side Effects If this function is called while the Timer is running and the compare value is equal to or greater than the current value of the Count register then a compare event can occur The value of the compare register may vary somewhat unpredictably as the Compare register is distributed across multiple PSoC blocks and written one byte at a time The order in which the bytes are written is not specified and subject to change This could cause an interrupt if both the interrupt type is set to trigger on the compare event and the
42. API function has returned to the caller and even before it has restored the Compare register to its previous state Interrupts are momentarily disabled Finally in order to restore the Compare register the user module itself is tempo rarily disabled This may cause the Count register to miss one or more counts The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_bReadTimer Description Reads the current Timer8 Count register value This performs a software solicited hardware synchro nous counter capture operation This is the preferred method of reading the Count register providing that the Compare register is not required to be preserved Note that this API routine used to be called bCaptureCounter C Prototype BYTE Timer8 bReadTimer void Assembly call Timer8 bReadTimer mov bCount A Parameters None Returns Count register contents It is returned in the Accumulator Side Effects Compare register contents are lost The compare condition becomes true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the us
43. Assembly call LCD InitVBG Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified LCD_DrawVBG Description Draws a vertical bar graph starting from the first pixel row at character location bRow bCol with a character height of bHeight up to the specified vertical pixel row bPixelRowEnd C Prototype void LCD DrawVBG BYTE bRow BYTE bCol BYTE bHeight BYTE bPixelRowEnd Assembly Note When using the large memory model calls to LCD_DrawVBG should be made using an under score in front of the function name call LCD DrawVBG mov A 25h Set bPixelColEnd 25 push A mov A 06h Set bLen 6 pixel columns push A mov A 03h Set bCol 3 push A mov X SP Setup data pointer X dec X mov A 01h Set bRow 1 gt the second line call LCD_DrawVBG add SP 3 Restore the stack Parameters bRow Defines the starting character row range of 0 to number of rows minus 1 bCol Defines the starting character column range 0 to number of character columns minus 1 Document Number
44. CY8CTMA300 CY8CTMA301 CY8CTMA301D CY8C28x45 CY8CPLC20 CY8CLED16P01 CY8C28xxx 8 bit 1 0 0 70 0 1 16 bit 2 0 0 93 0 1 24 bit 3 0 0 137 0 1 32 bit 4 0 0 154 0 1 CY8C26 25xxx 8 bit 1 0 0 106 0 1 16 bit 2 0 0 142 0 1 24 bit 3 0 0 196 0 1 32 bit 4 0 0 228 0 1 For one or more fully configured functional example projects that use this User Module go to www cypress com psocexampleprojects Features and Overview e 8 16 24 or 32 bit general purpose timer uses one two three or four PSoC blocks respectively e Source clock rates up to 48 MHz e Automatic reload of period on terminal count e Capture for clocks up to 24 MHz e Terminal count output pulse may be used as input clock for other analog and digital functions e Interrupt option on terminal count capture on some devices or when counter reaches a preset value The 8 16 24 and 32 bit Timer User Modules provide down counters with programmable period and capture ability The clock and enable signals can be selected from any system time base or external source Once started the timer operates continuously and reloads its internal value from the period register upon reaching terminal count The output pulses high in the clock cycle following terminal count Events can capture the current Timer count value by asserting the edge sensitive capture input signal Each clock cycle the Timer tests the count against the value of the compare register for either a Less Than or L
45. Counter register value and is returned in the Accumulator Side Effects To read the PWMB8 Counter register the PulseWidth register must be temporarily modified This could cause the PWM8 Counter register operation to be postponed by one or more counts In addition this could result in an inadvertent interrupt condition The A and X registers may be altered by this function 16 Bit PWM API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for PWM16 CONSTANT PWM16_PERIOD Description Represents the value chosen for the Period field of the PWM16 in the Device Editor The value can have a range between 0 and 65535 CONSTANT PWM16_PULSE_WIDTH Description Represents the value chose for the PulseWidth field of the PWM16 in the Device Editor The value can have a range between 0 and 65535 FUNCTION PWM16_Enablelnt Description Enables the interrupt mode operation Document Number 001 13581 Rev F Page 10 of 19 a pr e CYPRESS 8 Bit Pulse Width Modulator C Prototype void PWM16 Enablelnt void Assembly call PWM16 EnableInt Parameters None Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM16_Disablelnt Description Disables the interrupt mode operation C Prototype voi
46. Desviat Cruzado A Suponiendo que el proceso de enumeraci n del dispositivo ha tenido xito y se le ha sido asignada una direcci n y su driver ha sido cargado ahora puede tener diferentes configuraciones La mayor a de los dispositivos solo poseen una nica configuraci n pero las especificaciones del USB dan flexibilidad para que un dispositivo tenga diferentes funciones dependiendo de factores externos como por ejemplo la tensi n de alimentaci n o las capacidades IO Sin embargo solo puede haber una configuraci n activada en un momento dado Una configuraci n puede tener diferentes interfaces El interfaz define lo que hace el dispositivo y es el causante de que se encuentre un driver para este en el PC Es com n que para un dispositivo tenga m s de un interfaz l gicamente el dispositivo se ve como una colecci n de interfaces que operan independientemente y otros m ltiples interfaces que operan concurrentemente Las especificaciones de USB definen las clases de dispositivos y la mayor a de sistemas operativos Windows OS X Linux etc contienen la mayor a de los drivers como por ejemplo impresoras dispositivos de almacenamiento masivo dispositivos de interfaz humana HID o dispositivos de audio Los beneficios de usar los drivers ya incluidos es el no tener que escribir ning n nuevo driver y poder usar el dispositivo en la gran mayor a de sistemas operativos En este proyecto se usar n lo
47. Development Tools O Free Development Software E Programmable Pin Configurations PSoC Designer O 25 mA Sink on all GPIO O Full Featured In Circuit Emulator and Pull up Pull down High Z Strong or Open Programmer Drain Drive Modes on all GPIO A Full Speed Emulation A Up to 48 Analog Inputs on GPIO O Complex Breakpoint Structure O Two 33 mA Analog Outputs on GPIO O 128K Bytes Trace Memory Configurable Interrupt on all GPIO Port7 Ports H Porta Hports H Port2 1 Port 1 Porto 519 09 E a N E 2 7 Global Digital Interconnect 2 9 Global Analog Interconnect PSoC CORE SRAM SROM Flash 16K E Sleep and Interrupt CPUCore M8C Watchdog Controller ClockSources Includes IMOand ILO DIGITAL SYSTEM ANALOG SYSTEM Analog all Ref Digital Analog Block Block Array Array l I Anal a Digital 2 Decimator p PORandLVD Von jsb a Clocks MACs Type 2 System Resets Ref Muxing SYSTEM RESOURCES PSoC Functional Overview The PSoC family consists of many Mixed Signal Array with On Chip Controller devices All PSoC family devices are designed to replace traditional MCUs system ICs and the numerous discrete components that surround them The PSoC CY8C24x94 devices are unique members of the PSoC family because it includes a full
48. El sector el ctrico en su conjunto se ha visto con importantes dificultades de atender puntualmente este crecimiento no previsto debido a los plazos de desarrollo que requieren todas estas infraestructuras varios a os en el mejor de los casos en un entorno adem s de creciente incertidumbre por la liberalizaci n del sector y de ausencia de un sistema regulatorio predecible Como consecuencia en el a o 2001 desde un punto de vista de desarrollo de las infraestructuras el sector el ctrico espa ol se caracterizaba por los siguientes elementos equipamiento de generaci n instalado muy ajustado margen de reserva muy reducido que incrementa el riesgo de falta de abastecimiento en casos de puntas de demanda muy acusadas o de indisponibilidades fortuitas superiores a las normales una red de transporte que presenta problemas de saturaci n tanto zonales como globales en per odos de alta demanda y cuyo desarrollo se ha visto retrasado en muchos casos por falta de autorizaciones administrativas una demanda creciente con una importante sensibilidad al precio de la electricidad y sin incentivos encaminados a una mejor gesti n de la curva de carga asimismo en materia de gas natural se presenta un d ficit de infraestructuras gasistas 32 Pablo Desviat Cruzado A previsiblemente hasta el 2005 que podr a dar lugar a problemas puntuales de falta de suministro a las centrales de gas en los pr ximos inviernos En est
49. Electrical Specifications 3 3 7 DC Analog Reference Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks The power levels for AGND refer to the power of the Analog Continuous Time PSoC block The power levels for RefHi and RefLo refer to the Analog Reference Control register The limits stated for AGND include the offset error of the AGND buffer local to the Analog Continuous Time PSoC block Reference control power is high Table 3 12 5V DC Analog Reference Specifications Symbol Description Min Typ Max Units BG Bandgap Voltage Reference 1 28 1 30 1 32 Vv a AGND Vdd 28 Vdd 2 0 04 Vdd 2 0 01 Vdd 2 0 007 V Z AGND 2 x BandGap 2 x BG 0 048 2 x BG 0 030 2 x BG 0 024 v AGND P2 4 P2 4 Vda 2 2 P2 4 0 011 P2 4 P2 4 0 011 V AGND BandGap BG 0 009 BG 0 008 BG 0 016 Y AGND 1 6 x BandGap 1 6 x BG 0 022 1 6 x BG 0 010 1 6 x BG 0 018 V AGND Block to Block Variation AGND Vdd 2 0 034 0 000 0 034 M RefHi Vdd 2 BandGap Vdd
50. Ganancia Variable Invertir CH1 2 00 M 100ms CH1 1 044 5 Sep 09 00 15 lt 10Hz TDS 1002B 17 16 02 04 09 2009 Figura 9 4 Se al mandada ON habitaci n 1 Si se analiza m s detenidamente la se al obtenida se puede comprobar como se manda correctamente el c digo de dispositivo correspondiente a la habitaci n 1 dos veces se esperan 6 pasos por cero y se manda dos veces el c digo de encendido Tek JT Acq Complete M Pos 118 0ms CHI Acoplamiento Limitar Ancho Banda g 50MHz Ganancia Variable j e Gruesa Voltaje Invertir CH1 2 004 M 25 0ms CH1 720mY 5 Sep 09 00 33 lt 10Hz TDS 10028 18 34 12 04 09 2009 Figura 9 5 C digo de dispositivo habitaci n 1 120 Pablo Desviat Cruzado Acq Complete M Pos 506 0ms CURSORES Tipo Fuente CH1 at 70 00ms zx 14 29Hz e Y 0 00 Cursor 1 453ms 80 0m CH1 2 00 M 25 0ms CHI 640m 5 Sep 09 00 40 lt 10Hz TDS 1002B 18 41 05 04 09 2009 Figura 9 6 Pasos por cero 10 ms A j Acq Complete M Pos 636 0ms CH1 Acoplamiento Limitar Ancho Banda 50MHz Ganancia Variable CH1 2 00 Invertir M 25 0ms CH1 640m 5 Sep 09 00 42 lt 10Hz TDS 1002B 18 42 50 04 09 2009 Figura 9 7 C digo de encendido Al igual que con el encendido se comprob si apagando el bot n en el PC la tarjeta mandaba los c digos correspondientes para que las luces de la habitaci n se apagasen
51. InterruptType flag determines whether to trigger the interrupt on the compare event or on the terminal count also see Capturelnt in the Control register Both CompareType and InterruptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 1 1 Clock LSB Capture Clock Enable selects the input signal of the same name from one of 16 sources The User Module Enable parameter setting in the Device Editor determines its value Similarly the user module Clock parameter setting determines this value Output Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 Out Enable OutputSelect LSB 0 0 0 0 0 0 0 0 Output Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB AuxClk AuxEnable AuxSelect OutEnable OutputSelect LSB AuxClk 0 0 0 0 0 0 The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and OutSelect bitfields AuxEnable and AuxSelect permit driving the compare output signal onto one of the row output buses and are controlled by manipulating the row bus graphically in the Device Editor Interconnect View OutEnable is set when the terminal count output is driven onto one of the row or global output buses OutputSelect controls which of the buses will be driven from the c
52. LIB tran 0 03 R1 2k7 fuente D4 d1n4007 SINE O 311 50 Figura 7 2 Esquema detector de cero En cada interrupci n el PSoC debe conocer cuando debe interrumpirse por un flanco de subida o un flanco de bajada De esta forma se detectar el cruce por cero de la media onda positiva a la negativa y viceversa Los flancos se toman en la resistencia 4 Esto es as puesto que cuando estemos trabajando en el semiciclo postivo de la red la corriente 87 100 anos de Ingenieria Pablo Desviat Cruzado 1908 2008 limitada por las resistencias puestas en serie debido a la disipaci n que tienen que soportar ir por el diodo led del optoacoplador haciendo que el transistor entre en saturaci n teniendo a la salida 0 V Por otro lado cuando estemos en el semiciclo negativo de la red la corriente ir por el otro diodo puesto en antiparalelo con el optoacoplador haciendo que el diodo led de este no emita luz y por tanto el transistor est en corte Esto provoca que no circule corriente por el colector y por tanto no tengamos ca da en la resistencia R4 De esta manera obtenemos 5 V a la salida del circuito Figura 7 3 Simulaci n detector de cero T 7 a a Sn a mb 10ms 11ms 12ms 13ms 15ms 16ms 17ms 18ms Figura 7 4 Ampliaci n simulaci n detector de cero 88 Pablo Desviat Cruzado KIA Despu s de probar el circuito en el ordenador se pro
53. Loop Gain dB Power Low Opamp Bias High 60 Power Medium Opamp Bias High 60 Power High Opamp Bias High 80 VOHIGHOA High Output Voltage Swing internal signals Power Low Opamp Bias High Vdd 0 2 V Power Medium Opamp Bias High Vdd 0 2 V Power High Opamp Bias High Vdd 0 5 V VoLowoa Low Output Voltage Swing internal signals Power Low Opamp Bias High 0 2 V Power Medium Opamp Bias High 0 2 V Power High Opamp Bias High 0 5 V Isoa Supply Current including associated AGND buffer Power Low Opamp Bias Low 400 800 pA Power Low Opamp Bias High 500 900 pA Power Medium Opamp Bias Low 800 1000 pA Power Medium Opamp Bias High 1200 1600 pA Power High Opamp Bias Low 2400 3200 pA Power High Opamp Bias High 4600 6400 uA PSRRoa Supply Voltage Rejection Ratio 65 80 dB Vss lt VIN lt Vdd 2 25 or Vdd 1 25V lt VIN lt Vdd February 15 2007 Document No 38 12018 Rev J 25 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications Table 3 8 3 3V DC Operational Amplifier Specifications Symbol Description Min Typ Max Units Notes Vosoa Input Offset Voltage absolute value Power Low Opamp Bias High 1 65 10 mV Power Medium Opamp Bias High 1 32 8 mV High Power is 5 Volts Only TCVosoa Average Input Offs
54. Modules void main Timer8 WritePeriod 0x63 Timer8 WriteCompareValue 0x00 M8C_EnableGInt Timer8 EnableInt Timer8 Start while 1 16 Bit Timer Sample Firmware Source Code In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based i e zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT types instead of pushing the argument on the stack when it sees the pragma fastcall declarations in the Timer16 h file Document Number 001 13625 Rev E Page 27 of 42 0 Cypress 8 Bit Timer The following is assembly language source that illustrates the use of the APIs Description This sample shows how to capture an event with a bounded time limit A The count resolution is 30 5 us with a bounded time limit of 1 99 7 seconds The interrupt should be set to interrupt on the Compare Less than equal The capture input should be connected to the event that is being measured The clock should be conne
55. P3 2 60 Power Vss Ground connection 42 O M P3 4 61 O IM PO 7 Analog column mux input integration input 1 43 O M P3 6 62 O 10 M PO 5 Analog column mux input and column output integra tion input 2 44 NC No connection 63 O 10 M PO 3 Analog column mux input and column output 45 NC No connection 64 O IM PO 1 Analog column mux input 46 Input XRES Active high pin reset with internal pull 65 O M P2 7 down 47 10 M P4 0 66 O M P2 5 48 10 M P4 2 67 O IM P2 3 Direct switched capacitor block input 49 10 M P4 4 68 O IM P2 1 Direct switched capacitor block input LEGENDA Analog Input O Output NC No Connection M Analog Mux Input These are the ISSP pins which are not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details The center pad on the QFN package should be connected to ground Vss for best mechanical thermal and electrical performance If not connected to ground it should be electrically floated and not connected to any other signal February 15 2007 Document No 38 12018 Rev J 11 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information 1 4 68 Pin Part Pinout On Chip Debug The 68 pin QFN part table and drawing below is for the CY8C24094 On Chip Debug OCD PSoC device Note This part is only used for in circuit debugging It is NOT available for production Table 1 4 68 Pin Part Pinout
56. Parameter Typical Limit Units Conditions and Notes Maximum input frequency 4812 MHz 8 or 16 bit width Vdd 5 0V2 241 MHz 24 or 32 bit width Maximum output frequency 241 MHz Vdd 5 0V and 48 MHZ input clock 123 MHz Vdd 3 3V and 24 MHZ input clock Electrical Characteristics Notes 1 If the input or output is routed through the global buses then the frequency is limited to a maximum of 12 MHz 2 If the timer is used with an active capture function then the input clock frequency limit is 24MHz 3 Fastest clock available to PSoC blocks is 24 MHz at 3 3V operation Placement The Timer consumes one digital PSoC block per 8 bits of resolution When more than one block is allocated all will be placed consecutively by the Device Editor in order of increasing block number from least significant byte LSB to most significant the MSB Each block is given a symbolic name displayed by the device editor during and after placement The API qualifies all register names with user assigned instance name and block name to provide direct access to the Timer registers through the API include files The block names used by the various widths are given in the following table Symbolic PSoC Block Names PSoC Blocks 8 Bit Timer 16 Bit Timer 24 Bit Timer 32 Bit Timer 1 Timer8 TIMER16_LSB TIMER24_LSB TIMER32_LSB 2 TIMER16_MSB TIMER24_ISB TIMER32_ISB1 3 TIMER24_MSB TIMER32_ISB2 4 TIMER32_MSB Parameters and Resources Once a Timer
57. Serial Clock SCL ISSP SCLK M P5 5 4 M 19 Power Vss Ground connection M P5 8 2 M 20 USB D M P5 1 0 M 31 USB D PECERA AANA 22 Power Vdd Supply voltage Ez aa n z z ear Pee goose reese 24 10 P7 0 o a a er arr 25 O M P1 0 12C Serial Data SDA ISSP SDATA 3 a 3 a ae 26 O M P1 2 00 oO o 27 110 M Pi See se 28 10 M Pije See 2 29 O M P5 0 Pin Type ree 30 10 M P52 No Digital Analog Name Description 31 O M P5 4 44 IO M P2 6 External Voltage Reference VREF input 32 O M P5 6 45 IO LM PO O Analog column mux input 33 O M P3 0 46 IO LM PO 2 Analog column mux input 34 O M P3 2 47 IO LM PO 4 Analog column mux input VREF 35 O M P3 4 48 10 LM PO 6 Analog column mux input 36 Input XRES Active high external reset with internal 49 Power Vdd Supply voltage pull down 37 O M P4 0 50 Power Vss Ground connection 38 O M P4 2 51 IO LM PO 7 Analog column mux input 39 O M P4 4 52 10 lO M PO 5 Analog column mux input and column output 40 O M P4 6 53 10 10 M PO 3 Analog column mux input and column output 41 O IM P2 0 Direct switched capacitor block input 54 10 M Po 1 Analog column mux input 42 O IM P2 2 Direct switched capacitor block input 55 10 M P2 7 43 O M P2 4 External Analog Ground AGND input 56 IO M P2 5 LEGEND A Analog Input O Output and M Analog Mux Input These are the ISSP pins which a
58. USBFS LoadInEP 1 abMouseData 3 USB NO TOGGLE while 1 while USBFS bGetEPAckState 1 Wait for ACK before loading data ACK has occurred load the endpoint and toggle the data bit USBFS LoadInEP 1 abMouseData 3 USB TOGGLE a if i 128 When our count hits 128 abMouseData 1 0x05 Start moving the mouse to the right else if i 255 When our counts hits 255 Document Number 001 13629 Rev D Page 12 of 26 E a S37 cypress USBFS Device PERFORM abMouseData 1 OxFB Start moving the mouse to the left i The Assembly code illustrated here shows you how to use the USBFS User Module in a simple HID application Once connected to a PC host the device enumerates as a 3 button mouse When the code is run the mouse cursor zigzags from right to left This code illustrates the how the USBFS Setup Wizard configures the user module r Assembly main line r include m8c inc part specific constants and macros include memory inc Constants amp macros for SMM LMM and Compiler include PSoCAPI inc PSoC API definitions for all User Modules export main area bss RAM inform assembler that variables follow abMouseData blk 3 USBFS data variable i blk 1 count variable area text ROM REL inform assembler that program code follows main OR F 1 Start USBFS Operation using device 0 PUSH
59. User Module has been selected and placed using the Device Editor values may be selected and altered for the following parameters Document Number 001 13625 Rev E Page 5 of 42 cr PRESS 8 Bit Timer Clock The Clock parameter is selected from one of the available sources These sources include the 48 MHz oscillator 5 0V operation only 24V1 24V2 other PSoC blocks and external inputs routed through global inputs and outputs Capture This parameter is selected from one of the available sources A rising edge on this input causes the Count register to be transferred to the Compare register The software capture mechanism will not operate correctly if this parameter is set to a value of one or is held high externally Output The Output parameter may be disabled or routed to one of four global output signals This parameter applies only to the CY8C26 25xxx family of PSoC devices TerminalCountOut The terminal count output is an auxiliary Counter output This parameter allows it to be disabled or connected to any of the row output buses This parameter appears only for members of the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families of PSoC devices CompareOut The compare output may be disabled without interfering with interrupt operations or connected to any of the row output buses It is always available as an input to the next higher digital PSoC block and to the analog column clock selection multiplexers regardless of the setti
60. Vss Ground connection G2 IO M P5 5 B3 IO I M P2 1 Direct switched capacitor block input G3 lO M P3 3 B4 IO IM PO 1 Analog column mux input G4 IO M P1 7 l2C Serial Clock SCL B5 IO I M PO 7 Analog column mux input G5 IO M P1 1 12C Serial Clock SCL ISSP SCLK B6 Power Vdd Supply voltage G6 IO M P1 0 12C Serial Data SDA ISSP SDATA B7 lO I M PO 2 Analog column mux input G7 lO M P1 6 B8 lO I M P2 2 Direct switched capacitor block input G8 lO M P3 4 B9 Power Vss Ground connection G9 lO M P5 6 B10 Power Vss Ground connection G10 lO P7 2 C1 NC No connection H1 NC No connection C2 lO M P4 1 H2 lO M P5 8 C3 10 M P4 7 H3 lO M P3 1 C4 IO M P2 7 H4 lO M P1 5 12C Serial Data SDA C5 IO 10 M PO 5 Analog column mux input and column output H5 1O M P1 3 C6 IO IM PO 6 Analog column mux input H6 IO M P1 2 C7 IO IM PO 0 Analog column mux input H7 lO M P1 4 C8 IO IM P2 0 Direct switched capacitor block input H8 lO M P3 2 cg 10 M P4 2 H9 lO M P5 4 C10 NC No connection H10 lO P7 3 D1 NC No connection Ji Power Vss Ground connection D2 IO M P3 7 J2 Power Vss Ground connection D3 IO M P4 5 J3 USB D D4 10 M P2 5 J4 USB D D5 IO IO M PO 3 Analog column mux input and column output f J5 Power Vdd Supply voltage D6 IO 1 M_ PO 4 Analog co
61. an interrupt on the rising edge of the output signal and the terminal count triggers an interrupt one half clock cycle before the falling edge of the output signal This option is set using the Device Editor Enabling or disabling the interrupt is done at run time using the Counter API Global interrupts must be enabled before the Counter s interrupt fires Care must be taken when modifying the PulseWidth register since its value in conjunction with the current count value determines the PWM s output state To prevent a possible premature low assertion of the output signal and potential glitches the PulseWidth register must be modified after the terminal count condition is detected using the interrupt For applications that require a faster duty cycle update interval the output of the PWM can be routed to a pin where its state is polled Upon the detection of the output transition from high to low the PulseWidth can then be updated Note that if the PulseWidth causes the compare true condition then the output is asserted high on the next clock Acquiring the Count register value must be done very carefully Reading the Count register causes its contents to latch into the PulseWidth register This causes the output duty cycle to change Document Number 001 13581 Rev F Page 3 of 19 0 Cypress 8 Bit Pulse Width Modulator If you need to read the Count register on the fly then the ReadCounter API function can be called This func
62. and assembly language interface files the h and inc files Function Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 0 0 1 Compare Interrupt 0 0 PWM8 Type Type Function Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 Data Invert BCEN 1 Compare Interrupt 0 0 PWM8 Type Type BCEN gates the compare output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the enable input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal or Less Than The InterruptType flag determines whether to trigger the interrupt on the compare event or on the terminal count Both CompareType and InterruptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 PWM8 Enable Clock Enable selects the data input from one of 16 sources Clock selects the clock input from one of 16 sources Both parameters are set in the Device Editor Output Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 CNTR8 0 0 0 0 0 OutEnable OutputSelect Document Number 001 13581 Rev F Page 16 of 19 a pr e Y Cypress 8 Bit Pulse Width Modulator Output Register Bank 1 CY8C29
63. be limited by and subject to the applicable Cypress software license agreement PLANOS Pablo Desviat Cruzado Indice de planos 1 Detector de paso por cer iinin nin O 2 Emisot ira L 3 Fuente Sin transforma dt ccccccccssssssssscsccccccccccsscscscsccscecesesssscsccsseees Z KA Pablo Desviat Cruzado 1 Detector de paso por cero mn ie DRILL Se 2 oc 50 30 ap 10103190 gt AAA SH 5H EN ma Pablo Desviat Cruzado 2 Emisor X10 pay SGECGNE 10 o Se 501209 OLX ZZEZNZ gt a Pablo Desviat Cruzado er 3 Fuente sin transformador be i E F i AGND iNO AG i me i 1 to E LI a 2 PRESUPUESTO Pablo Desviat Cruzado Indice de presupuesto 1 dici Mediciones iaa 2 Preci itari 2 Tecos UDISTIOS c5ss detesessxisesondsasnensesansonnstansonssadeeneecinwesteatesene panacea ial 3 Sumas parciales conan 4 Presupuesto general siscscssssssssscvveswsosssvessscisssssovsvevessvdenssessets sensssnssessisesenssvaee E Pablo Desviat Cruzado E 1 Mediciones En este cap tulo se indican las diferentes partes que integran el proyecto agrupadas en distintas partidas definiendo los presupuestos de cada una de ellas as como el presupuesto total A la hora de detallar los conceptos que se ver n incluidos en el presupuesto final correspondiente al presente
64. call LCD PrString Call function to display string at current LCD cursor position Document Number 001 13569 Rev E Page 4 of 13 a CYPRESS LCD Too Box Parameters sRamsString A pointer to a null terminated string located in RAM Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently the CUR_PP and IDX_PP page pointer registers are modified LCD_PrCString Description Prints a null terminated ROM based character string to the LCD at the present cursor location C Prototype void LCD PrCString const char sRomString Assembly mov A gt sRomString Load MSB part of pointer to ROM based null terminated string Load LSB part of pointer to ROM based null terminated string Call function to display string at current LCD cursor position mov X lt sRomString call LCD PrCString Ne Ne Ne Ne Ne Se Example String Printing Code char str User Module Define RAM based string LCD Start Initialize LCD hardware LCD Position 0 4 Position cursor row 0 col 4 LCD Prostring PsoC LCD Print a constant ROM string LCD Posit
65. character display has 80 possible pixel columns numbered 1 to 80 Solid bar graphs display 1 to N pixel columns within a set of specified continuous characters Line bar graphs display only the specified pixel column Below is an example of both types of horizontal bar graphs Solid Horizontal Bar Graph Line Horizontal Bar Graph Bar Graph Types LCD_InitBG Description Initializes the LCD to display the specified type of horizontal bar graph This function should be called before calling LCD_DrawBG The type of bar graph must be specified This function does not draw a bar graph but loads the custom character RAM with the data required to display the specified type of bar graph This routine must be called to change between horizontal bar graph types LCD_SOLID and LCD_LINE are defined as input constants C Prototype void LCD InitBG BYTE bBGType Assembly mov A LCD SOLID BG call LCD InitBG Parameters BYTE bBGType Type of bar graph specified as one of the following LCD SOLID BG LCD LINE BG Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified
66. cogeneraci n residuos y energ as renovables los costes asociados a la moratoria nuclear los de financiaci n del segundo ciclo de combustible nuclear y los costes del stock estrat gico del combustible nuclear Se cre la figura del Operador del Mercado cuya misi n es la gesti n econ mica del mercado Esta entidad est supervisada por el Comit de Agentes del Mercado que supervisa la casaci n y liquidaci n conoce las incidencias que hayan tenido lugar y propone las reglas de funcionamiento del mercado Tambi n se cre la figura del Operador del Sistema responsable de la gesti n t cnica del mismo esto es de garantizar la continuidad la calidad y la seguridad del suministro Es el encargado de la coordinaci n del sistema de producci n y del sistema de transporte y de su planificaci n 31 Pablo Desviat Cruzado E La planificaci n el ctrica Per odo 2002 11 En los ltimos cinco a os la demanda de electricidad se ha incrementado en m s de un 30 muy por encima de las previsiones Ello ha ido acompa ado de un incremento a n mayor de la demanda punta 44 que es la variable fandamental de cara a determinar las necesidades de infraestructuras el ctricas tanto de generaci n como de transporte y distribuci n En este mismo per odo los precios medios de la electricidad se han reducido un 17 en t rminos corrientes lo que equivale teniendo en cuenta la inflaci n a una disminuci n del 30
67. controlar 256 unidades en total en una instalaci n el ctrica Cada ciclo de corriente alterna tiene un lado positivo y un lado negativo Cada uno de estos lados es capaz de transportar un bit El c digo de inicio 1110 se transmite dentro de 2 ciclos de onda es decir 4 semiciclos cada uno conteniendo un bit C digos Llave Direcci n de unidad A ae E ll Estado ON 14 1 ofa 1 Estado OFF 1 1 1 0 1 Petici n de estado 1 1 1 1 1 Tabla 5 2 C digos de llave C digos de funci n o oo oo oo o o o o o o o o rA a 4 1 1 a 1 1 1 EN 1 a 77 Pablo Desviat Cruzado Los c digos de las tablas 1 y 2 se transmiten de forma diferente Para transmitir un bit es necesario que haya 2 cruces por cero es decir un ciclo de onda Primero se transmite el bit en el lado positivo de la onda y en el lado negativo se transmite el bit complemento Un bloque completo de datos consiste en el c digo de inicio el c digo de casa el c digo llave y el sufijo Cada bloque de datos es enviado dos veces con 3 ciclos de onda entre cada par de bloques de datos Por ejemplo para encender un m dulo X 10 asignado a casa A unidad 2 el siguiente tren de datos debe ser mandado sobre la l nea el ctrica un bit enviado por cada cruce por cero Primero se manda la direcci n dos veces 11
68. de comunicaciones o tecnolog a de uso dom stico integra la conexi n y el control de dispositivos mediante un nico interface dentro el edificio Esta red interna es utilizada para la 48 Pablo Desviat Cruzado lt gt asa transmisi n de la se al a alta velocidad proveyendo soluciones de comunicaci n interna Las Empresas El ctricas espa olas han llevado y est n llevando a cabo varias pruebas t cnicas de campo muy importantes y significativas As ENDESA ha realizado pruebas piloto en Barcelona Julio 2000 25 clientes en Sevilla Noviembre 2000 25 clientes y Santiago de Chile Diciembre 2001 50 clientes Posteriormente ha realizado una Prueba Tecnol gica Masiva en Zaragoza alcanzando hasta 2500 clientes En estas pruebas se han proporcionado servicios de telefon a sobre protocolo de internet IP acceso a alta velocidad a internet y servicios multimedia v deo y audio a la carta y videoconferencia En estas pruebas se han utilizado equipos de tecnolog a suiza ASCOM con velocidades de hasta 3 Mbps y de la espa ola DS2 con velocidades de hasta 20 Mbps En una segunda fase se increment el n mero de clientes a participar en las pruebas piloto IBERDROLA ya ha evaluado de forma satisfactoria los resultados de la primera experiencia realizada en Madrid con dos centenares de clientes que han disfrutado de una velocidad de acceso a internet de 2 Mbps gracias a la tecnolog a de la is
69. de las causas que imped an el desarrollo industrial acelerando la normalizaci n interna una vez superada la etapa de la reconstrucci n 21 Pablo Desviat Cruzado E La d cada de los 60 El Plan de estabilizaci n de 1959 la aparici n del turismo la apertura al exterior etc fueron hechos que dieron pie desde los primeros a os sesenta a una fase de consolidaci n y crecimiento r pido de la econom a espa ola a ritmos muy elevados que conllevaron importantes crecimientos relativos de la demanda el ctrica En estos a os se puso claramente de manifiesto la ventaja que supon a contar con una red interconectada para atender instant neamente a una demanda creciente a un elevado ritmo lo que permiti aumentar sustancialmente la garant a de suministro a los clientes y aprovechar al m ximo la potencia total disponible y a su vez disminuir las important simas inversiones necesarias logrando un abaratamiento de las tarifas A esto tambi n contribuy la reducci n de costes por econom a de escala que supuso el aumento de tama o unitario de los grupos generadores Durante esta d cada se produjo un aumento muy importante de la potencia instalada que pas de 6 567 MW a finales de 1960 a 17 924 a finales de 1970 La producci n el ctrica se triplic alcanz ndose los 56 500 GWh en ese a o 1970 La estructura de generaci n se modific sustancialmente la producci n hidroel ctrica pas de suponer un 84 de
70. desarrollar el proyecto Esta metodolog a se basara principalmente en la descomposici n del proyecto en m dulos m s sencillos por lo que autom ticamente estos pasar n a ser nuestros objetivos Alimentaci n del dispositivo Codificaci n y decodificaci n de se ales X10 Emisi n y recepci n de se ales X10 Conexi n USB Interfaz gr fica para PC Ensamblaje de los distintos m dulos Por otro lado tenemos Aplicar la tecnolog a X 10 para controlar el sistema de iluminaci n de un hogar Entender el funcionamiento del protocolo X 10 Intercomunicar elementos a controlar mediante el cableado de energ a el ctrica de un hogar Desarrollar un sistema central que est a cargo de la gesti n de todos los elementos de control del hogar mediante el uso de una tarjeta de desarrollo PsOC que incluya una conexi n USB con un ordenador personal 10 Pablo Desviat Cruzado E Do 3 Metodolog a Como ya se ha comentado en el apartado anterior se seguir una metodolog a de bloques o m dulos que ser n dise ados y probados por separado de manera que la consecuci n del proyecto sea m s sencilla y los problemas que surjan durante el transcurso de este sean m s f cilmente solucionables Para el m dulo de alimentaci n de codificaci n y decodificaci n de se ales X10 y emisi n y recepci n de se ales X10 se usar n programas tipo CAD para su dise o y prueba Una vez que estos funcion
71. descriptor Subclass No subclass Manufacturer string My company Product string My mouse Serial number string No string Configuration descriptor Configuration Configuration attributes Configuration string No string Max power 100 Device power Bus powered Remote wakeup Disabled Interface descriptor Interface Interface attributes Interface string No string Class HID Subclass No subclass HID class descriptor Descriptor type Report Country code Not supported HID report 3 button mouse Endpoint descriptor ENDPOINT_NAME Endpoint attributes Document Number 001 13629 Rev D Page 15 of 26 E CYPRESS Descriptor Endpoint number Direction Transfer type Interval Max packet size String LANGID String descriptors LANGID String String Descriptor HID report descriptor root HID report descriptor Data INT 10 USBFS My company My mouse USBFS USBFS USB Standard Device Requests This section describes the requests supported by the USBFS user module If a request is not supported the USBFS user module normally responds with a STALL indicating a request error Standard Device Request CLEAR_FEATURE GET_CONFIGURATION GET_DESCRIPTOR GET_INTERFACE GET_STATUS SET_ADDRESS SET_CONFIGURATION SET_DESCRIPTOR USB User Module Support Description Device Interface not supported Endpoint Returns the current device configuration value Returns the specified descriptor Returns the selected alternate interface se
72. foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may
73. gica No cabe duda de que la liberalizaci n de las telecomunicaciones es ya uno de los motores del crecimiento econ mico y de la nueva econom a de servicios basada en la sociedad de la informaci n Tradicionalmente las Empresas Fl ctricas han instalado operado y mantenido redes privadas de telecomunicaci n fundamentalmente para el control u operaci n de la propia red el ctrica El resto de los servicios demandados por las necesidades administrativas y societarias ha estado restringido por la legislaci n a ser prestado por el operador nacional que actuaba en condici n de monopolio natural Este hecho influy en el desarrollo de la infraestructura y en el uso a veces de equipos especializados previstos para estas condiciones de operaci n espec ficas Los medios de transmisi n empleados son muy diversos equipos de ondas portadoras usando los propios cables de energ a cables pilotos cables coaxiales enlaces v a radio fibras pticas sat lites de 45 Pablo Desviat Cruzado comunicaciones enlaces por infrarrojos etc y su utilizaci n ha seguido los dictados de las propias necesidades de cada compa a y la oferta tecnol gica existente en el cada momento En cualquier caso la ruptura de las barreras legales que supone la liberalizaci n de las telecomunicaciones implica la posibilidad de poder usar la capacidad excedente de las redes privadas proporcionada por la digitalizaci n y los avances tecnol g
74. is zero the period of operation and of the output signal is greater by 1 than the value stored in the Period register The following equations relate the output of the PWM to the input clock and the value in the Period register Tour PeriodValue 1 Fcrocg Equation 1 Four Fcrocg PeriodValue 1 Equation 2 Where Foyr is The output frequency of the PWM Toyris the output period of the PWM Fez ock is frequency of the input clock and PeriodValue is the value entered for the period The PWM asserts its output low when stopped While running a comparator controls the duty cycle of the output signal During every clock cycle this comparator tests the values of the Count register against that of the PulseWidth register performing a Less Than or Less Than Or Equal test depending on an option selected using the Device Editor The PWM asserts the active high truth value of the comparison at the rising edge of the clock following the period in which the comparison is made The ratio between the PulseWidth value and the period sets the duty cycle of the output waveform The duty cycle ratio can be computed using this equation Document Number 001 13581 Rev F Page 2 of 19 a BPA Cypress 8 Bit Pulse Width Modulator For PulseWidthValue lt PeriodValue PulseWidthValue PeriodValue 1 DutyCycle Equation 3 PulseWidthValue 1 PeriodValue 1 For Less Than comparison For Less Than Or Equal To comparison For PulseWidthV
75. la dom tica La dom tica se encarga de gestionar los siguientes cuatro aspectos del hogar Energ a el ctrica Se encarga de gestionar el consumo de energ a mediante temporizadores relojes programadores termostatos etc Comodidad La dom tica proporciona una serie de comodidades como pueden ser el control autom tico de los servicios de calefacci n refrigeraci n iluminaci n y la gesti n de elementos como accesos persianas toldos ventanas riego autom tico etc Seguridad La seguridad que proporciona un sistema dom tico es m s amplia que la que puede proporcionar cualquier otro sistema pues integra tres campos de la seguridad que normalmente est n controlados por sistemas distintos 1 Seguridad de los bienes Gesti n del control de acceso y control de presencia as como la simulaci n de presencia Alarmas ante intrusiones 2 Seguridad de las personas Especialmente para las personas mayores y los enfermos Mediante el nodo telef nico se puede tener acceso mediante un pulsador radiofrecuencia que se lleve encima por ejemplo a los servicios de ambulancias polic a etc 3 Incidentes y aver as Mediante sensores se pueden detectar los incendios y las fugas de gas y agua y mediante el nodo telef nico desviar la alarma hacia los bomberos por ejemplo Comunicaciones Este aspecto es imprescindible para acceder a multitud de servicios ofrecidos por los operadores de telec
76. la producci n en 1960 a un 50 en 1970 a pesar de que durante esa d cada se produjo un gran desarrollo del equipo hidroel ctrico Tambi n se increment sustancialmente el equipo y la producci n con fuel oil en un contexto de bajos precios del petr leo En el a o 1968 se incorpor la primera central nuclear la Central Jos Cabrera en Zorita de los Canes Guadalajara Otros hechos significativos para el sector el ctrico en esa d cada fueron la aparici n de un pri mer ensayo planificador en el mbito de la energ a con motivo del Plan de Desarrollo de 1964 y el primer Plan El ctrico Nacional de 1969 22 Pablo Desviat Cruzado zy Do que programaba las instalaciones de generaci n a acometer en los pr ximos a os Durante esta d cada se intensificaron las acciones encaminadas a la electrificaci n rural consigui ndose pr cticamente la universalizaci n del servicio el ctrico en Espa a 23 Pablo Desviat Cruzado E La d cada de los 70 Comenzaba esta d cada con una aparente continuidad respecto a la etapa anterior hasta que en mayo de 1973 se empez a producir una escalada de los precios del petr leo que se multiplicaron casi por seis en menos de un a o Una parte sustancial del parque t rmico puesto en servicio en los a os anteriores utilizaba derivados del petr leo como combustible debido a la estabilidad en precios y su facilidad de utilizaci n hasta esos momentos Dados los l
77. la siguiente Properties PWS PWM8 User Module Version Clock Enable CompareOut TerminalCountO ut Period PulseWidth CompareT ype InterruptT ype ClockSyne InvertEnable Pw 5 YC1 High Row_0_Dutput_0 None 20 10 Less Than Or Equal Terminal Count Sync to SysCik Normal Figura 7 13 Configuraci n PWM8 Clock se elige que reloj se conectar al modulo En este caso se tomo el VC1 que como se vio anteriormente era un reloj de 2 4 Mhz puesto que el reloj de 24 Mhz de la CPU era dividida por 10 funcionando el PWM Enable al ponerlo en High el m dulo estar activado y por tanto CompareOut se dice d nde se quiere que salga el pulso creado por 99 Pablo Desviat Cruzado E asa TerminalCountOut al igual que el anterior se elige d nde se quiere que se de el pulso generado cuando la cuenta del PWM llega a 0 Period Se elige el valor a partir del cual se ir decrementando cada vez que se produzca un ciclo del reloj que se haya seleccionado En este caso como se tomo un reloj de 2 4 Mhz se producira un ciclo de reloj cada 41 microsegundos por lo que como debe decrementar 20 para que se produzca otro pulso tenemos una sefial de 20 41 8 3 microsegundos o lo que es lo mismo 120 Khz la se a que se buscaba PulseWidth con este par metro se elige el periodo de la onda Se
78. los medios materiales Pablo Desviat Cruzado aa 2 Precios unitarios Los precios unitarios de las partidas de los recursos humanos son Concepto Precio hora Estudio y auditoria Horas de ingenier a Elaboraci n de documentaci n Tabla 2 1 Precio unitario de los recursos humanos Los precios unitarios de los materiales son Procesador Intel Core 2 Duo 2 10 Ghz 1200 5 Memoria RAM 2 Gb 940 Disco duro 250 Gb amortizacion Blue ray Disc Drive correspondiente WLAN 802 11 a b g n Tarjeta nVIDIA GeForce 8600 GS GPU 4 Periodo Microsoft Windows Vista Home Premium 32 bits Paquete Office 2003 PSOC Designer Visual Basic Tarjeta PSoC 1 tarjeta EvalUSB Tabla2 2 Precio unitario de los medios materiales No se a aden los precios de los componentes de los circuitos puesto que no se han llegado a montar Pablo Desviat Cruzado 3 Sumas parciales Las sumas parciales de los recursos humanos y de materiales son Concepto Numero de horas Precio hora Precio Total Elaboraci n de documentaci n Tabla 3 1 Sumas parciales de los recursos humanos Precio Total Concepto Precio Gud e PC Procesador Intel Core 2 Duo 1 240 2 2 10 Ghz Memoria RAM 2 Gb Disco duro 250 Gb Blue ray Disc Drive WLAN 802 11 a b g n Tarjeta nVIDIA GeForce 8600 GS GPU Microsoft Windows Vista Home Premium 32 bits Paquete Office 2003 oo eS e Tarjeta PSoC 1 tarjeta E
79. may even be chained in ripple fashion This introduces skew with respect to the system clocks These skews are more critical in the CY8C29 27 24 22 21 xxx and CY8CLED04 08 16 PSoC device families because of various data path optimizations particularly those applied to the system busses This parameter may be used to control clock skew and ensure proper operation when reading and writing PSoC block register values Appropriate values for this parameter must be determined from the following table ClockSync Value Use Sync to SysClk Use this setting for any 24 MHz SysClk derived input clock source less than 24 MHz Exam ples include VC1 VC2 VC3 when VC3 is driven by SysClk 32KHz and digital PSoC blocks with SysClk based sources Externally generated clock sources must also use this value to ensure that proper synchronization occurs Sync to SysClk 2 Use this setting for any 48 MHz SysClk 2 based input clock less than 48 MHz Use SysClk Direct Use when a 24 MHz SysCIk 1 clock is desired This does not actually perform synchroniza tion but provides low skew access to the system clock itself If selected this option overrides the setting of the Clock parameter above It must always be used instead of VC1 VC2 VC3 or digital blocks where the net result of all dividers in combination produces a 24 MHz output Unsynchronized Use when the 48 MHz SysClk 2 input is selected Use when unsynchronized inputs are desired In general this use is ad
80. no guarantee they may do so in the future The following are the API programming routines provided for the LCD User Module Basic LCD Tool Box Functions LCD_Start Description Initializes LCD to use the multi line 4 bit interface This function should be called before all other LCD functions C Prototype void LCD Start void Assembly call LCD Start Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified LCD_Init Description Initializes LCD to use the multi line 4 bit interface This function should be called before all other LCD functions C Prototype void LCD Init void Assembly call LCD Init Document Number 001 13569 Rev E Page 3 of 13 a pe d S37 cypress LCD Too Box Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rentl
81. number from least significant byte LSB to most significant the MSB Each block is given a symbolic name displayed by the Device Editor during and after placement The API qualifies all register names with user assigned instance Document Number 001 13581 Rev F Page 4 of 19 a ZBP Cypress 8 Bit Pulse Width Modulator name and block name to provide direct access to the PWM registers through the API include files The block names used by the various widths are given in the following table PWM Symbolic PSoC Block Names PSoC Blocks 8 Bit PWM 16 Bit PWM 1 PWM8 PWM16_LSB 2 PWM16_MSB Parameters and Resources Clock The Clock parameter is selected from one of 16 sources These sources include the 48 MHz oscillator 5 0V operation only lower frequencies VC1 VC2 and VC3 divided down from the 24 MHz system clock other PSoC blocks and external inputs routed through global inputs and outputs Enable The Enable parameter is selected from one of 16 sources A high input enables continuous count while a low enable disables count without resetting the counter The output is not affected by the state of the enable input signal CompareOut The compare output may be disabled without interfering with interrupt operations or connected to any of the row output busses It is always available as an input to the next higher digital PSoC block and to the analog column clock selection multiplexors regardless of the setting of this
82. o despu s se present el primer reloj autom tico X10 Esta vez se crey necesario asignar un nombre propio al sistema por tanto fue contratada la mejor agencia de publicidad que hab a entonces y se invirti mucho dinero en proponer un nombre El nombre ofrecido fue El Reloj Autom tico Actualmente la compa a X10 desarrolla productos que van m s all del control centralizado dentro del hogar del usuario pueden controlarse equipos desde Internet o con controles PDA Personal Digital Assistant incluso se puede controlar lo que se est viendo en el televisor o saber qui n est llamando a la puerta sin levantarse a verificarlo 39 Pablo Desviat Cruzado 2 4 Programmable System on Chip Al comienzo de un proyecto no siempre es facil encontrar el microcontrolador adecuado para todas y cada una de nuestras necesidades Con frecuencia falta un temporizador un modulador de ancho de pulso o un interfaz Figura 2 6 PSoC Designer Por otra parte a lo largo del proyecto surgen a menudo cambios en las especificaciones por ejemplo I2C en lugar de UART Todo esto puede hacer que el desarrollo no d con el componente adecuado y seleccione un derivado de mayores capacidades para disponer de recursos necesarios en el caso de que se produzcan cambios En este sentido Cypress Semiconductor propone un componente muy interesante el PsoC Programmable System on Chip un sistema programable de se al
83. of File USB descr asm Customize the Code to Define the Report Storage Area To define the report storage area you will write your own transfer descriptor table entries The table contains entries to define storage space for the reqired data items Each transfer descriptor entry in the table creates a new Report ID IDs are numbered consecutively starting with zero Report ID 0 is not used you cannot specify a Report ID of 0 but the transfer descriptor entry specified for the ID O will be used in the case that no Report IDs are present in the Report descriptor For the sake of code effeciency you should use Report IDs in order starting with ID 1 Transfer Descriptor Table Entries Table Entry Required Data Items Description TD_START_TABLE USBFS_NumberOfTableEntries Number of Report IDs defined IDs are numbered consecutively from 0 Report ID 0 is not used TD_ENTRY USBFS_DataSource The data source is RAM or ROM USBFS_DS RAM or USBFS_DS ROM USBFS_TransferSize Size of the data transfer in bytes The first byte is the Report ID USBFS_DataPtr RAM or ROM address of the data transfer USBFS_StatusBlockPtr Address of a status block allocated with the USBFS_XFER_STATUS_BLOCK macro The following example sets up the unused Report ID 0 and two other IN reports with different sizes Note Conditional assembly statements are only necessary if you place the code in the protected user code area of USB_descr asm
84. on capture 4 Start the timer when appropriate Read the Compare register when the interrupt is triggered 6 In the CY8C26 25xxx family if the compare value is greater than the maximum time limit count then an external capture event can be assumed to have occurred and the elapsed time can be computed However if the compare value is equal to or less than the limit bound then it can be inferred that the event did not occur and the maximum time limit has expired o Timing External pins routed to the counter by the global bus feature of the PSoC device can clock the Timer The following figure illustrates the timing for the Timer User Modules Clock Period Reg D M Capture Signal CompareValue Reg N M 2 Start Bit Capture Signal gt Counter Load of Period Counter Reg BS M M 1xM 2 N 1 N XN 1 1 6 0 X M M 1M 2 N 1 N N 1 11 X 0 XM X M 1M 2 M 3 M 4 Compare True Compare False gt Compare True Compare Event gt Terminal Count Period M 1 Duty Cyde 0 5 M 1 Terminal Count Output Timing Diagram Document Number 001 13625 Rev E Page 4 of 42 a CYPRESS 8 Bit Timer AC Electrical Characteristics Timer AC Electrical Characteristics Parameter Typical Limit Units Conditions and Notes Maximum input frequency 4812 MHz Vdd 5 0V2 Maximum output frequency 241 MHz Vdd 5 0V and 48 MHZ input clock 123 MHz Vdd 3 3V and 24 MHz input clock Timer AC Electrical Characteristics
85. para identificar su funci n son los siguientes 57 Pablo Desviat Cruzado Transmisores Estos transmisores env an una se al especialmente codificada de bajo voltaje que es superpuesta sobre el voltaje del cableado Un transmisor es capaz de enviar informaci n hasta 256 dispositivos sobre el cableado el ctrico M ltiples transmisores pueden enviar se ales al mismo m dulo Receptores Como los receptores y transmisores pueden comunicarse con 256 direcciones distintas Cuando se usan con algunos controladores de computadoras estos dispositivos pueden reportar su estado Transmisor Receptor Bidireccionales Estos dispositivos toman la sefia enviada por los dispositivos transmisores Una vez que la se al es recibida el dispositivo responde encendi ndose ON o apag ndose OFF Los receptores generalmente tienen un c digo establecido por el usuario para indicar la direcci n del dispositivo M ltiples dispositivos con el mismo c digo pueden co existir y responder al mismo tiempo dentro de una misma casa Los dispositivos bidireccionales tienen la capacidad de responder y confirmar la correcta realizaci n de una orden lo cual puede ser muy til cuando el sistema X 10 est conectado a un programa de ordenador que muestre los estados en que se encuentra la instalaci n dom tica de la vivienda Este es el caso de este proyecto 58 Pablo Desviat Cruzado E Do Inal mbrico Ina
86. point is used to initiate a Control Read transfer USBFS_DataSource BYTE The data source is RAM or ROM USBFS_DS_ RAM or USBFS_DS_ROM This is necessary since different instructions are used to move the data from the source ROMX or MOV USBFS_TransferSize WORD The number of data bytes to transfer USBFS_DataPtr WORD RAM or ROM address of the data USBFS_StatusBlockPtr WORD Address of a status block allocated with optional the USBFS_XFER_STATUS BLOCK macro USBFS_InitControlWrite This return point is used to initiate a Control Write transfer USBFS_ DataSource BYTE USBFS_DS_RAM the destination for control writes must RAM USBFS_TransferSize WORD Size of the application buffer to receive the data Document Number 001 13629 Rev D Page 22 of 26 S37 cypress USBFS Device Endpoint 0 ISR Return Points continued Return Entry Point Required Data Items Description USBFS_DataPtr WORD RAM address of the application buffer to receive the data USBFS_StatusBlockPtr WORD Address of a status block allocated with optional the USBFS_XFER_STATUS BLOCK macro USB_InitNoDataControlTransfer This return point is used to initiate a No Data Control transfer USBFS_StatusBlockPtr WORD Address of a status block allocated with optional the USBFS_XFER_STATUS BLOCK macro Status Completion Block The status completion block contains two data items a one byte completion status code and a two byte transfer length The ma
87. proyecto se han seguido las premisas que se exponen a continuaci n Los precios de los componentes detallados corresponden al importe pagado en su fecha de compra y pueden no coincidir con el importe de compra en caso de requerirse una reproducci n del proyecto en cuyo caso el presente presupuesto podr ser revisado y actualizado Se incluyen los costes correspondientes al equipo inform tico y al software utilizado en el desarrollo del proyecto El presupuesto final incluye la totalidad de los componentes empleados en el proyecto que constituye el concepto global desarrollado pero la mano de obra incluida se corresponde nicamente con la empleada por el proyectista encargado de la parte del concepto global desarrollada en el presente proyecto Pablo Desviat Cruzado A Las partidas correspondientes a recursos humanos se encuentran a continuaci n en la Tabla 1 1 Concepto N mero de Horas Estudio y auditoria 75 Horas de ingenier a Elaboraci n de 50 documentaci n Tabla 1 1 Medios de los recursos humanos En la Tabla 1 2 se hace referencia a las unidades de cada unos de los materiales que componen el proyecto PC Procesador Intel Core 2 Duo 2 10 Ghz Memoria RAM 2 Gb Disco duro 250 Gb Blue ray Disc Drive WLAN 802 11 a b g n Tarjeta nVIDIA GeForce 8600 GS GPU Microsoft Windows Vista Home Premium 32 bits Paquete Office 2003 Tarjeta PSoC 1 tarjeta EvalUSB Tabla 1 2 Recursos de
88. pulso de la salida TerminalCountOut InvertEnable se elige c mo se quiere que el bloque se active Si est seleccionado Normal el m dulo estar encendido cuando est a nivel alto 103 Pablo Desviat Cruzado E De M dulos LCD y LEDs Estos m dulos se utilizan para dar al usuario una informaci n del estado de las habitaciones Se utilizan cuatro LEDs puesto que se ha asignado uno por habitaci n Su configuraci n es la siguiente Properties LCD LCD User Module LEE Wersion 1 5 LCDPort Port_4 BarGraph Disable Figura 7 17 Configuraci n LCD Properties LED1 Active Low Figura 7 18 Configuraci n LEDs En estos m dulos no hay mucho que comentar acerca de su configuraci n Simplemente se les indica donde quieren conectarse y en el caso de los LEDs como se activan en este caso son activos a nivel bajo 104 Pablo Desviat Cruzado Configuraci n Pines Por ltimo se muestra como se configuraron los pines del microcontrolador Figura 7 19 Configuraci n pines PSoC El puerto 0_0 da la salida del PWM de 120 Khz mientras que el puerto 3 muestra el estado de las habitaciones en los LEDs Las conexiones son las siguientes Figura 7 20 Salida de la se al de PWM y a los LEDs 105 Pablo Desviat Cruzado E De Cap tulo 8 CONEXI N CON EL PC MEDIANTE USB 1 Conceptos Generales Esta secci n cubre la teor a esencial sobre USB
89. software solicited hardware synchronous counter capture operation This function should only be used if the contents of the Compare register must be preserved If the Compare register con tents do not need to be preserved then using the ReadTimer function is preferred Note that this API routine used to be called ReadCounter C Prototype void Timer24 ReadTimerSaveCV DWORD pdwCount Assembly mov X pdwCount move address of return value into X call Timer24 ReadTimerSaveCv Document Number 001 13625 Rev E Page 20 of 42 cr PRESS 8 Bit Timer Parameters None Return Value Count register contents Returned in specified buffer Side Effects In order to read the value of the Count register its value must be momentarily transferred to the Com pare register before it can be returned This causes the compare condition to become true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned to the caller and even before it has restored the Compare register to its previous state Interrupts are momentarily disabled Finally in order to restore the Compare register the user module itself is tempo rarily disabled This may cause the Count register to miss one or more coun
90. son las m s de 300 notas de aplicaci n Application Notes que pueden descargarse en la web Normalmente no solo se trata de archivos PDF sino que tambi n se suministran archivos completos y ejecutables de proyectos junto con la configuraci n y el c digo en lenguaje C o en lenguaje ensamblador Esto proporciona al usuario una buena base sobre la que podr efectuar posteriormente las modificaciones que desee 44 Pablo Desviat Cruzado E 5 Estudio de las tecnolog as existentes en Espa a El Sector El ctrico espa ol se encuentra en un proceso de r pida evoluci n tanto en las estructuras de capital de las Empresas El ctricas como en el marco regulatorio lo que ha introducido planteamientos totalmente innovadores en su funcionamiento con el prop sito de fomentar la competencia entre las empresas Esta liberalizaci n del Sector El ctrico empuja a las empresas del sector a buscar nuevas oportunidades de negocio para compensar las p rdidas de cuotas del mercado El Sector de las Telecomunicaciones se encuentra tambi n en un proceso de cambio acelerado pasando en pocos a os de una situaci n de monopolio a otra de amplia liberalizaci n La creciente orientaci n de las pol ticas econ micas hacia la satisfacci n de las demandas y necesidades de los usuarios justifica la introducci n de la competencia en un sector tan complejo y variado como el de las telecomunicaciones en constante y r pida evoluci n tecnol
91. soporte f sico y la velocidad de comunicaciones un sistema dom tico se caracteriza por el protocolo de comunicaciones que utiliza que no es otra cosa que el idioma o formato de los mensajes que los diferentes elementos de control del sistema deben utilizar para entenderse unos con otros y que puedan intercambiar su informaci n de una manera coherente Dentro de los protocolos existentes se puede realizar una primera clasificaci n atendiendo a su estandarizaci n Protocolos est ndar Los protocolos est ndar son los utilizados ampliamente por diferentes empresas y stas fabrican productos que son compatibles entre s como son el X10 el EHS el EIB y el BatiBus Protocolos propietarios Son aquellos que desarrollados por una empresa solo son capaces de comunicarse entre s 74 Pablo Desviat Cruzado E Do Capitulo 5 EL PROTOCOLO X 10 1 Estudio te rico El protocolo X 10 se comunica entre transmisores y receptores mediante el env o y recepci n de se ales sobre el cableado de alimentaci n el ctrica de un hogar Estas transmisiones est n sincronizadas al punto de cruce por cero de la l nea de corriente alterna El objetivo es transmitir lo m s cerca posible del punto de cruce por cero en un intervalo de 300 microsegundos Se decidi sincronizar el env o de informaci n cuando ocurre el cruce por cero porque en ese instante el ruido en la l nea es menor y es m s f cil amplificar la se al
92. the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_Stop Description Stops the Timer32 operation C Prototype void Timer32 Stop void Assembly call Timer32 Stop Parameters None Return Value None Side Effects The output will be set low and subsequent writes to the Period register will cause the Count register to update with the new period value The A and X registers may be modified by this or future implementa tions of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_WritePeriod Description Writes the Period register with the period value The period will be loaded into the Count register when the zero count condition is reached or immediately if the Timer32 is currently stopped Document Number 001 13625 Rev E Page 23 of 42 am PX oe Y Cypress 8 Bit Timer C Prototype void Timer32 WritePeriod DWORD dwPeriod Assembly mov X dwPeriod move address of period value into X call Timer32 WritePeriod Parameters dwPeriod The value is from 0 to 232 1 Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in
93. the system buses This parameter may be used to control clock skew and ensure proper operation when reading and writing PSoC block register values Appropriate values for this parameter should be determined from the following table ClockSync Value Use Sync to SysClk Use this setting for any 24 MHz SysClk derived clock source that is divided by two or more Examples include VC1 VC2 VC3 when VC3 is driven by SysClk 32KHz and digital PSoC blocks with SysClk based sources Externally generated clock sources should also use this value to ensure that proper synchronization occurs Sync to SysClk 2 Use this setting for any 48 MHz SysClk 2 based clock unless the resulting frequency is 48 MHz in other words when the product of all divisors is 1 Use SysClk Direct Use when a 24 MHz SysClk 1 clock is desired This does not actually perform synchroniza tion but provides low skew access to the system clock itself If selected this option overrides the setting of the Clock parameter above It should always be used instead of VC1 VC2 VC3 or digital Blocks where the net result of all dividers in combination produces a 24 MHz output Unsynchronized Use when the 48 MHz SysClk 2 input is selected Use when unsynchronized inputs are desired In general this use is advisable only when interrupt generation is the sole application of the Counter TC_PulseWidth This parameter provides the means of specifying whether the terminal count output pu
94. to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges PSoC Designer Programmable System on Chip and PSoC Express are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRAN
95. 0 Bit 7 6 5 4 3 2 1 0 MSB Count MSB ISB Count ISB LSB Count LSB The Count register is the 24 bit down count value decremented by 1 in every clock cycle that the enable input is active Its value is loaded from the contents of the Period register in the clock cycle following the terminal count zero value It can be read using the Timer24 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Period MSB ISB Period ISB LSB Period LSB The Period register is a write only register that can be set through the Device Editor and by the Timer24 API When written the value is transferred to the Count register if the user module is disabled through the API Its value is automatically copied into the Count register in the clock cycle following terminal count Compare Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Compare Val MSB ISB Compare Val ISB LSB Compare Val LSB The Compare register holds the value against which the Count register is tested in order to generate the compare output It can be set by the Device Editor and the Timer24 API Document Number 001 13625 Rev E Page 39 of 42 CYPRESS 8 Bit Timer Control Register CR0 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 0 0 0 ISB 0 0 0 0 0 0 0 0 LSB 0 0 0 0 0 0 0 Enable Enable indicates that the Timer24 is enabled when set and disabled when clear It is modified by using the Timer24 API 32 Bit Timer Configuration Registers The 32 bit Ti
96. 0 0 0 0 0 ISB1 0 0 0 0 0 0 0 0 LSB 0 0 0 0 0 0 0 Enable Enable indicates that the Timer32 is enabled when set and disabled when clear It is modified by using the Timer32 API Document Number 001 13625 Rev E Revised June 16 2009 Page 42 of 42 Cypress Semiconductor Corporation 2000 2009 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life support life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges PSoC Designer and Programmable System on Chip are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Any Source Code software and or firmware is owned by C
97. 0 70 0 028 MAX 0 25 0 009 MIN 0 80 0 031 DIA 0 2 0 008 REF _ _0 18 0 007 poe om 1 ce 7 N Y FP e EE Du 4 Une 5 69 7 90 0 311 8 10 0 319 7 70 0 303 7 80 0 307 6 50 0 255 REF ANANANANANA J 0 24 0 009 0 400 015 0 60 0 023 0 50 0 020 0 4 B S C ING 5 50 0 255 REF NOTES 1 88 HATCH IS SOLDERABLE EXPOSED PAD 2 REFERENCE JEDEC MO 220 3 PACKAGE WEIGHT 0 17g NOTE EXPOSED PAD DIMENSION VARIES BY LEADFRAME CAVITY PADDLE SIZE 4 ALL DIMENSIONS ARE IN MM MIN MAX 5 PACKAGE CODE PART DESCRIPTION LF68 STANDARD 51 85214 C PB FREE Important Note For information on the preferred dimensions for mounting QFN packages see the following Application Note at http www amkor com products notes_papers MLFAppNote paf Important Note Pinned vias for thermal conduction are not required for the low power PSoC device February 15 2007 Document No 38 12018 Rev J 40 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 4 Packaging Information TOP VIEW A1 CORNER 12345676910 Figure 4 3 100 Ball 6x6 mm VFBGA 20 15 ajo a 0 30 0 05 100X BOTTOM VIEW A1 CORNER 43 A B o C z D La E E a 6 G H J K 6 00 0 10 0 45 REF 70 10 e 0 21 REF j SEATING PLANE SEATING PLANE 16 00t0 25 SQ 14 00 0 05 SO
98. 10 01101001 10101001 Inicio Casa A Unidad 2 1110 01101001 10101001 Inicio Casa A Unidad 2 Despu s se esperan 3 ciclos de onda 000000 Entonces se manda el comando dos veces 1110 01101001 01011001 Inicio Casa A ON 1110 01101001 01011001 Inicio Casa A ON 01 Sufijo Ol Sufijo 10 Sufijo 10 Sufijo Por ltimo se esperan 3 ciclos de onda antes de mandar otro bloque 78 Pablo Desviat Cruzado E aa Hay excepciones en este m todo por ejemplo los c digos de reducir o aumentar iluminaci n no requieren la espera de 3 ciclos de onda entre comandos del mismo tipo simplemente se env an consecutivamente 0110 1100 Inicio Casa A Unidad 2 Figura 5 2 Trama de X10 Por ultimo y sin entrar en mayores detalles ya que no es el objetivo de este se puede concluir este estudio sobre el X10 indicando que el protocolo posee una tasa de envio de datos de 20 bit s Es facil deducir que con una velocidad tan lenta la tecnolog a X10 est destinada simplemente a transmitir comandos del tipo encendido apagado 79 Pablo Desviat Cruzado E 2 Razones de la elecci n Las razones por las que X10 fue elegida son las siguientes En primer lugar est n los requisitos de conectividad rapidez y alcance Son condiciones que se han de cumplir imprescindiblemente X10 tiene ofrece un tiempo de respuesta peque o y posee un alcance te rico de decenas de metros ya que est pens
99. 16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_ReadCompare Value Description Reads the Timer32 Compare registers using pass by reference parameter C Prototype void Timer32 ReadCompareValue DWORD pdwCompareValue Assembly mov X pdwCompareValue move address of return value into X Document Number 001 13625 Rev E Page 24 of 42 cr PRESS 8 Bit Timer call Timer32 ReadCompareValue Parameters pdwCompareValue Pointer to a buffer to hold the Compare register data The X register is loaded with the ram address where the return value is to be stored Return Value The value of the Compare register is returned in specified buffer Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Currently only the IDX_PP page pointer register is modified FUNCTION Timer32_ReadTimerSaveCV Description Reads the current Timer32 Count register value while preserving the Compare registers This per forms a software solicited hardware synchronous counter capture operation This function should only be used if the contents of the Compare register must be pres
100. 2 Clock se elige el reloj que usar el m dulo En este caso se ha Capture si est activo se permite pasar el registro de cuenta al Pablo Desviat Cruzado T TerminalCountOut permite seleccionar d nde se quiere que de un pulso cunado la cuenta del timer llegue a cero CompareOut permite seleccionar d nde se quiere que de un pulso cuando se cumpla la comparaci n Period se elige a partir de que n mero el timer empezar a descontar cada ciclo del reloj seleccionado CompareValue se dice con qu calor se comparar el valor del la cuenta que va decrementando el timer CompareType se le da la condici n de comparaci n InterruptType se elige como se quiere que sea la interrupci n qu de este m dulo En este caso se ha elegido Compare True por lo que da una interrupci n cada vez que la comparaci n sea cierta Como el tipo de comparaci n elegida ha sido Less Than la interrupci n saltar cuando el timer llegue a 1 por lo que se decrementar 10 veces desde el 9 y como esto sucede cada 0 1 milisegundos se tiene una interrupci n cada 1 milisegundo Luego por software se contar 10 veces para tener los 10 milisegundos que simbolizar n el paso por cero de la se al de alterna ClockSync se elige el sincronismo del m dulo en funci n del reloj utilizado TC_PulseWidth se elige el ancho del
101. 2 Pin Type far N D 30 10 P711 No Digital Analog gt escripton 31 O P7 0 50 O M P4 6 32 O M P1 0 12C Serial Data SDA ISSP SDATA 51 O IM P2 0 Direct switched capacitor block input 33 O M P1 2 52 O IM P2 2 Direct switched capacitor block input 34 O M P1 4 Optional External Clock Input EXT 53 O M P2 4 External Analog Ground AGND input CLK 35 O M P1 6 54 10 M P2 6 External Voltage Reference VREF input 36 O M P5 0 55 O IM POo 0 Analog column mux input 37 O M P5 2 56 O IM Po 2 Analog column mux input and column output 38 O M P5 4 57 O 11M PO 4 Analog column mux input and column output 39 O M P5 6 58 O IM PO 6 Analog column mux input 40 O M P3 0 59 Power Vdd Supply voltage 41 O M P3 2 60 Power Vss Ground connection 42 O M P3 4 61 O IM PO 7 Analog column mux input integration input 1 43 O M P3 6 62 O 10 M PO 5 Analog column mux input and column output integra tion input 2 44 HCLK OCD high speed clock output 63 O 10 M PO 3 Analog column mux input and column output 45 CCLK OCD CPU clock output 64 O IM Po 1 Analog column mux input 46 Input XRES Active high pin reset with internal pull 65 O M P2 7 down 47 10 M P4 0 66 O M P2 5 48 IO M P4 2 67 O IM P2 8 Direct switched capacitor block input 49 10 M P4 4 68 O IM P2 1 Direct switched capacitor block input LEGENDA Analog Input O Output M Analog Mux Input OCD On Chip Debu
102. 2 DC General Purpose lO Specific zi 24 3 3 3 DC Full Speed USB Specifications 24 3 3 4 DC Operational Amplifier Specifications 25 3 3 5 DC Low Power Comparator Specifications 26 3 3 6 DC Analog Output Buffer Specifications 27 3 3 7 DC Analog Reference Specifications 3 3 8 DC Analog PSoC Block Specifications 3 3 9 DC POR and LVD Specifications 0 00 eects 3 3 10 DC Programming Specifications 00 3 4 AC Electrical Characteristics 3 4 1 AC Chip Level Specifications 3 4 2 AC General Purpose lO Specifications 3 4 3 AC Full Speed USB Specifications 3 4 4 AC Operational Amplifier Specifications 3 4 5 AC Low Power Comparator Specifications 3 4 6 AC Digital Block Specifications 35 3 4 7 AC External Clock Specifications 3 4 8 AC Analog Output Buffer Specificatio 3 4 9 AC Programming Specifications 3 4 10 AC l2C Specifications ccommmmrm 38 Packaging Information 4 1 Packaging Dimensions 3 Be Thermal APOC An sonic eieae rasei Es 4 3 Solder Reflow Peak Temperature 0 0 00 cece ee eet teeeeeee 42 Development Tool Selection 5 1 Software 5 1 1 PSoC Designer 5 1 2 PSoC Express 5 1 3 PSoC Programmer 5 1 4 CY3202 C iMAGEcraft C Compiler 5 2 Development Kits cesses 5 2 1 CY3215 DK Basic Development Kit 5 2 2 CY3210 ExpressDK Development Kit 53 Evaluation Tools excise ccciccsccnrsicasn
103. 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 CNTR8 AuxClk AuxEnable AuxSelect OutEnable OutputSelect The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and OutSelect bit fields AuxEnable and AuxSelect permit driving the terminal count output signal onto one of the row output busses and are controlled by manipulating the row bus graphically in the Device Editor Interconnect View OutEnable is set when the compare output is driven onto one of the row or global output busses OutputSelect controls which of the busses are driven from the compare output Count Register DRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 PWM8 Count Count is the PWM8 down counter It can be read using the PWM8 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 PWM8 Period Period holds the period value that is loaded into the Counter register upon enable or terminal count condition It can be set in the Device Editor and the PWM8 API Compare Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 PWM8 PulseWidth PulseWidth holds the pulse width value used to generate the output It can be set in the Device Editor and the PWM8 API Control Register CRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 PWM8 0 0 0 0 0 0 0 Start Start indicates that the PWM68 is enabled when set It is modified by using the PWM8 API 16
104. 27 26 25 24 22 21xxx CY8C23x33 CY7C603xx 64215 CYWUSB6953 CY8C20x34 CY8CLED02 04 08 16 CY8CNP102 CY8C21x45 CY8C22x45 CY8C28x45 CY8CPLC20 CY8CLED16P01 CY8C28xxx Bar Graph Enabled 0 0 0 646 0 7 from One Port Bar Graph Disabled 0 0 0 434 0 7 from One Port For one or more fully configured functional example projects that use this user module go to www cypress com psocexampleprojects Features and Overview e Uses the industry standard Hitachi HD44780 LCD display driver chip protocol e Requires only seven I O pins e Routines provided to print RAM or ROM strings e Routines provided to print numbers e Routines provided to display horizontal and vertical bar graphs e Uses a single I O port The LCD Tool Box User Module is a set of library routines that writes text strings and formatted numbers to a common two or four line LCD module Vertical and horizontal bar graphs are supported using the character graphics feature of these LCD modules This module was developed specifically for the industry standard Hitachi HD44780 two line by 16 character LCD display driver chip but works for many other four line displays This library uses the 4 bit interface mode to limit the number of I O pins required E go a zzz 25 ON us P Er Sg gt R LCD to PSoC Block Diagram Cypress Semiconductor Corporation 198 Champion Court San Jose CA 95134 1709 408 943 2600 Document Number 001 13569 Rev E Revised June 15 2009
105. 3625 Rev E Page 17 of 42 cr PRESS 8 Bit Timer Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_Disableint Description Disables the interrupt mode operation C Prototype void Timer24 Disablelnt void Assembly call Timer24 Disablelnt Parameters None Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_Start Description Starts the Timer24 operation The Count register will be decremented on the next clock cycle C Prototype void Timer24 Start void Assembly call Timer24 Start Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this fu
106. 38 O M P4 2 O M PO 7 Analog column mux input 39 O M P4 4 O 10 M PO 5 Analog column mux input and column output 40 O M P4 6 O 10 M PO 3 Analog column mux input and column output 41 O IM P2 0 Direct switched capacitor block input O M POf1 Analog column mux input 42 O IM P2 2 Direct switched capacitor block input O M P2 7 43 O M P2 4 External Analog Ground AGND input O M P2 5 February 15 2007 Document No 38 12018 Rev J 9 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information 1 2 56 Pin Part Pinout with XRES Table 1 2 56 Pin Part Pinout QFN Pin Type Mamo Deserpilon CY8C24894 56 Pin PSoC Device No Digital Analog 1 O IM P2 8 Direct switched capacitor block input 2 O IM P2 1 Direct switched capacitor block input 3 O M P4 7 4 O M P4 5 5 O M P4 3 6 O M P4 1 7 10 M__ P3 7 A M P28 1 21 A 8 O M P3 5 AI M P2 1 2 0 A 9 O M P3 3 M P4 7 3 6 M 10 O M P3 1 M P4 5 4 4 M 11 O M P5 7 M Pa s a5 21 M 12 10 M P5I5 M Part b6 0 M 13 O M P5 3 M P3 7 7 QFN ES 14 O M P54 M P3 5 P8 Top View 4 M 15 O M P1 7 12C Serial Clock SCL M P3 3 2 M 16 O M P1 5 12C Serial Data SDA M P3 1 0 M 17 O M P1 3 M P5 7 6 M 18 O M P1 1 12C
107. 4 48 4 57 M VLvD5 VM 2 0 101b 4 55 4 64 4 740 y Vivos VM 2 0 110b 4 63 4 73 4 82 y Vwo VM 2 0 111b 4 72 4 81 4 91 y a Always greater than 50 mV above PPOR PORLEV 00 for falling supply b Always greater than 50 mV above PPOR PORLEV 10 for falling supply February 15 2007 Document No 38 12018 Rev J 29 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 3 10 DC Programming Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 16 DC Programming Specifications Symbol Description Min Typ Max Units Notes Ippp Supply Current During Programming or Verify 15 30 mA Vip Input Low Voltage During Programming or Verify 0 8 V ViHP Input High Voltage During Programming or Verify 2 1 V liLp Input Current when Applying Vilp to P1 0 or P1 1 During 0 2 mA Driving internal pull down resistor Programming or Verify hp Input Current when Applying Vihp to P1 0 or P1 1 During 15 mA Driving internal pull down resistor Programming or Verify VoLv Output Low Voltage During Programming or Verify Vss 0 75 V VoHv Output High Voltage D
108. 4094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information 1 6 100 Ball VFBGA Part Pinout On Chip Debug The 100 pin VFBGA part table and drawing below is for the CY8C24094 On Chip Debug OCD PSoC device Note This part is only used for in circuit debugging It is NOT available for production Table 1 6 100 Ball Part Pinout VFBGA 2 D E dD Ri 8 E Name Description Pin E 3 Name Description On e No 2 a lt a lt Al Power Vss Ground connection F1 OCDE OCD even data lO A2 Power Vss Ground connection F2 IO M P5 7 A3 NC No connection F3 lO M P3 5 A4 NC No connection F4 IO M P5 1 A5 NC No connection F5 Power Vss Ground connection A6 Power Vdd Supply voltage F6 Power Vss Ground connection A7 NC No connection F7 lO M P5 0 A8 NC No connection F8 IO M P3 0 A9 Power Vss Ground connection F9 XRES Active high pin reset with internal pull down A10 Power Vss Ground connection F10 lO P7 1 B1 Power Vss Ground connection G1 OCDO OCD odd data output B2 Power Vss Ground connection G2 IO M P5 5 B3 IO IM P2 1 Direct switched capacitor block input G3 1O M P3 3 B4 IO IM PO 1 Analog column mux input G4 1O M Pi 7 12C Seria
109. 42 aan cr PRESS 8 Bit Timer FUNCTION Timer8_Stop Description Stops the Timer8 operation C Prototype void Timer8 Stop void Assembly call Timer8 Stop Parameters None Return Value None Side Effects The output will be set low and subsequent writes to the Period register will cause the Count register to update with the new period value The A and X registers may be modified by this or future implementa tions of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_WritePeriod Description Writes the Period register with the period value The period will be loaded into the Count register when the zero count condition is reached or immediately if the Timer8 is currently stopped C Prototype void Timer8 WritePeriod BYTE bPeriod Assembly mov A bPeriod call Timer8 WritePeriod Parameters bPeriod A value between 0 and 255 to set the Timer8 period It is passed in the Accumulator Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values acros
110. 46 NC No connection 96 NC No connection 47 NC No connection 97 lO IO M PO 5 Analog column mux input and column output 48 lO P1 0 Crystal XTALout 12C Serial Data SDA 98 NC No connection ISSP SDATA 49 lO P1 2 99 IO IO M PO 3 Analog column mux input and column output 50 lO P1 4 Optional External Clock Input EXTCLK 100 NC No connection LEGEND A Analog Input O Output NC No Connection M Analog Mux Input OCD On Chip Debugger These are the ISSP pins which are not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details February 15 2007 Document No 38 12018 Rev J 17 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information CY8C24094 OCD lt Ed lt Eq lt x lt gt gt gt ao pb E os YE R 0S05S0o0s0o00o00v0o0oo0ooo0RoOBSs0o0sS09290 ZO0Z0Z0Z 2222222 22 gt 25 gt 0 202082 NC f NC 74 M Al Al M PO 1 73 M P2 7 72 M External VREF M P2 5 71 Al M P2 3 70 M External AGND Al M P2 1 69 M Al M P4 7 68 M Al M P4 5 67 M M P4 3 66 M M P4 1 65 OCDE 64 M OCDO 63 M NC e Vss 61 M P3 7 60 M P3 5 59 M M P3 3 58 M M P3 1 57 M M P5 7 56 M M P5 5 5 M M P5 3 54 M M P5 1 53 M 12C SCL P1 7 52 M ne 28 M OORT TO g BROPBYIAN2S2000073 RSs 222255 2608 Seer a f aoe aaraa tan gt gt oi x Q QO Q N 1 n o o o N g N Not for Prod
111. 5 5 M P3 5 el 9 QFN 43 la P3 6 M 14 O M P5 3 M P3 3 10 Top View 42 la P3 4 M M P3 1 11 41 la P3 2 M 15 O M P5 1 M P5 7 12 40 P3 0 M 16 O M P1 7 12C Serial Clock SCL M P5 5 13 39 f P5 6 M 17 O M P1 5 12C Serial Data SDA a acl 14 38 f P5 4 M PS t 15 37 P52 M 18 o M P1 3 12C SCL M P1 7 16 36 la P5 0 M 19 O M P1 1 12C Serial Clock SCL ISSP SCLk 12C SDA M P1 5 17 35 a P1 6 M 20 Power Vss Ground connection CAPRANNANAN AIZ DDRS Toerrrerrrertrertraenren 21 USB D eb tae pea Bog apaspbeeysrtoanreaas 22 USB D na ZELAA 23 Power Vdd Supply voltage gt 24 O P7 7 3 N n 25 O P7 6 g Q 26 O P7 5 2 27 O P7 4 28 O P7 3 29 O P7 2 Pin Type T N D 30 10 P711 No Digital Analog al a 31 O P7 0 50 O M P4 6 32 O M P1 0 12C Serial Data SDA ISSP SDATA 51 O IM P2 0 Direct switched capacitor block input 33 O M P1 2 52 O IM P2 2 Direct switched capacitor block input 34 O M P1 4 Optional External Clock Input EXT 53 O M P2 4 External Analog Ground AGND input CLK 35 O M P1 6 54 10 M P2 6 External Voltage Reference VREF input 36 O M P5 0 55 O IM PO 0 Analog column mux input 37 O M P5 2 56 O IM Po 2 Analog column mux input and column output 38 O M P5 4 57 O IM_ PO 4 Analog column mux input and column output 39 O M P5 6 58 O IM PO 6 Analog column mux input 40 O M P3 0 59 Power Vdd Supply voltage 41 O M
112. 6 Figura 5 1 X10 y se al Senoidal cional aaa 75 Fipura 5 2 trama de Usa id dia 79 Fig ra6 CAGE aroe iieii ii a a eaae ARE uaa ints Ee ESE 82 Figura 6 2 Componentes CY8C24894 s s essssessssssesesesesssseseseninsesesesesesnenese 82 Fig ra 6 3 Tarjeta PsoCEValUSD 0 soiin aa 84 Figura Ll Funciones AU daga 85 Figura 7 2 Esquema detector de Ost 87 Figura 7 3 Simulaci n detector de cero iia ss 88 Figura 7 4 Ampliaci n simulaci n detector de cero ococicocicicnonnncnnnninncnananoso 88 Figura 7 5 Detector de cero Montado ada 89 Figura 7 6 Detector de cero osciloscopio viii init sn ci cis 89 Figura 7 Sena T20 KHZ a 91 Figura 7 8 Circuito emisor AO ivi A RA 92 Figura 7 9 Esquema fuente 5V sin transformador s s ssssssssesessesieresreresesses 93 Fig ra 7 10 Bl guesen P50 Ci usarse ii 96 Figura 7 11 Recursos generales iii oa 97 Figura 7 12 M dulo PWIMB cccoirinsiinesadi dado 99 Figura 7 13 Configuraci n PWV INI icc tad do 99 Figura 7 A Se al 120 KZ ia 100 Hisura7 15 M dulo Tiere ventana naaa aan 102 Figura 7 16 Configuraci n TiMEt eiii dt 102 Figura 7 17 Configuraci n LCD usina id 104 Figura 7 18 Configuraci n LEDS id a 104 Figura 7 19 Configuraci n pines PS0C ication lane dae 105 Figura 7 20 Salida de la se al de PWM y alos LEDS cee 105 Figura 8 1 Paquetes de datos manejados por el CY8C24894 0 107 Figura 8 2 Vista de software de una conexi n USB oonocicicicncncncnnnnnnncnananoso 108
113. 6_wReadTimerSaveCV Description Reads the current Timer16 Count register value while preserving the Compare registers This per forms a software solicited hardware synchronous counter capture operation This function should only be used if the contents of the Compare register must be preserved If the Compare register con tents do not need to be preserved then using the wReadTimer function is preferred Note that this API routine used to be called wReadCounter C Prototype WORD Timerl6 wReadTimerSaveCV void Assembly call Timerl6 wReadTimerSaveCv mov wCount X MSB returned in X mov wCount 1 A LSB returned in A Parameters None Return Value wCount Count register contents MSB is passed in the X register and LSB is passed in the Accumula tor Side Effects In order to read the value of the Count register its value must be momentarily transferred to the Com pare register before it can be returned This causes the compare condition to become true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned to the caller and even before it has restored the Compare register to its previous state Interrupts are momentarily disabled Finally in ord
114. 80 of AV to 0 1 of AV 10 pF load Unity Gain Power Low Opamp Bias Low 3 92 us Power Medium Opamp Bias High 0 72 us Tsoa Falling Settling Time from 20 of AV to 0 1 of AV 10 pF load Unity Gain Power Low Opamp Bias Low 5 41 us Power Medium Opamp Bias High 0 72 us SRroa Rising Slew Rate 20 to 80 10 pF load Unity Gain Power Low Opamp Bias Low 0 31 V us Power Medium Opamp Bias High 2 7 V us SRroa Falling Slew Rate 20 to 80 10 pF load Unity Gain Power Low Opamp Bias Low 0 24 V us Power Medium Opamp Bias High 1 8 V us BWoa Gain Bandwidth Product Power Low Opamp Bias Low 0 67 MHz Power Medium Opamp Bias High 2 8 MHz Enoa Noise at 1 kHz Power Medium Opamp Bias High gt 100 nV rt Hz February 15 2007 Document No 38 12018 Rev J 33 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications When bypassed by a capacitor on P2 4 the noise of the analog ground signal distributed to each block is reduced by a factor of up to 5 14 dB This is at frequencies above the corner frequency defined by the on chip 8 1k resistance and the external capacitor Figure 3 4 Typical AGND Noise with P2 4 Bypass dBV rtHz 10000 1000 0 001 0 01 0 1 Freq kHz 1 10 100 At low frequencies the opamp noise is proportional to 1 f power independent
115. 9 0x3E7 call PWM16 WritePeriod mov A 4ch set PulseWidth to generate a 33 duty cycle mov X Olh Pulse Width 1000 3 1 332 0x14C call PWM16 WritePulseWidth call PWM16 Disablelnt ensure that interrupts are disabled call PWM16 Start start the PWM16 counter will start to ret count when th nable input is asserted high The same code in C is as follows include the Counterl6 API header file include PWM16 h function prototype void GenerateOneThirdDutyCycle void Divide by eight function void GenerateOneThirdDutyCycle void set period to eight clocks PWM16 WritePeriod 999 set pulse width to generate a 33 duty cycle PWM16 WritePulseWidth 332 ensure interrupt is disabled PWM16 DisableInt start the PWM16 Document Number 001 13581 Rev F Page 15 of 19 a BPA Cypress 8 Bit Pulse Width Modulator PWM16 Start Configuration Registers Except where noted the register specifications given in this section apply to all PSoC device families 8 Bit PWM Configuration Registers The 8 bit PWM uses a single digital PSoC block named PWMB8 Each block is personalized and parameterized through 7 registers The following tables give the personality values as constants and the parameters as named bit fields with brief descriptions Symbolic names for these registers are defined in the user module instance s C
116. 976 y 1 978 se desarroll la tecnolog a X 10 en Glenrothes Escocia por ingenieros de la empresa Pico Electronics Ltd en la actualidad se distribuye X 10 en los cinco continentes siendo su principal mercado USA Durante los ltimos 15 a os se han vendido m s de 150 millones de equipos X 10 Desde que empez su comercializaci n en 1 978 millones de instalaciones en todo el mundo avalan este sistema t cnicamente conocido por Power Line Carrier su fancionamiento se basa en la utilizaci n de la red el ctrica existente en cualquier tipo de edificio ya sea casa u oficina como medio f sico para la comunicaci n interna de los distintos componentes del sistema dom tico Sus m s de 25 a os de experiencia con millares de instalaciones realizadas en Espa a la multitud de fabricantes que asegura una amplia gama de productos continuidad de la tecnolog a y el importante hecho de no tener que realizar obras de infraestructura para cableados especiales son suficientes motivos para que se recomiende este hermano menor de la dom tica para apartamentos oficinas y locales tanto de nueva como de antigua construcci n Pero adem s combinando m ltiples productos de dilatada y probada experiencia se puede lograr un sistema dom tico de altas prestaciones y baja inversi n Su instalaci n y configuraci n es tan sencilla que el propio usuario puede configurar las aplicaciones que desee en cada momento entre una amplio abanico d
117. A 5A 9A MUX_CR2 DA RW 1B 5B 9B MUX_CR3 DB RW PRT7DMO 1C RW 5C 9C DC PRT7DM1 1D RW 5D 9D OSC_GO_EN DD RW PRT7ICO 1E RW 5E 9E OSC_CR4 DE RW PRT7IC1 1F RW 5F 9F OSC_CR3 DF RW DBBOOFN 20 RW CLK_CRO 60 RW AO OSC_CRO E0 RW DBBOOIN 21 RW CLK_CR1 61 RW Al OSC_CRI1 E1 RW DBB000U 22 RW ABF_CRO 62 RW A2 OSC_CR2 E2 RW 23 AMD_CRO 63 RW A3 VLT_CR E3 RW DBBO1FN 24 RW CMP_GO_EN 64 RW A4 VLT_CMP E4 R DBBO1IN 25 RW CMP_GO_EN1 65 RW A5 E5 DBB010U 26 RW PAMD_CR1 66 RW A6 E6 27 ALT_CRO 67 RW A7 E7 DCBO2FN 28 RW 68 A8 IMO_TR E8 Ww DCBO2IN 29 RW 69 AQ ILO_TR E9 Ww DCBO20U 2A RW 6A AA BDG_TR EA RW 2B 6B AB ECO_TR EB Ww DCBO3FN 2C RW TMP_DRO 6C RW AC MUX_CR4 EC RW DCBO3IN 2D RW TMP_DR1 6D RW AD MUX_CR5 ED RW DCBO30U 2E RW TMP_DR2 6E RW AE EE 2F TMP_DR3 6F RW AF EF 30 ACBOOCR3 70 RW RDIORI BO RW FO 31 ACBOOCRO 71 RW RDIOSYN B1 RW Fi 32 ACBOOCR1 72 RW RDIOIS B2 RW F2 33 ACBOOCR2 73 RW RDIOLTO B3 RW F3 34 ACB01CR3 74 RW RDIOLT1 B4 RW F4 35 ACBO1CRO 75 RW RDIOROO B5 RW F5 36 ACBO1CR1 76 RW RDIORO1 B6 RW F6 37 ACB01CR2 77 RW B7 CPU_F F7 RL 38 78 B8 F8 39 79 B9 F9 3A 7A BA FA 3B 7B BB FB 3C 7C BC FC 3D 7D BD DAC_CR FD RW 3E 7E BE CPU_SCR1 FE 3F 7F BF CPU_SCRO FF Blank fields are Reserved and should not be accessed Access is bit specific February 15 2007 Document No 38 12018 Rev J 21 3 Electrical Specifications i E lt lt S F CYPRESS i PERFORM This chapter presen
118. Amplifiers and Filters The device editor also supports easy development of multiple configurations and dynamic reconfiguration Dynamic configu ration allows for changing configurations at run time PSoC Designer sets up power on initialization tables for selected PSoC block configurations and creates source code for an application framework The framework contains software to operate the selected components and if the project uses more than one operating configuration contains routines to switch between different sets of PSoC block configurations at run time PSoC Designer can print out a configuration sheet for a given project configuration for use during application pro gramming in conjunction with the Device Data Sheet Once the framework is generated the user can add application specific code to flesh out the framework It s also possible to change the selected components and regenerate the framework Design Browser The Design Browser allows users to select and import precon figured designs into the user s project Users can easily browse a catalog of preconfigured designs to facilitate time to design Examples provided in the tools include a 300 baud modem LIN Bus master and slave fan controller and magnetic card reader Application Editor In the Application Editor you can edit your C language and Assembly language source code You can also assemble com pile link and build Assembler The macro assembler allows
119. B in X place LSB in A Document Number 001 13625 Rev E Page 14 of 42 aan cr PRESS 8 Bit Timer Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_Write Compare Value Description Modifies the value of the Timer s Compare register In order to avoid unexpected side effects the Timer should be disabled not yet enabled via the Start API function or by first calling the Stop API function C Prototype void Timerl6 WriteCompareValue WORD wCompareValue Assembly mov X wCompareValue mov A wCompareValue 1 call Timer16 WriteCompareValue Parameters wCompareValue wCompareValue is a value between 0 and the Period register value to set the Timer16 compare value MSB is passed in the X register and LSB is passed in the Accumulator Lace MSB in X lace LSB in A pi pl Return Value None Side Effects If this function is called while the Timer is running and the compare value is equal to or greater than the current value of the Count register then a compare event can occur The value of the compare register may vary somewhat unpredictably as the Compare register is distribu
120. BFS SetPowerStatus Parameters bPowerStatus contains the desired power status one for self powered or zero for bus powered Sym bolic names are provided in C and assembly and their associated values are given here State Value Description USB_DEVICE_STATUS BUS POWERED 0x00 Set the device to bus powered USB_DEVICE_STATUS_SELF POWERED 0x01 Set the device to self powered Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Sample Code The C code illustrated here shows you how to use the USBFS User Module in a simple HID application Once connected to a PC host the device enumerates as a 3 button mouse When the code is run the mouse cursor zigzags from right to left This code illustrates the how the USBFS Setup Wizard configures the user module BYTE abMouseData 3 0 0 0 BYTE i 0 void main M8C_EnableGInt Enable Global Interrupts USBFS Start 0 USB _5V_OPERATION Start USBFS Operation using device 0 and with 5V operation while USBFS bGetConfiguration Wait for Device to enumerat Enumeration is completed load endpoint 1 Do not toggle the first time
121. Bit PWM Configuration Registers The 16 bit PWM uses two digital PSoC blocks In placement order from left to right they are named PWM16_LSB and PWM16_MSB Each block is personalized and parameterized through 7 registers The following tables give the personality values as constants and the parameters as named bit fields with brief descriptions Symbolic names for these registers are defined in the user module instance s C and assembly language interface files the h and inc files Document Number 001 13581 Rev F Page 17 of 19 a Y Cypress 8 Bit Pulse Width Modulator Function Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 1 Compare 0 0 0 1 LSB Type Function Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 Data Invert 0 1 Compare Interrupt 0 0 MSB Type Type 0 BCEN 1 Compare 0 0 0 1 LSB Type BCEN gates the compare output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the enable input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal or Less Than The InterruptType flag determines whether to trigger the interrupt on the compare event or on the terminal count Both CompareType and Interru
122. C21x34 256 Bytes CY8C21x23 16 1 4 8 0 2 ya upto lo o 2 o o 212 sk CY8C20x34 28 Bytes a Limited analog functionality b Two analog blocks and one CapSense Getting Started The quickest path to understanding the PSoC silicon is by read ing this data sheet and using the PSoC Designer Integrated Development Environment IDE This data sheet is an over view of the PSoC integrated circuit and presents specific pin register and electrical specifications For in depth information along with detailed programming information reference the PSoC Mixed Signal Array Technical Reference Manual For up to date Ordering Packaging and Electrical Specification information reference the latest PSoC device data sheets on the web at http www cypress com psoc To determine which PSoC device meets your requirements navigate through the PSoC Decision Tree in the Application Note AN2209 at http www cypress com and select Application Notes under the Design Resources Development Kits Development Kits are available from the following distributors Digi Key Avnet Arrow and Future The Cypress Online Store contains development kits C compilers and all accessories for PSoC development Go to the Cypress Online Store web site at http www cypress com click the Online Store shopping cart icon at the bottom of the web page and click PSoC Program mable System on Chip t
123. CPU clock output J10 Power Vss Ground connection El NC No connection K1 Power Vss Ground connection E2 NC No connection K2 Power Vss Ground connection E3 1O M P4 3 K3 NC No connection E4 IO 1 M P2 3 Direct switched capacitor block input K4 NC No connection E5 Power Vss Ground connection K5 Power Vdd Supply voltage E6 Power Vss Ground connection K6 lO P7 6 E7 lO M P2 4 External Analog Ground AGND input K7 10 P7 5 E8 IO M P4 4 K8 IO P7 4 E9 IO M P3 6 K9 Power Vss Ground connection E10 HCLK OCD high speed clock output K10 Power Vss Ground connection LEGEND A Analog Input O Output M Analog Mux Input NC No Connection OCD On Chip Debugger This is the ISSP pin which is not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details February 15 2007 Document No 38 12018 Rev J 15 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information CY8C24094 OCD 1 2 3 4 5 6 7 8 9 10 O000000000 QOQOOOOS O29 SNe ooo oo O09000 Sooo E 900205 9900080 BGA Top View eae DOOD O O OO OOO SOOODOODG 9109909990 OOOOOOOO Ge 6 Q OQO QO OOOO O OS Not for Production February 15 2007 Document No 38 12018 Rev J 16 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information
124. CTION PWM8_WritePulseWidth Description Writes the PulseWidth register with the pulse width value C Prototype void PWM8 WritePulseWidth BYTE bPulseWidth Assembly mov A bPulseWidth call PWM8 WritePulseWidth Parameters bPulseWidth bPulseWidth value is the value from 0 to the period value and is passed in the Accumu lator Return Value None Side Effects Writing the PulseWidth register while the counter is active changes the duty cycle of the output This may cause the output to glitch or change inadvertently The A and X registers may be altered by this function FUNCTION PWM8_bReadPulseWidth Description Reads the PulseWidth register C Prototype BYTE PWM8 bReadPulseWidth Assembly call PWM8 bReadPulseWidth mov bPulseWidth A Document Number 001 13581 Rev F Page 9 of 19 Sn Y Cypress 8 Bit Pulse Width Modulator Parameters None Return Value The Pulse width value is stored in the PulseWidth register and returned in the Accumulator Side Effects The A and X registers may be altered by this function FUNCTION PWM8_bReadCounter Description Reads the Counter register Note that this function is for applications that must read the Counter register on the fly creating some side effects C Prototype BYTE PWM8 bReadCounter Assembly call PWM8 bReadCounter mov bCounter A Parameters None Return Value Returns the
125. E 0x00 Return bus to SIE control Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Document Number 001 13629 Rev D Page 10 of 26 Re BE es Y Cypress USBFS Device USBFS_UpdateHIDTimer Description Updates the HID Report Idle timer and returns the expiry status Reloads the timer if it expires C Prototype BYTE USBFS UpdateHIDTimer BYTE bInterface Assembly MOV A 1 Select interface 1 call USBFS UpdateHIDTimer Parameters Register A contains the interface number Return Value The state of the HID timer is returned in A Symbolic names are provided in C and assembly and their associated values are given here State Value Description USB_IDLE_TIMER_EXPIRED 0x01 The timer expired USB_IDLE_TIMER_ RUNNING 0x02 The timer is running USB_IDLE_TIMER_IDEFINITE 0x00 Returned if the report is sent when data or state changes Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 func
126. Figura 9 11 C digo de apagado Se comprueba que la conexi n por USB est correctamente establecida y que el dispositivo genera el c digo perfectamente 123 Pablo Desviat Cruzado E Capitulo 10 CONCLUSIONES Como se ha visto en el cap tulo de resultados y experimentos el dispositivo funciona correctamente a falta de conectarlo a la red y comprobar si es capaz de emitir la se al de X10 a trav s del cableado el ctrico Por otro lado la conexi n realizada por USB ha resultado todo un xito puesto que incluso se llego a mejorar el programa de tal manera que se pudieran recibir datos en el ordenador desde la tarjeta En cuanto al estudio del protocolo X10 se ha obtenido un gran conocimiento tanto de sus ventajas como de inconvenientes A esto se debe a adir la sorpr ndete facilidad del PSoC con el que se pueden dise ar y llevar a cabo proyectos de muy diversa complejidad 124 Pablo Desviat Cruzado E Capitulo 11 FUTUROS DESARROLLOS Como este proyecto es parte de un proyecto m s global uno de los futuros desarrollos es la uni n de los diversos proyectos que lo componen y comprobar su funcionamiento Concretamente la otra parte que forma el proyecto total es un receptor de X10 La idea de los futuros desarrollos es la creaci n de un sistema bidireccional mediante la uni n de ambos dispositivos emisor y receptor en un solo aparato De esta manera se podr a dotar al proyec
127. Jose CA 95134 408 943 2600 Web Sites Company Information http www cypress com Sales http www cypress com aboutus sales_locations cfm Technical Support http www cypress com support login cfm 7 1 Revision History Table 6 1 CY8C24x94 Data Sheet Revision History Document Title CY8C24094 CY8C24794 CY8C24894 and CY8C24994 PSoC Mixed Signal Array Final Data Sheet Document Number 38 12018 Revision ECN Issue Date Origin of Change Description of Change id 133189 01 27 2004 NWJ New silicon and new document Advance Data Sheet A 251672 See ECN SFV First Preliminary Data Sheet Changed title to encompass only the CY8C24794 because the CY8C24494 and CY8C24694 are not being offered by Cypress MicroSystems B 289742 See ECN HMT Add standard DS items from SFV memo Add Analog Input Mux on pinouts 2 MACs Change 512 bytes of SRAM to 1K Add dimension key to package Remove HAPI Update diagrams registers and specs C 335236 See ECN HMT Add CY logo Update CY copyright Update new CY com URLs Re add ISSP programming pinout notation Add Reflow Temp table Update features MAC Oscillator and voltage range registers INT_CLR2 MSK2 second MAC and specs Rext IMO analog output buffer D 344318 See ECN HMT Add new color and logo Expand analog arch diagram Fix IO Update Electrical Specifications E 346774 See ECN HMT Add USB temperature specif
128. LED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the IDX_PP page pointer register is modified FUNCTION Timer32_ReadTimer Description Reads the current Timer32 Count register value This performs a software solicited hardware syn chronous counter capture operation This is the preferred method of reading the Count registers pro Document Number 001 13625 Rev E Page 25 of 42 am PX oe Y Cypress 8 Bit Timer viding that the Compare registers are not required to be preserved Note that this API routine used to be called CaptureCounter C Prototype void Timer32 ReadTimer DWORD pdwCount Assembly mov X pdwCount X points to the return buffer call Timer32 ReadTimer Parameters None Returns pdwCount Pointer to a buffer to hold the Count register data The X register is loaded with the address of the return buffer Side Effects Compare register contents are lost The compare condition becomes true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned control to its caller The A and X registers may be modified by this or future implementations of this func
129. M8 Disablelnt start the PWM8 Document Number 001 13581 Rev F Page 14 of 19 a CYPRESS 8 Bit Pulse Width Modulator PERFOR PWM8 Start 16 Bit PWM Sample Firmware Source Code In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based that is zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT types instead of pushing the argument on the stack when it sees the pragma fastcall declarations in the PWM 16 h file The following is assembly language source that illustrates the use of the APIs Function GenerateOneThirdDutyCycle Description This sample shows how to create a 33 duty cycle output pulse The clock selected should be 1000 times the required period The comparator operation is specified to be Less than or Equal Parameters none Returns none include PWM16 inc include the PWM16 API include file GenerateOneThirdDutyCycle mov A E7h set period to be 1000 counts of the clock mov X 03h Period is set to 1000 1 99
130. NDAR X10 INTERFAZ USB Autor Desviat Cruzado Pablo Director Mu oz Frias Jos Daniel Zamora Macho Juan Luis RES MEN DEL PROYECTO La evoluci n de los seres humanos ha generado una serie de eventos que han dado lugar a etapas hist ricas de gran trascendencia como lo son los desarrollos tecnol gicos La tecnolog a nace con los seres humanos y se va transformando en un elemento de prioridad para los grupos sociales que la emplean les permite habituarse a medios ambientes extremos o simple mente a subsistir Gracias a los avances tecnol gicos generados por a os de estudio e investigaci n los seres humanos han logrado obtener un nivel de vida muy alto Ahora no se busca cumplir necesidades b sicas de supervivencia nicamente tambi n se busca lograr un nivel de vida con confort y control de los alrede dores Ante estas nuevas necesidades la tecnolog a de la informaci n entra en escena Gracias a ella se puede conocer manipular y programar el ambiente en el que una persona se desenvuelve pudiendo ser una oficina o hasta el mismo hogar As es como surge la dom tica En Francia donde son muy amantes de adaptar t rminos propios a las nuevas disciplinas se acu la palabra Domotique contracci n de las palabras domo e informatique Este t rmino se puede definir como el concepto de vivienda que integra todos los automatismos en materia de seguridad gesti n de la energ a comunicaciones etc E
131. Operations Add device Device descriptor DEVICE_1 Remove Add configuration Device attributes Vendor ID FFFF Product ID FFFF Device release bcdDevice 0000 Device class Undefined pull down Subclass No subclass pull down Protocol None pull down Manufacturer string No string pull down Product string No string pull down Serial number string No string pull down Configuration descriptor CONFIG_NAME Remove Add interface Configuration attributes Configuration string No string pull down Max power 100 Device power Bus powered pull down Remote wakeup Disabled pull down Interface descriptor INTERFACE_NAME Remove Add endpoint Interface attributes Interface string No string pull down Class Vendor specific pull down Subclass No subclass pull down HID class Descriptor Descriptor type Report pull down Country code Not supported pull down HID report None pull down Endpoint descriptor ENDPOINT _NAME Remove Endpoint attributes Endpoint number 0 Direction IN pull down Transfer type CNTRL pull down Interval 10 Max packet size 8 String LANGID String descriptors Device name Add string Page 18 of 26 Re pr od S37 cypress USBFS Device Descriptor Data Operations LANGID pull down String Selected string name Remove Descriptor HID Descriptor Device name Import HID Report Template Understanding the USB Setup Wizard The USB Setup Wizard window is a table that presents three major areas for programming The first area is the Descriptor USBFS user modu
132. PIC16F877A 2002 http www microchip com downloads en AppNotes 00236a pdf Monogr fico energ a Fisica y Sociedad 10 trece X10 Transmission Theory http www x10 com homepage htm Cypress Semiconductor http www cypress com Stan D Souza Transformerless Power Supply http www microchip com downloads en AppNotes 91008b pdf Reston Condit Transformerless Power Supplies Resistive and Capacitive 2004 http www microchip com downloads en AppNotes 00954A pdf Doug Cox 1997 Interfacing to AC Lines http www microchip com downloads en AppNotes 00521c pdf 126 Pablo Desviat Cruzado A Parte Il ESTUDIO ECON MICO 127 Pablo Desviat Cruzado E El proyecto que se ha llevado a cabo un emisor de X10 con conexi n por USB es algo novedoso puesto que normalmente los emisores existentes en el mercado no contemplan esta cualidad A su vez se ha pretendido disminuir el tama o del dispositivo mediante la eliminaci n de circuitos anal gicos salvo los estrictamente necesarios como la electr nica de potencia y la creaci n de fuentes sin transformadores Para ello se ha utilizado un microcontrolador PSoC que ha permitido la reducci n del tama o puesto que permite la incorporaci n de bloques anal gicos y digitales que hacen de circuitos reales y cuyo precio no es muy elevado rondando los 100 euros si se compara con un m dulo de emisi n de X10 com n unos 70 euros
133. QFN z T _Di Pin Type ene Description CY8C24094 68 Pin OCD PSoC Device No Digital Analog 1 O M P4 7 42 2 10 M P45 ae SZ 3 O M P4 3 zz Zaza zzaaiiiez 4 O M P4 1 333323333 33333 gt 5 OCDE OCD even data IO TNwe Ses CIERRE SNS 6 OCDO OCD odd data output 7 Power Vss Ground connection M PaI7 ui 51 la P2 0 M Al 8 O M P3 7 M P4 5 2 50 la P4 6 M 9 O M__ P3 5 M P4 3 3 49 la P4 4 M 10 O M P3 3 M P4 1 4 48 k P4 2 M OCDE 5 47 la P4 0 M 11 O M P3 1 OCDO ee MAL XRES Jato M__ Ps 7 Vss 7 45 f CCLK 13 O M P5 5 M P3 7 8 44 la HCLK 141710 M IP58 M P3 5 9 QFN 43 f P3 6 M M P3 3 10 Top View 42 la P3 4 M 15 O M P5H M P3 1 11 41 f P3 2 M 16 O M P1 7 12C Serial Clock SCL M P5 7 12 40 P3 0 M 17 10 M P15 12C Serial Data SDA a ae is 39 ES 6 M 38 P5 4 18 O M P1 3 M P5 1 15 37 P5 2 M 19 O M P1 1 12C Serial Clock SCL ISSP SCLK 12C SCL M P1 7 16 36 P5 0 M 20 Power Vss Ground connection 12C SDA M P1 5 Les E oe 35 P1 6 M 21 USB D LUN Y O O D O O O O O O DS ST DO DU E 22 USB D DEf BRELeEOzZaNrTaess 23 Power Vdd Supply voltage ia ZERRA gt gt 24 O P7 7 E 25 O P7 6 Q a 26 O P7 5 S S 27 O P7 4 28 O P7 3 29 O P7
134. REPORT STORAGE equ 0 Insert your custom code above this banner r r r r PSoC_UserCode END Do not change this line Copy the Wizard Created Code Find this code in USB_descr asm HID IN Report Transfer Descriptor Table for F WIZARD DEFINED REPORT STORAGE AREA func lit ROM REL CON LITERAL USB DO C1 IO IN RPTS TD START TABLE 1 Only 1 Transfer Descriptor TD ENTRY USB DS RAM USB HID RPT 3 IN RPT SIZE USB INTERFACE 0 IN RPT DATA NULL PTR ENDLITERAL E ENDIF WIZARD DEFINED REPORT STORAGE There are three sections one each for the IN OUT and FEATURE reports Copy all three sections Paste the Code Into the Protected User Code Area You can paste the code into the protected user code area of USB_descr asm shown or a separate assembly language file r PSoC_UserCode BODY 2 Do not change this line Redefine your descriptor table below You might cut and paste code from the WIZARD descriptor above and then make your changes Document Number 001 13629 Rev D Page 24 of 26 E a Y Cypress USBFS Device PERFOR r Insert your custom code above this banner r QPSoC_UserCode END Do not change this line End
135. Return Values None Side Effects None LED On Description Turns LED on C Prototype void LED_On void Assembler Call LED_On Parameters None Return Values None Side Effects None LED_Off Description Turns LED off C Prototype void LED_Off void Assembler call LED_Off Parameters None Return Values None Side Effects None LED _Invert Description Inverts the state of the LED If the LED was on it will be turned off if it was off it will be turned on Document Number 001 13570 Rev A Page 3 of 6 Cire C Prototype void LED Assembler call LED_ Parameters None Return Values None Side Effects None LED_GetState Description _ Invert void Invert Returns state of LED C Prototype BYTE LED_GetState void Assembler call LED_GetState mov myLED_State A Parameters None Return Value Place result in location myli ED State LED Returns state of LED A zero is returned if LED if off A 1 is returned if the LED is on Below are some symbolic names available in both C and ASM Symbolic Name LED ON LED_OFF Side Effects None Document Number 001 13570 Rev A Value Page 4 of 6 Sample Firmware Source Code gt YPRESS A sample project written in assembly code follows rr E E EE j rIr 5 Sample ASM Code for the LJ
136. Returns the number of bytes sent by the host to the USB device This could be more or less than the number of bytes requested Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the IDX_PP and the CUR_PP page pointer registers are modified USBFS_EnableOutEP and USBFS_EnableOutISOCEP Description Enables the specified endpoint for OUT Bulk or Interrupt transfers _EnableOutEP and Isochronous transfers _EnableOutISOCEP Do not call these functions for IN endpoints C Prototype void USBFS Enableout void USBFS Enableout Assembly MOV A 1 call USBFS EnableOutEP Parameters Register A contains the endpoint number EP BYTE bEPNumber SOCEP BYTE bEPNumber Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the Document Number 001 13629 Rev D Page 9 of 26 Sn 0 Cypress USBFS Device IDX_PP page pointer re
137. SB gt 3 z Sp 3 z S gt 3 z S gt 3 IQ o D I2 o 2 I2 ta D I2 3 a 22 3 2 3 22 a 28 3 oO a o 7 PRTODR 00 RW PMAO_DR 40 RW ASC10CRO 80 RW Co PRTOIE 01 RW PMA1_DR 41 RW ASC10CR1 81 RW C1 PRTOGS 02 RW PMA2_DR 42 RW ASC10CR2 82 RW C2 PRTODM2 03 RW PMA3_DR 43 RW ASC10CR3 83 RW C3 PRT1DR 04 RW PMA4_DR 44 RW ASD11CRO 84 RW C4 PRT1IE 05 RW PMA5_DR 45 RW ASD11CR1 85 RW C5 PRT1GS 06 RW PMA6_DR 46 RW ASD11CR2 86 RW C6 PRT1DM2 07 RW PMA7_DR 47 RW ASD11CR3 87 RW C7 PRT2DR 08 RW USB_SOFO 48 R 88 C8 PRT2IE 09 RW USB_SOF1 49 R 89 C9 PRT2GS 0A RW USB_CRO 4A RW 8A CA PRT2DM2 0B RW USBIO_CRO 4B 8B CB PRT3DR 0C RW USBIO_CR1 4C RW 8C CC PRTSIE 0D RW 4D 8D CD PRT3GS 0E RW EP1_CNT1 4E 8E CE PRT3DM2 OF RW EP1_CNT 4F RW 8F CF PRT4DR 10 RW EP2_CNT1 50 ASD20CRO 90 RW CUR_PP DO RW PRT4IE 11 RW EP2_CNT 51 RW ASD20CR1 91 RW STK_PP D1 RW PRT4GS 12 RW EP3_CNT1 52 ASD20CR2 92 RW D2 PRT4DM2 13 RW EP3_CNT 53 RW ASD20CR3 93 RW IDX_PP D3 RW PRT5DR 14 RW EP4_CNT1 54 ASC21CRO 94 RW MVR_PP D4 RW PRT5IE 15 RW EP4_CNT 55 RW ASC21CR1 95 RW MVW_PP D5 RW PRT5GS 16 RW EPO_CR 56 ASC21CR2 96 RW 12C_CFG D6 RW PRT5DM2 17 RW EPO_CNT 57 ASC21CR3 97 RW 12C_SCR D7 18 EPO_DRO 58 RW 98 12C_DR D8 RW 19 EPO_DR1 59 RW 99 12C_MSCR D9 1A EPO_DR2 5A RW 9A INT_CLRO DA RW 1B EPO_DR3 5B RW 9B INT_CLR1 DB RW PRT7DR 1C RW EPO_DR4 5C RW 9C INT_CLR2 DC RW PRT7IE 1D RW EPO_DR5 5D RW 9D INT_CLR3 DD RW PRT7GS 1E RW EPO_DR6 5E RW 9E INT_MSK3 DE RW PRT7DM2 1F RW EPO_DR7
138. SoC Designer The C compiler automatically takes care of this requirement Assembly language programmers must ensure their code observes the policy too Though some user module API function may leave A and X unchanged there is no guarantee they will do so in the future 8 Bit Timer API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for Timers CONSTANT Timer8_PERIOD Description Represents the value chosen for the Period field of the Timer8 in the Device Editor The value can have a range between 0 and 255 CONSTANT Timer8_COMPARE_VALUE Description Represents the value chose for the PulseWidth field of the Timer8 in the Device Editor The value can have a range between 0 and 255 FUNCTION Timer8_Enablelnt Description Enables the interrupt mode operation Note however that global interrupts must also be enabled before interrupts will actually be serviced C Prototype void Timer8 Enablelnt void Assembly call Timer8 E nablelnt Document Number 001 13625 Rev E Page 8 of 42 cr PRESS 8 Bit Timer Parameters None Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is t
139. Space z Sp 3 z Zol 3 z gt 3 z gt 3 IQ e 2 IQ O 9 IQ O 2 IQ te 3 ge 2 3 ge g 3 ge g 3 ge g o 7 o oO PRTODMO 00 RW PMAO_WA 40 RW ASC10CRO 80 RW USBIO_CR2 CO RW PRTODM1 01 RW PMA1_WA 41 RW ASC10CR1 81 RW USB_CR1 C1 PRTOICO 02 RW PMA2_WA 42 RW ASC10CR2 82 RW PRTOIC1 03 RW PMA3_WA 43 RW ASC10CR3 83 RW PRT1DMO 04 RW PMA4_WA 44 RW ASD11CRO 84 RW EP1_CRO C4 PRT1DM1 05 RW PMA5_WA 45 RW ASD11CR1 85 RW EP2_CRO C5 PRT1ICO 06 RW PMA6_WA 46 RW J ASD11CR2 86 RW EP3_CRO C6 PRT1IC1 07 RW PMA7_WA 47 RW ASD11CR3 87 RW EP4_CRO C7 PRT2DMO 08 RW 48 88 C8 PRT2DM1 09 RW 49 89 c9 PRT2ICO 0A RW 4A 8A CA PRT2IC1 0B RW 4B 8B CB PRT3DMO 0c RW 4C 8C cc PRT3DM1 0D RW 4D 8D CD PRT3ICO 0E RW 4E 8E CE PRT3IC1 OF RW 4F 8F CF PRT4DMO 10 RW PMAO_RA 50 RW 90 GDI_O_IN DO RW PRT4DM1 11 RW PMA1_RA 51 RW ASD20CR1 91 RW GDI_E_IN D1 RW PRT4ICO 12 RW PMA2_RA 52 RW ASD20CR2 92 RW GDI_O OU D2 RW PRT4IC1 13 RW PMA3_RA 53 RW ASD20CR3 93 RW GDI_E OU D3 RW PRT5DMO 14 RW PMA4_RA 54 RW ASC21CRO 94 RW D4 PRT5DM1 15 RW PMA5_RA 55 RW ASC21CR1 95 RW D5 PRT5ICO 16 RW PMA6_RA 56 RW ASC21CR2 96 RW D6 PRT5IC1 17 RW PMA7_RA 57 RW ASC21CR3 97 RW D7 18 58 98 MUX_CRO D8 RW 19 59 99 MUX_CR1 D9 RW 1
140. String USB Design By Example C String Example 1 Buttons and Lights String SN 000001 Descriptor Data EL HID Report Descriptor Root USB E HID Report Descriptor 3 Usage Page Usage E Collection Usage Minimum Usage Maximum Logical Minimum 3 Logical Maximum Report Size Report Count Input Usage Minimum Usage Maximum Dutput y End Collection BytelN and ByteDUT Usage Page 06 00 FF Usage 09 01 Collection Application 01 Usage Minimum 19 01 Usage Maximum 29 02 Logical Minimum 15 80 Logical Maximum 25 7F Report Size 75 08 Report Count 95 01 Input Data Variable Absolute 02 Usage Minimum 19 01 Usage Maximum 29 02 Output Data Variable Absolute 02 End Collection CO Figura 8 6 USB Wizard 114 Pablo Desviat Cruzado A En la figura anterior se puede ver como se divide en tres partes device descriptors string descriptors y class descriptors Las strings son opcionales pero se suelen incluir para que luego la depuraci n sea m s sencilla En cuanto a los descriptors hay que recalcar que todos los dispositivos USB requieren de un Vendor ID el cual es asignado en USB Implementers Forum www usb org Si se desea vender el dispositivo se debe obtener un Vendor ID Se ha puesto como versi n del dispositivo la 1 00 por si en alg n momento se fueran a seguir desarrollando y actualizando las versiones El device class y la subclasss se han puesto a O puesto que se describen en i
141. TIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may be limited by and subject to the applicable Cypress software license agreement F CYPRESS PERFORM LED Data Sheet D Copyright O 2005 2008 Cypress Semiconductor Corporation All Rights Reserved PSoC Blocks API Memory Bytes Pins per Resources Digital Analog CT Analog SC Flash RAM External I O All PSoC Devices 0 0 0 40 1 1 For one or more fully configured functional example projects that use this User Module go to www cypress com psocexampleprojects Features and Overview e Support for both Active High and Active Low circuits e Works with system shadow registers e Functions Switch Invert and GetState The LED User Module is just a couple simple functions to control an LED or any simple device that is controlled by on and off Vdd Ac
142. ThiGHI2C HIGH Period of the SCL Clock 4 0 0 6 s TSUSTAI2C Set up Time for a Repeated START Condition 4 7 0 6 s THDDATI2C Data Hold Time 0 0 S TSUDATI2C Data Set up Time 250 1002 ns Tsustoizc Set up Time for STOP Condition 4 0 0 6 s TBuFI2c Bus Free Time Between a STOP and START Condition 4 7 ad 1 3 Ss Tspiac Pulse Width of spikes are suppressed by the input filter 0 50 ns a A Fast Mode I2C bus device can be used in a Standard Mode I2C bus system but the requirement tsy par gt 250 ns must then be met This will automatically be the case if the device does not stretch the LOW period of the SCL signal If such device does stretch the LOW period of the SCL signal it must output the next data bit to the SDA line tmax tsu pat 1000 250 1250 ns according to the Standard Mode 2C bus specification before the SCL line is released Figure 3 6 Definition for Timing for Fast Standard Mode on the IC Bus a A i I i i i 1 1 1 i l SDA itt i l Trowee T MIN T is i as gt 1 supati2c NE HDSTAI2C Le Tauriz E IE Eas i 1 1 1 i 1 1 1 1 1 1 l f SCL j a poa Loa ie lee i w i i FT T aa Tgustowe sd LS Tupstaze HDDATIZC Theme SUSTA2C Sr np Lo February 15 2007 Document No 38 12018 Rev J 38 4 Packaging Information PERFORM This chapter illustrates the package specification for the CY8C24x94 PSoC
143. Timer interrupt is enabled The A and X registers may be modified by this or future implemen tations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_ReadCompare Value Description Reads the Timer24 Compare registers C Prototype void Timer24 ReadCompareValue DWORD pdwCompareValue Assembly mov X pdwCompareValue move address of return value into X call Timer24 ReadCompareValue Parameters pdwCompareValue Pointer to a buffer to hold the Compare register data The X register is loaded with the ram address where the return value is to be stored Return Value None see Side Effects Side Effects The value of the Compare register is stored in the location specified by the actual parameter The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Currently only the IDX_PP page pointer register is modified FUNCTION Timer24_ReadTimerSaveCV Description Reads the current Timer24 Count register value while preserving the Compare registers This per forms a
144. UNIVERSIDAD PONTIFICIA COMILLAS ESCUELA TECNICA SUPERIOR DE INGENIERIA ICAD INGENIERO EN AUTOMATICA Y ELECTRONICA INDUSTRIAL PROYECTO FIN DE CARRERA EQUIPO PARA DOMOTICA BASADO EN EL ESTANDARD X10 INTERFAZ USB AUTOR Pablo Desviat Cruzado MADRID Septiembre 2009 ESTE PROYECTO CONTIENE LOS SIGUIENTES DOCUMENTOS DOCUMENTO N 1 MEMORIA 1 1 Memoria 1 2 Estudio Econ mico 1 3 Manual del Usuario 1 4 C digo 1 5 Datasheets DOCUMENTO N 2 PLANOS 2 1 Lista de planos 2 2 Planos DOCUMENTO N 3 PRESUPUESTO 3 1 Mediciones 3 2 Precios Unitarios 3 3 Sumas Parciales 3 4 Presupuesto General pag 1 a126 126 p ginas p g 127 a 129 2 p ginas p g 130 a 139 9 p ginas p g 140 a 147 7 p ginas p g 148 en adelante 1 p gina p g 0a2 3 p ginas p g 0a1 2 p ginas p g 2 1 p gina p g 3 1 p gina p g 4 1 p gina UNIVERSIDAD PONTIFICIA COMILLAS ESCUELA TECNICA SUPERIOR DE INGENIERIA ICAD INGENIERO EN AUTOMATICA Y ELECTRONICA INDUSTRIAL PROYECTO FIN DE CARRERA EQUIPO PARA DOMOTICA BASADO EN EL ESTANDARD X10 INTERFAZ USB AUTOR Pablo Desviat Cruzado MADRID Septiembre 2009 Autorizada la entrega del proyecto al alumno Pablo Desviat Cruzado EL DIRECTOR DEL PROYECTO Juan Luis Zamora Macho Fdo Fecha Jos Daniel Mu oz Frias Fdo Fecha V B del Coordinador de Proyectos lvaro S nchez Miralles Fdo Fecha EQUIPO PARA DOM TICA BASADO EN EL EST
145. USB futuros desarrollos etc estamos ante un proyecto que puede tener viabilidad econ mica 129 Pablo Desviat Cruzado A Parte III MANUAL DE USUARIO 130 Pablo Desviat Cruzado KIA 1 Conexi n a PC Primero inicie el Software suministrado con la placa para el ordenador Una vez arrancado deber a aparecerle una pantalla en la que se muestra el mapa de la casa junto con el estado de las luces en cada habitaci n Observe como el programa le indica que est esperando la conexi n con la tarjeta Esperando conexi n Figura 0 1 Esperando conexi n Introduzca el cable USB en la tarjeta y enci ndala Una vez hecho con ctela al ordenador Figura 0 2 Conexi n tarjeta USB 131 Pablo Desviat Cruzado KIA A partir de ese momento el PC deber a instalar el driver para la tarjeta y el programa deber a actualizar el estado indicando que se ha producido la conexi n Conectado Figura 0 3 Conexi n establecida Observe como una vez establecida la conexi n con la tarjeta esta le indica tambi n el estado de las luces en cada habitaci n en el LCD Figura 0 4 Estado LCD todo apagado 132 Pablo Desviat Cruzado 2 Uso del programa A partir de este momento puede encender y apagar las luces de las habitaciones pinchando con el rat n sobre el bot n correspondiente a la habitaci n que usted desee El programa cambiar el estado del bot n y le mos
146. Windows XP Reference the PSoC Designer Func tional Flow diagram below PSoC Designer helps the customer to select an operating con figuration for the PSoC write application code that uses the PSoC and debug the application This system provides design database management by project an integrated debugger with In Circuit Emulator in system programming support and the CYASM macro assembler for the CPUs PSoC Designer also supports a high level C language compiler developed specifically for the devices in the family PSoC Designer Subsystems Graphical Designer Context PSoC d pr be Sensitive Designer Help a El 8 E E fo a 9 Importable Design Database Device PSoC Database C Configuration PSoC Sheet Application Designer Database Core Engine Manufacturing Project C Information Database C File User Modules Library Emulation In Circuit Device Pod Emulator Programmer February 15 2007 Document No 38 12018 Rev J CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview PSoC Designer Software Subsystems Device Editor The Device Editor subsystem allows the user to select different onboard analog and digital components called user modules using the PSoC blocks Examples of user modules are ADCs DACs
147. X MOV X 3 MOV A 0 LCALL USBFS Start POP X 7 Wait for Device to enumerat no device PUSH X LCALL USBFS bGetConfiguration POP X 7 CMP A 0 JZ no device Enumeration is completed load endpoint 1 Do not toggle the first time SBFS LoadInEP 1 abMouseData 3 USB NO TOGGLE H X A 0 E O O n NZ2N IDZ2NUZSN OA D A O0 Cr EY DE O Y ZmUEmDZmDUEDZEDEZ gt C Document Number 001 13629 Rev D Page 13 of 26 aa S37 cypress USBFS Device PERFORM LCALL USBFS LoadInEP ADD SP 250 POP X endless loop PUSH X MOV A 1 LCALL USBFS bGetEPAckState POP X 7 CMP A 0O JZ endless loop ACK has occurred load the endpoint and toggle the data bit USBFS LoadInEP 1 abMouseData 3 USB TOGGLE PUSH X MOV A 1 PUSH A MOV A 0 PUSH A MOV A 3 PUSH A MOV A 0 PUSH A MOV A 71 PUSH A MOV A 1 PUSH A LCALL USBFS LoadInEP ADD SP 250 POP X When our count hits 128 MP i 128 NZ move left Start moving the mouse to the right OV abMouseData 1 5 MP increment i When our counts hits 255 move left CMP 1 255 JNZ increment i Start moving the mouse to the left MOV abMouseData 1 251 qas ac increment_1 INC i JMP endless loop terminate jmp terminate USBFS Setup Corresponding to the Exampl
148. Y8CTST300 CY8CTMA300 CY8CTMA301 CY8CTMA301D CY8C28x45 CY8CPLC20 CY8CLED16P01 CY8C28xxx 8 bit 1 0 0 67 0 1 16 bit 2 0 0 89 0 1 CY8C26 25xxx 8 bit 1 0 0 103 0 1 16 bit 2 0 0 138 0 1 For one or more fully configured functional example projects that use this User Module go to www cypress com psocexampleprojects Features and Overview e Band 16 bit general purpose pulse width modulators use one or two PSoC blocks respectively e Source clock rates up to 48 MHz e Automatic reload of period for each pulse cycle e Programmable pulse width Input enables disables continuous counter operation e Interrupt option on rising edge of the output or terminal count The 8 and 16 bit PWM User Modules are pulse width modulators with programmable period and pulse width The clock and enable signals can be selected from several sources The output signal can be routed to a pin or to one of the global output buses for internal use by other user modules An interrupt can be programmed to trigger on the rising edge of the output or when the counter reaches the terminal count condition Cypress Semiconductor Corporation 198 Champion Court San Jose CA 95134 1709 408 943 2600 Document Number 001 13581 Rev F Revised June 16 2009 E a Y Cypress 8 Bit Pulse Width Modulator Register Register Period Pulse Width Data Enable Output Enable Clock Counter Count Load TC Interrupt
149. _Dispatch USB_CB_h2d_vnd_oth Device to Host Device USB_DT_d2h_vnd_dev_Dispatch USB_CB_d2h_vnd_dev Interface USB_DT_d2h_vnd_ifc_Dispatch USB_CB_d2h_vnd_ifc Control Read Endpoint USB_DT_d2h_vnd_ep Dispatch USB_CB _d2h_vnd_ep Other USB_DT_d2h_vnd_oth_Dispatch USB_CB_d2h_vnd_oth You must follow these steps for an application to provide an assembly language dispatch routine for the vendor specific device request 1 In the USBFS inc file enable support for the vendor specific dispatch routine Find the dispatch routine enable flag and set EQU to 1 2 Write an appropriately named assembly language routine to handle the device request Use the entry points listed in the table above Override Existing Request Routines To override a standard or class specific device request or enable an unsupported device request you must do the following 1 In the USBFS inc file redefine the specific device request as USB_APP_SUPPLIED 2 Write an appropriately named assembly language function to handle the device request The name of the assembly language function is APP_ plus the device name For example to override the supplied HID class Set Report request USB_CB_ SRC_h2d_ cls _ifc_09 enable the routine with these changes to USBFS inc 7 PSoC_UserCode BODY 1 Do not change this line r Insert your custom code below this banner NOTE interrupt service routines must preserve the values of the A and X CPU register
150. a Mando universal Mandos RF de X 10 Programador PC Sofware ActiveHome Macros programaci n horaria simulaci n de presencia 56 Pablo Desviat Cruzado Ep aa Cualquier m dulo X 10 se configura asign ndole un C digo de Casa y un C digo Num rico Figura 2 11 M dulo X10 Los equipos X 10 poseen dos ruedas las cuales son utilizadas para la configuraci n en la red el ctrica la primera es de color rojo esta representa el c digo de la casa y est identificada con las letras de la A a la P y la segunda marcada de color negro representa el numero del m dulo que corresponde a dicho dispositivo se pueden realizar todas las combinaciones posibles entre las dos ruedas para identificar los equipos de esta forma se podr n obtener hasta 256 direcciones distintas Este es el m ximo n mero de dispositivos diferenciados que compone un sistema dom tico X 10 Si dos actuadores tienen los mismos c digos de casa y num rico ejecutar n simult neamente las rdenes procedentes por la red el ctrica Si a dos detectores de presencia X 10 se les asigna los mismos c digos cosa que puede resultar til para encender las luces de escalera desde dos plantas distintas por ejemplo mandar n la misma orden Como se ha visto los sensores de un sistema dom tico transmiten rdenes mientras que los actuadores las reciben por este motivo X 10 hace una clasificaci n y asigna a sus dispositivos unos logos
151. a a siendo La Maquinista Terrestre y Mar tima la primera empresa que suscribi un contrato de suministro el ctrico y posteriormente Tejidos Tolr en Castellar Hilados Ricart en Manresa el Canal Imperial de Arag n Todos estos encargos dieron pie a la constituci n de la Sociedad Espa ola de Electricidad por Jos Dalmau e hijo sociedad que figura en los anales como primera empresa el ctrica espa ola En 1878 se ilumina por primera vez la Puerta del Sol en Madrid a continuaci n el Palacio de Bellavista sede del Ministerio de la Guerra y los Jardines del Buen Retiro En 1883 la Plaza de la Constituci n en Valencia y el Puerto del Abra en Bilbao El desarrollo de las aplicaciones el ctricas cobr tal impulso que en 1885 ya se public un primer decreto que ordenaba las instalaciones el ctricas y tres a os m s tarde una Real 15 Pablo Desviat Cruzado Orden regula el alumbrado el ctrico de los teatros prohibiendo expresamente el alumbrado con gas y autorizando las l mparas de aceite s lo como sistema de emergencia Este acelerado desarrollo de la industria el ctrica dio pie a la creaci n de nuevas empresas en las ltimas dos d cadas del siglo XIX algunas de las cuales despu s de m ltiples compras y fusiones existen todav a en la actualidad No obstante el desarrollo el ctrico tropezaba en el siglo XIX con una importante dificultad la electricidad era generada en forma de corriente con
152. a iniciativa se plasm en la pr ctica con la creaci n en 1944 de la empresa Unidad El ctrica S A UNESA integrada entonces por las 17 principales compa as del sector A UNESA se encomend en aquel momento la promoci n de las interconexiones de los distintos sistemas el ctricos regionales y de stos con las centrales el ctricas que fueran necesarias para completar la red primaria o de transporte y la creaci n del Dispatching Central desde donde se dirig a la explotaci n conjunta del Sistema El ctrico Nacional decidiendo qu centrales ten an que funcionar en cada momento y qu intercambios de electricidad entre zonas eran necesarios para asegurar el abastecimiento al conjunto del pa s Esta oficina posteriormente en 1953 se pas a denominar RECA Repartidor Central de Cargas 20 Pablo Desviat Cruzado E Do La d cada de los 50 La aplicaci n a partir del primero de enero de 1953 de las Tarifas Tope Unificadas permiti liberar al sector el ctrico del pesimismo con que se ven a desenvolviendo en la poca anterior e incentiv el ritmo de construcci n de nuevas centrales lo que trajo consigo una progresiva y r pida disminuci n del d ficit de capacidad de producci n esto es de las restricciones el ctricas que llegaron a desaparecer completamente en el a o 1958 Este nuevo tratamiento de las necesidades del sector el ctrico contribuy al despegue de los a os cincuenta y a la superaci n
153. a un pin En la parte digital se utiliza un contador de 16 bits se emite una se al de modulador de ancho de pulso de 16 bits en un pin Otra caracter stica igual de sencilla y relacionada con el manejo es el software PSOC Express tambi n gratuito y basado en la visualizaci n PSOC DESIGNER 5 0 bility Easeof Use PSoC Express 3 0 PSoC Designer 4 4 Figura 2 8 PSoC Express 43 Pablo Desviat Cruzado A En este caso el usuario elige entradas por ejemplo teclado sensor de temperatura sensor de humedad botones capacitivos y salidas por ejemplo LED LCD modulador de ancho de pulso y define la acci n en la salida en funci n de los valores de la entrada Adem s pueden a adirse interfaces como 12C o WirelessUSB Tras la elecci n de componentes y la asignaci n de pines se compila el proyecto y entonces se puede programar el PSoC sin haber escrito una sola l nea de c digo PsoC Express genera adem s un archivo de proyecto que se proveer con c digo de usuario con ayuda del programa PsoC Designer Cypress ofrece en su p gina web una completa gama de herramientas de hardware el sencillo mini programa CY3210 Mini Prog placas de evaluaci n Cy3210 PSOCEvall con LED potenciometros LCD RS232 o el complet simo emulador CY3215 Dk con infinitos breakpoints Trace Buffer de 128 kB y licencia para el compilador C Otra gran ayuda a la hora de desarrollar programas
154. acitive Load on Pins as Output 3 5 10 pF Package and pin dependent Temp 25 C 3 3 3 DC Full Speed USB Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 10 C lt Ta lt 85 C or 3 0V to 3 6V and 10 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 6 DC Full Speed 12 Mbps USB Specifications Symbol Description Min Typ Max Units Notes USB Interface Vol Differential Input Sensitivity 0 2 V D D Vem Differential Input Common Mode Range 0 8 2 5 V Vse Single Ended Receiver Threshold 0 8 2 0 V Cin Transceiver Capacitance 20 pF lio High Z State Data Line Leakage 10 10 uA OV lt Vin lt 3 3V Rext External USB Series Resistor 23 25 Q In series with each USB pin VuoH Static Output High Driven 2 8 3 6 V 15 kQ 5 to Ground Internal pull up enabled VuoHI Static Output High Idle 2 7 e 3 6 V 15 kQ 5 to Ground Internal pull up enabled VuoL Static Output Low e 0 3 V 15 kQ 5 to Ground Internal pull up enabled Zo USB Driver Output Impedance 28 44 Q Including Rext Resistor Vors D D Crossover Voltage 1 3 2 0 V February 15 2007 Document No 38 12018 Rev J 24 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical S
155. ad it uses a form driven USBFS Setup Wizard to define the USB descriptors for the application From the descriptors the wizard personalizes the user module The user module is driven by information generated by the USBFS Setup Wizard This wizard facilitates the construction of the USB descriptors and integrates the information generated into the driver firmware Document Number 001 13629 Rev D Page 2 of 26 S37 cypress USBFS Device used for device enumeration The USBFS User Module does not function without first running the wizard selecting the appropriate attributes and generating code Application Programming Interface The Application Programming Interface API routines in this section allow programmatic control of the USBFS User Module The following sections describe descriptor generation and integration The sections also list the basic and device specific API functions As a developer you need a basic understanding of the USB protocol and familiarity with the USB 2 0 specification especially Chapter 9 USB Device Framework The USBFS User Module supports control interrupt bulk and isochronous transfers Some or a group of functions such as LoadInEP and EnableOutEP are designed for use with bulk and interrupt endpoints Other functions such as USBFS_LoadINISOCEP are designed for use with isochronous endpoints Refer to the Technical Reference Manual TRM for more information on how to do these transfer types Note Th
156. ado para funcionar en entornos dom sticos En segundo lugar resultaron razones clave para escoger X10 frente a otros los requisitos de coste reducido y madurez de la tecnolog a Ninguna de las otras tecnolog as tecnolog as puede competir en materia de precios con X10 Como referencia valga decir que en Internet se pueden encontrar a la venta sensores listos para funcionar desde 1 6 2 Por otro lado X10 es un protocolo inventado en los a os 70 Posee muchos a os de existencia lo que llev en un principio a deducir dos consecuencias 1 ha habido mucho tiempo para poder solucionar los problemas que hayan podido surgir debidos a factores imprevistos 2 para poder generar gran cantidad de documentaci n acerca de la instalaci n y el funcionamiento de los dispositivos que utilizan X10 En fases m s avanzadas del proyecto se pudo comprobar que la deducci n de dichas consecuencias fue un error Por un lado existen problemas para los que a n a d a de hoy no hay soluci n o mejora posible al tratarse de cuestiones relacionadas con el planteamiento base de X10 Por otro la documentaci n sigue siendo escasa dada la falta de aplicaci n 80 Pablo Desviat Cruzado lt P a a de X10 en entornos profesionales donde todo resulta m s riguroso que en el mbito dom stico al que est dirigido actualmente X10 Sin embargo y puesto que este proyecto est destinado a la automatizaci n domestica se
157. age pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_bReadTimerSaveCV Description Reads the current Timer8 Count register value while preserving the Compare register This performs a software solicited hardware synchronous counter capture operation This function should only be used if the contents of the Compare register must be preserved If the Compare register contents do not need to be preserved then using the bReadTimer function is preferred Note that this API routine used to be called bReadCounter C Prototype BYTE Timer8 bReadTimerSaveCV void Assembly call Timer8 bReadTimerSaveCv mov bCount A Parameters None Return Value The Count register content is returned in the Accumulator Document Number 001 13625 Rev E Page 11 of 42 cr PRESS 8 Bit Timer Side Effects In order to read the value of the Count register its value must be momentarily transferred to the Com pare register before it can be returned This causes the compare condition to become true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this
158. alue gt PeriodValue DutyCycle 100 The following table summarizes some special output signal conditions based on the setting of the Period the PulseWidth and the comparison operation Counter Special Output Signal Conditions Ratio of Pulse Width High Period Register Value Compare Type PulseWidth Register Value Time to Period 0 Don t Care gt 0 1 0 0 0 1 0 0 lt 0 0 0 gt 0 0 1 Period 1 gt 0 lt 0 0 0 Period PulseWidth Period PulseWidth 1 0 Period PulseWidth lt Period PulseWidth Period Period 1 PulseWidthValue gt Period Don t Care PulseWidthValue gt Period 1 0 The value of the PulseWidth register may be set using the Device Editor or during run time using the API No buffering of the PulseWidth register is provided in the way the Period register buffers the Count register before terminal count Therefore changes to the PulseWidth register affect the compare output on the next clock cycle rather than following terminal count This can produce periods with multiple pulses In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 device families the PWM User Module provides the terminal count signal as an auxiliary output This active high signal is asserted on the rising edge of the clock cycle following terminal count in which the Count register is loaded from the Period register An interrupt can be programmed to occur on terminal count or when the compare becomes true The comparator output triggers
159. an 8 bits operate as a single monolithic synchronous timer The Timer API provides functions callable from C and assembly to stop and start operation of the Timer and to read and write the various data registers A Control register starts and stops the Timer User Module Writing the Period register while the Timer is stopped causes the Period register value to be copied into the Count register While the Timer is stopped the output is asserted low When a Timer is started the Count register is decremented by 1 on each rising edge of the clock On the rising clock edge following the zero count the Count register is reloaded from the Period register On the next falling edge the terminal count event is triggered and the output is asserted high for one half clock cycle or optionally in the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 device families for one full clock cycle In this way the Timer acts as a clock divider Its period and frequency are related to the period and frequency of the source clock by a factor equal to the value of the Timer s Period register plus 1 OutputPeriod SourceClockPeriod x PeriodRegisterValue 1 Equation 1 Document Number 001 13625 Rev E Page 2 of 42 CY PRESS 8 Bit Timer A period value of zero will output the input source clock shifted by one half clock cycle producing a divide by one clock In the CY8C29 27 24 22 21 xxx and CY8CLED04 08 16 device families the terminal count pulse width must be s
160. and LSB is passed in the Accumulator Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM16_WritePulseWidth Description Writes the PulseWidth register with the pulse width value C Prototype void PWM16 WritePulseWidth WORD wPulseWidth Assembly mov X wPulseWidth mov A wPulseWidth 1 call PWM16 WritePulseWidth Parameters wPulseWidth wPulseWidth value is the value from O to the period value MSB is passed in the X reg ister and LSB is passed in the Accumulator Return Value None Side Effects Writing the PulseWidth register while the counter is active changes the duty cycle of the output This may cause the output to glitch or change inadvertently The A and X registers may be altered by this Document Number 001 13581 Rev F Page 12 of 19 Pe CYPRESS 8 Bit Pulse Width Modulator function FUNCTION PWM16_wReadPulse Width Description Reads the PulseWidth register C Prototype WORD PWM16 wReadPulseWidth Assembly call PWM16 wReadPulseWidth mov wPulseWidth X mov wPulseWidth 1 A Parameters None Return Value The Pulse width value is stored in the PulseWidth register MSB is passed in the X register and LSB is passed in the Accumulator Side Effects The A and X registers may be altered by this function FUNCTION PWM16_wReadCounter Description Reads the Counter reg
161. and determined by device geometry At high frequen cies increased power level reduces the noise spectrum level Figure 3 5 Typical Opamp Noise 1000 100 10 0 001 0 01 Ot wees 1 10 100 February 15 2007 Document No 38 12018 Rev J 34 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 5 AC Low Power Comparator Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C 3 0V to 3 6V and 40 C lt Ta lt 85 C or 2 4V to 3 0V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V at 25 C and are for design guidance only Table 3 22 AC Low Power Comparator Specifications Symbol Description Min Typ Max Units Notes TRLPC LPC response time 50 us 2 50 mV overdrive comparator reference set within VREFLPC 3 4 6 AC Digital Block Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 23 AC Digital Block Specifications Function Description Min Typ Max Uni
162. and has been in force since version 1 0 of PSoC Designer The C compiler automatically takes care of this requirement Assembly language programmers must ensure their code observes the policy too Though some user module API function may leave A and X unchanged there is no guarantee they will do so in the future 8 Bit PWM API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for PWM8 CONSTANT PWM8_PERIOD Description Represents the value chosen for the Period field of the PVWME8 in the Device Editor The value can have a range between 0 and 255 CONSTANT PWM8_PULSE WIDTH Description Represents the value chose for the PulseWidth field of the PWM8 in the Device Editor The value can have a range between 0 and 255 FUNCTION PWM8_Enablelnt Description Enables the interrupt mode operation C Prototype void PWM8 EnableInt void Assembly call PWM8 EnableInt Parameters None Return Value None Document Number 001 13581 Rev F Page 7 of 19 a pr e CYPRESS 8 Bit Pulse Width Modulator Side Effects The A and X registers may be altered by this function FUNCTION PWM8_Disablelnt Description Disables the interrupt mode operation C Prototype void PWM8 DisableInt void Assembly call PWM8 DisableInt Parameters None
163. argos per odos de construcci n de las centrales la mayor parte de los grupos de generaci n que entraron en servicio en el per odo 1973 76 eran grupos de fuel oil ya que respond an a proyectos contratados con anterioridad a la primera crisis Ante sta la sociedad espa ola no reaccion con agilidad el plan energ tico en elaboraci n no fue aprobado hasta 1975 y fue revisado en 1977 La segunda crisis del petr leo en 1979 dio lugar a otro Plan Energ tico PEN 83 en el que ya se tomaron serias medidas para contener la dependencia del petr leo aunque sus frutos no se vieron hasta bien entrada la siguiente d cada Figura 2 3 Central nuclear de Almaraz 24 Pablo Desviat Cruzado E La d cada de los 80 En el mbito de la generaci n el ctrica y en l nea con las propuestas de la Agencia Internacional de la Energ a estos a os se caracterizaron por el desarrollo de tecnolog as que permitieran reducir la dependencia del petr leo En 1980 se promulg la Ley de Conservaci n de la Energ a todav a vigente que persegu a un triple fin reducir la dependencia del petr leo fomentar el ahorro de energ a y promover las fuentes de energ a renovables En l nea con esas directrices en la primera mitad de la d cada entraron en servicio las centrales de carb n nacional de 350 MW que formaban parte del denominado Plan Acelerado de Centrales T rmicas de Carb n y diversos grupos situados en la costa para ut
164. as circunstancias el desarrollo de una planificaci n energ tica Integral obligatoria m s indicativa se acogi desde el sector el ctrico como una iniciativa del Gobierno necesaria para abordar las fuertes transformaciones que se est n dando y que han de tener lugar en el futuro Figura 2 4 Central t rmica de Santurce El nuevo plan energ tico para el per odo 2002 11 realizado durante el presente a o y recientemente aprobado por el Gobierno conlleva un cambio considerable en los modos de acometer el proceso planificador en Espa a En primer lugar hay que se alar que por primera vez se acomete una planificaci n conjunta de las redes de transporte el ctrico y de gas debido l gicamente a la interacci n que se produce al incorporar de forma masiva ese combustible para generaci n el ctrica En segundo lugar hay que se alar el distinto car cter de la planificaci n de dichas redes de transporte respecto a la planificaci n de los medios de generaci n 33 Pablo Desviat Cruzado A el ctrica Mientras la planificaci n de redes tiene car cter vinculante por tratarse de actividades reguladas la de la generaci n que es una actividad liberalizada es meramente indicativa y tiene por finalidad facilitar la toma de decisiones de inversi n por parte de los agentes Por tanto y como consecuencia de lo anterior la planificaci n realizada contiene tanto las propuestas de desarrollo de la redes de transporte
165. ass specific routines or enable unsupported request types Processing of USBFS Device Requests All control transfers including vendor specific and overriden device requests are composed of e A setup stage where request information is moved from host to device e A data stage consisting of zero or more data transactions with data send in the direction specified in the setup stage e A status stage that concludes the transfer In the USBFS User Module all control transfers are handled by the Endpoint 0 Interrupt Service Routine USBFS_EPO_ISR The Endpoint 0 Interrupt Service Routine transfers control of all setup packets to the dispatch routine which routes the request to the appropriate handler based upon the bmRequestType field The handler initializes specific user module data structures and transfers control back to the Endpoint 0 ISR A handler for vendor specific or override device request is provided by the application The user module handles the data and status stages of the transfer without any involvement of the user application Upon completion of the transfer the user module updates a completion status block The status block is monitored by the application to determine if the vendor specific device request is complete All setup packets enter the USBFS_EPO_ISR which routes the setup packet to the USBFS_bmRequestType_Dispatch routine From here all the standard device requests as well as the vendor specific device requests ar
166. at Cruzado A 3 Desconexi n Para salir del programa pulse sobre el bot n Salir apague la tarjeta y desconectela del USB Figura 0 11 Salida del programa 139 Pablo Desviat Cruzado A Parte IV C DIGO FUENTE 140 Pablo Desviat Cruzado Proyecto X10 con PSoc Pablo Desviat Cruzado include lt m8c h gt include PSoCAPI h include usb h extern BYTE SOF Flag extern BYTE USB INTERFAC BYTE lights report E a a SOF_ISR E 0 OUT RPT_DATA 8 a SS SS Unidades 1 2 3 4 de la casa A ink unidadi 1 1 1 0 0 1 1 0 1 0 0 1 0 1 1 0 1 0 0 1 0 1 5 int unidad2 1 1 1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 0 0 1 0 1 int unidad3 11 1 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 0 0 1 0 11 int un idad4 1 1 1 0 0 1 1 0 1 0 0 1 1 0 0 1 1 0 0 1 0 11 int onidad N 11 1 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 0 0 1 1 0 int unidadoFF 11 1 1 0 0 1 1 0 1 0 0 1 0 1 0 1 1 0 1 0 1 01 E E E SS A ES E E E E a E int milisegundo 0 int habitaciones 0 0 0 0 void habit void void pulso void void pasocero void void main ine l d2 1ed3 1ed4 iat TWE d1 1 i 0 dato 0 cuenta 0 M8C_EnableGInt Se habil USB_Start 0 USB_5V_OPERAT PWM8 DisableInt enviadol 0 enviado2 0 enviado3 0 enviado4 Litan interrupciones TION se inicializa m dulo USB deshabilita intrrupci n PWM
167. ation or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may be limited by and subject to the applicable Cypress software license agreement PERFORM 8 Bit Timer Data Sheet Timer8 Copyright O 2000 2009 Cypress Semiconductor Corporation All Rights Reserved PSoC Blocks API Memory Bytes Pins per Resources Digital Analog CT Analog SC Flash RAM External I O CY8C29 27 24 22 21 xxx CY8C23x33 CYWUSB6953 CY7C 64215 CY8CLED02 04 08 16 CY8CLEDO3D 04D CY8CNP102 CY8CTST110 CY8CTMG110 CY8CTST120 CY8CTMG120 CY8CTMA120 CY8C21x45 CY8CTMG300 CY8CTST300
168. attached If the device that you are creating will be self powered you must connect a GPIO pin to Vgus through a resistive network and write firmware to monitor the status of the GPIO Application Note AN15813 Monitoring the EZ USB FX2LP VBUS explains the necessary hardware and software components required You can use the USBFS_Start and USBFS_Stop API routines to control the D and D pin pull ups The pull up resistor does not supply power to the data line until you call USBFS_Start USBFS_Stop disconnects the pull up resistor from the data pin Section 9 1 1 2 in the Universal Serial Bus Specification Revision 2 0 says Devices report their power source capability through the configuration descriptor The current power source is reported as part of a device s status Devices may change their power source at any time e g from self to bus powered The device responds to GET_STATUS requests based on the status set with the USBFS_SetPowerStatus function To set the correct status USBFS_SetPowerStatus should be called at least once if your device is configured as self powered You should also call the USBFS_SetPowerStatus function any time your device changes status Timing The USBFS User Module supports USB 2 0 full speed operation on the CY8C24x94 and CY7C64215 devices Parameters and USBFS Setup Wizard The USBFS User Module does not use the PSoC Designer User Module Parameter Grid Display for personalization Inste
169. can be used alone or combined with other blocks to form 8 16 24 and 32 bit peripherals which are called user module references Digital System Block Diagram Port7 H Port5 L Port3 L Port1 Ports p POr PO rt O DigitalClocks To System Bus FromCore ToAnalog System DIGITAL SYSTEM Digital PSoC Block Array Row0 4 y y y y DBBOO DBBO1 DCBO2 DCBO3 toy y 14 Y uolyeunByuo5 yndino moy Row Input Configuration GIE 7 0 GlobalDigital GOE 7 0 Glo 7 0 Mierconnect haa G00 7 0 Digital peripheral configurations include those listed below Full Speed USB 12 Mbps PWMs 8 to 32 bit PWMs with Dead band 8 to 24 bit Counters 8 to 32 bit Timers 8 to 32 bit UART 8 bit with selectable parity SPI master and slave 12C slave and multi master Cyclical Redundancy Checker Generator 8 to 32 bit IrDA Pseudo Random Sequence Generators 8 to 32 bit The digital blocks can be connected to any GPIO through a series of global buses that can route any signal to any pin The buses also allow for signal multiplexing and for performing logic operations This configurability frees your designs from the con straints of a fixed peripheral controller Digital blocks are provided in rows of four where the number of blocks va
170. cedi a su montaje y ensayo Figura 7 5 Detector de cero montado Una vez conectado a la red el ctrica se obtuvieron los siguientes resultados SM Stop M Pos 0 000s CURSORES CHI 2 00 CH2 5 00 M 250ms CH1 7 288V 5 Sep 09 02 33 lt 10Hz TDS 10028 20 34 06 04 09 2009 Figura 7 6 Detector de cero osciloscopio 89 Pablo Desviat Cruzado L asa Como se puede observar el circuito funciona correctamente salvo por un peque o retraso de 1 7 milisegundos el cu l se ajustara mediante software en la programaci n que se har ya que es un desfase constante 90 Pablo Desviat Cruzado E Do 2 Generador de la se al de 120 KHz Es posible generar la se al de 120kHz con un circuito externo al PSoC Una terminal del PSoC ser a la que habilitara o deshabilitara la generaci n de 120kHz Pero usando uno de los m dulos del PsoC es posible generar esta se al configur ndolo como modulaci n de ancho de pulsos PWM Este m dulo se configura como PWM para que funcione a 120kHz con un tiempo de trabajo al 50 es decir que la se al sea 50 estado alto y 50 estado bajo Es importante que la frecuencia que genere el PSoC est dentro del rango de 2kHz que se establece en el protocolo X10 Para generar esta frecuencia y tiempo de trabajo se tienen las siguientes f rmulas f pwm 120 kHz Trwm 1 120 kHz 8 333 us Se observa que el periodo de PWM es de 8 333ps por lo ta
171. ci n de interfaces a menudo varias las cuales son una colecci n de endpoints EPO siempre y t picamente uno o m s endpoints de datos Cuando se enciende debe dar un descriptor al host y una vez activado puede aceptar datos del PC desde un OUT endpoint y dar datos al PC desde un IN endpoint 110 Pablo Desviat Cruzado 2 Proyecto En la figura siguiente se muestra como es la configuraci n del sistema En futuros desarrollos el PC que posee el PSoC Designer y que alimenta la placa no ser necesaria pues la alimentaci n vendr dada por la fuente que se dise o anteriormente PSoC Designer PC USB ICE cube Mini Target Host PC Programmer Evaluation Board Figura 8 3 Hardware setup Por otro lado se han configura 4 puertos de salida para indicar si las luces de las habitaciones est n encendidas o apagadas Figura 8 4 Conexi n LEDs Lo importante a tener en cuenta del esquema anterior es que con cualquier dise o de un dispositivo USB que se haga siempre se tienen dos 111 Pablo Desviat Cruzado a programas uno en el propio dispositivo y otro en el host Ambos deben poder comunicarse correctamente A continuaci n se muestran dos diagramas programas citados Reporte de botones recibido Dispositivo conectado Buscar dispositivo Esperar de flujo de los Actualizar LEDs y mandar se al X10 Bot n presionado Mandar reporte de botone
172. configura tambi n qu condensador se va a conectar y con qu frecuencia Estos bloques permiten programar componentes tales como filtros convertidores anal gicos digitales 6 14 bits convertidores digitales anal gicos moduladores etc Al objeto de facilitar al usuario el uso de estos bloques Cypress pone a su disposici n bloques digitales y anal gicos previamente configurados llamados User Module UM Estos m dulos ofrecen al desarrollador un amplio abanico de funciones Por otro lado la plataforma gratuita PSOC Designer permite efectuar al usuario una sencilla selecci n colocaci n e interconexi n de los distintos m dulos e introducir posteriormente el c digo en lenguaje C o en lenguaje ensamblador Cada User Module cuenta posteriormente con los API correspondientes es decir el usuario trabaja en el main c activando nicamente funciones por ejemplo para configurar el ciclo de funcionamiento o la frecuencia de salida en caso de utilizar un modulador de ancho de pulso 42 Pablo Desviat Cruzado Spr led PSOC Designer 5 0 File Edit View Project Interconnect Build Debug duda SEL Bh free Global Resources lcd vax Power Setting Vcc Sy 5 0V 24MHz o 7 7 gy OE A a CPU_Clock SysCIk 8 E cf Sleep_Timer 512_Hz 3 _ lt x a EE icd Chip T VC1 SysCIk N 1 M aes 3 a 23 Loadable Configurations E VC2 VC1 N il a y Icd 3User Moduleg VC3 Source SysClk 1 f x E Pca E VC3 Divi
173. control en su forma de ondas portadoras anal gicas de baja velocidad binaria de transmisi n En las redes de media y baja tensi n son los objetivos de la automatizaci n de la distribuci n y la gesti n de la demanda los que activan durante los a os 80 la investigaci n y proyectos de PLC de banda estrecha orientados a la gesti n de las funciones de lectura autom tica de contadores control selectivo de cargas e incluso su uso en la red propietaria de los abonados del servicio el ctrico o dom tica Pero son la liberalizaci n del bucle de abonado de la red de telefon a cl sica y la desregularizaci n del sector el ctrico acontecidas en los a os 90 los que dan nuevos y fuertes impulsos al desarrollo de esta tecnolog a PLC como alternativa barata y universal para llevar servicios de banda ancha directamente al domicilio del abonado Los avances de las t cnicas de modulaci n y codificaci n han permitido alcanzar velocidades considerables a trav s de la red de baja tensi n Todo esto ha redescubierto al Power Line Communications PLC como una tecnolog a de acceso a los servicios de telecomunicaciones que convierte la red de distribuci n el ctrica de baja tensi n en una red de telecomunicaciones apta para la transmisi n de voz y datos Es decir usa una infraestructura existente dedicada al suministro de energ a el ctrica para ofrecer productos de telecomunicaciones con gran valor a adido al usuario final voz datos
174. creaci n del dispositivo El CY8C24894 tambi n incluye un conjunto de recursos como I2C relojes digitales dos MACs POR y un circuito de reset LVD Para este proyecto se compro una placa de evaluaci n donde venia introducido el CY8C24894 concretamente la PsoCEvalUSB Board Power in ISSP connector Serial port 12C connector Buttons ICE Cube connector Joystick Two analog inputs USB connector Jumper matrix CY8C24894 CapSense slider buttons Figura 6 3 Tarjeta PsoCEvalUSB 84 Pablo Desviat Cruzado gt Capitulo 7 AUTOMATIZACI N CON EL PSOC Los microcontroladores PSoC y el protocolo X 10 pueden ser f cilmente usados en la automatizaci n de un hogar El microcontrolador que se va a usar debe ser elegido de acuerdo a su capacidad de memoria de acceso aleatorio RAM memoria de programa ROM frecuencia de operaci n perif ricos y costos de la aplicaci n La familia de los PSoC fue elegida por su versatilidad como microcontroladores multiprop sito memoria FLASH y m ltiples l neas de entrada salida junto con la posibilidad de dise ar circuitos anal gicos como filtros convertidores etc y circuitos digitales temporizadores contadores etc dentro de l El protocolo se utilizar para intercomunicar la mayor a de los dispositivos que trabajar n en la automatizaci n de la vivienda En este apartado se comenta c mo se ha implementado el protocolo X 10 en un
175. cted to the 32 768K internal clock Computed time lapse is 65 535 wCount 32 768 The foreground routine sets and starts the timer The interrupt level routine captures the valu Parameters none Returns none include m8c inc part specific constants and macros include memory inc Constants amp macros for SMM LMM and Compiler include PSoCAPI inc PSoC API definitions for all User Modules export main area bss RAM REL _wElapsedTime wElapsedTime BLK 2 area text ROM REL CON _ Main CapturePulse mov wElapsedTime 0 mov wElapsedTime 1 0 mov A FFh set the period to the maximum mov X FFh lcall Timerl6 WritePeriod mov X 0 set the compare to trigger at 1 mov A 0 lcall Timerl6 WriteCompareValue lcall Timerl6 Enablelnt enable the timer interrupt mask M8C_EnableGInt enable global interrupts lcall Timerl6 Start start the timer timer will start to WaitForCapture mov A wElapsedTime or A wElapsedTime 1 JZ WaitForCapture Evaluate captured value here If wElapsedTime is not gt 1 then compute elapsed time else if wElapsedTime is 1 or 0 then event did not occur within time limit terminate jmp terminate Document Number 001 13625 Rev E Page 28 of 42 E a A cypress 8 Bit Timer PERFOR The interrupt level routine located in the file Timer 6int asm is as follows _Timerl6 ISR 7 PSoC_UserCode BODY Do not change this line
176. culan por los cables de las interferencias electromagn ticas exteriores Por ejemplo los utilizados para la distribuci n de sonido alta fidelidad o datos 4 Par trenzado esta formado por dos hilos de cobre recubiertos cada uno por un trenzado en forma de malla El trenzado es un medio para hacer frente a las interferencias electromagn ticas Por ejemplo los utilizados para interconexi n de ordenadores Coaxial Un par coaxial es un circuito f sico asim trico constituido por un conductor que ocupa el eje longitudinal del otro conductor en forma de tubo manteni ndose la separaci n entre ambos mediante un diel ctrico apropiado Este tipo de cables permite el transporte de las se ales de video y se ales de datos a alta velocidad Dentro del mbito de la vivienda el cable coaxial puede ser utilizado como soporte de transmisi n para 1 Se ales de teledifusi n que provienen de las antenas 2 Se ales procedentes de las redes de TV por cable 70 Pablo Desviat Cruzado E asa 3 Sefiales de control y datos a media y baja velocidad Fibra ptica La fibra ptica es el resultado de combinar dos disciplinas no relacionadas como son la tecnologia de semiconductores que proporciona los materiales necesarios para las fuentes y los detectores de luz y la tecnolog a de guiado de ondas pticas que proporciona el medio de transmisi n el cable de fibra ptica La fibra ptica esta consti
177. d PWM16 DisableInt void Assembly call PWM16 DisableInt Parameters None Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM16_ Start Description Starts the PWM16 User Module If the enable input is high the counter begins to down count C Prototype void PWM16 Start void Assembly call PWM16 Start Parameters None Return Value None Side Effects The A and X registers may be altered by this function FUNCTION PWM16_ Stop Description Stops the counter operation C Prototype void PWM16 Stop void Document Number 001 13581 Rev F Page 11 of 19 BPA Cypress 8 Bit Pulse Width Modulator Assembly call PWM16 Stop Parameters None Return Value None Side Effects The output is reset low and writing to the Period register causes the Counter register to update with the new period value The A and X registers may be altered by this function FUNCTION PWM16_WritePeriod Description Writes the Period register with the period value The period value is transferred from the Period regis ter to the Counter register immediately if the PWM16 is stopped or when the counter reaches the zero count C Prototype void PWM16 WritePeriod WORD wPeriod Assembly mov X wPeriod mov A wPeriod 1 call PWM16 WritePeriod Parameters wPeriod wPeriod value is a value from 0 to 216 1 MSB is passed in the X register
178. d SNR reference Add new 56 pin QFN spec Distribution External Public Posting None February 15 2007 Cypress Semiconductor 2004 2007 Document No 38 12018 Rev J 47 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 7 Sales and Company Information 7 2 Copyrights and Code Protection Cypress Semiconductor Corporation 2004 2007 All rights reserved PSoC Designer Programmable System on Chip and PSoC Express are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corpo rations The information contained herein is subject to change without notice Cypress Semiconductor assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product Nor does it convey or imply any license under patent or other rights Cypress Semiconductor does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress Semiconductor products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges Cypress Semiconductor products are not warranted nor intended to be used for medical life suppo
179. d is in the range of 1 to 5 LCD_DrawBG 0 0 16 72 LCD_DrawBG 1 3 10 32 Examples of Horizontal Bar Graphs Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified Vertical Bar Graph Functions Each display character consists of five horizontal pixels by eight vertical pixels Vertical bar graphs display a set of horizontal lines that are each composed of one vertical pixel by five horizontal pixels within a Document Number 001 13569 Rev E Page 8 of 13 E a S37 cypress LCD Tool Box single character a pixel row Each character can display one to eight horizontal pixel rows where eight pixel rows display the entire character Starting on the bottom of a character the first pixel row is numbered 1 and the last pixel row is numbered 8 Combining two rows can generate a vertical bar graph of 16 pixel rows LCD_InitVBG Description Initializes the LCD to display vertical bar graphs This should be called before calling LCD_DrawVGB This function initializes the custom character RAM with the data required to draw vertical bar graphs C Prototype void LCD InitVBG void
180. d number of bytes from the Endpoint pData WORD wLength RAM and places it in the RAM array pointed to by pSrc The function returns the number of bytes sent by the host Document Number 001 13629 Rev D Page 3 of 26 CYPRESS Basic USBFS Device API continued Function void USB_EnableOutEP BYTE bEPNumber void USB_EnableOutISOCEP BYTE bEPNumber void USBFS DisableOutEP BYTE bEPNumber void USBFS_SetPowerStatus BYTE bPowerStatus USBFS_Force BYTE bState Human Interface Device HID Class Support API Function USBFS Device Description Enables the specified USB endpoint to accept OUT trans fers Disables the specified USB endpoint to NAK OUT transfers Sets the device to self powered or bus powered Forces a J K or SEO State on the USB D D pins Nor mally used for remote wakeup bState Parameters are USBFS FORCE_J 0x02 USBFS FORCE_K 0x01 USBFS_FORCE_SEO 0x00 USBFS FORCE_NONE OxFF Note When using this API Function and GPIO pins from Port 1 P1 2 P1 7 the application uses the Port_1_Data_SHADE shadow register to ensure consis tent data handling From assembly language access the Port_1_Data_ SHADE RAM location directly From C lan guage include an extern reference extern BYTE Port l Data SHADE Description BYTE USBFS_UpdateHIDTimer BYTE binter Updates the HID Report timer for the specified interface and face returns 1 if the timer expired and 0 if not If the timer expired it reloads
181. dInISOCEP Description Loads and enables the specified USB endpoint for an IN Interrupt or Bulk transfer _LoadInEP and Isochronous transfer _LoadInlISOCEP C Prototype void USBFS LoadInEP BYTE bEPNumber BYTE pData WORD wLength BYTE bTog gle void USBFS LoadInISOCEP BYTE bEPNumber BYTE pData WORD wLength BYTE bToggle Assembly mov A USBFS TOGGLE push A mov A 0 push A mov A 32 push A mov A gt pData push A mov A lt pData push A mov A 1 push A call USBFS LoadInEP Parameters bEPNumber is the Endpoint Number between 1 and 4 pData is a pointer to a data array from which the Data for the Endpoint space is loaded wLength is the number of bytes to transfer from the array and then sent as a result of an IN request Valid values are between 0 and 256 bToggle is a flag indicating whether or not the Data Toggle bit is toggled before setting it in the count register For IN transactions toggle the Data bit after every successful data transmission This makes certain that the same packet is not repeated or lost Symbolic names for the flag are provided in C and assembly and their associated values are shown here Mask Value Description USB_NO_TOGGLE 0x00 The Data Toggle does not change USB_TOGGLE 0x01 The Data bit is toggled before transmission Return Value None Side Ef
182. dato 1 pulso pasocero IPF r while i lt 21 envio funcion dato unidadON i if dato 1 pulso asocero f 18e asocero eed H H O Ow BIO ll o se 143 Pablo Desviat Cruzado pasocero pasocero 6 pasos por cero pasocero pasocero pasocero pasocero r enviadol else if led1l 0 amp amp enviadol 1 si estaba encendido if enviadol 1 a gt Habitacion 1 x2 23 gt while i lt 21 envio unidad dato unidadl i if dato 1 pulso pasocero i while i lt 21 envio unidad dato unidadl i if dato 1 pulso pasocero i pasocero 6 pasos por cero pasocero pasocero pasocero f 144 Pablo Desviat Cruzado pasocero pasocero a Apagar 12 53 5 5 3 3 while i lt 21 envio funcion dato unidadOFF i if dato 1 pulso pasocero itt else pasocero i while i lt 21 envio funcion dato unidadOFF i if dato 1 pulso pasocero bey ise asocero Nee HU aO e pasocero 6 pasos por cero pasocero pasocero pasocero pasocero pasocero f LED1 Switch 0 habitaciones 0 0 enviadol 0 habit 145 Pablo Desv
183. de cableado Arquitectura distribuida Es aquella en la que el elemento de control se sit a pr ximo al elemento a controlar Hay sistemas que son de arquitectura distribuida en cuanto a la capacidad de proceso pero no lo son en cuanto a la ubicaci n f sica de los diferentes elementos de control y viceversa En los sistemas de arquitectura distribuida que utilizan como medio de transmisi n el cable existe un concepto a tener en cuenta que es la topolog a de la red de comunicaciones La topolog a de la red se define como la distribuci n f sica de los elementos de control respecto al medio de comunicaci n cable Cada elemento del sistema tiene su propia capacidad de proceso y puede ser ubicado en cualquier parte de la vivienda Esta caracter stica proporciona al instalador dom tico una libertad de dise o que le 67 Pablo Desviat Cruzado A posibilita adaptarse a las caracter sticas f sicas de cada vivienda en particular 68 Pablo Desviat Cruzado Medio de Transmisi n A continuaci n se enumeran los siguientes tipos de medios 1 L neas de distribuci n de energ a el ctrica Corrientes portadoras Si bien no es el medio m s adecuado para la transmisi n de datos si es una alternativa a tener en cuenta para las comunicaciones dom sticas dado el bajo costo que implica su uso dado que se trata de una instalaci n existente por lo que es nulo el costo de la instalaci n Para aquell
184. de gas y electricidad que se corresponden con la planificaci n obligatoria como un conjunto de datos e informaciones sobre las previsiones de fluctuaci n de los vectores que inciden en el sector energ tico con los que definir con mayor precisi n las redes de transporte necesarias y las necesidades de nueva generaci n El resultado del proceso planificador es la definici n de las redes de transporte el ctrico as como los gasoductos de la red b sica y las instalaciones de almacenamiento de gas e indicaciones sobre las necesidades de incorporaci n de potencia al Sistema aunque sin fijar un valor m nimo de dicha incorporaci n As se prev un incremento de las redes de 220 y de 400kV de unos 12 500 Km lo que supone un incremento de un 40 respecto a la situaci n actual Tambi n se prev un aumento de la capacidad de transformaci n de 32 500 MVA 69 con lo que la inversi n en las redes de transporte supondr unos 2 720 millones de euros Adicionalmente ser n necesarias importantes inversiones en el rea de distribuci n que aunque no son contempladas por la planificaci n que se limita a valorar el coste de las redes en niveles de transporte deben ser consideradas si se desea tener una visi n global del nivel de inversiones preciso en el Sistema El ctrico Estas inversiones en distribuci n seg n estimaciones del sector pueden alcanzar los 11 700 millones de euros para el per odo de planificaci n Las in
185. de los circuitos que luego se introducir n en l se van a realizar con un software de la misma compa a el cual puede bajarse libremente de su p gina web Para las pruebas de los circuitos se utilizar un programa tipo CAD como el PSpice de la compa a Cadence 12 Pablo Desviat Cruzado Capitulo 2 ESTADO DEL ARTE 1 Antecedentes La creciente dedicaci n del Homo Erectus a la caza dio origen al desarrollo de una organizaci n social claramente humana basada en una estricta divisi n del trabajo entre hombres cazadores y mujeres que buscaban y recog an el alimento desarrollando un lenguaje que muestra al hombre como el nico animal cultural que pudo sobrevivir y triunfar adaptando su comportamiento m s que su cuerpo a las modificaciones del medio Jonathan N Leonard Una vivienda dom tica se puede definir como aquella vivienda en la que existen agrupaciones automatizadas de equipos normalmente asociados por funciones que disponen de la capacidad de comunicarse interactivamente entre s de un bus dom stico multimedia que las integra Para lograr la intercomunicaci n de estos equipos se cuenta con la transmisi n de informaci n por la l nea de alimentaci n el ctrica Esa informaci n se env a siguiendo las normas del protocolo X 10 que ser explicado posteriormente Este intercambio se logra mediante circuiter a el ctr nica de potencia y microcontroladores PsoC
186. der 1 EN E W avcnciz1 2 SysClk Source Internal Ss E Dacs fi Power Setting Vcc SysCik freq BE lod Pinout A Selects the nominal operation voltage and System Clock SysCIk icd 2 source from which many intemal clocks V1 V2 V3 and CPU cloc 4 z Properties DAC6_1 vax 7 g User Module DACS a vow E ersion 4 3 f A e AnalogBus l E A m ClockPhase Normal Dar cpio y User Modules AX User Module j p 1 Cap Sensors User Module name iil H i E Counters a y DACs gt gt i a DACE Pinout led vax sa DACS f 4 z 2 DACI E Poo Port_0_0 StdCPU High Z Analog Dis 7 7 p macs Pon Port_0_1 StdCPU High Z Analog Dis aE pace PO 2 Port_0_2 StdCPU High Z Analog Dis v Pep y Output Start Page Icd Chip IA Program Tools Window Help e ee c teje x ARA 4 gt x Workspace Explorer IX E Workspace led 1 project a iy lod CY8C24794 24LFXI Added DAC6 User Module Figura 2 7 Ejemplo proyecto PSoC En el ejemplo que se presenta se lleva una se al de entrada anal gica a un amplifcador programable mediante un multiplexor de cuatro canales Seguidamente se lleva la se al amplificada a un convertidor anal gico digital y dicha se al digitalizada queda a la disposici n del microcontrolador En este ejemplo se ha colocado adem s un convertidor digital anal gico que emite una se al anal gica
187. dese 11 A A NR AN 12 Cap tulo 2 gt Estado del afte ii a ios 13 T Antecedentes ienne iced sas cada vets eE aedasts selsveaeecacndenes 13 2 Historia y panorama actual del sistema el ctrico espafiol s000 15 3 Historia del protocolo X 10 sc cccscescscadscccsasecesescvcassscatsssasnscased iria 37 4 Programmable System on ChiP ccooccoocnnonanonnnnonnconnononanonanconnccnncconanonnacono 40 5 Estudio de las tecnolog as existentes en ESpa a occooonoocnnonnnonnnconnnonnanono 45 Capitulo 3 Estructura y organizaci n del proyecto oommmmmmmmm 60 Capitulo 4 LA DOM TICA ratita dr 62 1 Introduccion ai 62 2 Caracter sticas de la dOM iCA ucoooocooonoonnnonnnonnncnnnnconaconnncnnnconnnconacoonnnono 64 3 Gesti n dela domi coi 65 4 Descripci n del sistema dOM tiCO oocccooooononconnconnnnonanonancnanonanaconaconnanono 67 5 Protocolo de COMUMICACIONES scsscesssecssesssecsssecsssceesescesssseesessssseesees 74 Cap tulo 5 Elprotocolo X TV aa 75 T Estudi CON Citi ii 75 A O o AA esas sus sndseeoavons dhesate 80 Capttulo 6 POCA a 82 Capitulo 7 Automatizaci n con el PSOC wssessscrerserersescrersersssereescsceseseeees 85 1 Detector de cruce por Cer sieiccsccesetieaiesccsscivacdeisessseaisssacsedteasdetadaeseaed eaasdns 87 2 Generador de la se al de 120 KHZ oocnoocncocnoonnnonnnconnncnnnconnnconaconaccnnnoonos 91 3 Fuente de 5 V sin transformador coooccoocnoonanonnnonnnnnnnnoonanonanonononanaconaconnano
188. devices along with the thermal impedance for the pack age and solder reflow peak temperatures Important Note Emulation tools may require a larger area on the target PCB than the chip s footprint For a detailed description of the emulation tools dimensions refer to the document titled PSoC Emulator Pod Dimensions at http www cypress com design MR10161 4 1 Packaging Dimensions Figure 4 1 56 Lead 8x8 mm QFN TOP_VIEW IDE VIEW BOTTOM VIEW alo os 0 003 c CORD 1 00 0 039 MAX 4 0 05 0 002 MAX 0 20 0 008 REF 0 80 0 031 MAX PIN1 ID 0 200 008 R ZYN ANN N 0 45 0 018 e SM ERR 0 24 0 009 4x id a ONN PLANE Ty 0sa oo20 a sata 0 60 0 024 6 55 0 258 1 o so o 031 2 DIA i 6 55 0 258 R KA 7 80 0 307 ki 4 1 8 10 0 319 NOTES 1 B HATCH AREA IS SOLDERABLE EXPOSED METAL 2 REFERENCE JEDEC MO 220 3 PACKAGE WEIGHT 0 162g 4 ALL DIMENSIONS ARE IN MM MIN MAX 5 PACKAGE CODE PART DESCRIPTION LF56A STANDARD LY56A PBFREE 001 12921 February 15 2007 Document No 38 12018 Rev J 39 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 4 Packaging Information Figure 4 2 68 Lead 8x8 mm x 0 89 mm QFN TOP VIEW SIDE VIEW BOTTOM VIEW 7 90 0 311 8 10 0 319 Aajo o8 c 5 69 7 70 0 303 0 9 0 035 MAX 4 7 80 0 307 0 05 0 002 MAX a ls
189. do o manejar la intensidad de dicha luz y que este mismo mando sirva para actuar sobre el televisor para cambiar los canales o actuar sobre el DVD sin necesidad de cambiar de mando Ahorro Energ tico puede adecuar el sistema para que a determinadas horas ponga en funcionamiento alg n tipo de elemento o que encienda o apague las luces seg n se crea necesario se sale de la vivienda y se desea que al regreso la vivienda est con una temperatura agradable ya no es necesario que al salir se deje la calefacci n funcionando s lo se necesitar a realizar una llamada telef nica antes de regresar para poner en marcha la calefacci n 53 Pablo Desviat Cruzado E Los elementos de un sistema dom tico son Controladores Son los que permiten actuar sobre el sistema bien de una forma autom tica por decisi n tomada por centrales dom ticas previamente programadas que incluso puede ser un PC pulsadores teclados pantallas t ctiles o no mandos a distancia por infrarrojos IR locales por radiofrecuencia RF hasta 50 metros por tel fono SMS o por PC de forma local e incluso a trav s de Internet Estos elementos emiten rdenes que necesitan un medio de transmisi n Medio de transmisi n Seg n la tecnolog a aplicada existen distintos medios fibra ptica bus dedicado red el ctrica l nea telef nica TCP IP por el aire Actuadores reciben las rdenes y las transforman en se ales de aviso r
190. e Power Low z 0 6 2 Power High 0 6 Q VOHIGHOB High Output Voltage Swing Load 32 ohms to Vdd 2 Power Low 0 5 x Vdd 1 1 v Power High 7 _ v 0 5 x Vdd 1 1 VoLowoB Low Output Voltage Swing Load 32 ohms to Vdd 2 Power Low 0 5 x Vdd 1 3 V Rower High g gt 0 5 x Vdd 1 3 V lsob Supply Current Including Bias Cell No Load Power Low 1 1 5 1 mA Power High 2 6 8 8 mA PSRRog Supply Voltage Rejection Ratio 53 64 dB 0 5 x Vdd 1 3 lt Voyy lt Vdd 2 3 Table 3 11 3 3V DC Analog Output Buffer Specifications Symbol Description Min Typ Max Units Notes VosoB Input Offset Voltage Absolute Value 3 12 mV TCVosos Average Input Offset Voltage Drift 6 uV C Vemos Common Mode Input Voltage Range 0 5 Vdd 1 0 V Routos Output Resistance Power Low 1 Q Power High 1 Q VoHIGHOB High Output Voltage Swing Load 1K ohms to Vdd 2 Power Low 0 5 x Vdd 1 0 V mower High 0 5 x Vdd 1 0 7 F v VoLowos Low Output Voltage Swing Load 1K ohms to Vdd 2 Power Low 0 5 x Vdd 1 0 V Power High z 0 5 x Vad 1 0 V Isog Supply Current Including Bias Cell No Load Power Low 0 8 2 0 mA Power High 2 0 4 3 mA PSRRos Supply Voltage Rejection Ratio 34 64 dB 0 5 x Vdd 1 0 lt Voyr lt 0 5 x Vdd 0 9 February 15 2007 Document No 38 12018 Rev J 27 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3
191. e defined in the user module instance s C and assembly language interface files the h and inc files Function Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 Timer8 Type Type Function Register Bank 1 Block Bit 7 6 5 4 3 2 1 Data Invert BCEN 1 Compare Interrupt 0 0 Timer8 Type Type BCEN gates the terminal count output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the capture input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal To or Less Than The InterruptType flag determines whether to trigger the interrupt on the compare event or on the terminal count also see Capturelnt in the Control register Both CompareType and InterruptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 Timer8 Capture Clock Capture selects the data input from one of 16 sources Clock selects the clock input from one of 16 sources Both parameters are set in the Device Editor Output Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 Timer8 0 0 0 0 0 OutEnable OutputSelect Output Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 Timer8 AuxClk AuxEnable AuxSelect OutEnable Outp
192. e API routines for the USB user modules are not reentrant Because they depend on internal global variables in RAM executing these routines from an interrupt is not supported by the API support supplied with this user module If this is a requirement for a design contact the local Cypress Field Application Engineer Basic USBFS Device API Function Description void USBFS_Start BYTE bDevice BYTE bMode Activate the user module for use with the device and spe cific voltage mode void USBFS_Stop void Disable user module BYTE USBFS_bCheckActivity void Checks and clears the USB bus activity flag Returns 1 if the USB was active since the last check otherwise returns 0 BYTE USBFS_bGetConfiguration void Returns the currently assigned configuration Returns 0 if the device is not configured BYTE USBFS_bGetEPState BYTE bEPNumber Returns the current state of the specified USBFS endpoint 2 NO_EVENT_ALLOWED 1 EVENT PENDING 0 NO_EVENT_PENDING BYTE USBFS_bGetEPAckState BYTE bEPNumber Identifies whether ACK was set by returning a non zero value BYTE USBFS_wGetEPCount BYTE bEPNumber Returns the current byte count from the specified USBFS endpoint void USBFS_LoadInEP BYTE bEPNumber BYTE Loads and enables the specified USBFS endpoint for an IN pData WORD wLength BYTE bToggle transfer void USB_LoadInISOCEP BYTE bEPNumber BYTE pData WORD wLength BYTE bToggle BYTE USBFS_bReadOutEP BYTE bEPNumber BYTE Reads the specifie
193. e Code 1 Create a new project with a base part supported by the USBFS User Module such as CY8C24894 2 In the Device Editor click Protocols and add the USBFS User Module 3 Right click the USBFS icon and select the USB Setup Wizard 4 Select the Human Interface Device HID radio button Optional step rename the User Module from USBFS_1 to USBFS to match sample code 5 Right click the USBFS User Module icon in the Device Editor to open the USBFS Setup Wizard Document Number 001 13629 Rev D Page 14 of 26 Re S37 cypress USBFS Device Click the Import HID Report Template operation and make the name Import HID Report Template italics to show that it is a label Select the 3 button mouse template Click the Apply operation on the right side of the template Select the Add String operation to add Manufacturer and Product strings Edit the device attributes Vendor ID Product ID and select strings Edit the interface attributes select HID for the Class field Edit the HID class descriptor select the 3 button mouse for the HID Report field Click OK to save the USB descriptor information 6 Generate the Application Copy the Sample code and paste it in the main c 8 Do a Rebuild all Descriptor Data USB user module descriptor root Device name Device descriptor Device Device attributes Vendor ID Use company VID Product ID Use product PID Device release bcdDevice 0000 Device class Defined in interface
194. e dispatched The device request handlers must prepare the application to receive data for control writes or prepare the data for transmission to the host for control reads For no data control transfers the handler extracts information from the setup packet itself Document Number 001 13629 Rev D Page 20 of 26 Re S37 Cypress USBFS Device The USBFS User Module processes the data and status stages exactly the same way for all requests For data stages the data is copied to or from the control endpoint buffer registers EPODATAO EPODATA7 depending upon the direction of the transaction Vendor Specific Device Request Dispatch Routines Depending upon the application requirements the USBFS User Module dispatches up to eight types of vendor specific device requests based upon the bmRequestType field of the setup packet Refer to section 9 3 of the USB 2 0 specification for a discussion of USB device requests and the bmRequestType field The eight types of vendor specific device requests the USBFS User Module dispatches are listed in the table Vendor Specific Request Dispatch Routine Names Vendor Specific Request Dispatch Routine Names Direction Recipient Dispatch Routine Entry Point Enable Flag Host to Device Device USB_DT_h2d vnd_dev Dispatch USB_CB h2d_vnd_dev E Interface USB_DT_h2d_vnd_ifc_Dispatch USB_CB_h2d_vnd_ifc Control Write Endpoint USB_DT_h2d vnd_ep Dispatch USB_CB_h2d_vnd_ep Other USB_DT_h2d_vnd_oth
195. e funciones Gracias a la flexibilidad que supone el ser un sistema escalable resulta todo un interesante y nuevo mundo de bricolaje tanto en seguridad dom stica como en confort ahorro energ tico comunicaci n e incluso ocio pudiendo manejar a distancia el DVD las fotos v deos y canciones 51 Pablo Desviat Cruzado mp3 almacenadas en nuestro PC para visionarlas en el home cinema de nuestro sal n Para poder dise ar un sistema dom tico X 10 se necesita una serie de conceptos que son los que se pretenden transmitir en esta secci n Un sistema dom tico en su versi n puramente electr nica es cualquier soluci n que permita el control de sistemas instalados en el hogar En su concepto m s b sico y elemental permite la gesti n integrada de persianas toldos cortinas electrov lvulas motorizadas en dos sentidos de actuaci n luces equipos electr nicos aparatos de radio electrov lvulas calderas de calefacci n cafeteras cuya actuaci n sea encendido apagado En un sentido m s amplio de dom tica el sistema se integra con Seguridad T cnica protecci n contra fugas de agua gas concentraciones da inas de emisiones naturales de gases como es el caso del granito o artificiales como es el caso de CO por ejemplo en garajes detecci n de humo y fuego Seguridad contra intrusi n Teleasistencia Control de calefacci n Sistemas de Ocio como la televisi n el v deo los canales parab
196. e similar functions enabled February 15 2007 Document No 38 12018 Rev J 23 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 3 2 DC General Purpose IO Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 5 DC GPIO Specifications Symbol Description Min Typ Max Units Notes Rpy Pull Up Resistor 4 5 6 8 kQ Rpp Pull Down Resistor 4 5 6 8 kQ Vou High Output Level Vdd 1 0 V IOH 10 mA Vdd 4 75 to 5 25V 8 total loads 4 on even port pins for example PO 2 P1 4 4 on odd port pins for example PO 3 P1 5 80 mA maximum combined IOH budget VoL Low Output Level 0 75 Vv IOL 25 mA Vdd 4 75 to 5 25V 8 total loads 4 on even port pins for example PO 2 P1 4 4 on odd port pins for example PO 3 P1 5 200 mA maximum combined IOL budget Vi Input Low Level 0 8 V Vdd 3 0 to 5 25 Vin Input High Level 2 1 V Vdd 3 0 to 5 25 Vu Input Hysterisis 60 mV lit Input Leakage Absolute Value 1 nA Gross tested to 1 A Cin Capacitive Load on Pins as Input 3 5 10 pF Package and pin dependent Temp 25 C Cour Cap
197. ecursos de programa por lo que sigue habiendo 4 bloques digitales y 6 bloques anal gicos libres Si se selecciona el modulo de USB se puede elegir una opci n del men desplegable que aparece al pinchar con el bot n derecho del rat n que se llama USB Setup Wizard Aqu aparecen los descriptors del USB que se describieron en el apartado anterior y es aqu d nde introducimos lo que hace nuestro dispositivo y lo que no Descriptor Data E USB User Module Descriptor Root USB ls Device Descriptor Device EU Device Attributes Vendor ID 4242 3 Product ID EEO1 Y Device Release bedDevice 0100 Y Device Class Subclass Manufacturer String Product String Serial Number String a Configuration Descriptor El Configuration Attributes Y Configuration String C Max Power m 9 Device Power 3 Remote Wakeup E Interface Descriptor E Interface Attributes Y Interface String Y Class Y Subclass EQ HID Class Descriptor Y Descriptor Type C Country Code HID Report E Endpoint Descriptor Ei Endpoint Attributes Endpoint Number Direction Y Transfer Type 1 Interval Y Max Packet Size String LANGID Defined in Interface Descriptor No Subclass Configuration No String X 100 Bus Powered x Disabled Interface No Strin X HID No Subclass X Report Not Supported BytelN and ByteOUT Endpoint X EPI IN INT 50 1 Ei String Descriptors USB LANGID English United States
198. ed in the file Timer32int asm is as follows _Timer32 I PSoOC SR _UserCode BODY Do not change this line r Inse rt your custom code below this banner A NO th push push mov call TE interrupt service routines must preserve e values of the A and X CPU registers X A X dwElapsedTime Timer32 ReadTimer call pop pop Timer32 Stop A X rt your custom code above this banner r Inse r QPSoC_UserCode END Do not change this line reti The same code include include DWORD void main in C is as follows Note that the interrupt routine must be written in assembly lt m8c h gt part specific constants and macros PSoCAPI h PSoC API definitions for all User Modules dwElapsedTime Timer32 WritePeriod Oxffffffff Timer32 WriteCompareValue 0xff0bdc00 Timer32 Enablelnt M8C_EnableGInt Timer32 Start while dwElapsedTime 0 Document Number 001 13625 Rev E Page 33 of 42 cr PRESS 8 Bit Timer Configuration Registers 8 Bit Timer Configuration Registers The 8 bit Timer uses a single digital PSoC block named Timer8 Each block is personalized and parameterized through seven registers The following tables give the personality values as constants and the parameters as named bitfields with brief descriptions Symbolic names for these registers ar
199. egulaci n o conmutaci n Los actuadores ejercen acciones sobre los elementos a controlar en el hogar Sensores Son los ojos del sistema o la adquisici n de datos del sistema pueden ser todo lo sofisticados que queramos lo necesario es que lo pueda entender el sistema Estos datos pueden ser rdenes directas a los Actuadores o pueden ir previamente a una central dom tica en funci n de la programaci n en ella introducida saldr la orden final al Actuador correspondiente Ejemplos de sensores son los detectores de fuga de agua de gas de humo y o fuego de concentraci n de CO de movimiento o intrusi n los termostatos Elementos externos Los elementos y o sistemas instalados en el hogar que son controlados por el sistema dom tico El medio de transmisi n en el sistema X 10 es la red el ctrica de 230 V de la vivienda en una instalaci n monof sica las rdenes se propagan 54 Pablo Desviat Cruzado 2 en todas direcciones pasando incluso por los magnetot rmicos La red el ctrica para X 10 seria el equivalente al Bus de otros sistemas como EIB o LonWorks claro esta salvando las distancias A continuaci n se presenta un esquema b sico de una instalaci n X 10 la cual puede aclarar dudas sobre los beneficios y comodidades que puede brindar este sistema adem s se podr observar algunas de las aplicaciones que se pueden realizar en el hogar ESTRUCTURA DEL SISTEMA X 10 Sens
200. el CY8C24794 24L 3 Sleep_Timer 512 Hz 3 WT 4 f Example Chip VC1 SysClk N E i a Loadable Configurations 5 guau 3aaysey VC2 VC1 N a examplel 8 UserM 3 VC3 Source BE tcp C3 Divider en 1 LEDI SysCk Source _ Internal pe z fon E Lep2 LED3 Power Setting Vcc SysClk freq Selects the nominal operation voltage LED4 and System Clock SysCik source from PWM which many internal clocks 1 W2 Y3 Timer8 and CPU clocks are derived USB Registers Affected a e g Example1 Pinout CPU_SCR1 E 7 VBG_TR 1 e ee on Examplet IMO_TR w i a 1232W SDANOSSY 231420 User Modules da User Modules Y ADCs E Amplifiers E Analog Comm E Cap Sensors E Counters Pinout examplel Y AX E DACs Port_0_0 GlobalOut 3 E Digital Comm MPN Port N1 HAPI His Ea Eiltaro Output Ready Properties Timer8 Name Timer8 Figura 7 10 Bloques en PSoC Como se puede observar se han utilizado un bloque de PWM de 8 bits un Timer de 8 bits un LCD 4 LEDs y un bloque de USB Todos ellos se explicar n a continuaci n salvo el bloque de USB que se explicar en el siguiente cap tulo Observese como han quedado libres todos los bloques anal gicos parte inferior del esquema as como dos bloques digitales parte superior 96 Pablo Desviat Cruzado Ep a A Recursos generales del PsoC Antes de poder utilizar los bloques hay que especificar unos pa
201. ementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Currently only the IDX_PP page pointer register is modified Document Number 001 13625 Rev E Page 21 of 42 cr PRESS 8 Bit Timer 32 Bit Timer API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for Timer32 CONSTANT Timer32_PERIOD Description Represents the value chosen for the Period field of the Timer32 in the Device Editor The value can have a range between 0 and 4294967295 CONSTANT Timer24_COMPARE_VALUE Description Represents the value chose for the PulseWidth field of the Timer32 in the Device Editor The value can have a range between 0 and 4294967295 FUNCTION Timer32_Enablelnt Description Enables the interrupt mode operation Note however that global interrupts must also be enabled before interrupts will actually be serviced C Prototype void Timer32 Enablelnt void Assembly call Timer32 Enablelnt Parameters None Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by
202. en correctamente se llevaran a una tarjeta de desarrollo llamada PSoC cuyas caracter sticas se comentar n posteriormente En cuanto a la conexi n por USB con el ordenador se seguir un procedimiento similar a los anteriores m dulos M s tarde se pensar y programar un driver que haga posible la conexi n entre el dispositivo a construir y el ordenador Por ltimo se programar en visual basic o alg n lenguaje de programaci n similar un entorno gr fico que permita al usuario interactuar con el dispositivo de una forma sencilla e intuitiva Una vez creados todos estos m dulos se proceder al ensamblaje de todos ellos para formar el dispositivo final 11 Pablo Desviat Cruzado E Do 4 Recursos Entre los recursos que se utilizar n en este proyecto el principal de ellos es una tarjeta PSoC Programmable System on Chip de la compa a Cypress En concreto se usar la tarjeta PSoCEvalUSB ya que entre muchas de sus caracter sticas se encuentra la posibilidad de conectarse mediante USB Tambi n dispone de un modulo LCD potenci metros LEDs e incluso una protoboard en el caso de que fuera necesaria La principal ventaja de esta placa es que nos va a permitir introducir todos los circuitos anal gicos de nuestro dise o en un microchip por lo que el n mero de componentes a utilizar se reducir y por tanto el tama o del dispositivo final La programaci n de dicho microchip as como los dise os
203. encargados de decodificar y o codificar la informaci n a transmitir En este apartado se tratar n a modo de situar al lector dentro del mbito donde se ubica este proyecto la energ a el ctrica en Espa a el 13 Pablo Desviat Cruzado desarrollo del protocolo X 10 y el desarrollo de los microcontroladores PsOC de Cypress Posteriormente se proceder a comentar el estado actual de las tecnologias basadas en el envio de informacion a trav s de la red el ctrica 14 Pablo Desviat Cruzado A 2 Historia y panorama actual del sistema el ctrico espa ol El siglo XIX La primera referencia de la aplicaci n pr ctica de la electricidad en Espa a data del a o 1852 en el que el farmac utico Domenech en Barcelona fue capaz de iluminar su botica empleando un m todo de su invenci n En Madrid ese mismo a o se hicieron pruebas de iluminaci n empleando una pila galv nica en la plaza de la Armer a y en el Congreso de los Diputados Ya en 1873 se import una peque a dinamo para la Escuela de Ingenieros Industriales de Barcelona y en 1875 se import una segunda m quina que instalada en la fragata Victoria anclada a tres kil metros de Barcelona y accionada por medio de la m quina de vapor de la fragata logr iluminar las Ramblas la Boquer a el Castillo de Montjuic y parte de los altos de Gracia A partir del a o siguiente comienza la electrificaci n industrial en Esp
204. ennnendtarcenesiae 44 5 3 1 CY3210 MiniProg1 5 32 CY3210 PSoCEval1 5 3 3 CY3214 PSoCEvalUSB 5 4 Device Programmers 44 5 4 1 CY3216 Modular Programmer nocoiccicccicnicncancnos mo 44 5 4 2 CY3207ISSP In System Serial Programmer ISSP 44 5 5 Accessories Emulation and Programming 00 0c ee 45 56 3id Party TOONS seccion 5 7 Build a PSoC Emulator into Your Board Ordering Information 6 1 Ordering Code Definitions Sales and Company Information oumoncnnconnnnnisnnnaninanacananananac nac nananacas 47 7 1 REVISION HISTON aria ri ia 47 7 2 Copyrights and Code Protection omommmmnonmmmamma snmmasm m9m sa 48 February 15 2007 Document No 38 12018 Rev J 8 1 Pin Information This chapter describes lists and illustrates the CY8C24x94 PSoC device family pins and pinout configuration The CY8C24x94 PSoC devices are available in the following packages all of which are shown on the following pages Every port pin labeled with a P is capable of Digital IO However Vss Vdd and XRES are not capable of Digital lO 1 1 56 Pin Part Pinout Table 1 1 56 Pin Part Pinout QFN See LEGEND details and footnotes in Table 1 2 on page 10 En __ Type Name Desorption CY8C24794 56 Pin PSoC Device o
205. ents To put the USB SIE and transceiver into power down mode the application calls M8C_Sleep macro and the USBFS_bCheckActivity API to detect USB activity The sleep macro disables the USBFS block but maintains the current USB address in the USBCR register USBFS Resume While the device is suspended it periodically checks to determine if the conditions to leave the suspended state were met One way to check resume conditions is to use the sleep timer to periodically wake the device If the resume conditions were met the application exits the sleep loop which enables the USBFS SIE and Transceiver bringing them out of power down mode It does not change the USB address field of the USBCR register maintaining the USB address previously assigned by the host USBFS Remote Wakeup If the device supports remote wakeup the application is able to determine if the host enabled remote wakeup with the USBFS_bRWUEnabled API function When the device is suspended and it determines the conditions to initiate a remote wakeup are met the application uses the USBFS_Force API function to force the appropriate J and K states onto the USB Bus signaling a remote wakeup Creating Vendor Specific Device Requests and Overriding Existing Requests The USBFS User Module supports vendor specific device requests by providing a dispatch routine for handling setup packet requests You can also write your own routines that override any of the supplied standard and cl
206. er module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned control to its caller The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions 16 Bit Timer API Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level The following are the API programming routines provided for Timer16 CONSTANT Timer16_PERIOD Description Represents the value chosen for the Period field of the Timer16 in the Device Editor The value can Document Number 001 13625 Rev E Page 12 of 42 cr PRESS 8 Bit Timer have a range between 0 and 65535 CONSTANT Timer16_COMPARE_VALUE Description Represents the value chose for the PulseWidth field of the Timer16 in the Device Editor The value can have a range between 0 and 65535 FUNCTION Timer16_Enablelnt Description Enables the interrupt mode operation Note however that global interrupts must also be enabled before interrupts will actually be serviced C Prototype void Timerl6 Enablelnt void Assembly Call Timer16 Enablelnt Parameters None Return Va
207. er to restore the Compare register the user module itself is tempo rarily disabled This may cause the Count register to miss one or more counts The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_wReadTimer Description Reads the current Timer16 Count register value This performs a software solicited hardware syn chronous counter capture operation This is the preferred method of reading the Count registers pro viding that the Compare registers are not required to be preserved Note that this API routine used to be called wCaptureCounter Document Number 001 13625 Rev E Page 16 of 42 E E 24 CY PRESS 8 Bit Timer C Prototype WORD Timerl6 wReadTimer void Assembly call Timerl6 wReadTimer mov wCount X MSB returned in X mov wCount 1 A LSB returned in A Parameters None Returns wCount Count register contents MSB is passed in the X register and LSB is passed in the Accumula tor Side Effects Compare register contents are lost The compare condition becomes true immediately or on the next Timer input clock cycle depending on whether the Compare Type parameter is set to Less than or Equal to or Less Than
208. er8 API Control Register CRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 Timers 0 0 0 0 0 0 0 Enable Enable indicates that the Timer8 is enabled when set It is modified by using the Timer8 API 16 Bit Timer Configuration Registers The 16 bit Timer uses two digital PSoC blocks In placement order from left to right they are named Timer16_LSB and Timer16_MSB Each block is personalized and parameterized through 7 registers The following tables give the personality values as constants and the parameters as named bitfields with brief descriptions Symbolic names for these registers are defined in the user module instance s C and assembly language interface files the h and inc files Function Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 1 Compare 0 0 0 0 LSB Type Document Number 001 13625 Rev E Page 35 of 42 cr PRESS 8 Bit Timer Function Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type Data Invert BCEN 1 Compare 0 0 0 0 LSB Type BCEN gates the terminal count output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the capture input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal To or Less Than The
209. erved If the Compare register con tents do not need to be preserved then using the ReadTimer function is preferred Note that this API routine used to be called ReadCounter C Prototype void Timer32 ReadTimerSaveCV DWORD pdwCount Assembly mov X pdwCount X points to the return buffer call Timer32 ReadTimerSaveCv Parameters None Return Value pdwCount Count register contents The X register is loaded with the address of the return buffer Side Effects In order to read the value of the Count register its value must be momentarily transferred to the Com pare register before it can be returned This causes the compare condition to become true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned to the caller and even before it has restored the Compare register to its previous state Interrupts are momentarily disabled Finally in order to restore the Compare register the user module itself is tempo rarily disabled This may cause the Count register to miss one or more counts The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8C
210. es an interrupt controller with up to 20 vectors to simplify programming of real time embedded events Program execution is timed and protected using the included Sleep and Watch Dog Timers WDT Memory encompasses 16K of Flash for program storage 1K of SRAM for data storage and up to 2K of EEPROM emulated using the Flash Program Flash utilizes four protection levels on blocks of 64 bytes allowing customized software IP protection The PSoC device incorporates flexible internal clock genera tors including a 24 MHz IMO internal main oscillator accurate to 8 over temperature and voltage The 24 MHz IMO can also be doubled to 48 MHz for use by the digital system A low power 32 kHz ILO internal low speed oscillator is provided for the Sleep timer and WDT The clocks together with program mable clock dividers as a System Resource provide the flexi bility to integrate almost any timing requirement into the PSoC device In USB systems the IMO will self tune to 0 25 accu racy for USB communication PSoC GPIOSs provide connection to the CPU digital and analog resources of the device Each pin s drive mode may be selected from eight options allowing great flexibility in external interfac ing Every pin also has the capability to generate a system inter rupt on high level low level and change from last read The Digital System The Digital System is composed of 4 digital PSoC blocks Each block is an 8 bit resource that
211. es mixtas con un microcontrolador de 8 bits y memoria flash El PsoC no tiene perif ricos definidos sino que se compone de los denominados bloques anal gicos y digitales que el usuario puede ir configurando y conectando La configuraci n no se efect a en el nivel de puertas sino en el nivel fucional 40 Pablo Desviat Cruzado E Para poder adaptarse lo mejor posible a los requisitos de la aplicaci n Cypress ofrece distintas familias de PsoC compatibles que se diferencian en el tama o de la memoria flash RAM y en el n mero de bloques anal gicos y digitales Por ejemplo el modelo m s peque o dispone de una memoria flash de 4 kB 256 bytes de memoria RAM 4 bloques digitales y 4 anal gicos El modelo m s grande hasta la fecha ofrece una memoria flash de 32 kB 2kB de memoria RAM 16 bloques digitales y 12 anal gicos Las distintas familias de PsoC ofrecen tambi n distintos tipos de encapsulado Cada elemento dispone por defecto de un interfaz I2C esclavo maestro multimaestro Debido a la versatilidad del PsoC suele implementarse como una especie de pe n de un microcontrolador principal Por ejemplo en los m dulos m s grandes CY8C29xxx se puede disponer de moduladores de ancho de pulso de 16 x 8 bits o 8 x 16 bits de un convertidor anal gico digital un amplificador programable un comparador y un interfaz I C Tambi n es posible colocar un dispositivo a modo de elemento de supervisi n
212. ess Than or Equal To condition Interrupts may be generated based on terminal count and compare signals Some device families offer two additional features The interrupt options include interrupt on capture and in addition the compare signal may be routed onto the row buses If these options are available on your chosen device they will be shown in the Device Editor Cypress Semiconductor Corporation 198 Champion Court San Jose CA 95134 1709 408 943 2600 Document Number 001 13625 Rev E Revised June 16 2009 a SBP cypress 8 Bit Timer ee Down plc egister Counter egister n Data Capture Capture Count Clock F Load TC Output Global Bus Interrupt Period Register Down eg Counter Interrupt Data Capture Capture Count Clock Terminal Load TC i A Count Out Timer Block Diagram Devices Without Terminal Count Output Data Path width n 8 16 24 or 32 Compare Out Row Bus Functional Description The Timer User Module employs from one to four digital PSoC blocks each contributing 8 bits to the total resolution To form timers that exceed 8 bits consecutive blocks are linked so their internal carry terminal count and compare signals are synchronously chained This concatenates the 8 bit Count Period and Compare registers Data registers DRO DR1 and DR2 respectively from block to block to provide the required resolution In this way Timers wider th
213. et Voltage Drift 7 0 35 0 V C leBOA Input Leakage Current Port O Analog Pins 20 pA Gross tested to 1 uA Cinoa Input Capacitance Port 0 Analog Pins 4 5 9 5 pF Package and pin dependent Temp 25 C Vomoa Common Mode Voltage Range 0 2 Vdd 0 2 V The common mode input voltage range is measured through an analog output buffer The specification includes the limitations imposed by the characteristics of the analog output buffer GoLoA Open Loop Gain 2 dB Power Low Opamp Bias Low 60 Power Medium Opamp Bias Low 60 Power High Opamp Bias Low 80 VOHIGHOA High Output Voltage Swing internal signals Power Low Opamp Bias Low Vdd 0 2 V Power Medium Opamp Bias Low Vdd 0 2 V Power High is 5V only Vdd 0 2 V VoLowoA Low Output Voltage Swing internal signals Power Low Opamp Bias Low 0 2 V Power Medium Opamp Bias Low 0 2 V Power High Opamp Bias Low 0 2 V Ison Supply Current including associated AGND buffer Power Low Opamp Bias Low 400 800 uA Power Low Opamp Bias High 500 900 uA Power Medium Opamp Bias Low 800 1000 uA Power Medium Opamp Bias High 1200 1600 uA Power High Opamp Bias Low 2400 3200 uA Power High Opamp Bias High 4600 6400 uA PSRRoa Supply Voltage Rejection Ratio 65 80 dB Vss lt VIN lt Vdd 2 25 or Vdd 1 25V lt VIN lt Vdd 3 3 5 DC Low Power Comparator Specifications The following table lists gua
214. et to one half cycle The duty cycle of the terminal count output is as follows 0 5 D le _ Equation 2 IEE PeriodValue 1 haii Alternatively when the terminal count pulse width is set to a full cycle the duty cycle will be twice as long 1 Due PeriodValue 1 Equation 3 The Period register value is a parameter that may be assigned using the Device Editor In addition it can be modified at run time using the API The Period register will be copied into the Count register automatically in the cycle after the value of the Count register reaches zero terminal count Thus if the period is changed by means of the API the new value does not take effect immediately To make an immediate change at run time the correct procedure is to stop the Timer write a new period value and then restart the Timer On every input clock the count in the Count register is compared to the value stored in the Compare register The comparison performs a Less Than or Less Than or Equal To test according to an option assigned to the CompareType parameter in the Device Editor When the comparison condition is met a compare event is triggered on the next clock In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 device families the Timer User Module provides the Compare output signal as an auxiliary output This active high signal is asserted on the rising edge of the clock cycle following the cycle in which compare condition is satisfied Thi
215. eters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 24 AC External Clock Specifications Symbol Description Min Typ Max Units Notes Foscext Frequency for USB Applications 23 94 24 24 06 MHz Duty Cycle 47 50 53 Power up to IMO Switch 150 us February 15 2007 Document No 38 12018 Rev J 35 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 8 AC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 25 5V AC Analog Output Buffer Specifications Symbol Description Min Typ Max Units Notes Trop Rising Settling Time to 0 1 1V Step 100pF Load Power Low 2 5 us Power High 2 5 us Tsob Falling Settling Time to 0 1 1V Step 100pF Load Power Low 2 2 us Power High 2 2 us SRros Rising Slew Rate 20 to 80 1V Step 100pF Load Power Low 0 65 V us Power High 0 65 V us SRrog Falling Slew Rate 80 to 20 1V Step 100pF Load Power Low 0 65 V us Power High 0 65 V us BWosss Small Signal Bandwidth 20mVpp 3dB BW 100pF Load
216. etos y no s lo Ics En 1974 presentaron la idea de un cambiadiscos que seleccionar a las pistas en un disco LP vinilo Pico desarroll el producto entero que inclu a el IC de costumbre todos los aspectos mec nicos la caja etc Se necesit un fabricante BSR en ese momento era el fabricante m s grande 37 Pablo Desviat Cruzado A del mundo de cambiadores de discos Por lo tanto se form una nueva empresa llamada Accutrac Ltd una asociaci n a medias entre BSR y Pico BSR fabric el cambiador de discos llamado Accutrac 2000 y pas a la fabricaci n de varios modelos desarrollados por Pico El xito de los proyectos Accutrac financi el desarrollo de la siguiente gran idea El Accutrac ten a muchas caracter sticas nicas como que era teledirigido Utilizaba un telecomando ultras nico desarrollado por Pico Esto pas a mediados de los 70 incluso antes de que fuera popular para los televisores con mando a distancia La idea del mando a distancia de Accutrac engendr la idea de controlar las luces y los electrodom sticos con mando a distancia y as en 1975 el proyecto X 10 fue concebido hab a 8 proyectos diferentes de calculadoras IC y Accutrac era el proyecto X9 Se lleg a la idea de utilizar la instalaci n el ctrica existente AC para transmitir se ales para controlar luces y electrodom sticos Los ICs se desarrollaron en un periodo de tres a os y se realizaron extensas pruebas en u
217. etr leo y conllev una reducci n de la utilizaci n de las centrales de fuel que nicamente jugaban un papel de reserva con crecimientos moderados de la demanda que dieron lugar a una situaci n de sobre equipamiento y por otra parte un elevado endeudamiento con altos tipos de inter s real Las empresas ve an perpetuarse la hist rica insuficiencia tarifaria consecuencia del papel que se suele asignar a los precios el ctricos para contener la inflaci n Los primeros pasos para estabilizar la situaci n econ mico financiera de las empresas del sector se dieron en 1985 en el que se produjo un intercambio de activos de unos 7 000 MW que permiti aliviar la situaci n de aquellas empresas m s activas en la pol tica de sustituci n del petr leo Pero sin duda el mayor logro en la senda de la estabilizaci n del sector fue el establecimiento de un nuevo sistema de c lculo de las tarifas el ctricas que permitiera disminuir el desequilibrio financiero Este sistema conocido como Marco Legal y Estable se empez a aplicar paulatinamente a partir de 1988 y ten a como par metros fundamentales una metodolog a de amortizaci n y retribuci n de las inversiones una retribuci n de los costes de producci n y distribuci n en base a valores est ndar un sistema de compensaciones entre los agentes y una correcci n por desviaciones al finalizar el a o 26 Pablo Desviat Cruzado E La d cada de los 90 Durante
218. exint Description Prints an integer as a four character hex string at the present LCD cursor position C Prototype void LCD PrHexInt INT iValue Assembly mov A iValue 1 Load LSB byte to be printed mov X iValue Load MSB byte to be printed call LCD_PrHexInt Call function Parameters Value A 16 bit value to display as a four character hex string Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified Horizontal Bar Graph Functions Each display character consists of five horizontal pixels by eight vertical pixels Horizontal bar graphs display a set of vertical lines that are each composed of one horizontal pixel by eight vertical pixels within a single character a pixel column Each character can display one to five vertical pixel columns where five pixel columns display the entire character Document Number 001 13569 Rev E Page 6 of 13 Re S37 cypress LCD Too Box Starting on the left side of the display the first pixel column is numbered 1 and the last pixel column is numbered N 5 where N is the number of characters A 16
219. featured full speed 12 Mbps USB port Configurable analog digital and interconnect circuitry enable a high level of integration in a host of industrial con sumer and communication applications This architecture allows the user to create customized periph eral configurations that match the requirements of each individ ual application Additionally a fast CPU Flash program memory SRAM data memory and configurable lO are included in a range of convenient pinouts and packages The PSoC architecture as illustrated on the left is comprised of four main areas PSoC Core Digital System Analog System and System Resources including a full speed USB port Config urable global busing allows all the device resources to be com bined into a complete custom system The PSoC CY8C24x94 devices can have up to seven IO ports that connect to the glo bal digital and analog interconnects providing access to 4 digi tal blocks and 6 analog blocks February 15 2007 Cypress Semiconductor 2004 2007 Document No 38 12018 Rev J CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview The PSoC Core The PSoC Core is a powerful engine that supports a rich fea ture set The core includes a CPU memory clocks and config urable GPIO General Purpose IO The M8C CPU core is a powerful processor with speeds up to 24 MHz providing a four MIPS 8 bit Harvard architecture micro processor The CPU utiliz
220. fects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the IDX_PP and the CUR_PP page pointer registers are modified USBFS_bReadOutEP Description Moves the specified number of bytes from endpoint RAM to data RAM The number of bytes actually transferred from endpoint RAM to data RAM is the lesser of the actual number of bytes sent by the Document Number 001 13629 Rev D Page 8 of 26 a Y Cypress USBFS Device host and the number of bytes requested by the wCount argument C Prototype BYTE USB bReadOutEP BYTE bEPNumber BYTE pData WORD wLength Assembly mov A 0 ush A A 32 ush A O lt O lt gt pData ush A O lt lt pData ush A 3 0 30 310 3 0 1 O lt x push A call USB bReadOutEP Parameters bEPNumber is the Endpoint Number between 1 and 4 pData is a pointer to a data array to which the Data from the Endpoint space is loaded wLength is the number of bytes to transfer from the array and then sent as a result of an IN request Valid values are between 0 and 256 The function moves less than that if the number of bytes sent by the host are less requested Return Value
221. g m Chip wide mux that allows analog input from up to 48 lO pins m Crosspoint connection between any lO pin combinations When designing capacitive sensing applications refer to the lat est signal to noise signal level requirements Application Notes which can be found under http www cypress com gt gt DESIGN RESOURCES gt gt Application Notes In general and unless oth erwise noted in the relevant Application Notes the minimum signal to noise ratio SNR for CapSense applications is 5 1 Additional System Resources System Resources provide additional capability useful to com plete systems Additional resources include a multiplier deci mator low voltage detection and power on reset Brief statements describing the merits of each resource follow m Full Speed USB 12 Mbps with 5 configurable endpoints and 256 bytes of RAM No external components required except two series resistors Wider than commercial temperature USB operation 10 C to 85 C m Digital clock dividers provide three customizable clock fre quencies for use in applications The clocks can be routed to both the digital and analog systems Additional clocks can be generated using digital PSoC blocks as clock dividers m Two multiply accumulates MACs provide fast 8 bit multipli ers with 32 bit accumulate to assist in both general math as well as digital filters m Decimator provides a custom hardware filter for digital signal processing apps
222. gger These are the ISSP pins which are not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details The center pad on the QFN package should be connected to ground Vss for best mechanical thermal and electrical performance If not connected to ground it should be electrically floated and not connected to any other signal February 15 2007 Document No 38 12018 Rev J 12 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information 1 5 The 100 ball VFBGA part is for the CY8C24994 PSoC device 100 Ball VFBGA Part Pinout Table 1 5 100 Ball Part Pinout VFBGA Pn 3 2 ane Pin S 8 Sir N o Name Description o o Name Description lo 2 Fa No 2 c a lt a lt A1 Power Vss Ground connection NC No connection A2 Power Vss Ground connection P5 7 A3 NC No connection P3 5 A4 NC No connection P5 1 A5 NC No connection Vss Ground connection A6 Power Vdd Supply voltage Vss Ground connection A7 NC No connection P5 0 A8 NC No connection F8 IO M P3 0 A9 Power Vss Ground connection F9 XRES Active high pin reset with internal pull down A10 Power Vss Ground connection F10 lO P7 1 B1 Power Vss Ground connection G1 NC No connection B2 Power
223. gimen regulado en el que en principio se inscribir an las instalaciones de generaci n ya existentes Esta ley no lleg a desarrollarse 27 Pablo Desviat Cruzado E El nuevo marco el ctrico En 1996 el Consejo de la Uni n Europea aprob la Directiva sobre Normas Comunes para el Mercado Interior de la Electricidad que contiene unos objetivos claros y unos criterios m nimos de liberalizaci n e introducci n de la competencia en el sistema el ctrico La mayor a de los pa ses comunitarios deber an adaptar sus legislaciones el ctricas al nuevo esquema con anterioridad al 19 de febrero de 1999 aunque se han producido algunos retrasos Este cambio en los planteamientos no fue un hecho aislado en la burbuja de la UE Desde hac a ya varios a os diversos pa ses desarrollados en distintas partes del mundo hab an puesto en marcha procesos de reestructuraci n de sus respectivos sistemas el ctricos con criterios de liberalizaci n e introducci n de la competencia Espa a fue uno de los primeros pa ses en la adopci n de los criterios emanados de esta Directiva Como consecuencia de las conversaciones y acuerdos entre el sector el ctrico y la administraci n energ tica que tuvieron lugar durante 1996 y 1997 y que se plasmaron en el Protocolo El ctrico el 1 de enero de 1998 entr en vigor la Ley 54 1997 del Sector El ctrico que introdujo los cambios normativos m s importantes dela historia del sector en Espa a E
224. gister is modified USBFS_ DisableOutEP Description Disables the specified USBFS OUT endpoint Do nat call this function for IN endpoints C Prototype void USBFS DisableEP BYTE bEPNumber Assembly MOV A 1 Select endpoint 1 call USBFS DisableEP Parameters Register A contains the endpoint number Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions USBFS_Force Description Forces a USB J K or SEO state on the D D lines This function provides the necessary mechanism for a USB device application to perform USB Remote Wakeup functionality For more information refer to the USB 2 0 Specification for details on Suspend and Resume functionality C Prototype void USBFS Force BYTE bState Assembly mov A USB FORCE K call USBFS Force Parameters bState is byte indicating which among four bus states to enable Symbolic names provided in C and assembly and their associated values are listed here State Value Description USB FORCE_SEO OxCO Force a Single Ended 0 onto the D D lines USB_FORCE J OxAO Force a J State onto the D D lines USB _FORCE_K 0x80 Force a K State onto the D D lines USB FORCE_NON
225. guration void Assembly call USBFS bGetConfiguration Parameters None Return Value Returns the currently assigned configuration in A Returns 0 if the device is not configured Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the CUR_PP page pointer register is modified USBFS_bGetEPState Description Gets the Endpoint state for the specified endpoint The Endpoint state describes from the perspective of the foreground application the endpoint status The endpoint has one of three states two of the states mean different things for IN and OUT endpoints The table below outlines the possible states and their meaning for IN and OUT endpoints C Prototype BYTE USBFS bGetEPState BYTE bEPNumber Assembly MOV A 1 Select endpoint 1 call USBFS bGetEPState Parameters Register A contains the endpoint number Return Value Returns the current state of the specified USBFS endpoint Symbolic names provided in C and assem bly and their associated values are given in the following table Use these constants whenever the user writes code to change the state of the Endpoints such as ISR code to handle data sent
226. he software This substantially lowers the risk of having to select a different part to meet the final design requirements To speed the development process the PSoC Designer Inte grated Development Environment IDE provides a library of pre built pre tested hardware peripheral functions called User Modules User modules make selecting and implementing peripheral devices simple and come in analog digital and mixed signal varieties The standard User Module library con tains over 50 common peripherals such as ADCs DACs Tim ers Counters UARTs and other not so common peripherals such as DTMF Generators and Bi Quad analog filter sections Each user module establishes the basic register settings that implement the selected function It also provides parameters that allow you to tailor its precise configuration to your particular application For example a Pulse Width Modulator User Mod ule configures one or more digital PSoC blocks one for each 8 bits of resolution The user module parameters permit you to establish the pulse width and duty cycle User modules also provide tested software to cut your development time The user module application programming interface API provides high level functions to control and respond to hardware events at run time The API also provides optional interrupt service rou tines that you can adapt as needed The API functions are documented in user module data sheets that are viewed directl
227. i n el ctrica nacional y un 12 3 del consumo de energ a primaria en Espa a Para ello ser n necesarias unas inversiones en estas tecnolog as del orden de los 12 000 millones de euros En definitiva la planificaci n realizada supone una inversi n total de 26 500 millones de euros de los cuales el 80 corresponder n al sector el ctrico y el 20 al sector del gas Si se tienen en cuenta adem s de las inversiones contempladas en la planificaci n transporte y nueva generaci n las inversiones que se necesitan en distribuci n y las inversiones recurrentes en el equipo generador ya existente resulta una inversi n global del sector el ctrico en el per odo 2002 11 de m s de 38 000 millones de euros lo que equivale a invertir en diez a os tres veces la 35 Pablo Desviat Cruzado A actual cifra de negocio anual adem s de hacer frente al resto de costes del sistema Las cifras anteriores ponen de manifiesto la necesidad de un marco regulatorio adecuado que permita establecer los ingresos necesarios con objetividad y en definitiva recuperar y retribuir las inversiones que se prev n de forma suficientemente razonable Desde el punto de vista de la sostenibilidad la planificaci n realizada prev un desarrollo con criterios sostenibles basado en las energ as renovables la producci n de calor y electricidad con mayor eficiencia energ tica y la utilizaci n de los ciclos combinados de gas natural que pro
228. iat Cruzado void interrupt tren void 0x00 Cuenta 1 milisegundo milisegundo _ return void pulso void genera tren de pulsos lms 120khz PWM8_Start Timer8 Start while milisegundo 1 PWM8 Stop Timer8 Stop milisegundo 0 void pasocero void simula un paso por cero int cuenta 0 while cuenta lt i0 Timer8 Start while milisegundo 1 Timer8 Stop milisegundo 0 cuentatt void habit void actualiza LCD if habitaciones 0 0 LCD_Position 0 0 LCD PrCstring uli OFF else LCD Position 0 0 LCD _PrCString H1 ON if habitaciones i 0 LCD Position 0 9 LCD PrCString H2 OFF else LCD Position 0 09 LCD _PrCString H2 ON if habitaciones 2 0 146 Pablo Desviat Cruzado LCD Position 1 0 LCD _PrCString H3 else LCD Position 1 0 LCD _PrCString H3 if habitaciones 2 LCD Position 1 09 LCD _PrCString H4 else LCD_Position 1 9 LCD _PrCString H4 asa OFE ON OFE ON 147 Pablo Desviat Cruzado A Parte V DATASHEETS 148 PSoC Mixed Signal Array CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet Features E CY8C24894 includes an XRES pin to support In System Serial Programming ISSP and external reset control MH Powerful Harva
229. ications 3 1 Table 3 2 Absolute Maximum Ratings Absolute Maximum Ratings Symbol Description Min Typ Max Units Notes TsTG Storage Temperature 55 25 100 og Higher storage temperatures will reduce data retention time Recommended storage temper ature is 25 C 25 C Extended duration stor age temperatures above 65 C will degrade reliability Ta Ambient Temperature with Power Applied 40 85 og Vdd Supply Voltage on Vdd Relative to Vss 0 5 6 0 V Vio DC Input Voltage Vss 0 5 Vdd 0 5 V Vio2 DC Voltage Applied to Tri state Vss 0 5 Vdd 0 5 V IMio Maximum Current into any Port Pin 25 50 mA IMAIO Maximum Current into any Port Pin Configured as Analog 50 50 mA Driver ESD Electro Static Discharge Voltage 2000 Vv Human Body Model ESD LU Latch up Current 200 mA 3 2 Operating Temperature Table 3 3 Operating Temperature Symbol Description Min Typ Max Units Notes Ta Ambient Temperature 40 85 og TausB Ambient Temperature using USB 10 85 C Ty Junction Temperature 40 100 og The temperature rise from ambient to junction is package specific See Thermal Impedance on page 42 The user must limit the power con sumption to comply with this requirement 3 3 3 3 1 DC Electrical Characteristics DC Chip Level Specifications The following table lists guaranteed maximum and minimu
230. ications Make data sheet Final F 349566 See ECN HMT Remove USB logo Add URL to preferred dimensions for mounting MLF packages G 393164 See ECN HMT Add new device CY8C24894 56 pin MLF with XRES pin Add Fimousb3v char to specs Upgrade to CY Per form logo and update corporate address and copyright H 469243 See ECN HMT Add ISSP note to pinout tables Update typical and recommended Storage Temperature per industrial specs Update Low Output Level maximum IOL budget Add FLS_PR1 to Register Map Bank 1 for users to specify which Flash bank should be used for SROM operations Add two new devices for a 68 pin QFN and 100 ball VFBGA under RPNs CY8C24094 and CY8C24994 Add two packages for 68 pin QFN Add OCD non produc tion pinouts and package diagrams Update CY branding and QFN convention Add new Dev Tool section Update copyright and trademarks 561158 See ECN HMT Add Low Power Comparator LPC AC DC electrical spec tables Add CY8C20x34 to PSoC Device Character istics table Add detailed dimensions to 56 pin QFN package diagram and update revision Secure one package diagram manufacturing per QFN Update emulation pod feet kit part numbers Fix pinout type o per TestTrack J 728238 See ECN HMT Add CapSense SNR requirement reference Update figure standards Update Technical Training paragraphs Add QFN package clarifications and dimensions Update ECN ed Amkor dimensioned QFN package diagram revisions Rewor
231. icos para provisionar servicios a terceros Adem s la Disposici n Adicional 14 a la Ley del Sector El ctrico permite que la Empresa El ctrica que en principio tiene objeto social exclusivo ponga en valor la infraestructura de que es titular con fines de telecomunicaciones Y por supuesto nada impide que cedan el uso de dichas infraestructuras a un tercero para que las explote dado que adem s en la legislaci n de telecomunicaciones que impera en Espa a en la actualidad existe la obligaci n de separaci n de cuentas por los operadores de telecomunicaciones que desarrollen actividades en otros sectores econ micos Las Directivas armonizadoras del Consejo Europeo ha decidido promover el desarrollo de la Sociedad de la Informaci n para todos facilitando una mayor competencia en el segmento de acceso al hogar El servicio Internet va a ser declarado universal y se deber n de facilitar todas las infraestructuras que favorezcan su desarrollo e implantaci n Esta consecuencia del r pido y universal desarrollo de la red Internet hacen que el acceso de banda ancha sea el negocio de m s r pido crecimiento en las telecomunicaciones en los pr ximos a os 46 Pablo Desviat Cruzado Power Line Comunications Power Line Communications PLC como sistema de transmisi n de voz y datos ya se ha utilizado desde principios del siglo XX sobre cables de la red de transporte de alta tensi n con fines de teleoperaci n y tele
232. icos inhabitual hasta entonces por su magnitud dentro de un sector el ctrico incipiente Para hacer frente a este reto econ mico y financiero se crearon numerosas sociedades an nimas dedicadas a la producci n y distribuci n de electricidad algunas de las cuales existen todav a hoy Antes del proceso de concentraci n que ha vivido el sector 17 Pablo Desviat Cruzado E el ctrico espa ol en la ltima d cada era muy frecuente en las empresas el ctricas la aparici n del t rmino hidroel ctrica o salto en su denominaci n social prueba concluyente del origen de la Sociedad por ejemplo Hidroel ctrica Espa ola Hidroel ctrica Ib rica Saltos del Duero Saltos del Sil Hidroel ctrica de Catalu a Hidroel ctrica del Cant brico Saltos del Nansa Fuerzas Hidroel ctricas del Segre En la d cada de los a os veinte la pol tica hidr ulica espa ola comenz a plantearse como objetivo el aprovechamiento integral de las cuencas hidrogr ficas La Confederaci n Sindical del Ebro fue la primera Este planteamiento llev en la d cada siguiente al inicio del aprovechamiento integral de la cuenca del Duero operaci n que estaba ya dise ada perfectamente en los a os cuarenta y sirvi de modelo a seguir para el desarrollo del resto de las cuencas peninsulares Esta pol tica hidr ulica estuvo basada en el ordenamiento jur dico existente el cual ten a como principal elemento la Ley de Aguas de 13 de
233. ificates the information by means of trains of 120 KHz pulses through the mains when this it happens through zero A code is assigned to each element of the house in such way that the central element of the system can communicate directly with the rest of devices and to give them orders by means of other codes In summary it is had defined the different functions that will have to make the device that is going to be designed Funciones X 10 Detector de cruce por cero Detector de se al de 120kHz Generador de se al de 120kHz After a study of the different existing modules in the market it was verified that the great majority was only unidirectional it means or they send information or the y receive information but not both things that is the reason why another objective was added The device must be bidirectional As well at the present time we can find a computer in practically each house thought about using this characteristic like an advantage that could make the use of our designed device even more comfortable for the user Other idea was added to make a control by a USB connection to a personal computer Hardware where the project was realised was chosen as a result of another objectives An idea that was had from the first moment was to make the device smaller than the other existing modules To achieve this a microcontrollerr of Cypress company was selected whose main characteristics were the possibility of realising co
234. ilizar carb n importado Simult neamente fue desarroll ndose gran parte del programa nuclear Entre 1980 y 1986 entraron en servicio cinco grupos nucleares con una potencia inicial de m s de 4 500 MW y casi se finalizo el aprovechamiento del potencial hidroel ctrico t cnico y econ micamente viable con la incorporaci n durante la d cada de algo m s de 3 000 MW hidroel ctricos en gran parte en instalaciones de bombeo puro o mixto ligadas en cierta medida al equipo nuclear dado que ten an como objetivo flexibilizar la generaci n en base a esos grupos Esa d cada se caracteriz por las importantes inversiones que hubo de acometer el Sector El ctrico m s de 3 5 billones de pesetas en el per odo 1980 86 en un entorno de crisis econ mica altamente desfavorable elevada inflaci n altos tipos de inter s real y bajo crecimiento de la demanda Adem s y dado lo reducido del mercado de capitales nacional el sector tuvo que acudir a los mercados internacionales 25 Pablo Desviat Cruzado en busca de financiaci n b sicamente en d lares americanos divisa que experiment una elevada apreciaci n durante esos a os En definitiva a finales de los ochenta el sector el ctrico espa ol se encontraba en una situaci n dif cil por una parte exist a una elevada capacidad ociosa como consecuencia de la pol tica de diversificaci n que foment la construcci n de centrales de combustibles alternativos al p
235. in application monitors the completion status to determine how to proceed Completion status codes are found in the following table The transfer length is the actual number of data bytes transferred USBFS Transfer Completion Codes Completion Code Description USB_XFER_IDLE USB_XFER_IDLE indicates that the associated data buffer does not have valid 0x00 data and the application should not use the buffer The actual data transfer takes place while the completion code is USB_XFER_IDLE although it does not indicate a transfer is in progress USB XFER_STATUS ACK USB_XFER_STATUS_ACK indicates the control transfer status stage com 0x01 pleted successfully At this time the application uses the associated data buffer and its contents USB_XFER_PREMATURE USB_XFER_PREMATURE indicates that the control transfer was interrupted 0x02 by the SETUP of a subsequent control transfer For control writes the contents of the associated data buffer contains the data up to the premature completion USB_XFER_ERROR USB_XFER_ERROR indicates that the expected status stage token was not 0x03 received Customizing the HID Class Report Storage Area If you enable optional HID class support the Setup Wizard creates a fixed size report storage area for data reports from the HID class device It creates separate report areas for IN OUT and FEATURE reports This area is sufficient for the case where no Report ID item tags are present in the Report descrip
236. including creation of Delta Sigma ADCs m The 12C module provides 100 and 400 kHz communication over two wires Slave master multi master are supported m Low Voltage Detection LVD interrupts signal the application of falling voltage levels while the advanced POR Power On Reset circuit eliminates the need for a system supervisor m An internal 1 3V reference provides an absolute reference for the analog system including ADCs and DACs m Versatile analog multiplexer system February 15 2007 Document No 38 12018 Rev J CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview PSoC Device Characteristics Depending on your PSoC device characteristics the digital and analog systems can have 16 8 or 4 digital blocks and 12 6 or 4 analog blocks The following table lists the resources available for specific PSoC device groups The device covered by this data sheet is shown in the highlighted row of the table PSoC Device Characteristics PSoC Part Number Q Digital Digital Rows Digital Blocks Analog Inputs Analog Outputs Analog Columns Analog Blocks SRAM Size Flash Size up to 64 4 16 a m aN A mre m mm A CY8C29x66 32K 256 upto 2 g 12 4 Bytes 44 S oe N CY8C27x43 16K N o CY8C24x94 56 1 4 48 2 1K 16K upto afal 2 2 e 28 ak CY8C24x23A 24 Bytes up to a 512 1 4 28 0 2 4 las 28 8K CY8
237. ion 1 2 Position cursor row 1 col 2 LCD PrString str Print RAM based string Example Text Display Parameters sRomString A pointer to a null terminated string located in ROM Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified Document Number 001 13569 Rev E Page 5 of 13 a CYPRESS LCD Tool Box Number Printing Functions LCD_PrHexByte Description Prints a byte as a two character hex string at the present LCD cursor position C Prototype void LCD PrHexByte BYTE bValue Assembly mov A bValue Load byte to be printed call LCD PrHexByte Call function Parameters bValue An 8 bit value to display as a two character hex string Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified LCD_PrH
238. ions Currently only the IDX_PP and the CUR_PP page pointer registers are modified USBFS_Stop Description Performs all necessary shutdown task required for the USBFS User Module C Prototype void USBFS Stop void Assembly call USBFS Stop Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the CUR_PP page pointer register is modified USBFS_bCheckActivity Description Checks for USBFS Bus Activity C Prototype BYTE USBFS bCheckActivity void Assembly call USBFS bCheckActivity Parameters None Return Value Returns 1 in A if the USB was active since the last check otherwise returns 0 Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Document Number 001 13629 Rev D Page 5 of 26 Re BE es Y Cypress USBFS Device USBFS_bGetConfiguration Description Gets the current configuration of the USB device C Prototype BYTE USBFS bGetConfi
239. ister Note that this function is for applications that must read the Counter register on the fly creating some side effects C Prototype BYTE PWM16 wReadCounter Assembly call PWM16 wReadCounter mov wCounter X mov wCounter 1 A Parameters None Return Value Returns the Counter register value MSB is passed in the X register and LSB is passed in the Accumu lator Side Effects To read the PWM16 Counter register the PulseWidth register must be temporarily modified This could cause the PWM16 Counter register operation to be postponed by one or more counts In addition this could result in an inadvertent interrupt condition The A and X registers may be altered by this function Document Number 001 13581 Rev F Page 13 of 19 a pr e BP Cypress 8 Bit Pulse Width Modulator PERFOR Sample Code 8 Bit PWM Sample Firmware Source Code In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based that is zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT types instead of pushing the argument on the stack when
240. it sees the pragma fastcall declarations in the PWME8 h file The following is assembly language source that illustrates the use of the APIs TIRAR 2 rr Function GenerateOneThirdDutyCycle Description This sample shows how to create a 33 duty cycle output pulse The clock selected should be 24 times the required period The 7 comparator operation is specified to be Less than or Equal Parameters none Returns none ir a a es SA I ta A I I a I AIF FEET FO EE TIRE FAA I Ha A a SO A As A As A A I FERRER A i es A SA rr include PWM8 inc include the PWM8 API include file GenerateOneThirdDutyCycle mov Ay 23 set the period to be 24 counts of the clock call PWM8 WritePeriod mov A 7 set Pulse Width to generate a 33 duty cycle call PWM8 WritePulseWidth call PWM8 Disablelnt ensure that interrupts are disabled call PWM8 Start start the PWM8 counter will start to ret count when th nable input is asserted high The same code in C is as follows include the Counter8 API header file include PWM8 h function prototype void GenerateOneThirdDutyCycle void Divide by eight function void GenerateOneThirdDutyCycle void set period to eight clocks PWM8 WritePeriod 23 set pulse width to generate a 33 duty cycle PWM8 WritePulseWidth 7 ensure interrupt is disabled PW
241. ity to preserve the values across calls to fastcall16 functions LCD_Delay50u Description Delays for 50 us This function is clock independent C Prototype void LCD Delay50u void Assembly call LCD Delay50u 7 Call function Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Document Number 001 13569 Rev E Page 11 of 13 a P cypress LCD Too Box PERFORM Sample Firmware Source Code The following is a simple assembly and C example for printing a string on the LCD Sample asm LCD Code Print the string PSoC LCD on the top row starting at the 6th location on an LCD Ne Ne Ne Ne Ne Ne Ne Ne Neo Ne Se n include m8c inc part specific constants and macros include PSoCAPI inc PSoC API definitions for all User Modules export main area text ROM REL main call LCD Start Initialize LCD mov A 00h Set cursor position at row 0 mov X 05h col 5 call LCD Position mov A gt THE STR Load pointer to ROM string mov X lt THE STR call LCD PrCsString Print constant ROM string loop jmp loop LITERAL THE STR DS PSoC LCD
242. l mbricos Una unidad que permite conectarse a trav s de una antena y enviar se ales de radio desde una unidad inal mbrica e inyectar la se a X10 en el cableado el ctrico como los controles remotos para abrir los portones de los garajes Estas unidades no est n habilitadas para controlar directamente a un receptor X10 debe utilizarse un m dulo transceptor 59 Pablo Desviat Cruzado E Capitulo 3 ESTRUCTURA Y ORGANIZACI N DEL PROYECTO Este proyecto se organiza de la siguiente manera En primer lugar en el Cap tulo 4 La Dom tica se lleva a cabo una descripci n detallada de lo que significa dicho termino puesto que este proyecto se situ dentro de este campo En el Cap tulo 5 X10 se realiza un an lisis te rico de las caracter sticas del protocolo utilizado en este proyecto y se detallan las razones que se han valorado para su elecci n Una vez explicado el protocolo en el Cap tulo 6 PsoC se procede a describir las caracter sticas del microcontrolador utilizado para la automatizaci n A continuaci n se detalla las necesidades que se dan para llevar a cabo el proyecto en el Capitulo 7 Automatizaci n con el PSoC En el Cap tulo 8 Conexi n con el PC mediante USB se describe el uso del PsoC para realizar la conexi n mediante USB con el ordenador personal 60 Pablo Desviat Cruzado A Finalmente se extraen las conclusiones oportunas en el Cap tulo 9 Conc
243. l Clock SCL B5 IO 1 M_ PO 7 Analog column mux input G5 1O M P1 1 12C Serial Clock SCL ISSP SCLK B6 Power Vdd Supply voltage G6 10 M P1 0 12C Serial Data SDA ISSP SDATA B7 IO I M_ PO 2 Analog column mux input G7 1O M Pi 6 B8 IO IM P2 2 Direct switched capacitor block input G8 IO M P3 4 B9 Power Vss Ground connection G9 IO M P5 6 B10 Power Vss Ground connection G10 IO P7 2 C1 NC No connection H1 NC No connection C2 IO M P4 1 H2 IO M P5 8 C3 1O M P4 7 H3 lO M P3 1 C4 IO M P2 7 H4 IO M P1 5 12C Serial Data SDA C5 IO IO M PO 5 Analog column mux input and column output f H5 lO M P1 3 C6 IO I M PO 6 Analog column mux input H6 IO M P1 2 C7 IO IM PO 0 Analog column mux input H7 10 M P1 4 C8 IO IM P2 0 Direct switched capacitor block input H8 IO M P3 2 C9 1O M P4 2 H9 IO M P5 4 C10 NC No connection H10 IO P7 3 D1 NC No connection J1 Power Vss Ground connection D2 10 M P3 7 J2 Power Vss Ground connection D3 IO M P4 5 J3 USB D D4 IO M P2 5 J4 USB D D5 IO IO M PO 8 Analog column mux input and column output J5 Power Vdd Supply voltage D6 IO IM PO 4 Analog column mux input J6 IO P7 7 D7 lo M P2 6 External Voltage Reference VREF input J7 IO P7 0 D8 IO M P4 6 J8 IO M P5 2 D9 IO M P4 0 J9 Power Vss Ground connection D10 CCLK OCD
244. le the second is the String LANGID and the third is the Descriptor HID report Use the two buttons below the table perform the selected command The first section presents the Descriptor The second section presents the String LANGID when a string ID is required this area is used to input that string To add a string for a USB device click on the Add String operation The software adds a row and prompts you to Edit your string here Type the new string then click Save Generate Once the string is saved it is available for use in the Descriptor section from the pull down menus If you close without saving the string is lost The third area presents the HID Report Descriptor Root From here you add or import an HID Report for the selected device USB User Module Descriptor Root The first column displays folders to expand and collapse For the purpose of this discussion you must fully expand the tree that all options are visible The setup wizard permits the entering of data into the middle Data column if there is a pull down menu use it to select a different option If there is no pull down menu but there is data use the cursor to highlight and select the data then overwrite that data with another value or text option All the values must meet the USB 2 0 Chapter 9 Specifications The first folder displayed at the top is the USB User Module Descriptor Root It has the user module name in the Data column this is the user module name given
245. lies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may be limited by and subject to the applicable Cypress software license agreement CYPRESS PERFORM USBFS Device Data Sheet Ml USB USBFS Copyright 2005 2009 Cypress Semiconductor Corporation All Rights Reserved PSoC Blocks API Memory Bytes Pins per Resources Digital Analog CT Analog SC Flash RAM External I O CY8C24x94 CY8CLED04 CY8C20x66 CY8C20x46 CY8C20x96 CY7C643xx CYONS2010 CYONSFN2162 CY8CTST120 CY8CTMG120 CY8CTMA120 CY8CTST200 CY8CTMG2xx 1911 46 2 CY7C64215 1911 46 2 Note Expect an expansion of Flash and RAM when adding additional interfaces HID classes and other USBFS extensions Note 2 SysClk 2 is needed at all times for proper USB timing In Global Resources set SysCIk 2 Disable to No for proper USB operation Features and Overview e USB Full Speed device interface driver e Support for interrupt and control transfer types e Setup wizard for easy and accurate descriptor generation Runtime support for descriptor set selection e Optional USB string descriptors e Optional USB HID class support vcc CY8C24x94 Simple USB Application CY7C64215 USBFS Device Block Diagrams Cypress Semiconductor Corporation 198 Champion Court San Jose CA 95134 1709 408 943 2600 Document Number 001 13629 Rev D Revised June 12 2009 Sn S37 cypress USBFS Device
246. los a os noventa de vigencia del Marco Legal y Estable la situaci n econ mico financiera de las empresas mejor sustancialmente a lo que tambi n ayud la existencia de una sobrecapacidad que hac a innecesario acometer nuevas inversiones en generaci n como se pon a de manifiesto en el Plan Energ tico Nacional de 1990 y la estabilidad econ mica que proporcion la integraci n real en la UE Esa estabilidad permiti a las empresas del sector generar fondos para sanear su estructura financiera y acometer su expansi n en otros sectores econ micos y en otros pa ses fruto de la cual en algunos casos las empresas el ctricas espa olas se han convertido en importantes multinacionales que ocupan destacados puestos en el sector de las utilities Previamente a esa expansi n internacional se hab a producido en el sector el ctrico espa ol un proceso de concentraci n de empresas que dio lugar a la actual ENDESA a partir de la fusi n del Grupo Endesa del INI con C a Sevillana de Electricidad Fecsa H Catalu a y El ctricas Reunidas de Zaragoza y a IBERDROLA resultado de la fusi n de H Espa ola e Iberduero Por ltimo se alar que al hilo de los aires de liberalizadores que empezaban a correr por Europa en 1995 fue promulgada la Ley de Ordenaci n del Sistema El ctrico Nacional LOSEN que ya preve a la creaci n de un Sistema de Generaci n Independiente que funcionar a en r gimen de competencia manteniendo un r
247. lse is one clock cycle wide or one half clock cycle wide Interrupt Generation Control The following two parameters InterruptAPI and IntDispatchMode are only accessible by setting the Enable Interrupt Generation Control check box in PSoC Designer This is available under Project gt gt Settings gt gt Device Editor tab InterruptAPl The InterruptAPl parameter allows conditional generation of a User Module s interrupt handler and interrupt vector table entry Select Enable to generate the interrupt handler and interrupt vector table entry Select Disable to bypass the generation of the interrupt handler and interrupt vector table entry Properly selecting whether an Interrupt API is to be generated is recommended particularly with projects that have multiple overlays where a single block resource is used by the different overlays By selecting only Interrupt API generation when it is necessary the need to generate an interrupt dispatch code might be eliminated thereby reducing overhead IntDispatchMode The IntDispatchMode parameter is used to specify how an interrupt request is handled for interrupts shared by multiple user modules existing in the same block but in different overlays Selecting ActiveStatus causes firmware to test which overlay is active before servicing the shared interrupt request This test occurs every time the shared interrupt is requested This adds latency and also Document Number 001 13625 Rev
248. lue None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_Disablelnt Description Disables the interrupt mode operation C Prototype void Timerl6 Disablelnt void Assembly call Timerlo Disablelnt Parameters None Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_ Start Description Starts the Timer16 operation The Count register will be decremented on the next clock cycle Document Number 001 13625 Rev E Page 13 of 42 am PX oe Y Cypress 8 Bit Timer C Prototype void Timerl6 Start void Assembly call Timerl6 Start Parameters None Return Value None Side Effects The A and X registers may be modified by this or futu
249. lumn mux input J6 IO P7 7 D7 IO M P2 6 External Voltage Reference VREF input J7 10 P7 0 D8 IO M P4 6 J8 IO M P5 2 D9 1O M P4 0 J9 Power Vss Ground connection D10 NC No connection J10 Power Vss Ground connection El NC No connection K1 Power Vss Ground connection E2 NC No connection K2 Power Vss Ground connection E3 lO M P4 3 K3 NC No connection E4 IO IM P2 3 Direct switched capacitor block input K4 NC No connection E5 Power Vss Ground connection K5 Power Vdd Supply voltage E6 Power Vss Ground connection K6 IO P7 6 E7 lo M P2 4 External Analog Ground AGND input K7 lO P7 5 E8 lO M P4 4 K8 IO P7 4 E9 IO M P3 6 K9 Power Vss Ground connection E10 NC No connection K10 Power Vss Ground connection LEGEND A Analog Input O Output M Analog Mux Input NC No Connection This is the ISSP pin which is not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details February 15 2007 Document No 38 12018 Rev J 13 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information CY8C24994 1 2 3 4 5 6 7 8 9 10 OOO0000000 QOWDDOOS COSAS 02 009300 0DIDOO 003009 COSOASNE 0000020 0000020 BGA Top View 20 DOO SOODSOODG OOOOOOOO OQOOOOOOOO O AXA c TO nn mU O U D February 15 2007 Document No 38 12018 Rev J 14 CY8C2
250. lusiones 61 Pablo Desviat Cruzado Capitulo 4 LA DOMOTICA 1 Introducci n Dom tica es el t rmino que se utiliza para denominar la parte de la tecnolog a electr nica e inform tica que integra el control y supervisi n de los elementos existentes en un edificio de oficinas o en uno de viviendas o simplemente en cualquier hogar Tambi n un t rmino muy familiar es el de edificio inteligente que se aplica m s al mbito de los grandes bloques de oficinas bancos universidades y edificios industriales El uso de las tecnolog as de la informaci n y las comunicaciones en la vivienda genera nuevas aplicaciones y tendencias basadas en la capacidad de proceso de informaci n y en la integraci n y comunicaci n entre los equipos e instalaciones Una vivienda inteligente puede ofrecer una amplia gama de aplicaciones en reas tales como Seguridad Gesti n de la energ a Automatizaci n de tareas dom sticas Formaci n cultura y entretenimiento Comunicaci n con servidores externos Ocio y entretenimiento Operaci n y mantenimiento de las instalaciones etc De una manera general un sistema dom tico dispondr de una red de comunicaci n que permite la interconexi n de una serie de equipos a fin de obtener informaci n sobre el entorno dom stico y bas ndose en sta realizar determinadas acciones sobre dicho entorno 62 Pablo Desviat Cruzado Los elementos de campo detectore
251. ly the CUR_PP page pointer register is modified LCD_WriteData Description Writes a byte or character to the LCD Data register C Prototype void LCD WriteData BYTE bData Document Number 001 13569 Rev E Page 10 of 13 a pe d P cypress LCD Tool Box Assembly mov A 03h Load data to be written to Data register call LCD WriteData Call function Parameters bData Byte value to send to the Data register Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified LCD_Delay50uTimes Description Delays for bTimes multiples of 50 us This delay loop is CPU clock independent C Prototype void LCD Delay50uTimes BYTE bTimes Assembly mov A 03h Load delay time example 3 would be 150uSec Call LCD Delay50uTimes Call function Parameters bTimes Number of times to delay 50 uSec Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibil
252. m specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ty lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 4 DC Chip Level Specifications Symbol Description Min Typ Max Units Notes Vdd Supply Voltage 3 0 5 25 See DC POR and LVD specifications Table 3 15 on page 29 Ipps Supply Current IMO 24 MHz 5V 27 mA Conditions are Vdd 5 0V Ta 25 C CPU 3 MHz SYSCLK doubler disabled VC1 1 5 MHz VC2 93 75 kHz VC3 93 75 kHz ana log power off lbo3 Supply Current IMO 24 MHz 3 3V 14 mA Conditions are Vdd 3 3V Ty 25 C CPU 3 MHz SYSCLK doubler disabled VC1 1 5 MHz VC2 93 75 kHz VC3 0 367 kHz ana log power off WDT Isp Sleep Mode Current with POR LVD Sleep Timer and 6 5 uA Conditions are with internal slow speed oscilla tor Vdd 3 3V 40 C lt Ta lt 55 C analog power off WDT at high temperature Sleep Mode Current with POR LVD Sleep Timer and 25 uA Conditions are with internal slow speed oscilla tor Vdd 3 3V 55 C lt Ty lt 85 C analog power off a Standby current includes all functions POR LVD WDT Sleep Time needed for reliable system operation This should be compared with devices that hav
253. mato de los datos intercambiados Si se mira de nuevo la ultima figura se puede ver como primero se define un Vendor Defined usage page lo que implica que el sistema oper tivo del PC no se adue ar del dispositivo Luego se define un paquete de un byte report size 8 bits report count 1 logical min 127 y logical max 128 de entrada Durante la enumeraci n el driver HID del host leer el report descriptor y lo usar para configurar los buffers internos En resumen el USB Wizard define los descriptors de los dispositivos Las caracter sticas de la transferencia de datos de la conexi n que hemos creado indican que se corresponde con un driver HID class por lo que se define un report descriptor que describa el tama o y el formato de los datos que vamos a transferir 116 Pablo Desviat Cruzado BA Capitulo 9 RESULTADOS EXPERIMENTOS El dispositivo dise ado no se lleg a probar en la red el ctrica por la falta de unos condensadores utilizados en el circuito que inyecta la se al de X10 en la red Hay que a adir a esto el problema que se vio en el circuito que detecta el paso por cero pues la sincronizaci n no es perfecta aunque la soluci n sea sencilla Sin embargo se simul la se al senoidal de 50 Hz mediante la incorporaci n en el PSoC de un timer de 8 bits que daba interrupciones cada milisegundo de tal manera que contando 10 de estas interrupciones se tuviera una se al de 10 ms equivalen
254. mer uses four digital PSoC blocks In placement order from left to right they are named TIMER32_LSB TIMER32_ISB1 TIMER32_ISB2 and TIMER32_MSB Each block is personalized and parameterized through 7 registers The following tables give the personality values as constants and the parameters as named bit fields with brief descriptions Symbolic names for these registers are defined in the user module instance s C and assembly language interface files the h and inc files Function Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 0 Compare 0 0 0 0 ISB2 Type 0 0 0 Compare 0 0 0 0 ISB1 Type 0 0 0 Compare 0 0 0 0 LSB Type Function Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 0 Compare 0 0 0 0 ISB2 Type 0 0 0 Compare 0 0 0 0 ISB1 Type Data Invert BCEN 0 Compare 0 0 0 0 LSB Type BCEN gates the terminal count output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the capture input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal To or Less Than The InterruptType flag determines whether to trigger the interrupt on the compare event or on the termi
255. microcontrolador PSoC para crear una unidad que sea capaz de enviar c digos X10 Funciones X 10 Detector de cruce por cero Detector de se al de 120kHz Generador de se al de 120kHz Fuente sin transformador Figura 7 1 Funciones X10 85 Pablo Desviat Cruzado A Del anterior cuadro de actividades b sicas realizadas por cualquier dispositivo de X10 se va a requerir que el PSoC realice dos actividades b sicas a las que habr que a adir una tercera Detector de cruce por cero Y Generador de se al de 120kHz Fuente de 5V sin transformador 86 Pablo Desviat Cruzado 1 Detector de cruce por cero En el protocolo X10 la informaci n que se env a es sincronizada con los cruces por cero de la l nea de corriente alterna Un detector de cruce por cero puede ser f cilmente creado utilizando la interrupci n externa que incluyen los PSoC Esta interrupci n externa provoca que el PSoC suspenda cualquier programa que est llevando a cabo y atienda el cambio que existi en su terminal de entrada un puerto Esta detecci n puede lograrse con la presencia de flanco de subida o flanco de bajada en la se al de entrada Para generar estos flancos de subida y de bajada se dise un circuito utilizando un optoacoplador para dotar al microcontrolador de un aislamiento frente a la red y de esa manera protegerlo include D Archivos de programa LTC LTspicelVilib sub 1n4007
256. minimum solder reflow peak temperature to achieve good solderability Table 4 2 Solder Reflow Peak Temperature Package Minimum Peak Temperature Maximum Peak Temperature 56 QFN 240 C 260 C 68 QFN 240 C 260 C 100 VFBGA 240 C 260 C Higher temperatures may be required based on the solder melting point Typical temperatures for solder are 220 5 C with Sn Pb or 245 5 C with Sn Ag Cu paste Refer to the solder manufacturer specifications February 15 2007 Document No 38 12018 Rev J 42 5 Development Tool Selection This chapter presents the development tools available for all current PSoC device families including the CY8C24x94 family 5 1 Software 5 1 1 At the core of the PSoC development software suite is PSoC Designer Utilized by thousands of PSoC developers this robust software has been facilitating PSoC designs for half a decade PSoC Designer is available free of charge at http www cypress com under DESIGN RESOURCES gt gt Software and Drivers PSoC Designer 5 1 2 As the newest addition to the PSoC development software suite PSoC Express is the first visual embedded system design tool that allows a user to create an entire PSoC project and generate a schematic BOM and data sheet without writing a single line of code Users work directly with application objects such as LEDs switches sensors and fans PSoC Express is available free of charge at http ww
257. mming Board m 110 240V Power Supply Euro Plug Adapter m iMAGEcraft C Compiler Registration Required m SSP Cable m USB 2 0 Cable and Blue Cat 5 Cable m 2 CY8C29466 24PXI 28 PDIP Chip Samples February 15 2007 Document No 38 12018 Rev J 43 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 5 Development Tool Selection 5 2 2 CY3210 ExpressDK PSoC Express Development Kit The CY3210 ExpressDK is for advanced prototyping and devel opment with PSoC Express may be used with ICE Cube In Cir cuit Emulator It provides access to C buses voltage reference switches upgradeable modules and more The kit includes PSoC Express Software CD Express Development Board 4 Fan Modules 2 Proto Modules MiniProg In System Serial Programmer MiniEval PCB Evaluation Board Jumper Wire Kit USB 2 0 Cable Serial Cable DB9 110 240V Power Supply Euro Plug Adapter 2 CY8C24423A 24PXI 28 PDIP Chip Samples 2 CY8C27443 24PXI 28 PDIP Chip Samples 2 CY8C29466 24PXI 28 PDIP Chip Samples 5 3 All evaluation tools can be purchased from the Cypress Online Store Evaluation Tools 5 3 1 CY3210 MiniProg1 The CY3210 MiniProg1 kit allows a user to program PSoC devices via the MiniProg1 programming unit The MiniProg is a small compact prototyping programmer that connects to the PC via a provided USB 2 0 cable The kit includes MiniProg Programming Unit MiniEval Socket Programming and Evaluation Board
258. na 93 E Modulos Pso Carra is 96 Capitulo 8 Conexi n con el PC mediante USB onococnanicinnononocnononesnonaonoso 106 T Conceptos Generales mciiiniorian ion do alii aid 106 A ses seedssduuesssnvkesuaecbuoita teouauaasteasacatsonens th sesssaucenpenne 111 Cap tulo 9 Resultados ExperimentoS scsssscssssereesescsseresseeessescsssseessesees 117 Cap tulo 10 Conclustones 124 Cap tulo 11 Futuros desarrollos issictesssssissscssisccessscossasvscssessncassesssesosiciwests 125 A a eena SER Welded dives 126 Parte lI Estudio Coon ci 127 Parte III Manual de usuario ts cad 130 T TECLA A ata 131 2 USO del PEO FAMA ii AAA AE AAA RA DEA 133 3 Desc nexi A rones onean ieowedenedencesassiesdasa countaa dancatamsueadacarveancer 139 P rtelVo C digo fuentes li 140 Parte V gt DOTES COTS ii AA AAA 148 Indice de figuras Figura 2 1 Presa de Aldead vila e dl a 17 Figura 2 2 Central hidroel ctrica de Puente Bibey o ooccccnnmnmmmm m m m 20 Figura 2 3 Central nuclear de AlMata zs iii fiat 24 Figura 2 4 Central t rmica de Santurce rta 33 Figura 2 5 Logotipo AU A A aes 37 Fig ra 2 6 PSOE Desi ghe ineei draiar is i a R 40 Figura 2 7 Ejemplo proyecto PSO Casinos 43 Fisura 2 8 PSOC Express koipia eeen eina a ida eniai 43 Figura 2 2 Esquema PL Grae ane aia 48 Figura 2 10 Esq ema iaa gal na 55 Fis ra 2 11 M dulo Xliii sisii id 57 Figura 4 1 Arquitectura dom tica miiincinicii idad iii 63 PROUT a 42 Gest n COMMON ica ii 6
259. na casa Despu s de numerosas pruebas se encontr que el sistema funcionaba bien durante el d a pero parec a que paraba de funcionar cuando el due o ven a a verlo por la tarde Despu s de una investigaci n exhaustiva se descubri que cuando todos llegaban a casa de trabajar y empezaban a poner en marcha sus electrodom sticos el ruido en la l nea AC aumentaba hasta tal punto que el sistema paraba de funcionar Para remediarlo los ingenieros de Pico propusieron sincronizar las transmisiones de la l nea de conducci n el ctrica con el punto de cruce cero de la l nea AC ya que es cuando hay menos ruido En 1978 se present X 10 al p blico americano RadioShack fue el primer cliente RadioShack es incluso hoy d a uno de los minoristas m s grandes de productos X 10 Ya se manten a una relaci n con BSR ten an un buen nombre y una buena distribuci n por tanto se form otra 38 Pablo Desviat Cruzado empresa a medias con ellos y se fund6 X10 Ltd El dia en que la prensa iba a anunciar la presentaci n del sistema todav a no se hab a otorgado un nombre por tanto se acord el nombre El Sistema X10 BSR el cu l m s adelante fue renombrado como sistema X10 de fuente de energ a En 1978 el sistema constaba de una consola de comandos de 16 canales un M dulo de L mpara y un M dulo para los Electrodom sticos Muy pronto se continu con la adici n de un m dulo para el interruptor de pared Un a
260. nacional que imped a la importaci n de bienes de equipo as como la autarqu a En suma en los a os cuarenta el desarrollo del sistema el ctrico tropez con grandes dificultades Al estar sometida la venta de electricidad a unos precios estables en un contexto de elevada inflaci n las empresas se vieron en serias dificultades econ micas lo que provoc un desfase entre el ritmo de construcci n de nuevas instalaciones de generaci n y el crecimiento de la demanda por lo que el d ficit del a o 1944 se convirti en cr nico hasta el final de la d cada A este d ficit tambi n contribuyeron los impresionantes crecimientos de la demanda de hasta el 27 anual La constituci n de una serie de empresas el ctricas de car cter p blico en los a os cuarenta Empresa Nacional de Electricidad Endesa en 1944 Empresa Nacional Hidroel ctrica del Ribagorzana ENHER en 1949 vino a sumarse al esfuerzo que hasta entonces hab a sido realizado en exclusiva por empresas el ctricas privadas lo cual dio un fuerte impulso al desarrollo el ctrico que continu su marcha a buen ritmo en los a os siguientes 19 Pablo Desviat Cruzado A En este contexto fue el propio sector el que puso de manifiesto la necesidad de llevar a cabo una explotaci n m s eficiente coordinada y racional de los medios de producci n y de las redes de transporte a nivel nacional Figura 2 2 Central hidroel ctrica de Puente Bibey Est
261. nal Document Number 001 13625 Rev E Page 40 of 42 CYPRESS 8 Bit Timer count also see Capturelnt in the Control register Both CompareType and InterruptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 1 1 Clock ISB2 0 0 1 1 Clock ISB1 0 0 1 1 Clock LSB Capture Clock Enable selects the data input from one of 16 sources Clock selects the input clock from one of 16 sources Both parameters are set in the Device Editor Output Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 OutEnable OutputSelect ISB2 0 0 0 0 0 0 0 0 ISB1 0 0 0 0 0 0 0 0 LSB 0 0 0 0 0 0 0 0 Output Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 MSB AuxClk AuxEnable AuxSelect OutEnable OutputSelect ISB2 AuxClk 0 0 0 0 0 0 ISB1 AuxClk 0 0 0 0 0 0 LSB AuxClk 0 0 0 0 0 0 The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and OutSelect bitfields AuxEnable and AuxSelect permit driving the compare output signal onto one of the row output buses and are controlled by manipulating the row bus graphically in the Device Editor Interconnect View OutEnable is set when the terminal count output is driven onto one of the row or global ou
262. ncludes three programming module cards and supports multiple Cypress products The kit includes m Modular Programmer Base E 3 Programming Module Cards m MiniProg Programming Unit m PSoC Designer Software CD Getting Started Guide m USB 2 0 Cable 5 4 2 CY3207ISSP In System Serial Programmer ISSP The CY3207ISSP is a production programmer It includes pro tection circuitry and an industrial case that is more robust than the MiniProg in a production programming environment Note CY3207ISSP needs special software and is not compati ble with PSoC Programmer The kit includes m CY3207 Programmer Unit m PSoC ISSP Software CD m 110 240V Power Supply Euro Plug Adapter m USB 2 0 Cable February 15 2007 Document No 38 12018 Rev J 44 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 5 Development Tool Selection 5 5 Accessories Emulation and Programming Table 5 1 Emulation and Programming Accessories Part Pin Flex Pod Kit Foot Kit Adapter Package CY8C24794 56 QFN CY3250 CY3250 AS 56 28 24LFXI 24X94QFN 56QFN FK CY8C24894 56QFN CY3250 CY3250 AS 28 28 02SS 24LFXI 24X94QFN 56QFN FK 6ENG GANG a Flex Pod kit includes a practice flex pod and a practice PCB in addition to two flex pods b Foot kit includes surface mount feet that can be soldered to the target PCB c Programming adapter converts non DIP package to DIP footprint S
263. nction The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_Stop Description Stops the Timer24 operation Document Number 001 13625 Rev E Page 18 of 42 am PX oe Y Cypress 8 Bit Timer C Prototype void Timer24 Stop void Assembly call Timer24 Stop Parameters None Return Value None Side Effects The output will be set low and subsequent writes to the Period register will cause the Count register to update with the new period value The A and X registers may be modified by this or future implementa tions of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer24_WritePeriod Description Writes the Period register with the period value The period will be loaded into the Count register when the zero count condition is reached or immediately if the Timer24 is currently stopped C Prototype void Timer24 WritePeriod DWORD dwPeriod Assembly mov X dwPeriod move address of period into X call Timer24 WritePeriod Parameters dwPeriod The value is from 0 to 224 1 Return Value None Side Effects The
264. nd allows you define complex breakpoint events that include monitoring address and data bus values memory locations and external signals February 15 2007 Document No 38 12018 Rev J 7 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview Document Conventions Acronyms Used The following table lists the acronyms that are used in this doc ument Acronym Description AC alternating current ADC analog to digital converter API application programming interface CPU central processing unit CT continuous time DAG digital to analog converter DC direct current ECO external crystal oscillator EEPROM electrically erasable programmable read only memory FSR full scale range GPIO general purpose lO GUI graphical user interface HBM human body model ICE in circuit emulator ILO internal low speed oscillator IMO internal main oscillator 10 input output IPOR imprecise power on reset LSb least significant bit LVD low voltage detect MSb most significant bit PC program counter PLL phase locked loop POR power on reset PPOR precision power on reset PSoC Programmable System on Chip PWM pulse width modulator SC switched capacitor SRAM static random access memory Units of Measure A units of measure table is located in the Electrical Specifica tions section Table 3 1 on page 22 lists all the abbreviatio
265. ner PC USB ICE cube Mini Programmer Target Host PC Evaluation Board Para verificar el buen funcionamiento de todas las partes del equipo se dividi el proyecto en bloques funcionales haci ndolos funcionar por separado en cualquier situaci n posible que se pudiera dar de modo que quedara probado su buen funcionamiento en cualquier caso posible Una vez probado todo por separado se procedi a montar el conjunto y hacer diferentes pruebas Sin embargo no se llego a conectar el dispositivo a la red el ctrica por falta de materiales para el montaje de un circuito esencial Conc lusiones Aunque el proyecto no lleg a probarse en la instalaci n el ctrica si se comprob que la se al corres pondiente de X10 era mandada por el microcontrolador PSoC cuando se daba la orden desde el PC por medio del sistema de control dise ado por lo que a falta de su comprobaci n en la red se puede decir que se han cumplido con los objetivos del proyecto Dise ar un emisor de X10 Realizar una conexi n USB con un PC Realizar un sistema de control del emisor IV X10 DOMOTIC DEVICE INTERFACE USB Author Desviat Cruzado Pablo Director Mu oz Frias Jos Daniel Zamora Macho Juan Luis PROJECT SUMMARY The humankind evolution has generated a series of events that form part of great transcendence historic stages Technology is born along human beings and has turned to be a priority element for social groups that u
266. ng of this parameter This parameter appears only for members of the CY8C29 27 24 22 21 xxx and CY8CLED04 08 16 families of PSoC devices Period This parameter sets the period of the timer Allowed values are between 0 and 232 1 This value is loaded into the Period register The period is automatically reloaded when the counter reaches zero or the timer is enabled from the disabled state This value may be modified using the API CompareValue This parameter sets the count point in the timer period when a compare event is triggered This value is loaded into the Compare register Allowed values are between zero and the period value This value may be modified using the API CompareType This parameter sets the compare function type less than or less than or equal as described in the functional description above InterruptType This parameter specifies whether the terminal count event or the compare event triggers the interrupt The interrupt is enabled using the API Document Number 001 13625 Rev E Page 6 of 42 cr PRESS 8 Bit Timer ClockSync In the PSoC devices digital blocks may provide clock sources in addition to the system clocks Digital clock sources may even be chained in ripple fashion This introduces skew with respect to the system clocks These skews are more critical in the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 PSoC device families because of various data path optimizations particularly those applied to
267. nnections USB and the possibility of creating programmable analogical and digital blocks in such a way that most of hardware of the device filters amplifiers etc would be possible to be created by means of software VI PSoC Designer PC ICE cube Mini Target Host PC ya Evaluation Board In order to verify the good operation of all the parts of the equipment the project was divided in functional blocks making them work separately in any possible situation that it was possible to be given Once checked everything separately it was mounted together and test However th device was never conected to main because there were not materials for the assembly of an essential circuit Conc lusions Although the project was never conected to the electrical system it were verified that the corresponding signal of X10 was sent by the microcontroller PSoC when the order occurred from the PC by means of the designed control system reason why it is possible to be said that they have been fulfilled the objectives of the project To design an emitter of X10 To realise a connection USB with a PC To realise a control system of the emitter MEMORIA Indice General Partel IUCN OTE aii AAA Sass easesostndeasedee 7 Capitulo Introducci n scan at AA AE Ad 8 1 Motivaci n del proyecto amsniicininisiianionicii nsirariatanio rar ciiinas dictando 8 2 Objetivos del proyecto iinuiinnicadi id cda 10 3 MCCA OOS aiii idad
268. ns used to measure the PSoC devices Numeric Naming Hexidecimal numbers are represented with all letters in upper case with an appended lowercase h for example 14h or 3Ah Hexidecimal numbers may also be represented by a Ox prefix the C coding convention Binary numbers have an appended lowercase b e g 01010100b or 01000011b Numbers not indicated by an h or b are decimal Table of Contents For an in depth discussion and more information on your PSoC device obtain the PSoC Mixed Signal Array Technical Refer ence Manual This document encompasses and is organized into the following chapters and sections 6 Pin Information 1 1 56 Pin Part Pinout 1 2 56 Pin Part Pinout with XRES oo eee cesses eeeeeeeeteeeeeees 10 1 3 68 Pin Part Pinout si vercion camera 11 1 4 68 Pin Part Pinout On Chip Debug 12 1 5 100 Ball VFBGA Part Pinout iiser 13 1 6 100 Ball VFBGA Part Pinout On Chip Debug cccccoicincccnncoccno 15 1 7 100 Pin Part Pinout On Chip Debug ccccicnccnicnonicicnnaninccncnnnnnnos 17 Register Reference 2 1 Register Conventions 19 2 1 1 Abbreviations Used 2 2 Register Mapping Tables Electrical Specifications 3 1 Absolute Maximum Ratings oooocononccnnnnnnnocnnnnnccnncancnn cronica 23 3 2 Operating Temperature 3 3 DC Electrical Characteristics 3 3 1 DC Chip Level Specifications 3 3
269. nterface descriptor Las restantes tres entradas son strings que ya se hab an definido Aunque un dispositivo tiene muchas configuraciones en este proyecto s lo se ha definido una Esta est definida por un configuration descriptor Se ha definido que la corriente m xima que se utilizar ser n 100 mA y que esta ser dada por el cable USB Esto caracteriza al dispositivo como de bajo consumo y por tanto puede conectarse a cualquier puerto Se puede especificar hasta 500 mA un dispositivo de alto consumo y aun as se puede alimentar por el cable de USB sin embargo no se podr conectar a puertos que no tengan alimentaci n Una configuraci n contiene una colecci n de interfaces y en este proyecto de nuevo solo se utiliza una Los Class drivers se caracterizan por los requerimientos de transferencia de datos de los dispositivos En este caso se ha elegido un HID Human Interface Device puesto que las caracter sticas de transferencia de datos concuerdan con las que se van a necesitar 115 Pablo Desviat Cruzado E asa Una interfaz contiene muchos endpoints y un HID class requiere tener un IN endpoint de interrupci n Opcionalmente se podria haber definido un OUT endpoint de interrupci n pero el EPO se usar para los datos recibidos desde el host No se necesita declarar el EPO puesto que siempre esta presente Un HID class requiere un report descriptor que defina exactamente el tamafio y el for
270. nto el tiempo de trabajo deber durar el 50 de ese periodo es decir 4 166p1s tD Esto se puede observar en la figura 1 4 156u5 Figura 7 7 Se al 120 KHz 91 Pablo Desviat Cruzado A Esta salida de 120kHz ser habilitada cada que sea necesario hacer una transmisi n de informaci n por el cruce por cero y durar un milisegundo El terminal por donde saldr esta se al depender del puerto del PSoC que se est usando A esta salida se conectar un transistor que simplemente acoplar la se al a la C A gracias al filtro paso alto de 0 1pF Esta se al durar 1ms a partir del cruce por cero Si existe la se al el detector la interpretar como uno l gico si no existe ser interpretada como cero l gico Condensador 0 1 uF 250W Figura 7 8 Circuito emisor X10 92 Pablo Desviat Cruzado lt gt Do 3 Fuente de 5 V sin transformador Puesto que otro de los objetivos del proyecto es disminuir el tama o de los actuales dispositivos de X10 se dise ara una fuente de 5V sin transformador que alimentar el circuito En la mayor a de las aplicaciones que utilizan fuentes de corriente directa y que son alimentadas por la toma de energ a de corriente alterna se utilizan transformadores para reducir el voltaje de alimentaci n y puentes de diodos para rectificar la onda senoidal y obtener un voltaje casi directo con la ayuda de condensadores funcionando c
271. o view a current list of available items Technical Training Modules Free PSoC technical training modules are available for users new to PSoC Training modules cover designing debugging advanced analog and CapSense Go to http www cypress com techtrain Consultants Certified PSoC Consultants offer everything from technical assistance to completed PSoC designs To contact or become a PSoC Consultant go to http www cypress com click on Design Support located on the left side of the web page and select CYPros Consultants Technical Support PSoC application engineers take pride in fast and accurate response They can be reached with a 4 hour guaranteed response at http www cypress com support login cfm Application Notes A long list of application notes will assist you in every aspect of your design effort To view the PSoC application notes go to the http www cypress com web site and select Application Notes under the Design Resources list located in the center of the web page Application notes are listed by date as default February 15 2007 Document No 38 12018 Rev J 4 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview Development Tools PSoC Designer is a Microsoft Windows based integrated development environment for the Programmable System on Chip PSoC devices The PSoC Designer IDE and application runs on Windows NT 4 0 Windows 2000 Windows Millennium Me or
272. of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may be limited by and subject to the applicable Cypress software license agreement PERFORM 8 Bit Pulse Width Modulator Data Sheet PWM8 Copyright 2000 2009 Cypress Semiconductor Corporation All Rights Reserved PSoC Blocks API Memory Bytes Pins per Resources Digital Analog CT Analog SC Flash RAM External I O CY8C29 27 24 22 21xxx CY8C23x33 CY7C64215 603xx CYWUSB6953 CY8CLED02 04 08 16 CY8CLEDO3D 04D CY8CNP102 CY8CTST110 CY8CTMG110 CY8CTST120 CY8CTMG120 CY8CTMA120 CY8C21x45 CY8C22x45 CY8CTMG300 C
273. og Continuous Time PSoC block Power High and Opamp Bias High is not supported at 3 3V Table 3 20 5V AC Operational Amplifier Specifications Symbol Description Min Typ Max Units Notes TROA Rising Settling Time from 80 of AV to 0 1 of AV 10 pF load Unity Gain Power Low Opamp Bias Low 3 9 us Power Medium Opamp Bias High 0 72 us Power High Opamp Bias High 0 62 us Tsoa Falling Settling Time from 20 of AV to 0 1 of AV 10 pF load Unity Gain Power Low Opamp Bias Low 5 9 us Power Medium Opamp Bias High 0 92 us Power High Opamp Bias High 0 72 us SRroA Rising Slew Rate 20 to 80 10 pF load Unity Gain Power Low Opamp Bias Low 0 15 V us Power Medium Opamp Bias High T7 V us Power High Opamp Bias High 6 5 V us SRroA Falling Slew Rate 20 to 80 10 pF load Unity Gain Power Low Opamp Bias Low 0 01 V us Power Medium Opamp Bias High 0 5 V us Power High Opamp Bias High 4 0 V us BWoa Gain Bandwidth Product Power Low Opamp Bias Low 0 75 MHz Power Medium Opamp Bias High 3 1 MHz Power High Opamp Bias High 5 4 MHz ENOA Noise at 1 kHz Power Medium Opamp Bias High 100 nV rt Hz Table 3 21 3 3V AC Operational Amplifier Specifications Symbol Description Min Typ Max Units Notes TROA Rising Settling Time from
274. oint to ICE Inspector M anager The next step is to write your main program and any sub rou tines using PSoC Designers Application Editor subsystem The Application Editor includes a Project Manager that allows you to open the project source code files including all gener ated code files from a hierarchal view The source code editor provides syntax coloring and advanced edit features for both C and assembly language File search capabilities include simple string searches and recursive grep style patterns A single mouse click invokes the Build Manager It employs a profes sional strength makefile system to automatically analyze all file dependencies and run the compiler and assembler as nec essary Project level options control optimization strategies used by the compiler and linker Syntax errors are displayed in a console window Double clicking the error message takes you directly to the offending line of source code When all is correct the linker builds a HEX file image suitable for programming The last step in the development process takes place inside the PSoC Designer s Debugger subsystem The Debugger down loads the HEX image to the In Circuit Emulator ICE where it runs at full speed Debugger capabilities rival those of systems costing many times more In addition to traditional single step run to breakpoint and watch variable features the Debugger provides a large trace buffer a
275. omo filtros En las aplicaciones que se presentan en este trabajo es necesario reducir el tama o de elementos ya que se necesitar una fuente de corriente directa para cada unidad a utilizar No es factible montar transformadores en cada unidad ya que son voluminosos y caros Se decidi utilizar una fuente sin transformador Esta fuente utiliza diodos zener como reguladores de voltaje y condensadores de poli ster El diagrama de la fuente es como se muestra en la figura 1N4005 Figura 7 9 Esquema fuente 5 V sin transformador Cuando un condensador y una carga est n conectados en serie a la alimentaci n de corriente alterna C A una corriente constante se puede 93 Pablo Desviat Cruzado ee mantener a trav s de la carga siempre y cuando la impedancia de los condensadores sea mayor a la resistencia de la carga En la figura se muestran dos condensadores que ser n los encargados de recibir el voltaje sobrante de la regulaci n que da el diodo zener de 5 1V En ellos habr un voltaje de 220Vrms aproximadamente considerando el voltaje de entrada como 230VCA Estos condensadores deber n seleccionarse a 250V ya que trabajar n directamente con la l nea de C A Es importante que sean de poli ster para su buen funcionamiento La corriente de entrada que hay en la fuente se puede determinar obteniendo el voltaje RMS de una media onda senoidal yV y 152Y HFRMS gt gt Posteriormente se ob
276. ompare output Document Number 001 13625 Rev E Page 36 of 42 cr PRESS 8 Bit Timer Count Register DRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Count MSB LSB Count LSB The Count register is the 16 bit down count value decremented by 1 in every clock cycle that the enable input is active Its value is loaded from the contents of the Period register in the clock cycle following the terminal count zero value It can be read using the Timer16 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Period MSB LSB Period LSB The Period register is a write only register that can be set through the Device Editor and by the Timer16 API When written the value is transferred to the Count register if the user module is disabled through the API Its value is automatically copied into the Count register in the clock cycle following terminal count Compare Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Compare Val MSB LSB Compare Val LSB The Compare register holds the value against which the Count register is tested in order to generate the compare output It can be set by the Device Editor and the Timer16 API Control Register CRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 0 0 0 LSB 0 0 0 0 0 0 0 Start Stop Start Stop indicates that the Timer16 is enabled when set and disabled when clear It is modified by using the Timer16 API 24 Bit Timer Configuration Registers The 24 bit Timer uses three digi
277. omunicaciones La dom tica tiene una caracter stica 65 Pablo Desviat Cruzado fundamental que es la integraci n de sistemas por eso hay nodos que interconectan la red dom tica con diferentes dispositivos como Internet la red telef nica etc Sistemas de Sensores y Actuadores notificaci n a DECT SMS ete war MEROS lt Cadra anal gica Domo Uv 4 m 4 Ze ControlBOX Y IX MC Servidor Video IP s X in A o INTERNET A mn A E 4 Y Y Fonet Cam f gt i Estudio de VIGIA BOX Grabaci n AccessBOX VIGIA Supervisor VidiWall Manager Figura 4 2 Gesti n dom tica 66 Pablo Desviat Cruzado E 4 Descripci n del sistema dom tico Tipo de Arquitectura La arquitectura de un sistema dom tico como la de cualquier sistema de control especifica el modo en que los diferentes elementos de control del sistema se van a ubicar Existen dos arquitecturas b sicas la arquitectura centralizada y la distribuida Arquitectura centralizada Es aquella en la que los elementos a controlar y supervisar sensores luces v lvulas etc han de conectarse hasta el sistema de control de la vivienda computadora o similar Fl sistema de control es el coraz n de la vivienda en cuya falta todo deja de funcionar y su instalaci n no es compatible con la instalaci n el ctrica convencional en cuanto que en la fase de construcci n hay que elegir esta topolog a
278. on the capture signal itself In the CY8C26 25xxx family set the interrupt to trigger on the compare event when using the external capture signal to perform event timing In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 set the Document Number 001 13625 Rev E Page 3 of 42 cr PRESS 8 Bit Timer interrupt to trigger on the capture event when using the external capture signal to perform event timing Set the interrupt to trigger on the terminal count when performing elapsed timing measurements For algorithms that require reading the Timer countdown value on the fly without affecting the Count or Compare registers the ReadTimerSaveCV API can be called This function will read the Count register value while preserving the Compare register contents This function has some potential latency side effects as noted in the API section of this user module The capture mechanism allows an external event to be timed with a limiting bound on the maximum time before an action should occur This is performed as follows 1 Set the Period register with a period value equal to the maximum value 2 Set the Compare register with the maximum time limit count computed as follows MaxTimeLimitCount Pedi Me mi Equation 5 ClockPeriod 3 In the CY8C26 25xxx family set the interrupt to trigger on the compare event with a Less Than or Equal To comparison function In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families set the interrupt to trigger
279. or received State Value Description NO_EVENT_ PENDING 0x00 Indicates that the endpoint is awaiting SIE action EVENT _PENDING 0x01 Indicates that the endpoint is awaiting CPU action NO_EVENT_ALLOWED 0x02 Indicates that the endpoint is locked from access IN_BUFFER_FULL 0x00 The IN endpoint is loaded and the mode is set to ACK IN IN_BUFFER_EMPTY 0x01 An IN transaction occurred and more data can be loaded OUT_BUFFER_EMPTY 0x00 The OUT endpoint is set to ACK OUT and is waiting for data OUT _BUFFER_FULL 0x01 An OUT transaction has occurred and data can be read Document Number 001 13629 Rev D Page 6 of 26 E a Y Cypress USBFS Device Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Currently only the IDX_PP page pointer register is modified USBFS_bGetEPAckState Description Determines whether or not an ACK transaction occurred on this endpoint by reading the ACK bit in the control register of the endpoint This function does not clear the ACK bit C Prototype BYTE USBFS bGetEPState BYTE bEPNumber Assembly MOV A 1 Select endpoint 1 call USBFS_bGetEPState Parameters Register A contains the endpoint number Return Value If an ACKed t
280. or X 10 RF con sensibilidad de luz Controlador X 10 Sensor de Puertas Transmisor humos RF Ventanas universal Seguridad T cnica Detecci n fugas de agua y gas Agua Gas N ACTUADORES Y o DY ELEMENTOS EXTERNOS A CONTROLAR carril DIN Filtro de se al Interruptor rel Atenuador Modulos de pared Para Lamparas Atenuaci n encendido y apagado de luces Para Aparatos Encendido y apagado Para Persianas Subida bajada y parada M dulos de enchufe Para L mparas Atenuaci n encendido y SA Para Aparatos Encendido y apagado 55 Pablo Desviat Cruzado E Do Existen diversos m dulos de X10 Actuadores M dulos de Aparato o de Potencia Para el encendido apagado de equipos M dulos de Iluminaci n Para el control de luces con variaci n de su intensidad de iluminaci n dimmer M dulos de Persiana Para regular el movimiento de persianas cortinas toldos v lvulas motorizadas con movimiento en dos direcciones Sensores Sensores no X 10 adaptados mediante transmisor universal X 10 Detectores de humo y fuego detectores de rotura de cristal de apertura de puertas y ventana de fuga de gas y agua termostatos convencionales Sensor de presencia X 10 por RF con sensibilidad de luz Termostato X 10 Controladores Miniprogramador Programaci n horaria simulaci n de presencia teclado Mandos a distancia multimedia por RF Dom tic
281. or medical life support life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges PSoC Designer and Programmable System on Chip are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compil
282. os casos en los que las necesidades del sistema no impongan requerimientos muy exigentes en cuanto a la velocidad de transmisi n la l nea de distribuci n de energ a el ctrica puede ser suficiente como soporte de dicha transmisi n 2 Soportes met licos La infraestructura de las redes de comunicaci n actuales tanto p blicas como privadas tiene en un porcentaje muy elevado cables met licos de cobre como soporte de transmisi n de las se ales el ctricas que procesa En general se pueden distinguir dos tipos de cables met licos Par met lico Los cables formados por varios conductores de cobre pueden dar soporte a un amplio rango de aplicaciones en el entorno domestico Este tipo de cables pueden transportar voz datos y alimentaci n de corriente continua Los denominados cables de pares est n formados por cualquier combinaci n de los tipos de conductores que a continuaci n se detallan 69 Pablo Desviat Cruzado A 1 Cables formados por un solo conductor con un aislamiento exterior pl stico como los utilizados para la transmisi n de las se ales telef nicas 2 Par de cables cada uno de los cables esta formado por un arrollamiento helicoidal de varios hilos de cobre Por ejemplo los utilizados para la distribuci n de se ales de audio 3 Par apantallado formado por dos hilos recubiertos por un trenzado conductor en forma de malla cuya misi n consiste en aislar las se ales que cir
283. outines must preserve the values of push push mov call X A X _dwElapsedTime Timer24 ReadTimer call pop POP Timer24 Stop A X r r Insert your custom code below this banner r r r the A and X CPU registers Insert your custom code above this banner PEBSOS reti UserCode END Do not change this line The same code in C is as follows Note that the interrupt routine must be written in assembly include lt m8c h gt include DWORD dwElapsedTime void main Timer2 PSOoCAPI h Timer2 Timer2 4 E M8C_En ableGInt Timer2 while 32 Bit Timer Sample Firmware Source Code v tart dwElapsedTime part specific constants and macros PSoC API 4 WritePeriod O0xffffff 0 definitions for all User Modules 4 WriteCompareValue 0x0bdc00 nablelnt In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based e zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT
284. para comprobar la tensi n y la secuencia de fase o bien a modo de transformador de interfaz En lo que respecta al hardware en el chip los bloques digitales se componen de registros de desplazamiento que se configuran a trav s del registro de la RAM est tica SRAM Se pueden elegir distintas entradas de reloj lo que permite contar con funciones como temporizador contador modulador de ancho de pulso IrDa UART SPI I C y mucho m s El temporizador y el contador pueden conectarse en cascada con lo que se obtienen resoluciones de 8 a 32 bits En el caso de los moduladores de ancho de pulso se trata de una resoluci n de 8 bits y 16 bits Los bloques anal gicos se dividen en bloques continuous timing CT y bloques switched capacitor SC 41 Pablo Desviat Cruzado A Los bloques continouos timing CT se basan en un amplificador operacional una selecci n de distintas fuentes de entrada y un divisor resistivo Tanto las fuentes de entrada como la relaci n de resistencia pueden configurarse a trav s del registro SRAM ya mencionado Se tiene una se al de entrada continua y una se al de salida continua lo que permite realizar funciones como amplificadores o comparadores programables Los bloques switched capacitor SC tambi n se basan en amplificadores operacionales Sin embargo en este caso se conmutan las capacidades en el circuito de ah el nombre switched capacitor A trav s del registro SRAM se
285. parameter This parameter appears only for members of the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families of PSoC devices TerminalCountOut The terminal count output is an auxiliary Counter output This parameter allows it to be disabled or connected to any of the row output busses This parameter appears only for members of the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families of PSoC devices Period This parameter sets the period of the counter Allowed values for PWM68 are between zero and 255 Allowed values for PWM16 are between zero and 216 1 The period is loaded into the Period register The effective output waveform period of the PWM16 is the period count 1 The value may be modified using the API PulseWidth Sets the pulse width of the PWM output Allowed values are between zero and the period value The value may be modified using the API InterruptType This parameter sets the interrupt trigger type The interrupt can be set so that it triggers on the rising edge of the output signal or on the terminal count of the Counter register A separate register independently enables the interrupt Document Number 001 13581 Rev F Page 5 of 19 a Y Cypress 8 Bit Pulse Width Modulator CompareType This parameter sets the compare function type Less Than or Less Than or Equal To ClockSync In the PSoC devices digital blocks may provide clock sources in addition to the system clocks Digital clock sources
286. pecific details and ordering information for each of the adapters can be found at http www emulation com 5 6 3rd Party Tools Several tools have been specially designed by the following 3rd party vendors to accompany PSoC devices during develop ment and production Specific details for each of these tools can be found at htip www cypress com under DESIGN RESOURCES gt gt Evaluation Boards 5 7 Build a PSoC Emulator into Your Board For details on how to emulate your circuit before going to vol ume production using an on chip debug OCD non production PSoC device see Application Note Debugging Build a PSoC Emulator into Your Board AN2323 at http www cypress com an2323 February 15 2007 Document No 38 12018 Rev J 45 6 Ordering Information 2 vg see uu a CYPRESS PERFORM The following table lists the CY8C24x94 PSoC device s key package features and ordering codes Table 6 1 CY8C24x94 PSoC Device s Key Features and Ordering Information YN ME ee ES EE o D 2 fo a o 538 58 32 ES MeNe E E E o ko 8 SISIE gt as rt D z D W re LM y E oc ae sg 2 ma e 6 5 q 2 r fo FR a lt a lt E 56 Pin 8x8 mm QFN CY8C24794 24LFXI 16K 1K 40C to 85C 4 6 50 48 2 No 36 Pin 8x8 EN CY8C24794 24LFXIT 16K 1K 4octos8sc 4 6
287. pecifications 3 3 4 DC Operational Amplifier Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only The Operational Amplifier is a component of both the Analog Continuous Time PSoC blocks and the Analog Switched Capacitor PSoC blocks The guaranteed specifications are measured in the Analog Continuous Time PSoC block Table 3 7 5V DC Operational Amplifier Specifications Symbol Description Min Typ Max Units Notes Vosoa Input Offset Voltage absolute value Power Low Opamp Bias High 1 6 10 mV Power Medium Opamp Bias High 1 3 8 mV Power High Opamp Bias High 1 2 7 5 mV TCVosoa Average Input Offset Voltage Drift 7 0 35 0 uV C legoa Input Leakage Current Port O Analog Pins 20 pA Gross tested to 1 uA Cinoa Input Capacitance Port 0 Analog Pins 7 4 5 9 5 pF Package and pin dependent Temp 25 C Vomoa Common Mode Voltage Range 0 0 Vdd V The common mode input voltage range is mea Common Mode Voltage Range high power or high 0 5 Vdd 0 5 sured through an analog output buffer The opamp bias specification includes the limitations imposed by the characteristics of the analog output buffer GoLoA Open
288. por lo que se a adi como objetivo que el dispositivo a dise ar fuera bidireccional lo que le aportar a una gran ventaja sobre los modelos ya existentes A su vez y aprovechado que hoy por hoy podemos encontrar un ordenador en pr cticamente cada casa se pens en utilizar esta caracter stica como una ventaja que pudiera hacer aun m s c moda la utilizaci n del sistema por parte del usuario y por tanto se a adi la idea de hacer un control por medio de una conexi n USB a un ordenador personal El hardware d nde se realiz el proyecto se eligi como consecuencia de otro de los objetivos de este Una idea que se tuvo desde el primer momento era la reducci n de tama o del dispositivo que se fuera a crear en comparaci n con los emisores receptores comunes Para ello se seleccion un micrcontrolador de la compa a Cypress Semiconductor cuyas principales caracter sticas eran la posibilidad de realizar conexiones USB y la posibilidad de crear bloques anal gicos y digitales programables de tal manera que la mayor parte de hardware del dispositivo filtros ammplificadores etc se pudiera crear mediante software Ul En cuanto al sistema de control mediante USB gracias a la facilidad del PSoC no implica mayor trabajo que el incluir un m dulo de USB programable y configurarlo con los par metros de transferencia de datos consumo etc que se tengan en funci n de la aplicaci n que se vaya a desarrollar PSoC Desig
289. porcionan elevados rendimientos todo ello para lograr una garant a de suministro razonable Es decir recoge entendemos que adecuadamente la mayor parte de los postulados para avanzar en la senda del desarrollo sostenible aunque pudiera echarse en falta un mayor nfasis en lo relativo a las pol ticas de ahorro energ tico en el consumo final de energ a aspecto que se ha pospuesto para un plan posterior 36 Pablo Desviat Cruzado E asa 3 Historia del protocolo X 10 Los or genes de X 10 est n en una compa a llamada Pico Electronics en Glenrothes Escocia Pico fue fundada en 1970 por un grupo de ingenieros que trabajaban para General Instrument Microelectronics G L Los fundadores de Pico tuvieron la idea de que era posible desarrollar una calculadora chip nica la mayor a de calculadoras en aquel momento usaban como m nimo 5 circuitos integrados ICs Pico lo hizo y esta calculadora IC fue precisamente el primer microprocesador del mundo una historia muy diferente a lo que Intel o Texas Instruments aseguran O Figura 2 5 Logotipo X10 Pico pas a desarrollar una gama de calculadoras ICs que fueron fabricadas por G I y vendidas a fabricantes de calculadoras como Bowmar Litton y Casio A Pico le pagaron los derechos de patente de ICs pero como el precio de los ICs para calculadoras descendi de 20 a menos de un d lar los directores de Pico vieron la necesidad de desarrollar productos compl
290. ptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 1 1 Clock LSB Enable Clock Enable selects the input signal of the same name from one of 16 sources The user module Enable parameter setting in the Device Editor determines its value Similarly the user module Clock parameter setting determines this value Output Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 Out Enable OutputSelect LSB 0 0 0 0 0 0 0 0 Output Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 MSB AuxClk AuxEnable AuxSelect OutEnable OutputSelect LSB AuxClk 0 0 0 0 0 0 The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and Document Number 001 13581 Rev F Page 18 of 19 a ZBP Cypress 8 Bit Pulse Width Modulator PERFORM OutSelect bit fields AuxEnable and AuxSelect permit driving the terminal count output signal onto one of the row output busses and are controlled by manipulating the row bus graphically in the Device Editor placement view OutEnable is set when the compare output is driven onto one of the row or global output busses OutputSelect controls which of the busses are driven from the compare output Coun
291. que est n influyendo de forma decisiva en la modificaci n de la estructura de generaci n el ctrica La estructura empresarial de las empresas el ctricas se ha adaptado r pidamente a los requerimientos del nuevo marco regulatorio Las principales caracter sticas del nuevo marco son las siguientes Distingue entre actividades reguladas tales como el transporte la distribuci n la gesti n econ mica y la gesti n t cnica del sistema y las actividades que se realizan en r gimen de competencia la generaci n la comercializaci n y los intercambios internacionales Para ello se estableci la separaci n incluso jur dica entre las actividades reguladas y no reguladas y entre las actividades reguladas la necesidad de la separaci n contable La liberalizaci n de las actividades de generaci n y comercializaci n dio pie a la libre creaci n de nuevas empresas y a 29 Pablo Desviat Cruzado la implantaci n de grupos extranjeros que act an en estos segmentos de la actividad el ctrica En cuanto al transporte y la distribuci n se consideran actividades con car cter de monopolio natural manteni ndose como actividades reguladas cuya liberalizaci n se consigue mediante el acceso a terceros de la red con pago de unas tarifas de acceso en funci n de la potencia la energ a y la tensi n de suministro Por tratarse de una actividad regulada pe
292. que se necesita saber para comprender como se ha realizado la conexi n entre el CY8C24894 y el PC Decir tambi n que en este cap tulo solo se cubrir los detalles de operaci n del dispositivo de una forma simplificada y r pida puesto que hablar sobre las conexiones USB llevar a m s de cien p ginas y tampoco es el objetivo de este proyecto Dispositivo gt Configuraciones gt Interfaces Endpoints El s mbolo gt significa colecci n de El resto de t rminos se explicar n en las siguientes p ginas El USB es un protocolo de emisi n maestro esclavo Un solo maestro tambi n llamado host controller controla todos los bus de comunicaci n y los comparte el ancho de banda disponible entre 126 esclavos tambi n llamados dispositivos o funciones Un canal de USB son solo cuatro cables tensi n tierra y generalmente un par de se ales Las l neas por las que van las se ales son unidireccionales y su direcci n es cambiada dentro del protocolo 106 Pablo Desviat Cruzado A No hay una l nea de reloj fisco pero un reloj est embebido en el esquema de la se al USB utiliza paquetes de datos que incluyen chequeo de errores y distintos tipos de paquetes definidos se usan en una secuencia concreta para dar robustez al intercambio de datos La siguiente figura muestra algunos de los paquetes m s interesantes que el CY8C24894 maneja ORJE RCS 0 to 1023 bytes gt Figura 8
293. r metros generales que configurar n las caracter sticas del PSoC Global Resources examplel AMAIA A 5 0 24MHz CPU_Clock SysCik 1 Sleep_Timer 512 Hz WC1 SysClk N 10 WC2 WC14N 16 WC3 Source C2 WC3 Divider 15 SysClk Source Internal SysClk 2 Disable No Analog Power SC On Ref Low Ref Mux dd 2 BandGap AGndBypass Disable Op Amp Bias Low A Buff_Power Low Trip Voltage LYD 481 LWDT hrottleB ack Disable Watchdog Enable Disable Figura 7 11 Recursos generales Power Setting se le indica la alimentaci n del microcontrolador y la frecuencia a la que el reloj del sistema funcionar En este proyecto se trabajar a 5V y con un reloj de sistema de 24 Mhz CPU_Clock se selecciona la velocidad de la CPU a partir de la velocidad que se seleccion en el reloj del sistema Este par metro afecta al nivel de alimentaci n cuando se resetea el micro para proteger a la CPU de trabajar fuera de las especificaciones de su Vdd Se ha seleccionado 24 Mhz Sleep_Timer se elige el tempo de sleep interrupt entre 1 Hz y 512 Hz Solo se utiliza si el Watchdog est activado VC1 VC2 y VC3 distintos relojes que pueden ser seleccionados por los distintos m dulos que se empleen Su velocidad depender 97 Pablo Desviat Cruzado A de el di
294. rael NAMS luego ampliada a tecnolog as ASCOM y DS2 Tambi n ha realizado distintas pruebas en Toledo y Valencia UNION FENOSA ha realizado diversas pruebas en sus propios edificios de oficinas en Alcal de Henares 3 clientes en Guadalajara 28 clientes y en Madrid En las pruebas se han utilizado equipos de tecnolog a de Mainet y de DSZ y se han 49 Pablo Desviat Cruzado lt P asa ofrecido servicios de telefonia e internet con velocidades de acceso de 1 Mbps Todas estas pruebas y experiencias si bien la mayoria de ellas realizadas con equipos pre industriales han puesto de manifiesto la viabilidad t cnica de la tecnolog a PLC Los estudios econ micos preliminares ponen de relieve la rentabilidad del negocio en el medio largo plazo El exito de la experiencia obtenidas por las distintas compa as en sus pruebas ha permitido confirmar la viabilidad t cnica de la tecnolog a PLC en condiciones de utilizaci n real y con diferentes topolog as el ctricas Es decir ha demostrado el potencial del PLC su viabilidad t cnica e identificado las claves de la tecnolog a No obstante hay que tener en cuenta que cada Empresa El ctrica dispone de diferentes capacidades y caracter sticas en las redes troncales que deben ser capaces de soportar canalizar y gestionar los flujos de informaci n generados por las posibles redes PLC a instalar 50 Pablo Desviat Cruzado E X 10 Entre 1
295. ransaction occurred then this function returns a non zero value Otherwise a zero is returned Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions USBFS_wGetEPCount Description This functions returns the value of the endpoint count register The Serial Interface Engine SIE includes two bytes of checksum data in the count This function subtracts two from the count before returning the value Call this function only for OUT endpoints after a call to USB_GetEPState returns EVENT _PENDING C Prototype WORD USBFS wGetEPCount BYTE bEPNumber Assembly MOV A 1 Select endpoint 1 call USBFS bGetEPCount Parameters Register A contains the endpoint number Return Value Returns the current byte count from the specified USBFS endpoint in A and X Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions Document Number 001 13629 Rev D Page 7 of 26 Sn Y Cypress USBFS Device USBFS_LoadinEP and USBFS_Loa
296. ranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C 3 0V to 3 6V and 40 C lt Ta lt 85 C or 2 4V to 3 0V and 40 C lt Ty lt 85 C respectively Typical parameters apply to 5V at 25 C and are for design guidance only Table 3 9 DC Low Power Comparator Specifications Symbol Description Min Typ Max Units Notes VREFLPC Low power comparator LPC reference voltage range 0 2 Vdd 1 V IsLPC LPC supply current 10 40 uA VosLPC LPC voltage offset 2 5 30 mV February 15 2007 Document No 38 12018 Rev J 26 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 3 6 DC Analog Output Buffer Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 10 5V DC Analog Output Buffer Specifications Symbol Description Min Typ Max Units Notes Vosos Input Offset Voltage Absolute Value 3 12 mV TCVosos Average Input Offset Voltage Drift 6 uV C VemoB Common Mode Input Voltage Range 0 5 Vdd 1 0 Vv Routos Output Resistanc
297. rd Architecture Processor M8C Processor Speeds to 24 MHz Two 8x8 Multiply 32 Bit Accumulate Low Power at High Speed 3 0 to 5 25V Operating Voltage Industrial Temperature Range 40 C to 85 C USB Temperature Range 10 C to 85 C Advanced Peripherals PSoC Blocks A 6 Rail to Rail Analog PSoC Blocks Provide Up to 14 Bit ADCs Up to 9 Bit DACs Programmable Gain Amplifiers Programmable Filters and Comparators O 4 Digital PSoC Blocks Provide 8 to 32 Bit Timers Counters and PWMs CRC and PRS Modules Full Duplex UART Multiple SPI Masters or Slaves Connectable to all GPIO Pins O Complex Peripherals by Combining Blocks A Capacitive Sensing Application Capability 00000 E Full Speed USB 12 Mbps E Precision Programmable Clocking A Four Uni Directional Endpoints A Internal 4 24 48 MHz Oscillator O One Bi Directional Control Endpoint A Internal Oscillator for Watchdog and Sleep O USB 2 0 Compliant A 25 Accuracy for USB with no External O Dedicated 256 Byte Buffer Components O No External Crystal Required E Additional System Resources E Flexible On Chip Memory a 1 C Slave Master and Multi Master to O 16K Flash Program Storage 50 000 Erase 400 kHz Write Cycles Watchdog and Sleep Timers 1K SRAM Data Storage O User Configurable Low Voltage Detection O In System Serial Programming ISSP A Integrated Supervisory Circuit O Partial Flash Updates O On Chip Precision Voltage Reference a e ee H Complete
298. re implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_Stop Description Stops the Timer16 operation C Prototype void Timerl16 Stop void Assembly call Timerl6 Stop Parameters None Return Value None Side Effects The output will be set low and subsequent writes to the Period register will cause the Count register to update with the new period value The A and X registers may be modified by this or future implementa tions of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_WritePeriod Description Writes the Period register with the period value The period will be loaded into the Count register when the zero count condition is reached or immediately if the Timer16 is currently stopped C Prototype void Timerl6 WritePeriod WORD wPeriod Assembly mov X wPeriod mov A wPeriod 1 call Timerl6 WritePeriod Parameters wPeriod wPeriod is a value between 0 and 216 1 to set the Timer16 period MSB is passed in the X register and LSB is passed in the Accumulator place MS
299. re not High Z at POR See the PSoC Mixed Signal Array Technical Reference Manual for details The center pad on the QFN package should be connected to ground Vss for best mechanical thermal and electrical performance If not connected to ground it should be electrically floated and not connected to any other signal February 15 2007 Document No 38 12018 Rev J 10 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 1 Pin Information 1 3 68 Pin Part Pinout The 68 pin QFN part table and drawing below is for the CY8C24994 PSoC device Table 1 3 68 Pin Part Pinout QFN i Ti pj 7 Pin Type Name ESCAPA CY8C24994 68 Pin PSoC Device No Digital Analog wa wz 1 10 M P4 7 Tg 2 IO M P4 5 a oo z RR z lt tc II lt lt IX 31 l0 M__ P43 S3s gt s 3333 3333333 4 10 M Pa 1 SSSR TSS o CENS CEN 5 NC No connection eee Ree ae SSReeae Haag on oanaoanaaanannan 6 Ne NO connection a 85883883888 5883838 7 Power Vss Ground connection T pa 1 al P2 0 M Al P 2 i P4 6 M 8 O M PS 7 M P4 3 el 3 49 4 4 M 9 O M P3 5 M P4 t 4 48 P4 2 M 10 O M P3 3 NC a 5 47 P4 0 M 11 O M P3 1 NC 6 46 XRES Vss 7 45 m NC 12 O M P5 7 M P3 7 e 8 44 la NC 13 10 M P
300. ries by PSoC device family This allows you the opti mum choice of system resources for your application Family resources are shown in the table titled PSoC Device Character istics The Analog System The Analog System is composed of 6 configurable blocks each comprised of an opamp circuit allowing the creation of complex analog signal flows Analog peripherals are very flexible and can be customized to support specific application requirements Some of the more common PSoC analog functions most avail able as user modules are listed below m Analog to digital converters up to 2 with 6 to 14 bit resolu tion selectable as Incremental Delta Sigma and SAR Filters 2 and 4 pole band pass low pass and notch Amplifiers up to 2 with selectable gain to 48x Instrumentation amplifiers 1 with selectable gain to 93x Comparators up to 2 with 16 selectable thresholds DACs up to 2 with 6 to 9 bit resolution Multiplying DACs up to 2 with 6 to 9 bit resolution High current output drivers two with 30 mA drive as a PSoC Core Resource 1 3V reference as a System Resource DTMF Dialer Modulators Correlators Peak Detectors Many other topologies possible February 15 2007 Document No 38 12018 Rev J 2 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview Analog blocks are arranged in a column of three which includes one CT Continuous Time and two SC Switched Capacitor
301. ro con libre acceso de terceros la nica planificaci n de car cter vinculante que permanece es la relativa al sistema de transporte Los intercambios de energ a con otros pa ses de la UE o con terceros pa ses est n sometidos en todo caso a autorizaci n administrativa del Ministerio de Econom a Las importaciones las pueden llevar a cabo los productores los distribuidores los comercializadores y los consumidores cualificados Las exportaciones pueden realizarse por los productores y comercializadores nacionales Por su parte el Operador del Mercado puede realizar intercambios a corto plazo con el fin de garantizar la calidad y seguridad del suministro En relaci n con la retribuci n econ mica de las actividades el ctricas sta se lleva a cabo con cargo a los ingresos por tarifas y precios establecidos libremente Adem s se retribuyen los costes permanentes del sistema entendiendo por tales los del Operador del Mercado los del Operador del Sistema los derivados de actividades insulares y extrapeninsulares los de la Comisi n del Sistema El ctrico Nacional y los costes de transici n a la 30 Pablo Desviat Cruzado A competencia Tambi n prev la ley que los consumidores se hagan cargo de los costes de diversificaci n y seguridad de abastecimiento que son los siguientes las primas a la producci n en r gimen especial para promover el desarrollo de la generaci n mediante
302. rol register Both CompareType and InterruptType are set in the Device Editor directly through user module parameters described in the earlier section on the topic Input Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 1 1 Clock ISB 0 0 1 1 Clock LSB Capture Clock Enable selects the data input from one of 16 sources Clock selects the input clock from one of 16 sources Both parameters are set in the Device Editor Output Register Bank 1 CY8C26 25xxx Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 OutEnable OutputSel ISB 0 0 0 0 0 0 0 LSB 0 0 0 0 0 0 0 Document Number 001 13625 Rev E Page 38 of 42 CYPRESS 8 Bit Timer Output Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 MSB AuxClk AuxEnable AuxSelect OutEnable OutputSel ISB AuxClk 0 0 0 0 0 0 LSB AuxClk 0 0 0 0 0 0 The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and OutSelect bitfields AuxEnable and AuxSelect permit driving the compare output signal onto one of the row output buses and are controlled by manipulating the row bus graphically in the Device Editor Interconnect View OutEnable is set when the terminal count output is driven onto one of the two or global output buses OutputSelect controls which of the buses will be driven from the compare output Count Register DRO Bank
303. rt life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Semiconductor Note the following details of the Flash code protection features on Cypress Semiconductor PSoC devices Cypress Semiconductor products meet the specifications contained in their particular Cypress Semiconductor Data Sheets Cypress Semiconductor believes that its fam ily of products is one of the most secure families of its kind on the market today regardless of how they are used There may be methods unknown to Cypress Semicon ductor that can breach the code protection features Any of these methods to our knowledge would be dishonest and possibly illegal Neither Cypress Semiconductor nor any other semiconductor manufacturer can guarantee the security of their code Code protection does not mean that we are guaranteeing the product as unbreak able Cypress Semiconductor is willing to work with the customer who is concerned about the integrity of their code Code protection is constantly evolving We at Cypress Semiconductor are committed to continuously improving the code protection features of our products February 15 2007 Document No 38 12018 Rev J 48 ee Sead CYPRESS PERFORM D Kolo Dox Data sis D Copyright 2002 2009 Cypress Semiconductor Corporation All Rights Reserved PSoC Blocks API Memory Bytes Resources Digital Analog CT Analog SC Flash RAM Pins CY8C29
304. rue for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_Disablelnt Description Disables the interrupt mode operation C Prototype void Timer8 Disablelnt void Assembly call Timer8 Disablelnt Parameters None Return Value None Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_ Start Description Starts the Timer8 operation The Count register will be decremented on the next clock cycle C Prototype void Timer8 Start void Assembly call Timer8 Start Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Document Number 001 13625 Rev E Page 9 of
305. rupt In pipe until a new event 7 2 4 occurs or the specified amount of time passes SET_PROTOCOL Switches between the boot protocol and the report protocol or vice 7 2 6 versa USBFS Setup Wizard This section details all the USBFS descriptors provided by the USBFS user module The descriptions include the descriptor format and how user module parameters map into the descriptor data The USBFS Setup Wizard is a tool provided by Cypress to assist engineers in the designing of USB devices The setup wizard displays the device descriptor tree when expanded the following folders that are part of the standard USB descriptor definitions appear e Device attributes e Configuration descriptor e Interface descriptor e HID Class descriptor e Endpoint descriptor e String LANGID e HID Descriptor To access the setup wizard right click the USB User Module icon in the device editor and click the USB Setup Wizard menu item Document Number 001 13629 Rev D Page 17 of 26 0 Cypress USBFS Device When the device descriptor tree is fully expanded you see all the setup wizard options The left side displays the name of the descriptor the center displays the data and the left displays the operation available for a particular descriptor In some instances a descriptor has a pull down menu that presents available options Descriptor Document Number 001 13629 Rev D Data USBFS user module descriptor root Device Name
306. s r r r r Enable an override of the HID class Set Report request USB_CB SRC_h2d cls ifc 09 EQU USB APP SUPPLIED Document Number 001 13629 Rev D Page 21 of 26 Re S37 cypress USBFS Device Insert your custom code above this banner 7 PSoC_UserCode END Do not change this line Then write an assembly language routine named APP_USB_CB_SRC_h2d_cls_ifc_09 Device request names are derived from the USB bmRequestType and bRequest values USB specification Table 9 2 This code is a stub for the assembly routine for the previous example export APP USB CB SRC h2d cls ifc 09 APP USB CB SRC h2d cls ifc 09 Add your code here Long jump to the appropriate return entry point for your application LUMP USBFS InitControlWrite Dispatch and Override Routine Requirements At a minimum the dispatch or override routine must return control back to the Endpoint 0 ISR by a LJMP to one of the Endpoint O ISR Return Points listed in the following table The routine may destroy the A and X registers but the Stack Pointer SP and any other relevant context must be restored prior to returning control to the ISR Endpoint 0 ISR Return Points Return Entry Point Required Data ltems Description USBFS_Not_ Supported Use this return point when the request is not supported lt STALLs the request Data Items None USBFS_InitControlRead This return
307. s Figura 8 5 Diagramas de flujo del dispositivo y del host 112 Pablo Desviat Cruzado Si se mira el c digo fuente del dispositivo se puede entender c mo funciona el sistema void main M8C_EnableGInt USB_Start 0 USB_5V_OPERATION while USB bGetConfiguration USB_INT REG USB INT SOF MASK while 1 if SOF Flag SOF Flag 0 lights report USB INTERFACE 0 OUT_RPT_DATA 0 lights report lights report ights_report ights report La funci n USB_Start inicializa la secuencia de enumeraci n que es manejada por las librer as del m dulo de USB Se espera a que la enumeraci n se completa y en ese momento se crea un buffer para recibir el reporte de los botones desde el PC Una vez hecho esto se espera a que la bandera SOF se ponga a uno esto sucede cada vez que es activada por el SOF_ISR cada milisegundo Una vez la bandera est activada se chequea si se ha recibido un reporte de botones en la trama anterior y si es as se actualizan los LEDS el LCD y se manda la informaci n por X10 En este caso desde el punto de vista del MAIN los datos son movidos desde buffers de endpoints de entrada La comunicaci n por USB es manejada mediante el SIE Serial Interface Engine en el background 113 Pablo Desviat Cruzado a En este proyecto se una un m dulo full speed USB User Module que no consume ninguno de los r
308. s sensores captadores actuadotes etc transmitiran las se ales a una unidad central inteligente que tratar y elaborar la informaci n recibida En funci n de dicha informaci n y de una determinada programaci n la unidad central actuar sobre determinados circuitos de potencia relacionados con las se ales recogidas por los elementos de campo correspondientes Figura 4 1 Arquitectura dom tica 63 Pablo Desviat Cruzado E 2 Caracter sticas de la dom tica Se pueden resaltar las siguientes caracter sticas Control remoto desde dentro de la vivienda a trav s de un esquema de comunicaci n con los distintos equipos mando a distancia bus de comunicaci n etc Reduce la necesidad de moverse dentro de la vivienda este hecho puede ser particularmente importante en el caso de personas de la tercera edad o discapacitadas Control remoto desde fuera de la vivienda presupone un cambio en los horarios en los que se realizan las tareas dom sticas y como consecuencia permite al usuario un mejor aprovechamiento de su tiempo Programabilidad el hecho de que los sistemas de la vivienda se pueden programar ya sea para que realicen ciertas funciones con s lo tocar un bot n o que las lleven a cabo en funci n de otras condiciones del entorno hora temperatura interior o exterior etc produce un aumento del confort y un ahorro de tiempo 64 Pablo Desviat Cruzado 3 Gesti n de
309. s Vdd 3 to 5 25V 10 90 Figure 3 3 GPIO Timing Diagram 90 GPIO Pin Output Voltage 10 y gt TRiseF TFallF TRiseS TFallS 3 4 3 AC Full Speed USB Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 10 C lt Ta lt 85 C or 3 0V to 3 6V and 10 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 19 AC Full Speed 12 Mbps USB Specifications Symbol Description Min Typ Max Units Notes Tres Transition Rise Time 4 20 ns For 50 pF load Tess Transition Fall Time 4 7 20 ns For 50 pF load Tremes Rise Fall Time Matching Tp Tp 90 111 For 50 pF load Tpraters Full Speed Data Rate 12 0 25 12 12 0 25 Mbps February 15 2007 Document No 38 12018 Rev J 32 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 4 AC Operational Amplifier Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Settling times slew rates and gain bandwidth are based on the Anal
310. s auxiliary output cannot be directly connected to the adjacent digital PSoC block however it can be connected to other digital PSoC blocks or to the GPIO pins through the local row output buses When the capture input is asserted high the transition is synchronized to the system clock and the value in the Count register will be transferred to the Compare register In the CY8C26 25xxx family this will cause a compare event on the next Timer input clock cycle if the compare type is set to less than or equal and two clock cycles later if the compare type is less than In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families if the interrupt type is set to capture an interrupt will occur following the capture event The Count value can then be read using the ReadTimer API function An interrupt will occur on a compare true event if the following conditions are met 1 In the CY8C26 25xxx family the interrupt type must be set to trigger on the compare event In the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families the interrupt type must be set to trigger on capture 2 The Timer interrupt must be enabled 3 Global interrupts must be enabled The elapsed time is computed as follows ElapsedTime ClockPeriod x PeriodValue CounterValue Equation 4 An interrupt can be enabled to trigger on either the terminal count or on compare events and in the CY8C29 27 24 22 21xxx and CY8CLED04 08 16 families of PSoC devices
311. s calls to fastcall16 functions FUNCTION Timer8_WriteCompareValue Description Modifies the value of the Timer s Compare register In order to avoid unexpected side effects the Timer should be disabled not yet enabled via the Start API function or by first calling the Stop API function C Prototype void Timer8 WriteCompareValue BYTE bCompareValue Assembly mov A bCompareValue Document Number 001 13625 Rev E Page 10 of 42 am PX a CYPRESS 8 Bit Timer call Timer8 WriteCompareValue Parameters bCompareValue A value between 0 and 255 to set the Timer8 compare value It is passed in the Accumulator Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer8_bReadCompare Value Description Reads the Timer8 Compare register C Prototype BYTE Timer8 bReadCompareValue void Assembly call Timer8 bReadCompareValue mov bCompareValue A Parameters None Return Value The Compare register content is returned in the Accumulator Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM p
312. s decir el objetivo es asegurar al usuario de la vivienda un aumento del confort de la seguridad del ahorro energ tico y de las facilidades de comunicaci n En este trabajo se presenta el proyecto de un estudiante de segundo de Ingenier a Autom tica Industrial en la Escuela Superior de Ingenier a ICAI Se tratar el uso de tecnolog as como los microcontroladores y ordenadores personales para manipular las diversas variables que se encuentran en un hogar centr ndose en el alumbrado El sistema de comunicaci n entre los dispositivos que controlar n todas esas variables ser el protocolo X 10 I El est ndar X10 tiene como caracter sticas el envio y codificaci n de la informaci n mediante trenes de pulsos de 120 KHz a trav s de la red el ctrica cuando esta pasa por cero Se asigna a cada elemento de la casa un c digo de tal manera que el elemento central del sistema pueda comunicarse directamente con el resto de dispositivos y darles ordenes por medio de otros c digos En resumen se tiene definidas las distintas funciones que deber hacer el dispositivo que se dise e Funciones X 10 Detector de cruce por cero Detector de se al de 120kHz Generador de se al de 120kHz A esto hay que a adir que tras un estudio de los diferentes m dulos existentes en el mercado se comprob que la gran mayor a eran solo unidireccionales es decir o rmanda ban informaci n o recib an informaci n pero no ambas cosas
313. s drivers HID Un interfaz puede tener distintos endpoints Un endpoint es una entrada IN endpoints o una salida OUT endpoints de datos y es aqu donde el mundo real se conecta con el USB 109 Pablo Desviat Cruzado A Un dispositivo siempre tiene un endpoint de control EPO y otros endpoint de datos son definidos seg n requiera las necesidades de transferencia de datos de nuestra aplicaci n El CY8C24894 incluye cuatro endpoints de datos los cuales activan los diferentes interfaces Si se vuelve a mirar la figura se puede observar como hay una aplicaci n de PC en la parte superior del diagrama y los endpoints se encuentran justo abajo Hay mucha cantidad de software entre medias pero utilizando el PsoC se obtiene ya escrito depurado y listo para su uso Para mandar algo al mundo real la aplicaci n de PC realiza un WriteF ile data y el software del PC pasa los datos de su stack al bus aqui el CY8C24894 acepta los datos y los pasa al OUT endpoint buffer apropiado Similar es el caso contrario Se copian los datos del mundo real en un IN endpoint y se marca como valido El PC acepta estos datos en el siguiente emisi n programada del endpoint del CY8C24894 y pasa los datos al stack manteniendolos en el buffer a la espera de que la aplicaci n realice un ReadFile data Como resumen de todo lo anterior un dispositivo USB es una colecci n de configuraciones t picamente una la cual es una colec
314. se it it allows them to live in harmful environments and survive Due to the technological advances generated by years of research humans have achieved a high quality life level Humans are not just looking to fulfil basic survival needs they are looking for a comfortable life and control of their surroundings as well Considering these new needs the information technology comes into scene By using it the environment in which a person interacts can be known can be manipulated and can be programmed this environment could be an office or a home itself That is how domotics appears In France where people love to adapt self invented names to new disciplines the word domotique was coined from the contraction of the words domo and informatique This term can be defined as follows a home concept which unites all automatisms related to security issues energy management communications etc The objective is to guarantee the home owner an improvement in comfort security energy savings and communication simplicities This work reports the project of one student of second grade at Superior School of Engineering ICAI It introduces the use of microcontroller and computer technologies to manipulate the diverse variables that can be found in a home however it focuses on illumination control The system used to communicate between devices and control all these variables is the X 10 protocol The X10 standard sends and cod
315. sta ley a la que luego nos referiremos supuso mucho m s que una transformaci n del sistema el ctrico que exist a hasta entonces ya que incorpor nuevas reglas en todas las actividades necesarias para llevar el producto hasta el cliente esto es nuevas reglas para las actividades de producci n transporte distribuci n y comercializaci n de la electricidad Por otra parte adem s de los cambios que est sufriendo en los pa ses de la UE el sistema el ctrico no hay que olvidar las posibles consecuencias sobre este sector debidas a acuerdos a nivel internacional o mundial en otras materias como por ejemplo el medio ambiente La 28 Pablo Desviat Cruzado contenci n de las emisiones de gases de efecto invernadero que figura en el Protocolo de Kioto y las diversas directivas medioambientales de la UE grandes instalaciones de combusti n techos nacionales de emisi n pueden introducir a medio plazo importantes cambios en la estructura de la generaci n el ctrica Tampoco se deben olvidar los cambios que puede introducir el desarrollo tecnol gico en la estructura de la generaci n La reciente aparici n de las tecnolog as de generaci n mediante ciclos combinados de gas que utilizan como combustible un recurso abundante y limpio con un elevado rendimiento y con bajos costes de inversi n o la introducci n a nivel comercial de determinadas tecnolog as de aprovechamiento de energ as renovables son avances
316. t Register DRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Count MSB LSB Count LSB Count is the PWM16 MSB and LSB down PWM Both can be read using the PWM16 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Period MSB LSB Period LSB Period holds the MSB and LSB of the period value that is loaded into the Counter register upon enable or terminal count condition Both can be set in the Device Editor and the PWM16 API Pulse Width Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Pulse Width MSB LSB Pulse Width LSB PulseWidth holds the MSB and LSB of the pulse width value used to generate the compare event Both are set in the Device Editor and the PWM16 API Control Register CRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 0 0 01 LSB 0 0 0 0 0 0 0 Start Stop Start Stop indicates that the PWM16 is enabled when set It is modified by using the PWM16 API 1 Start Stop is controlled by the LSB Control register in chained PSoC blocks and is set to zero Document Number 001 13581 Rev F Revised June 16 2009 Page 19 of 19 Cypress Semiconductor Corporation 2000 2009 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used f
317. tal PSoC blocks In placement order from left to right they are named Timer24_LSB Timer24_ISB and Timer24_MSB Each block is personalized and parameterized through 7 registers The following tables give the personality values as constants and the parameters as named bit fields with brief descriptions Symbolic names for these registers are defined in the user module instance s C and assembly language interface files the h and inc files Document Number 001 13625 Rev E Page 37 of 42 CYPRESS 8 Bit Timer Function Register Bank 1 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 1 Compare 0 0 0 0 ISB Type 0 0 1 Compare 0 0 0 0 LSB Type Function Register Bank 1 CY8C29 27 24 22 21xxx and CY8CLED04 08 16 Block Bit 7 6 5 4 3 2 1 0 0 1 Compare Interrupt 0 0 MSB Type Type 0 0 0 Compare 0 0 0 0 ISB Type Data Invert BCEN 0 Compare 0 0 0 0 LSB Type BCEN gates the terminal count output onto the row broadcast bus line This bitfield is set in the Device Editor by directly configuring the broadcast line The Data Invert flag set through a user module parameter displayed in the Device Editor controls the sense of the capture input signal The CompareType flag indicates whether the compare function is set to Less Than or Equal To or Less Than The InterruptType flag determines whether to trigger the interrupt on the compare event or on the terminal count also see Capturelnt in the Cont
318. tan gran comodidad y flexibilidad y admiten un gran n mero de aplicaciones Al tratarse de un medio de transmisi n ptico es inmune a las radiaciones electromagn ticas producidas por los equipos dom sticos o por los dem s medios de transmisi n coaxial cables pares red de distribuci n de energ a el ctrica etc Sin embargo hay que tomar precauciones en el caso de las interferencias electromagn ticas que pueden afectar a los extremos del medio 2 Radiofrecuencias La introducci n de las radiofrecuencias como soporte de transmisi n en la vivienda ha venido precedida por la proliferaci n de los tel fonos inal mbricos y controles remotos Este medio de transmisi n puede parecer en principio id neo para el control a distancia de los sistemas dom ticos dada la gran flexibilidad que supone su uso Sin embargo resulta particularmente sensible a las perturbaciones electromagn ticas producidas tanto por los medios de transmisi n como por los equipos dom sticos 72 Pablo Desviat Cruzado Las ventajas e inconvenientes de los sistemas basados en transmisi n por radiofrecuencias son Alta sensibilidad a las interferencias F cil interceptaci n de las comunicaciones Dificultad para la integraci n de las funciones de control y comunicaci n en su modalidad de transmisi n anal gica 73 Pablo Desviat Cruzado E 5 Protocolo de comunicaciones Una vez establecido el
319. tarts level routine captures the valu Parameters none Returns none include m8c inc part specific constants and macros include memory inc include PSoCAPI inc PSoC API export main area bss RAM REL dwElapsedTime dwElapsedTime BLK 4 area text ROM REL CON _ Main CapturePulse RAM X POINTS TO STACKPAGE RAM SETPAGE CUR gt dwElapsedTime mov X SP add SP 4 mov dwElapsedTime 0 mov dwElapsedTime 1 0 mov dwElapsedTime 2 0 mov dwElapsedTime 3 O mov XI FFh A mov X 1 FFh mov X 2 FFh mov X 3 FFh lcall Timer32 WritePeriod mov X FFh mov X 1 OBh mov X 2 DCh gt OxFFOBDCOO mov X 3 00h lcall Timer32 WriteCompareValue lcall Timer32 EnableInt enable th M8C EnableGInt j RAM X POINTS TO INDEXPAGE RAM SETPAGE IDX gt dwElapsedTime mov X dwElapsedTime point X to dw Document Number 001 13625 Rev E ElapsedTime Page 32 of 42 ex Y Cypress PERFORM lcall 8 Bit Timer WaitForC mov or or Or JZ add TimerDon Eval Timer32_Start start the timer timer will start to apture A X 0 A X 1 A X 2 A X 3 WaitForCapture SP 4 e uate captured value here T d wElapsedTime is not gt 1 then compute elapsed time else time ret terminat jmp if wElapsedTime is 1 or 0 then event did not occur within limit urn to caller when complete e terminate The interrupt level routine locat
320. te a los pasos por cero de la red el ctrica La conexi n por USB al PC se realiz satisfactoriamente cumpliendo todas las expectativas Se dise un programa en Visual Basic que gestionara las luces a controlar y la conexi n USB Figura 9 1 Programa dise ado de monitorizaci n de luces 117 Pablo Desviat Cruzado KIA Una vez hecho esto se pas a comprobar que el programa interactuara de forma correcta con la tarjeta y el microcontrolador resultando en un perfecta sinton a Conectado JPS f JSS SDI 1200 e o ma Fan Re GND Figura 9 2 Comprobaci n conexi n USB 118 Pablo Desviat Cruzado Por ltimo se pas a programar los c digos de casa y los c digos de llave en el microcontrolador de tal manera que cuando se pulsarael bot n de una habitaci n en el PC la tarjeta mandara el c digo de unidad y funci n correspondiente al bot n pulsado Puesto que la programaci n era la misma para las cuatro habitaciones s lo se prob en una de ellas la n mero uno Habitaciones E E E 1 2 3 4 Figura 9 3 Encendido de la habitaci n 1 119 Pablo Desviat Cruzado 2 Una vez pulsado el bot n de la habitaci n uno se conect la salida del puerto que da la se al de 120 KHz puerto 0_0 a un osciloscopio para comprobar si se mandaban los datos o no Acq Complete M Pos 488 0ms CH1 Acoplamiento Limitar Ancho Banda EN 60MHz
321. tead of pushing the argument on the stack when it sees the pragma fastcall declarations in the Timer24 h file The following is assembly language source that illustrates the use of the APIs E E Ae Ae A A E A A A A A A A A A A E a a i Description A This sample shows how to capture an event with a bounded time limit Document Number 001 13625 Rev E Page 29 of 42 Y Cypress PERFORM 8 Bit Timer The count resolution is 1 us with a bounded time limit of 16 seconds The interrupt should be set to interrupt on the Compare Less than equal The capture input should be connected to the event that is being measured The clock should be connected to 24V2 VC2 The 24V1 VC1 divider should be set to 8 and the 24V2 VC2 divider set to 3 Computed level rou Parameters Returns A A A A A A A A E A include m8c inc time lapse is 16 777 216 dwCount 1 MHz The foreground routine sets and starts the timer The interrupt tine captures the valu none none Ae a A A A part specific constants and macros include memory inc Constants amp macros for SMM LMM and Compiler include PSoCAPI inc 7 PSoC API definitions for all User Modules export main area bss RAM REL dwElapsedTime d
322. ted across multiple PSoC blocks and written one byte at a time The order in which the bytes are written is not specified and subject to change This could cause an interrupt if both the interrupt type is set to trigger on the compare event and the Timer interrupt is enabled The A and X registers may be modified by this or future implemen tations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer16_wReadCompare Value Description Reads the Timer16 Compare registers C Prototype WORD Timerl6 wReadCompareValue void Assembly call Timerl6 wReadCompareValue mov wCompareValue X MSB returned in X mov wCompareValue 1 A LSB returned in A Parameters None Document Number 001 13625 Rev E Page 15 of 42 cr PRESS 8 Bit Timer Return Value wCompareValue Compare register contents MSB is passed in the X register and LSB is passed in the Accumulator Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer1
323. tem also provides tutorials and links to FAQs and an Online Support Forum to aid the designer in getting started Hardware Tools In Circuit Emulator A low cost high functionality ICE In Circuit Emulator is avail able for development support This hardware has the capability to program single devices The emulator consists of a base unit that connects to the PC by way of a USB port The base unit is universal and will operate with all PSoC devices Emulation pods for each device family are available separately The emulation pod takes the place of the PSoC device in the target board and performs full speed 24 MHz operation February 15 2007 Document No 38 12018 Rev J 6 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet PSoC Overview Designing with User Modules The development process for the PSoC device differs from that of a traditional fixed function microprocessor The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs These configurable resources called PSoC Blocks have the ability to implement a wide variety of user selectable functions Each block has several registers that determine its function and connectivity to other blocks multiplexers buses and to the lO pins Iterative development cycles permit you to adapt the hard ware as well as t
324. the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_Write Compare Value Description Modifies the value of the Timer s Compare register In order to avoid unexpected side effects the Timer should be disabled not yet enabled via the Start API function or by first calling the Stop API function C Prototype void Timer32 WriteCompareValue DWORD dwCompareValue Assembly mov X dwCompareValue move address of compare value into X call Timer32 WriteCompareValue Parameters dwCompareValue The value is from 0 to the period value Return Value None Side Effects Ifthis function is called while the Timer is running and the compare value is equal to or greater than the current value of the Count register then a compare event can occur The value of the compare register may vary somewhat unpredictably as the Compare register is distributed across multiple PSoC blocks and written one byte at a time The order in which the bytes are written is not specified and subject to change This could cause an interrupt if both the interrupt type is set to trigger on the compare event and the Timer interrupt is enabled The A and X registers may be modified by this or future implemen tations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED
325. the assembly code to be merged seamlessly with C code The link libraries auto matically use absolute addressing or can be compiled in relative mode and linked with other software modules to get absolute addressing C Language Compiler A C language compiler is available that supports the PSoC family of devices Even if you have never worked in the C language before the product quickly allows you to create complete C programs for the PSoC family devices The embedded optimizing C compiler provides all the features of C tailored to the PSoC architecture It comes complete with embedded libraries providing port and bus operations standard keypad and display support and extended math functionality Debugger The PSoC Designer Debugger subsystem provides hardware in circuit emulation allowing the designer to test the program in a physical system while providing an internal view of the PSoC device Debugger commands allow the designer to read and program and read and write data memory read and write IO registers read and write CPU registers set and clear break points and provide program run halt and step control The debugger also allows the designer to create a trace buffer of registers and memory locations of interest Online Help System The online help system displays online context sensitive help for the user Designed for procedural and quick reference each functional subsystem has its own context sensitive help This sys
326. the timer BYTE USBFS_bGetProtocol BYTE binterface Returns the protocol for the specified interface USBFS Start Description Performs all required initialization for USBFS User Module C Prototype void USBFS Start BYTE bDevice BYT Assembly mov A 0 Sel mov X USB_5V_ OPERATION Sel call USBFS Start Cal Parameters E bMode lect the device lect the Voltage level ll the Start Function Register A contains the device number from the desired device descriptor set entered with the USBFS Setup Wizard Register X contains the operating voltage at which the chip runs This determines whether the voltage regulator is enabled for 5V operation or if pass through mode is used for 3 3V operation Symbolic Document Number 001 13629 Rev D Page 4 of 26 Re Y Cypress USBFS Device names are provided in C and assembly and their associated values are given in the following table Mask Value Description USB_3V_OPERATION 0x02 Disable voltage regulator and pass thru vcc for pull up USB_5V_OPERATION 0x03 Enable voltage regulator and use regulator for pull up Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is responsibility of the calling function to preserve the values across calls to fastcall16 funct
327. this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_Disablelnt Description Disables the interrupt mode operation C Prototype void Timer32 Disablelnt void Assembly call Timer32 Disablelnt Parameters None Return Value None Document Number 001 13625 Rev E Page 22 of 42 cr PRESS 8 Bit Timer Side Effects This routine modifies the appropriate interrupt enable register in IO space The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions FUNCTION Timer32_Start Description Starts the Timer32 operation The Count register will be decremented on the next clock cycle C Prototype void Timer32 Start void Assembly call Timer32 Start Parameters None Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is
328. tical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges PSoC Designer Programmable System on Chip and PSoC Express are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation or representation
329. tiene la impedancia de los condensadores y la resistencia total 1 1 Xc _____________ __ 723 430 2afC 2 2 50Hz 2 2uF 2 2uF La corriente de entrada es V 152V Jen E 197 2mA X R 723432 472 De esta forma se puede alimentar una carga de casi 200mA aproximadamente lo cual es apropiado para los circuitos elaborados en este proyecto La fuente tambi n cuenta con un termistor conectado a 94 Pablo Desviat Cruzado E asa Neutro el cual funciona como fusible ante cortos El termistor es una resistencia que varia su valor dependiendo de la corriente que pase a trav s de ella Si se produce un corto circuito la resistencia limitara la corriente para evitar accidentes 95 Pablo Desviat Cruzado 4 M dulos PsoC A continuaci n se mostrar n los diferentes m dulos que se han utilizado en el PsoC para la creaci n del proyecto as como un esquema general de las conexiones de estos y la configuraci n de los pines Esquema general En la siguiente foto se puede ver los bloques utilizados y su conexi n Se Examplel PSoC Designer 5 0 foe es File Edit View Project Interconnect Build Debug Program Tools Window Help odd SES HO sree gt EE MNAA Global Resources examplel y A X Start Page example1 Chip main c Workspace Explorer EX O Power Setting Y 5 0 24MHz a Moren i 7 7 o7 ae al Workspace Example1 1 project CPU_Clock SysCik 1 J lite rans ay Exampl
330. tinua y no era posible su transporte a larga distancia En consecuencia el emplazamiento de las centrales construidas en el siglo XIX estuvo fuertemente condicionado por la proximidad de un centro de consumo Este hecho que no ten a excesiva importancia en el caso de los grupos t rmicos resultaba trascendente para el aprovechamiento de los recursos hidr ulicos ya que s lo pod an ser aprovechados aquellos recursos que se encontraban pr ximos a centros de consumo aunque tambi n se dio la circunstancia de que el emplazamiento de los recursos hidr ulicos determin en algunas ocasiones la localizaci n de algunas industrias 16 Pablo Desviat Cruzado lt De Las tres primeras d cadas del siglo XX En 1901 se public la primera estad stica oficial seg n la cual exist an en Espa a 859 centrales el ctricas que sumaban 127 940 HP el 61 de esta potencia mera de origen t rmico mientras que el 39 restante utilizaba la energ a hidr ulica como fuerza motriz Con la aparici n de la corriente alterna a principios del siglo XX cambi el panorama Se abri gracias a ella la posibilidad de transportar electricidad a gran distancia y por tanto de llevar a cabo un desarrollo a gran escala de las centrales hidroel ctricas Figura 2 1 Presa de Aldead vila La construcci n de las obras hidroel ctricas de un cierto tama o en las primeras d cadas del siglo XX exig a una utilizaci n de recursos econ m
331. tion Parameters and Resources LCDPort Selects which PSoC I O port is used to interface to the LCD display module Bargraph Selects whether the bargraph functions are enabled If disabled the bargraph code is not generated saving ROM space Document Number 001 13569 Rev E Page 2 of 13 E a ey cy PRESS LCD Tool Box Placement The LCD User Module only uses seven I O pins of one port and does not use any digital or analog blocks There are no placement restrictions Multiple LCD modules may be placed in a single project Application Programming Interface The Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level This section specifies the interface to each function together with related constants provided by the include files Note In this as in all user module APIs the values of the A and X register may be altered by calling an API function It is the responsibility of the calling function to preserve the values of A and X before the call if those values are required after the call This registers are volatile policy was selected for efficiency reasons and has been in force since version 1 0 of PSoC Designer The C compiler automatically takes care of this requirement Assembly language programmers must ensure their code observes the policy too Though some user module API function may leave A and X unchanged there is
332. tion The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Currently only the IDX_PP page pointer register is modified Sample Code 8 Bit Timer Sample Firmware Source Code In the following examples the correspondence between the C and assembly code is simple and direct The values shown for period and compare value are each off by 1 from the cardinal values because the registers are zero based e zero is the terminal count in their down count cycle Passing a simple one byte parameter in the A register rather than on the stack is a performance optimization used by both the assembler and C compiler for user module APIs The C compiler employs this mechanism for INT types instead of pushing the argument on the stack when it sees the pragma fastcall declarations in the Timerg8 h file The following is assembly language source that illustrates the use of the APIs Description This sample shows how to create an interrupt every 1 ms The interrupt should be set to interrupt on the terminal count event The capture input should be connected to LOW The clock should be connected to 24V2 VC2 with the 24V1 VC1 clock divisor set to 16 and the 24V2 VC2 divisor set to 15 So PERIOD Count 1 ms 1 24 MHz 16 15
333. tion temporarily disables the clock saves the PulseWidth register contents reads the Count register reads the PulseWidth register restores the PulseWidth register and then restores the clock See the description for the ReadCounter function in the Application Programming Interface section for possible side effects Timing PWM operation may be gated On and Off or clocked by external pins routed to the PWM by the global bus feature of the device Clock S S VJ VAD I OI OI ODO DOU IOV i e Period Reg A A PulseWidth Reg A Start Bit Enable Signal Counter Load of Period Counter Reg BKM XM 1XM 2 N 1 NA A M 2 N 4X_NXN 1 10 XMM Output Terminal Count Terminal Count o WO AANS A Y E Y A A PWM Timing Diagram Period M 1 Compare Duty Cycle N 1 M 1 True Tess False DC and AC Electrical Characteristics PWM DC and AC Electrical Characteristics Parameter Typical Limit Units Conditions and Notes FOutputmax 241 MHz 5 0V and 48 MHz input clock 122 MHz 3 3V and 24 MHz input clock Electrical Characteristics Notes 1 If the output is routed through the global buses then the frequency is constrained to a maximum of 12 MHz 2 Fastest clock available to PSoC blocks is 24 MHz at 3 3V operation Placement The PWM consumes one digital PSoC block per 8 bits of resolution When more than one block is allocated all are placed consecutively by the Device Editor in order of increasing block
334. tions USBFS_bGetProtocol Description Returns the hid protocol value for the selected interface C Prototype BYTE USBFS bGetProtocol BYTE bInterface Assembly MOV A 1 Select interface 1 call USBFS bGetProtocol Parameters bInterface contains the interface number Return Value Register A contains the protocol value Side Effects The A and X registers may be modified by this or future implementations of this function This is true for all RAM page pointer registers in the Large Memory Model When necessary it is the responsibility of the calling function to preserve the values across calls to fastcall16 functions USBFS_SetPowerStatus Description Sets the current power status Set the power status to one for self powered or zero for bus powered The device will reply to USB GET_STATUS requests based on this value This allows the device to Document Number 001 13629 Rev D Page 11 of 26 S37 cypress USBFS Device PERFOR properly report its status for USB Chapter 9 compliance Devices may change their power source from self powered to bus powered at any time and report their current power source as part of the device status You should call this function any time your device changes from self powered to bus powered or vice versa and set the status appropriately C Prototype void USBFS SetPowerStatus BYTE bPowerStaus Assembly MOV A 1 Select self powered call US
335. tive Low AA Active High LED Block Diagram Cypress Semiconductor Corporation 198 Champion Court San Jose CA 95134 1709 408 943 2600 Document Number 001 13570 Rev A Revised October 7 2008 S YPRESS E Functional Description The LED User Module is just a convenient way to turn a pin on and off without having to think about shadow registers Parameters and Resources Port Select the port where the LED will be connected Pin Select pin where the LED will be connected Drive The LED User Module may be configured to drive either an Active High or Active Low configuration In an Active High configuration the LED s anode is connected to the PSoC pin through a resistor and the LED s cathode is connected to Vss In an Active Low configuration the LED s cathode is connected to the PSoC pin through a resistor and the LED s anode is connected to Vcc Placement The LED can be place at any IO pin Application Programming Interface LED _ Start LED Stop Description Both these functions do the same thing turn off the LED C Prototype void LED Start void Assembler call LED_Start Return Value None Side Effects None LED Switch Description Turns LED on or off C Prototype void LED_Switch BYTE bOnOff Assembler Mov a 0x01 Turn on LED Document Number 001 13570 Rev A Page 2 of 6 call LED_Switch Parameters bOnOff 0 Off Non Zero On
336. to de una mayor robustez en incluso se podr an llevar a cabo sistemas de control como por ejemplo el control de un sistema de calefacci n Tambi n y puesto que se con sigui mandar datos de la tarjeta al PC se podr a hacer un sistema en el que se pidiera el estado de las luces de una habitaci n y los receptores de dicha habitaci n mandasen su estatus al m dulo principal conectado al PC as se podr a monitorizar el estado de toda la casa sin tener que moverse del ordenador Otra posibilidad es el hecho de que el emisor se mantenga enviando las ordenes que sean necesarias para realizar la operaci n dictaminada por el operador hasta que el receptor le responda d ndole la confirmaci n Sin embargo el principal futuro desarrollo ser a incorporar los condensadores al circuito de inyecci n de X10 y la mejora del circuito de detecci n de ceros puesto que es un elemento clave en un buen dispositivo de X10 125 Pablo Desviat Cruzado E Do BIBLIOGRAF A 1 2 3 4 5 6 8 10 Editorial Time Life El Primer Hombre Origenes del Hombre Netherlands Time Life International 1976 La historia de X10 por uno de sus pioneros http www domotica net La_historia_de_X10_por_uno_de_sus_pioner os htm Jos Manuel Huidobro Edificios Inteligentes y Dom tica http www monografias com trabajos14 domotica domotica html Jon Burroughs X 10 Home Automation Using the
337. to it by the software This user module is the one placed in the Interconnect View The Add Device operation on the right hand column adds another USB device complete with all the different fields required for describing it The new USB device descriptor is listed at the bottom after the Endpoint Descriptor Click OK to save If you do not save the newly added device it is not available for use Device Descriptor has DEVICE_NUMBER as the Data it may be removed or a configuration added All the information about a particular USB device may be entered by over writing the existing data or by using a pull down menu When the input of data is complete either by using the pull down menus or by typing alphanumeric text in the appropriate spots click OK to save USB Suspend Resume and Remote Wakeup The USB Suspend Resume and Remote Wakeup features are tightly coupled into the user application You should write firmware to lower power consumption appropriately for your device USFS Activity Monitoring The USBFS_bCheckActivity API function provides a means to check if any USB bus activity occurred The application uses the function to determine if the conditions to enter USB Suspend were met Document Number 001 13629 Rev D Page 19 of 26 Re BE es Y Cypress USBFS Device USBFS Suspend Once the conditions to enter USB suspend are met the application takes appropriate steps to reduce current consumption to meet the suspend current requirem
338. tor and therefore only one Input Output and Feature report structure exists If you want better control over the report storage size or want to support multiple report IDs you will need to do the following 1 Use the wizard to specify your device description endpoints and HID reports then generate the appli cation Disable the wizard defined report storage area in USB_descr asm Copy the wizard created code that defines the report storage area Paste it into the protected user code area in USB_descr asm or a separate assembly language file Customize the code to define the report storage area ae 2 Document Number 001 13629 Rev D Page 23 of 26 a 3 Cypress USBFS Device Specify Your Device and Generate Application Use the USB setup wizard to specify your device description endpoints and HID reports Click the Generate Application button in PSoC Designer Disable the Wizard Defined Report Storage Area In the USB_descr asm file disable the wizard defined storage area by uncommenting the WIZARD_DEFINED_REPORT_STORAGE line in the custom code area as shown WIZARD equ 1 WIZARD DEFINED REPORT STORAGE GI equ 1 PSoC_UserCode BODY 1 Do not change this line Insert your custom code below this banner Redefine the WIZARD equate to 0 below by uncommenting the WIZARD equ 0 line to allow your custom descriptor to take effect WIZARD equ 0 WIZARD DEFINED
339. tor block input 19 lO M P3 1 69 IO I M P2 2 Direct switched capacitor block input 20 lO M P5 7 70 lO P2 4 External Analog Ground AGND input 21 1O M P5 5 71 NC No connection 22 IO M P5 3 72 IO P2 6 External Voltage Reference VREF input 23 lO M P5 1 73 NC No connection 24 IO M P1 7 12C Serial Clock SCL 74 IO PO 0 Analog column mux input 25 NC No connection 75 NC No connection 26 NC No connection 76 NC No connection 27 NC No connection 77 IO I M _ PO 2 Analog column mux input and column output 28 IO P1 5 12C Serial Data SDA 78 NC No connection 29 IO P1 3 79 lO I M PO 4 Analog column mux input and column output 30 IO P1 1 Crystal XTALin 12C Serial Clock SCL 80 NC No connection ISSP SCLK 31 NC No connection 81 lO I M PO 6 Analog column mux input 32 Power Vss Ground connection 82 Power Vdd Supply voltage 33 USB D 83 NC No connection 34 USB D 84 Power Vss Ground connection 35 Power Vdd Supply voltage 85 NC No connection 36 lO P7 7 86 NC No connection 37 lO P7 6 87 NC No connection 38 lO P7 5 88 NC No connection 39 lO P7 4 89 NC No connection 40 lO P7 3 90 NC No connection 41 lO P7 2 91 NC No connection 42 lO P7 1 92 NC No connection 43 IO P7 0 93 NC No connection 44 NC No connection 94 NC No connection 45 NC No connection 95 IO I M PO 7 Analog column mux input
340. tput buses OutputSelect controls which of the buses will be driven from the compare output Count Register DRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Count MSB ISB2 Count ISB1 ISB1 Count ISB2 LSB Count LSB Document Number 001 13625 Rev E Page 41 of 42 BP Cypress 8 Bit Timer PERFORM The Count register is the 32 bit down count value decremented by 1 in every clock cycle that the enable input is active Its value is loaded from the contents of the Period register in the clock cycle following the terminal count zero value It can be read using the Timer32 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Period MSB ISB2 Period ISB1 ISB1 Period ISB2 LSB Period LSB The Period register is a write only register that can be set through the Device Editor and by the Timer32 API When written the value is transferred to the Count register if the user module is disabled through the API Its value is automatically copied into the Count register in the clock cycle following terminal count Compare Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB Compare Val MSB ISB2 Compare Val ISB1 ISB1 Compare Val ISB2 LSB Compare Val LSB The Compare register holds the value against which the Count register is tested in order to generate the compare output It can be set by the Device Editor and the Timer32 API Control Register CRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 MSB 0 0 0 0 0 0 0 0 ISB2 0 0 0
341. trar una luz sobre la habitaci n indic ndole que las luces est n encendidas A su vez en la tarjeta se actualizar el estado de la habitaci n en el LCD y se encender un LED correspondiente al n mero de la habitaci n Habitaci n 1 gt ATA ns and Lights Habitaciones ITEE E 1 2 3 Figura 0 5 Habitaci n 1 133 100 anos de Ingenieria ICAI Pablo Desviat Cruzado 1908 2008 Habitaci n 2 Conectado Figura 0 6 Habitaci n 2 134 100 anos de Ingenieria Pablo Desviat Cruzado 1908 2008 Habitaci n 3 Habitaciones E E E 1 2 4 Figura 0 7 Habitaci n 3 135 100 a os de Ingenier a ICAI Pablo Desviat Cruzado 1908 2008 Habitaci n 4 Conectado Habitaciones E E E 1 2 3 4 Figura 0 8 Habitaci n 4 136 Pablo Desviat Cruzado KIA Si se desea se pueden encender varias habitaciones a la vez simplemente pulsando los diferentes botones correspondientes a las habitaciones Habitaciones 1 2 4 y JPS_ 1 1 SDI 12C lups SCL Wer pra le SND Sl Figura 0 9 Varias habitaciones 137 Pablo Desviat Cruzado Para apagar las luces de las habitaciones lo nico que debe hacer es pulsar sobre el bot n de la habitaci n que desea apagar y que est encendida Conectado Pes E EE E E 1 2 3 4 Figura 0 10 Habitaciones apagadas 138 Pablo Desvi
342. ts The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx and CY8CLED16 When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the IDX_PP page pointer register is modified FUNCTION Timer24_ReadTimer Description Reads the current Timer24 Count register value This performs a software solicited hardware syn chronous counter capture operation This is the preferred method of reading the Count registers pro viding that the Compare registers are not required to be preserved Note that this API routine used to be called CaptureCounter C Prototype void Timer24 ReadTimer DWORD pdwCount Assembly mov X pdwCount move address of return value into X call Timer24 ReadTimer Parameters None Returns Count value is returned in the specified buffer Side Effects Compare register contents are lost The compare condition becomes true immediately or on the next Timer input clock cycle depending on whether the CompareType parameter is set to Less than or Equal to or Less Than respectively If or when the user module and global interrupts are enabled the interrupt will be serviced quite possibly before this API function has returned control to its caller The A and X registers may be modified by this or future impl
343. ts Notes Timer Capture Pulse Width 502 z ns Maximum Frequency No Capture 49 92 MHz 4 75V lt Vdd lt 5 25V Maximum Frequency With Capture 25 92 MHz Counter Enable Pulse Width 502 ns Maximum Frequency No Enable Input 49 92 MHz 4 75V lt Vdd lt 5 25V Maximum Frequency Enable Input 25 92 MHz Dead Band Kill Pulse Width Asynchronous Restart Mode 20 ns Synchronous Restart Mode 502 ns Disable Mode 502 ns Maximum Frequency 49 92 MHz 4 75V lt Vdd lt 5 25V CRCPRS Maximum Input Clock Frequency 49 92 MHz 4 75V lt Vdd lt 5 25V PRS Mode CRCPRS Maximum Input Clock Frequency 24 6 MHz CRC Mode SPIM Maximum Input Clock Frequency 8 2 MHz Maximum data rate at 4 1 MHz due to 2 x over clocking SPIS Maximum Input Clock Frequency 4 1 MHz Width of SS_ Negated Between Transmissions 502 e ns Transmitter Maximum Input Clock Frequency 24 6 MHz Maximum data rate at 3 08 MHz due to 8 x over clocking Receiver Maximum Input Clock Frequency 24 6 MHz Maximum data rate at 3 08 MHz due to 8 x over clocking a 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz 42 ns nominal period 3 4 7 AC External Clock Specifications The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ty lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical param
344. ts the DC and AC electrical specifications of the CY8C24x94 PSoC device family For the most up to date elec trical specifications confirm that you have the most recent data sheet by going to the web at http www cypress com psoc Specifications are valid for 40 C lt Ta lt 85 C and Tj lt 100 C except where noted Specifications for devices running at greater than 12 MHz are valid for 40 C lt Ta lt 70 C and Ty lt 82 C Figure 3 1 Voltage versus CPU Frequency A 5 25 475 4 Y Vdd Voltage w 8 t t gt 93 kHz 12 MHz 24 MHz CPUFrequency The following table lists the units of measure that are used in this chapter Table 3 1 Units of Measure Symbol Unit of Measure Symbol Unit of Measure og degree Celsius uW microwatts dB decibels mA milli ampere fF femto farad ms milli second Hz hertz mV milli volts KB 1024 bytes nA nanoampere Kbit 1024 bits ns nanosecond kHz kilohertz nV nanovolts kQ kilohm Q ohm MHz megahertz pA picoampere MQ megaohm pF picofarad uA microampere pp peak to peak uF microfarad ppm parts per million uH microhenry ps picosecond us microsecond sps samples per second uV microvolts o sigma one standard deviation uVrms microvolts root mean square V volts February 15 2007 Document No 38 12018 Rev J 22 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specif
345. tting for the specified inter face Device Interface Endpoint Sets the device address for all future device accesses Sets the device configuration This optional request is not supported Document Number 001 13629 Rev D USBFS Device USB 2 0 Spec Section 9 4 1 9 4 2 9 4 3 9 4 4 9 4 5 9 4 6 9 4 7 9 4 8 Page 16 of 26 Faas CYPRESS Standard Device Request SET_FEATURE SET_INTERFACE SYNCH_FRAME HID Class Request USBFS Device USB 2 0 Spec USB User Module Support Description Section Device 9 4 9 DEVICE_REMOTE_WAKEUP support is selected by the bRemoteWakeUp User Module Parameter TEST_MODE is not supported Interface Not supported Endpoint The specified Endpoint is halted Not supported 9 4 10 Not supported Future implementations of the User Module will add 9 4 11 support to this request to enable Isochronous transfers with repeat ing frame patterns Device Class Definition for Class Request USBFS User Module Support Description HID Section GET_REPORT Allows the host to receive a report by way of the Control pipe 7 2 1 GET_IDLE Reads the current idle rate for a particular Input report 7 2 3 GET_PROTOCOL Reads which protocol is currently active either the boot or the report 7 2 5 protocol SET_REPORT Allows the host to send a report to the device possibly setting the 7 2 2 state of input output or feature controls SET_IDLE Silences a particular report on the Inter
346. tuida por un material diel ctrico transparente conductor de luz compuesto por un n cleo con un ndice de refracci n menor que el del revestimiento que envuelve a dicho n cleo Estos dos elementos forman una gu a para que la luz se desplace por la fibra La luz transportada es generalmente infrarroja y por lo tanto no es visible por el ojo humano A continuaci n se detallan sus ventajas e inconvenientes 1 Fiabilidad en la transferencia de datos 2 Inmunidad frente a interferencias electromagn ticas y de radiofrecuencias 3 Alta seguridad en la transmisi n de datos 4 Distancia entre los puntos de la instalaci n limitada en el entorno dom stico estos problemas no existen 5 Elevado costo de los cables y las conexiones 6 Transferencia de gran cantidad de datos 71 Pablo Desviat Cruzado Conexi n sin hilos 1 Infrarrojos El uso de mandos a distancia basados en transmisi n por infrarrojos esta ampliamente extendido en el mercado residencial para controlar equipos de audio y v deo La comunicaci n se realiza entre un diodo emisor que emite una luz en la banda de infrarrojos sobre la que se superpone una se al convenientemente modulada con la informaci n de control y un fotodiodo receptor cuya misi n consiste en extraer de la se al recibida la informaci n de control Los controladores de equipos dom sticos basados en la transmisi n de ondas en la banda de los infrarrojos presen
347. uction February 15 2007 Document No 38 12018 Rev J 18 2 Register Reference y i 2 CYPRESS PERFORM This chapter lists the registers of the CY8C24x94 PSoC device family For detailed register information reference the PSoC Mixed Signal Array Technical Reference Manual 2 1 Register Conventions 2 2 Register Mapping Tables er The PSoC device has a total register address space of 512 2 1 1 Abbreviations Used bytes The register space is referred to as IO space and is divided into two banks The XOI bit in the Flag register CPU_F determines which bank the user is currently in When the XOI bit is set the user is in Bank 1 The register conventions specific to this section are listed in the following table Convention Description Note In the following register mapping tables blank fields are Read register or bit s Reserved and should not be accessed Write register or bit s Logical register or bit s Clearable register or bit s lol rig a Access is bit specific February 15 2007 Document No 38 12018 Rev J 19 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 2 Register Reference Register Map Bank O Table User Space z
348. ueden ser usadas para entradas anal gicas Contiene dos salidas programables anal gicas Como este microcontrolado se eligi por la posibilidad de la conexi n USB y teniendo en cuenta la cantidad de notas de aplicaci n que se encuentran en la p gina web de Cypress nos centraremos a partir de ahora en el m dulo USB que contiene El m dulo de usuario USB est implementado como una interfaz serie separada con un buffer dedicado de 256 byte de RAM Este interfaz maneja hasta 4 puntos de datos data endpoints que pueden ser programados individualmente como entrada o salida Estos puntos ser n explicados m s adelante en la parte de conexi n USB Las operaciones del interfaz USB son aut nomas y corren en paralelo con las operaciones est ndar de la CPU 83 Pablo Desviat Cruzado 2 El m dulo USB incluye una librer a llena de rutinas con las que manejar el flujo de datos de entrada y salida en los endpoints De hecho la teor a que se necesita saber sobre USB es m nima para entender el funcionamiento del CY8C24894 ya que la mayor a de las rutinas que trae hacen el trabajo por ti Puesto que la base de software necesitada para el funcionamiento del USB est escrita depurada e incluida se puede olvidar del resto de cosas y centrarse en los requerimientos de transferencia de datos del dispositivo USB que se va a desarrollar A adido a esto se incluye un wizard que guia al usuario a trav s de la
349. upts shared by multiple user modules existing in the same block but in different overlays Selecting Document Number 001 13581 Rev F Page 6 of 19 a pr od BPA Cypress 8 Bit Pulse Width Modulator ActiveStatus causes firmware to test which overlay is active before servicing the shared interrupt request This test occurs every time the shared interrupt is requested This adds latency and also produces a nondeterministic procedure of servicing shared interrupt requests but does not require any RAM Selecting OffsetPreCalc causes firmware to calculate the source of a shared interrupt request only when an overlay is initially loaded This calculation decreases interrupt latency and produces a deterministic procedure for servicing shared interrupt requests but at the expense of a byte of RAM Application Programming Interface The Application Programming Interface API routines are provided as part of the user module to allow the designer to deal with the module at a higher level This sections specifies the interface to each function together with related constants provided by the include files Note In this as in all user module APIs the values of the A and X register may be altered by calling an API function It is the responsibility of the calling function to preserve the values of A and X before the call if those values are required after the call This registers are volatile policy was selected for efficiency reasons
350. urar nada para que entre en funcionamiento Plug an Play Da como resultado confort y diversi n Es una tecnologia que aprovecha la red el ctrica que ya est instalada en la vivienda Modularidad y capacidad de crecimiento con componentes f ciles de instalar y que no requieren cableados especiales Capacidad de interfuncionamiento entre productos Para finalizar con esta presentaci n recalcar que la motivaci n principal del proyectista ha sido la de dise ar y construir un dispositivo que fuera sencillo al uso y que pudiera adaptarse a cualquier hogar actual A su vez y aprovechado que hoy por hoy podemos encontrar un ordenador en pr cticamente cada casa se pens en utilizar esta caracter stica como una ventaja que pudiera hacer aun m s c moda la utilizaci n del sistema por parte del usuario y por tanto se a adi la idea de hacer un control por medio de una conexi n USB a un ordenador personal Tras el estudio de otros dise os del mismo nivel de dificultad se observ la carencia de una bidireccionalidad Esto hizo que surgiera una motivaci n adicional consistente en dotar al proyecto de la capacidad de poder enviar y recibir informaci n para de ese modo poder comprobar los estados de los diferentes dispositivos a controlar dentro de la vivienda Pablo Desviat Cruzado E 2 Objetivos del proyecto Los objetivos se han seleccionado a partir de la metodolog a que se usar para
351. uring Programming or Verify Vdd 1 0 Vdd V FlashenPB Flash Endurance per block 50 000 Erase write cycles per block Flashent Flash Endurance total 1 800 000 ai Erase write cycles Flashpr Flash Data Retention 10 oa Years a A maximum of 36 x 50 000 block endurance cycles is allowed This may be balanced between operations on 36x1 blocks of 50 000 maximum cycles each 36x2 blocks of 25 000 maximum cycles each or 36x4 blocks of 12 500 maximum cycles each to limit the total number of cycles to 36x50 000 and that no single block ever sees more than 50 000 cycles For the full industrial range the user must employ a temperature sensor user module FlashTemp and feed the result to the temperature argument before writing Refer to the Flash APIs Application Note AN2015 at http www cypress com under Application Notes for more information February 15 2007 Document No 38 12018 Rev J 30 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 3 4 1 AC Chip Level Specifications AC Electrical Characteristics The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ty lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 17 AC Chip Level Specifications
352. utSelect The user module ClockSync parameter in the Device Editor determines the value of the AuxClk bits Though similarly named the AuxEnable and AuxSelect bits are related instead to the OutEnable and OutSelect bitfields AuxEnable and AuxSelect permit driving the compare output signal onto one of the Document Number 001 13625 Rev E Page 34 of 42 CYPRESS 8 Bit Timer row output buses and are controlled by manipulating the row bus graphically in the Device Editor Interconnect View OutEnable is set when the terminal count output is driven onto one of the row or global output buses OutputSelect controls which of the buses will be driven from the compare output Count Register DRO Bank 0 Block Bit 7 6 5 4 3 2 1 0 Timer8 Count The Count register is the 8 bit down count value decremented by 1 in every clock cycle lts value is loaded from the contents of the Period register in the clock cycle following the terminal count zero value It can be read using the Timer8 API Period Register DR1 Bank 0 Block Bit 7 6 5 4 3 2 1 0 Timers Period Period holds the period value that is loaded into the Count register upon enable or terminal count condition It can be set in the Device Editor and the Timer8 API Compare Register DR2 Bank 0 Block Bit 7 6 5 4 3 2 1 0 Timer8 Compare Value Compare Value holds the compare value for use in the comparator to generate the compare event It can be set in the Device Editor and the Tim
353. valUSB 40 0 25 Total de equipos y componentes 435 Tabla 3 2 Sumas parciales de los materiales Pablo Desviat Cruzado E De 4 Presupuesto general El presupuesto general del proyecto es el siguiente Total de Recursos Humanos 9475 Total de equipos y componentes Total de presupuesto 9910 16 IVA 1585 6 Total de presupuesto general MOS Tabla 4 1 Precio presupuesto general
354. ved from Internal Main Oscillator with appropriate trim for Vdd range c 3 0V lt Vdd lt 3 6V See Application Note AN2012 Adjusting PSoC Microcontroller Tri d See the individual user module data sheets for information on maximum frequencies for user modules Figure 3 2 24 MHz Period Jitter IMO Timing Diagram Jitter24M1 t Foam ims for Dual Voltage Range Operation for information on trimming for operation at 3 3V February 15 2007 Document No 38 12018 Rev J 31 CY8C24094 CY8C24794 CY8C24894 and CY8C24994 Final Data Sheet 3 Electrical Specifications 3 4 2 AC General Purpose IO Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges 4 75V to 5 25V and 40 C lt Ta lt 85 C or 3 0V to 3 6V and 40 C lt Ta lt 85 C respectively Typical parameters apply to 5V and 3 3V at 25 C and are for design guidance only Table 3 18 AC GPIO Specifications Symbol Description Min Typ Max Units Notes Fepio GPIO Operating Frequency 0 12 MHz Normal Strong Mode TRiseF Rise Time Normal Strong Mode Cload 50 pF 3 18 ns Vdd 4 5 to 5 25V 10 90 TFallF Fall Time Normal Strong Mode Cload 50 pF 2 18 ns Vdd 4 5 to 5 25V 10 90 TRiseS Rise Time Slow Strong Mode Cload 50 pF 10 27 ns Vdd 3 to 5 25V 10 90 TFallS Fall Time Slow Strong Mode Cload 50 pF 10 22 n
355. versiones del sistema gasista en este per odo totalizar n unos 5 300 millones de euros en redes de transporte 1 226 millones de euros 34 Pablo Desviat Cruzado A plantas regasificadoras 2 661 millones de euros almacenamientos 941 millones de euros y estaciones de compresi n 341 millones de euros Pero el grueso de la inversi n se realizar en el mbito de la generaci n el ctrica dado que se prev que durante esta d cada entren en servicio cerca de 15 000 MW en centrales de ciclo combinado de gas natural con una inversi n de unos 6 500 millones de euros En el horizonte 2011 la producci n de estas centrales conjuntamente con las instalaciones de cogeneraci n que consumen gas natural supondr el 34 de la generaci n el ctrica en detrimento sobre todo de la producci n con carb n Adicionalmente aparte de las inversiones en nueva generaci n hay que tener en cuenta las inversiones recurrentes necesarias para mantener en ptimas condiciones el equipo existente en la actualidad y que se estiman en unos 5 800 millones de euros para el per odo citado El otro pilar de la nueva generaci n ser n las energ as renovables El Documento prev la incorporaci n de unos 14 000 MW b sicamente en instalaciones de energ a e lica 9 000 MW adicionales y de biomasa 3 100 MW De esta forma se persigue que al final del per odo de planificaci n las fuentes de energ a renovable supongan un 29 de la producc
356. visable only when interrupt generation is the sole application of the Counter InvertEnable This parameter determines the sense of the enable input signal When Normal is selected the enable input is active high Selecting Invert causes the sense to be interpreted as active low InvertEnable applies only to the CY8C29 27 24 22 21 xxx and CY8CLED04 08 16 families of PSoC devices Interrupt Generation Control The following two parameters InterruptAPI and IntDispatchMode are only accessible by setting the Enable Interrupt Generation Control check box in PSoC Designer This is available under Project gt gt Settings gt gt Device Editor InterruptAPl The InterruptAPl parameter allows conditional generation of a User Module s interrupt handler and interrupt vector table entry Select Enable to generate the interrupt handler and interrupt vector table entry Select Disable to bypass the generation of the interrupt handler and interrupt vector table entry Properly selecting whether an Interrupt API is to be generated is recommended particularly with projects that have multiple overlays where a single block resource is used by the different overlays By selecting only Interrupt API generation when it is necessary the need to generate an interrupt dispatch code might be eliminated thereby reducing overhead IntDispatchMode The IntDispatchMode parameter is used to specify how an interrupt request is handled for interr
357. visor que se haya elegido Se explicar n los divisores puestos m s adelante SysCLK Source se selecciona de donde vendr el reloj del sistema Puede elegirse el oscilador interno o uno externo que e conecta a trav s del puerto 14 SysCLK 2 Disable cuando esta opci n se est en yes permite que el reloj interno SysCIk 2 se apague reduciendo el consumo del microcontrolador Analog Power se elige los niveles de referencia para los bloques anal gicos No se utiliza en este proyecto puesto que no hay bloques anal gicos Ref Mux se toman el rango y la precisi n de varias referencias para los bloques anal gicos AgndBypass cuando est activo se conecta el bus de AGND directamente al puerto 2 4 Op Amp Biass nivel utilizado en los amplificadores operacionales y para los switched capacitor en los bloques anal gicos A_Buff_Power se elige el nivel de los buffer anal gicos de salida Trip Voltage LVD se elige a partir de qu nivel el Low Voltage Detect LVD se disparar LVD ThorttleBack si est activado permite que se resetee el registro de velocidad de la CPU por la salida del comparador del LVD Watchdog Enable activa y desactiva el timer del watchdog 98 Pablo Desviat Cruzado Bloque PWM8 asa Este bloque se utiliza para la generaci n del PWM de 120 Khz La salida del CompareOUT se pasa a un pin mediante el Row_0_output_0 Figura 7 12 M dulo PW M8 Su configuraci n es
358. w cypress com psocex press PSoC Express 5 1 3 Flexible enough to be used on the bench in development yet suitable for factory programming PSoC Programmer works either as a standalone programming application or it can oper ate directly from PSoC Designer or PSoC Express PSoC Pro grammer software is compatible with both PSoC ICE Cube In Circuit Emulator and PSoC MiniProg PSoC programmer is available free ofcharge at http www cypress com psocpro grammer PSoC Programmer 5 1 4 CY3202 C MAGEcraft C Compiler CY3202 is the optional upgrade to PSoC Designer that enables the iMAGEcraft C compiler It can be purchased from the Cypress Online Store At http www cypress com click the Online Store shopping cart icon at the bottom of the web page and click PSoC Programmable System on Chip to view a cur rent list of available items 5 2 All development kits can be purchased from the Cypress Online Store Development Kits 5 2 1 CY3215 DK Basic Development Kit The CY3215 DK is for prototyping and development with PSoC Designer This kit supports in circuit emulation and the software interface allows users to run halt and single step the processor and view the content of specific memory locations Advance emulation features also supported through PSoC Designer The kit includes m PSoC Designer Software CD m ICE Cube In Circuit Emulator m ICE Flex Pod for CY8C29x66 Family m Cat 5 Adapter m Mini Eval Progra
359. wElapsedTime BLK 4 area text ROM REL CON _ Main RAM X POINTS TO STACKPAGE RAM SETPAGE CUR gt dwElapsedTime mov X SP create a stack frame for arguments add SP 4 mov dwElapsedTime 0 O mov dwElapsedTime 1 0 mov dwElapsedTime 2 0 mov dwElapsedTime 3 0 mov X 0 00h set the period to the max count mov X 1 FFh mov X 2 FFh mov X 3 FFh lcall Timer24 WritePeriod mov X 0 00h set the compare value to trigger at 16 sec mov X 1 OBh 16 777 216 16 000 000 777 216 mov X 2 DCh mov X 3 00h cal Timer24 WriteCompareValue cal Timer24 EnableInt enable the timer interrupt mask M8C EnableGInt enable global interrupts RAM X POINTS TO INDEXPAGE RAM SETPAGE IDX gt dwElapsedTime mov xX lt dwElapsedTime point X to dwElapsedTime lcall Timer24 Start start the timer timer will start to WaitForCapture mov A X 1 or A X 2 or A X 3 jz WaitForCapture Document Number 001 13625 Rev E Page 30 of 42 ay CYPRESS PERFOR add SP 4 If dw Evaluate captured value here ElapsedTime is not gt 1 then compute elapsed time 8 Bit Timer if wElapsedTime is 1 or 0 then event did not occur within time terminate mp terminate j The interrupt level routine located in the file timer24int asm is as follows _Timer24 APSOC _ ISR _UserCode BODY Do not change this line NOTE interrupt service r
360. y only the CUR_PP page pointer register is modified LCD_Position Description Moves cursor to a location specified by the parameters The upper left character is row 0 column 0 For a two line by 16 character display the lower right character is row 1 column 15 C Prototype void LCD Position BYTE bRow BYTE bCol Assembly mov A 01h Load Row mov X 02h Load Column call LCD Position Parameters bRow The row number at which to position the cursor Zero specifies the first row bCol The column number at which to position the cursor Zero specifies the first left most column Return Value None Side Effects The A and X registers may be modified by this or future implementations of this function The same is true for all RAM page pointer registers in the Large Memory Model CY8C29xxx When necessary it is the calling function s responsibility to preserve the values across calls to fastcall16 functions Cur rently only the CUR_PP page pointer register is modified String Printing Functions LCD_PrString Description Prints a null terminated RAM based character string to the LCD at the present cursor location C Prototype void LCD PrString CHAR sRamString Assembly mov A gt sRamString Load MSB part of pointer to RAM based null terminated string mov X lt sRamString Load LSB part of pointer to RAM based null terminated string
361. y in the PSoC Designer IDE These data sheets explain the internal operation of the user module and provide performance specifications Each data sheet describes the use of each user module parameter and documents the set ting of each register controlled by the user module The development process starts when you open a new project and bring up the Device Editor a graphical user interface GUI for configuring the hardware You pick the user modules you need for your project and map them onto the PSoC blocks with point and click simplicity Next you build signal chains by inter connecting user modules to each other and the IO pins At this stage you also configure the clock source connections and enter parameter values directly or by selecting values from drop down menus When you are ready to test the hardware configuration or move on to developing code for the project you perform the Generate Application step This causes PSoC Designer to generate source code that automatically configures the device to your specification and provides the high level user module API functions User Module Source Code Development Flows Device Editor User aca Source Module Code a Parameter Selection peer Generator ization Generate Application Application Editor Project ane Manager Code Manager Editor Build All Debugger Event amp Interface Storage Breakp
362. ypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application imp

equipo para domótica basado en el estándard x10. interfaz usb

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equipo para domótica basado en el estándard x10. interfaz usb