インテル® Itanium® プロセッサー 9500 製品ファミリーとHP
Contents
1. HP UX 11i v3 2012 9 9 Itanium 9500 vPars and Integrity VM v6 1 5 vPars and Integrity VM v6 Uirtual Partitions vPars HP Integrity Virtual Machines Integrity VM vPars2. 0S Front End Back End Instruction 2 Buffer oy Replay pipeline path LL Front End Back End Instruction Buffer Replay pipeline path 10 DAF Digital Activity Factor
3. SMI 9 QuickPath QPI 9 Itanium 9500 L1 L2 L3 L3 1 0
4. 1 5 Floating Point Execution Iid Floating eiEi d PtRF Integer Execution Sn uo st ES lstlevel Cache Cache 9 ltanium 9500 0 8 9 Itanium 9300 0 6 Itanium 9300 0 4 0 2 9 Itanium 9300 9 Itanium 9500 8 12 2
5. Z stop shock post Ararat I Top Plate Post lt lt lt Ararat y PCB gt Itanium 9500 Itanium 9500 Itanium 9300 32nm 31 i 3
6. 03 5749 8328 9 00 19 00 10 0017 00 HP Integrity httD www hp com jp integrity F 5 1 Intel Intel Itanium Itanium Inside Intel Corporation 2012 11 Copyright 2012 Hewlett Packard Development Company L P RWTEPTWITI ISOY INK 136 8711
7. Itanium 9500 31 1 5 2 High k 32nm TDP 170W 9 Itanium 9500 TDP 170W CPU 9 Itanium 9500
8. IpGl FET FDC REN Replay MT Flush amp Resteer Inst Buffer amp Dispersal HBR 9 Itanium Poulson TDP EPIC 0S 12 19 6 4 2 1 2 3 1N0P
9. NIC CPU vPars and Integrity VM v6 1 5 9300 9500 D 65nm 32nm intel inside 20 5 31 700 544 ee LGA1248 LGA1248 ItanIUrm TDP 185W 170W 4 8 9 Itanium 13 24MB 32MB 9500 QPI 4Full 2Half 4Full 2Half QPI 4 8GT s 6 4GT s SMI 4 4 SMI 4 8GT s 6 4GT s 9 ltanium 9300 A A
10. 4 7 1 2 SoEMT Switch on Event Multi threading 1 2
11. 05 EPIC Explicitly Parallel Instruction Computing 9 Itanium 05 9 Itanium 9500 MCA 05 3 9 Itanium 9500 9 Itanium 9300
12. DIMM 1 DIMM 2 DRAM DDDC Double Device Data Collection MCA 9 Itanium 9500 31 1 5 MCA 0S MCA 05
13. HP Instant Capacity iCAP HP UX iCAP 0S 05 EL SR ECC 0S ECC MCA HP UX 11i v3 HP 9 Itanium 9500 0S HP Inteqrity HP UX 10 2007 HP UX 11i v3 2022
14. Itanium 3 1 Itanium 9500 4 2 1 83GHz 2 53GHz 1 4 L3 24MB 32MB 1 3 2 8 9 Itanium 9500 11 9 Itanium 9500
15. Integrity VM vPars and Integrity VM v6 vPars Integrity VM vPars Integrity VM vPars Integrity VM 9 Itanium 9 Itanium vVPar VM 2013 HP Superdome 2 9 Itanium 9500 HP Inteqgrity 0S HP UX 11i v2 HBA
16. Itanium 9500 HP UX 11i v3 Itanium RISC 9 Itanium HP Integrity SuDerdome 2 HP Integrity NonStop HP UX PA RISC Itanium ze aume ey UNIX HP Serviceguard 9500 Itanium 9500 HP UX 11iv3 9 ltanium 9500 9 Itanium
17. 9 Itanium 9500 TDP DDDC 2 HP 1200 1 DRAM DRAM 17 1 2 DRAM
18. 2 2 1 WUX12520 01
19. 2 5 2 1 5 1 0 5 1 9 Est Server side Est Java RE Linpack OLTP Itanium APECfp Java SPECint General GFLOPS Database rate_ rate_ Applications 9300 basez006 base2006 Intel Internal estimates 9 Itanium 9300 1 1 Itanium 9500 2 IPG Instruction Pointer Generate FET Instruction Fetch FDC Instruction Fetch Decode Replay Replay DEC REG REN Register Rename IBD Instruction Buffer amp Dispersal Front End Front End intel insige me Itanium Instruction Back E
20. 0QPI SMI QPI SMI HP UX Deactivate DPR Dynamic Processor Resiliency DPR
21. nd 2 DEC Instruction Decode REG Register Access EXE Instruction Execute Back End DET DetectExceptions EE WRB Writeback Commit Generate WB2 Writeback 2 Retire Buffer ET 9500 Itanium 9500 Itanium 9500
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