IP Lock [IPL-010L/030L]取扱い説明書 [ Ver1.6]
Contents
1. 3 3V 3 3V 0 0 0 30 3 6V O N 6 35mm a 1 27rm lt Q9 000000000 0000 L Copyright 2006 Design Gateway Co Ltd All rights reserved Page 6 9 VHDL D 1 DU L CD ROM Counter vhd Counter32bits vhd 2 0000000 Counter vhd LE GO EL HH HE L IP LOCK CTopl PL ock vha JCounter32bits vhd IP Lock 000 00 CU O DL C 00000000000 vHbL 0000000000000 0000 p44d0 00000000 Counter vha Top IP Lock Topl PLock vhd uUi tl Counter 32bits vhd E al IP Lock O0 10 VADL 00000 00000 1100 120 VAL 0000000000000 000000000000 0000 B Xilinx ee gi Sources in Project counter uc Se eaunter32bits rtl ilins5 TDS aurcesCounter32Bits Hd ER Ni tapiplack behaviaral kamt TD Source T aplPLack yhd M iplock Wi Module View Library View 11 Xilinx ISE 1D D 8000 D 800000 UU Copyright 2006 Design Gateway Co Ltd All rights reserved Page 7 9 MAltera 000 pem Navigator al xl bo IPLock u_IPLock abo Counter32Bite u2 _ Counter32Bits YHE Ay Hierarchy Files g i Design Units l 11 Quartus I 1000000 D 000 000 00 IP Lock ell DUDU ell UU l amp UUUUUL AE S 128 000 y 4000 00020000 RAM Xilinx 1200LE 24 500 00 00 1L2. Altera DABODDOD IDO 4000000 DOO TOTO TTI III L LI U U uggauamm uq 200msec O00 000000000 LEE EDT L Xilinx Spartan2 Spartan2E Spartan3 Spartan3E Virtex Virtex2 Virtex2 Pro Virtex4 Virtex5 Altera Stratix Stratix2 Cyclone Cydone2 x2009 124000008 00000000000 000000000 IPLock LIST pdf OOO D Oo 00 0 Xilinx ISE 7 100 0 FPGADOD0DODODODODO Altera Quartusll 410 FPGADODODO O Lock H PL 003WR TI LI U 00000 000000000000 000 IPL CHPOO J UI 1D00 00000000000 Copyright 2006 Design Gateway Co Ltd All rights reserved Page amp 9 DG Lock AQUA IP Lok 9 10000 000000000 000000000 0000000000000 00000000 OO 000 01P Lock pg 4008800000000 000000000 Q 300000 IP Lok 9000000000 00000000000 0000 0000000000000 Dogg giai IP Lok 00000000 0000000000 00000 000000000000 DUDU 00 0000000 UO UNO OG UGO GUT O Od UO UT OO UU DO QUOTO 000000 URL http www dgway com Email info dgway com gmillill lu ui m O 00000 FPGA J I JIP Lec nu dd 0000000000000 00 0FPGA 10 70 70 D U DUDU 00 pao po do pIrte xgggo000 8000000000 000000 400002 200000000 70000000000 00000 CID UU OOOO nt Na Yuu DI O L3 r3 O O Y Or 000000000000 DOBDODDD DO 00 L DO DI E Qu Qu 4 Ou GE DO Copyright 2006 Design Gateway Co Ltd All rights reserved Page 9 9
3. QPAUtVOG12HpgSQHdOReSFySWG ZACWwLMENzE8cRyl 6 HOSTID DISX_SERIAL_NUM 6c27bac5 SIGN 1416 E439 BEA 6880 OCEF 0000 IP Lock DICE 4842 3998 CF56 6728 0892 9985 B941 DEAD E923 0910 C269 0260 C32F 0583 ESCB C962 CSDF 4812 CBOF 489C 2000 B9F7 5324 00000 5240 End IPLoc license Y 6 Quartus I DID UG CU U U U 00 IP Lock rp D U U Copyright 2006 Design Gateway Co Ltd All rights reserved Page 4 9 DO L EH EE VE D VC E Lic Lisesi Naconnecil ir GLI 0 7 0000000000 FPGAUO UU O 00000 00 UO bcopngp bbor 200000000 000000 70000000 Una pbcop po DDOIJ II IILI FPGA I 19000800 00000000 KQO Puluprirnptu tutt 00 FPGA OO Pull Vep TO n000 0000000 00000000000 L 00000000 DOD00000000000 254000 3 V00 00000 FPGA Y 1 00 000 ut DO 0000000000 0000 14000 Vcc 02 3 5 8000 6NDO O 0 DD 00 DIU D UU UGO UU HO UOUO 000 OOOO soP8p 040 00000000 8 000000000000 il L W O L O L O L ra N A gt 4 6 3 7 Y 7 2 Q 1 Y Y ist Pc Sp E gt lt i T ps8po000000 000000000 Copyright 2006 Design Gateway Co Ltd All rights reserved Page 5 9 o0 00 ooon HI 15 DU DDDDDDD P SU pm I 0000060 40 125 C 0000000 oq 70 C 20 q 85 C 40000025000 225vp 2 75v 0 3V
4. 0000 00000000000000000000000000000 IDO000 0000000 IP Lock nmt IPL 003WR 4000000 0 0 000 PE CHP GLE D I III DUDU IAIDUDUDDUDDODDDDDUDDUDUUUUUDUDUDUUDDD OU UU 5000000000 00000 0000000000 000000 0000000000 0000000000 00 00 0000000000 250000 33V JII 0000008000000 0000000000 GUOD L 7 Altera TO FPGA 0000000000000 DUU DDOD 000000 II 000 D Od 0000 IP Lock Oliplock esign gateway com i 0 0000000000000 0 O000000000 000000000 00 UDuipi 0000 00 O r3 r3 OO DOBODO 0 dd TO T G0Ud TU TT d O DT Ud d TG TOT GOT 00000 HUU Copyright 2006 Design Gateway Co Ltd All rights reserved Page 1 9 IPLOCK UO 1 IP Lock 000000000 IP Lock 0000000000000 SC0000000000000000000000 0000000000 Sco QU QUU0 O 0000 00 dd 00 dd 000 000000000 0 0 00 0 00000 bUBiDmu i iu UU 00000 0 I 00 TU UO CO COTO O DO UO UT CO GO TO OO DODO UU O OOOO IP Lock JJ L Q 2 00000000L Copyright 2006 Design Gateway Co Ltd All rights reserved Page 2 9 30 IPLok0Q00 000000 000000 000000 IPLock I ttti ToplPLock vhd Altera Xilinx9 00000 IP Lock QOUUO Xilinx O iplock ngc iplockex ngo Altera iplock vhd DCO IDUDUDDDOUUUUIUIUDU DDO 3 IP Lock E 000000 IP Lock OOD Xilinx ipLock ngc ipLockex ngo Altera liplock vhd ID 1t E E E H E E E E Hugaguuuudiubrluuuiututiiuuuiuututiututututut B Xilinx ipLock ngc
5. ipLockex ngo 1H DD Q Xilinx 1 000080000 00000 DOHADL UU 000 O 000000000 DO UU O MAltera 100 Altera IP Lock 0000000000000 HDL 00000 I III JI J JIP Lock 900000 Quartusll QOO LH B D B HD UL IDD DI IP Lock 0 000000000 0000 IP Lock gado 000000000000 000 0000000 00000 DO LEO D IP Lock O D I iplockidesi gn gateway com 000 00000000000 0 Altera L L IP Lock 1ELELELELEL EL EL EL LL 0000 8000 0 0000 IP Lok I 000 DT OOO III IILI II O TD Qiplock design gateway com O Q 400000000000 UDUL Windows 00 O DOS DUDU UU diem 0000000000 00 00 00 000000000000 IU uut cu CIC CIC 1 3 O HO EE O 3 CIC DUI cu co Hal O HO O O CIC ca A c Ha p A L1 0000 EA DD 00 0000000000 Onan 000010111 A035 6978 c 00000 2005 06 01210 33 OAUTOEXEC BAT Q 5 gop00d000000 00000 Copyright 2006 Design Gateway Co L td All rights reserved Page 3 9 DG HP Lock 0000 000000090 IPLokg0000000002000000000000000000000 Quartus IIl 0 000000000 00000 000 00 000 00 00 IP Lokg0000Q00 600000000000 UU E license dat Notepad Ple Edit Format View Hep o Quartusll license zi Start Quartusti license End QuartusllI license Start IPLock license INCREMENT 7050_0001 alterad 9999 12 permanent uncounted 31B7BAUDS499r VENDOR_STRING djig1894kfNhSZK42oPq wWiSSaZDtEogUKERtGWitohctNYacSOLyluj62EN1GfOMmQ0ZeYE lusDeBiNoxP9PFsZKOmSTDF
6. r Ti I Lock Lock PL 010L 030L Ver1 6 ER AES HH C D DTP HO 00000000 OP Lock 00 0000 D O UD 1PL O10L 030L TET C C pod 0000000 00 IPL O10L 030L 0 Q DTP Lock DD MO BTE UU UO UO CO CU AES I TI Q FPGA HDD D 800000 DTP Lock ria d FPGAGO 00000 prc 7D D O7 OLD 000 0000 0000000000000 FPGA III IPg0 0000000000 O L O L O L OL 000 UO 00000000000 IDO OO D 00000000000 0000000 UL IPLok 00 FPGAG 00000000 8000000000 000000000000 ID 000 0000000 00000000 ID00000000 IDBO0 0000000000000 DUU 000 OU O L 0000 DOD0 0000 L 0000000 0 O DU 00000 IPL 010L 100 IIPL 030L 300 R Altera FPGA IP Lock Topl PLock vhd iplock vhd Xilinx O FPGA IP Lock Topl PLock vhd iplock ngc iplockex ngo VHDLZ U uuigiiilutlt Counter vhd Counter32Bits vhd IP Lock III PE MAN V1 x oO OOOO LLLELELELIE LI LI L Ptoxpogod00000000000000 00 O 11 00000000 0000 00 0 0000 0000000000 00000000 IDO00000000000 uuauBgumaBgmgiuUtuibmnmnpgpmprnupp rpm rt 21000000 ID 0000000000000 0000000 00000000 0000000000 0000 IP Lock GO 00 O 00 0000 B d 000 000000000000 000000000001 Lock IILI I LL III O O OOo 000 UU DU 00 OOO 0 DO DUT 315000000 100000000000 000 II 000000000 000000000000 00000 1D 1 DODODOOO DDD ID JU III II DOT DO 0000000
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