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1. http wwwsunhayato co jp H8 MTLR300 HEW High Performance Embedded Workshop
2. LCD LCD MT R300 LCD LCD 1 LCD Rev 1 0 Sunlink Display Tech Rev2 0 2
3. JBK 480 P 3 H8 7800H Microsoft Windows
4. ifinclude lt mt_r300 h gt VPD b7 3 b2 R W 1 define RD 0x04 define MT 0x00 define EN 0x02 define DS 0x00 define DR 0x01 define IR 0x00 void wait_ns void 1 void write_cmnd8_w unsigned gui WMD MR NODS out_VPE cmnd out_VPD IR MI EN wait_ns out_VPD IR MI DS wa1t_us_itu2 1530 void write_data8_w char dat ouiiVP DDR Ei DS wait_ms 500 out_VPE dat wait_ms 500 out_VPD DR MT EN wait_ms 500 wajt_ns Qi WOD DR DS wa1t _ms 500 wa1t_us_jitu2 43 void initialize_lcd void 1 setup_VPD 0x07 SEU VP ECORTT 7 77 7 6 7 char cmnd 8 7 0 b E 1 R W 1 R W 0 E 1 NS RS 0 710ns Mm ll 8 out_VPD
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7. 4 1 3 LCD 1 2 TEI ifinclude VPD b7 3 b2 R W 1 0 b1 E 1 0 b0 RS 1 0 d efi def d efi def d eff def void 2 YE 27 lt mt_r300 h gt e RD 0x04 e MT 0x00 EE 0x02 e DS 0x00 e DR 0x01 e IR 0x00 wait_ns Void unsigned char read_cmnd8 void unsigned char cmnd setup_VPE 0x00 Uie MD IN RW J ou DO INR RW EN wa1t_ns el im_WMEK ag Uig MMD INR WM 78 setup_VPE 0Oxff return cmnd unsigned char read_data8 void unsigned char d whi Se le read_cmnd8 amp 0x80 tup_VPE 0x00 oui URDGMDRI HRD DSgE out_VPD DR RD EN wa d 0U es in_ VPE L_VPD DR RD
8. void shift_down void 1 2 i 8 unsigned char d PO 1g EG 46 MT R300 LCD 4 8 2a 4 3 2a SunhayatO 4 3 2a 4 8 2b 4 3 2b MT R300 LC SunhayatO LCD long 10 1 10 100 1
9. ifinclude lt mt_r300 h gt 7 ifinclude lt mt_e502 h gt LCD void main void i 11S 41 SunhayatO unsigned char d initialize_lcd while 1 clear_display wait_ms 1000 return_home prints_lcd Sunhayato Corp Ge ae CuSO ND prints_lcd VPort Laboratory wait_ms 2000 ifOICil 2 1 168 TE IOIGGiiMG UIISIOI al d getchar_lcd locate_cursor 1 1 IWP_II6 8 IOIGGIG UIIKSIOIIa 02 putchar_lcd d wait_ms 200 wait_ms 2000 LCD 1 1 2 1 d 1 1 1 2 i d mt e502
10. rere HL LED SunhayatO 1 Liquid Crystal Display LCD 2 1 TN a b 2 90 90
11. 24 MT R300 LC ll 25 SunhayatO 4 G 4 2 10P LCD 4 VP1 R W bit6 E bit5 RS bit4 DB7 4 bitS 0 DB3 0 4 4 2 X xxxx workspace lcq_4b 4 1 H8 300H DDRAM A B C 1 2 4 T 3 MB VP2 03 CTR3 2 VP3 IO8 DT8 2 4
12. i 2 oO 2 i a b 90 2 1 TN 2 2 a b 2
13. P NII P A pp
14. O08 PC 0O8 Windows XP Professional HEW V 4 03 00001 C H8S H8 800 Standard Toolchain V 6 02 Release00 FDT FlashDevelopmentToolKit Ver4 02 HEW HEW High Performance Embedded Workshop SunhayatO coccoceececeeceeceeceeceseececeeceeceseeceseeseececeeseeceseeceeee BF HB MT R300 ee 5
15. 4 230ns LCD VPD b7 BZ b6 R M b5 E b4 RS b3 0 DB7 4 28 MT R300 LCD wait _ms_jitu2 45 LCD VDD 4 5V 45ms write_cmnd8 0x30 ET RC EY NER DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wait_us_itu2 4100 4 1ms write_cmnd8 0x30 2 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wajit_us_jitu2 100 100 gm s write_cmnd8 0x30 3 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wait_us_jtu2 39 39 s write_cmnd8 0x20 4 VE DB5 1 DB4 DL 0 4 DB3 N 0 1 DB2 F 0 5X 7 write_cmnd4_bc 0x28
16. 4 BF AC 4 2 8a 4 2 3a LCD 1 2 main finclude lt mt_r300 h gt VP1 b7 b6 R M 1 0 b5 E 1 0 b4 RS 1 0 b3 0 32 DB7 4 define RD 0x40 define MT 0x00 define E 0x20 define DS 0x00 define DR 0x10 defne IR 0x00 void wait_ns void unsigned char read_cmnd4 7 7 unsigned char cmnd setup_VPD 0xfO out_VPD IR RD out_VPD IR RD wai SON cmnd jn_VPD lt lt out_VPD IR RD wa GS 5 out_VPD IR RD out_VPD IR RD wa iMS cmnd in_VPD amp ou
17. include lt mt_r300 h gt 7 WU 6alR M la 0O lt Nb5ECT define RD 0x40 define MT 0x00 define EN 0x20 define DS 0x00 define DR 0x10 define IR 0x00 void wait_ns void 1 unsigned char read_cmnd4_lcd void unsigned char cmnd setup_VPD 0xfO Qis WMD ROO DS out_VPD IR RD EN wait_ns cmnd in_VPD lt lt 4 Qis WO MDS EI MS AE 7 7 0 0 mt_r300 0 b4 RS 1 0 b3 0 DB7 4 R W 1 R W 0 0 RS 0 710ns Mm ll Il BF AC 4 VPD 4 230ns 4 1200ns 42 unsigned char getbf_lcd void unsigned char getac_lcd void out_VPD out_VPD Wa pins cmnd out_VPD setu
18. I D 0 AC 1 AC S 0 1 C 0 1 B 0 1 0 R L 0 1 DDRAM DL 0 4 1 8 N 0 1 1 2 5X7 AC ADD DDRAM Display Data RAM BF AC PRHAM DDRAM CGRAM PRHAM 8 DDRAM CGRAM 5 DDRAM 2 5 LCD DDRAM 64 1 2 0x00 0x7f 7
19. re gt O 1 1 HN I 90 PT HR 2 1 2 i mh 2 he 2 6 a b 2 2 2
20. 4 MT E501 LED BF AC 4 out_VPT read_cmnd4 LED BF Db7 AC b6 0 BF 1 wait_ms 1000 out_VPT read_cmnd4 LED BF Db7 AC b6 0 BF 0 AC wait_ms 1000 while read_cmnd4 amp 0x80 BF 1 0x80 out_VPD DR WT DS out_VPD DR WT EN data gt gt 4 4 wait_ns 230ns out_VPD DR MT DS data gt gt 4 wait_ns 1200ns VPort 1000ns out_VPD DR MT DS out_VPD DR WT EN data amp 0x0f 4 EAT OE 230ns out_VPD DR MT DS data amp 0x0f void jnitialize_lcd void
21. 0x30 8 1 5X7 100us 0x30 8 1 5X7 Ox20 4 1 5X7 4 8 Ox28 0x20 0x80 2 4 2 5X7 0x06 Ox06 0x00 Ox60 2 Ox0c a 8 0x0c 0x00 0xc0 2 b 4 2 6 LCD Vdd 4 5V
22. 8 DB7 0 i 4 4 DB7 4 4 DB3 0 a VP1 VP2 Ne NM BZ 0 HL LED MTE502 http www sunhayato cojp products item_data MTLE502_Manual_ SG087044 pdf 19 VP1 Vcc GND Bz 0 1 R W 100x7 E RS DB7 DB6 DB5 DB4 4 ID QIR IO IO IO IO VP2 5V vec HO GND 5 LCD 6 Bz 4 R W MN oR 14 RS 13 12 11 oes 8 O1 lt Vcc GND 10
23. LED RS E R W HL C printf_lcdq 8 3 a MTE503 99 MT R300 LCD MT R300 LCD 2012 04 20 Rev1 02 170 0005 3 40 1 2010 Sunhayato Corp All rights reserved SG107014
24. 8 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 mnd8_w 0x30 7 Ua OO OD A A 5 void main void in ee 4 1ms 2 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 Imnd8_w 0x30 100 p s 3 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5 X 7 Ind8_w 0x20 DB5 Imd4_w 0x28 DB5 Ind4_w 0x06 DB2 Ind4_w 0x0c DB3 gg 4 NSR DB4 DI 0 4 DB3 N 0 1 DB2 0 5 X 4 2 DD EP J DBAS A DB2 55X D DB1 1 D DB0 S 0 DB2 D 1 DB1 C 0
25. 8 4 LCD MTE502 LCD 5V RS A Vdd E VO 3 VR MT R300 gt 14 Vss 2 DB7 0 7 a 8 LCD 5V VPD 4 6 RS 1 5 R W Vdd MT R300 3 vo BsVR 14 5 3 0 DB7 4 Vss A DB3 0 7 b 4 223 2 3 a 8 b 4 8 8 DB7 0 1 4 4 DB7 4
26. AO gt 0 EVN 4 BF 1 VPD 4 230ns 4 1200ns VPort 1000ns 230ns 4 4 VPD 4 8 4 4 43 SunhayatO wait_ns 230ns out_VPD IR MT DS cmnd gt gt 4 void write_cmnd4_bc unsigned char cmnd 4 whi
27. 6 El 230ns 4 BF 1 4 230ns 1200ns VPort 1000ns 4 230ns 4 BF 1 4 230ns 1200ns VPort 1000ns
28. write_cmnd4_bc 0x0c write _cmnd4_bc 0x01 wa1t_ms 1000 write_cmnd4_bc 0x02 write_data4_bc A write_data4_bc B write_data4_bc C write_data4_bc D write_data4_bc E write_data4_bc F write_data4_bc G write_data4_bc H MT R300 LCD LCD VPD b7 BZ b6 R W b5 E b4 RS b3 0 DB7 4 LCD VDD 4 5V 45ms NE DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X7 4 1ms 2 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5 X 7 100 us 3 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 39us 7 1g9 EY RE DB5 1 DB4 DL 0 4 DB3 N 0 1 DB2 F 0 5X7 4 2 DB5 1 DB4 DL 0 4 DB
29. 1000ns 4 230ns 4 BF 1 0x80 4 230ns 1200ns VPort 1000ns 4 230ns 34 vo1d jinitialize_lcd void setup_VPD 0xff Wa wri wa wri wa wr wai wr wri wri wri US TE RCA ji ite_cmnd8 0x30 Om SN CD te_cmnd8 0x30 Le_cmnd8 0x30 SN OE ite_cmnd8 0x20 Le_cmnd4_bc 0x28 Le_cmnd4_bc 0x06 Le_cmnd4_bc 0x0c void main void 5 8 unsigned char d me ze ee while 1 7 1
30. LCD 1200ns Rev 1 0 500ns Rev 2 0 1200ns 1200 40 230 3 2 1 Ox20 0xdf JIS X 0201 0xe0 Oxff CGROM Character Generator ROM Ox00 0x07 CGRAM Character Generator RAM DDRAM Display Data RAM LCD 2 1 8 4 D4 D7 HEX 0 il gt e6
31. 45ms 8 Ox30 1 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5 x 7 4 1ms 2 100ns 3 8 2 0x38 DB5 1 DB4 DL 1 8 DB3 N 1 2 DB2 F 5 x 7 Ox06 DB2 1 DB1 D 1 DBO 8 0 0x0c DB3 1 DB2 D 1 DB1 C 0 DB0O B 0 1Z SunhayatO 4 1 1 4 1 1 DDRAM main E
32. 39ps 4 2 1 4 2 1 DDRAM main 6 finclude lt mt_r300 h gt VP1 b7 b6 R W 1 0 b5 E 1 0 b4 RS 1 0 b3 0 DB define RD 0x40 R M 1 define MT 0x00 R W 0 define EN 0x20 E 1 define DS 0x00 E 0 define DR 0x10 RS 1 defne IR 0x00 RS 0 void wait_ns void 710ns void write_cmnd8_w unsigned char cmnd 8 1 out_VPD IR MT DS out_VPD IR MT EN cmnd gt gt 4 4 4
33. 4 4 VPD 4 4 BF 1 0x80 VPD 4 230ns 4 1200ns VPort 1000ns 33 SunhayatO 7 7 4 7 7 7 out_VPD DR RD EN 2 wait_ns data in_VPD OO ou uD GNDRI MRDN DSE setup_VPD 0xff return data void write_cmnd8 unsigned char cmnd 7 Qie WMD MR 78 Vy ogiDGNIRI ENO ENN CCmnd 0 ED wait_ns mie WMD IN emel 0 5 void write_cmnd4_bc unsigned char cmnd while read_cmnd4 amp 0x80 Qig WW 6 out_VPD IR MT EN cmnd gt gt 4 wait_ns 7 out_VPD IR MT DS cmnd
34. 2 4 7 LED BE b7 AC b6 0 2 MTLE501 LED BF AC BF b7 1 0 2 BF 1 BF 0 AO b6 0 BF 0 1 LCD 8 2 4 d VPE VPD DR RD DS VPD DR RD EN 230ns 22 VPR VPD DR RD D8 VPE return 4 1 3 MT R300 LCD
35. LCD 45ms 4 4 4 a 8 b 4 Ox30 2 3 8 4 1ms 100us gt
36. HEW od H8 MT R300 87800H 3062 HD64H3062BF H8 3062BF MT R300 H8 8062BF 5 ROM 16M 7 PC PC Pentium 600MHz IBM PC AT os Windows XP Windows Me Windows 98SE Windows 2000 Windows XP 128MB 2 100MB 1 USB H8 MTR300 USB
37. PP difne 16 8 00 0 0 oo Koo Koo oo Sunhayato LCD PWB MT E502 R W bit6 1 difine RD 0x40 00 O mopg MT E502 difine WT 0x00 4 2 E bit5 1 difine EN 0x20 0 difine DS 0x00 RS bit4 1 difine DR 0x10 0 difine IR 0x00 4 4 4 2 4 LOD 45ms 8 Ox80 1 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5 x 7 4 1ms 2 100ns
38. LCD BF AC 4 VPD 4 230ns 4 1200ns VPort 1000ns 230ns 4 4 VPD 4 Gi lgj 7 ls 08 2 4 BF 1 VPD 4 230ns 4 1200ns VPort
39. ifinclude lt mt_e502 h gt LCD void wait_shift_up 1 wa1t_ms 2000 sli 9 8 wait_ms 500 oeaee ensont 2 void main void initialize_lcd while 1 1 clear_display wait_ms 1000 OI GIIMG GUNIBSIOIIM 02 ii leGN DN NC 2 wa1t_shift_up rm CAS 8 wa1t_shift_up rm I 2 wa1t_shift_up Ni ed 0 2274088647 a long wa1t_shift_up printi_lcd 11 2147483648 1ong wa1t_shift_up 50 MT R300 LCD Sunhayato 4 3 4 4 3 3 1KHz MT R300 LC ll SunhayatO 5 8 4 R W BF AC
40. 4 1 2 BF AC LED ma 1 finclude lt mt_r300 h gt VPD b7 3 b2 R W 1 0 b1 E 1 0 b0 RS 1 0 define RD 0x04 R W 1 define MT 0x00 R W 0 define EN 0x02 E 1 define DS 0x00 0 defne DR 0x01 IS l define IR 0x00 RS 0 void wait_ns void 710ns 1 unsigned char read_cmnd8 void BF AC unsigned char cmnd setup_VPE 0x00 VPE out_VPD IR RD DS out_VPD IR RD EN wait_ns 230ns 20 cmnd in_VPE out_VPD IR RD DS setup_V
41. 40ns Rev 1 0 40ns Rev 2 0 0ns 25MHz 1 25 x 106 40ns 1 E 1 230ns Rev 1 0 230ns Rev 2 0 140ns Ox00 Ox02 OxO00 Ox01 0x03 0x01 bp2 b0 1200ns 1 Wa 1200ns 1 R W b2 _0 R W b2 LO 40ns 230ns 40ns 230ns E b1 E b1 0 7 1 0 RS b0 RS b0 DB7 0 EE DB7 0 EE a b Ox04 0x06 0x04 10x05 0x07 0x05 bp2 b0 1200ns 1 bp2 b0 1200ns 1 R W b2 1 R W b2 40ns 230ns 40ns_ 230ns _ E b1 E b1 0 1 RS bO RS b0 DB7 0 DB7 0 c d 2 4 10 DB7 0 E 0 MT R300
42. ie Sociss ssianinieasaeos oris diaaanensn eddaaataesnien Rds dasa don inaeind ana dtibataaes 5 ee 5 ee 5 2S EE NAR EE 2 1 ER SECA EE NNR 2889 8 08 ECEEER EI IR 87808 RI EE RIEN 8 4 eeeeeeeeeeeeetttttttteeeccctreeeeeeeeeeeeeeeeeeess 16 4 1 8 VT TT TPT 16 DDRAM 16 ete 20 LCD 1 2 22 4 2 4 re TO TT TT 26 DDRAM on 26 29 LCD 1 2 32 4 2 3a 36 1kHz 40 4 3
43. 4 2 DB5 1 DB4 DL 0 4 DB3 N 1 2 DB2 F 5 7 write_cmnd4_bc 0x06 DB2 1 DB1 I D DBO S 0 write_cmnd4_bc 0x0c DB3 1 DB2 D 1 DB1 C 0 DBO B 0 void clear_display Void write_cmnd4_bc 0x01 void return_home void write_cmnd4_bc 0x02 Void cursor_blink unsigned char cursor unsigned char blink 1 write_cmnd4_bc OxOc cursor lt lt 1 blink 1 DB3 1 DB2 1 DB1 DB0 void locate_cursor unsigned char 1ine_num unsigned char column_num write_cmnd4_bc Ox80 1ine_num 1 0Ox40 column_num 1 DDRAM DB7 1 DB6 0 ADD ADD 1 0x00 2 0x40 void prints_lcd char str while s
44. 1000ns 230ns 4 4 37 SunhayatO void write_cmnd8 vo1d write_cmnd4_bc unsigned char 7 7 i setup_VPD 0xff return data out_VPD IR out_VPD IR wait_ns out_VPD IR wh out VPD out_VPD Wd IE IS out_VPD wa ns out VPD out_VPD Wa bs out_VPD IR IR unsigned char cmnd MT DS WT EN cmnd MT DS cmnd MT MT MT MT MT ile getbf_lcd DS EN DS DS void putchar_lcd char data 4 7 4 7 wh out_VPD out_VPD wa ns out_VPD wa WS out_VPD out_VPD wa nS out_VPD DR DR MT MT MT ile getbf_lcd DS EN DS DS EN DS void jnitialize_lcd void setup_VPD 0xff cmnd cmnd cmnd cmnd data data data data A e gt 1 cmnd gt 0 8 gt amp 0xOf 7 amp 0x0Of 7 229 gt 8 amp 0x0f 7 SOOT VPD 4
45. 4 tio 41 1 2 ee 41 4 3 1a ee 46 eee 47 4 3 2a ere 48 EE LCD long ee 50 ER NRE EE EE ER 52 0 3 SR MT R300 LCD HLiquid Crystal Display ILCD 16 x 2 LCD 1 LCD
46. Microsoft I NR
47. IO MTE501 LED VP2 MTLR300 VPT LCD 8 BEVAC 4 c VPE VPD IR RD DS VPD IR RD EN 230ns VPE BF AC VPD IR RD DS VPE return BE AO LCD 3 8 4 1 2
48. 4 4 2 DB3 0 H L L 8 DB8 0 H 8 244 LCD 2 a b E 0 SunhayatO RS 0 1 R W 0 RW RS
49. 4 3 1a 4 83 1b 4 3 1b main E ifinclude lt mt_r300 h gt 7 nclude lt mt_e502 h gt 7 CD void main void initialize_lcd LCD while 1 clear_display wait_ms 1000 return_home 1 prints_lcd Sunhayato Corp ocate_cursor 2 1 2 1 prints_lcd VPort Laboratory wait_ms 2000 shift_down shift_up wa1it_ms 2000 mt e502
50. 1 DB7 1 DB6 DDRAM 2 i DB7 1 DB6 ABCDEFGHI1 abcdefghi 123456789 Es 4 2 3a 4 2 3b 4 2 3b 4 2 3a main include lt mt_r300 h gt VP1 b7 b6 R W 1 DB7 4 define RD define MT define EN define DS define DR define IR define ON define OFF 0x40 0x00 0x20 0x00 0x10
51. 1us VPD IR WT DS 1200ns 2 4 2 2 1 53ms 8 2 4 b VPD DR WT DS VPE DB7 0 VPD DR WT EN 230ns VPD DR WT DS 1200ns DDRAM 43ns 8 LCD 2 6
52. 64 20 16 1 2 16 20 64 1 0x13 Ox3f 2 2 0x53 Ox7f 2 5 LCD DDRAM 12 6 2 6 LCD 45ms Ox30 8 1 5x7 4 1ms 0x30 8 1 5X7 100us Ox30 8 1 5X7 0x38 8 2 5X7 MT R300 LCD 45ms 0x30 8 1 5X7 4 1ms
53. LCD XX xxxx workspacee 1cd_8b MT R300 main c X xxxx workspace hbrary mt_r800 c ge pp CE p2 TR3 HE VP1 03 104 Em C Sunhayato LCD PWB MT E502 4 1 H88 H8 300 Standerd TOOLchain 2 3 Project Eo uooer MTE502 Costom directory hbrary OK 00 ooo 10100000 H88 H8 300 Stander
54. 0 9 0 Ox80 Ox30 0x39 pow0 main0 include lt math h gt math c 1 8S H8 300 Standerd TOOLchain H88 H8 300 Standerd TOOLchain 2 3 math e OK 4 3 3 4 3 3 LCD long main C include math h gt ifinclude lt mt_r300 h gt
55. wa1it_ns 230ns out_VPD IR MT DS cmnd gt gt 4 wait_us_jitu2 39 39 u s void write_cmnd4_w unsigned char cmnd 4 out_VPD IR MT DS out_VPD IR MT EN cmnd gt gt 4 4 Weig MS 5 230ns out_VPD IR MT DS cmnd gt gt 4 wait_ns 1200ns VPort 1000ns UBDIRI 27 SunhayatO out_VPD IR MT EN c wa1t_ns out_VPD IR MT DS c wa1t_us_jitu2 1530 void write_data4_w char data 7 9 void jnitialize_lcd void out_VPD out_VPD wa OS out VPD Wd IE IS out_VPD Out_VPD Wa WS out_VPD Wa WS DR WT DR WT 0 DR MT Js DR WT DR WT DR MT EA setup_VPD 0xff wa wr Wd wr wa wri wri wri wri wri it_ms ite_cmnd8_w 0x30 DS
56. 4 Mel ls Jp 230ns out_VPD DR MT DS data gt gt 4 wait_ns 1200ns VPort 1000ns out_VPD DR MT DS out_VPD DR MT EN data amp 0x0f 4 wait_ns 230ns out_VPD DR MT DS data amp 0x0f void initialize_lcd void LCD LCD VPD SAE UDRDNORTT VPD b7 BZ b6 R W b5 E b4 RS b3 0 DB7 4 wait_ms_itu2 45 LCD VDD 4 5V 45ms write_cmnd8 0x30 8 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 44 MT R300 LCD wait_us_itu2 4100 4 1ms
57. 8 4 IDB8 0 4 13 SunhayatO 8 1 0 4 2 4 4 4 14 3 MT R300 LCD 3 1 8 VP2 VP3 2 4 VP1 R W E RS 4 VP1 8 NE NN VP1 100 Q
58. 0x80 0x40 3 SE WE 9 0 DB0 1 2 DB 0 DDRAM DDRAM DDRAM DDRAM 2 4 DB7 1 DB6 0 ADD DDRAM DDRAM DDRAM 230ns 2 void wait_ns void 710ns R W E RS HL LED wa1t_ms 500 LED 19 SunhayatO BF AC 1 h LED LED
59. A RAM a me nam 3 am a nla wun H Ba ua H H CG Fa ee B IRAM i Fi FL F Fa a 4 1 es ee C G Ba Fm a C RAM eg 5 ae H nn H H a mun mm a me H H CG ni E a a EL D RAM meeee H a H ale weees 6 W aF LL ue TH C G EL a nnng nnn Lig L E RAM Fr 1 ml la 7 CG lm sms Fe F RAM mm a i LL H H mn 8 a ra 11 g SunhayatO 4 2 2 RS Register Select R W Read Write 2 2 DDRAM 00H
60. DB0O B 0 LCD 28 while 1 1 wri wai wri wri wri wri wai wri wri wri wri Le_cmnd4_w L_ms 500 Le_cmnd4_w Le_data4_w Le_data4_w Le_data4_w Le_cmnd4_w Le_data4_w Le_data4_w Le_data4_w L_ms 1000 MT R300 LCD 0x01 DB0O 1 DB1 1 DDRAM 0x02 AM RB CE 0x80 0x40 3 DDRAM 2 4 DB7 1 DB6 0 ADD NE DDRAM 8 6 wait_ms 1000 W BE AC LRD LED TO MT E501 LED VP2 MTR300 VPT 4 VPE VPD IR RD DS VPD IR RD EN VPE BF
61. DBO S 0 31 SunhayatO write_cmnd4_bc 0x0c DB3 1 DB2 D 1 DB1 C 0 DBO B 0 Vo1d main void setup_VPT 0xff VPT 57 0 LED initialize_lcd LCD while 1 write_cmnd4_bc 0x01 DB0 1 wait_ms 1000 write_cmnd4_bc 0x02 DB1 1 write_data4_bc A write_data4_bc B write_data4_bc C write_data4_bc D write_data4_Dbc E write_cmnd4_bc 0x80 0x40 3 DDRAM 2 4 DB7 1 DB6 0 ADD write_data4_bc 1 write_data4_bc 2 write_data4_bc 3 write_data4_bc 4 write_data4_bc 5 wait_ms 1000 while read_ cmnd40 amp Ox80 LCD 8 write_cmnd8 0x20 7 39ps LCD 1
62. SG US SO 7 _itu2 4100 DS ind amp 0x0Of 4 230ns ind amp 0x0Of 1 53ms 4 2 EN data gt gt 4 4 230ns DS data gt gt 4 1200ns VPort 1000ns SE EN data amp 0x0f 4 230ns DS data amp OxOf 43 us DDRAM LCD VPD b7 BZ b6 R W b5 E b4 RS b3 0 DB7 4 LCD VDD 4 5V 45ms
63. write_cmnd8 0x30 2 wajit_us_jitu2 100 100 gg s write_cmnd8 0x30 3 wa1t_us_itu2 39 39 us write_cmnd8 0x20 47 RG 4 9 Sa 8 DB5 1 DB4 DL 0 4 DB3 N 0 1 DB2 F 0 5X 7 write_cmnd4_bc 0x28 4 2 DB5 1 DB4 DL 0 4 DB3 N 1 2 DB2 F 5X7 write_cmnd4_bc 0x06 DB2 1 DB1 1 D 1 DB0 S 0 write_cmnd4_bc 0x0c DB3 1 DB2 D 1 DB1 C 0 DB0O B 0 void clear_display void write_cmnd4_bc 0x01 DB0 1 void return_home void write_cmnd4_bc 0x02
64. 0x00 1 0 Void wait _ns void VE ME 7 0 0 b5 E 1 0 b4 RS 1 0 b3 0 R W 1 R W 0 8 RS 0 ll Il 710ns 36 unsigned char read_cmnd4_lcd void 7 unsigned char getbf_lcd void unsigned char cmnd setup_VPD 0xfO out_VPD out_VPD wa nS cmnd out_VPD wa TS out_VPD out_VPD wa 1t_ns cmnd out_VPD setup_VPD 0xff return cmnd b IR RD 8 in_VPD lt lt IR RD 8 IR RD IR RD 8 in_VPD amp IR RD Se EN 8 DSE N Dodi SEE 7 7 7 7 6 7 return read_cmnd4_lcd amp 0Ox80 gt gt 7 char getchar_lcd void 7 unsigned char data whi wai le getbf_lcd setup_VPD 0xfO out_VPD out_VPD DR RD tmS data out_VPD wa CS out_VPD out_VPD wa data NS out_VPD DR RD 95 in_VPD lt lt DR RD DR RD DR RD 3 in_VPD amp DR RD DS N E 0x0f DS 8 9 7 7 7 MT R300
65. 8 2 4 8 8 7 8 11 2 4 4 8 7 1 LCD 4 4 8 4 2 OC
66. 1 DB7 9 DB6 8 DB5 DB4 7 DB3 DB2 3 DB1 DBO NWR OO IO 3 1 R W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DBO Vdd 5V VR 2KO 10KX4 SunhayatO 4 8 4 4 1 4 1 10P LCD 8 VP2 VP3 2 RW b2 E b1 RS b0 DB7 0 b7 0
67. 7 slolAlBlclplgEl a Er mn Em 0 EE NE meme 1 HH H CG EE Emm nm Tn RAM 1 1 2 i H CG BE am mm mm a TN EE gt RAM em Bn Bn i mE 3 uaa ean Baan C G Pi ee FT nn R AM 3 4 EE nn nm ame mm wn a Pini na L CG es es 4 RAM a a La 5 eg Ee ue CG a mn nn 5 RAM i Bln i Lr 6 C G H H a aa 6 RAM i i FF I i mms i i uu 7 Es es Eo em lt S 7 RAM mai 8 CG a a a H H 8 RAM H mn lm LL 1 H H un H a C G HN mm mm aa J RAM FL a Em am m nn 2 1 na C G mm mn
68. DS R W 1 R W 0 RS RS 0 An 710ns gt 77 7 4 77 7 7 4 7 BF AC VPE 230ns BF AC VPE DDRAM BF 1 0x80 VPE 230ns 23 SunhayatO SUDV ONO return d void write_cmnd8 unsigned char cmnd 0e WM MR TDS a out_VPE cmnd A Wig WMD Wi ENDE wait_ns 0e_WMD MR void write_cmnd8_bc unsigned char cmnd while read_cmnd8 amp 0x80 7 out_VPD IR MI DS 7 out_VPE cmnd 7 out_VPD IR MT N 5 A wait_ns Qie MD MR ODS 4 void write_data8_bc char dat while read_cmnd8 amp 0x80 Gu VD RS W DS out_VPE dat out_VPD DR MT EN 5 wait_ns 0e WMD RN Hi DS A void jinitialize_lcd void s
69. LCD Wai na 2 wait_ms 1000 4 3 4 a 4 2 LCD X xxxx workspace lcd_4b_iib 4 1 4 2 mt_e502 c mt_e502 h mt r300 c mt_r300 h xxxx workspace Iibrary mt_r300 c mt_e502 c E 2 16 4 8 1a 4 3 1a 1 2 main c
70. LCD setup_VPD Oxff VPD b7 BZ b6 R W b5 E b4 RS 3 0 DB7 4 wait_ms_itu2 45 LCD VDD 4 5V 45ms write_cmnd8 0x30 MTR T ENE SE YE NSR DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wait_us_itu2 4100 4 1ms write_cmnd8 0x30 2 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wa1it_us_jitu2 100 100 us write_cmnd8 0x30 3 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X 7 wait_us_itu2 39 39us write_cmnd8 0x20 E M9 DB5 1 DB4 DL 0 4 DB3 N 0 1 DB2 F 0 5X7 write_cmnd4_bc 0x28 4 2 DB5 1 DB4 DL 0 4 DB3 N 1 2 DB2 F 5 X 7 write_cmnd4_bc 0x06 DB2 1 DB1 1 D
71. gt gt 4 wait_ns 9 out_VPD IR MT DS out_VPD IR MT EN cmnd amp 0x0f wa1it_ns out_VPD IR MT DS cmnd amp 0x0f void write_data4_bc char data while read_cmnd4 amp 0x80 Ww out_VPD DR MT DS 7 out_VPD DR MT EN data gt gt 4 wait_ns out_VPD DR MT DS data gt gt 4 wait_ns 7 Qi _WIMD MD SE out_VPD DR MT EN data amp 0x0f wait_ns 7 out_VPD DR MT DS data amp 0x0f 230ns 4 4 VPD 4 8 4 4 230ns 4 BF 1 0x80 4 230ns 1200ns VPort
72. write_cmnd8_w wait _ms 1000 write_cmnd8_w write_data8_w write_data8_w write_data8_w wait _ms 1000 write_cmnd8_w write_data8_w write_data8_w write_data8_w wait_ms 1000 7 7 7 7 7 MT R300 LCD LCD VDD 4 5V 45ms a CE P DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5 Xx 7 4 1ms 2 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X7 100ps 3 DB5 1 DB4 DL 1 8 DB3 N 0 1 DB2 F 0 5X7 8 A DB5 1 DB4 DL 1 8 DB3 N 1 2 DB2 F 5 X7 DB2 1 DB1 I D 1 DBO S 0 0 DB3 1 DB2 D 1 DB1 C 0 DBO B 0 LCD 0x01 0x02 AN EC OE
73. 3 39ns 4 Ox20 DB5 1 DB4 DL 0 4 DB3 N 0 1 DB2 F 0 5 x 7 4 4 2 0x28 DB5 1 DB4 DL 0 4 DB3 N 1 2 DB2 F 5 x 7 0x20 0x80 839us 26 MT R300 LCD Ox06 DB2 1 DB1 TI D 1 DBO 8 0 0x00 0x60 39ns OxOc DB3 1 DB2 D 1 DB1 C 0 DB0O B 0 0x00 0xc0
74. 3 N 1 2 DB2 F 5X7 DB2 1 DB1 1 D DB0 S 0 DB3 1 DB2 D 1 DB1 C 0 DB0 B 0 LCD DB3 1 DB2 D 1 DB1 C 0 DBO B 0 DB0O 1 DB1 1 35 SunhayatO write_data4_bc 1 1 2 write_cmnd4_bc 0x0f for i 0 ADD 0 ADD 8 write_cmnd4_bc 0x80 0x00 1 wri wri wri read_data4 Le_cmnd4_bc Ox80 0x40 1 Le_data4_bc d Le_data4_bc d Ox20 ite_data4_bc d 0Ox10 it_ms 100 it _ms 1000 DB3 1 DB2 D 1 DB1 C 1 DBO B 1 98 Hs DDRAM 1
75. 40ns Rev 1 0 40ns Rev2 0 Ons 25MHz 1 25 X 106 40ns 1 E 1 TDB7 0 230ns Rev 1 0 230ns Rev2 0 140ns E 0 1200ns Rev1 0 500ns Rev 2 0 1200ns 1200 40 230 c d E 0 RS 0 1 R W 1 RW RS
76. 710ns unsigned char read_cmnd4 void 4 unsigned char cmnd setup_VPD 0xfO VPD 4 out_VPD IR RD DS out_VPD IR RD EN wait_ns 230ns cmnd jn_VPD lt lt 4 4 out_VPD IR RD DS wait_ns 1200ns VPort 1000ns 7 we_WW OR SDE out_VPD IR RD EN Ea ms s 230ns cmnd in_VPD amp 0x0f 4 4 out_VPD IR RD DS setup_VPD 0xff VPD 4 return cmnd void write_cmnd8 unsigned char cmnd 8 out_VPD IR MT DS out_VPD IR MT EN cmnd g
77. AC VPD IR RD DS VPR return BE AC 4 4 4 8 4 2 2 4 2 2 BF AC LED main finclude lt mt_r300 h gt VP1 b7 b6 R M 1 0 b5 E 1 0 b4 RS 1 0 b3 0 DB7 4 defne RD 0x40 R M 1 defne MT 0x00 R W 0 define EN 0x20 E 1 29 SunhayatO define DS 0x00 0 define DR 0x10 RS 1 define IR 0x00 RS 0 void wait_ns void
78. PE 0Oxff return cmnd 7 unsigned char cmnd vo1d write_cmnd8 out_VPD IR MT DS out_VPE cmnd out_VPD IR MT EN wait_ns Sig _WIMD IN 4 7 4 MT R300 LCD BF AC VPE 8 230ns void write_cmnd8_bc unsigned char cmnd whi ou 0U wa le read_cmnd8 amp 0x80 L_VPD 1R WT Sp out_VPE cmnd L_VPD 1R WT NN IS 8 L_VPD 1R WT DS ou vo1d write_data8_bc char dat 4 vo1d initialize_l MM 77 7 BF 1 0x80 8 230ns 4 LED BF AC 4 0U wa ou wa whi ou ou ou wa 0U le read_cn L_VPD DR L_VPD DR IS Jp L_VPD DR L_VPE dat L_VPT read_cmnd8 1it_ms 1000 L_V
79. PT read_cmnd8 1it_ms 1000 nnd8 amp 0x80 MWT WT N MM 0 78 cd void setup_VPD 0x07 Se wai wri wai wr wai LuD_VPE 0x L_ms_1jtu2 L_us_1jtu2 if 45 Le_cmnd8 0x30 4100 ite_cmnd8 0x30 IS 100 7 LED BF Db7 AC b6 0 BF 1 LED BF Db7 AC b6 0 BF 0 AC 1 BF 1 0x80 8 230ns LCD VPD b2 R W b1 E b0 RS VPE b7 0 DB7 0 LCD VDD 4 5V 45ms EYRE TN 4 1ms 2 100us 21 SunhayatO write_cmnd8 0x30 3 write_cmnd8_bc 0x38 7 6 AT write_cmnd8_bc 0x06 write_cm
80. Ra 1 1 Void cursor_blink unsigned char cursor unsigned char blink ON 0OFF 1 write_cmnd4_bc 0x0c cursor lt lt 1 blink 1 DB3 1 DB2 1 DB1 DBO void 1ocate_cursor unsigned char 1ine_num unsigned char column_num write_cmnd4_bc 0x80 Tine_num 1 0x40 column_num 1 DDRAM 1 DB7 1 DB6 0 ADD int prints_lcd char str np 0 Sn MEIG 08 while str amp amp err_flag 0 Ua hiama eS Ss ll ldfellie 9 err_flag 1 return err_flad 45 SunhayatO mt e502 h unsigned char getbf_lcd void unsigned char getac_lcd void char getchar_lcd void void putac_lcd unsigned char void putchar_lcd char void initialize_lcd void void clear_display void void return_home void vo1d cursor_blink unsigned char unsigned char void locate_cursor unsigned char unsigned char il rie ea WW ss E js
81. Training Text MT R300 LCD MT E502 Sunhayato
82. d TOOLchain MI directory OK 4 1 DDRAM A B C 2 4 1 3 1 2 4 difine 16 16 MT R300 LCD R W bit2 1 difine RD 0x04 0 difine WT 0x00 E bit1 1 UN difine EN 0x02 0 difine DS 0x00 RS bit0 1 d ne DR 0x01 0 difine IR 0x00 8 2 4 a VPD IR WT DS VPE DB7 0 VPD 1R WT EN 230ns VPort
83. etup_VPD 0x07 setup_VPE 0xff wait ms_itu2 45 write_cmnd8 0x30 7 wait_us_itu2 4100 write_cmnd8 0x30 wait_us_itu2 100 7 write_cmnd8 0x30 7 write_cmnd8_bc 0x38 write_cmnd8_bc 0x06 7 write_cmnd8_bc 0x0c void main void ini VPE 8 230ns BF 1 0x80 8 230ns EE BF 1 0x80 8 230ns LCD VPD b2 R M b1 E b0 RS VPE b7 0 DB7 0 LCD VDD 4 5V 45ms REI EN EY NE 4 1ms 2 100ps 3 NR OE RE
84. in_VPD RN 230ns out_VPD in_VPD amp EN 1 53ms 8 3 LED 8 LED out_VPD in_VPD EN 3 LED 230ns out_VPD in_VPD amp EN 3 LED 43us DDRAM LCD VPD b2 R M b1 E b0 RS VPE b7 0 DB7 0 18 0 b0 RS 1 0 Vu NY wai wri wai wri wa wr wri wri L_ms_itu2 45 Le_cmnd8_w 0x30 L_us_jtu2 4100 Le_cmnd8_w 0x30 1it_us_jitu2 100 wri Le_cmnd8_w 0x30 ite_cmnd8_w 0x38 Le_cmnd8_w 0x06 Le_cmnd8_w 0x0 void main void iell eGI 0 a while 1
85. le getbf_lcd BF 1 out_VPD IR MT DS out_VPD IR MT EN cmnd gt gt 4 4 wait_ns 230ns out_VPD IR MI DS cmnd gt gt 4 wait_ns 1200ns VPort 1000ns 7 Gup VPDC DS J out_VPD IR MT EN cmnd amp 0x0f 4 wait_ns 230ns out_VPD IR MT DS cmnd amp 0x0f void putac_lcd unsigned char ac AC DDRAM write_cmnd4_bc Ox80 ac DDRAM DB7 1 DB6 0 ADD void putchar_lcd char data 4 1 while getbf_lcd BF 1 out_VPD DR MT DS out_VPD DR MT EN data gt gt 4
86. nd8_bc 0x0c void main void initialize_lcd setup_VPT Oxff while 1 1 wri wai wri wri wri wri wri wri wri wri wri wri wri wri wai out VPT read_cmnd80 Le_cmnd8_bc 0x01 L_ms 1000 Le_cmnd8_bc 0x02 Le_data8_bc A Le_data8_bc B 5 olaI6ee_I5 6 5G doitiqlo Gi Le_data8_bc E Sale eC ee eC eT aia ia Ga De Sa te_data8_bc 4 Le_data8_bc 5 L_ms 1000 whileead_cmnd80 amp 0x80 LCD BF b7 AC b6 0 8 Ox80 while Ox00 while LCD 1 Le_cmnd8_bc Ox80 0x40 3 4 7 7 LCD VPT b7 0 LED DB0 1 1 DDRAM
87. p_VPD 0xff return cmnd IR RD DS IR RD EN g in_VPD amp 0x0fr IR RD DS 7 7 return read_cmnd4_lcd amp Ox80 gt gt 7 return read_cmnd4_lcd amp 0x7f char getchar_lcd void 7 4 void write_cmnd8 unsigned char cmnd unsigned char data le getbf_lcd setup_VPD 0xfO out_VPD out_VPD whi wa lb IS data out_VPD wa OS out_VPD out_VPD wa Giape TS out_VPD setup_VPD 0xff return data out_VPD IR MT DS out_VPD IR MT EN cmnd gt gt 4 DRI RDO HDS DR RD EN 0 in_VPD lt lt 4 DR RD DS 8 M U 0 DR RD EN 8 in_VPD amp 0x0f DR RD DS 4 7 7 4 7 7 MT R300 LCD VPort 1000ns 230ns 4 4 VPD 4 IF Ea 7 llg 08 2 AC
88. t gt 4 4 4 wa1t_ns 230ns out_VPD IR MT DS cmnd gt gt 4 void write_cmnd4_bc unsigned char cmnd 4 while read_cmnd4 amp 0x80 BF 1 0x80 out_VPD IR MT DS out_VPD IR MT EN cmnd gt gt 4 4 wait_ns 230ns out_VPD IR MT DS cmnd gt gt 4 wait_ns 1200ns VPort 1000ns 20 MT R300 LCD out_VPD IR MT DS out_VPD IR MT EN cmnd amp 0x0f 4 ie me 8 230ns out_VPD IR MT DS cmnd amp Ox0f 1 void write_data4_bc char data 4
89. t_VPD IR RD setup_VPD 0xff return cmnd DS EN DS DS EN void 0x0f DS 8 unsigned char read_data4 void 7 unsigned char data whi le read_cmnd4 setup_VPD 0xfO out_VPD DR RD out_VPD DR RD wa in data in_VPD lt lt out_VPD DR RD wa ie MS out_VPD DR RD amp 0x80 DS EN DS DS 3 a 3 7 0 7 7 7 7 7 7 7 7 7 7 MT R300 LCD R M 1 R W 0 E 1 E 0 RS 1 RS 0 710ns 4 VPD 4 230ns 4 1200ns VPort 1000ns 230ns
90. tr 39 Sunhayato 1kHz 1 KHzl t 1 ms 0 5 Ims HL ts s for f x ts 4 2 4 MT R300 LCD 4 2 4 1KHz main 6 ifinclude lt mt_r300 h gt void main void 1 unsigned long 1 1s IGE S52 setup_VPD 0xff while 1 f 1000 1000 Hz f 1000000 1 1000 s 1000 us ts 1l 1 0 SSs 1000 x i N OS HE out_VPD 0x80 7 H LCD a ST 2 out_VPD 0x00 7 L

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