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COMX-P40x0 ENP2 Installation and Use (January 2015)

1. Indicates hazardous situation which if not avoided could result in death or serious injury A Indicates hazardous situation which if not avoided may result in minor or moderate injury XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX i N 30000000000000000000000000000000000000000000000000 Indicates a property damage message No danger encountered Pay attention to important information 40 0 ENP2 Installation and Use 6806800R95C 13 About this Manual Summary of Changes This manual has been revised and
2. D7 DDR3 power ok D10 1 5V power ok Thermal issue D17 n MEME SAL Mu 0 U43 uzooo N e Tam CC IDE BS 5 b gt a M A 0 92301 043 power ok 23 z I 4 g 1 3 a ok vao D3 system asleep 1 4 ae Too 4 ve T A 017 Ig E 555 m 5 n 0 413 xli us su2101 D6 1 8V lt 5c x 7 500 UT 8 0 T a xp 10 Bm o oO a loo o gly H 5 D3 29V power ok x 225 EM E d D9 Platform Power OK E T r an E JEL Kis gt 2 5951598 Woo we N p SE u4600 D13 CORE power ok s oE 8 1 B 8 B 0 5 205 sL aL H oO o 9 HERD EE n o a i J PM gt PS wog O a 1 lt 8 ur E 5 0 122008 F 8 8 Hay gu sn 2006 55 a bog oo TP2004 S ufo a ustoo 5 4 m e L4 14 E LABEL 8 8 0 55 Ez iD a Jog bt oo E 554 D Ej B C uu Pnu Sa Debug led DII 7 5 s
3. E T 73 omm rk Rozz 8 0000000000000 4 Debug led 018 eet I sis E d 00 000000005 S879 n a 8 8 8406869101 SN ones D TPB TP2020 F on FAB REV A Se SRS nn 8 0 7 036 9 0164058 hub High Speed 5 B 8 Be m 5 0 0 1 n i k o4 000 D15 USB hub Active SILI COMX P40x0 2 Installation and Use 6806800R95C EE Pin 1 COP header 29 Introduction Figure 1 3 40 0 2 Bottom View C6 oO n E n am D c76 ML z als cM c EE En 5 Ev 0 0000 71 9 m a Qus sz 2000 8 a P 0 o mol 000000 a 00 0 02300 m o 06 cis 5 a mar noo 558 0 Ip 108 5 EE 1300 u o LJ 5 ae ees S 5 Doe gt B vp C52
4. 127 7 22 1 Pre Deployment 54 2 127 7 22 2 Deploying BSP Images on 129 7 23 BOOK aoe 129 7 23 1 RAMBOOE ee ehe ann 130 7 23 2 ua re be 131 7 23 3 NANDDOOE u dederas er ee ee 131 7 23 4 nase ee isa 132 7 23 5 USBFATbobt and DSBEXT2DBOOL eee ee ERA nn 133 7 23 6 MMCFATboot and 2 134 A Related Documentation oer en 137 Artesyn Embedded Technologies Embedded Computing Documentation 137 6 40 0 ENP2 Installation and Use 6806800R95C List of Tables EN Table 1 1 Standard 20400 26 Table 1 2 4080 ENP2 Module Dimensions 32 Table 1 3 4040 ENP2 Module Dimensions 34 Table 1 4 Ordering 2 4 34 Table 2 1 Environmental Requirements 37 Table 2 2 Critical Temperature Spots 38 Table 2 3 e ana H n 39 Table 2 4 COM
5. 2 104 Table 7 4 GPIO States derer RR an 106 Table 7 5 GPIO Command Usage nennen ee a 107 Table 7 6 NOR Flash Command Usage 109 Table 7 7 NAND Flash Command Usage 110 Table 7 8 U Bootl2C Utilities obese esee eter 111 Table 7 9 Network Ports Naming Rules in U Boot 120 Table 7 10 Valid Network Ports Combination 121 Table 7 11 UDEV Rules for Network Ports in 123 Table A 1 Artesyn Embedded Technologies Embedded Computing Publications 137 40 0 ENP2 Installation and Use 6806800R95C 7 List of Tables me 8 40 0 2 Installation and Use 68068008956 List of Figures EN Figure 1 1 Declaration 28 Figure 1 2 COMX P40x0 ENP2 Top View 29 Figure 1 3 40 0 2 Bottom View 30 Figure 1 4 4080 ENP2 Mechanical Dimensions Top and side views 31 Figure 1 5 4040 ENP2 Mechanical Dimensions and side views 33 Figure 1 6 4080 ENP2 Serial Number Location
6. 35 Figure 1 7 4040 ENP2 Serial Number Location 35 Figure 2 1 Mounting Module on Carrier Board 42 Figure 2 2 Heat sink installation 43 Figure 4 1 COMX P40x0 ENP2 Block Diagram 68 Figure 4 2 Distribution ofLocalBusonPAOXO 70 Figure 4 3 Distribution of SerDes 74 Figure 4 4 Module Thermal 444 75 Figure 4 5 Memory oo E alee cn 76 Figure 4 6 Distribution of tr ern 80 Figure 4 7 MDIOROUtIDnQ ana a 83 Figure 4 8 Distribution ofl2Cbuses 86 Figure 5 1 Clock Distrib tion ae 89 Figure 6 1 Power TEE nennen 91 Figure 6 2 Power Sequence of 40 0 2 92 Figure 7 1 COMX P4080 CPU Information 103 Figure 7 2 Example of Boot Up Message in U Boot 119 COMX P40x0 2 Installation and Use 6806800R95C 9 List of Figures me gLeuuUuui Pre M 10 COMX P40x0 ENP2 Installation and Use 6806800R95C About this Manual EN Overview of Contents T
7. 40 3 Controls LEDs and Renee 45 3 1 Connectors and Switches 45 3 1 1 On Board Connectors 45 3 1 2 5 47 3 1 3 COMXAB CD Connectors 47 A Functional Description eso ooh mre E RSS wes EROS 67 1 192 Bt 1 s ee ern ee 67 4 2 Block Diagram ne PE EER 68 COMX P40x0 2 Installation and Use 6806800R95C 3 Contents 4 3 Processor Core and Cache Memory 68 4 4 Integrated Memory Controller 4 4 2 69 4 5 Local BUS waa un En Hone actae eA AERE etd 69 4 5 1 70 452 NOR PLASH hansenii a een 70 4 5 3 NANDFELASE 72 4 6 BIOCK ek 72 4 7 Thermal Management 2 2 4 4 4 4 75 48 MeMO euere nn PET 76 4 8 1 Memory Interface ie eet nee see 76 4 5 7 Memory 77 4 9 GPIO ae
8. B102 P50 LP TMP DETEC GPO7 IOEXT_GPO8 GND out V12 V12 3 CD2 CD2 CD2 B109 V12 V12 COMX P40x0 ENP2 Installation and Use 6806800R95C 65 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes ph je 5 _ 66 40 0 2 Installation and Use 6806800R95C Chapter 4 Functional Description __ 4 1 Overview The COMX P40x0 ENP2 is a COM Express module based on the Freescale QorlQ 4040 4080 processors This module provides some of the universal interfaces such as Gigabit Ethernet USB PCIE and so on This module is designed to supportthe processor at 1 2 GHz core frequency Currently productized variants support up to 4 GB of DDR3 soldered down QorlQ P4080 integrated communication processor has eight processor cores while the P4040 has four processor cores The processors provides high performance data path acceleration logic network and peripheral bus interfaces required for networking telecommunication data communication wireless infrastructure and military aerospace applications COMX P40x0 ENP2 Installation and Use 6806800R95C 67 Functional Description m 4 2 4 3 68 Block Diagram Figure 4 1 40 0 ENP2 Block Diagram PCle x 4 SRIO x PCle x 4
9. CD1 50 EMI1 MDC COME CD1 A51 GND 3 3 3 3 3 3 3 J J J J CD1 5 CD1 5 SERDES RX16 P SERDES RX16 N COME SERDES_RX17_P CD1 A56 SERDES RX17 N CD1 A57 COME 8 9 52 55 58 5 5 SERDES_RX18_P CD1 J3 CD1 9 SERDES 18 N CD1 CD1 CD1 CD1 CD1 CD1 J3 CD1 CD1 B10 18 cD1 COMX P40x0 2 Installation and Use 6806800 95 59 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes CPU_IRQ_OUT CPU_IRQO LBC_CLKO SERDES_TX6_N GND SERDES_TX7_P SERDES_TX7_N CD1 B23 CD1 B24 LBC CS6 N CD1 B26 LA 31 LA 30 LAD 0 LBC 1 lt 29 gt LBC 1 lt 26 gt LAD 1 LBC LAD 2 B36 LA 25 bidir B37 LBC 1 lt 24 gt bidir 60 40 0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector ref name Net Name Direction from COMX LBC_LA lt 23 gt bidir LBC_LA lt 22 gt bidir LBC_LA lt 21 gt GND LBC_LA lt 20 gt LBC_LA lt 19 gt LBC_LA lt 18 gt bidir LBC_LAD lt 3 gt bidir
10. 3 1 Connectors and Switches 3 1 1 On Board Connectors 4080 Header The following table lists the pinout of the COP Common On Chip Processor header for modules with the P4080 CPU Table 3 1 4080 Header Pinout Signal Name GND cpu_ckstp_out_n key for p4040 cop nc for P4080 cop_hrst_n empty cop_srst_n NC TMS NC CKSTP INPUT TCK VDDSENSE 3 3V NC RUNSTOP TRST cpujtag_tdi empty 10k pullup cpujtag_tdo COMX P40x0 ENP2 Installation and Use 6806800R95C 45 Controls LEDs and Connectors P4040 COP Header The following table lists the pinout of the COP header for modules with the P4040 CPU Table 3 2 P4040 COP Header Pinout I 5 Signal cpujtag_tdo empty 10k pullup cpujtag_tdi TRST NC RUNSTOP VDDSENSE 3 3V TCK NC CKSTP INPUT TMS NC srst n empty cop hrst n key for p4040 cop nc for PA080 cpu ckstp out n GND 2 3 6 7 8 9 12 13 14 46 40 0 ENP2 Installation and Use 6806800R95C 3 1 2 3 1 3 Controls LEDs Connectors ON BOARD LEDS There are several status LEDs provided on the module The following table lists the LED functions Table 3 3 Module LED Status LED Status Thermal issue D18 D19 Debug LED 172 D7 DDR3 power OK 04 3 3 V power 2 5 V power OK 1 8 V power OK CORE power OK PLAT
11. 2 1 at address 0x90 and measures the CPU temperature The ADT7411 can accurately measure the temperature of a remote thermal diode to 1 C and the ambient temperature to 3 C An ALERT output routed to an interrupt on the CPU signals when on chip or remote temperature is out of range 4 18 2 12C Device EEPROM There are two 2 EEPROMs on the module implemented in 24 02 24 512 devices These EEPROMs are located 2 1 one is for ID EEPROM 030 24 02 storing board serial number MAC address and so on and the other is for Processor EEPROM U2001 AT24C512C storing processor ID and so on The 12C addresses of these EEPROMs are OxAE and OxA8 24 02 provides 2 Kbits of storage while the 24 512 provides 512 Kbits Both EEPROMs support sequential read and page write COMX P40x0 ENP2 Installation and Use 6806800R95C 87 Functional Description 4 18 3 4 18 4 4 18 5 88 2 Device WDT The watchdog timer M41T65Q is located on 2 1 02101 and the device address is OxDO It is able to generate a power on reset and interrupt to the CPU 2 Device RTC The real time clock M41T62LC6F is located on 2 2 02100 and the device address is OxDO It provides a 32 KHz clock output and interrupt to the CPU 2 Device Clock Generators One clock generator ICS9FG104 is located on 12 1 U17 and the device address is The second clock generator ICS9FG104
12. 2 Installation and Use 6806800R95C Introduction 1 3 1 4080 ENP2 The following figure illustrates the top and side views of the COMX P4080 ENP2 module Figure 1 4 COMX P4080 ENP2 Mechanical Dimensions Top and side views E u en o a 1 22 70 9PL si 0828 x WITH 6 0 10 00 2PL 10 39 2PL 58 99 2PL 41 98 46 99 2PL 34 99 2PL 26 00 2PL 22 99 12 00 en 1 T n arts re art 4 oh T A LT E 5 80 55 22 28 85 2PL 100 51 COMX P40x0 2 Installation and Use 6806800R95C 31 Introduction Table 1 2 COMX P4080 ENP2 Module Dimensions Characteristic Value Mounting height top side component side 1 6 1 mm 32 COMX P40x0 2 Installation and Use 6806800R95C Introduction 1 3 2 4040 ENP2 The following figure illustrates the top and side views of the 4040 2 module Figure 1 5 COMX P4040 ENP2 Mechanical Dimensions Top and side views 2 a n gt P gt P a 1 82 10 9PL WITH 25 0 PAD 70 00 221 70 99 221 58 99 2 1 41 98 46 99 221 34 99 221 26 00 271 4 0073 Hess M e 5 lt lt 22 2 28 85 2PL 60 00 3 1 COMX P40x0 2 Installation and Use 6806800 95 33 Introduction 1 4 1 5 34 Table 1 3 COMX P4040 ENP2 Module Dimensions Characteristic Value Mounting heigh
13. BSP The following are the examples of critical environment variables gt setenv bootfile COMX_P4080_V100R00 ulmage gt setenv fdtfile COMX_P4080_V100R00 comx dtb Similar to the USB drive users need to create two partitions on the MMC SDHC card FAT32 is the first partition and the EXT2 is the second partition Both partitions contain a directory boot and the directory has kernel files EXT2 partition contains the rootfs which can be from rootfs nfs tar gz COMX P40x0 ENP2 Installation and Use 6806800R95C 135 BSP 136 COMX P40x0 2 Installation and Use 6806800R95C Appendix Related Documentation EEE Artesyn Embedded Technologies Embedded Computing Documentation The publications listed below are referenced in this manual You can obtain electronic copies of Artesyn Embedded Technologies Embedded Computing publications by contacting your local Artesyn sales office For released products you can also visit our Web site for the latest copies of our product documentation 1 Goto www artesyn com computing support product technical documentation php 2 Under FILTER OPTIONS click the Document types drop down list box to select the type of document you are looking for 3 Inthe Search text box type the product name and click GO Table Artesyn Embedded Technologies Embedded Computing Publications Document Title Publication Number COMX P40x0 ENP2 Safety Notes Summary 6806
14. LBC_LAD lt 4 gt LBC_LAD lt 5 gt LBC_LAD lt 6 gt LBC_LAD lt 7 gt LBC_ALE_N SERDES_TX16_P SERDES_TX16_N COME_TYPE3_N SERDES_TX17_P SERDES_TX17_N COME_TYPE2_N SERDES_TX18_P SERDES_TX18_N GND SERDES_RX19_P in SERDES_RX19_N in COMX P40x0 2 Installation and Use 6806800R95C 61 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes SERDES_RX20_N LBC_CS5_N CD2 SERDES RX22 SATA 1 P SERDES RX22 SATA 1 N SERDES RX23 SATA 23 SERDES_RX23_SATA 77 GND LBC_WP_N LBC_RB_N A83 CPU_IRQ1 CD2 A85 CPU IRQ2 CD2 A86 CPU IRQ3 in 62 40 0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector ref Connector name Pin Net Name Direction from COMX CD2 8 CPU GPIO in CD2 8 n 9 CPU CD2 A90 GND CD2 A91 GPI5 in J J J J 2 2 2 2 92 9 9 9 8 5 3 CD 3 CD A 9 CPU_GPI3 GND IOEXT_GPI6 n CPU_GPI4 in in CD2 A96 GND CD2 97 IOEXT_GPI7 in CD2 CD2 A9 A9 3 8 CPU SPI CS2 N CPU SPI CS3 N CD2 E
15. EEPROM NXID vO U Boot provides several mac utilities to display and program the data in ID EEPROM mac read save id num errata date ports 0 1 2 3 4 516 7 mac read Shows content of EEPROM mac save Saves to the EEPROM mac id Programs system id mac num Programs system serial number mac errata Programs errata data mac date Programs date mac ports Programs the number of ports mac X Programs the MAC address for port X X 0 7 The following are usage examples mac id mac num E017D99 mac errata 0 mac date 101021120000 mac ports 1 mac 0 00 80 42 05 49 d4 mac save 40 0 ENP2 Installation and Use 6806800R95C BSP 7 15 2 Board EEPROM An I2C EEPROM AT24C512 U2001 is used as the BOARD EEPROM located on I2C lt 1 gt The COMX P40x0 ENP2 module uses BOARD EEPROM to store information about the board s processor family module family and configuration among others Boot up message in U Boot will appear as EEPROM COMX The U Boot provides brd utilities to display and program the data in BOARD EEPROM read save id pf lpvlpe mf mv me ms md ma read Shows content of EEPROM brdsave Saves to the EEPROM brd id Programs board id brd pf Programs processor family brd pv Programs processor version brd pe Programs processor errata brd mf Programs module family brd mv Programs module version brd me Programs module errata brd md Programs module description string brd ms Programs memo
16. the examples of critical environment variables gt setenv ethact FM1 DTSEC1 gt setenv ramdiskfile comx_p4080 COMX_P4080_V100R00 rootfs_ext2 img gt setenv comx p4080 COMX P4080 V100RO0 ulmage gt setenv fdtfile comx_p4080 COMX_P4080_V100R00 comx dtb NORboot The COMX P40x0 ENP2 has a U Boot variable called norboot setenv bootargs root dev ram rw console consoledev Sbaudrate Shwbootargs Sothbootargs bootm norbootaddr Snorfsaddr Snorfdtaddr norboot will load RAMDISK Linux kernel and from NOR Flash into RAM then boot The following are the critical environment variables for norboot norfsaddr RAMDISK address on NOR FLASH norbootaddr Linux kernel address NOR FLASH norfdtaddr DTB address NOR FLASH Thefollowing are the examples of critical environment variables gt setenv norfsaddr E9000000 gt setenv norbootaddr EE000000 lt gt setenv norfdtaddr EFD00000 NANDboot COMX P40x0 ENP2 has a U Boot variable called nandboot nandboot setenv bootargs root dev jffs2nand rw console Sconsoledev Sbaudrate rootfstype jffs2 Shwbootargs Sothbootargs bootm norbootaddr Snorfdtaddr COMX P40x0 ENP2 Installation and Use 6806800R95C 131 BSP 7 23 4 132 The nandboot will load Linux kernel from NOR flash into RAM and then boot JFFS2 will then mount on the file system NAND flash as rootfs The following the critical environment var
17. zus oa D BUE x B c2 a n 0 n 190 al 8 000000000000 0 5 en S oes 9000000 on 000000000000 u 3 00 as Ib SL Be 00 000 590 of eL om Sooo BU SPB 74 00 SU cs S 000 D 000 p ED sa 0 o 8 240 7808 omn ce 0009 0 B BC Doo 0g Sm a 210 19 5 k MEI 00 5 F o 05400 o 9 EA 1 seg 9 C212 629 6 2 C209 9 DE a B nnuuunauun E uw Scu o 204 n 8 0 pene c175 B gH 2 99558 n000 en T b 4 M E z ole 2 g mg S865 95401 05200 2 1 sssstisesags 5 n Bosco E 020 ooo Bp ma S5 55 S 0 408 09 ye 0 o 0 eo E 0 520 a 2 a a o gt o poa E E A zi 1 m ao 1 0000 Senden Seo 00 000 ume 024 v18 o 8m 8 E B 0000000 3 8 S 00000000000000 8 ou a 0000000000000000 1 i E Bass 80 095 00000 0000 m le PINAI 23 E 0000000000000000 o 9 7 PIN 019 T2 p a 0000 Am PINAI 42 013 CD 13 COME AB 2 30 40 0
18. 1 2 count Compute CRC32 checksum i2c dev dev Shows or sets current I2C bus i2cloop chip address 0 1 2 4 of objects Loops reading of device 4 of delay us i2c md chip address 0 1 2 of objects Reads from I2C device i2c mm chip address 0 1 2 Writes to 2 device auto incrementing i2c mw chip address 0 1 2 value count Writes to I2C device fill i2c nm chip address 0 1 2 Writes to 2 device constant address i2c probe Shows devices on the I2C bus i2c read chip address O 1 2 length Reads to memory memaddress Recinitiaizes the 2C Controller i2c speed speed Shows or set I2C bus speed 12C buses in the U Boot have been re assigned as follows i2c dev 0 selects 2 lt 1 gt i2c dev 1 selects I2C lt 2 gt i2c dev 2 selects 2 lt 4 gt The devices displayed via the i2c probe command are 7 bit I2C addresses The addresses found in the HW Table 4 8 on page 86 are 8 bit addresses For example 7 bit address 0x18 corresponds to the 8 bit address 0x30 COMX P40x0 ENP2 Installation and Use 6806800R95C 111 BSP 7 15 1 112 ID EEPROM An I2C EEPROM 24 02 U30 is used as the ID EEPROM located on 2 lt 1 gt The COMX P40x0 ENP2 module uses ID EEPROM to store the board s serial number number of network ports MAC addresses errata level manufacturing date and other information Boot up message the U Boot will be
19. Genehmigung zum Betrieb des Produktes verliert Boardprodukte werden in einem repr sentativen System getestet um zu zeigen dass das Board den oben aufgef hrten EMV Richtlinien entspricht Eine ordnungsgem sse Installation in einem System welches die EMV Richtlinien erf llt stellt sicher dass das Produkt gem ss den EMV Richtlinien betrieben wird Verwenden Sie nur abgeschirmte Kabel zum Anschluss von Zusatzmodulen So ist sichergestellt dass sich die Aussendung von Hochfrequenzstrahlung im Rahmen der erlaubten Grenzwerte bewegt Warnung Dies ist eine Einrichtung der Klasse A Diese Einrichtung kann im Wohnbereich Funkst rungen verursachen In diesem Fall kann vom Betreiber verlangt werden angemessene Ma nahmen durchzuf hren 1 Besch digung des Produktes Hohe Luftfeuchtigkeit und Kondensat auf der Oberfl che des Produktes k nnen zu Kurzschl ssen f hren Betreiben Sie das Produkt nur innerhalb der angegebenen Grenzwerte f r die relative Luftfeuchtigkeit und Temperatur Stellen Sie vor dem Einschalten des Stroms sicher dass sich auf dem Produkt kein Kondensat befindet COMX P40x0 ENP2 Installation and Use 6806800R95C Sicherheitshinweise Besch digung von Schaltkreisen Elektrostatische Entladung und unsachgem er Ein und Ausbau des Produktes kann Schaltkreise besch digen oder ihre Lebensdauer verk rzen Bevor Sie das Produkt oder elektronische Komponenten ber hren vergewissern Sie sich da Sie in einem ESD g
20. Row 4 Note For modules with Gigabit Ethernet port options System Overheating Improper cooling can lead to system damage and void the manufacturer s warranty Personal Injury During operation hot surfaces may be present on the heat sinks and the components of the product To prevent injury do not touch any of the exposed components or heatsinks on the product when handling 38 COMX P40x0 ENP2 Installation and Use 6806800R95C Hardware Preparation and Installation 2 2 Power Requirements This module is designed to operate with the input voltages and currents as defined in the following tables Table 2 3 Current Idle 2 81A 100 uA Full Loading Linux 2 91A 100 uA Table 2 4 COMX P4080 4G E ENP2 Volts Amps Power Total Power dissipation W Unpacking and Inspecting the Enclosure Read all notices and cautions prior to unpacking the product NOTICE Damage of Circuits Electrostatic discharge and incorrect installation removal of the product can damage circuits or shorten their life Before touching the product make sure that you are working in an ESD safe environment with protective equipment such an ESD wrist strap and ESD shoes Hold the product by its edges and do not touch any components or circuits COMX P40x0 ENP2 Installation and Use 6806800R95C 39 Hardware Preparation and Installation 2 3 40 Shipment Inspection 1 Verify that you have received all
21. cd mnt Install the Freescale LTIB using the following commands install Input unixopt sdk1 0 as the installation target directory Do not interrupt the installation process COMX P40x0 ENP2 Installation and Use 6806800R95C 95 BSP 7 Executethecd unixopt sdk1 0 QorIQ DPAA SDK 20110609 systembuilder command 8 Create a PDK project for PA080DS using the following command scripts create config py config file fsl p4080ds sample create config ini 9 Setup cross compile environment using the source build p4080ds release bitbake rc command 10 Build Freescale 408005 BSP images for building test using the bitbake devel image command 7 5 Source Code Package 7 5 1 De Compose Source Code Package Copy the COMX P4080 2G ENP2 released BSP source code package COMX_P4080_SRC_ lt Version Number gt tar gz to the build host and un compress it in current directory tar xzvf COMX_P4080_SRC_ lt Version Number gt tar gz There will be a newly created folder named P4080 which contains SCP P4080 2G ENP2 source code Table 7 2 BSP Source Code Package Layout File Directory Name Description build sh Top script for building all of BSP images for BSP release It calls Makefile to perform the operations clean sh Top script for cleaning all of BSP images and temporary objects for BSP release It calls Makefile to perform the operations linux directory contains Linux kernel rootfs and rootfs build
22. norfsaddr norfdtaddr nandboot Default is setenv bootargs root dev jffs2nand rw console consoledev baudrate rootfstype jffs2 hwbootargs othbootargs bootm norbootaddr norfdtaddr nfsboot Default is setenv bootargs root dev nfs rw nfsroot serverip rootpath ip ipaddr serverip gatewayip netmask hostname netdev off mmcfatboot default is setenv bootargs root dev mmcbdev rw rootdelay 30 console consoledev baudrate hwbootargs othbootargs mmcinfo fatload mmc 0 1 loadaddr boot bootfile fatload mmc 0 1 fdtaddr boot fdtfile bootm loadaddr fdtaddr mmcext2boot default is setenv bootargs root dev mmcbdev rw rootdelay 30 console consoledev baudrate hwbootargs othbootargs mmcinfo ext2load mmc 0 2 loadaddr boot bootfile ext2load mmc 0 2 fdtaddr boot fdtfile bootm loadaddr fdtaddr usbfatboot default is setenv bootargs root dev usbbdev rw rootdelay 30 console consoledev baudrate hwbootargs othbootargs usb start fatload usb 0 1 loadaddr boot bootfile fatload usb 0 1 fdtaddr boot fdtfile bootm loadaddr fdtaddr usbext2boot default is setenv bootargs root dev usbbdev rw rootdelay 30 console consoledev baudrate hwbootargs othbootargs usb start ext2load usb 0 2 loadaddr boot bootfile ext2load usb 0 2 fdtaddr boot fdtfilesbootm loadaddr fdtaddr COMX P40x0 ENP2 Installation and Use 6806800R95C 101 BSP 7
23. uboot clean cleans U Boot Output The built image is u boot bin in the current working directory Build Linux Kernel The Linux kernel is based on SDK1 0 whose version is 2 6 34 6 COMX P40x0 ENP2 Installation and Use 6806800R95C 125 BSP 7 21 3 126 Commands 1 Build by default make kernel dtb 2 Build Targets supported for Linux kernel Output config default copies the COMX P4080 default configuration to current configuration kernel config configures the kernel based on current configuration kernel compiles kernel with current configuration kernel clean cleans the kernel dtb compiles device tree binary The build images are uImage and comx dtb in the current working directory Build ROOTFS The rootfs for SCP P4080 2G ENP2 include RAMDISK and NFS Commands 1 make rootfs The output image is local tmp lt username gt rootfs_ext2 img 2 Build Targets supported for rootfs Output root fs builds rootfs root 2 builds rootfs for ram disk rootfs nfs builds rootfs for nfs rootfs clean clean the rootfs The build images are root fs_ext2 imgand root fs_nfs tar gzinthecurrent working directory COMX P40x0 ENP2 Installation and Use 6806800R95C BSP 7 21 4 Build Misc Firmware Misc Firmware for SCP P4080 2G ENP2 includes FMAN uCode RCW image e FMANuCodeis misc fman ucode fsl fman ucode P4 P5 101 8 bin e RCWimageismisc rcw rcw bin 7 22
24. 0000 2000 0000 512 PCIE2 NOTE2 000 0000 2000 0000 1000 0000 256 NOTE2 000 0000 C 3000 0000 1000 0000 256 RIO2 MEM NOTE2 f C000 0000 C40000000 08000000 512 PCIE3 MEM Ur E000 0000 F E000 0000 1000 0000 256 LBC NOR FLASH F000 0000 F F000 0000 0040 0000 4 MB DCSR 400 0000 F400 0000 0020 0000 2 MB BMAN MEM 420 0000 F420 0000 0020 0000 2 MB QMAN MEM F800 0000 F F800 0000 0001 0000 64 KB PCIE1 F801 0000 F F801 0000 0001 0000 64 PCIE2IO 802 0000 802 0000 0001 0000 64 PCIE3 10 FFAO 0000 F FFAO 0000 0010 0000 1 MB NAND FLASH Buffer 00 0000 0000 0100 0000 16 CCSR FFFF F000 0 FFFF F000 0000 1000 4 KB BOOT PAGE Note1 Only up to 2 GB memory is mapped in U Boot and the other memory is left unmapped and not used if more than 2 GB memory is fitted More than 2 GB can be used in Linux Up to 4 GB has been verified Note2 Address 4 and 5 is used instead of address 3 if RIO is configured COMX P40x0 ENP2 Installation and Use 6806800R95C 77 Functional Description 4 9 The COMX P40x0 ENP2 module supports a total of 20 GPIO pins The following table lists the GPIOs Table 4 5 GPIO CPU_GPIOO GPIO of COM Express connectors CPU_GPIO1 GPI1 of COM Express connectors CPU_GPIO2 of COM Express connectors CPU_GPIO3 4 of COM Express connectors CPU GPIO4 GPOO o
25. 6806800R95C 21 Sicherheitshinweise Kabel und Stecker Batterie 22 Besch digung des Produktes Bei den RJ 45 Steckern die sich an dem Produkt befinden handelt es sich entweder um Twisted Pair Ethernet TPE oder um E1 T1 1 Stecker Beachten Sie dass ein versehentliches Anschlie en einer E1 T1 1 Leitung an einen TPE Stecker das Produkt zerst ren kann e Sie deshalb TPE Anschl sse der Ihres Arbeitsplatzes deutlich als Netzwerkanschl sse e Stellen Sie sicher dass die L nge eines mit Ihrem Produkt verbundenen TPE Kabels 100 m nicht berschreitet e Das Produkt darf ber die TPE Stecker nur mit einem Sicherheits Kleinspannungs Stromkreis SELV verbunden werden Bei Fragen wenden Sie sich an Ihren Systemverwalter Besch digung des Blades Ein unsachgem er Einbau der Batterie kann gef hrliche Explosionen und Besch digungen des Blades zur Folge haben Verwenden Sie deshalb nur den Batterietyp der auch bereits eingesetzt wurde und befolgen Sie die Installationsanleitung Datenverlust Wenn Sie die Batterie austauschen k nnen die Zeiteinstellungen verloren gehen Eine Backupversorgung verhindert den Datenverlust w hrend des Austauschs Wenn Sie die Batterie schnell austauschen bleiben die Zeiteinstellungen m glicherweise erhalten Datenverlust Wenn die Batterie wenig oder unzureichend mit Spannung versorgt wird wird der RTC initialisiert Tauschen Sie die Batterie au
26. 7 102 Checking the BSP Version There are several different versions of the BSP but no versions are available for RCW Below are the methods followed to check versions of the BSP 1 For the FMAN uCode Version it is found in the U Boot boot up message Fman Uploading microcode version 101 6 0 2 RAMDISK rootfs version Boot up with ramboot run ramboot in U Boot or norboot run norboot in U Boot In Linux run cat etc version rootQCOMX P4080 root cat etc version COMX P4080 EXT2 ROOTFS ver COMX_P4080_V100R00 build by ec7536 cncdebaobs04 emrsn org on Mon Nov 29 08 46 50 UTC 2010 3 Kernel version Theversionis viewed in the loading kernel message Booting kernel from Legacy Image at Image Name Linux 2 6 34 6 Created 2010 11 29 8 46 16 UTC e Run iminfo norbootaddr in U Boot gt iminfo norbootaddr Checking Image at ee000000 Legacy image found Image Name Linux 2 6 34 6 Created 2010 11 29 8 46 16 UTC Image Type PowerPC Linux Kernel Image gzip compressed Data Size 3520445 Bytes 3 4 MiB Load Address 00000000 Entry Point 00000000 Verifying Checksum OK e Inthe kernel boot up message Linux version 2 6 34 6 ec7536 cncdebaobs04 emrsn org version 4 3 2 Sourcery Lite 4 3 74 1 SMP Mon Nov 29 16 46 03 CST 2010 40 0 ENP2 Installation and Use 6806800R95C BSP 4 U Boot Version e the command ve
27. 78 4 10 SDHC ae ee 81 4 1 SPlilnterface 4 eorr Meee beeen ld E ERES ee ade 81 a2 81 4 12 1 MDIQ cero pb epe see ae ea ede andes edad 82 C NEXU h P 84 4 14 UART Interface 2 2 2 2 4 84 4 15 RealTimeClock cette e ERE RE EUR YR EU PD eA perpe beat DR eA 84 4 16 Watchdog Timer 2 2 2 2 2 2 2 42 84 USB 1 ERR RN ERR as 84 4 18 I2C Interfdce aaa eae oa se GERA RR a s 85 4 18 1 I2C Device Thermal 5 87 4 18 2 12 Device EEPROM 4 24 87 4 18 3 I2C Device 2 24 2 2 2 88 4 18 41 2 ele DU AT E EPOR NU ENS 88 4 18 5 I2C Device Clock 88 5 Clock SEPUCLUTO ioo ces viu tare eins bium Xe RR Wa Ria rU ERAT eee 89 Dell OVEINIEW EE LEE 89 6 PowerDomainS rr 6 S ESSE E ER NAT Per 91 6 1 QVerVIEW oec ce er DX PESE EE hr CERTE ER VER Er DRE o e RE ORE EE 91 6 2 Power Controlling Se
28. CD2 125 100M C SDREF2 P ut out ut CD2 125 100M C SDREF2 J 3 CD2 3 CD2 V12 CD2 V12 CD2 V12 3 CD2 3 CD2 V12 ks COMX P40x0 ENP2 Installation and Use 6806800R95C 63 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Net Name COMX Notes CPU_EMI2_MDC LP_TMP_DET_BAT SERDES_TX20_P SERDES_TX20_N Te en e m fee SERDES_TX21_N GND SERDES_TX22_SATA 1_P B72 SERDES_TX22_SATA 1_N N C SERDES_TX23_SATA 2_P SERDES_TX23_SATA 2_N LBC_WEO_N LBC_LA lt 16 gt LBC_LA lt 17 gt CD2 B80 GND CD2 B81 LBC_CTL_N CD2 B82 LBC CS4 N CPU IRQ4 CD2 B84 GND 64 COMX P40x0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector ref Connector name Pin Net Name GND Direction from COMX CD2 B8 IOEXT GPI8 in CD2 B8 CD2 B88 CPU GPOO out CD2 B89 CPU GPO1 out 3 3 3 E E E 3 J 5 6 7 0 1 2 3 GN GND D 2 out out CD2 B9 CD2 B9 CD2 B9 CD2 B94 CPU 4 CD2 B95 IOEXT_GPO6 CD2 B97 CPU TMP cpu temp N detect
29. Deploy BSP Images This section explains how to deploy BSP images Assuming that you have built a BSP release package COMX P4080 V100B00 tar gzbyrunning build sh V100B00 located at local tmp 7 22 1 Pre Deployment Steps The following steps must be performed before deployment 1 Connectthe board to your network using a network cable to the RGMII Ethernet port 2 Setup a TFTP server in this network Assuming that the IP address of this server is 192 168 0 100 and the root directory is t tpboot Create a p4080 in tftpboot subdirectory 4 the COMX P4080 Version Number tar gzfileinto the directory tftpboot comx p4080 TFTP server 5 Change current directory to t tpboot comx p4080 6 Extractthe tar gz file to current directory The following files are extracted to the COMX P4080 V100B00 comx dtb rcw bin rcw codewarrior bin rootfs ext2 img rootfs nfs tar gz 40 0 ENP2 Installation and Use 6806800R95C 127 BSP ulmage fsl_fman_ucode_P3_P4 P5 101 8 bin u boot bin 7 Extract the rootf s nfs tar gzfiletothe t tpboot comx p4080 location usingthe sudo tar xzvf COMX P4080 V100B00 rootfs nfs tar gz 8 Add tftpboot comx p4080 rootfs nfs toNFS exports listin etc exports tftpboot comx p4080 rootfs nfs rw sync no root squash 9 Restart NFS service to export t ftpboot comx_p4080 rootfs_nfs using the sudo sbin
30. dTSEC1 dTSEC2 dTSEC3 1GE dTSEC4 10GE 10GEC1 Frame Manager 1 FM1 EMI2 1 2V COMX P40x0 ENP2 Installation and Use 6806800R95C 83 Functional Description 4 13 4 14 4 15 4 16 4 17 84 PHY The dTSEC1 interface of FM1 is connected to a BCM5482 Ethernet PHY via RGMII on boards with the 1GE option There are two ports included in the PHY but only the first port is used The address for the first port is 0x01 and the second is 0x02 The addresses for 4 SGMII PHYs 0 1 Ox1D 0 1 and 0x1F when SerDes option 5 6 or 10 is applied or options 7 or 8 when Bank3 is enabled UART Interface The P40x0 CPU provides up to four UART ports Tx and Rx signals or up to two UART ports with hardware flow control Tx Rx RTS and CTS signals The COMX P40x0 ENP2 module is configured by default to route four UART ports to the COM Express connector Real Time Clock The is implemented by an ST Micro M41T62LC6F device It is accessed over 12C bus 2 of the P40x0 CPU at address OxDO RTC provides 32 KHz clock output to the CPU for timekeeping and is supplied by the VCC_BAT pin on the COM Express connector Watchdog Timer The watchdog timer is implemented by an ST Micro M41T65Q65 device It is accessed over I2C bus 1 of the P40x0 CPU at address OxDO The watchdog timer is capable of generating a power on reset and interrupt to the CPU USB Th
31. is the interface between the P40x0 MAC and external PHY This interface is multiplexed with the USB1 ULPl interface so modules with the gigabit Ethernet option should set RCW EC1 to 00 to select RGMII operation COMX P40x0 2 Installation and Use 6806800R95C 81 Functional Description 4 12 1 82 MDIO There are two groups of MDIO buses in the P40x0 CPU The first group called EMI1 complies with IEEE 802 3 Clause 22 and is used for management of the 1Gb Ethernet connection on modules with that option and management of SerDes interfaces configured as SGMII EMIT has two pins EMI1 MDC and 1 MDIO AlldTSEC interfaces in the P40x0 CPU share the same management hardware External PHY access for all ports is available through the dTSEC1 registers of FM1 EMIT is based on 2 5 V signaling levels 40 0 ENP2 Installation and Use 6806800R95C Functional Description The second group is called EMI2 which complies with IEEE 802 3ae Clause 45 and is used for management of SerDes connections configured for 10GE XAUI 2 has two pins EMI2_MDC 2 External PHY access is performed through the registers of FM1 EMI2 is based on 1 2V signaling levels Figure 4 7 Routing P40x0 CPU USB ULPI COM Express Connectors Ethernet PHY 1000BASE T 1GE BCM5482 dTSEC1 1GE dTSEC2 MDC MDIO 1GE dTSEC3 1GE dTSEC4 10GE 10GEC1 Frame Manager 2 FM2
32. shut down may cause corruption of data or file systems 16 COMX P40x0 ENP2 Installation and Use 6806800R95C Safety Notes Make sure all software is completely shut down before removing power from the board or removing the board from the chassis Product Damage Only use injector handles for board insertion to avoid damage to the front panel and or PCB Deformation ofthe front panel can cause an electrical short or other board malfunction Product Damage Inserting or removing modules with power applied may result in damage to module components Before installing or removing additional devices or modules read the documentation that came with the product Cabling and Connectors Product Damage RJ 45 connectors on modules are either twisted pair Ethernet TPE or E1 T1 1 network interfaces Connecting E1 T1 1 line to an Ethernet connector may damage your system e Make sure that TPE connectors near your working area are clearly marked as network connectors e Verify that the length of an electric cable connected to a TPE bushing does not exceed 100 meters e Make sure the TPE bushing of the system is connected only to safety extra low voltage circuits SELV circuits If in doubt ask your system administrator 40 0 ENP2 Installation and Use 6806800R95C 17 Safety Notes Battery Board System Damage Incorrect exchange of lithium batteries can result in a hazardous explosion When exchanging the onboar
33. the GPCM on local bus and works with 16 bit data width is either 1 MB and has 1024 uniform blocks of 128 K or 64 K words each The 36 bit physical TFIR2 and GB or 128 address of NOR Flash is OxFE8000000 OxFEFFFFFFF Boot up message in U Boot is FLASH 128 MiB NOR Flash supports the following commands md cp cmp protect and erase Table 7 6 NOR Flash Command Usage protect on start end Protects flash from address start to address end protect on start len Protects flash from address start to end of section with address start len 1 protect on all Protects all flash banks Makes flash from address start to address end writable protect off start len Makes flash from address start to end of section with address start len 1 writable protect off all Makes all flash banks writable erase start end Erases flash from address start to address end erase start len Erases flash from address start to the end of section with address start len 1 The following is a NOR Flash operation example that upgrades the U Boot tftpboot loadaddr Subootfile protect off Oxeff00000 11 erase Oxeff00000 Sfilesize Sloadaddr Oxeff00000 Sfil protect Oxeff00000 Sfilesize COMX P40x0 ENP2 Installation and Use 6806800R95C lesize lesize 109 BSP 7 14 7 15 110 NAND Flash NAND Flash is Numonyx NANDO8GW3B2CNGE which is 1 GB in size I
34. 000 1 MB NAND Flash Buffer 15 00 0000 FE00 0000 0100 0000 16 MB CCSR 16 FFFF F000 0 FFFF F000 0000 1000 4 KB Boot Page U Boot uses the following commands to display and modify the contents of the 4 GB effective on address space Note that b w and l means the operation unit as byte word and respectively md mm mm b w 1 address nm memory modify constant address nm b address cp cp b I source target count cmp Memory display md b 1 address of objects memory modify auto incrementing address this command copies data from one place to another this command compares two data in different places cmp b addr1 addr 2 count COMX P40x0 ENP2 Installation and Use 6806800R95C 105 BSP 7 10 DDR3 SDRAM 7 11 106 The COMX P4080 module has two fully programmable DDR3 SDRAM controllers Amaximum of 2 GB SDRAM are mapped in U Boot If more than 2 GB SDRAM is fitted the remaining sections are left unmapped With Linux up to 4 GB SDRAM can be verified Do not modify the contents of the lowest 1 MB and the top 1 MB RAM in the U Boot Both areas are used to store critical data by U Boot When the U Boot detects the DDR3 SDRAM during boot up the following message appears DRAM Initializing 2 GB left unmapped DDR 4 GB DDR3 64 bit CL 9 ECC on DDR Controller Interleaving Mode cac
35. 080 P4040 When the junction temperature reaches105 9 the ADT741 1 drives INT low to indicate an interrupt to the CPU The red LED D17 shows the interrupt status Definition Status Description D17 INT signal is active The CPU temperature has reached 105 C COMX P40x0 2 Installation and Use 6806800R95C 75 Functional Description 4 8 4 8 1 76 Main Memory Memory Interface The 40 0 processor supports two individual DDR channels that are configured for DDR3 operation at 600 MHz or 1200 MT s Each channel consists of 64 bit data and 8 bit ECC The module supports either 1 GB or 2 GB of on board memory per channel for a total of 2 GB or 4 GB Each memory bank consists of 9 memory chips of 8 bits with each bank located on opposite sides of the board The SDRAM package height is maximum of 1 2 mm The following figure illustrates the DDR memory architecture per controller Figure 4 5 Memory Interface P40x0 CPU DDR Channel 1 DDR3 1200 MT s DDR Channel 2 DDR3 1200 MT s 40 0 ENP2 Installation and Use 6806800R95C Functional Description 4 8 2 Memory Map The following table provides the U boot memory map ofthe COMX P40x0 ENP2 Table 4 4 Memory Map 32 bit Effective 36 bit Physical Address Base Address Base Address Size Description n 0 8000 0000 C 0000 0000 2000 0000 512 000 0000 2000
36. 1 25 Gbps XAUI FM1 3 125 Gbps XAUI FM1 3 125 Gbps 125 MHz 125 MHz 100 MHz 125 MHz 100 MHz 125 MHz 1 SerDes Bank2 and Bank3 are powered down by default by the RCW but are later enabled by the firmware 2 SerDes Bank 3 is unavailable in this configuration 3 SerDes reference clocks must be properly configured by the carrier or CPU GPIO pins for the selected interfaces to work See Clock Structure section for clock settings 4 Only SerDes lane 14 is routed to Slot 2 COMX P40x0 2 Installation and Use 6806800R95C 73 Functional Description The following figure illustrates the distribution of SerDes lanes on the module Figure 4 3 Distribution of SerDes Lanes P40x0 CPU Bank 1 SERDES Lanes 0 7 Lanes 8 9 Aurora est points Bank 2 SERDES Lanes 10 13 Bank 3 SERDES Lanes 14 17 Powered down COM Express Connectors SERDES 0 7 SERDES 16 19 SERDES 20 23 74 COMX P40x0 ENP2 Installation and Use 6806800R95C Functional Description 4 7 Thermal Management The COMX P40x0 ENP2 module provides a thermal management strategy This includes CPU junction temperature monitoring as shown in the following figure Figure 4 4 Module Thermal Management Thermal Diode Inside CPU Thermal Sensor a A thermal diode is integrated in the P40x0 which connects to a thermal sensor ADT7411 The CPU can get the junction temperature via I2C P4
37. 100 7 6 9 2252 ee avid de aA XY IRE EYE 101 7 7 Checking the BSP Version 4 2 102 1 8 CPU sn near es ee bee esse eee eats es 103 7 9 Address Space 2 0 E ORE PIU A aan nee 104 7 10 5 255 ves Geeta teh ei nad 106 MESH 106 TAZ AME EET 108 7 13 INOR Flash 222 bore es Bst rr UR Dan in as 109 7 14 Flash eee he ue ee ERR ea I lat 110 7 15 m 110 7 15 1 ID EEPROM ee ee Red 112 7 15 2 113 7 15 3 Real Time Clock RTC and Watchdog Timer WDT 114 7 15 4 DIE u ka ms sa ee 115 7316 nei ae a Den 115 2 17 MME SDHC ee een 116 y MET 117 PVG SOND ILE 118 COMX P40x0 ENP2 Installation and Use 6806800R95C 5 Contents 1 20 ea ae er EN 120 7 21 Build BSP lmages cbe eer RE YE D ERI CCR UIT Rr E E ERE E D ER SS 124 oro 125 7 21 2 Build 2 2 4 125 7 21 3 Build ROOTES aud aera 126 7 21 4 Build Misc 2 2 2 24 127 7 22 Deploy BSP limaqes tire RR endear
38. 12C1 Expander JoPaUuU0g 5 GPO6 GPO7 GPI1 GPI3 9 o z m x S o e 5 5 5 8 5 9 Table 4 6 GPIO GPOO GPO1 GPO3 GPO4 PCA955NAME GPIO NAME COMX PLUG PIN 100 GPI5 CD A91 101 GPI6 CD A95 102 GPI7 CD A97 103 GPI8 CD B85 104 GP05 CD B91 105 GPO6 CD B95 40 0 2 Installation and Use 6806800R95C Functional Description 4 10 4 11 4 12 Table 4 6 GPIO PCA955NAME GPIO NAME COMX PLUG PIN 106 GPO7 CD B101 107 GPO8 CD B102 SDHC The COMX P40x0 ENP2 module provides an SD MMC interface to the COM Express connector to support expansion card options on the carrier board This module not only supports SD card but also Micro SD card in which there is no write protect signal COM Express connector B57 is used to define whether an SD card or Micro SD card is populated on the carrier board Table 4 7 SD or Micro SD card on the Carrier COM Express pin B57 Card on the carrier 0 Default Micro SD card SPI Interface The COMX P40x0 ENP2 module provides a SPI bus from the P40x0 CPU with 4 chip select signals All SPI bus signals are routed to COM Express connectors LAN The modules with gigabit Ethernet options route a port with LED control signals to the COM Express connector The supporting magnetics must be on the carrier board RGMII
39. 192 168 0 91 255 255 255 0 192 168 0 1 192 168 0 100 7 6 3 Filename Variables for BSP Components Filename Variables for BSP Components setenv rcwfile comx_p4080 COMX_P4080_V100R00 rcw bin setenv fmanfile comx_p4080 COMX_P4080_V100R00 fsI_fman_u code_P4080_101_6 bin setenv bootfile comx_p4080 COMX_P4080_V100R00 ulmage setenv norfsfile comx_p4080 COMX_P4080_V100R00 rootfs_ext2 img setenv fdtfile comx p4080 COMX P4080 V100R00 comx dtb setenv ubootfile comx p4080 COMX P4080 V100RO00 u boot bin setenv nandfsfile comx p4080 COMX P4080 V100RO0 rootfs jffs2 nand setenv rootpath tftpboot comx_p4080 rootfs_nfs 98 40 0 ENP2 Installation and Use 6806800R95C BSP 7 6 4 Address Variables for BSP Components NOR Flash Address Variables for BSP Components on NOR Flash norrcwaddr Default is E8000000 norfmanaddr Default is E8200000 norfsaddr Default is E9000000 norbootaddr Default is EE000000 norfdtaddr Default is EFD00000 norubootenvaddr Default is EFEE0000 norubootaddr Default is 00000 7 6 5 Address Variables for the Boot Components in RAM Address Variables for the Boot Components in RAM loadaddr Default is 1000000 fdtaddr Default is CO000 ramdiskaddr Default is 2000000 7 6 6 Device Variables Device Variables setenv ethact FM1 DTSEC1 setenv netdev ethO setenv uart 0 setenv consoledev ttySO COMX P40x0 ENP2 In
40. 6806800R95C 71 Functional Description 4 5 3 4 6 72 NAND FLASH NAND FLASH is a Micron MT29F8GO8ADADAH4 with a size of 8 Gb 1 GB Each page contains 2112 bytes including 2048 bytes of data and 64 bytes of spare Each block contains 64 pages including 128 KB of data 4 of spare There are a total of 8192 blocks As shipped the NAND FLASH is only used as NAND FLASH JFFS2 rootfs The map is described as below table Table 4 2 NAND FLASH Map Start Address End Address Size Description 0000 0000 OOFF FFFF 16 MB 0100 0000 3FFF FFFF 1GB 16 MB NAND FLASH JFFS2 rootfs SerDes Block The 4040 4080 processor provides three banks of SerDes with a total of 18 lanes Bank 1 routes eight lanes to the COM Express connector as SerDes 0 7 Bank 2 routes four lanes to the COM Express connector as SerDes 16 19 Bank 3 also routes four lanes to the COM Express connector but is unused for this module Bank 1 provides two additional SerDes lanes on board for CPU debugging through the Aurora interface See note in the Overview on page 25 40 0 ENP2 Installation and Use 6806800R95C Functional Description The protocol running on each lane or group of lanes routed to the COM Express connector is configured by the RCW Available options are shown in the following table slot numbers refer to COMX CAR P1 PCI Express connector slots Table 4 3 Options of the SerDes routed to COM Express Connecto
41. 800R99 COMX P40x0 ENP2 Installation and Use 6806800R95C 137 Related Documentation Te re 138 COMX P40x0 ENP2 Installation and Use 68068006956 A mS Z wm Eu EMBEDDED TECHNOLOGIES Artesyn Embedded Technologies Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners 2015 Artesyn Embedded Technologies Inc
42. COMX P40x0 2 Installation and Use P N 6806800R95C January 2015 Copyright 2015 Artesyn Embedded Technologies Inc All rights reserved Trademarks Artesyn Embedded Technologies Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies Inc 2015 Artesyn Embedded Technologies Inc All other product or service names are the property of their respective owners Intel is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States and other countries Java and all other Java based marks are trademarks or registered trademarks of Oracle America Inc in the U S and other countries Microsoft Windows and Windows Me are registered trademarks of Microsoft Corporation and Windows is a trademark of Microsoft Corporation PICMG CompactPCI AdvancedTCA and the PICMG CompactPCI and AdvancedTCA logos are registered trademarks of the PCI Industrial Computer Manufacturers Group UNIX is a registered trademark of The Open Group in the United States and other countries Notice While reasonable efforts have been made to assure the accuracy of this document Artesyn assumes no liability resulting from any omissions in this document or from the use of the information obtained therein Artesyn reserves the right to revise this document and to make changes from time to time in the content hereof without obligation o
43. CT to the parallel mode pins The RGMII port is always present in all of the twelve SerDes RCW options Table 7 9 Network Ports Naming Rules in U Boot FM1 Network Ports a Port 0 the RGMII port is named as FM1 DTSEC1 FM2 Network Ports a Port 0 is named as FM2 DTSECI Port 1 is named as FM2 DTSEC2 Port 2 is named as FM2 DTSEC3 Port 3 is named as FM2 DTSEC4 Port 4 is named as FM2 TGEC1 COMX P40x0 2 Installation and Use 6806800R95C BSP With one SGMII Riser Freescale one XAUI Rise Freescale two PRO 1000 Server Adapter Intel the valid combinations of network ports among the twelve SerDes RCW options are listed in Table Valid Network Ports Combination of SerDes RCW on page 121 Refer to Table Options of the SerDes routed to COM Express Connectors on page 73 for the corresponding information on SerDes 0 3 SerDes 4 7 and SerDes 10 13 for each option Table 7 10 Valid Network Ports Combination of SerDes RCW PRO 1000 PRO 1000 Option Onboard SGMII Riser XAUI Riser dual port 1 dual port 2 FM1 DTSEC1 X SLOT J10 SLOT J6 SLOT J14 FM2 DTGEC1 e1000 0 e1000 2 e1000 1 1000 3 FM1 DTSEC1 X SLOT J10 SLOT 6 SLOT J14 FM2 DTGEC1 e1000 0 e1000 2 e1000 1 e1000 3 FM1 DTSEC1 X SLOT J10 SLOT J6 SLOT J14 FM2 DTGEC1 e1000 0 1000 2 e1000 1 e1000 3 FM1 DTSEC1 X SLOT J10 SLOT J6 SLOT J14 FM2 DTGEC1 e1000 0 1000 2 e1000 1 e1000 3 FM1 DTSEC1 SLOT J14
44. Changes or modifications not expressly approved by Artesyn Embedded Technologies could void the user s authority to operate the equipment Board products are tested in a representative system to show compliance with the above mentioned requirements A proper installation in a compliant system will maintain the required performance Use only shielded cables when connecting peripherals to assure that appropriate radio frequency emissions compliance is maintained Operation Product Damage High humidity and condensation on the board surface causes short circuits Do not operate the board outside the specified environmental limits Make sure the board is completely dry and there is no moisture on any surface before applying power Damage of Circuits Electrostatic discharge and incorrect installation and removal can damage circuits or shorten their life Before touching the board or electronic components make sure that you are working in an ESD safe environment Board Malfunction Switches marked as reserved might carry production related functions and can cause the board to malfunction if their setting is changed Do not change settings of switches marked as reserved The setting of switches which are not marked as reserved has to be checked and changed before board installation Installation Data Loss Powering down or removing a board before the operating system or other software running on the board has been properly
45. Des bank 2 3 reference clock select pin B98 on COM Express Bank1_SEL_FSO 0 100 MHz Bank2_SEL_S1 0 100 MHz COMX P40x0 2 Installation and Use 6806800R95C 89 Clock Structure Table 5 1 Configuration of the frequency of SerDes reference clock by carrier continued SerDes bank 1 reference clock select pin B97 on SerDes bank 2 3 reference clock select pin B98 COM Express on COM Express Bank1_SEL_FSO 1 125 MHz Bank2 SEL 171 125 MHz Default 100 MHz Default 125MHz Table 5 2 Configuration of the frequency of SerDes reference clock by GPIO SerDes bank 1 reference clock SerDes bank 2 reference clock CPU GPIO23 0 100 MHz CPU GPIO24 0 100 MHz CPU GPIO23 1 125 MHz CPU GPIO24 1 125 MHz Default 100 MHz Default 125 MHz 90 40 0 ENP2 Installation and Use 6806800R95C Chapter 6 Power Domains sw 6 1 Overview This subsection describes the power supply system for the module 12 V Power is supplied to module from ATX type using Artesyn carrier power supply through COM Express connectors and on board regulators supply required voltages to devices on the module Figure 6 1 Power Tree 0 75 1 2A p 5V 08 POVDO QNO AGI COMX P40x0 ENP2 Installation and Use 6806800R95C 91 Power Domains 6 2 Power Controlling Sequence The power sequencing of the COMX P40x0 2 differs between secure boot mode and secure boot mode For secure b
46. FORM power OK 1 5 V power OK USB hub 2 active USB hub 2 high speed D1 02 D15 D16 are for modules with USB port options COMX AB CD Connectors The following table lists the pinout of the AB CD COMX connectors for the P40x0 COMX modules Table 3 4 COMX AB CD Connectors Connector Connector Direction from ref name Pin Net Name COMX Notes Bj ENEMOENGS COMX P40x0 2 Installation and Use 6806800 95 47 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes A3 LAN1_MDI_P lt 3 gt bidir LAN1_LINK100_N Lan1 link 100 active low LAN1_LINK1000_N lan1 link 1000 active low LAN1_MDI_N lt 2 bidir lt 2 LAN1_LINK_N out from LAN1_MDI_N lt 1 gt LAN1_MDI_P lt 0 gt V1P8_CTRL out from comx 1 8v power indicator ABI A21 GND 12 1 22 1 23 48 COMX P40x0 2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector ref name Pin Net Name Direction from Notes N C LBC CS KEY Power ON Enable Local Bus Control Chipselect COMX P40x0 ENP2
47. Gb 256 MB It has 2048 uniform blocks 128 KB or 64 K words each 70 COMX P40x0 ENP2 Installation and Use 6806800R95C Functional Description The physical address for the NOR FLASH is OXFE0000000 OxFEFFFFFFF The NOR FLASH contains RCW data U Boot image U Boot environment variables kernel image device tree blob RAMDISK image and FMAN ucode image The detailed map is described in the followin Table 4 1 NOR FLASH Map g table 0 1 0000 0000 0001 FFFF 128 KB Active RCW Option Data 0002 0000 0003 FFFF 128 KB RCW Option Data 1 0004 0000 0005 FFFF 128 KB RCW Option Data 2 1 0006 0000 0007 FFFF 128 RCW Option Data 3 1 000C 0000 000D FFFF 128 RCW Option Data 6 1 000E 0000 000 FFFF 128 RCW Option Data 7 0010 0000 0011 FFFF 128 KB RCW Option Data 8 0012 0000 0013 FFFF 128 KB RCW Option Data 9 1 0014 0000 0 1 11 1 0016 0000 0017 FFFF 128 KB 12 1 0018 0000 0015 FFFF 128 KB 0019 FFFF 128 KB RCW Option Data 10 RCW Option Data 11 RCW Option Data 12 13 3 001A 0000 0020 0000 384KB Not Used 16 0020 0000 OOFF FFFF 14 MB FMAN ucode Image 0100 0000 OEFF FFFF 224MB RAMDISK Image 1920 120 OF00 0000 OFEF FFFF 15 Kernel Image 2040 3 OFFO 0000 OFF5 FFFF 384 KB Device Tree Blob 2043 1 OFF6 0000 OFF7 FFFF 128 KB U Boot Env Variable 2044 4 OFF8 0000 OFFF FFFF 512 U Boot Image COMX P40x0 ENP2 Installation and Use
48. Installation and Use 6806800R95C 49 Controls LEDs and Connectors 50 Table 3 4 COMX AB CD Connectors continued Connector Connector ref name Pin 1 48 Net Name USB2_PWREN Direction from Notes 47 3 3vbattery power AB1 A49 USBO PWREN 1 50 USB5_PWREN GND 2 4 CPU SDHC DATO 2 1 51 2 1 5 ut B1 5 1 55 SERDES_TX4_P 1 56 SERDES_TX4_N out 7 A A A A J 6 G GN bidir B B1 5 B1 A5 2 B1 A ND _ out _1X5_ out D A 8 A 0 GND LAN1_ACTIVITY_N B3 TSEC_1588_CLK_OU out T TSEC_1588_PULSE_ OUTI out lan activity B6 J2 1 7 TSEC_1588_PULSE_ OUT2 TSEC_1588_ALARM_ OUTI 1588 ALARM OUT2 out out 40 0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes B8 TSEC_1588_TRIG_IN TSEC_1588_TRIG_IN 2 TSEC_1588_CLK_IN1 WDT_OUT_N Watch dog Timer Out LBC_WE1_N P40x0 local bus LWE1_N COMX P40x0 ENP2 Installation and Use 6806800R95C 51 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction f
49. ME_SDREF1_P CLK_125M_100M_C OME_SDREF1_N GND CPU_SPI_CSO_K_N 92 CPU SPI MISO A93 CPU SDHC CLK CPU SPI CLK COME CPU SPI MOSI A106 V12 54 40 0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Net Name COMX Notes SERDES_RX2_P 2 2 62 SERDES_RX2_N AB2 CPU_SDHC_CD SERDES_RX1_P SERDES_RX1_N N C CPU_HRESET_COME 1 Only used N on P4080 2G assembly SERDES RXO P SERDES 12 2 B79 COMX P40x0 2 Installation and Use 6806800 95 55 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes CPU_IIC4_CLK CPU_IIC4_DAT BANK1_SEL_FSO 2 2 98 2 SEL 51 2 BANK3_SEL_S1 56 COMX P40x0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector ref name B106 B107 Net Name Direction from Notes LAN2_MDI_N lt 3 gt LAN2_MDI_P lt 3 gt LAN2_LINK100_N LAN2_MDI_N lt 2 gt A7 LAN2_MDI_P lt 2 gt bidir 8 LAN2_LINK1000_N LAN2_MDI_N lt 1 gt LA
50. N2_MDI_P lt 1 gt GND LAN2_MDI_N lt 0 gt LBC_LAD lt 8 gt LBC_LAD lt 9 gt LBC_CLE_N LBC_FCMALE_N COMX P40x0 ENP2 Installation and Use 6806800R95C 57 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector ref Connector name Pin CD1 A2 CD1 A2 CD1 A2 Net Name Direction from COMX SERDES RX7 P in in SERDES CD1 A24 N C CD1 A25 LBC LAD 10 3 3 3 3 3 3 3 J J J J 3 7 CD1 A26 CD1 A29 LBC_LAD lt 11 gt LBC_LAD lt 14 gt CD1 A30 LBC LAD 15 CD1 A3 GND CD1 CD1 CD1 CD1 A32 A 3 A3 CPU UART1 SOUT out t CPU UART1 SIN in CPU UARTI1 CTS ou CPU UARTI RTS in Not used CD1 A36 CPU 2 SOUT out CD1 A37 CPU 2 SIN in J J J 2 8 5 8 1 1 1 CPU_UART2_CTS 3 CD1 3 3 CD1 4 GND out Not used in CD1 A42 CPU UART3 SOUT CD1 A43 CPU UART3 SIN J3 CD1 4 CD1 A45 3 CDI 4 58 A44 N C COMX P40x0 ENP2 Installation and Use 6806800R95C Controls LEDs Connectors Table 3 4 COMX AB CD Connectors continued Connector ref n Net Name Direction from COMX Pi CD1 A47 CPU UARTA SIN CD1 4
51. SK image U Boot and DTB on NOR FLASH individually Example gt run updrcw run updfman run updkernel run updnorfs run updfdt run upduboot Erase previous U Boot environment settings usingthe gt run Reset the board usingthe gt reset command The board will boot up with new BSP 7 23 Boot COMX P40x0 ENP2 provides the following boot methods RAMboot NORboot NANDboot NFSboot USBFATboot and USBEXT2boot MMCFATboot and MMCEXT2boot COMX P40x0 2 Installation and Use 6806800R95C 129 BSP 7 23 1 130 Common device environment variables in U Boot include the following uart and consoledev 0 ttySO 1 ttyS1 2 12 3 ttyS3 ethact and netdev RAMboot COMX P40x0 ENP2 has a U Boot variable called ramboot setenv bootargs root dev ram rw console Sconsoledev Sbaudrate Shwbootargs Sothbootargs tftp ramdiskaddr Sramdiskfile tftp Sloadaddr Sbootfile tftp Sfdtaddr fdtfile bootm loadaddr Sramdiskaddr fdtaddr ramboot will first load RAMDISK Linux kernel and DTB into RAM through network by TFTP then boot The following are the critical environment variables for ramboot ethact Active ethernet port ramdiskfile RAMDISK file name on TFTP server bootfile Linux kernel file name server fdtfile DTBfile name on TFTP server 40 0 2 Installation and Use 6806800R95C BSP 7 23 2 7 23 3 The following
52. SLOT J10 SLOT J6 X FM2 DTSECI FM2 DTGEC1 1000 0 FM2 DTSEC2 e1000 1 FM2 DTSEC3 FM2 DTSEC4 FM1 DTSEC1 SLOT J14 SLOT J10 SLOT J6 X FM2 DTSECI FM2 DTGEC1 e1000 0 FM2 DTSEC2 e1000 1 FM2 DTSEC3 FM2 DTSEC4 FM1 DTSEC1 X X SLOT J6 X 1000 0 e1000 1 COMX P40x0 2 Installation and Use 6806800R95C 121 BSP 122 Table 7 10 Valid Network Ports Combination of SerDes RCW continued PRO 1000 PRO 1000 Option Onboard SGMII Riser XAUI Riser dual port 1 dual port 2 FM1 DTSEC1 X X SLOT 6 X 1000 0 e1000 1 FM1 DTSEC1 X SLOT J10 X X FM2 DTGEC1 FM1 DTSEC1 SLOT J10 X X X FM2 DTSEC1 FM2 DTSEC2 FM2 DTSEC3 FM2 DTSEC4 FM1 DTSEC1 X SLOT J10 SLOT J6 X FM2 DTGEC1 e1000 0 e1000 1 FM1 DTSEC1 X SLOT J10 SLOT J6 X FM2 DTGEC1 e1000 0 e1000 1 During Linux boot up every network port is named ethX by default UDEV rules allowit to be changed by the user The inthe name is important for the nfsboot For more information see Chapter 7 Boot on page 129 To locate the X in the ethX refer to the list below A U N FM2 DTSEC1 FM2 DTSEC1 FM2 DTSEC2 FM2 DTSEC3 FM2 DTSEC4 FM2 TGEC1 COMX P40x0 2 Installation and Use 6806800R95C BSP 6 e1000 0 7 1000 1 8 1000 2 9 e1000 3 If certain frame manager network port or ports are not valid for the specified SerDes RCW option the X for the lower valid network
53. SRIOx4 4x SGMI PCle x 4 4 x SGMII x SGMII XAUI NOR NAND Flash Flash Processor Core Cache Memory Complex The QorlQ P4080 P4040 processor has eight four high performance 32 bit Power Architecture Book E compliant e500mc cores Each e500mc is a superscalar dual issue processor that supports out of order execution and in order completion thus making it perform better than other RISC and CISC architectures 40 0 ENP2 Installation and Use 6806800R95C 4 4 4 5 Functional Description Features of e500mc 36 bit physical addressing 512 entry 4 KB pages e 3 Integer units 2 simple 1 complex 1 2GHz at 1 0V 64 Byte cache line size e 11 caches User Supervisor Hypervisor instruction level privileges APU classic double precision floating point unit e 128 KB private L2 cache running at the same frequency of CPU e 2MBofsharedL3 CoreNet platform cache Integrated Memory Controller The P4080 P4040 processor integrates two DDR controllers that support DDR2 and DDR3 SDRAM It can support a maximum of 64 GB of main memory ENP2 modules are limited to 8 GB using 4 Gb devices The ECC capability detects all double bit errors detects all multi bit errors within a nibble and corrects all single bit errors The DDR controller is capable of self refresh mode and an initialization bypass during system power on after an abnormal shutdown for use by designers in preve
54. X P4080 4G E ENP2 2 2 39 Table 3 1 P4080 COP 2 45 Table 3 2 P4040 COP 46 Table 3 3 Mod le LED Status ea ae 47 Table 3 4 COMX AB CD Connectors susci er ra rr RR E a ne 47 Table 4 1 NOR FLASHED nu 71 Table 4 2 nen 72 Table 4 3 Options of the SerDes routed to COM Express Connectors 73 Table 4 4 Memory 77 Table 4 5 78 Table 4 6 80 Table 4 7 SD or Micro SD on the Carrier 81 Table 4 8 12 Interface seen reihe MM 86 Table 5 1 Configuration of the frequency of SerDes reference clock by carrier 89 Table 5 2 Configuration of the frequency of SerDes reference clock by 90 Table 7 1 Basic 0 2 93 Table 7 2 BSP Source Code Package Layout 96 Table 7 3 4080 Address Space
55. are authorized to install remove or maintain the product The information given in this manual is meant to complete the knowledge of a specialist and must not be used as replacement for qualified personnel Keep away from live circuits inside the equipment Operating personnel must not remove equipment covers Only Factory Authorized Service Personnel or other qualified service personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not install substitute parts or perform any unauthorized modification of the equipment or the warranty may be voided Contact your local Artesyn representative for service and repair to make sure that all safety features are maintained This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications COMX P40x0 ENP2 Installation and Use 6806800R95C 15 Safety Notes Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense
56. carrier locate five screws that connect the module assembly to the carrier board 2 Loosen and remove the screws 3 While holding the edges pull the module from the carrier board COMX P40x0 ENP2 Installation and Use 6806800R95C 41 Hardware Preparation and Installation The figure below illustrates the screw holes for mounting the module on carrier board Figure 2 1 Mounting Module on Carrier Board ea m 24 00 10 4 8PL MOUNTING HOLES 243 84 237 49 3PL COM E CARRIER CONNECTOR MECHANICAL PEG HOLE 116 08 80 01 3pl 34 29 13 97 0 00 8 amp e ze 8 8 25 T This installation removal procedure is only for reference Assemble the heatsink and the 1 7 module based on your own thermal solution 42 40 0 ENP2 Installation and Use 6806800R95C Hardware Preparation and Installation Heat sink Installation Note Be sure to follow the manufacturer s direction for proper heatsink heatspreader installation and any other cooling instructions from the manufacturer The following figures illustrate the heat sink installation on the module Figure 2 2 Heat sink installation COMX P40x0 2 Installation and Use 6806800R95C 43 Hardware Preparation and Installation Heat sink installation continued Figure 2 2 COMX P40x0 2 Installation and Use 6806800R95C 44 Chapter 3 Controls LEDs Connectors
57. d lithium battery make sure that the new and the old battery are exactly the same battery models Ifthe respective battery model is not available contact your local Artesyn sales representative for the availability of alternative officially approved battery models Data Loss Exchanging the battery can result in loss of time settings Backup power prevents the loss of data during exchange Quickly replacing the battery may save time settings Data Loss Ifthe battery has low or insufficient power the RTC is initialized Exchange the battery before seven years of actual battery use have elapsed PCB and Battery Holder Damage Removing the battery with a screw driver may damage the PCB or the battery holder To prevent damage do not use a screw driver to remove the battery from its holder Environment 18 Environmental Damage Improperly disposing of used products may harm the environment Always dispose of used products according to your country s legislation and manufacturer s instructions COMX P40x0 ENP2 Installation and Use 6806800R95C Sicherheitshinweise EN Dieses Kapitel enth lt Hinweise die potentiell gef hrlichen Prozeduren innerhalb dieses Handbuchs vorrangestellt sind Beachten Sie unbedingt in allen Phasen des Betriebs der Wartung und der Reparatur des Systems die Anweisungen die diesen Hinweisen enthalten sind Sie sollten au erdem alle anderen Vorsichtsma nahmen treffen die f r den Betrieb des Produkt
58. e Reset Control Word Real Time Clock Serial Presence Detect Serial Peripheral Interface Serial AT Attachment serial interface standard for hard disks Single Board Computer SDHC Secure Digital High Capacity UART Universal Asynchronous Receiver and Transmitter WDT Watch Dog Timer Conventions 12 The following table describes the conventions used throughout this manual Notation Description 0x00000000 Typical notation for hexadecimal numbers digits are O through F for example used for addresses and offsets 060000 Same for binary numbers digits 0 1 bold Used to emphasize a word Screen Used for on screen output and code related elements or commands in body text Courier Bold Used to characterize user input and to separate it from system output Reference Used for references and for table and figure descriptions File gt Exit Notation for selecting a submenu COMX P40x0 2 Installation and Use 6806800R95C About this Manual Notation lt text gt text Description Notation for variables and keys Notation for software buttons to click on the screen and parameter description Repeated item for example node 1 node 2 node 12 Omission of information from example command that is not necessary at the time being Ranges for example 0 4 means one of the integers 0 1 2 3 and 4 used in registers Logical OR
59. e COMX P40x0 ENP2 module has one USB port from the CPU connected through an USB ULPI PHY USB3315 to a four port hub USB2514 The four ports of the hub are routed to the COM Express connector The hub is hardware strapped to indicate all ports removable Two active low over current signals are received from the COM Express connector to the USB hub to indicate power faults USB OC 0 1 0 and 1 and USB_OC_2_3_N Port 2 and 3 COMX P40x0 ENP2 Installation and Use 6806800R95C Functional Description An optional fifth USB port can be provided from the CPU through a ULPI USB PHY USB3315 to the COM Express connector This is the default option for modules not providing the 1GE port since the two functions are multiplexed on the same CPU pins An active low over current signal USB_OC_4_5_N is provided from the COM Express connector to indicate a power fault on the fifth USB port It is routed as an interrupt to the CPU 4 18 12C Interface The P40x0 CPU has four I2C buses Among four I2C buses the 12C bus I2C3 is multiplexed with SDHC bus and remaining 12C buses are routed to the COM Express connectors There is only one device attached to the second I2C bus 12 2 and there 6 devices attached to the first I2C bus I2C1 COMX P40x0 ENP2 Installation and Use 6806800R95C 85 Functional Description The following figure illustrates the distribution of the I2C buses Figure 4 8 Distribution of I2C buses Generato
60. equirements 60950 1 CAN CSA C22 2 No 60950 1 UL CSA 60950 1 Legal safety requirements EN 60950 1 IEC 60950 1 CB Scheme 26 40 0 ENP2 Installation and Use 6806800R95C Introduction Table 1 1 Standard Compliances continued Standard FCC 47 CFR Part 15 Subpart B US Class A EN55022 Class A EU AS NZS CISPR 22 Class A Australia New Zealand Class A Japan CISPR 22 CISPR 24 EN55022 EN 55024 Description EMC requirements legal on system level predefined Artesyn system EMC Requirements on system level ETSI 300 019 Series Environmental Requirement Directive 2011 65 EU Directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment ROHS COMX P40x0 2 Installation and Use 6806800R95C 27 Introduction The following figure contains the declaration of conformity for COMX P40x0 Figure 1 1 Declaration of Conformity EC Declaration of Conformity According to EN 17050 1 2004 Manufacturer s Name Artesyn Embedded Technologies Embedded Computing Manufacturer s Address Zhongshan General Carton Box Factory Co Ltd No 62 Qi Guan Road West Shiqi District 528400 Zhongshan City Guangdong PRC Declares that the following product in accordance with the requirements of 2004 108 EC 2006 95 EC 2011 65 EU and their amending directives Product 40 2 Express Form Factor Proces
61. es innerhalb Ihrer Betriebsumgebung notwendig sind Wenn Sie diese Vorsichtsma nahmen oder Sicherheitshinweise die an anderer Stelle diese Handbuchs enthalten sind nicht beachten kann das Verletzungen oder Sch den am Produkt zur Folge haben Artesyn Embedded Technologies ist darauf bedacht alle notwendigen Informationen zum Einbau und zum Umgang mit dem Produkt in diesem Handbuch bereit zu stellen Da es sich jedoch um ein komplexes Produkt mit vielf ltigen Einsatzm glichkeiten handelt k nnen wir die Vollst ndigkeit der im Handbuch enthaltenen Informationen nicht garantieren Falls Sie weitere Informationen ben tigen sollten wenden Sie sich bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn Das System erf llt die f r die Industrie geforderten Sicherheitsvorschriften und darf ausschlie lich f r Anwendungen in der Telekommunikationsindustrie und im Zusammenhang mit Industriesteuerungen verwendet werden Einbau Wartung und Betrieb d rfen nur von durch Artesyn ausgebildetem oder im Bereich Elektronik oder Elektrotechnik qualifiziertem Personal durchgef hrt werden Die in diesem Handbuch enthaltenen Informationen dienen ausschlie lich dazu das Wissen von Fachpersonal zu k nnen dieses jedoch nicht ersetzen Halten Sie sich von stromf hrenden Leitungen innerhalb des Produktes fern Entfernen Sie auf keinen Fall Abdeckungen am Produkt Nur werksseitig zugelassenes Wartungspersonal oder anderweitig quali
62. esch tzten Bereich arbeiten Fehlfunktion des Produktes Schalter die mit Reserved gekennzeichnet sind k nnen mit produktionsrelevanten Funktionen belegt sein Das ndern dieser Schalter kann im normalen Betrieb St rungen ausl sen Verstellen Sie nur solche Schalter die nicht mit Reserved gekennzeichnet sind Pr fen und ggf ndern Sie die Einstellungen der nicht mit Reserved gekennzeichneten Schalter bevor Sie das Produkt installieren Installation Datenverlust Das Herunterfahren oder die Deinstallation eines Boards bevor das Betriebssystem oder andere auf dem Board laufende Software ordnungsmem ss beendet wurde kann zu partiellem Datenverlust sowie zu Sch den am Filesystem f hren Stellen Sie sicher dass s mtliche Software auf dem Board ordnungsgem ss beendet wurde bevor Sie das Board herunterfahren oder das Board aus dem Chassis entfernen Besch digung des Produktes Fehlerhafte Installation des Produktes kann zu einer Besch digung des Produktes f hren Verwenden Sie die Handles um das Produkt zu installieren deinstallieren Auf diese Weise vermeiden Sie dass das Face Plate oder die Platine deformiert oder zerst rt wird Besch digung des Produktes und von Zusatzmodulen Fehlerhafte Installation von Zusatzmodulen kann zur Besch digung des Produktes und der Zusatzmodule f hren Lesen Sie daher vor der Installation von Zusatzmodulen die zugeh rige Dokumentation 40 0 ENP2 Installation and Use
63. ets WDT wdt status Checks the current status of WDT wdt disable Disables WDT wdt enable timeoutz Enables WDT with timeout lt timeout gt seconds lt timeout gt range 1 124 The following are usage examples of wdt for the COMX P40x0 ENP2 module e wdt status WDT disabled e wdtenable 5 WDT enabled with timeout 5 seconds wdtreset System reset DTT An I2C thermal sensor ADT7411 136 is installed and is located on 2 lt 1 gt ADT7411 is used to monitor the CPU temperature Boot up message in the U Boot will read as DTT ADT7411 4C U Boot provides dtt to display the CPU temperature Here is an example of dtt usage e dtt DTT1 CPU Temperature 48 C SPI The 40 0 ENP2 module provides a SPI bus from the 40 0 CPU with four chip select signals All SPI bus signals are routed to COM Express connectors For more information on the distribution of the SPI bus see SPI Interface on page 81 COMX P40x0 ENP2 Installation and Use 6806800R95C 115 BSP 717 116 U Boot provides sf utilities to operate SPI Flash sf probe bus cs hz mode Initializes flash device on given SPI bus and chip select sf read addr offset len Reads len bytes starting at offset to memory at addr sf write addr offset len Writes len bytes from memory at addr to flash at offset sf erase offset len Erases len bytes from offset Below are usage samples
64. f Artesyn to notify any person of such revision or changes Electronic versions of this material may be read online downloaded for personal use or referenced in another document as a URL to an Artesyn website The text itself may not be published commercially in print or electronic form edited translated or otherwise altered without the permission of Artesyn It is possible that this publication may contain reference to or information about Artesyn products machines and programs programming or services that are not available in your country Such references or information must not be construed to mean that Artesyn intends to announce such Artesyn products programming or services in your country Limited and Restricted Rights Legend If the documentation contained herein is supplied directly or indirectly to the U S Government the following notice shall apply unless otherwise agreed to in writing by Artesyn Use duplication or disclosure by the Government is subject to restrictions as set forth in subparagraph b 3 of the Rights in Technical Data clause at DFARS 252 227 7013 Nov 1995 and of the Rights in Noncommercial Computer Software and Documentation clause at DFARS 252 227 7014 Jun 1995 Contact Address Artesyn Embedded Technologies Artesyn Embedded Technologies Marketing Communications Lilienthalstr 17 19 2900 S Diablo Way Suite 190 85579 Neubiberg Munich Tempe Arizona 85282 Germany Contents Abuut
65. f COM Express connectors CPU GPIO5 GPO1 of COM Express connectors CPU GPIO6 GPO3 of COM Express connectors CPU GPIO7 GPOA of COM Express connectors CPU GPIO19 Clock generators enable control CPU GPIO20 Carried board reset output CPU GPIO23 Clock generator of bank 1 frequency selection CPU GPIO24 Clock generator of bank 2 3 frequency selection IOEXT GPI5 GPI5 of COM Express connectors PCA9557 1 00 IOEXT_GPI6 GPI6 of COM Express connectors PCA9557 1 01 IOEXT GPI7 GPI7 of COM Express connectors PCA9557 1 02 IOEXT GPI8 GPI8 of COM Express connectors PCA9557 1 03 IOEXT GPO5 GPO5 of COM Express connectors PCA9557 1 04 IOEXT GPO6 GPO6 of COM Express connectors PCA9557 1 05 78 COMX P40x0 2 Installation and Use 6806800R95C Functional Description Table 4 5 GPIO GPIO name function IOEXT_GPO7 GPO7 of COM Express connectors PCA9557 1 06 IOEXT_GPO8 GPO8 of COM Express connectors PCA9557 1 07 GPIO19 20 23 and 24 are multiplexed with other functional blocks The pins should be configured as follows GPIO19 RCW DMA1 1b GPIO20 RCW DMA2 10b GPIO23 24 RCW IRQ 1b COMX P40x0 2 Installation and Use 6806800R95C 79 Functional Description 80 After reset the direction for all GPIOs are set to input All GPIOs used as output need to be reconfigured Figure 4 6 Distribution of GPIO GPI5 GPI6 GPI7 GPI8 VO
66. fiziertes Wartungspersonal darf Abdeckungen entfernen um Komponenten zu ersetzen oder andere Anpassungen vorzunehmen Installieren Sie keine Ersatzteile oder f hren Sie keine unerlaubten Ver nderungen am Produkt durch sonst verf llt die Garantie Wenden Sie sich f r Wartung oder Reparatur bitte an die f r Sie zust ndige Gesch ftsstelle von Artesyn So stellen Sie sicher dass alle sicherheitsrelevanten Aspekte beachtet werden COMX P40x0 ENP2 Installation and Use 6806800R95C 19 Sicherheitshinweise EMV Betrieb 20 Das Produkt wurde in einem Artesyn Standardsystem getestet Es erf llt die f r digitale Ger te der Klasse A g ltigen Grenzwerte in einem solchen System gem den FCC Richtlinien Abschnitt 15 bzw EN 55022 Klasse A Diese Grenzwerte sollen einen angemessenen Schutz vor St rstrahlung beim Betrieb des Produktes in Gewerbe sowie Industriegebieten gew hrleisten Das Produkt arbeitet im Hochfrequenzbereich und erzeugt St rstrahlung Bei unsachgem em Einbau und anderem als in diesem Handbuch beschriebenen Betrieb k nnen St rungen im Hochfrequenzbereich auftreten Wird das Produkt in einem Wohngebiet betrieben so kann dies mit grosser Wahrscheinlichkeit zu starken St rungen f hren welche dann auf Kosten des Produktanwenders beseitigt werden m ssen nderungen oder Modifikationen am Produkt welche ohne ausdr ckliche Genehmigung von Artesyn durchgef hrt werden k nnen dazu f hren dass der Anwender die
67. for sf e sf probe 0 4096 KiB S25FL032A P at 0 0 is now current device e sf erase 0 80000 sfread 1000000 0 10000 e sf write 1000000 0 10000 MMC SDHC The COMX P40x0 ENP2 module provides a MMC SDHC interface to the COM Express connector There is also connector for this provided on the carrier By default the MMC SDHC 4 bit mode is selected U Boot provides mmcinfo and mmc utilities to operate the MMC SDHC card mmcinfo must be executed before other mmc commands can be run mmcinfo mmcread lt device num gt addr blk cnt mmc write lt device num gt addr blk cnt mmc rescan lt device num gt mmc list Lists available devices COMX P40x0 2 Installation and Use 6806800R95C BSP 7 18 USB The COMX P40x0 ENP2 module has four USB ports For more information on the USB on page 4 U Boot provides usb utilities to operate the USB sticks Utility Function usb reset Resets or rescans USB controller usb stop f Stops USB f force stop usb tree Shows USB device tree usb info dev Shows available USB devices usb storage Shows details of USB storage devices usb dev dev Shows or set current USB storage device usb part dev Prints partition table of one or all USB storage devices usb read addr blk cnt Reads cnt blocks starting at block blk to memory address addr usb write addr blk cnt Writes cnt blocks starting at block from memory address addr No
68. formed after run eraenv tftpboot Downloads image through network using TFTP protocol tftpboot loadAddress hostlPaddr bootfilename Example tftpboot loadaddr ubootfile Boots application image from memory bootm addr arg Example bootm norbootaddr norfsaddr norfdtaddr Example bootm loadaddr fdtaddr 7 4 BSP Build Requirements Build Host The Basic Support Package BSP is hosted by an x86 computer running Linux At least 1 GB free space is required where the BSP is hosted 94 40 0 ENP2 Installation and Use 6806800R95C BSP Build Tools Artesyn is using build tools provided in Freescale SDK1 0 QorlQ DPAA SDK 201 10609 systembuilder iso to build BSP images S You download the Freescale SDK ISO files from and install it on the build host 7 4 1 Install Build Tools of SDK1 0 Following are the steps to install build tools of SDK1 0 from Freescale SDK on host computer 1 2 3 Login to the Linux host as non root user lt user_name gt Copy the QorIQ DPAA SDK 20110609 systembuilder isofileto this Linux host Run the ISO file using the following command sudo mount o loop QorIQ DPAA SDK 20110609 systembuilder iso mnt Create a opt freescale directory and update access privileges using the following command sudo mkdir p unixopt sdk1 0 sudo chmod unixopt sdk1 0 Change directory to mount using the following command
69. frequency is 125 MHz 40 0 ENP2 Installation and Use 6806800R95C Clock Structure 5 1 Overview Chapter 5 The COMX P40x0 ENP2 module require several kinds of single ended and differential clocks for booting up and normal operation Following is the clock distribution tree Figure5 1 Clock Distribution 100 MHz 32 768 KHz gee 60 MHz Crystal GE PHY 100 MHz aa ICS9FG104 x Crystal lt 50ps 100 MHz 125 hy pe P40x0 0 p Crystal pe ICS9FG104 lt 50ps 125 MH D z 5 COME Connector 7 a Device on Device on Reference clock for Reference clock Carrier Carrier Bank 2 3 for Bank 1 100 MHz Osc RTC 32 768 KHz USB PHY g 24 MHz PHY USB 1 CY2305 24 MHz OSC The output frequency of the bank 1 and bank 2 3 SerDes clocks is selectable between 100 MHz and 125 MHz This must be set correctly by the carrier or corresponding CPU GPIO pins depending on what RCW SerDes configuration is selected For proper settings refer SerDes Block on page 72 Table 5 1 Configuration of the frequency of SerDes reference clock by carrier SerDes bank 1 reference clock select pin B97 on COM Express Ser
70. fs_nfs USBFATboot and USBEXT2boot The COMX P40x0 ENP2 has a U Boot variable called usbfatboot setenv bootargs root dev Susbbdev rw rootdelay 30 console Sconsoledev Sbaudrate hwbootargs Sothbootargs usb start fatload usb 0 1 loadaddr boot Sbootfile fatload usb 0 1 Sfdtaddr boot fdtfile bootm 1oadaddr fdtaddr The COMX P40x0 ENP2 has a U Boot variable called usbext2boot setenv bootargs root dev Susbbdev rw rootdelay 30 console Sconsoledev Sbaudrate hwbootargs Sothbootargs usb start ext2load usb 0 2 1oadaddr boot Sbootfile ext2load usb 0 2 Sfdtaddr boot fdtfile bootm 1oadaddr fdtaddr The usbfatboot will load Linux kernel and from the FAT partition 1st partition on USB stick into RAM and then boot EXT2 partition 2nd partition will be mounted on the USB stick as rootfs The usbext2boot will load Linux kernel from the EXT2 partition 2nd partition on USB stick into RAM and then boot Mounting it on the same partition on this USB stick will boot as rootfs The following are the critical environment variables for usbfatboot and usbext2bot bootfile Linux kernel file name fdtfile DTB file name COMX P40x0 ENP2 Installation and Use 6806800R95C 133 BSP 7 23 6 134 The following are the examples of critical environment variables gt setenv bootfile COMX_P4080_V100R00 ulmage gt setenv fdtfile COMX_P4080_V100R00 comx dtb Users need to create two partitions on t
71. he USB stick FAT32 is the first partition and the EXT2 15 the second partition Both partitions contain a directory boot and the directory has kernel DTB files EXT2 partition contains the rootfs which can be from rootfs_nfs tar gz MMCFATboot and MMCEXT2boot 40 0 ENP2 has a U Boot variable called mmcfatboot setenv bootargs root dev Smmcbdev rw rootdelay 30 console Sconsoledev Sbaudrate Shwbootargs Sothbootargs mmcinfo fatload mmc 0 1 1 boot Sbootfile fatload mmc 0 1 fdtaddr boot Sfdtfile bootm Sloadaddr fdtaddr COMX P40x0 ENP2 also has a U Boot variable called mmcext2boot setenv bootargs root dev Smmcbdev rw rootdelay 30 console Sconsoledev Sbaudrate Shwbootargs Sothbootargs mmcinfo ext2load mmc 0 2 1 boot Sbootfile ext2load mmc 0 2 S fdtaddr boot Sfdtfile bootm Sloadaddr fdtaddr The mmcfatboot will load Linux kernel and from the FAT partition 1st partition on MMC SDHC card into RAM and then boot EXT2 partition 2nd partition will mount on this card as rootfs mmcext2boot will load Linux kernel and from the EXT2 partition 2nd partition on MMC SDHC card into RAM and then boot The same partition will mount on this card as rootfs The following are the critical environment variables for mmcfatboot and mmcext2boot bootfile Linuxkernel file name fdtfile DTBfile name 40 0 ENP2 Installation and Use 6806800R95C
72. he line DDR Chip Select Interleaving Mode 50 51 GPIO The COMX P40x0 ENP2 module has 20 general purpose input output GPIO 12 connected to the CPU and 8 implemented 2 expander For more information see on page 78 Table 7 4 GPIO States GPIO Input Output Reset State Description GPIOOO GPIO of COM E connectors GPI1 of COM E connectors GPIOO2 GPI3 of COM E connectors 4 of COM E connectors GPIO04 GPOO of COM E connectors and also as to control debug LED D18 005 1 connectors and also as to control debug LED 019 GPIO06 O of COM E connectors GPIOO3 COMX P40x0 ENP2 Installation and Use 6806800R95C BSP Table 7 4 GPIO States continued GPIO Input Output Reset State Description GPIO07 GPOA of COM E connectors GPIO19 Clock Generator Enable 20 Carried board reset output GPIO23 GPIO24 Clock generator of bank 1 frequency selection input Clock generator of bank 2 3 frequency selection input For more information see on page 78 The U Boot provides several GPIO utility commands Table 7 5 GPIO Command Usage Command Description gpio dump Dumps the direction od and level information for all pins gpio get pin Gets the direction od and level information for the specified pin gpio set dir pin lt dir gt Sets the direction of the
73. his manual is divided into the following chapters and appendices e Safety Notes summarizes the safety instructions in the manual e Sicherheitshinweise provides the German translation of the safety notes section e introduction provides an overview of the module s features e Hardware Preparation and Installation provides instructions for installing and removing the module e Controls LEDs and Connectors provides pin assignments for the various connectors on the module e Functional Description describes the functions of the various components on the module e Clock Structure describes the clock distribution and the setup utility used to configure the module e Power Domains describes the power supply system for the module e BSP describes how to build the Basic Support Package BSP and deploy the built images on the module e Related Documentation provides a list of related product documentation manufacturer s documents and industry standard specifications Abbreviations This document uses the following abbreviations TERM MEANING BSP Board Support Package GPIO General Purpose Input Output 2 Inter Integrated Circuit MDIO Management Data Input Output MMC Module Management Controller PCI Peripheral Component Interface COMX P40x0 ENP2 Installation and Use 6806800R95C 11 About this Manual TERM MEANING Peripheral Component Interface Express Ethernet controller physical layer devic
74. iables for nandboot jffs2nand MTD device for JFFS2 rootfs NAND FLASH norbootaddr Linux kernel address on NOR FLASH norfdtaddr DTB address on NOR FLASH The following are the examples of critical environment variables gt setenv jffs2nand mtdblock7 gt setenv norbootaddr EE000000 gt setenv norfdtaddr EFD00000 NFSboot The 40 0 ENP2 has a U Boot variable called nfsboot setenv bootargs root dev nfs rw nfsroot serverip rootpath ip ipaddr S serverip gatewayip netmask hostname S netdev off console consoledev baudrate hwbootargs othbootargs tftp Sloadaddr Sbootfile tftp Sfdtaddr fdtfile bootm loadaddr Sfdtaddr The nfsboot will load Linux kernel and into RAM via network TFTP and then boot NFS will then mount on the remote server as rootfs The following are the critical environment variables for nfsboot ethact Active ethernet port netdev NFS mounting network port bootfile Linuxkernel file name on TFTP server fdtfile DTB file name on TFTP server rootpath The NFS path the remote server exports COMX P40x0 ENP2 Installation and Use 6806800R95C BSP 7 23 5 The following the examples of critical environment variables gt setenv ethact FM1 DTSEC1 gt setenv netdev ethO gt setenv comx_p4080 COMX_P4080_V100R00 ulmage gt setenv fdtfile comx_p4080 COMX_P4080_V100R00 comx dtb gt setenv rootpath tftpboot comx_p4080 root
75. ing scripts Makefile Top makefile for building cleaning all of BSP images for BSP release It calls Makefiles and scripts located in sub directories to perform the operations 96 40 0 ENP2 Installation and Use 6806800R95C BSP Table 7 2 BSP Source Code Package Layout File Directory Name Description Makefile p4080ds Top makefile for building cleaning all of BSP images for P4080DS BSP release It calls Makefiles and scripts located in sub directories to perform the operations misc misc contains FMAN uCode and RCW u boot U Boot source code 7 6 Basic Environment Variable Settings 7 6 1 Setup Build Environment e If Freescale SDK1 0 is used as build tool and the host linux is 32 bit modify the Makefile and set the environment variant PPC_TOOL_PATH as below SDK INSTALL PATH unixopt sdk1 0 QorIQ DPAA SDK 20110609 systembuilder TOOL PATH S SDK INSTALL PATH freescale 2010 09 bin SDK INSTALL _ PATH build p4080ds release sysroots i686 linux usr bin The build tool is not verified with SDK1 0 at 64 bit Linux host COMX P40x0 ENP2 Installation and Use 6806800R95C 97 BSP 7 6 2 Network Variables This table lists example network u boot environment variables to establish network connection By default the factory sets up 10 MAC addresses in the IDEEPROM and u boot will establish corresponding ethXaddr variables automatically Network Variables
76. irements Environmental Requirements The following environmental requirements must not be exceeded Operating temperature refers to the temperature of the air circulating around the module and notthe component temperature The following table provides the environmental requirements for the module Table 2 1 Environmental Requirements Temperature 40 C to 71 50 C to 100 C Humidity to 100 to 100 Vibration Sine 10mins axis 5 15 to 2000Hz Vibration Random 1hr axis 0 04 g2 Hz 15 to 2000 Hz 8GRMS Thermal Requirements A standard passive heat sink can be provided by Artesyn 12 CFM system airflow volume at 71 C is needed for the heat sink to keep sufficient cooling to the module Contact your Artesyn sales representative for detailed thermal information COMX P40x0 ENP2 Installation and Use 6806800R95C 37 Hardware Preparation and Installation The following table summarizes the components that exhibited significant temperature rises and their maximum allowable operating temperature These components should be monitored in order to assess thermal performance during customized thermal solution development Table 2 2 Critical Temperature Spots Component Identifier Heat Dissipation Power W Maximum Allowable Temperature C CPU P4080 20 5 CPU 105 Tj CPU P4040 16 8 CPU 105 Tj Memory SDRAM 3 95 Te GbE Transceiver 0 86 125 Tj BCM5482
77. is located on 2 2 U40 with a device address of OxDC The ICS9FG104 is a Frequency Timing Generator that provides four differential output pairs that are compliant to the Intel CK410 specification The part synthesizes several output frequencies from 25 MHz crystal It provides outputs with cycle to cycle jitter of less than 50 ps and output to output skew of less than 35 ps Frequency selection can be accomplished via strap pins or SMBus control By default strap pins are used The input clock for the first clock generator is 25 MHz and three differential output pairs are provided First pair are connected to SerDes Bank 1 second pair are connected to two Aurora connectors and third pair are connected to COM Express connector The second clock generator also uses a 25 MHz input reference with three output pairs The first pair drives SerDes bank 2 the second pair drives SerDes bank 3 and the third is connected to the COM Express connector The frequency of the first clock generator bank 1 SerDes and 15 selected through the FSO strap pin which is connected to GPIO23 of the CPU and pin B97 of the COM Express connector The frequency of the second clock generator bank 2 and 3 SerDes is also selected through the FSO strap pin which is connected to GPIO24 of the CPU and pin B98 of the COM Express connector For first and second clock generators when FSO is 0 low level the frequency is 100 MHz and when FSO is 1 high level the
78. items of your shipment COMX P40x0 ENP2 Module One printed copy of Quick Start Guide One printed copy of Safety Notes Summary e Any other optional items that you ordered 2 Check for damage and report any damage or differences to customer service 3 Remove the desiccant bag shipped together with the enclosure and dispose of it according to your country s legislation NOTICE Improperly disposing of used products may harm the environment Always dispose of used products according to your country s legislation and manufacturer s instructions The product is thoroughly inspected before shipment If any damage occurred during transportation or any items are missing contact customer service immediately Installing and Removing the Module on the Carrier Board Installing the COM Express module on the carrier board 1 Line up the board to board connector of the module assembly with the board to board connector of the carrier board 2 Make sure that the inter connectors are properly aligned and that the five standoffs on the module have contact with the top of the carrier board COMX P40x0 2 Installation and Use 6806800R95C Hardware Preparation and Installation 3 From the bottom side of the carrier locate the screw holes corresponding to the module standoffs 4 Fasten the module to the carrier board with the screws provided Removing the module from the carrier board 1 From the back side of the
79. n the comx_p4080 file e NFS service is active on this TFTP server and files are exported to tftpboot comx p4080 rootfs nfs Basic Commands The following are the commands commonly used by the U Boot To enter the U Boot shell press any key while the autoboot is counting down Table 7 1 Basic U Boot Commands gt Prompt for the command line COMX P40x0 ENP2 Installation and Use 6806800R95C 93 BSP Table 7 1 Basic U Boot Commands continued Command Description help cmd or cmd Used to display the usage options for the command cmd If cmd is not specified U Boot will display the brief usage options for all of the available commands printenv vn Displays the value of the environment variable vn If vn is not specified U Boot will display the values for all of the envi ronment variables setenv vn vv Sets the value of the environment variable vn to vv If vv is not spec ified U Boot will not define the environment variable vn If vv includes spaces it should be enclosed within single quote marks For example setenv manufacturer Emerson Network Power Saveenv Saves all the environment variables persistently to the U Boot env sec tion on NOR Flash run eraenv Erases all the environment variables stored in the U Boot env section on NOR Flash Protect off EFEE0000 00020000 erase EFEE0000 00020000 Protect on EFEE0000 00020000 A reset must be per
80. not rename the device that is currently busy For network ports of PRO 1000 the port name is always ethX Build BSP Images Output Directory By default the output directory for building BSP images is 1oca1 tmp You need to create this directory and provide full privileges for all users to access Use the following commands to create directory and provide privileges sudo mkdir p sudo chmod local local tmp Build a Release To build a release run the build sh Version Number command The version number is formatted as VxxxBxx VxxxTxx or VxxxRxx For example V100B00 COMX P40x0 2 Installation and Use 6806800R95C BSP 7 21 1 7 21 2 BSP Images SCP P4080 2G ENP2 BSP images should be placed in local tmp It includes the COMX_P4080_ lt Version_Number gt tar gz package The COMX P4080 Version Number tar gz package contains comx dtb Device Tree Blob 51 fman ucode PA P5 101 8 bin FMAN uCode rcw bin RCW rcw codewarrior bin RCW used for code warrior to burn image to NOR Flash rootfs_ext2 img RAMDISK image rootfs nfs tar gz NFSrootfs u boot bin U Boot ulmage Linux kernel image Build U Boot The U Boot is based on SDK1 0 whose version is U Boot 2011 06 rc2 Commands 1 Build by default make uboot 2 Build Targets supported for U Boot uboot configures and builds u boot bin for NOR flash
81. nting re initialization Local Bus The 16 bit wide local bus is connected to a 2 Gb or 256 MB NOR Flash and an 8 Gb or 1 NAND FLASH The NOR FLASH is used to store the RCW data active and alternates FMan microcode DTB U Boot demo Linux kernel and associated basic ramdisk By default the NAND FLASH is used to store an alternate Linux file system The local bus is also extended to the COM Express connectors There are six chip select signals supported CSO CS1 and CS3 6 CSO is reserved for the boot device and defaults to the NOR FLASH CS1 defaults to the NAND FLASH CSO and CS1 can be swapped between the NOR and NAND FLASH by driving the COM Express connector pin A30 high 3 3 V CS3 6 are extended to the COM Express connector and are available for use COMX P40x0 ENP2 Installation and Use 6806800R95C 69 Functional Description The following figure illustrates the distribution of local bus on the module Figure 4 2 Distribution of Local Bus P40x0 LAD 0 7 4 5 1 Clock 256 MB NOR Fe FLASH 1 NAND FLASH Internal Latch COM Express Connector Pin A30 clock is generated by platform clock The divisor is configured by CLKDIV in Clock Ratio Register LCRR The clock is limited to 75 MHz maximum frequency 4 5 2 NOR FLASH The NOR FLASH is attached to the GPCM on the local bus and operates in 16 bit mode NOR FLASH is a Micron PC28F00BM29EWHA Its size is 2
82. oot mode POVDD should be setto 1 5 V DC and is powered at least 100 system clock cycles after the rising edge of power on reset signal For non secure boot mode POVDD should be set to GND Figure 6 2 Power Sequence of COMX P40x0 ENP2 Secure boot fuse programming Non secure boot fuse programming 15 DOR 1 5V 0 75V DOR Power on reset OVDD BVDD CVDD LVDD POVDD NOD ORRIN D pa All supplies must be at their stable values Within 75ms All supplies must be at their stable values Within 75ms 92 40 0 ENP2 Installation and Use 6806800R95C BSP Chapter 7 7 1 7 2 7 3 COMX P40x0 ENP2 module has a Board Support Package BSP that provides shell to allow users to accomplish most of the debugging operations on most of the board s interfaces and peripheral devices The BSP of the COMX P40x0 ENP2 module is U Boot Linux DTB and rootfs Setup Requirements The following are the minimum setup requirements for the COMX P40x0 ENP2 module e One serial cable to connect the COMX P40x0 ENP2 module to a computer e One network cable connecting the on board network port to the network ATFTPserver connected to the network ThelP address should be192 168 0 100 TheTFTProotis t ftpboot You need to create a sub directory with the name comx 4080 this root Three copies of the BSP package comx_p4080 COMX_P4080_V100R00 tar gz which will be decompressed i
83. port should subtract the numbers of the above invalid network ports Here is an example of the ethX naming based on the option 5 Install Intel PRO 1000 server adapter in SLOT 6 For the Freescale SGMII Riser install it in SLOT 14 and for Freescale XAUI Riser install it in SLOT 10 The U Boot boot up message will list the valid ports list FM1 DTSEC1 FM2 DTSEC1 FM2 DTSEC2 FM2 TGEC1 e1000 0 e1000 1 The ethX list would then be as follows 0 FM1 DTSEC1 1 FM2 DTSEC1 2 FM2 DTSEC2 FM2 DTSEC3 4 FM2 DTSEC4 3 5 2 2 4 6 2 e1000 0 5 7 2 e1000 1 s e100042 e1000 3 UDEV rules rename the default ethX for network ports of frame manager for convenience and identification Table 7 11 UDEV Rules for Network Ports in Linux FM1 Network Ports Port 0 FM1 DTSEC1 is named as fm1 gb1 COMX P40x0 2 Installation and Use 6806800R95C 123 BSP 7 21 124 Table 7 11 UDEV Rules for Network Ports in Linux continued FM1 Network Ports FM2 Network Ports Port 0 FM2 DTSEC1 is named as fm2 gb1 Port 1 FM2 DTSEC2 is named as fm2 gb2 is named as fm2 gb3 Port 2 FM2 DTSEC3 Port FM2GDTSECA is named as fm2 gb4 Port 4 FM2 TGEC1 XAUI is named as fm2 10g An exception for frame manager network ports is when the nfsboot which is the network port for mounting NFS remains and will not be renamed to fmY gbZ in Linux because the udev can
84. quence 7 2 2 2 92 4 40 0 ENP2 Installation and Use 6806800R95C Contents 7 BSP i e ae SEEN a ee ee 93 7 1 55 E 93 7 2 Setup Requirements nasse sa 93 4 3 Basic Commands esse Dun 93 7 4 BSP Build Requirements 24 24 94 7 4 1 Install Build Tools 1 0 2 95 7 5 BSPSourceCodePatckdge usa RA rer 96 7 5 1 De Compose Source Code Package 96 7 6 Basic Environment Variable Settings 97 7 6 1 Setup Build 97 7 6 2 2 2 24 4 98 7 6 3 Filename Variables for BSP 98 7 6 4 Address Variables for BSP Components on NOR 99 7 6 5 Address Variables for the Boot Components 99 7 6 6 Device Variables 2 99 7 6 7 HWCONFIG 2 100 7 6 8 Bootargs 0 2
85. r Address 0xDC atchdog Address 0 00 Expander 02302 Address 0x30 SPD Temp Sense U2300 gt Address 0xAC 12 lt 1 gt SPD Temp Sense 02301 Address 0xA4 Volt Monitor Temp Sense 02900 Address 0 90 Boot Config 030 gt Address 0 Processor ID EEPROM 02001 Address 0xA8 l2C 2 Address 0xD0 USB HUB U25 c Address 0x58 12C lt 4 gt RS _ Table 4 8 I2C Interface Address Bus Component Function 12C1 9FG104DGILFT Clock Generator 0 0 M41T65Q6F Watchdog I2Ci PCA9557PW T IO Expander OxAC 12 1 MCP98243T BE ST SPD Channel A This is optional and not populated by default 86 40 0 ENP2 Installation and Use 6806800R95C Functional Description Table 4 8 I2C Interface Address Bus Component Function 2C1 MCP98243T BE ST SPD Channel B This is optional and not populated by default ADT7411ARQZ REEL7 Voltage Monitor Temp Sense AT24C02 SSHM T 2kb Boot Config EEPROM 24 512 55 512kb Boot Config EEPROM 12C1 24 512 Processor ID OxDO I2C2 M41T62LC6F RTC OxDC I2C2 9FG104DGILFT Clock Generator 4 18 1 12 Device Thermal Sensor The ADT7411 thermal sensor is a dual channel digital thermometer and under over temperature alarm It is located
86. replaces all prior editions 14 Part Number 6806800R95A 6806800R95B Publication Date August 2013 August 2014 Description Initial version Re branded to Artesyn template 6806800R95C January 2015 Removed the references to SCP P4040 4G ENP2 COMX P40x0 2 Installation and Use 6806800R95C Safety Notes EMC This section provides warnings that precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed during all phases of operation service and repair ofthis equipment You should also employ all other safety precautions necessary for the operation of the equipment in your operating environment Failure to comply with these precautions or with specific warnings elsewhere in this manual could result in personal injury or damage to the equipment Artesyn Embedded Technologies intends to provide all necessary information to install and handle the product in this manual Because ofthe complexity ofthis product and its various uses we do not guarantee that the given information is complete If you need additional information ask your Artesyn representative The product has been designed to meet the standard industrial safety requirements It must not be used except in its specific area of office telecommunication industry and industrial control Only personnel trained by Artesyn or persons qualified in electronics or electrical engineering
87. rfaces include PCIE XAUI SRIO SGMII On board Storage 16bit NOR FLASH from local bus standard product default FLASH from local bus 12 Note Selectable via carrier Software Demo runtime Linux Operating System and filesystem s pre installed in NOR NAND Flash Connectors Four UART ports One Gigabit Ethernet interface 10 100 1000Base T Four USB ports IEEE 1588 control Three I C bus Eight GPIO ports SPI bus with four chip select signals COMX P40x0 ENP2 Installation and Use 6806800R95C 25 Introduction Secure Digital Host Controller interface to the COM Express connector for MultiMediaCard MMC and Secure Digital card SD support e Tamper detect pin to the COM connectors e Real Time Clock RTC and Watch Dog Timer WDT device e Provide both remote and local thermal sensor connector on module e Aurora testing points on module 12 V power supplied to module through COM connectors e Two Five interrupts OneSDIO e 5 V standby power from connector required used by module Due to P4080 errata 009 Aurora ports are disabled by default in RCW and must be re enabled for debug For assistance contact Artesyn representative 1 2 Standard Compliances The product is designed to meet the following standards Table 1 1 Standard Compliances Standard Description UL60950 1 EN 60950 1 IEC Safety R
88. rom ref name Pin Net Name COMX Notes CPU_IIC1_CLK CPU_IIC1_DAT N C B43 USB3_P bidir USB 0583 PWREN USB1_PWREN B49 RESET_BUTTON_N CB_RESET_GPIO20_ N GND SERDES_RX5_P SERDES_RX5_N 1 55 SERDES_RX4_P 2 56 SERDES_RX4_N in 52 COMX P40x0 ENP2 Installation and Use 6806800R95C Table 3 4 AB CD Connectors continued Controls LEDs and Connectors Connector Connector ref name Pi 5 5 5 Net Name CPU_SDHC_WP SERDES_RX3_N Direction from COMX 2 AB1 B60 GND B1 B1 J2 B1 J2 B2 J2 B2 J2 B2 J2 B2 A6 A6 A6 A6 SERDES_TX2_P ut SERDES_TX2_N ut n B59 in 4 pe e SERDES_TX1_P ut AB2 A65 SERDES_TX1_N out AB2 A66 GND 1 2 8 A A A A A A A A A 2 2 2 2 7 CPU_SDHC_DAT2 2 D GN AB2 2 2 gt pe m Ne e gt pe me 2 AB2 2 2 12 B2 12 2 A80 GND B2 E COMX P40x0 ENP2 Installation and Use 6806800R95C 53 Controls LEDs and Connectors Table 3 4 COMX AB CD Connectors continued Connector Connector Direction from ref name Pin Net Name COMX Notes A83 CPU_IIC2_CLK bidir CPU_IIC2_DAT CPU_SDHC_DAT3 N C N C A88 125 100 O
89. rs Bank 1 Bank 2 3 BanklSerDes Bank1 SerDes Bank2 SerDes Bank3 SerDes RCW SerDes SerDes Option 0 3 51076 4 7 SLOTJ14 10 13 SLOTJ10 14 17 SlotJ2 SRDS_PRTCL Clock3 Clock3 PCle1 x4 2 5 Gbps PCle1 x4 2 5 Gbps PCle1 x4 5 Gbps PCle2 x4 2 5 Gbps PCle2 x4 5 Gbps PCle2 x4 2 5 Gbps XAUI FM2 3 125 Gbps XAUI FM2 3 125 Gbps FM1 3 125 Gbps FM1 3 125 Gbps XAUI FM1 3 125 Gbps 100 MHz 125 MHz 100 MHz 125 MHz 100 MHz 125 MHz PCle1 x4 5 Gbps PCle1 x4 PCle1 x4 PCle2 x4 5 Gbps SGMII FM2 x4 1 25 Gbps SGMII FM2 x4 1 25 Gbps XAUI FM2 3 125 Gbps FM1 3 125 Gbps Reserved 100 MHz 125 MHz 2 Reserved OxOF 100 MHz 125 MHz Gbps 100 MHz 125 MHz SRIO2 x4 3 125 Gbps SRIO2 4 3 125 Gbps SRIO2 4 2 5 Gbps SRIO1 x4 3 125 Gbps SRIO1 x4 3 125 Gbps SRIO1 x4 2 5 Gbps PCle3 x4 2 5 Gbps PCle3 x4 5 Gbps XAUI FM2 3 125 Gbps SGMII FM1 x4 1 25 Gbps SGMII 1 x4 1 25 Gbps XAUI FM1 3 125 Gbps 100 MHz 125 MHZ 100 MHz 100 MHz 125 MHz 125 MHz SRIO2 x4 3 125 Gbps PCle1 x4 2 5 Gbps PCle1 x4 5 Gbps SRIO1 4 3 125 Gbps SRIO1 x4 2 5 Gbps SRIO1 x4 2 5 Gbps SGMII FM2 4 1 25 Gbps XAUI FM2 3 125 Gbps XAUI FM2 3 125 Gbps SGMII 1 x4
90. rsion after the first line of the U Boot boot up message gt version U Boot 2010 06 COMX P4080 V100R00 Nov 29 2010 16 24 12 5 JFFS2 rootfs version e Inthe U Boot boot with nandboot run nandboot In Linux run cat etc version rootQCOMX P4080 root cat etc version 4080 JFFS2 ROOTFS for nand full FLASH ver COMX P4080 V100R00 build by ec7536 cncdebaobs04 emrsn org on Mon Nov 29 08 47 50 UTC 2010 6 NFSrootfs version e Inthe U Boot boot with nfs nfsboot In Linux run cat etc version rootQCOMX P4080 root cat etc version 4080 NFS ROOTFS ver COMX P4080 V100R00 build by ec7536 cncdebaobs04 emrsn org on Mon Nov 29 08 50 20 UTC 2010 7 8 CPU The 4080 module has the Freescale QorlQ Communications Processor The CPU information can be viewed in the terminal Figure 7 1 below shows console output containing an example of the CPU information Figure 7 1 COMX P4080 CPU Information COMX P40x0 ENP2 Installation and Use 6806800R95C 103 BSP 7 9 CPUO is the active CPU in the U Boot Run the command reset to reboot the CPU board Address Space U Boot and Linux works in 36 bit physical addressing mode The relationship between effective address and physical address is displayed in the memory map table on Table COMX P4080 Address Space The following are mapped in to the first 4 GB address space of the 64 GB which is the 36 bit physical addres
91. ry size brd ma Programs manufacturer string The following are usage examples of brd on the COMX P40x0 ENP2 module brdid e brdpfP4080 brdpvB e brdpe00 brdmfCOMEI brdmvGA COMX P40x0 2 Installation and Use 6806800 95 113 BSP 7 15 3 114 brdme00 brdms 4096 module P4080 1 5GHz e Emerson Network Power brdsave Real Time Clock RTC and Watchdog Timer WDT The 40 0 ENP2 module uses and Watchdog features on M41ST85W The 12 RTC WDT M41ST85W U12 is adopted on the COMX P40x0 ENP2 and located on 12 lt 1 gt Boot up message in the U Boot will be as follows RCT M41ST85W 68 WDT M41ST85W 68 disabled U Boot provides date commands to operate the RTC features These include get set reset date and time date MMDDhhmm CC YY ss date reset without arguments Prints date and time with numeric argument Sets the system date and time with reset argument Resets the RTC The following are usage samples for date on the COMX P40x0 ENP2 e date Date 2010 12 01 Wednesday Time 17 57 37 date reset Reset RTC Date 2010 18 01 Sunday Time 0 00 00 e date 120117592010 00 Date 2010 12 01 Wednesday Time 17 59 00 COMX P40x0 2 Installation and Use 6806800R95C BSP 7 15 4 7 16 U Boot provides wdt commands to operate the WDT features wdt reset Res
92. s bevor sieben Jahre tats chlicher Nutzung vergangen sind COMX P40x0 ENP2 Installation and Use 6806800R95C Sicherheitshinweise Sch den an der Platine oder dem Batteriehalter Wenn Sie die Batterie mit einem Schraubendreher entfernen k nnen die Platine oder der Batteriehalter besch digt werden Um Sch den zu vermeiden sollten Sie keinen Schraubendreher zum Ausbau der Batterie verwenden Umweltschutz Falsche Entsorgung der Produkte schadet der Umwelt Entsorgen Sie alte Produkte gem der in Ihrem Land g ltigen Gesetzgebung und den Empfehlungen des Herstellers COMX P40x0 ENP2 Installation and Use 6806800R95C 23 Sicherheitshinweise eee 24 COMX P40x0 ENP2 Installation and Use 6806800R95C Chapter 1 Introduction 1 1 COMX P40x0 ENP2 is a COM Express module based on the Freescale QorlQ processors on convenient pluggable mezzanine modules that is suitable for use in extended temperature rugged environments The COMX P40x0 module provides a high performance feature rich solution for current and future generations of embedded applications Following are the features of the COMX P40x0 ENP2 module Supports Freescale QorlQ P4040 P4080 processors Form Factor Basic 95 mm x 125 mm Memory 2 GB or 4 GB soldered down DDR3 1333 with ECC Designed to support up to 8 GB of DDR3 Sixteen configurable SerDes lanes routed to COM Express connectors Available inte
93. s space The4 GB space is named asthe effective address space and is accessed by the U Boot e DDR3 SDRAM e PCIE1 2 3 MEM PCIE1 2 3 10 RIO1 2 LBC NOR FLASH DCSR NAND FLASH Buffer e CCSR BOOT PAGE Table 7 3 COMX P4080 Address Space 32 bit Effective 36 bit Physical Address Base Address Base Address Size Description 0000 0000 0 0000 0000 8000 0000 2 GB DDR3 Memory 8000 0000 C0000 0000 2000 0000 512 MB MEM A000 0000 2000 0000 2000 0000 512 MB PCIE2 MEM if 4 and 5 are unused 4 A000 0000 2000 0000 1000 0000 256 MB RIO1 MEM if 2 is unused 104 COMX P40x0 2 Installation and Use 6806800R95C Table 7 3 COMX P4080 Address Space continued BSP 32 bit Effective 36 bit Physical Address Base Address Base Address Size 000 0000 C000 0000 C 3000 0000 1000 0000 256 MB E800 0000 C 4000 0000 0800 0000 512 F E800 0000 0800 0000 128 MB Description RIO2 MEM if 2 is unused PCIE3 MEM LBC NOR Flash F000 0000 F 0000 0000 0040 0000 4 MB DCSR 400 0000 F400 0000 0020 0000 2 MB BMAN MEM F420 0000 F F420 0000 0020 0000 2 MB MEM 11 F800 0000 F F800 0000 0001 0000 64 KB PCIE1 12 13 F801 0000 F F801 0000 0001 0000 64 KB F802 0000 F F802 0000 0001 0000 64 KB PCIE2 IO PCIE3 IO 14 FFAO 0000 F FFAO 0000 0010 0
94. service nfsrestart command 10 The following commands should be executed in U Boot command line Setup the U Boot environment variables for the network settings Example gt setenv ethaddr 00 01 12 23 01 gt setenv ipaddr 192 168 0 99 gt setenv netmask 255 255 255 0 gt setenv gatewayip 192 168 0 1 gt setenv serverip 192 168 0 100 gt setenv ethact FM1 DTSEC1 Setup the U Boot environment variables for upgrade files Example gt setenv rcwfile comx p4080 COMX P4080 V100B00 rcw bin setenv fmanfile comx p4080 COMX P4080 100 00 51 fman ucode 4 P5 101 8 bin gt setenv bootfile comx p4080 COMX P4080 V100B00 ulImage setenv norfsfile comx p4080 COMX P4080 V100B00 rootfs ext2 img gt setenv fdtfile comx p4080 COMX P4080 V100B00 comx dtb gt setenv ubootfile comx p4080 COMX P4080 V100B00 u boot bin gt setenv rootpath tftpboot comx p4080 rootfs nfs 128 40 0 ENP2 Installation and Use 6806800R95C BSP Test that the network and filename settings can download the files successfully Example gt tftpboot Sloadaddr Srcwfile gt tftpboot loadaddr fmanfile gt tftpboot loadaddr Sbootfile gt tftpboot loadaddr Snorfsfile gt tftpboot loadaddr Sfdtfile gt tftpboot loadaddr Subootfile 7 22 2 Deploying BSP Images NOR FLASH Following are the steps to deploy BSP images on NOR FLASH 1 Upgrade RCW FMAN uCode kernel RAMDI
95. settings must be provided by the customer s carrier board e Power up the board 118 COMX P40x0 ENP2 Installation and Use 6806800R95C Using option 5 from as an example the boot up message will appear as below COMX P40x0 2 Installation and Use 6806800R95C 119 BSP 7 20 120 Network The COMX P40x0 ENP2 module has two frame managers Each one supports five native network interfaces broken down into four 1 GB Ethernet interfaces DTSEC and one 10 GB Ethernet interface TGEC Due to limitations in the CPU and frame manager only 12 Gbps is supported This does not allow the DTSEC and one to work the line speed at the same time at 14 Gbps Because of these limitations the COMX P40x0 ENP2 powers down the XAUI interface for RCW options 5 and 6 The total line speed must not exceed 12Gbps for these configurations The 40 0 ENP2 has the following combinations of network ports in the frame managers e 1 XAUI FM2 RCW options 1 4 9 11 12 e 1 4SGMII FM2 RCW options 5 6 e 1 RGMII FM1 only SRIO configuration RCW options 7 8 PCI Express based network ports like the Intel PRO 1000 are not limited by the above mentioned rules because their packets are handled not by the frame managers but by the CPU The 40 0 ENP2 powers down the Bank 3 SerDes FM1 lanes of pin multiplexing configuration in the RCW routes the RGMII port FM 1GDTSE
96. sor Pluggable Mez zanine Module For Extended Temperature and rugged Environments Model Name Number COMX P4040 4G ENP2 4080 COMX P4080 2G E ENP2 COMX P4080 2G ENP2 COMX P4080 4G E ENP2 COMX P080 4G ENP2 has been designed and manufactured to the following specifications 55022 2010 Class 55024 2010 60950 1 2005 2nd Edition 1 2009 2011 65 EU RoHS Directive As manufacturer we hereby declare that the product named above has been designed to comply with the rele vant sections of the above referenced specifications This product complies with the essential health and safety requirements of the above specified directives We have an internal production control system that ensures compliance between the manufactured products and the technical documentation Ar 07 30 2014 Tom Tuttle Manager Product Testing Services Date MM DD YYYY u u 74 BNMIBNEDONDTROHNOLOOGINS 28 40 0 ENP2 Installation and Use 6806800R95C 1 3 Mechanical Data This section provides mechanical details of COMX P4080 ENP2 and COMX P4040 ENP2 modules Figure 1 2 COMX P40x0 ENP2 Top View Introduction
97. specified pin gpio set dir pin od Sets the od of the specified pin gpio set dir pin lvl Sets the level of the specified pin The parameters used in the GPIO utility commands are described below pin 0 1 2 3 4 5 6 7 19 20 23 24 dir Oforinput 1 for output od Oforoutput 1 for open drain lv O for low level 1 for high level COMX P40x0 ENP2 Installation and Use 6806800R95C 107 BSP For the GPIO signals connected to the 2 expander these are controlled the i2c command using the I2C address 0x18 For more information see 2C on page 110 7 12 UART There are four universal asynchronous receiver transmitters UART in the COMX P40x0 ENP2 module each with Tx and Rx signals routed to the COM E connectors The default active console is UARTO The working mode is 115200baud rate 8 data bit No parity 1 stop bit Each of the four UART can become the active console by setting the environment variable uart Usage UARTO setenv uart 0 saveenv reset UART1 setenv uart 1 saveenv reset UART2 setenv uart 2 saveenv reset UART3 setenv uart 3 saveenv reset The UART boot up message in U Boot is as follows In Serial Out Serial Err Serial Current Console uart 0 108 COMX P40x0 ENP2 Installation and Use 6806800R95C BSP 7 13 Flash NOR Flash is Numonyx Axcell JS28FOOAM29EWL Spansion 529 101 11 is attached to
98. stallation and Use 6806800R95C 99 BSP setenv baudrate 115200 setenv usbbdev sda2 setenv mmcbdev mmcbIk0p2 setenv hdbdev sdal setenv jffs2nand mtdblock7 7 6 7 Variable HWCONFIG Variable hwconfig Default is fsl_ddr ctlr_intlv cache line bank_intlv csO_cs1 esdhc SerDes fs _srds_Ip d b3 0xf fs fm2 xaui phy xfi 7 6 8 X Bootargs Variable Bootargs Variable root dev ram for ramboot and norboot root dev jffs2nand rw for nandboot root dev nfs for nfsboot root dev usbbdev rw for usbfatboot and usbext2boot root oot dev mmcbdev rw for mmcfatboot and mmcext2boot rootfstype jffs2 is needed for nandboot rootdelay 30 is needed for usb boot and mmc boot console Default is console consoledev baudrate Default is riohdid 0 xauiphy 1 generated by U Boot based hwcon fig Default is ramdisk_size 00700000 cache sram size 0x10000 100 40 0 ENP2 Installation and Use 6806800R95C BSP 7 6 9 Bootup Variables Bootup Variables ramboot Default is setenv bootargs root dev ram rw console consoledev baudrate hwbootargs othbootargs tftp ramdiskaddr ramdiskfile tftp loadaddr bootfile tftp fdtaddr fdtfile bootm loadaddr ramdiskaddr fdtaddr norboot Default is setenv bootargs root dev ram rw console consoledev baudrate hwbootargs othbootargs bootm norbootaddr
99. t is attached to the FCM on the local bus and works at 8 bit mode Boot up message will appear as NAND 1024 Each page contains 2 112 bytes including 2048 bytes of data with 64 bytes spare Each block contains 64 pages including 128 KB of data with 4 KB spare making a total of 8192 blocks NAND Flash supports the following commands Table 7 7 NAND Flash Command Usage Command nand info Description Shows available NAND devices nand device dev nand read nand write nand erase clean off size Shows or sets current device Addr off partition size Addr off partition size Read write size bytes starting at offset off to from memory address addr skipping bad blocks Erase size bytes from offset off will erase on the entire device if it is not specified nand bad Shows bad blocks dump oob off Dumps page nand scrub Cleans NAND by erasing bad blocks Considered unsafe nand markbad off Marks bad block or blocks at offset Considered unsafe nand biterr off Makes a bit error at offset Considered unsafe 2 There four I2C buses in the 40 0 ENP2 module labeled as 12 lt 1 2 3 4 gt For more information see GPIO on page 78 COMX P40x0 2 Installation and Use 6806800R95C BSP U Boot provides the following utilities for 12 bus and devices Table 7 8 U Boot I2C Utilities 2 crc32 chip address 0
100. t top side component side 1 9 65 mm Ordering Information Use the order numbers below when ordering product variants Table 1 4 Ordering Information Order Number Description COMX P4080 2G ENP2 QorlQ P4080 with 2GB DDR3 0 Gigabit Ethernet 5 USB ports COM Express Basic size COMX P4080 4G E ENP2 QorlQ P4080 with 4GB DDR3 1 Gigabit Ethernet 4 USB ports COM Express Basic Size COMX P4040 4G ENP2 QorlQ P4040 with 4GB DDR3 1 Gigabit Ethernet 4 USB ports COM Express Basic Size COMX CAR P1 Artesyn DEVELOPMENT CARRIER FOR QORIQ MODULES COMX P4000 ENP Heatsink for COMX P40x0 ENP2 module HTSNK Product Identification This section provides the serial number and its location on the COMX P4080 ENP2 and COMX P4040 ENP2 modules COMX P40x0 2 Installation and Use 6806800R95C Introduction 1 5 1 4080 ENP2 Thefollowing figure shows the location of serial number on COMX P4080 ENP2 module Figure 1 6 4080 ENP2 Serial Number Location S N NO 1 5 2 COMX P4040 ENP2 The following figure shows the location of serial number on COMX P4040 ENP2 module Figure 1 7 4040 ENP2 Serial Number Location S N NO COMX P40x0 ENP2 Installation and Use 6806800R95C 35 Introduction eee EEE 36 COMX P40x0 2 Installation and Use 6806800R95C Chapter 2 Hardware Preparation and Installation __ 2 1 2 1 1 Environmental Power Requ
101. te that usb start reset must be executed before the other commands can be run Below are usage samples of usb start usb start Re start USB USB Register 10011 NbrPorts 1 USB EHCI 1 00 Scanning bus for devices 3 USB Device s found Scanning bus for storage devices 1 Storage Device s found COMX P40x0 ENP2 Installation and Use 6806800R95C 117 BSP 7 19 SerDes 40 0 ENP2 module has three Serializer Deserializer SerDes banks including a total of 18 lanes For more information the SerDes see SerDes Block on page 72 This includes the SerDes lane distribution and options when it is routed to the COM Express connectors U Boot provides rcw utilities to switch SerDes lanes among the twelve SerDes RCW options A checking feature is also supported Below is a usage sample of the utilities rcw list Lists the status of RCW sections rcw active lt option gt active lt option gt RCW lt option gt range 1 12 rcw check current Checks the current RCW with which system boots up rcw check active Checks the status of the active RCW section rcw check backup Checks the status of all or backup RCW section s option lt option gt range 1 12 The steps below are used to activate specific SerDes RCW options e active lt option gt to activate the SerDes RCW option e Power off the board For RCW options 7 or 8 a means to change the SerDes clock
102. this Manual usa iis Doo tod PEOR RACE wd Voted eati v di ba etr dw iovis Ua dd 11 Safety Notes MERE nee 15 oo OC DRE NEN TG 19 1 25 INNO hu EM 25 1 2 Standard une Re rre vue xr nr CHE A ne 26 1 3 Mechanical Data 2 UN Ub ID EE 29 1 3 1 4080 2 31 1 3 2 4040 2 33 1 4 Ordering Information 2 2 2 2 2 2 34 1 5 Product Identification 34 1 51 08 2 35 1 5 2 4040 2 22205 eer 35 2 Hardware Preparation and Installation 37 2 1 Environmental and Power Requirements 37 2 1 1 Environmental 37 2 2 Unpacking and Inspecting Enclosure 39 2 3 Installing and Removing the Module on the Carrier Board

COMX-P40x0 ENP2 Installation and Use (January 2015)

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