Home

71M6521 Demo Board User's Manual

1. ss 69 2 5 TERIDIAN Application Notes ssnnmnnnnnnnnmnnnmnnsnnnenennnnnennnnenennnenenennneenennnnennnnneenee 69 3 Hardware Description 3 1 D6521T4A7 Demo Board Description Jumpers Headers Switches Test Points Connectors 71 3 2 Demo Board Hardware Specifications sienne 74 3 3 CHanges to the 0652 7 nn tt 75 3 31 Increased ESD 75 3 3 2 Improved Accuracy at Low Currents sise 75 3 39 Access to the IGE JE Signal uiuit eher Duce d ones e Pe rac uu Handi Ge Por nte 75 3 3 4 Default Configuration for Resistive Current Shunt ss 75 34 652114410 Features eoim tunt nimia nne un totus nasa ee sca RAOSE NANREN iss 76 3 4 1 D6521T4A10 Feature Summary LL 76 3 4 2 D6521T4A10 Features for the India Market ss 77 3 4 3 D6521T4A10 Board Descriptlon roit iei 77 4 78 41 64 Demo Board Electrical Schematic 06521 4 7 2 2 1 79 4 2 64 Demo Board Electrical Schematic 06521 4 8 2 11 81 4 3 64 Pin Demo Board Electrical Schematic 06521 4 10
2. EE EE e rr A Gees S Adobe Rea 1 dem 8 back Psignums 5 64 8 7796 is am Figure 1 12 Emulator Window Showing Erased Flash Memory and File Load Menu Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 35 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 9 0 THE PROGRAMMING INTERFACE OF THE 71M6521 Flash Programmer ICE Interface Signals The signals listed in Table 1 12 are necessary for communication between the TFP2 or ICE and the 71M6521 Signal Direction Function E TCLK Output from 71M6521 Data clock E RXTX Bi directional Data input output E RST Bi directional Flash Downloader Reset active low Table 1 12 Flash Programming Interface Signals The same hardware and software precautions mentioned for emulator ICE operation in section 0 apply to TFP2 operation 1 10 DEMO CODE 1 10 1 DEMO CODE DESCRIPTION The Demo Board is shipped preloaded with Demo Code revision 4 7 or later in the 71M6521 chip The code revision can easily be verified by entering the command i via the serial interface see section 1 7 2 Check with your local TERIDIAN representative or FAE for the latest revisi
3. 5 Signal Ground 5 Table 1 2 Straight Cable Connections Table 1 3 shows the connections necessary for the null modem DB9 cable and the pin definitions 5 Signal Ground 5 Table 1 3 Null Modem Cable Connections CHECKING OPERATION A few seconds after power up the LCD display on the Demo Board should briefly display the following welcome text H E L L 0 After the welcome text the Demo Board should display the following information 3 0 10011 The number 3 in the leftmost digit indicates that accumulated Watt hours are displayed In the case shown above 0 001 Wh were accumulated The decimal dot in the leftmost segment will be blinking indicating activity of the MPU inside the 71M6521 In Mission Mode the display can be cycled by pressing the pushbutton PB If no information is stored in the EEPROM Demo Boards with the 71M6521DE or 71M6521BE will only display the HELLO message and then wait for the user to transfer the CE default data via HyperTerminal Demo Board revisions D6521T4A8 and later require the shunt resistor to be connected for proper operation See section 1 8 5 for details ze 2005 2009 TERIDIAN Semiconductor Corporation Page 13 of 111 STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 6 4 SERIAL CONNECTION SETUP FOR THE PC After connecting the DB9 serial port to a PC sta
4. neret 36 Table 1 13 MPU memory locations 71M6521DE FE ie 41 Table 1 14 Values for Pulse Source Registers 4 02 22 1 0 00 00000000 42 Table 1 15 STATUS Register c eI ED ERR n De FED EUH e EUH Lesen uo 43 Table 1 16 CE Memory Locations 71M6521FE 71 65210 45 Table 1 17 CE memory locations 71M6521BE ire 46 Table 1 18 CESTATE Register siennes 46 Table 1 19 Some MPU Memory Locations iii 47 2 51 60 Table 3 1 D6521N12A7 Demo Board 2 2 112 72 Table 4 4 D652T4A7 Demo Board Bill sise 86 Table 4 2 D652T4A8 Demo Board Bill of Material sis 87 Table 4 3 D652T4A10 Demo Board Bill 2 sis 88 Table 4 4 Debug Board Bill of material 101 Table 4 5 71M6521 Pin Description 1 106 Table 4 6 71M6521 Pin Description 2 2 eee nennen nnne n nnne enne nnns 107 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 7 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Page 8 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 1 2 1 3 d
5. Vrms_B Vrms element 2 VISOSUM 25 unsigned 32 0x0053 Irms_B Irms element B 2 9 15050 27 unsigned 32 0 0057 STATUS Status of meter See table for STATUS register 2 unsigned 32 0x0063 CAI Count of accumula count 28 signed 32 0x0067 tion intervals since reset or last clear Whi Imported Wh all LSB of WOSUM 2 signed 64 0x006B elements Whi_A Imported Wh 2 signed 64 0x0073 element A Whi_B Imported Wh 30 signed 64 0x007B element B VARhi Imported VARI all LSB of WOSUM 34 signed 64 0x008B elements VARhi_A Imported VARh 36 signed 64 0 0093 element A VARhi_B Imported VARh 38 signed 64 0x009B element B VAh VAh all elements LSB of WOSUM 3C signed 64 0x00AB VAh A VAh element A signed 64 0x00B3 VAh_B VAh element B 40 signed 64 0x00BB Whe Exported Wh all LSB of WOSUM 44 signed 64 0x00CB elements Whe_A Exported Wh 46 signed 64 0 0003 element Whe_B Exported Wh 48 signed 64 element B VARhe Exported VARh all LSB of WOSUM 4 signed 64 0 00 elements VARhe A Exported VARh signed 64 element A VARhe_B Exported VARh 50 signed 64 0x00FB element B Whn Net metered Wh all LSB of WOSUM 54 signed 64 0x010B elements A Whn_A Net metered Wh LSB of WOSUM 56 signed 64 0x0113 element A for autocalibration Whn_B Net metered Wh 58 signed 64 0x0
6. 55 e E H NEUTRAL VA_IN Figure 4 19 D6521T4A10 Demo Board Bottom View Page 100 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 410 DEBUG BOARD BILL OF MATERIAL Item Reference Value PCB Footprint C2012X7R1H104K TAJB336K010R TAJB106K016R LTST C170KGKT PZC36SAAN RAPC712 A2100 ND PPTCO82LFBN C1 C3 C5 C10 C12 C23 0 C4 33uF 10V C11 10uF 16V B Case D2 D3 LED JP1 JP2 JP3 JP4 HDR2X1 Ji RAPC712 J2 DB9 DB9 J3 HEADER 8X2 8x2pin R1 R5 R7 R8 10K 0805 ERJ 6GEYJ103V R2 R3 1K 0805 ERJ 6GEYJ102V R4 NC 0805 N A R6 0 0805 ERJ 6GEYOROOV SW2 PB Switch PB EVQ PJX05M TP5 TP6 test point TP 5011 U1 U2 U3 U5 U6 ADUM1 100 SOIC8 ADUM1100AR U4 MAX3237CAI SOG28 MAX3237CAI spacer 2202K ND 4 40 1 4 screw PMS4400 0025PH 4 40 5 16 screw PMS4400 0031PH 4 40 nut HNZ440 0805 1812 1812 0805 2x1pin O O1 BR 1 1 2 4 1 1 1 4 2 1 1 1 2 5 1 4 4 2 2 Table 4 4 Debug Board Bill of material Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Manufacturer TDK AVX AVX LITEON Sullins Switchcraft AMP Sullins Panasonic Panasonic N A Panasonic Panasonic Keystone ADI MAXIM Keystone Building Fasteners Building Fasteners Building Fasteners d jTERIDIAN Vendor Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key Digi Key N A Digi Key Digi Key Digi Key Digi Key
7. nennen nnn 57 Figure 2 7 71M6521 with Shunt and iii 59 Figure 2 8 Voltage Divider for V1 o oo eeeeceeeceeeseeeeseeeeaeeteaeeeeaeeteaeeeaeesaeeesaeecaeeeaeeseaeesaeeseaeeenaeeseaeesnaeeseaeeenaeeseaeeenaeetes 61 Figure 2 9 Oscillator Circuit iii 61 Figure 2 10 EEPROM Circuit nennen nenne 62 Figure 2 11 Three Wire EEPROM Circuit iii nnns enne 62 Figure 2 12 ECD Connections 63 Figure 2 13 Optical Interface Block Diagram iii 63 Figure 2 14 Optical Port Circuitry on the Demo Board is 64 Figure 2 15 RESET pin nnne nnne 64 Figure 2 16 RESET Switch Supplied by VBAT iii 65 Figure 2 17 RESET Switch with Multiple Supplies ss 65 Figure 2 18 Meter with Calibration System ie 66 Figure 2 19 Calibration System Screen iii 67 Figure 3 1 71M6521T4A7 Demo Board Connectors Jumpers Switches and Test 73 Figure 3 2 Top Left and Bottom Copper Right Structures at Current Inputs 75 Figure 3 3 D6521T4A10 Demo Board 76 Figure 3 4 D6521T4A10 Demo Board with ICE Ad
8. slo REFA mejo PS_SELO RB VA_IN HIGH VOLTAG Figure 3 1 71M6521T4A7 Demo Board Connectors Jumpers Switches and Test Points Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 73 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 3 2 DEMO BOARD HARDWARE SPECIFICATIONS PCB Dimensions Dimensions 4 5 x 3 8 114 3mm x 96 5mm Thickness 0 062 1 6mm Height w components 2 0 b1mm Environmental Operating Temperature 40 85 function of crystal oscillator affected outside 10 C to 60 C Storage Temperature 40 100 Power Supply Using AC Input Signal 180V 700V rms DC Input Voltage powered from DC supply 5VDC 0 5V Supply Current 25mA typical Input Signal Range Voltage Signal VA 0 240V rms Current Signals IA IB from Transducer 0 0 25V p p Interface Connectors Supply Jack J1 to Wall Transformer Concentric connector 2 5mm Emulator J14 10x2 Header 0 05 pitch Emulator J15 5x1 Header 0 1 pitch Input Signals Spade terminals and 0 1 headers on PCB bottom Debug Board J2 8x2 Header 0 1 pitch Target Chip U5 LQFP64 QFN68 Functional Specification Time Base Frequency 32 768kHz 20PPM at 25 C Time Base Temperature Coefficient 0 04 Controls and Displays Reset Button SW2 Numeric Display 8 digit LCD 8 seg
9. o e EFR74 m 2 T i R17 ilo Figure 4 14 D6521T4A8 Demo Board Bottom View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 95 of 111 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Figure 4 15 D6521T4A8 Demo Board Bottom Copper Page 96 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 4 9 D6521T4A10 DEMO BOARD PCB LAYOUT tee 2 ee fT ERIC IAD EE di RV1 VA_IN NEUTRA Figure 4 16 D6521T4A10 Demo Board Top View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 97 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Figure 4 17 D6521T4A10 Demo Board Top Copper Page 98 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Figure 4 18 D6521T4A10 Demo Board Bottom Copper Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 99 of 111 TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP ee R108 mm _ U R109 R155 Riso map mL mz e mm e 5 C41 R154 SEG26 D1006 21518 ene e m m g
10. 6521 3ko EEPROM 3kQ Figure 2 11 Three Wire EEPROM Circuit 2 3 5 LCD The 71M6521 has an on chip LCD controller capable of controlling static or multiplexed LCDs Figure 2 12 shows the basic connection for LCDs Note that the LCD module itself has no power connection Page 62 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d jJTERIDIAN 6521 segments commons Figure 2 12 LCD Connections 2 3 6 OPTICAL INTERFACE The 71M6521 IC is equipped with two pins supporting the optical interface OPT_TX and OPT_RX The TX pin can be used to drive a visual or IR light LED with up to 20mA a series resistor R2 in Figure 2 13 helps limiting the current The OPT_RX pin can be connected to the collector of a photo transistor as shown in Figure 2 13 V3P3D 71 6521 100pF 100kO C 00 Phototransistor 2 lt M 9 V3P3D I I LED AN gt OPT_TX I Figure 2 13 Optical Interface Block Diagram J12 on the Demo Boards has all the provisions for connecting the IR LED and photo transistor see Figure 2 14 Depending on the required LED current R79 may have to be scaled Similarly R84 may be scaled or removed depending on the current generated by the photo transistor Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 63 of 111 l J TERIDIAN 71M6521 Demo Board User s Manual V3P3 J12 OPTICAL I F F
11. 2 ojo mj mi mi m 2 m m Z gt 2 o RJ 3EKF2002V RC1206FR 073R40L m mi 2 m N lt Table 4 3 D652T4A10 Demo Board Bill of Material Page 88 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 4 7 D6521T4A7 DEMO BOARD PCB LAYOUT 42 22 a e 2 R79 ZIC 71 8521 EKTE 64 PIN SN D652IT4AT ice REV 7 0 pu r e GNI ERST TELK RXTX L 4 m o 099 7 e THUXOUT gt et er sr lt ed et e 8 a R107 n25 cmn RR R106 N uf C21 va IN HIGH VOLTAGE Figure 4 8 D6521T4A7 Demo Board Top View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 89 of 111 2005 2009 TERIDIAN Semiconductor Corporation d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP ee e ee e a ER R108mag _ U4 eo Enc40 R3 R109 mm R155 2 e f En e ume E 5 041 R154 ee SEG26 DIDO6 R100 C34 RISI Y1
12. Page 4 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN 2 2 6 Compensating for Non Linearities sise 57 2 2 7 Calibrating Meters with Combined CT and Shunt 58 2 3 Schematic Informaltion einen esee cunt secca bs nai ca nera sceecccedcacessadee ances 61 2 3 1 Gomponents for the Vi ERE ERREUR UE eee E Rep Iud 61 PROV MEEO Cuom 61 2353 acd 62 2 8 8 Connecting Three Wire 5 nennen 62 235 UC 62 236 Optical InterfaGG ue e rete nre EE ier er 63 237 and PB SWINGS e Doe ep ett eae 64 2 3 8 Operation Willi batteries 1 1 1G ee IEEE EH 65 2 4 Testing the Demo Board ssnnnnnnnnnnnnnnnnnnnsnnnennennnnennnnnnenennnenenennneenennnnenennneenee 66 2 4 1 Functional Meter Test 66 242 EEPROM aie nette Bene eda edt tae ete 67 85 68 2 4 4 Hardware Watchdog Timer 68 2 45 AE E 68 2 4 6 Supply Current
13. When only a partial record is entered the Demo Board will time out after around 30 seconds and then send lt CR gt lt LF gt A number of pre assembled hex records is supplied with the Demo Code It is easier to send a pre assem bled record using the send text file feature in the Transfer menu of Hyperterminal than assembling hex record from scratch The pre assembled hex records are contained in a ZIP file named 6521D_scripts zip on the CD ROM supplied with the Demo Kits Table 1 10 shows the records available and their function _Hex Record Name Function set_6521D_defaults txt Sets the default configuration including all CE variables Transferring this record is necessary when data in the EEPROM is lost or compromised read_6521D_temp txt Displays the current temperature reading from the CE set_6521D_temp txt This record can be edited to set the nominal calibration temperature read_6521D_power txt Displays the valid power data read_6521D_ce txt Displays CE data from memory locations 0x1020 to 0x10FF read_6521D_config txt Displays configuration data This hex record includes comment text helping to interpret the received data set_6521D_rtm txt Sets up the real time monitor Table 1 10 Pre Assembled Hex Records A worksheet named 6521B Register Interpreter in the Calibration Utility Excel file 651X Calibration Worksheet XLS or 65XX Ca
14. rennes 37 1 10 3 Accessing LCD and Sleep Modes from Brownout Mode 37 1 10 4 Demo Code Memory Locations for the 71 6521 37 1 10 5 Code Memory Locations 71M6521DE FE iii 44 1 10 6 Code Memory Locations 71M6521BE iii 45 1 10 7 Some MPU Code Memory Locations 71M6521BE 47 17 48 2 APPLICATION INFORMATION piiissiceisccssacesssccececesscccescteccasnscaesssecnescaesassceaceessacuensaidcocedeacessncazande sssdezendcsieedsderds 49 24 Calibration Theoty encre tenere recess coca cocedcncessaceesnenscoedesnsdecueeesteudcceeds 49 2 1 1 Calibration with Three Measurements sir 49 2 1 2 Calibration with Five Measurements iii 51 2d 3 Fast CalibratiOn sec uidens 52 2 2 Calibration Proc dures si ic scccccacciccccstscccacessetpsscesssceecentesaceveatesseedeccetesaucesanessacesedueseatesceccssncuecoecesatessdareaseoextders 53 2 2 1 General Precautions M 53 2 2 2 Calibration Procedure with Three Measurements 1 nene nennen 54 2 2 8 Calibration Procedure with Five Measurements nene 54 2 2 4 Procedure for Fast Calibration eit 55 2 25 GalibratioriSpreadsheets eee im e ade Fon tee ELE EL EB HERE Pea DE oue Ce SELL ne heeded 55
15. 250VDC 8 06K 1000pF _ TP10 DO NOT INSTALL radial lead style 4 c1 u2 C10 R83 2 vi D3 2200uF 16V L431 GND NC ek 16 9 1 1 RVI 1N4736A NS le Gb Nu NC VARISTOR 1W c2 cnr AVX VE24M00511K 10uF 3V GND R8 R4 10uF 6 3V D8 vi 15 06 TANTALUM lt 25 5 TANTALUM lt 33010 0 47uF 1000VDC 04 R7 VOLTAGE 1N4148 130 R86 CONNECTIONS 4 1 20 0K 1 I GND R6 1206 PACKAGE R118 100 2W i 1 Bis FOR SHUNT OPERATION 712 2 AVOCENT SUPPLY 1 REMOVE L9 AND L12 Va 2 POPULATE R88 z YA 600 OHM 3 Only one shunt can be used at a time vB LIVE FOR CT OPERATION 1 50 1 POPULATE L9 AND L12 STAR CONNECTION R15 R16 R17 R18 2 REMOVE R88 av ee 5 uF 2M 1 1W 274K 1 270K 1 698 1 be 3 CHANGE R24 R25 TO 3 40HM AT 05 50 TANTALUM VA IN END 600 OHM R32 c9 1 TP2 po NOT 750 1 1000 2 VA IA 54 lA L12 IB 53 BEFA CCS LL NSPS NG Rai al gt vrer 16 600 OHM 0 0 1uF 17 600 S VARS 47 vss lA IN rcov s Us l 1 1 IN 2 d l 2 AT R14 750 1 C24 b R24 gt R25 4 DO NOT INSTALL Note R24 is 10K and R25 ist ix HOUT 61 your c16 C15 NC if using current shunt for 1 V3P3 CURRENT 25 32 768kHz 1206 PACKAGE 27pF CONNECTIONS lt XN 59 5 L4 600 OHM XN amp 15 6
16. 508 8800 FAX 714 508 8877 http www teridian com Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 111 of 111
17. C48 22pF added at J14 IMPROVED ACCURACY AT LOW CURRENTS Improvement of meter accuracy at low currents was achieved by assigning both copper structures at the current inputs top and bottom to the V3P3 net as shown in Figure 3 2 Figure 3 2 Top Left and Bottom Copper Right Structures at Current Inputs ACCESS TO THE ICE E SIGNAL Another improvement is the added access to the ICE E signal via the filter formed by R100 1kQ and C12 1 000pF for the TFP 2 Flash Programming Device at the programming headers J 15 pin 46 and J14 pin 2 These pins allow the TFP 2 to reset the 71M6521 chip after a flash erase operation using the watchdog timeout mechanism allowing flash memory parts with the SECURE bit set see the data sheet for more information to be erased and reprogrammed DEFAULT CONFIGURATION FOR RESISTIVE CURRENT SHUNT Due to the majority of the 71M6521 meter designs using resistive shunts the D6521T4A7 Demo Board are shipped configured for shunts To convert the D6521T4A7 Demo Board to CT configuration the following changes have to be made 1 Remove R88 2 Install L12 L9 R19 and C10 3 Remove R24 and install the proper burden resistor combination at R24 and R25 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 75 of 111 71 6521 Demo Board User s Manual SEMICONDUCTOR CORP 34 D6521T4A10 FEATURES 341 D6521T4A10 FEATURE SUMMARY The f
18. Default value is 392 Pulse 3 Source for software See table for PulseWSource and JD unsigned 8 0x001D source pulse output 3 PulseVSource Pulse 4 Source for software See table for PulseWSource and unsigned 8 0x001E source pulse output 4 PulseVSource Scal Duration for auto Count of accumulation intervals to F unsigned 16 0x001F calibration in be used for auto calibration seconds Page 38 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d J TERIDIAN Name Purpose Function or LSB Value CLI Format En XDATA Vcal Voltage value to be Nominal RMS voltage applied to 10 unsigned 16 0x0021 used for auto all elements during auto calibration calibration LSB 0 1V Ical Current value to be Nominal RMS current applied to 11 unsigned 16 0x0023 used for autocalibra all elements during auto calibra tion tion LSB 0 1V Power factor must be 1 VIhrshld Voltage at which to LSB 275 12 unsigned 16 0x0025 measure frequency zero crossing etc This feature is approximated using the CE s sag detection PulseWidth Maximum time pulse t 2 PulseWidth 1 397us 13 signed 16 0x0029 is on OxFF disables this feature Takes effect only at start up temp_nom Nominal tempera Units of TEMP_RAW from CE 14 unsigned 32 0x002B ture the temperature The value read from the CE must at
19. Same LSB as E 29 he factors for low currents on element 0 and 1 oxta 068 me is the operating RMS current This parameter is added to the VAR calculation for element B to mu compensate for input noise and truncation Page 44 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 SEMICONDUCTOR CORP the gain configured by JA SHUNT or SHUNT VAROSUM X ENDE sum of VAR samples from each wattmeter element In 8 is 251158 The sum of Watt samples from each wattmeter element In 8 is ox11C8 the gain configured by JA SHUNT or IB SHUNT 0 11 8 CESTATUS P See description of CE status above MAINEDGE The number of zero crossings of the selected voltage in the pre 0 7 0 11 0 X vious accumulation interval Zero crossings are either direction and are debounced 0 11 a Filtered unscaled reading from the temperature sensor Table 1 16 CE Memory Locations 71M6521FE 71M6521DE 1 10 6 CE CODE MEMORY LOCATIONS 71M6521BE All CE memory locations are listed in the 71M6521BE data sheet These locations are listed again in Table 1 17 along with the physical addresses used by the hex records interface These constants control the gain of their respective channels The nominal value for each parameters is 2 16384 The gain of each channel is directly proportional to its CAL parameter Thus if the gain of a channel is 196 slo
20. 0 353 30 sz Bx NB er SENG 4 31 SEGi4 i03 SEGTS Ke SEG14 35 SEGIS qH 58 5 40 5F 5E NC 24 SEGIZ sects 8 NG 5A 5G 5D 33 56616 5G el seo a i ane MESE seen 35 1 SEGIB 13 e E 30 10 R101 C35 SEG18 42 5 29 01009 1 14 NC 4A4G 4D 29 56609 1K ow R95 T SEGSU DIO10 SEGOS SEGOB enD bu 01011 en 5 AM NONG 2L SEG31 DIO11 21 7 sEGSS DIOIS 55606 ESSO LE 7 22 19 re 24 SEG29 DIO09 5 938 01016 127 _se a7 D1017 secor T 20 NS o NC TENG 5 637 01017 51 1816 16 10 22 COMI V3P3D 1000pF 58 GND 2 ud oe com 13 0 S7 COMO 14 COMI 2 COME R10 1 Lii COMS R3 62 043 R154 0 m ckrsT J LCD 9 gt TMUXOUT E 8 ckresrisEGis di 1K lt 4 TMUXOUT SEG28 D108 4 _ ww R12 cat 62 62 NC RI NC d UART TX sl m VARZAK 45 1 1 2 No External Bat D HEADER 8X2 RE Fi JP12 MODE 2 3 External Bat Available R13 C40 R97 R98 R99 10K 100PF 62 62 62 R150 C44 m RST EMUL E RST 63 0 1000pF 1 E RST SEG32 1 1 E RXX TOLUSEGSS SERIAL EEPROM 32 m gt T GEE R108 5 R109 c20 cag 22 NI 10K 10K 22pF 2 uF 8 1 m 1000pF
21. 1 65 Expected voltage Measured voltage PHASE B Energy reading at 0 Energy reading at 60 Voltage error at 0 3 642 41 65 Expected voltage Measured voltage PHASE C Energy reading at 0 3 8 Energy reading at 60 3 6 Voltage error at 0 Expected voltage 240 Measured voltage 236 fraction 0 03846 0 03642 0 0165 fraction 0 03846 0 03642 0 0165 fraction 0 038 0 036 1 666667 0 016667 CAL_IA CAL_VA PHADJ_A CAL_IB CAL_VB PHADJ_B CALIC CAL VC PHADJ C 16384 16384 16384 16384 16384 16384 16756 16659 193 16756 16659 193 16746 16662 189 Current lags voltage inductive Positive direction PAR A Current Current leads voltage capacitive aa E Generating Energy Using Energy Readings Enter 0 if the error is 0 enter 3 if meter runs 3 slow Figure 2 4 Calibration Spreadsheet for Five Measurements Page 56 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Procedure 1 Turn on excitation Load angle must be exactly 0 00 degrees 2 Enable CE wait onds 3 1 2 4 CE0 D 5 BE number of accumulation intervals 3 enter accumulated 8 5 get TEMP X from CE write to TEMP If ne rting fresh calibration factors enter value of current factors in column Old Enter
22. 1 7 USING THE DEMO BOARD The 71M6521 Demo Board is a ready to use meter prepared for use with an external current transformer Using the Demo Board involves communicating with the Demo Code An interactive command line interface CLI is available as part of the Demo Code 71M6521FE The CLI allows all sorts of manipulations to the metering parameters access to the EEPROM initiation of auto calibration sequences selection of the displayed parameters changing calibration factors and many more operations 1 7 1 COMMUNICATION OPTIONS Before evaluating the 71M6521 Demo Board users should get familiar with the commands and responses of the CLI A complete description of the CLI is provided in section 1 7 2 The Demo Codes for the 16KB and 8KB flash versions 71M6521BE and 71M6521DE can be controlled via a protocol that involves Intel Hex Records This protocol is described in section 1 7 4 A summary of the communication options is shown in Table 1 5 71M6521BE 71M6521DE 71M6521FE Description in 1 7 2 1 7 2 1 7 1 section File transfer on Not necessary CE defaults Not necessary power up Table 1 5 Summary of Communication Options Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 15 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 7 2 CYCLING THE LCD DISPLAY The Demo Codes for all versions of the 71M6521 Demo Board allow cycling of the display using the PB button By briefly
23. 73 20 69 73 20 61 Response from Demo Code gt 0 Disables the EEPROM Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 67 of 111 d STERIDIAN 71M6521 Demo Board User s Manual 2 4 3 RTC Testing the RTC inside the 71M6521 IC is straightforward and can be done using the serial command line interface CLI of the Demo Code To set the RTC and check the time and date we apply the following sequence of CLI commands gt M10 LCD display to show calendar date gt RTD05 09 27 3 Sets the date to 9 27 2005 Tuesday gt M9 LCD display to show time of day gt RTT10 45 00 Sets the time to 10 45 00 AM PM distinction 1 22 33PM 13 22 33 2 4 4 HARDWARE WATCHDOG TIMER The hardware watchdog timer of the 71M6521 is disabled when the voltage at the V1 pin is at 3 3V V3P3 On the Demo Boards this is done by plugging in a jumper at TP10 between the V1 and V3P3 pins Con versely removing the jumper at TP10 will enable the hardware watchdog timer Programming the flash memory or emulation using the ADM51 In Circuit Emulator can also be done when the ICE_E pin is pulled high 2 4 5 LCD Various tests of the LCD interface can be performed with the Demo Board using the serial command line interface CLI The display outputs are enabled by setting the LCD EN register to 1 Register Name Address bits R W_ Description LCD_EN 2021 5 Enables the LCD display W
24. If this voltage is below the minimum required operating voltage which is usually indicated by V1 lt VBIAS and if no battery is connected to the VBAT pin the chip is powered off Battery modes can be used if a battery or other DC source supplying a DC voltage with in the operating limits for the battery input is applied to the battery pin VBAT pin 49 of the chip On the Demo Board the battery should be connected to pin 2 and 3 of JP8 In order to prevent corruption of external memory which could occur when main power is removed from the Demo Board with no battery present the Demo Code is shipped with iS the battery modes DISABLED When the battery modes are disabled the MPU will be halted once it enters brownout mode even when a baitery is present See section 1 10 3 for instruction on how to enable battery modes If the main power source internal or external power supply is removed while a battery is connected to JP8 as described above and if the battery modes are enabled with header JP12 the 71M6521 automatically enters Brownout mode The Demo Code will then automatically transition from Brownout mode to Sleep mode By pressing the pushbutton PB the chip is temporarily brought back to LCD mode After a few seconds in LCD mode the chip returns to Sleep mode By pressing the RESET pushbutton while the chip is in Sleep mode the chip will enter Brownout mode In Brownout mode the analog functions di
25. Metering Values Shown on the LCD Display Description Allows user to select internal variables to be displayed Usage M option option Command M kWh Total Consumption display wraps around at 999 999 combinations M1 Temperature C delta from nominal M2 Frequency Hz phase kWh Total Consumption display wraps around at 999 999 phase kWh Total Inverse Consumption display wraps around at 999 999 5 phase kVARh Total Consumption display wraps around at 999 999 M6 phase kVAh Total Inverse Consumption display wraps around at 999 999 7 phase VAh Total display wraps around at 999 999 M9 Real Time Clock M10 Calendar Date M13 n Main edge count n 0 accumulated n 1 last second M17 Battery voltage Display will return to M3 after a few seconds Example M3 1 Displays Wh total consumption of phase A Displays for total consumption wrap around at 999 999kWh or kVARh kVAh due to the number of available display digits Internal registers counters of the Demo Code are 64 bits wide and do not wrap around The internal accumulators in the Demo Code use 64 bits and will neither overflow nor wrap around under normal circumstances The restriction to only six digits is due to the require ment to provide one digit showing the display mode that is separated by a blank digit from the displayed values Commands for Controlling the RMS Values
26. User s Manual SEMICONDUCTOR CORP Table of Contents 1 Getting Started e 9 1 1 9 1 2 Safety ESD 9 1 3 Demo Kit Contents intend dete ciii 9 PEE u 10 1 5 Suggested Equipment not Included nee 10 1 6 Demo Board Test Setup esse adresses 10 1 6 1 12 1 6 2 X Cable for Serial 13 1 6 3 Checking Operation 13 1 6 4 Serial Connection Setup for the PC iii 14 1 7 Using the Demo Boat diiicscciccsiiscctestiecccsssntecasteanssosteccstentsanscesdsesnserdcaneteacendacanduaasessteadensctuassaentessesacusavensdresadaats 15 1 7 1 Communication Options ed EF e e a DOR 15 17 2 Cycling the LOD Display derer reo E terio hd teret on Podio e ed ERE agua 16 1 7 8 Serial Command Line Interface 0 0024224 1 0 ia enn tn nnns 17 1 7 4 Communicating via Intel Hex Records sienne 22 1 75 Using the Battery Modes sis ui RE
27. after interfacing the voltage and current sensors to the 71M6521 chip When properly interfaced the V3P3 power supply is connected to the meter neutral and is the DC reference for each input Each voltage and current waveform as seen by the 6521 is scaled to be less than 250mV peak CALIBRATION PROCEDURE WITH THREE MEASUREMENTS The calibration procedure is as follows 1 All calibration factors are reset to their default values i e CAL IA CAL VA 16384 and PHADJ A 0 An RMS voltage Vigea consistent with the meter s nominal voltage is applied and the RMS reading Vactual Of the meter is recorded The voltage reading error Axv is determined as Axv Vactual Videal Videal Apply the nominal load current at phase angles 0 and 60 measure the Wh energy and record the errors Eg AND Ego Calculate the new calibration factors CAL CAL VA and PHADJ A using the formulae presented in section 2 1 1 or using the spreadsheet presented in section 2 2 4 Apply the new calibration factors CAL IA CAL VA and PHADJ A to the meter The memory locations for these factors are given in section 1 9 1 Test the meter at nominal current and if desired at lower and higher currents and various phase angles to confirm the desired accuracy Store the new calibration factors CAL IA CAL VA and PHADJ A in the EEPROM of the meter If a Demo Board is calibrated the methods shown in section 1 9 2 can be used CALIBRATION PROCEDURE
28. and current The load angle must be exactly 0 00 degrees Wait 2 seconds Clear the accumulators e g with CLI command 1 2 Wait 30 seconds Disable the CE e g with CLI command CE0 Read accumulated values from MPU RAM registers and enter these in the spreadsheet supplied on the Demo Kit CD ROM Use the addresses as listed in Table 1 13 Enter applied voltage and current as well as the number of completed accumulation intervals in the spreadsheet Apply the measured IC temperature in register accessible at 14 2 2 5 CALIBRATION SPREADSHEETS Calibration spreadsheets are available from TERIDIAN Semiconductor They are also included in the CD ROM shipped with any Demo Kit Figure 2 3 shows the spreadsheet for three measurements with three phases in use only one phase needs to be used for the 71M6521 chip Figure 2 3 shows the spreadsheet for five measurements with three phases only one phase needs to be used for the 71M6521 chip Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 55 of 111 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP T 9 D LAN pores Results will show in green fields SEMICONDUCTOR CORP EE MUX_DIV AC frequency 60 REV 4 14 click on yellow field fo select from pull down list Date 12 31 2006 2520 6154 Author WJH 0 023804 PHASE A Energy reading at 0 2 i CALIA 16384 16219 p ipo Energy reading at 60 25 0 025 CA
29. and current signals to the meter It should be noted that the current flows through the CT or CTs that are not part of the Demo Board The Demo Board rather receives the voltage output signals from the CT An optical pickup senses the pulses emitted by the meter and reports them to the calibrator Some calibration Systems have electrical pickups The calibrator measures the time between the pulses and compares it to the expected time based on the meter Kh and the applied power Optical Pickup for Pulses Calibrator Figure 2 18 Meter with Calibration System TERIDIAN Demo Boards are not calibrated prior to shipping However the Demo Board pulse outputs are tested and compared to the expected pulse output Figure 2 19 shows the screen on the controlling PC for a typical Demo Board The number in the red field under As Found represents the error measured for phase A whereas the number in the red field under As Left represents the error measured for phase B Both numbers are given in percent This means that for the measured Demo Board the sum of all errors resulting from tolerances of PCB components CTs and 71M6521 tolerances was 2 8 and 3 8 a range that can easily be compensated by calibration Page 66 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual en CORR 11 WinBoard Meter Testing Serial No 3625 loj xl Testing Functions Options Eile
30. bit in the RAM and can then be left unconnected If enabled a 0 1uF capacitor to GNDA should be connected XIN Crystal Inputs A 32kHz crystal should be connected across these pins Typically a 27pF XOUT capacitor is also connected from each pin to GNDA It is important to minimize the capacitance between these pins See the crystal manufacturer datasheet for details Table 4 5 71M6521 Pin Description 1 2 Page 106 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d J TERIDIAN Digital Pins LCD Common Outputs These four pins provide the select signals for the LCD display Dedicated LCD Segment Outputs Multi use pins configurable as either LCD SEG driver DIO 0104 SCK 0105 SEGO SEG18 SEG24 DIOA SEG31 DIO11 SDA when configured as EEPROM interface WPULSE 0106 VARPULSE 0107 when configured as pulse outputs If unused these pins must be configured as outputs Multi use pins configurable as either LCD SEG driver or DIO If unused these pins must be configured as outputs Multi use pins configurable as LCD driver or DIO QFN 68 package only If unused I O din these pins must be configured as outputs 5 937 01017 5 41 01021 E RXTX SEGS8 Multi use pins configurable as either emulator port pins when ICE_E pulled high or LCD SEG drivers when ICE_E pulled low E_TCLK SEG33 EP ICE_E ICE enable When zero E_RST E_TC
31. by Vs Rg 177mV Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 29 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Resolving for get Rr VMAX 177mV 600V 30 177mV 170 45 This divider ratio can be implemented for example with a combination of one 16 95kQ and one 1000 resistor 1 8 4 CONNECTING DEMO BOARDS TO A SHUNT RESISTOR Most Demo Kits are shipped with a pre wired shunt resistor 40010 as shown in Figure 1 7 to IA IN to VA e to IA reference reference to meter power supply to LOAD from NEUTRAL Figure 1 7 Pre Wired Shunt Resistor For proper operation and accuracy the wiring instructions given in section 1 8 5 have to be observed With proper shunt wiring very accurate measurements can be achieved The load line shown in Figure 1 8 was obtained using a 40040 shunt resistor connected to a D6521T4A8 Demo Board 22 Dan Figure 1 8 Load Line with Shunt Resistor Page 30 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d jJTERIDIAN Important safety precautions apply when operating the Demo Board in shunt mode In shunt configuration the whole Demo Board will be at line voltage Touching the board or any components must be avoided It is highly recommended to isolate Demo Board and Debug Board when used and to
32. eee pem Keystone ATMEL 7Wesirier TERIDIAN 5 1 U END VIM808 DP RC HV VARITRONIX vt ___ ECS 377125 7X IR ECS 744 RC120 PIOOKFOT ND Panasonic E 9 5 D 2 3 Table 4 2 0652 4 8 Demo Board Bill of Material Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 87 of 111 d J TERIDIAN 4 6 D6521T4A10 DEMO BOARD BILL OF MATERIAL C em re s Doo o BT BTA 5 6 52755050857 Own lt 8 91 08 C9 610 012 614 026 C2 _____ 445 1298 LND ________ 1608 2 102 TDK f _____ PT oe _ caeso 24 E 15 Rusimutscisci neo non P TC 18 R19 021 R24 R25 C41C48 0 169 0228H PCEATICTND Qe 0160800618270 2 57 OU ELECTROLYTIC 4 ______ Panasonic 4 cece O O OO RC0603 445 1285 1 ND TDK axial 75 1251530 Vishay RC0608 445 1281 1 0805 445 1371 1 ND DO41 TNA7S6ADICT ND DIODES D035 IN4T48DICT ND DIODES 404 1104 ND Stanley 500 123 BZIE2CAV7 FDICT ND DIODES 500 323 UCLAMP3301DCT ND SEMTECH 500 123 1N4148WTP
33. is 600V and 208A and if the measurement was taken at 240V we determine QUANT as follows l 5494 QUANT 11339 600 208 7 4162 10 QUANT is to be written to the CE location Ox2F It does not matter which current value is chosen as long as the corresponding error value is significant 5 error at 0 2A used in the above equation will produce the same result for QUANT An alternative method for obtaining QUANT is as follows WnSUM holds an energy value with an LSB equal to 6 6952 10 vmax Wh The LSB for QUANT is not an energy value but a power value and is 7 4162 1079 W If I divide the QUANT LSB by 3600 we get 2 06 10 Wh per accumulation interval assuming an interval of 1000 ms which is a factor 3 25 less than the LSB of WnSUM This factor is due to the fact that QUANT is added in the CE signal flow before the summation to get WnSUM In order to equate it to the WnSUM LSB we need to correct the QUANT LSB by 2713 3600 where Fs is the sampling frequency 2520 Hz for standard demo code This means that the value obtained from WnSUM needs to be scaled up by 1107 422 to get the corresponding value for QUANT Example In WASUM an average noise of 4 LSBs is observed while no current is flowing in phase A The corresponding value to be placed in QUANT then calculates to QUANT 1107 422 4 4429 7 which should be rounded up to 4430 Input noise and truncation can cause similar error
34. is used higher secondary currents will result causing excessive voltages at the 71M6521 inputs Conversely CTs with much higher ratio will tend to decrease the useable signal voltage range at the 71M6521 inputs and may thus decrease resolution The 71M6521 Demo Board comes equipped with its own network of resistor dividers for voltage measurement mounted on the PCB The resistor values result in a ratio of 1 3 393 933 This means that VMAX equals 276 78mV 3 393 933 600V A large value for VMAX has been selected in order to have headroom for overvoltages This choice need not be of concern since the ADC in the 71M6521 has enough resolution even when operating at 120Vrms or 240Vrms If a different set of voltage dividers or an external voltage transformer is to be used scaling techniques similar to those applied for the current transformer should be used In the following example we assume that the line voltage is not applied to the resistor divider for VA formed by R15 R21 R26 R31 and R32 but to a voltage transformer with a ratio N of 20 1 followed by a simple resistor divider We also assume that we want to maintain the value for VMAX at 600V to provide headroom for large voltage excursions When applying VMAX at the primary side of the transformer the secondary voltage V is Vs VMAX Vs is scaled by the resistor divider ratio Rr When the input voltage to the voltage channel of the 71M6521 is the desired 177mV V is then given
35. pressing the button the next available parameter from Table 1 6 is selected This makes it easy to navigate various displays for Demo Boards that do not have the CLI Temperature difference from calibration temperature Displayed in 0 1 C 2 Frequency atthe VAIN input He at the VA_IN Frequency atthe VAIN input H2 Hz Accumulated real energy Wh The default display setting after power up or reset Date mm dd Count of zero crossings in the last accumulation interval 15 Ms current at RMS current at phase input A 0 A RMS current at phase input A 0 A Table 1 6 Selectable Display Options Page 16 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g TERIDIAN 1 7 3 SERIAL COMMAND LINE INTERFACE CLI Once communication to the Demo Board is established press lt CR gt and the Demo Program prompt gt should appear Type gt i1 to verify that the Demo Program version is revision 4 7 or later Users should familiarize themselves with the Demo Program commands described in the tables below Due to limited memory space there is no help menu The Demo Program Demo Code is compiled with EEPROM specified as the non volatile memory This means that the default calibration factors are stored in flash memory whereas the calibration factors resulting from an actual calibration are stored in EEPROM The tables below descr
36. provide separate power supplies for the Demo Board and Debug Board Emulators or other test equipment should never be connected to a live meter without proper isolation USB isolators are available from various vendors Only one shunt resistor can be used in a meter since isolation cannot be maintained when using more than one shunt resistor 96909 1 8 5 CONNECTING DEMO BOARD REVISIONS D6521T4A7 D6521T4A8 AND D6521T4A10 TO A SHUNT RESISTOR The Demo Kits containing the Demo Board Revisions D6521T4A7 D6521T4A8 and D6521T4A10 are shipped with a pre wired shunt resistor 40040 as shown in Figure 1 7 This shunt resistor is connected to the Demo Boards as shown in Figure 1 9 NEUTRAL SHUNT O Low crosstalk demands These wires must be that these current paths n connecteddirectlyat NZ het the shunt resistor WHITE gt LOAD Power supply and Signal for reference for voltage Reis tar measurement 3 2 _ 3543 16 _____ 1 1 1 1 1 1 1 1 1 i L12 Nc i 9 NEUTRAL Voltage Divider 1 1 1 1 1 1 1 1 1 1 ac S E hcl nn D6521T4A8 Demo Board 10 8 2007 Figure 1 9 Shunt Connection for D6521T4A7 D6521T4A8 and D6521T4A10 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 31 of 111 g 3TERIDIAN 71M6521 Demo Board U
37. shown in chapter 1 8 2 WRATE can be entered as follows gt 111 258 If desired the of the Demo Code can be to run with increased gain 8 instead of 1 of the current channels as sometimes required in current shunt mode due to low currents and low shunt resistances This can be done via the command line interface by the commands gt 10 5004 setting IA 8 to 8 by controlling IA_SHUNT bit 2 of CESTATE at CE address 0x10 if IA IN is connected to the shunt or gt 128 5008 setting IB_8 to 8 by controlling IB SHUNT bit 3 of CESTATE at CE address 0x10 if IB IN is connected to the shunt The Demo Code will compensate for the increased gain i e the energy and current readings do not have to be scaled CALIBRATION PARAMETERS GENERAL CALIBRATION PROCEDURE Any calibration method can be used with the 71M6521 chips This Demo Board User s Manual presents calibration methods with three or five measurements as recommended methods because they work with most manual calibration systems based on counting pulses emitted by LEDs on the meter Naturally a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the Demo Code It is basically possible to calibrate using voltage and current readings with or without pulses involved For this purpose the MPU Demo Code can be modified to display averaged voltage and current values as opposed to momentary values Also automated calibr
38. the method involving Intel Hex records 71M6521 DE Table 1 13 lists MPU addresses of interest Manipulating the values in the MPU addresses enables the user to change the behavior of the meter For example if the current transformer external to the Demo Board is changed a different IMAX value n may have to be applied This can be done by changing the value in the address 0x0A using the CLI command A n Modifications to MPU data RAM will not be maintained when reset or power up occurs Changes to the MPU data RAM can be made permanent by creating a macro file containing one or several CLI commands and merging the macro file into the code using the io_merge utility described in section 1 9 2 The following is an example showing how the battery bit can be set permanently by creating a new object file A text file battery txt is generated containing the CLI command 1 20 The io_merge utility is called using the following syntax 6521 demo hex is the existing object file io merge 6521 demo hex battery txt new 6521 demo hex Now the object file 6521 demo hex contains the battery bit Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 37 of 111 71M6521 Demo Board User s Manual d J TERIDIAN Name Purpose Function or LSB Value CLI Format IThrshldA Starting current LSB 2 IOSQSUM 0
39. the MPU XRAM 0x0000 to 0x07FF All MPU data words in 4 byte 32 bit format Typing will access the 32 bit word located at the byte address 4 a A 0x28 The energy accumulation registers of the Demo Code can be accessed by typing two lt Dollar signs typing question marks will display negative decimal values if the most significant bit is set Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 17 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Commands for DIO RAM Configuration RAM and SFR Control Allows the user to read from and write to DIO RAM and special function registers SFRs Description Usage R option register option Command Select I O RAM location x 0x2000 offset is automati combinations cally added Rx Select internal SFR at address x Rx Read consecutive SFR registers in decimal Rx Read consecutive registers in hex notation Example 160 Read all four RTM probe registers DIO or Configuration RAM space is the address range 0x2000 to Ox20FF This RAM contains organized in bytes 8 bits The 0x2000 offset is automatically added when the command RI is ue registers used for configuring basic hardware and functional properties of the 71M6521 and is typed The SFRs special function registers are located in internal RAM of the 80515 core starting at address 0x80 C
40. unsigned 32 0 0000 element A this location disables creep logic for both element and B The default value is 241610 The current threshold for this value is 241610 Dieci 44246 6952 107 3600 80mA if IMAX 442 A Config Configure meter bit 0 reserved 1 8 0 0004 operation on the fly 0 VA Vrms Irms 1 VA VARI bit1 1 Clears accumulators bit2 1 Calibration mode bit3 reserved 1 enable tamper detection bit 5 1 battery modes enabled VPThrshld error if exceeded LSB 2 2 unsigned 32 0x0005 IPThrshld error if exceeded LSB 2 I0SQSUM 3 unsigned 32 0x0009 Y Cal RTC adjust 100ppb 4 signed 16 0x000D Y Cal Degl RTC adjust linear by 10ppb AT in 0 1 C 5 signed 16 0x000F temp Y Cal Deg2 RTC adjust squared 1ppb AT in 0 1 C 6 signed 16 0x0011 by temp PulseWSourc Wh Pulse source See table for PulseWSource and 7 unsigned 8 0x0013 e VARh pulse source PulseVSource 8 0x0014 PulseVSourc selection Vmax Scaling Maximum 0 1V 9 unsigned 16 0x0015 Voltage for PCB equivalent to 176mV at the VA VB pins ImaxA Scaling maximum 0 1A unsigned 16 0x0017 current for PCB element A equi valent to 176mV at the IA pin 1 ADC linear adjust PPM per degree centigrade JB signed 16 0x0019 with temperature Default value is 150 ppmc2 ADC quadratic adjust PPM per degree centigrade C signed 16 0x001B with temperature squared
41. which calibration be entered at this address occurs ImaxB Scaling maximum 0 1A 15 unsigned 16 0 002 current for PCB ele ment B equivalent to 176mV at the IA pin IThrshldB Starting current 216 115050 16 unsigned 32 0x0031 element B VBatMin Minimum battery Same as VBAT below 17 unsigned 32 0x0035 voltage CalCount Count of calibrations Counts the number of times 18 unsigned 8 0x0039 calibration is saved to a maximum of 255 RTC copy Nonvolatile copy of Sec Min Hr Day Date Month 19 unsigned 8 0x163 the most recent time Year 1A 8 the RTC was read 1B 8 1 8 1D 8 1E 8 1F 8 deltaT Difference between Same units as TEMP_RAW 20 signed 32 0x003B raw temperature and temp_nom Frequency Frequency Units from CE 21 unsigned 32 0x003F VBAT Last measured n 22 unsigned 32 0x0043 battery voltage VBAT a 2 ADC counts logically shifted right by 9 bits Note battery voltage is measured once per day except when it is being displayed or requested with the BT command Vrms Vrms element A DUE VOSOSUM 23 unsigned 32 0x004B Irms_A Irms element 2 9 JIOSQSUM 24 unsigned 32 0x004F Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 39 of 111 71M6521 Demo Board User s Manual d J TERIDIAN Name Purpose Function or LSB Value CLI Format
42. 00 OHM END al d USA IB IN PA x 4 IB 1 6521 IB IN 2 VV 1 ND a R104 3 750 TP19 TERIDIAN Warning i J16 R106 R107 hz ud 2 DO NOT INSTALL 34 3 4 i C29 ACTA Note R106 is 10K and T000F C18 C21 R107 is NC if using current 1000pF 1000pF shunt for channel V3P3 1 Make C18 and C21 100pF if 2 TERIDIAN SEMICONDUCTOR CORP channel B is used for 1 current shunt 3 4 Be 71M6521 Demo Board Schematic SMT 64 Pin Package MOUNE Bize Document Number lev B D6521T4A8 8 Date Thursday January 31 2008 Bheet 1 of 2 Revision 2 18 Figure 4 3 D6521T4A8 Demo Board Electrical Schematic 1 2 2005 2009 TERIDIAN Semiconductor Corporation Page 81 of 111 TERIDIAN SEMICONDUCTOR CORP 71M6521 Demo Board User s Manual VBAT V3P3 x 2 600 C26 L10 1uF 1000PF AA 2 Ts 2 VBAT GND 2 C19
43. 10 10 Date Monday July 21 2008 2 of 2 Page 84 of 111 Figure 4 6 D6521T4A10 Demo Board Electrical Schematic 2 3 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual TER DIAN NEUTRAL 2 R29 NEUTRAL 1K R33 0 R27 5K R28 5K V3P3_NM 600 OHM L13 BAV99 SOT 23 L14 600 OHM Figure 4 7 D6521T4A10 Demo Board Electrical Schematic 3 3 Revision 2 18 TP18 9 2 1 WY R23 SEG28 DIO8 Q5 0 I SOT23 a SMBT2222AE6327 GND 2 NEUTRAL 2 L15 600 OHM D11 D10 4 7V SOD 123 68 R26 2005 2009 TERIDIAN Semiconductor Corporation 1N4148W TP SOD 123 GND_2 R31 R30 V3P3 SW3 816 RI 07A REEDSWITCH MAG_TMP Page 85 of 111 d J TERIDIAN 4 4 D6521T4A7 DEMO BOARD BILL OF MATERIAL PCB mins Footprint LEGS Manutacturen Ca O Rcosos ET __C1608X7RIHTO4K__ 2223833094 BC Components Ds 6 croco 2 ____4451278140 _crevscoGiHez0 BE AE CAE CEE 659 644 045 646 47 049 650 coenen NC 1 14 3 0 500 323 SEMTECH SOD 323 RAPC712X DC CONNECTOR SC237 ND Switchcraft 43 416 J4 J9 J10 J12 14 15 JP1 JP4 JP8 JP12 po 5 5 5 A o m o wv o o o HEADER 8X2 HEA
44. 1000P 7 Mid pr 2 37 SEG24 D1004 6 3 SEG25 D1005 ele HEADER 10X2 x R155 AMP 104068 1 0 4 1 SER EEPROM R153 60 0 JP4 TEST J15 R94 R151 R74 05 NC 0 0 10K LX5093 39 SEG26 D1006 ICE Enable Il 1 1 V3P3D C34 7 21 x 1000pF 9152 NC E D PULSE OUTPUTS OPTIF 10K 093 40 SEG27 DI007 SEG27 DIO7 1 1 R79 VARh 100 2 OPT TX OUT OPT TX GPFEX 1 TDi TER 1 OPTRXDIO T T 2 SZ R84 J 10K cas usB 1000pF 6521 TOFP GND TERIDIAN SEMICONDUCTOR CORP 2 71M6521 Demo Board Schematic SMT 64 Pin Package Bize Document Number 065211447 7 Date Tuesday April 17 2007 Bheet 2 of 2 Figure 4 2 D6521T4A7 Demo Board Electrical Schematic 2 2 Page 80 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP 4 2 64 PIN DEMO BOARD ELECTRICAL SCHEMATIC D6521T4A8 15 TP GND bd 1000pF x NEUTRAL A000 vapa gt gt vars 19 032 _ _cs0 NC _ 0 03
45. 1000pF 0 tuF o t 1 2 m 17 52600 8 5 Eco a SEGU 1000 5 SEGO 19 SEGO2 C30 C28 SEG03 NS 1000pF 0 tuF SEGS SCLK 4 5 04 07 SEG4 SDATA 44 SEGUE LCD ee 23 52606 52000 L 55 66 700 E42 lt SEGO7 8C EG35 DIO15 To enable RESET pee sues 24 215 5 Change R91 to 10K 25 SEGOS SEGO 3 40 SEGIB VBAT g seGos Se SECOS 23 78 70 60 8A 8G 8D 59 SEGIT 5 1 RESET secos 25 sEGi0 Se SECTE R87 swt 0 SEGIO 25 SEGO2 6 NC TAIGO 57 1K OuF 91 SEGI1 29 SEGIZ NCANC 6L X SEG15 0 1 30 SEGIS 8 NC Pas SEG14 56613 34 SEGi4 SEGO3 NC 60 60 34 7 SEG14 5 SEGIS q0 58 5C 4DP 5F 5E NC Sq SEGIZ 56015 33 SEGIE Ne 5A 5G 5D 5 gt 62 SEGI6 34 SEGO4 12 NC NCNCAL Fat X 1 56017 SEGIS 13 48 4 30 35 SEGIO R101 swe C35 SEGIB 45 29 01009 14 NC SA4G 4D 20 5 09 1K OtuF R95 5 029 0109 SEG30 DIO10 SEGOS 15 NC PENG 58 SEGOB doi SEG30 DIO10 42 SEGST DION 15 38 3 20 3A 3G 3D 27 SEGII DION 0 6 NC NC 2L SEG31 D1011 LT SEGONDIOT ET SEGSS DIOTS SEG06 18 NC OF 26 SEG30 DIO10 SEG35 D1015 2B 2C 1DP 2A 2G 2D 22 C51 18 24 SEG29 DI009 SEG37 DIOT7 L 8 007
46. 108 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 SEMICONDUCTOR CORP PINOUT LQFP 64 TCLK SEG33 E_RST SEG32 ei XOUT TEST s XIN s X4MHZ 57 _ OPT_RX DIO1 5 VREF 50 V3P3A GNDA f RESET E RXTX SEG38 2 4 V2P5 OPT TX DIO2 s VBAT TMUXOUT 4 RX 5 SEG31 DIO11 sEG3 e a SEG30 DIO10 V3P3D 7 4 SEG29 DIO9 19 D SEG28 D1O8 vapssys lo SEG27 DIO7 10 SEG26 DI06 SEG5 71 M6521 FE IGT SEG25 DIO5 SEG24 DI04 COMO 13 f ICE E 14 5 SEG18 5 SEGI7 16 bees nN 8 amp BBL 98016 LILI LILI LILI LI LI LI LILI LI LI LILI CO Qo oO 2 555 99 205 5555 5 72 0 00 c Gon nn 0 Figure 4 28 TERIDIAN 71M6521 LQFP64 Pinout top view Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 109 of 111 SEMICONDUCTOR CORP Page 110 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g J TERIDIAN 4 13 1 MODIFICATION HISTORY Revision Date Change 2 13 1
47. 11B element B for autocalibration VARhn Net metered VARh LSB of WOSUM 5 signed 64 0x012B all elements VARhn_A Net metered VARh LSB of WOSUM 5 signed 64 0x0133 element A for auto calibration VARhn_B Net metered 60 signed 64 0x013B element B for auto calibration Page 40 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP MainEdgeCnt Count of voltage zero count 64 unsigned 32 0x014B crossings Wh Default sum of Wh LSB of WOSUM 65 signed 64 0x014F nonvolatile Wh_A Wh element A 67 signed 64 0x0157 nonvolatile Wh_B Wh element B 69 signed 64 0x015F nonvolatile StatusNV Nonvolatile status See Status 60 n a 32 0x016F M6521FE 32K only compilation option in M6521DE 16K Compilation option available demo code variable present but not in use T Requires features not in standard demo PCB Table 1 13 MPU memory locations 71M6521DE FE Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 41 of 111 l jTERIDIAN Table 1 14 lists the possible entries for the PULSEWSOURCE and PULSEVSOURCE registers 71M6521 Demo Board User s Manual EQU 0 WOSUM if WOSUM gt WISUM WISUM reserved if WISUM gt WOSUM WOSUM WSUM_I WISUM WOSUM_I reserved WISUM 1 VARSUM reserved VAROSUM VARSUM I VARISUM VAR
48. 2 17 2007 Updated schematics and BOM of Demo Board revision 6521T4A8 for improved EMI performance Updated Teridian street address Consolidated default kh 3 2 and WRATE settings for Demo Boards 2 14 01 10 2008 Removed schematics BOM and layout images for outdated D6521N12A3 Demo Boards Updated figures showing calibration spreadsheets Added Figure 1 6 showing 6521B Register Interpreter worksheet Added Figure 3 2 and description of jumpers headers switches and connectors for D6521N12A4 Demo Board 2 15 01 31 2008 Updated schematics and BOM for D6521T4A8 Updated pin description 2 16 07 24 2008 Updated to include schematics PCB layout board description and BOM for D6521T4A10 Modified references to include 6521 B BE D DE and F FE versions 2 17 02 10 2009 Removed schematics BOM and layout images for outdated D6521N12A4 D6521T4A5 and D6521T4A6 Demo Boards Added Figure 3 1 and description of jumpers headers switches and connectors for D6521T4A7 Demo Board Added precautions for using batteries chapter 2 3 8 Added a list of Teridian Application Notes chapter 2 5 Added a note on the schematics and BOM of the D6521T4A10 board to remove C20 Added note on availability of the CLI command CLC to switch to Intel hex format 2 18 04 15 2009 Replaced io_merge command with d_merge Replaced reference to FDBM flash download module with reference to TFP2 Flash Programmer Consolidated naming of IC
49. 20 NC 53 SEG37 DIO17 SEG37 DIO17 E 1B 1C NC 1A 1G 1D 998 21 22 C38 2pF VIM 808 DP 4 __ 1000pF am 22pF X 7 4 coit g COM2 R10 i 648 sous LE COMS 5 62 22PF R154 0 CKTEST T CKTEST 8 COMO LCD m TMUXOUT T TMUXOUT 4 CKTESTSEG19 E c UART 4 TMUXOUT SEG28 D108 4 Rit 12 62 62 NC RI NC UART TX 5 TX g 31 34 3 UART AX 45 SN 2 deii 1 2 No External Bat 1 2 3 External Bat Available lt cao de R97 R98 Reo 10K 100PF 10p0pF i 62 62 62 R150 RST EMUL ERST 63 NU 0 C44 1 TCL 1 E RST SEG32 M 86 TCL KISEGSS 4 1Q00pF SERIAL EEPROM 1 36 E RXTX SEG3B ua gt C13 C48 GND ICE_E R108 R109 22pF NC NA 10K lt 10K 1 B 1000pF R19 1 ivo 5 NC 22 SEG24 D1004 6 M 42 3 Xx m Place caps near J14 38 SEG25 DI005 5 4 GND HEADER TE p SEG25 DIOS SDA GND Biss 104068 1 0 T ICE E SER EEPROM R153 GND R100 1K TEST 0 7 GND GND lt 8 215 anso o R151 R74 D5 NG 0 10K LX5093 Ir 39 SEG26 DIO06 ICE Enable i SEG26 DIO6 Wh V3P3D C34 V7 21 A 1000pF 8152 PULSE OUTPUTS J12 R76 06 OPTIF 10K LX5093 Tanaro 40 SEG27 DI007 SEG27 DIO7 7 1 5 VARh TX OUT TX 2 OPEX OPTINDIO Wee
50. 32767 If the gain is 196 slow CAL should be increased by 1 PHADJ A 0x1030 This constant controls the CT phase compensation No PHADJ B 0x1034 compensation occurs when PHADJ 0 As is increased i more compensation is introduced Note PHADJ applies to 3W 1 phase systems Table 1 11 CE RAM Locations for Calibration Constants 1 9 2 UPDATING THE 6521 DEMO HEX FILE The d merge program updates the 6521 demo hex file with the values contained in the macro file This program is executed from a DOS command line window Executing the d merge program with no arguments will display the syntax description To merge macro txt and old 6521 demo hex into new 6521 demo hex use the command d merge old 6521 demo hex macro txt new 6521 demo hex The new hex file can be written to the 71M6521 through the ICE port using the ADM51 in circuit emulator This step makes the calibration to the meter permanent 1 9 3 CALIBRATION MACRO FILE The macro file in Figure 1 10 contains a sequence of commands to be used for Demo Boards that provide a serial command line interface CLI It is a simple text file and can be created with Notepad or an equivalent ASCII editor program The file is executed with HyperTerminal s Transfer gt Send Text File command 16022 CAI 16381 16019 CAI gain CAL IA 16384 gain CAL VA 16384 gain CAL IB 16384 gain CAL VB 16384 16370 CAL 115 PHADJ_A default 0 113 PHADJ_
51. 5 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual Signum Systems Wemu51 ADM51 Emulator test oxi 0000 Version DPTR 0000 Target ADI Enulator 00 SP 07 ADM51 vi 54470 PN574 Signum Systems 00 IE 20 Project dir Z Neters Firnvare ICE Test Processor TDK M6513 RO FE R1 FC Executing startulconmand file WenuS1 INI 2 00 23 80 gt 84 03 5 4 Wed Nov 10 11 37 44 2004 26 03 R7 4D map Program All Ice map Xdata All User gt v Command Li ne Interpre ter On line help Usage lt char gt 72 to get this help Where lt char gt is a n uppercase letter of the command The foll owing comma nds lt char gt are availab le gos Repeat las Mem Program State STOP gt PC 0000 Chameleon debugger Version 3 05 00 Copyright Signum Systems Corp 1995 200 DPTR 0000 Target ADMS1 Emulator 00 SP 07 ADMS1 vi SN41570 PNS74 Signum Systems B 00 20 FF Opening project test HS RO FE R1 FC File Name file VenuS1 INI R2 00 R4 03 R6 03 File Hex b Load options 4 p Loading Bank lffset Load Code 7 Load Symbols T Verify Code Load Source Lines ette te e e e te ee e e te ete
52. 521 Pin out Page 78 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual 4 1 64 PIN DEMO BOARD ELECTRICAL SCHEMATIC D6521T4A7 TERIDIAN SEMICONDUCTOR CORP 15 TP GND c14 TP3 7 1000pF 4 PH NEUTRAL 1 4 WN gt gt vars Lo R19 C32 NC NC 0 03uF 250VDC TP10 d style u2 C10 R83 d 03 2200uF 16V E NC 16 9K 1 RVI 1N4736A Le D9 VARISTOR 6 8V 1W ES c2 TT cnr NC AVX VE24M00511K 6 3V 10uF 6 3V 08 t 15 TANTALUM TANTALUM 3301D 0 47uF 1000VDC 04 R7 VOLTAGE 1N4148 130 x R86 CONNECTIONS 4 pi 20 0K 1 GND GND R6 1206 PACKAGE R118 100 2W GND 100 207 R9 1 68 1 RAPC712 5VDC EXT SUPPLY 3 51 is PS_SEL 0 POWER SUPPLY SELECTION TABLE 52 600 OHM SELECTION PS SEL 0 0 1 bis J10 m ug BOARD SUPPLY IN vain 1 4 EXT de SUPPLY THRU J
53. 6 PACKAGE R118 015 100 2W 4 FOR SHUNT OPERATION 1 REMOVE L9 AND L12 VA 51 45VDC EXT SUPPLY 2 POPULATE R88 L8 HEADER LOCK2 52 600 OHM MALE WM2700 ND 3 Only one shunt can be used at a time vB FEMALE WM2011 ND Luve FOR CT OPERATION sr VA_IN sa 220pF T 50 1 POPULATE L9 AND L12 STAR CONNECTION E R15 R16 R17 R18 2 REMOVE R88 Taraa 7 B 6 2M 1 1W 274K 1 270 1 698 1 t 3 CHANGE R24 R25 TO 3 40HM AT 05 50 TANTALUM VA IN x 2 END 600 l 652 220pF C51 R32 ca TP2 DO NOT INSTALL y 220pF 750 1 1000pF 1 VA IA 54 2 4 112 IB 53 _ gt gt NEUTRAL 1 POSEE IB NC C51 and C52 should be as close as possible to IC pins Ae 2 L6 600 OHM 0 L7 600 OHM 285 iP V2P5 AIN 2 iN 1 Perea I Dur R14 J3 750 C24 GND m L11 600 OHM 27pF dia R24 gt R25 2 NC NC AC UT 61 1000pF c16 C15 1 NC NC 5 L 32 768kHz 1 br 3 4 XIAL GND CURRENT 1206 PACKAGE CONNECTIONS x 1 XIN 59 5 L4 600 OHM C25 L5 6000 27pF a USA i LUAN e 1 IB 1 1 6521 ANN 2 R104 7v J16 750 TERIDIAN Warning TT R106 gt R107 3 XIAL SL 34 gt 34 Note R106 is 10K and dE C18 cat R107 is NC if using current gt ne ng shunt for channel V3P3 Make C18 and C21 100pF
54. 71M6521 Demo Board User s Manual 6 TERIDIAN SEMICONDUCTOR USER S MANUAL 71 6521 0105 10K PULSE OUTPUT C48 1000pF ND va IN HIGH VOLTAG 5 32 6 SEG33 DIO13 TCLK d Revision 2 18 TERIDIAN Semiconductor Corporation 6440 Oak Canyon Rd Suite 100 Irvine CA 92618 5201 Phone 714 508 8800 Fax 714 508 8878 http www teridian com meter support teridian com 2005 2009 TERIDIAN Semiconductor Corporation 4 16 2009 5 15 00 PM Revision 2 18 Page 1 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP TERIDIAN Semiconductor Corporation makes no warranty for the use of its products other than expressly contained in the Company s warranty detailed in the TERIDIAN Semiconductor Corporation standard Terms and Conditions The company assumes no responsibility for any errors which may appear in this document reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein Page 2 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 71M6521 Single Phase Energy Meter IC DEMO BOARD USER S MANUAL Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 3 of 111 g STERIDIAN 71M6521 Demo Board
55. 83 4 4 D6521T4A7 Demo Board Bill of Material 1 11 86 45 D6521T4A8 Demo Board Bill of Material 1 1 1 11111 87 4 6 D6521T4A10 Demo Board Bill of Material esent nnne 88 4 7 6521 4 7 Demo Board PCB 89 4 8 6521 4 8 Demo Board PCB Layout crie 93 4 9 D6521T4A10 Demo Board PCB Layouts ui ours eines 97 4 10 Debug Board Bill of Material is irsnnrsnnnensnnnnennnnnnenesnnnenesnnnnenennnneeeeneneennnnnnne 101 4 11 Debug Board SchemattiCs 3 i cci c2cicceseccccesiassscnccescccececessneessqeeanctectetssadessacessaeceseecesanecsaneecacetsecessacetenccssaceesszecsan 102 4 12 Debug Board 103 413 TERIDIAN 71M6521 Pin Out Information 106 414 ibunt 111 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 5 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP List of Figures Figure 1 1 Demo Board Basic Connections sise 10 Figure 1 2 Demo Board Ribbon Cable Connections ss 11 Figure 1 3 The TERIDIAN 6521 Demo Board with Debug Board Block Diagram CT Con
56. 9 t GND 5 V3P3 74 R84 10K C45 usB 1000pF 6521 TOFP TERIDIAN SEMICONDUCTOR CORP 7 71M6521 Demo Board Schematic SMT 64 Pin Package Document Number ev B 065217448 8 Date Thursday January 31 2008 Bheet 2 of 2 Figure 4 4 D6521T4A8 Demo Board Electrical Schematic 2 2 Page 82 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP 4 3 64 PINDEMO BOARD ELECTRICAL SCHEMATIC D6521T4A10 15 o TP GND C14 1000pF M NEUTRAL IET NANN E gt gt vases 19 C32 R2 _cs0 NC 0 03uF 250VDC 8 06K 7 1000pF 1 lead style al Ct U2 C10 R83 D3 2200uF 16V TL431 GND 1000pF 16 9K 1 RVI 1N4736A EK 8 66 VARISTOR 6 8V 1W 7 TT our AVX VE24M00511K 1OuF 6 3V C4 EE gt GND R8 R4 6 3V D8 56 1 5 C6 TANTALUM lt 25 5 TANTALUM 33010 0 43uF 630VDC D4 R7 R5 l css VOLTAGE 1N4148 130 R86 5K T 100 CONNECTIONS i 20 0K 1 GND 120
57. ARULSEW buffered and can be loaded during a computation interval The change will take effect at the beginning of the next interval VAR pulse generator input see DIO_PV bit The output pulse rate is APULSER 232 WRATE X 2 This input is UE oes REDE buffered and can be loaded during a computation interval The change will take effect at the beginning of the next interval 0x1040 0x5020 See description of CESTATE below Kh VMAX IMAX 47 1132 In S WRATE Nacc X Wh pulse The default value results in a Kh of 3 2 Wh pulse when 2520 BH WRATE 122 samples are taken in each accumulation interval and VMAX 600 IMAX 208 In_8 1 X 6 0x1048 16384 Scales all voltage and current inputs 16384 provides unity gain This parameter is added to the Watt calculation for element 0 to 0x13 0x104C QUANTA compensate for input noise and truncation LSB VMAX IMAX In 8 7 4162 10 W The threshold for sag warnings The default value is equivalent 0x14 0x1050 SAG_THR 443000 to 80V RMS if VMAX 600V The LSB value is VMAX 4 255 107V peak This parameter is added to the VAR calculation for element A to 0x034 ovar vaa compensate for input noise and truncation This parameter is added to compensate for input noise and truncation in the squaring calculations for I and V This parameter is added to the Watt calculation for element 1 to 0x18 0x1060 QUANTB compensate for input noise and truncation
58. B default 0 Figure 1 10 Typical Calibration Macro file It is possible to send the calibration macro file to the 71M6521 for temporary calibration This will temporarily change the CE data values Upon power up these values are refreshed back to the default values stored in flash memory Thus until the flash memory is updated the macro file must be loaded each time the part is powered up The macro file is run by first issuing the ce0 command to turn off the compute engine and then sending the file with the transfer gt send text file procedure Turning off the CE before changing CE constants is not a hardware requirement of the chip but is recommended because of the way the demo code is written Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 33 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 9 4 1 9 5 Note Do not use the Transfer 2 Send File command UPDATING CALIBRATION DATA IN EEPROM It is possible to make data permanent that had been entered temporarily into the CE RAM The transfer to EEPROM is done using the following serial interface command gt 10 Thus after transferring calibration data with manual serial interface commands or with a macro file all that has to be done is invoking the U command LOADING THE 6521_DEMO HEX FILE INTO THE DEMO BOARD Hardware Interface for Programming The 71M6521 IC provides an interface for loading code into
59. Brownout mode and stay in Brownout mode It is possible that the VBAT pins of the chip draws up to 1mA in this state since the I O pins are not initialized when Brownout mode is entered from a state where the chip is powered down if Brownout mode is entered from Mission mode the pins are properly initialized VBAT S A S Revision 2 18 and the chip will enter Sleep mode automatically causing much lower supply current into the To prevent the battery from being drained at an excessive rate the RESET button should be pressed right after inserting the battery For this to work the RESET button must be enabled by removing R91 In general the firmware for the 71M6521 has to be written to handle the case of connecting a battery to a powered down board since in a factory setting batteries will most likely be added to meter boards that are powered down The firmware must immediately enter sleep mode in this situation 2005 2009 TERIDIAN Semiconductor Corporation Page 27 of 111 g STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 8 1 8 1 1 8 2 USING THE DEMO BOARD FOR METERING FUNCTIONS USING THE DEMO BOARD IN CT MODE All versions of the Demo Board except for D6521T4A7 and D6521T4A8 may immediately be used with current transformers having 2 000 1 winding ratio and is programmed for a Kh factor of 3 2 and see Section 1 8 3 for adjusting the Demo Board for transformers with different turns rat
60. C GND_DBG 0 1 7 x NORMAL 8 1 V3P3 amp 2 DBG 03 GND 586 7 once Mr 2 DIO0 DIO00 DBG 6 3 V3P3 Aali gt JP2 0 1uF GND DBG 5 ERE 4 GND d iia RS232 TRANSCEIVER LED ee NORMAL 77 MAX3237CAI 01000 ADUM1100 GND GND DBG C14 282VP1 27 28 232C1P1 c15 Ve 8 V5_DBG 0 1uF 25 23261 1 C16 JP3 eis GND HDR2X1 c17 4 co Li 282c2P1 05 STATUS LEDs 0 1uF 4 i 0 1uF 0 1uF yg 3 232C2Mi GND DBG 8 1 __ NULL C2 GND DBG 7 VDD2 VDD1 5 UARTIX Dese 5 out 24 6 BOUT vopi 3 373 ND_DBG ND JP4 x H 22 GND DEG 5 9 HDR2 1 5 10 TOUT JSIN Ce E G20 uia 12 OUT TINI ADUM1100 GND CKTEST oo X TsoUT FX TMUXDUT NULL 16 0 1uF RX32 8 RIOUTEF l21 X nxso V5 DBG UART HXCT 9 1 57 c21 GND R4 R2IN R2OUT 18 C22 GND Ns R30UT X V5 33 28 0 1uF HEADER 8X2 14 Shone 56 14 FS 2 7 GND n5 mes JDN GNT UARTRX DEBUG CONNECTOR 10K GND DBG 4 DOUT 5 GND R7 GND2 7 10K 0 ADUM1100 R8 GND 10K GND_DBG Page 102 of 111 Figure 4 20 Debug Board Electrical Schematic 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g j TERIDIAN er s Manual S
61. C0GTHz20 TOK TDK s e scscianci4ci amp czr 000 Rcoeos 445 298 tND CiG08XTR2AT02K e2scescsocsscssoss __ _________ E E A L L ww 16 bs _______ 50033 UciAwP sonror DGGONNECTOR __ SemzNo Swicho 20 2 no Spade Temi 651 CEE CONNECTOR 0667 515104081 5104084 26 o ne 4 Nec so 8 SRE 0 Rcosos POUGCTND ERFSGEVOROOV Panasonic ee ee 32 RC1206 Panasonic RC1206 Panasonic Panasonic 62 96055 Panasonic 7 10K 860603 Panasonic p c RCOGO Panasonic 36 9 64 37 6 R10 R11 R12 R97 R98 R99 62 p Ala 274 1 080 P274KCCT ND ERJ 6ENF2743V Panasonic 270K 1 RCO80 RHM270KCCT ND MCR10EZHF2703 Rohm 25 RC120 _ __ O 060 P100GCT ND ERJ 3GEYJ101V Panasonic 16 9K 1 RC060 P16 9KHCT ND ERJ 3EKF1692V Panasonic 20K 196 060 P20 0KHCT ND ERJ 3EKF2002V Panasonic 698 1 RC080 P698CCT ND ERJ 6ENF6980V Panasonic 44 R RCOGO Panasonic RC1206 Yageo Panasonic 5 6 2XIPIN Sulins
62. CKTEST CKTEST 8 COMO LCD Zu TMUXOUT T al TMUXOUT 4 CKTEST SEG19 41 SEG28 DIO8 ac UART TXT TMUXOUT SEG28 D108 o0 R11 R12 62 62 NC NC UART TX 5 2 TX 9 UART RX 45 1 2 No External Bat 774 HEADER 8X2 Ls 92 JP12 i gt GND 2 3 External Bat Available R13 BAT MODE R97 R98 R99 10K 1000pF 62 62 62 RST EMUL Ww 1 E RST SEG32 ca See SERIAL EEPROM 1000pF E_RXTWSEG38 m ij C13 R108 lt 109 m 22pF NC on Wt 10K lt 10K vwo 5 37 SEG24 D1004 6 GND SEG24 D104 SEG25 DIO05 SCL NC X caps near J14 2 SEG25 D105 38 1 Stspa lt Fe 0 GE SER EEPROM R100 1k XTAL GND _ 60 JP4 TEST Ig Js R151 R74 D5 10K 093 seance ES SEG26 D1006 3 EMULATOR VF ICE Enable T un d Wi 034 21 ip m 1000pF ava PULSE OUTPUTS OPTIF een 10K LX5093 27 DIO07 SEG27 Dio7 4 vap3 VARh i1 NEUTRAL OPT TX OUT OPT TX a NEUTRAL al Pray H gt 1 amp OPTRXDIOt 2 S1 5 SEG28 DIO8 d R84 C42 C45 10K 100pF np 2 1000pF U5B B 6521 TQFP GND NEUTRAL TERIDIAN SEMICONDUCTOR CORP XTALGND 71M6521 Demo Board Schematic SMT 64 Pin Package NOTE DIOB INDIA REF POWERMODE REMOVE R154 AND 12 pze Document Number NORMAL DEMO BOARD BATTERY MODE REMOVE V3P3_NM CIRCUIT B D6521T4A
63. DER 3 Spade Terminal HEADER 1 HEADER 5 10X2 CONNECTOR 0 05 8X2PIN 3X1PIN S2011E 36 ND S1011E 36 ND A24747CT ND S1011E 36 ND S1011E 36 ND 571 5 104068 1 1X1PIN 5X1PIN 6X1PIN 2X1PIN 3X1PIN HEADER 2 HEADER 3 S1011E 36 ND S1011E 36 ND 2 2 Se o Sullins 5 o Sul Sul 3 o o gt TT o Sullins 26 8 REIN Ferite bead 600 Orm C0805 445 1556 tND TDK IL Ne CRE 9603 PooccrD 96 0800 Panasonic EEE ERJGGEWIO Panasonic D ZI m P130FCT ND 36 RRC 1206 P1 5ECT ND m RJ 8ENF1300V 8GEYJ1R5V 8ENF68R1V 4 m D Panasonic Panasonic Panasonic 7 1 P68 1FCT ND 38 6 R10 R11 R12 R97 R98 R99 P62GCT ND R13 R74 R76 R84 R95 P10KGCT ND R108 R109 R14 R32 R104 R15 R16 R17 R18 R19 R25 R24 7 R83 C0603 C0603 20 mim D 3GEYJ620V 3GEYJ103V Panasonic Panasonic RJ 3EKF7500V N65D2004FB14 RJ 6ENF2743V CR10EZHF2703 GENF6980V 750 1 2M 1 274K 1 270K 1 698 1 C0603 axial C0805 C0805 P750HCT ND 71 RN65DF 2 0M P274KCCT ND RHM270KCCT ND P698CCT ND Panasonic D Panasonic Rohm Panasonic 1 2 JD mim m J P10 0KFCT ND P100GCT ND P16 9
64. Digi Key Digi Key Digi Key Digi Key Digi Key Vendor P N 445 1349 1 ND 478 1687 1 ND 478 1673 1 ND 160 1414 1 ND 1011 36 ND SC1152 ND A2100 ND S4208 ND P10KACT ND P1 0KACT ND N A PO 0ACT ND P8051SCT ND 5011K ND ADUM 1100AR ND MAX3237CAI ND 2202K ND H342 ND H343 ND H216 ND Page 101 of 111 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP 4 11 DEBUG BOARD SCHEMATICS V5_DBG G2 Et AL GND E 0 1uF ND P3 vs 4 8 1 E GND_DBG GND OK swe VE DEG 44 5Vde EXT SUPPLY V5 TPS TP6 DISPLAY SEL ADUMI 100 TP TP GND_DBG 0 1 GND 64 2 2 3 10 5 V5_DBG RAPC712 95 G6 4GND_DBG GND u2 GND_DBG 0 1uF 8 1 __ R2 D2 588 7 VDD2 001 01001 V5 DBG 01001 DBG 6 GND2 DIN Fa V3P3 GND DBG DOUT 4 60 iK LED AND DIA 5 GNDi 089 85232 01001 ADUM1100 GND V5_DBG 0 1uF o5 GND DBG Gii TM 5 9 JP1 10uF 16V B Case N Ge i c10 aul e HDR2X1 GND als u3 o3 RXP
65. EMICONDUCTOR CORP 3 1 h Wong EXT SUPPLY Sv ce NULL BYTE BLASTER BOT 3 BND_NI V5 NI TOP NORMAL CON SKT gt Figure 4 22 Debug Board Bottom View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 103 of 111 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP Figure 4 24 Debug Board Middle Layer 1 Ground Plane Page 104 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 ATERI DIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP v e Figure 4 26 Debug Board Bottom Trace Layer Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 105 of 111 d J TERIDIAN 4 13 TERIDIAN 71M6521 PIN OUT INFORMATION Power Ground NC Pins Type Dein ooo GNDA P Analog ground This pin should be connected directly to the ground plane GNDD P Digital ground This pin should be connected directly to the ground plane V3P3SYS System 3 3V supply This pin should be connected to 3 3 power supply V3P3A Analog power supply A 3 3V power supply should be connected to this pin This power supply must be the same voltage as 5 5 V3P3D Auxiliary v
66. En Es Tacize UT 1225 amr 19 Rone 4 80 5 Figure 4 10 D6521T4A7 Demo Board Bottom View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 91 of 111 Li 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Figure 4 11 D6521T4A7 Demo Board Bottom Copper Page 92 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71 M6521 Demo Board User s Manual l jTERIDIAN 4 8 D6521T4A8 DEMO BOARD PCB LAYOUT 000000000000000000000 42 2 R79 ZIC CKTE eS21T4A8 8 ICE E R W GNE PB W2 erst ee GND 3 R 04 SEMICONDUCTOA CDRA V3P3 VOLTAGE Re c32 Cionn EL 229 Farse R107 eU ESOS s Figure 4 12 D6521T4A8 Demo Board Top View Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation TMUXDUT 5 6 es862 5ndU EMULATOR I F 49 sese Page 93 of 111 2005 2009 TERIDIAN Semiconductor Corporation g TERIDIAN 71M6521 Demo Board User s Manual ee e gt ee e e o R108 mm _ U4 409 R3 9 R109 EE Riss TER RISO ST T e C4 e gt SC RSS e 5 5 R84 5 52 tr SEG26 0ID06 R100 234 G
67. G CNT 0 PULSE FAST SAG CNT 1 10 SHUNT SAG_CNT 2 Il SHUNT SAG_CNT 3 MAGNETIC_TAMPER SAG_CNT 4 NEUTRAL_TAMPER SAG CNT 5 FREQSEL SAG CNT 6 Page 46 of 111 0 1 2 3 4 5 6 7 Reserved Table 1 18 CESTATE Register SAG_CNT 7 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d jJFTERIDIAN 1 10 7 SOME MPU CODE MEMORY LOCATIONS 71M6521BE There are no VMAX and IMAX parameters declared in the 6521BE Demo Code The 6521BE Demo Code does not need these parameters since it does not display voltage and current RMS values on the LCD If necessary the user can derive the values for register variables that depend on VMAX and by multi plying the count in the registers with the LSB values given in Table 1 17 umm Accumulated energy in 10 BCD coded bytes 0x0000 ENERGY 00 01 09 05 03 05 00 02 07 is equivalent to 19535 027Wh When sag event occurs a check byte in LRC format is calculated as the 11 byte for the display of accumulated energy 4 BCD coded bytes _ Each pulse will register as the energy defined by W_PER_P 01 00 00 is equivalent to 100Wh per pulse 0x001D VBAT_MIN Currently unused This variable may be used to decide when to transfer to sleep mode 0x0024 CAL_CNT Counter for calibrations 0x0038 ACC INT t byte counter for completed accumulation interva
68. Graph Turbo Test e NE ROME Exit AlteF4 Cancel F2 RunF3 AdjOpticF4 CreepF5 Mode F6 Skip FT View Save F10 Station 1 TotalSaved o CONTINUEMODE M Task Hyper Sequence E Test As As Phase Rev Std Service Upper Hi q Step Found Left Revs Ele Yot Amp Angle Power Mode Freq Limit 5 s 240 0 200 00 ON 80 0 Single Ph 2 50 Lookup 1 Form fq Defaults Kh 1 005 Voltage 2400 Amp 30 00 Test Seq 119 Seq Rev _____ _ Rava AF Limits 1 Limit AL Limits 2 AL limt Service Singe Phase x Reverse Power Start Delay 2 Optics IR lc Pa Pb Pc Pab Pac Revs vb Ib Freq Watts T X I X X I X X X I X Ires 1 Test Complete Figure 2 19 Calibration System Screen 2 4 2 EEPROM Testing the EEPROM provided on the Demo Board is straightforward and can be done using the serial command line interface CLI of the Demo Code To write a string of text characters to the EEPROM and read it back we apply the following sequence of CLI commands gt EEC1 Enables the EEPROM gt EESthis is a test Writes text to the buffer gt 80 Writes buffer to address 80 Written to EEPROM address 00000080 74 68 69 73 20 69 73 20 61 Response from Demo Code gt 80 Reads text from the buffer Read from EEPROM address 00000080 74 68 69
69. IAN Semiconductor Corporation Page 23 of 111 l 3TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Code Function 00 02 Write CE data record contains data and 16 bit CE address CE data RAM is located at 0x1000 01 End Of File Quit record a file termination record Contains no data This record has to be the last line of the file and only one record per file is permitted The byte pattern is always 00000001FF Upon receipt of this record the Demo Code will transfer the received data into non volatile memory EEPROM 03 Read CE data record contains empty data field and 16 bit CE address optional CE data RAM is located at 0x1000 04 Write MPU or I O RAM data record contains data and 16 bit MPU address 05 Read MPU or I O RAM data record contains empty data field and 16 bit MPU address optional RAM is located at 0x2000 06 Write RTC data record contains data and 16 bit RTC address 07 Read RTC data record contains empty data field and 16 bit RTC address optional 08 Write SFR data record contains data and 16 bit SFR address optional The MSB is always zero 0 09 Read SFR data record contains empty data field and 16 bit SFR address optional Table 1 8 Data Command Types Table 1 9 lists a few examples of hex records Hex Record Function 08 0000 06 00 00 0 03 18 05 06 00 Writes 06 eight bytes 08 to RTC setting
70. IC 32 KB of flash memory The Demo Code version programmed into the chip installed in the Demo Board is for the 71M6521FE and for shunt CT operation When planning to develop code for a 71M6521 meter IC with smaller flash size it can be useful to load the Demo Codes that were written for the smaller flash sizes into the 71M6521FE IC e The Demo Code for the 71M6521FE chip 32KB of flash supports a command line interface This means that the user can directly communicate with the program by typing commands consisting of text and numbers using a terminal or PC e Demo Codes for the 71M6521BE and 71M6521DE have a much more basic user interface that utilizes Intel hex records for serial communication 1 10 3 ACCESSING LCD AND SLEEP MODES FROM BROWNOUT MODE Header JP12 controls the behavior of the Demo Code when system power is off The setting of 12 is read on power up or after reset and controls the Demo Code as follows e Jumper across pins 1 2 GND The Demo Code will communicate at 9600bd No transitions to sleep or LCD mode will be made from brownout mode e Jumper across pins 2 3 V3P3 The Demo Code will communicate at 300bd Transitions to sleep or LCD mode can be made from brownout mode This operation mode requires connection of a battery or equivalent DC voltage at JP8 1 10 4 DEMO CODE MEMORY LOCATIONS FOR THE 71M6521DE FE Registers in MPU data RAM can be accessed via the command line interface 71M6521FE or the using
71. J TERIDIAN GETTING STARTED GENERAL The TERIDIAN Semiconductor Corporation TSC 71M6521 Demo Board is an energy meter IC demonstration board for evaluating the 71M6521 device for single phase electronic energy metering applications It incorporates a 71M6521 integrated circuit peripheral circuitry such as a serial EEPROM emulator port and on board power supply as well as a companion Debug Board that allows a connection to a PC through a RS232 port The Demo Board allows the evaluation of the 71M6521 energy meter controller chip for measurement accuracy and overall system use The board is pre programmed with a Demo Program file name 6521_demo hex in the FLASH memory of the 71M6521 IC This embedded application is developed to exercise all low level functions to directly manage the peripherals and CPU clock timing power savings etc SAFETY AND ESD NOTES Connecting live voltages to the Demo Board system will result in potentially hazardous voltages on the Demo Board EXTREME CAUTION SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD ONCE IT IS CONNECTED TO LIVE VOLTAGES THE DEMO SYSTEM IS ESD SENSITIVE ESD PRECAUTIONS SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD DEMO KIT CONTENTS 71M6521 Demo Board containing 71M6521FE IC with preloaded Demo Program Shuntresistor with harness connected to Demo Board Debug Board Two 5VDC 1 000mA universal wall transformers w 2 5mm plug Switchcraft 712A Serial cable DB9 Ma
72. KHCT ND 49 1 R86 20K 1 C0603 P20 0KHCT ND RJ 3EKF2002V Panasonic 50 4 ___887 100 8101 8154 f 1K RC0603 P1 0KGCT ND RJ 3GEYJ102V Panasonic 52 2 Romo PooEcrND __ERJ 8GEYOROOV Panasonic 53 2 SNS P8OMSCTND EVQ PJXOSM Panasonic __ _________________ _____________ 7 1 55 1 ______ ____________ Keystone t REGULATOR 1 296 1288 1 ND TL431AIDR Texas Instruments SER EEPROM AT24C1024W10SU2 7 ND AT24C1024W 10SU 2 7 ATMEL TIM6521F IGT TERIDIAN 8ENF1002V RJ 3GEYJ101V RJ 3EKF1692V Panasonic Panasonic Panasonic D 100 16 9 1 C0603 C0603 ajA m gt Z2lolg D D 0 0 0 20 20120 2 gt Daa 64TQFP 153 1056 ND XC1195CT ND V 1 VIN 808 DP RC S HV VARITRONIX 2 32 768kHz Table 4 1 D652T4A7 Demo Board Bill of Material Page 86 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d jJFTERIDIAN 4 5 D6521T4A8 DEMO BOARD BILL OF MATERIAL Reference Part iem 5 Part Number Manufacturer Footprint Number AVX Panasonic 4 escnemciomsom Roo 445 814 1ND _C1608X7RTHT04K 557 21424 222238330474 BC Components of 6751354365102 2 Rove0s 445127310 C1608
73. L VA 16384 16222 7 i N Energy reading at 60 155 PHADJ A 445 pa Energy reading at 180 Han Voltage error at 0 ae inductive Expected voltage V 240 242 4 Measured voltage V direction CO PHASE B cues SS Energy reading at 0 Energy reading at 60 0 02 0 025 CAL_IB CAL_VB 1 oom 16384 16918 16222 Current leads voltage Energy reading at 60 0 015 PHADJ B 445 i capacitive Energy reading at 180 0 02 i L A Voltage error at 0 0 01 E s Expected voltage V 242 4 Measured voltage V _ Voltage a Generating Energy Using Energy PHASE C Energy reading at 0 Energy reading at 60 Energy reading at 60 Energy reading at 180 Voltage error at 0 Expected voltage V 240 242 4 Measured voltage V 2 CAL 16384 16219 0 025 CAL VC 16384 16222 PHADJ C 445 Readings Enter 0 if the error is 096 enter 5 if meter runs 5 fast enter 3 if meter runs 396 slow Figure 2 3 Calibration Spreadsheet for Three Measurements SEMICONDUCTOR CORP MUX _DJV 1 AC frequency 60 click on yellow field to select from pull down list Sample Frequency 2520 615 Hz FOT 0 023804 Date Author 4 14 12 31 2006 WJH Enter values in yellow fields Results will show in green fields PHASE A Energy reading at 0 3 846 Energy reading at 60 3 642 Voltage error at 0
74. LK and _ become SEG32 SEG33 and SEG38 respectively For production units this pin should be pulled to GND to disable the emulator port This pin should be brought out to the programming interface in order to create a way for reprogramming parts that have the SECURE bit set Multi use pin configurable as either Clock PLL output or LCD segment driver Can be enabled and disabled by CKOUT_EN TMUXOUT 0 Digital output test multiplexer Controlled by TMUX 4 0 Multi use pin configurable as Optical Receive Input or general DIO When configured as OPT RX DIO1 _ this pin receives a signal from an external photo detector used in IR serial interface If unused this pin must be configured as an output or terminated to V3P3D or GNDD Multi use pin configurable as Optical LED Transmit Output WPULSE RPULSE or OPT TX DIO2 general DIO When configured as OPT_TX this pin is capable of directly driving an LED for transmitting data in an IR serial interface If unused this pin must configured as an output or terminated to V3P3D or GNDD This input pin resets the chip into a known state For normal operation this pin is RESET connected to GNDD To reset the chip this pin should be pulled high No external reset circuitry is necessary PRX UART input If unused this pin must terminated to V3P3D or GNDD _____ RO TEST Enables Production Test Must be grounded in no
75. MPERS HEADERS SWITCHES TEST POINTS CONNECTORS This description covers the D6521T4A7 Demo Board The D6521T4A8 and D6521T4A10 Demo Boards have similar jumpers switches test points and connectors The items described in the following tables refer to the flags in Figure 3 1 ltem Schematic amp Figure Silk Screen Name Use 3 1 Reference 1 TP15 GND Test point for board ground 2 REFA 2 pin header test point Pin 1 is the VA line voltage input to the IC pin 2 is REFA 3 D5 Wh Wh LED real energy 4 D6 VARh VARh LED reactive energy This 3 pin header allows selection of the battery mode operation A jumper across pins 1 2 indicates that no external battery is available The 71M6521 will stay in brownout mode when system power is down and it will communicate at 9600bd 5 ale BAT MODE A jumper across pins 2 3 indicates that an external battery is available The 71M6521 will be able to transition from brownout mode to sleep and LCD modes when system power is down and it will communicate at 300bd V3P3 OPT_TX 5 pin header Pins 1 and 3 carry the supply voltage to the 6521 IC 6 J12 V3P3 Pin 2 is the TX OPT output of the 6521 IC Pin 4 is the OPT RX OPT RX GND input to the 6521 IC Pin 5 is ground 7 TP21 Test points for pulses generated by the VARh LED Chip reset switch The RESET pin has an internal pull down thatallows normal chip operation When the switch is pressed the in i i i i k 8 owt RESET RESET
76. MSCT ND Micro Commercial E 50723 MMBD7000FSCT Fairchild SXIPIN S1011E 36 ND PZC36SAAN DG CONNECTOR 2 WW2700 ND J2 HEADER 8X2 8X2PIN Ae S2011E 36 ND PXIPIN SIDTIEGEN ins RDATATCTN EGER SIDTIEGEN Suis RCOBOS 415 1556 ND SMBT2222AINCT ND Infineon 581 VZD510X AVX P8 06KHCT N Panasonic RJ 3EKF2552V Panasonic P4 99KHC RJ 3EKF4991V Panasonic 100W 2 ND SF200JB 100R Yageo D ALA ao 5 a ala e 5 al x SOT 23 RC0603 ______ 900603 PO 0GC A 700603 PZSEKHCTN gt 2 ROO605 axial 81206 130 Panasonic 1206 PISEC Panasonic 81206 P68 1FC Panasonic Ls A 62 noso f Pe Panasonic 42 5 RISRSLR7LR7RBaRSSRIoRRTS oo Panasonic PTSOHCTN Panasonic T RNGSDF 2 0 PZTAKCCT ND Panasonic RHMZ7OKCCT N Rohm PEGSCCT ND Panasonic PZOMGCTAND Panasonic 49 5 TK Aou Pronccrn Panasonic 100 Panasonic PaOKW 28K ND ERG 25303 Panasonic PIGSKHCT ND Panasonic P20 OKHCT ND Panasonic 311 3 40FRCT ND Yageo De EE TE M EE EVOP XOM Panasonic SW iy Reed Switch Coto Technology EE NE LE 6 VARITRONK E88 LL 2
77. OSQSUM should be modified to compute the correct energy values That is SHUNT and CT should be applied separately to individual channels based on the sensor connections 8 Before starting a calibration all calibration factors must be in their default state i e CAL 0x08 CAL VA 0x09 CAL IB 0x0A must be 16384 PHADJ A 0xOE and PHADJ B 0 0 should be Zero Page 58 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN 7 3 5 LOAD NEUT CT 71M6521 Le LT LJ IB 4 VA 4 5 Figure 2 7 71M6521 with Shunt and CT Calibrating for Shunt Resistor Channel A 1 7 Calculate IMAX for the shunt resistor IMAX_SHUNT This can be done by using the following formula SHUNT Viuax RsH The Vimax value is the maximum analog input voltage for the channel typically 177mV RMS and is the resistance value of the shunt resistor The value obtained for SHUNT is stored at the MPU address 0x0A using the command A IMAX SHUNT of the Demo Code supplied by TERIDIAN Compute WRATE SHUNT based on IMAX_SHUNT and VMAX and the formula given in 1 8 2 SHUNT IMAX SHUNT VMAX 47 1132 Kh In 8 X Use VMAX 600V RMS for the 6521 Demo Board if the resistor divider for VA has not been changed U
78. OSUM I reserved VARISUM_I IOSQSUM reserved IISQSUM WSUM E reserved WOSUM E INSQSUM WISUM E VOSQSUM reserved VISQSUMT VARSUM E reserved VAROSUM E VASUM VARISUM E VAOSUM reserved VAISUM INR ND M6521F 32K only compilation option in M6521D 16K Compilation option available demo code variable present but not in use Changing the equation EQU in the I O RAM does not alter the computations implemented in the Demo Code T Requires features not in standard demo PCB Table 1 14 Values for Pulse Source Registers Page 42 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 Table 1 15 explains the bits of the STATUS register Significance CREEP 5 SEMICONDUCTOR CORP Significance BATTERY BAD voltage below VBatMin PB PRESS wake pushbutton was pressed CAL BAD Checksum over calibration factors is invalid WAKE ALARM CLOCK UNSET Clock is not set POWER BAD checksums for both energy registers are invalid MAXVA voltage A exceeded maximum GNDNEUTRAL grounded neutral detected voltage exceeded maximum TAMPER tamper detected via I O pin VXEDGE as reported by CE WD_DETECTED reset from HW WDT was detected SAGA sag detected on A SAGB Sag detected on BT MAXIA current A exceeded maximum MAXIB curre
79. RANS FORMERS AND VOLTAGE DIVIDERS Revisions D6521T4A7 D6521T4A8 and D6521T4A10 are wired for shunt operation and must be modified for CT operation With a CT ratio of 2000 1 208A on the primary side at 2000 1 ratio result in 104mA on the secondary side causing 177 at the 1 79 resistor pairs R24 R25 R36 R37 R56 R57 2 x 3 40 in parallel In general when is applied to the primary side of the CT the voltage Vin at the IA or IB input of the 71M6521 IC is determined by the following formula Vin R I R IMAX N where N transformer winding ratio R resistor on the secondary side If for example 208A are applied to a CT with a 2500 1 ratio only 83 2mA will be generated on the secondary side causing only 141mV The steps required to adapt a 71M6521 Demo Board to a transformer with a winding ratio of 2500 1 are outlined below 1 The formula R 177mV IMAX N is applied to calculate the new resistor Rx We calculate Rx to 2 1150 2 Changing the resistors R24 R25 R106 R107 to a combined resistance of 2 115Q for each pair will cause the desired voltage drop of 177mV appearing at the IA or IB inputs of the 71M6521 IC 3 WRATE should be adjusted to achieve the desired Kh factor as described in 1 8 2 Simply scaling ZMAX is not recommended since peak voltages at the 71M6521 inputs should always be in the range of 0 through 250mV equivalent to 177mV rms If a CT with a much lower winding ratio than 1 2 000
80. RATION METER 6521 LOAD Be il Single Chip LOAD A Meter DIO6 V3P3 pio7 1 P Vapa External Current 5V LCD DISPLAY Transformers ET EEHENE EE E eae VA pec EEPROM ICE Connector VA DEBUG BOARD OPTIONAL S i MPU HEARTBEAT 5Hz ses KOTO ope V5_DBG 7 7 I CEHEARTBEAT 1Hz HoHo HoT V5_DBG L okt IGN GND v HH GND_DBG 4 fex V5 DBG 10 gt Lo 34 E NS RS 232 COM ES lt hot era E o 5 7 LL RIMINTERFACE 9 11 1 Y FPGA TMUXOUT 836 0 1 gt gt 6 6 DBg V3P3D CKTEST gt I aa O 4 COM Port On board M eves ae components lt Nc 5V weg 5 powered by V3P3D 42 GND DBG Lu I e J2 JP21 7 11 27 2006 Figure 1 3 The TERIDIAN 6521 Demo Board with Debug Board Block Diagram CT Configuration S All analog input signals are referenced to the V3P3 3 3V power supply to the chip S 1 6 1 POWER SUPPLY SETUP There are several choic
81. SES 24 SEGO7 21 12180 ar CONS SEG35 DIO15 VBAT Change R91 to 10K Eds SEGOS SEGo1 opp B GENS Lau 5 8 VBAT 26 5 09 4 78 76 80 80 ag SEGI7 RESET SEGOS Se EAN 7F 7E NC Ha R87 SEG10 2g SEGO2 6 NC 7A 7G 7D lay R21 1K 29 SEGI2 7 60 5 NG NG 6L 35 X SEGI5 SEG12 30 SEGI3 Ta NC 6F 6E NC 735 SEGT4 1K D9 SEGM SEGO3 cre BAGS ED rag Che SEGIB 5 1N4148W TP SOD 123 SND seGis 2 N SASG SD HA Sos PB BAT MODE 62 SEG16 34 56604 12 NC NCNCAL 34 7X 11 e H swe D7 R20 R95 42 EG29 DIO09 14 40 40 29 EGOS C55 100 SEG29 D109 43 SEG30 D1010 SEGOS 15 NC 28 SEG30 DIO10 724 SEG31D1011 3B 3C 2DP 3A 3G 3D 1000PF 4 7V SOD 123 2M 10K 16 27 SEGSI DIO11 2 PB BAT MODE 1 17 NC NC 2L FX SEG31 DIO11 acceded al sEGSSDIOIS SEGO6 EGSO DIOTO 22 MAG 19 yee 28 24 5 29 01009 SEGSS DIOTO SEGS7 DIO17 sEGo7 _ 20 NC EG37 DIO17 SEG37 DIO17 214 1B 1C NC 1A1G 1D 28 FOR NORMAL ORPERATION REMOVE D7 09 AND BAT2 Cut Pin 20 BAT MODE COMI apap XEALGND REMOVE R21 P17 13 AS Hi EN 1000 15 COMZ sZ R10 16 R3 62 22 E 0
82. Shown on the LCD Display Description Allows user to select meter RMS display for voltage or current Usage MR option option Command phase Displays instantaneous RMS current combinations MR2 phase Displays instantaneous RMS voltage Example MR1 2 Displays phase b RMS current Page 20 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual d jTERIDIAN Commands for Controlling the MPU Power Save Mode Description Enters power save mode Disables CE ADC CKOUT ECK RTM TMUX VREF and serial port sets MPU clock to 38 4KHz Usage PS Return to normal mode is achieved by issuing a hardware reset Commands for Controlling the RTC combinations Description Allows the user to read and set the real time clock Usage RT option value value Command RTDy m d w Day of week year month day weekday 1 Sunday RTR Read Real Time Clock RTTh m s Time of day hr min sec RTAs t Real Time Adjust speed trim Example RTD05 03 17 5 Programs the RTC to Thursday 3 17 2005 Reset Commands Description Allows the user to cause soft resets Usage 2 Soft reset W Simulates watchdog reset The 2 command acts like a hardware reset The energy accumulators in XRAM will retain their values Commands for Controlling the LCD and Slee
83. WITH FIVE MEASUREMENTS The calibration procedure is as follows 1 2 calibration factors are reset to their default values i e CAL IA CAL VA 16384 and PHADJ A 0 An RMS voltage Visa consistent with the meter s nominal voltage is applied and the RMS reading Vactua Of the meter is recorded The voltage reading error Axv is determined as Axv Vactual Videal Videal Apply the nominal load current at phase angles 0 60 180 and 60 300 Measure the Wh energy each time and record the errors Eo E180 and Eaoo Page 54 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN Calculate the new calibration factors CAL CAL VA and PHADJ A using the formulae presented in section 2 1 2 or using the spreadsheet presented in section 2 2 4 Apply the new calibration factors CAL IA CAL VA and PHADJ A to the meter The memory locations for these factors are given in section 1 9 1 Test the meter at nominal current and if desired at lower and higher currents and various phase angles to confirm the desired accuracy Store the new calibration factors CAL IA CAL VA and PHADJ A in the EEPROM of the meter If the calibration is performed on a TERIDIAN Demo Board the methods shown in sections 1 9 2 can be used 2 2 4 PROCEDURE FOR FAST CALIBRATION The calibration procedure is as follows 1 3 a A 6 7 Establish load voltage
84. and truncation in the squaring calculations for 0x105C TEMP NOM 7 04 107 The reference temperature read from MPU location TEMP_RAW is 7 stored in this location when the unit is calibrated This parameter is added to the Watt calculation for element 1 to 01083 EE compensate for input noise and truncation Same LSB as QUANTA 0 1064 Smoothing factors for low currents on element 0 and 1 0x1068 CRVI Irus is the operating RMS current 0x106C QUANT IB This parameter is added to compensate for input noise and truncation in the squaring calculations for 0x1070 _0 71M6521 Demo Board User s Manual These parameters establish the creep threshold LSB 6 6952 10 VMAX IMAX 3600 W The default values correspond to 2 5 W 0x1074 CREEP 1 This parameter defines the nominal voltage to be used for the power calculation when tampering is detected 13 66952 1075 v isp 3600 214 0x1078 VNOMINAL 1 27 108 The default value corresponds to 230V when VMAX 600V eoe This parameter defines the nominal wattage to be used when magnetic 0x107C WNOMINAL 7 646 277 tampering is detected LSB 6 6952 10 VMAX IMAX 3600 W Linear temperature compensation factor Quadratic temperature compensation factor Table 1 17 CE memory locations 71M6521BE The CESTATE register shown in Table 1 18 is used to configure the CE Significance PULSE SLOW Significance SA
85. apter ss 76 Figure 3 5 D6521T4A10 Demo 77 Figure 4 1 D6521T4A7 Demo Board Electrical Schematic 1 2 79 Figure 4 2 D6521T4A7 Demo Board Electrical Schematic 2 2 80 Figure 4 3 D6521T4A8 Demo Board Electrical Schematic 1 2 81 Figure 4 4 D6521T4A8 Demo Board Electrical Schematic 2 2 82 Figure 4 5 D6521T4A10 Demo Board Electrical Schematic 1 3 83 Figure 4 6 D6521T4A10 Demo Board Electrical Schematic 2 3 84 Figure 4 7 D6521T4A10 Demo Board Electrical Schematic 3 3 85 Figure 4 8 D6521T4A7 Demo Board Top 89 Figure 4 9 D6521T4A7 Demo Board Top Copper iii 90 Figure 4 10 D6521T4A7 Demo Board Bottom 91 Figure 4 11 D6521T4A7 Demo Board Bottom Copper iii 92 Figure 4 12 D6521T4A8 Demo Board Top View mener nnne rennes 93 Figure 4 13 D6521T4A8 Demo Board Top Copper nennen 94 Figure 4 14 D6521T4A8 Demo Board Bottom View since 95 Figure 4 15 D6521T4A8 Demo Board Bottom Copper sisi 96 Figure 4 16 D6521T4A10 Demo Board Top 0022000 0 20 0 0 97 Page 6 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN Figure 4 17 D6521T4A10 Demo Board Copper sise 98 Figure 4 18 D6521T4A10 Demo Board Bottom Copper sise 99 Figure 4 19 D6521T4A10 Demo Board Bottom View ii 100 Figure 4 20 Debug Board Ele
86. ation equipment can communicate with the Demo Boards via the serial interface and extract voltage and current readings This is possible even with the unmodified Demo Code A complete calibration procedure is given in section 2 1 3 of this manual Regardless of the calibration procedure used parameters calibration constants will result that will have to be applied to the 71M6521 chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation Table 1 11 shows the names of the calibration constants their function and their location in the CE RAM Page 32 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN Again the command line interface can be used to store the calibration constants in their respective CE RAM addresses For example the command gt 8 16302 stores the decimal value 16302 in the CE RAM location controlling the gain of the voltage channel CAL VA CE Physical Address Address Description hex hex CAL VA 0x09 0x1024 Adjusts the gain of the voltage channel 16384 is the typical CAL VB 0x0B 0x102C value The gain is directly proportional to the CAL parameter i Allowed range is 0 to 32767 If the gain is 196 slow CAL should be increased by 1 CAL IA 0x08 0x1020 Adjusts the gain of the current channels 16384 is the typical CAL IB 0 1028 value The gain is directly proportional to the CAL parameter i Allowed range is 0 to
87. ct supply current measurements are to be made Supplying unnecessary pull up resistors and or external components with current will yield inaccurate measurement results In brownout mode the following precautions should be taken 1 2 3 The Debug Board should be removed from the Demo Board The RX pin should be properly terminated e g by tying it to GND On the Demo Boards this is accomplished with R90 The jumper on JP4 should be moved to position 1 2 in order to save the current required to supply the ICE_E pin 2 5 TERIDIAN APPLICATION NOTES Below is a list of Teridian Applications Notes that are relevant to the 71M6521 They can be obtained on the Teridian web site Revision 2 18 AN 651X 033 6521 035 AN 652X 041 AN 6521 044 65 045 6521 047 6521 049 65 054 65 057 Development Tools RTC Compensation EMC Design Guidelines Meter Design for Power Failure Power Monitoring Applications ESD Testing to IEC 61000 4 2 Transition 6521 6521xE The RTC of the 65XX Metering ICs Programming of Teridian Metering ICs 2005 2009 TERIDIAN Semiconductor Corporation Page 69 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Page 70 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 SEMICONDUCTOR CORP 3 HARDWARE DESCRIPTION 3 1 D6521T4A7 DEMO BOARD DESCRIPTION JU
88. ctrical Schematic sise 102 Figure 4 21 Debug Board eiit eise deter ieu br ed 103 Figure 4 22 Debug Board Bottom View iii 103 Figure 4 23 Debug Board Top Signal Layer 104 Figure 4 24 Debug Board Middle Layer 1 Ground Plane 104 Figure 4 25 Debug Board Middle Layer 2 Supply Plane 105 Figure 4 26 Debug Board Bottom Trace Layer 105 Figure 4 27 TERIDIAN 71M6521 QFN68 Pinout top view 108 Figure 4 28 TERIDIAN 71M6521 LQFP64 Pinout top view 109 List of Tables Table 1 1 Jumper settings on Debug Board sen 13 Table 1 2 Straight Cable Connections sise 13 Table 1 3 Null Modem Cable Connections is 13 Table 1 4 COM Port Setup Parameters iii 14 Table 1 5 Summary of Communication Options 15 Table 1 6 Selectable Display Options nennen nennt 16 Table 1 7 Fields of Hex Record nde e cH ae daos 23 Table 1 8 Dat Command re d ue HERE RN ANd 24 Table 1 9 Hex Record Examples 3 ee ret animent inertie entierement a ERR a REDE cea AEn 24 Table 1 10 Pre Assembled Hex Records sise 25 Table 1 11 CE RAM Locations for Calibration Constants enne nnne 33 Table 1 12 Flash Programming Interface Signals eene
89. d is compatible with their high impedance and limited power handling capability The oscillator power dissipation is very low to maximize the lifetime of any battery backup device attached to the VBAT pin crystal XOUT Figure 2 9 Oscillator Circuit Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 61 of 111 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 2 3 3 EEPROM EEPROMs should be connected to the pins DIO4 and 0105 see Figure 2 10 These pins can be switched from regular DIO to implement an 2 interface by setting the I O RAM register DIO EEX 0 2008 4 to 1 Pull up resistors of 3kQ must be provided for both the SCL and SDA signals V3P3 Figure 2 10 EEPROM Circuit 2 3 4 CONNECTING THREE WIRE EEPROMS uWire EEPROMs and other compatible devices should be connected to the DIO pins 0104 and DIOS as shown in Figure 2 11 DIO5 connects to both the DI and DO pins of the three wire device The CS pin must be connected to a vacant DIO pin of the 71M6521 A pull up resistor of roughly 3kQ to V3P3 should be used for the DI DO signals and the CS pin should be pulled down with a resistor to prevent that the three wire device is selected on power up before the 71M6521 can establish a stable signal for CS The DIO_EEX register in RAM must set to 10 in order to convert the DIO pins 0104 and DIO5 to uWire pins pull up resistor for DIO5 may not be necessary V3P3D
90. e BME bit in RAM has to be enabled prior to measuring the battery voltage Table 1 19 Some MPU Memory Locations Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 47 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 11 EMULATOR OPERATION The Signum Systems ADM51 ICE In Circuit Emulator be plugged into J14 or J5 of the Demo Board following conditions are required for successful emulator operation including code load erase in flash memory 1 Emulator operation is enabled by plugging a jumper into header JP4 pins V3P3D ICE E 2 For loading code into flash the CE is disabled using serial command CEO or writing 0x00 to XRAM cell 0x2000 For details on code development and test see the Software User s Guide SUG The emulator can also be operated when the 71M6521 is in brownout mode In brownout mode the 71M6521 provides power for the pull up resistors necessary for emulator operation via its V3P3D pin Page 48 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 2 1 1 l J TERIDIAN APPLICATION INFORMATION CALIBRATION THEORY A typical meter has phase and gain errors as shown Axi and Axv in Figure 2 1 Following the typical meter convention of current phase being in the lag direction the small amount of phase lead in a typical current sensor is represented as The errors shown in Figure 2 1 represent the sum of all ga
91. e plugged into J14 Alternatively J15 can be used 2 pin header representing the V1 comparator voltage input test 20 TP10 V1 V3P3 point and ground A jumper should be placed between V1 and V3P3 to disable the watchdog timer 21 1 V3P3 2 pin header test point Pin 1 is the IA input to the IC and pin 215 V3P3 3 pin header on the bottom of the board for connection of the CT for 22 J3 IA IN phase A Pin 3 may be used to ground an optional cable shield In shunt configuration two wires from the shunt resistor representing the voltage across the shunt are connected to pins 1 and 2 23 J16 IB IN 3 header on the bottom of the board for connection of the CT for phase B Pin 3 may be used to ground an optional cable shield 24 Ji 5VDC Plug for connection of the external 5 VDC power supply This is the NEUTRAL line voltage input It is connected to the 3 3V 25 9 NEUTRAL net of the 71M6521 The neutral wire is connected to the spade terminal on the bottom of the board VA IN This is the line voltage input that feeds both the resistor divider leading to the on the chip and the internal power supply The 26 J4 line voltage wire is connected to the spade terminal on the bottom of the board Caution High Voltage Do not touch this pin Page 72 of 111 Table 3 1 D6521N12A7 Demo Board Description 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual CR
92. eatures added to the D6521T4A10 Demo Board are 1 Circuitry was added that supports features required for the India market 2 J14 was removed The 6 pin header J15 is the only programming connector available on the board An adapter that enables the transition from the AMP Tyco connector used for the ADM51 ICE or for the TFP2 programmer to the 6 pin header J15 is supplied with the Demo Kit 3 Ji was replaced by a simple two pin header with key feature that prevents reversing the polarity Figure 3 3 D6521T4A10 Demo Board Figure 3 4 D6521T4A10 Demo Board with ICE Adapter Page 76 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN 3 4 2 D6521T4A10 FEATURES FOR THE INDIA MARKET Several India specific features were added to the D6521T4A10 Demo Board to support the detection of tamper attempts These features are 1 A2 pin header TP1 is provided that allows the connection of a neutral missing transformer This transformer normally provides enough output voltage and current to supply the Demo Board in case the main AC supply is disconnected 2 The output of the NM circuit is routed to the 6521FE and annunciated by LED D14 3 Magnetic tamper switch SW3 4 The net connected to the pushbutton is separated from the 6521FE by a capacitor This prevents drainage of the battery by constant activation of the pushbutton For details see the schematics in the Appendix The India specific fea
93. ent window of the calibration system This mode of operation is opposed to a calibrator that opens the measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter It is essential for a valid meter calibration to have the voltage stabilized a few seconds before the current is applied This enables the Demo Code to initialize the 71M6521 and to stabilize the PLLs and filters in the CE This method of operation is consistent with meter applications in the field as well as with metering standards Each meter phase must be calibrated individually The procedures below show how to calibrate a meter phase with either three or five measurements The PHADJ equations apply only when a current transformer is used for the phase in question Note that positive load angles correspond to lagging current see Figure 2 2 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 53 of 111 d 3TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 2 2 2 2 2 3 LIRE LO i oltage a S Current lags voltage nuc direction 60 ee i L QEON E 1 Aves 60 l Current leads l voltage P Le a P4 5 L Voltage 1 tm 1 p Generating Energy Using Energy Figure 2 2 Phase Angle Definitions The calibration procedures described below should be followed
94. es for meter power supply e Internal using the AC line voltage The internal power supply is only suitable when the line voltage exceeds 220V RMS e External 5VDC connector J1 on the Demo Board e External 5VDC connector J1 on the Debug Board The power supply jumper JP1 must be consistent with the power supply choice JP1 connects the AC line voltage to the internal power supply This jumper should usually be left in place An adapter may have to be used for the transition between the supplied 5 VDC power supply and the 5 VDC connector on the D6521T4A10 version of the Demo Board Page 12 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 71M6521 Demo Board User s Manual l ITERIDIAN 1 6 2 1 6 3 Revision 2 18 CABLE FOR SERIAL CONNECTION For connection of the 089 serial port to a PC either a straight or a so called null modem cable may be used JP1 and JP2 are plugged in for the straight cable and JP3 JP4 are empty The jumper configuration is reversed for the null modem cable as shown in Table 1 3 Straight Cable Default Installed Installed Null Modem Cable Alternative Installed Installed Table 1 1 Jumper settings on Debug Board JP1 through JP4 can also be used to alter the connection when the PC is not configured as a DCE device Table 1 2 shows the connections necessary for the straight DB9 cable and the pin definitions
95. esent Many meter manufacturers assemble the meter PCB with the 71M6521 IC and the other electronic components first and then join the meter PCB with the meter enclosure sensors and other main components separately at a later production step Typically final test ATE and calibration is performed after this second step Programming of the flash memory and insertion of a battery may happen at intermediate steps To prevent battery drainage it is essential that the code is written to permit transition to sleep mode immediately after the battery is inserted into the meter PCB Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 65 of 111 g STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 2 4 2 4 1 TESTING THE DEMO BOARD This section will explain how the 71M6521 IC and the peripherals can be tested Hints given in this section will help evaluating the features of the Demo Board and understanding the IC and its peripherals FUNCTIONAL METER TEST This is the test that every Demo Board has to pass before being integrated into a Demo Kit Before going into the functional meter test the Demo Board has already passed a series of bench top tests but the functional meter test is the first test that applies realistic high voltages and current signals from current transformers to the Demo Board Figure 2 18 shows a meter connected to a typical calibration system The calibrator supplies calibrated voltage
96. figuration 12 Figure 1 4 Port Configuration 00 14 Figure 1 5 Hyperterminal Sample Window with Disconnect Button 2 21 4 4 2 4 2 15 Figure 1 6 71 6521 CE MPU Register Interpreter 26 Figure 1 7 Pre Wired Shunt Resistor 30 Figure 1 8 Load Line with Shunt Resistor 30 Figure 1 9 Shunt Connection D6521T4A7 D6521T4A8 and 06521 4 10 31 Figure 1 10 Typical Calibration Macro file 33 Figure 1 11 Emulator Window Showing Reset and Erase Buttons essen 35 Figure 1 12 Emulator Window Showing Erased Flash Memory and File Load Menu 35 Figure 2 1 Watt Meter with Gain and Phase Errors sise 49 Figure 2 2 Phase Angle Definitions ice 54 Figure 2 3 Calibration Spreadsheet for Three Measurements nennen nennen 56 Figure 2 4 Calibration Spreadsheet for Five Measurements nennen nennen 56 Figure 2 5 Calibration Spreadsheet for Fast Calibration 57 Figure 2 6 Non Linearity Caused by Quantification Noise
97. figure the compute engine Usage C option argument Command CEn Compute Engine Enable 1 Enable 0 Disable combinations CTn Select input n for TMUX output pin Enter n in hex notation CREn RTM output control 1 gt Enable 0 Disable CRSa b c d Selects CE addresses for RTM output maximum of four Example CEO Disables the CE Selects the CE BUSY signal for the TMUX output pin Calibration Commands Description Calibration related commands A full auto calibration can be implemented by compiling the Demo Code with auto calibration selected as an option Due to space restrictions the auto calibration is not implemented in the Demo Code supplied with the Demo Boards Usage CL option Command CLC Switches the CLI to Intel hex format e g for loading combinations calibration data via the serial port CLD Restores calibration to defaults CLR Restores calibration from EEPROM CLS Saves calibration to EEPROM Commands for Identification and Information Description Allows user to display information messages Usage Returns the Demo Code version The command is used to identify the revisions of Demo Code and the contained CE code Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 19 of 111 g ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Commands for the
98. hen disabled VLC2 VLC1 and VLCO are ground as are the COM and SEG outputs To access the LCD_EN register we apply the following CLI commands gt RI21 Reads the hex value of register 0x2021 gt 25 Response from Demo Code indicating the bit 5 is set gt 21 5 Writes the hex value 0x05 to register 0x2021 causing the display to be switched off gt RI21 25 Sets the LCD_EN register back to normal The LCD_CLK register determines the frequency at which the COM pins change states A slower clock means lower power consumption but if the clock is too slow visible flicker can occur The default clock frequency for the 71M6521 Demo Boards is 150Hz LCD_CLK 01 Register Name Address bits R W Description LCD _CEKT1 0 2021 1 0 R W Sets the LCD clock frequency i e the frequency at which SEG and COM pins change states Note fy CKADC 128 38 400 00 f 01 1 2 10 14 27 11 1 2 Page 68 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN To change the LCD clock frequency we apply the following CLI commands gt RI21 gt 25 gt RI21 24 gt RI21 25 Reads the hex value of register 0x2021 Response from Demo Code indicating the bit 0 is set and bit 1 is cleared Writes the hex value 0x24 to register 0x2021 clearing bit 0 LCD flicker is visible now Writes the original value back to LCD_CLK 2 4 6 SUPPLY CURRENT MEASUREMENTS Some precautions have to be taken when exa
99. ibe the commands in detail Commands for CE Data Access CE DATA ACCESS Description Allows user to read from and write to CE data space Usage Starting CE Data Address option option Command Read consecutive 16 bit words in Decimal combinations Read consecutive 16 bit words in Hex 10 Update default version of CE Data in EEPROM Important The CE must be stopped CE0 before issuing this command Example 40 Reads CE data words 0x40 0x41 and 0x42 7E 12345678 9876ABCD Writes two words starting 0 7 CE data space is the address range for the CE DRAM 0x1000 to 0x13FF All CE data words are o in 4 byte 32 bit format The offset of 0x1000 does not have to be entered when using the S command thus typing JA will access the 32 bit word located at the byte address 0x1000 4 A S 0x1028 Commands for MPU XDATA Access MPU DATA ACCESS Description Allows user to read from and write to MPU data space Usage Starting MPU Data Address option option Command Read three consecutive 32 bit words in Decimal combinations Read three consecutive 32 bit words in Hex Write the values n and to two consecutive addresses starting ata Example 08 Reads data words 0x08 0 0 0x10 0x14 04 12345678 9876ABCD Writes two words starting 0x04 MPU or XDATA space is the address range for
100. ies are directly available as the values read from the accumulation registers np multiplied with the LSB value which is the product of the LSB of the CE and the VMAX and IMAX design constants Q LSB IMAX VMAX LSBce LSB IMAX VMAX LSBce Page 52 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 2 2 2 2 1 g J TERIDIAN The accumulated voltage is available as the value read from its accumulation register multiplied with its LSB value n 4PRE _ SUM SUM _ CYCLES n LSB 3 761 10 As in the methods described before we can determine the voltage error from Ax E tl As in the methods described before we calculate PHADJ from the determined phase lag tan g 1 2 201 279 cos 2f T 1 2 sin 2af T tan 1 2 cos 2af T The correction factor for the current is determined by PHADJ Pl COS CAL IA CAL VA CALIBRATION PROCEDURES GENERAL PRECAUTIONS Calibration requires that a calibration system is used i e equipment that applies accurate voltage load current and load angle to the unit being calibrated while measuring the response from the unit being calibrated in a repeatable way By repeatable we mean that the calibration system is synchronized to the meter being calibrated Best results are achieved when the first pulse from the meter opens the measurem
101. if Ets TERIDIAN SEMICONDUCTOR CORP channel B is used for ie 116 600 OHM current shunt 2 3 71M6521 Demo Board Schematic SMT 64 Pin Package GND_2 aaa MOUNT Bize Document Number ev Sr B D6521T4A10 10 Date Tuesday 13 2008 Bheet 4 of 2 Revision 2 18 Figure 4 5 D6521T4A10 Demo Board Electrical Schematic 1 3 2005 2009 TERIDIAN Semiconductor Corporation Page 83 of 111 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP Should be removed if present on the board DO NOT CONNECT VBAT T 600 OHM En C26 L10 NEUTRAL vent 1000PF E JPB r 4 BATTERY a aw _ 1000pF 0 tuF V3P3D gt 17 SEGOO n 8 SEGO0 15 52601 SEGO1 1000 5 19 EGOZ cad 5 SEGO2 Soor bd 1000pF SEGS SCLK 0 SEGO4 7 SEGA SDATA SEGOS LCD Lo Ee 1 88 8 7 22 To enable RESET
102. igure 2 14 Optical Port Circuitry on the Demo Board 2 3 7 RESET AND PB SWITCHES If not used the RESET and PB pins should be connected to DGND either directly or via a resistor as shown in Figure 2 15 This ensures good EMI performance If RESET has to be enabled for testing Ri has to be removed 71M6521 T7 RESET DGND Figure 2 15 RESET pin disabled If the RESET and PB pins are to be used in the battery modes care must be taken to ensure proper supply of the associated switches In most cases it is sufficient to supply RESET and PB with a voltage from the battery as shown in Figure 2 16 Some of the Demo Boards have dual supply options since they may be operated with or without a battery In these cases the voltage to the switches may be supplied from two sources VBAT and V3P3 see Figure 2 17 In sleep and LCD mode VBAT supplies voltage to the switch When the battery is not installed V3P3 enables the switch in mission and brownout mode Page 64 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d jJFTERIDIAN V3P3D 1 71 6521 VBAT po N RESET DGND mission brownout modes RESET DGND Figure 2 17 RESET Switch with Multiple Supplies 2 3 8 OPERATION WITH BATTERIES Some types of meters are equipped with batteries mostly to support TOU time of use functions In these meters the battery maintains the oscillator circuit and the RTC when board power is not pr
103. in and phase errors They include errors in voltage attenuators current sensors and in ADC gains In other words no errors are made in the input or meter boxes NPUT ERRORS __ METER gt gt A 75 IDEAL I ACTUAL I Ay is phase lag 5 is phase lead TN w IDEAL IV cos f ACTUAL IV Ay Axy cos Ps Vnus gt Aw gt IDEAL V ACTUAL V ACTUAL IDEAL ACTUAL _ 1 IDEAL IDEAL ERROR Figure 2 1 Watt Meter with Gain and Phase Errors During the calibration phase we measure errors and then introduce correction factors to nullify their effect With three unknowns to determine we must make at least three measurements If we make more measurements we can average the results CALIBRATION WITH THREE MEASUREMENTS A simple calibration method uses three measurements Typically a voltage measurement and two Watt hour Wh measurements are made A voltage display can be obtained for test purposes via the command gt MR2 1 in the serial interface Let s say the voltage measurement has the error Ey and the two Wh measurements have errors Eo and where Eo is measured with 0 and Ego is measured with 60 These values should be simple ratios not percentage values They should be zero when the meter is accurate and negative when the meter runs slow The fundamental freq
104. io In order to be used with a calibrated load or a meter calibration system the board should be connected to the AC power source using the spade terminals on the bottom of the board The current transformers should be connected to the dual pin headers on the bottom of the board The Demo Boards D6521T4A7 and D6521T4A8 are shipped preconfigured for resistive JA shunt operation Instructions for using these boards with a CT can be found in the E schematics see Appendix Once voltage is applied and load current is flowing the red LED D5 will flash each time an energy sum of 3 2 Wh is collected The LCD display will show the accumulated energy in Wh when set to display mode 3 command gt M3 via the serial interface Similarly the red LED D6 will flash each time an energy sum of 3 2 VARh is collected The LCD display will show the accumulated energy in VARh when set to display mode 5 command gt 5 via the serial interface ADJUSTING THE KH FACTOR FOR THE DEMO BOARD The Kh value can be derived by reading the values for IMAX and VMAX i e the RMS current and voltage values that correspond to the 250mV maximum input signal to the IC and inserting them in the following equation for Kh Kh VMAX 47 1132 In 8 WRATE X 3 1875 Wh pulse Where IMAX is the current scaling factor VMAX is the voltage scaling factor n_8 is the current shunt gain factor WRATE is the CE variable controlling Kh Naccis the p
105. ion procedure A Shunt WASUM WASUM VARASUM Resistor VARASUM IMAX IMAX_SHUNT WRATE WRATE_SHUNT B CT WBSUM VA IB VMAX VMAX WBSUM VARBSUM VARBSUM VA IB IMAX IMAX_CT WRATE WRATE CT Table 2 1 Calibration Summary Page 60 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 2 3 2 3 1 2 3 2 g J TERIDIAN SCHEMATIC INFORMATION In this section hints on proper schematic design are provided that will help designing circuits that are functional and sufficiently immune to EMI electromagnetic interference COMPONENTS FOR THE V1 PIN A voltage divider should be used to establish that V1 is in a safe range when the meter is in mission mode V1 must be lower than 2 9V in all cases in order to keep the hardware watchdog timer enabled The header shown above 1 in Figure 2 8 can be used to disable the hardware watchdog timer by plugging in a shorting jumper V3P3 V1 GND Figure 2 8 Voltage Divider for V1 On the 6521 Demo Boards this feature is implemented with resistors R83 R86 and TP10 See the board schematics in the Appendix for details OSCILLATOR The oscillator of the 71M6521 drives a standard 32 768kHz watch crystal see Figure 2 9 Crystals of this type are accurate and do not require a high current oscillator circuit The oscillator in the 71M6521 has been designed specifically to handle watch crystals an
106. l connection is set up properly Sending the semicolon character from the terminal to the 8KB Demo Code will cause the Demo Code to repeat the last command This is useful when examining the same memory location several times as sometimes required when checking the development of temperature voltage or energy values over time Using the Hex Record Format Intel s Hex record format allows program or data files to be encoded in a printable ASCII format allowing editing of the object file with standard tools and easy file transfer between a host and target An individual Hex record is a single line in a file composed of one or several Hex records Hex Records are character strings made of several fields which specify the record type record length memory address data and checksum Each byte of binary data is encoded as a 2 character hexadecimal number the first ASCII character representing the high order 4 bits and the second the low order 4 bits of the byte The six fields that comprise a Hex record are defined in Table 1 7 Page 22 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN Field Name Characters Description 1 Start code 1 An ASCII colon 2 Byte count 2 The count of the character pairs in the data field The 2 byte address at which the data field is to be loaded into 3 Address 4 memory This is the physical XRAM or I O RAM address not the 4 byte address used by the c
107. le Female 2m length Digi Key AE1020 ND CD ROM containing documentation data sheet board schematics BOM layout Demo Code and utilities Adapter PCB ICE connector to 6X1 header D6521T4A10 only Connector adapter for 5 VDC supply D6521T4A10 only optional Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 9 of 111 g ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 4 COMPATIBILITY This manual applies to the following hardware and software revisions 71M6521FE chip revision A06 71M6521 chip memory configurations 71M6521BE 8KB 71M6521DE 16KB 71M6521FE 32KB Demo D6521T4A7 64 pin REV 7 0 D6521T4A8 64 pin REV 8 0 and D6521T4A10 64 pin REV 10 0 Demo Kit firmware revision 4 7 and later 1 5 SUGGESTED EQUIPMENT NOT INCLUDED For functional demonstration w MS Windows versions XP ME or 2000 equipped with 85232 port COM port DB9 connector For software development MPU code Signum ICE In Circuit Emulator ADM 51 http www signum com Keil 8051 C Compiler kit CA51 http www keil com c51 ca51kit htm http www keil com product sales htm 1 6 DEMO BOARD TEST SETUP Figure 1 1 shows the basic connections of the Demo Boards plus Debug Boards with the external equipment Figure 1 1 Demo Board Basic Connections The Debug Board can be plugged into J2 of the Demo Board One spacer of the Debug Board should be removed as sh
108. libration Spreadsheets XLS supports entry of data directly obtained from the 71M6521BE as Hex Records see Figure 1 6 Entering a hex value e g for V2SQSUM in the yellow fields will automatically calculate and display the corresponding RMS value in the green field in column Y based on the design constants VMAX IMAX LSB etc Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 25 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 2300 Nominal power ATER DIAN 0 6389 Nom power interval SEMICONDUCTOR ET LSB from data sheet 7 sag thr factor real power W accumulation interval s angle REV 4 14 Results will show in green fields Wh accumulation interval Wh pulses accumulation interval 18376710 H 18376710 _ VSQSUM count 126 250 240 0 Vrms 23942406 23942406 WSUM count 2 000 20 Wh 5 8305916 8305916 ISQSUM count 29 424 30 0 Irms i 443143 443000 sag threshold 80 000 Vrms 8311 creep threshold 2 499 Wh h o 127911760 127911760 Vnominal rated 229 926 230 0 Vrms 7646227 il Wnominal 0 639 0 639 W 5 __389 1 000 1 000 Kh Frequency 60 00 60 00 Hz mainedge 120 120 count n 521 DELTA_T 52 1 Figure 1 6 71M6521BE CE MPU Register Interpreter 1 7 5 USING THE BATTERY MODES The 71M6521 is in so called Mission mode as long as 3 3VDC is supplied to the V3P3SYS pin
109. ls This memory location contains the current chip temperature relative to 0x00CO DELTA T the reference temperature defined by TEMP NOM EET 0 1 0x00C4 IISQRT Squared current for channel B Used for neutral tamper This memory location contains the energy value collected in the last 0x00C8 WISUM accumulation interval for channel B LSB 6 6952 10 VMAX IMAX Wh This memory location contains the sum of the squared current values 0x00CC I1SQSUM collected in the last accumulation interval for channel B LSB 6 6952 10 IMAX Wh 0 0004 IOSQRT ES Squared current for channel A Used for neutral tamper This memory location contains the sum of the squared current values 0x00DC IOSQSUM collected in the last accumulation interval for channel A LSB 6 6952 10 IMAX Wh This memory location contains the energy value collected in the last 0x00D8 WOSUM accumulation interval for channel A LSB 6 6952 10 VMAX IMAX Wh 0 00 4 FREQ The current frequency of the mains voltage signal LSB 1 170 396 Ox00E8 CESTATUS copy of the current STATUS word of the 0 00 TEMP_RAW The unfiltered unscaled output of the temperature sensor 0x00F0 The number of zero crossings of the mains voltage signal in the last accumulation interval Accumulated total energy for in the last accumulation interval for WSUM ACC channel LSB 6 6 6952 10 VMAX IMAX Wh 0x00FC VBAT Battery voltage Th
110. ments per digit 12 7mm character height 89 0 x 17 7mm view area Watts VARS red LEDs D5 D6 Measurement Range Voltage 120 700 V rms resistor division ratio 1 3 398 Current 1 7Q termination for 2 000 1 CT input 200A Regulatory Compliance RoHS For boards manufactured after 7 17 2006 the PCB components and processing are in compliance with the RoHS guidelines Page 74 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 SEMICONDUCTOR CORP 3 3 CHANGES TO THE D6521T4A7 3 3 1 3 3 2 3 3 3 3 3 4 The Demo Board revision 7 0 D6521T4A7 improves performance over previous revisions in the following areas 1 Optimized schematics for increased resistance against ESD 2 Optimized layout for improved accuracy at low currents 3 Added ICE E signal to headers J14 and J15 4 Default configuration is for resistive shunt The changes made to the D6521T4A7 design will be described in the following four chapters INCREASED ESD PROTECTION The following components were added or removed to improve the stability of the V3P3D net for increased rejection of ESD as specified by IEC 6100 4 2 ESD spikes applied to table top equipment via a metallic plate mounted underneath the meter C38 1 000pF added at J2 C44 1 000pF added at J14 C45 1 000pF added at J12 C46 1 000pF added at JP12 C47 1 000pF added at JP5 Pull up resistors R88 R89 R119 removed at J14 C7 C13
111. mplementation result in slightly different behavior of the Demo Code These differences are listed in chapters 1 7 4 1 and 1 7 4 2 In the command line interface of the 71M6521FE Demo Code a transition to Intel hex format can be initiated by typing CLC To revert to the regular CLI the reset button must be pushed 71M6521DE 16KB On start up the 16KB version of the Demo Code transfers the CE data from EEPROM into the CE DRAM If for some reason the EEPROM is erased or CE data is compromised the CE will be halted and the HELLO prompt will be displayed until the user supplies CE data via the UART When receiving a CR lt LF gt character combination from the terminal the 16KB Demo Code will send asterisk This character serves as a feedback to the user signaling that the Demo Board is functional and that the serial connection is set up properly 71M6521BE 8KB On start up the 8KB version of the Demo Code transfers the CE data from flash memory into the CE DRAM The flash memory contains default settings when the Demo Board is used for the first time After the HELLO prompt the Demo Board will display the last stored energy value on its LCD When receiving a CR lt LF gt character combination from the terminal the 16KB Demo Code will send line feed character followed by an asterisk This character serves as a feedback to the user signaling that the Demo Board is functional and that the seria
112. n the phase calibration circuit CAL_1 1 27 2 27 PHADJ 20 27 216 7 1 2 0 2 cos 2af T 1 22 CAL _ CALIBRATION WITH FIVE MEASUREMENTS The five measurement method provides more orthogonality between the gain and phase error derivations This method involves measuring Ev Eo E180 and Again set all calibration factors to nominal i e CAL_IA 16384 CAL_VA 16384 0 First calculate Axy from Ev 129 A 1 Calculate Ax from Eo and E480 _ 17 Ay cos 0 9 2 E 1 A A cos 1 IV cos 0 m s cos 180 9 3 E _ 5 _1 cos 1 dd IV cos 180 xy COS s 4 Eiso 2Ayy Ay 05 9 2 re Eg 2 2cos 6 3 E E 5 2 1 Use above results along with Ego and to calculate _ IV Ay Ay cos 60 gs IV cos 60 Ay Ay 0 Ay Ay tan 60 sin 1 Es _ IV Ayy Ay cos 60 IV cos 60 Ay Ay 0 Ay Ay tan 60 sin 1 Subtract 8 from 7 8 9 2Ayy Ay tan 60 sin use equation 5 E y 2 10 Eq 23 tan 60 sin 11 E 2 tan 60 tan Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 51 of 111 l STERIDIAN 71M6521 Demo Board U
113. nt A exceeded maximum FO CE reflects FO bit from CE MINT minimum temperature exceeded Revision 2 18 MAXT maximum temperature exceeded ONE SEC Table 1 15 STATUS Register 2005 2009 TERIDIAN Semiconductor Corporation Page 43 of 111 d 3TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 10 5 CE CODE MEMORY LOCATIONS 71M6521DE FE All CE memory locations are listed in the 71M6521DE FE data sheet These locations are listed again in Table 1 16 along with the addresses used by the CLI and the physical addresses used by the hex records interface The corresponding CE address for the most significant byte is given by 0x1000 4 x CLI address and 0x1003 4 x CLI address for the least significant byte LI d id 0x1020 16384 These constants control the gain of their respective channels 0x1024 16384 The nominal value for each parameter is 2 16384 The gain of each channel is directly proportional to its CAL parameter 0x1028 16384 Thus if the gain of a channel is 1 slow CAL should be scaled 0 102 16384 by 11 0 01 These two constants control the CT phase compensation No compensation occurs when PHADJ_X 0 As PHADJ_X is om oe increased more compensation lag is introduced Range 2 5 1 Watt pulse generator input see DIO_PW bit The output pulse is APULSEW Fs 2782 WRATE X 2 This input is oe 58
114. oltage output of the chip controlled by the internal 3 3V selection switch In mission mode this pin is internally connected to V3P3SYS In BROWNOUT mode it is internally connected to VBAT This pin is floating in LCD and sleep modes VBAT Battery backup power supply A battery or super capacitor is to be connected between VBAT and GNDD no battery is used connect VBAT to V3P3SYS V2P5 Ed Output of the internal 2 5V regulator A 0 1uF capacitor to GNDA should be connected to this pin Analog Pins Name Type Desrpion 000000000000 IA IB Line Current Sense Inputs These pins are voltage inputs to the internal A D converter Typically they are connected to the outputs of current sensors Unused pins must be connected to Line Voltage Sense Inputs These pins are voltage inputs to the internal A D converter Typically they are connected to the outputs of resistor dividers Unused pins must be connected to V3P3A or tied to the voltage sense input that is used V1 Comparator Input This pin is a voltage input to the internal comparator The voltage applied to the pin is compared to an internal BIAS voltage 1 6V If the input voltage is above the refer ence the comparator output will be high 1 If the comparator output is low a voltage fault will occur capacitor to GNDA should be connected to this pin VREF Voltage Reference for the ADC This pin is normally disabled by setting the VREF CAL
115. ommand line interface CLI 4 Type 2 00 01 or 02 From 0 to n bytes of executable code or memory loadable 5 Data 0 2n data nis normally 20 hex 32 decimal or less The least significant byte of the two s complement sum of the 6 Checksum 2 values represented by all the pairs of characters in the record except the start code and checksum Table 1 7 Fields of a Hex Record Each record may be terminated with a CR LF NULL character Accuracy of transmission is ensured by the byte count and checksum fields This is important when series of values such as calibration constants are transmitted to a meter e g by ATE equipment in a factory setting When entering hex records manually the user may also choose FF wild card as the checksum In this case the Demo Code omits comparing the checksum with the received record s This is how the checksum is calculated manually if necessary 1 The hex values of all bytes except start code and checksum itself are added up 2 The last two hex digits are subtracted from OxFF 3 The value 0x01 is added As opposed to the standardized Hex records that offer three possible types data termination segment base six different types are supported for communicating with the 71M6521BE and 71M6521DE Demo Codes These data types basically encode command types read write along with the data source or destination as listed in Table 1 8 Revision 2 18 2005 2009 TERID
116. ommands for EEPROM Control Description Allows user to enable read and write to EEPROM Usage EE option arguments Command EECn EEPROM Access 1 gt Enable 0 gt Disable combinations EERa b Read EEPROM at address for b bytes EEE Erase the EEPROM EESabc xyz Write characters to buffer sets Write length EETa Transmit buffer to EEPROM at address a EEWa b z Write values to buffer Example EEShello EET 0210 Writes hello starting at EEPROM address 0x210 command takes several seconds During this time no other commands can be entered a The EEC1 command must be issued before the EEPROM interface can be used The execution of the EEE Auxiliary Commands Description Various Commands Typing a comma repeats the command issued from the previous command line This is very helpful when examining the value at a certain address over time such as the CE DRAM address for the temperature The slash is useful to separate comments from commands when sending macro text files via the serial interface All characters in a line after the slash are ignored BT Commands execution of a battery test Page 18 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 d STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Commands controlling the CE Description Allows the user to enable and con
117. on Firmware for the Demo Boards can be updated to revision 4 7 or later using either an in circuit emulator ICE or the Flash Programmer TFP2 as described in section 1 9 5 The Demo Code is useful due to the following features e t provides basic metering functions such as pulse generation display of accumulated energy frequency date time and enables the user to evaluate the parameters of the metering IC such as accuracy harmonic performance etc e maintains and provides access to basic household functions such as the real time clock RTC e lt provides access to control and display functions via the serial interface enabling the user to view and modify a variety of meter parameters such as Kh calibration coefficients temperature compensation etc e provides libraries for access of low level IC functions to serve as building blocks for code development The Demo Code source files provided with the TERIDIAN Demo Kits contain numerous routines that are not implemented due to restrictions in available flash memory space However by recompiling the code using different compile time options many code variations with different features can be generated See the Software User s Guide SUG for a complete description of the Demo Code Page 36 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN 1 10 2 DEMO CODE VARIATIONS All recent Demo Kits are shipped with the 71M6521FE meter
118. own in Figure 1 1 Alternatively both boards can be connected using a flat ribbon cable as shown in Figure 1 2 A male header has to be soldered to J3 of the Debug Board and the female to female flat ribbon cable 15 not supplied with the Demo Kit use Digi Key P N 1606 or similar Page 10 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Ribbon Cable Power M Figure 1 2 Demo Board Ribbon Cable Connections The 71M6521 Demo Board block diagram is shown in Figure 1 3 It consists of a stand alone meter Demo Board and an optional Debug Board The Demo Board contains all circuits necessary for operation as a meter including display calibration LED and power supply The Debug Board when not sharing a power supply with the meter is optically isolated from the meter and interfaces to a PC through a 9 pin serial port Connections to the external signals to be measured i e scaled AC voltages and current signals derived from shunt resistors or current transformers are provided on the rear side of the Demo Board It is recommended to set up the Demo Board with no live AC voltage connected and to connect live AC voltages only after the user is familiar with the demo system Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 11 of 111 d 3TERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP DEMONST
119. p Modes when in Brownout Mode Description Allows the user switch to LCD and Sleep mode when the 71M6521 is in Brownout mode Usage B option value Command BL Enters LCD mode combinations BS Enters Sleep mode BWSn Prepares Sleep mode with the wakeup timer set to n seconds BWMm Prepares Sleep mode with the wakeup timer set to m minutes Example BWS8 Enters Sleep mode with the wakeup timer set to 8 seconds BS The 71M6521 will enter Sleep mode and return to Brownout mode after 8 seconds Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 21 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 1 7 4 1 7 4 1 1 7 4 2 1 7 4 3 COMMUNICATING VIA INTEL HEX RECORDS Due to memory restrictions the text based command line interface contained in the 71M6521FE Demo Code is not available for the 71M6521BE and 71M6521DE Demo Codes In addition the 16KB version of the Demo Code stores the CE data in EEPROM this saves valuable flash memory space The 8KB version of the Demo Code avoids the code intensive storage on EEPROM and uses flash memory instead Communication with the Demo Codes written for the 71M6521BE and 71M6521DE ICs is accomplished using a simplified protocol based on Intel Hex records These records can still be sent and received with an ordinary terminal and coding and decoding of commands and responses is straightforward These differences of i
120. pdate the WRATE register at CE address 0x11 with WRATE_SHUNT using the command 11 WRATE SHUNT Test for accuracy at 15A 240V at phase angle 0 phase angle 60 and at phase angle 60 Apply the error values to the calibration spreadsheet revision 2 0 or later and determine the calibration factors for channel A i e CAL CAL VA and PHADJ A Update the CE registers 0x08 0x09 and OxOE of the compute engine with the calibration factors obtained from the spreadsheet using the commands 8 CAL A Retest for accuracy at several currents and phase angles At this point channel A is calibrated WSUM will be based on the voltage applied to the meter and the current flowing through the shunt resistor The pulses generated will be based on the parameters entered for channel A Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 59 of 111 l ATERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP Calibration for CT Channel B 1 Compute IMAX for the CT channel MAX CT based on the CT turns ratio N and the termination resistor value Rr using the formula IMAX CT 177mV N Rr This value is used in the following step as MAX CT 2 Compute CT based on the values obtained for MAX CT and the formula given in 1 8 2 WRATE CT VMAX 47 1132 Kh In 8 X 3 Update the WRATE register CE address 0x11
121. pin is pulled high which resets the IC into a known state Note The RESET button may be disabled in the Demo Board default configuration The RESET button can be enabled by removing R91 9 TP22 Test points for pulses generated by the Wh LED 3 pin header for connection of an external battery at pin 2 at 10 JP8 GND VBAT pin 3 If no battery is connected a jumper must be installed across pins 1 2 Selector for ICE regular operation Jumper 1 2 regular operation default n 87 ICE enable Jumper 2 3 ICE operation Remove this jumper for brownout current measurements Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 71 of 111 71M6521 Demo Board User s Manual d jTERIDIAN 12 U7 LCD 13 U5 71M6521 in QFN 68 package 2 pin test point Pin 1 is the IB input to the IC and pin 2 is the V3P3 14 TP19 IB V3P3 reference 15 sw2 PB Pushbutton used to wake up the chip when in sleep or LCD mode This button can also be used in Mission Mode to cycle the display An emulator or flash programmer can be connected to this 5 pin 16 J15 header For production units this is a more economical alternative to J14 Connector for plugging in the Debug Board either directly or via a Wr DEBUG flat ribbon cable 18 TP17 2 pin header providing access to TMUXOUT and CKTEST 2x10 male header with 0 05 pitch The connector of the Signum 19 J14 EMULATOR I F ADM51 emulator b
122. rical Schematic 1 2 2005 2009 TERIDIAN Semiconductor Corporation Page 79 of 111 71M6521 Demo Board User s Manual TERIDIAN SEMICONDUCTOR CORP VBAT V3P3 x T 500 OHM C26 L10 1000 i VBAT El JP8 1 035 VBAT 3 END a 9 C19 1000pF V3P3D gt SEG00 T T L 6 8 sto E SEGOT 1000 5 56801 49 5602 C30 C28 56005 us 1000pF 0 1uF SEG3 SCLK Pig 5 04 SEG4 SDATA H3 SEGOS LCD ou SEGS SFR 3 SEG SEGOO 1 42 To enable RESET d p SEGU7 4 7 SEG35 DI015 Change R91 to 10K 25 SEGOS SEGO 3 4g 5 VBAT SEE ON RESET 48 56008 3g SEGOJ 4 78 70 60 8A 8G 8D o o RESET SEGOS 57 SEG NC 38 SEGTE SEG10 2 NC 7 70 R87 swt C23 28 SEG SEGO2 6 99 70 Sr 1K OF R91 SEG11 29 SEGI2 7 8B 6C 5DP NC NC 6L 56 SEG15 aib
123. rmal operation Push button input A rising edge sets the ZE_PB flag and causes the part to wake up if it is in SLEEP or LCD mode PB does not have an internal pull up or pull down If unused this pin must be terminated to GNDD X4MHz This pin must be connected to GNDD Table 4 6 71M6521 Pin Description 2 2 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 107 of 111 d J TERIDIAN PINOUT 68 a 6 5 oug y 5 3509 5p 55 c gt Ow 2s ae lt 9 6 amp x FX OF gt gt gt gt gt LT LI LI LJ LI LJ LJ LT LJ LJ 1 51 RESET E_RXTX SEG38 2 OPT_TX DIO2 3 49 TMUXOUT 4 RX 5 47 SEG40 DIO20 TX 46 SEG31 DIO11 SEG3 T E R D N SEG30 DIO10 V3P3D SEG29 DIO9 CKTEST SEG19 SEG28 DIO8 V3P3SYS 7 1 6 5 2 1 SEG27 DIO7 SEG4 SEG26 DIO6 SEG5 SEG25 DIO5 SEG37 DIO17 SEG24 D104 como ICE_E SEG18 com2 SEG17 SEG16 N N 7 A oes ora o9 6656509555555 ou u o 0 0 0 o o o o SEG34 DIO14 SEG35 DIO15 SEG36 DIO16 SEG39 DI019 Figure 4 27 TERIDIAN 71 6521 68 Pinout top view Page
124. roduct of the I O RAM variables SAMPS and SUM CYCLES and X is the pulse frequency factor derived from the CE variables PULSE SLOW and PULSE FAST The small deviation between the adjusted Kh and the ideal Kh of 3 2 is covered by calibration The default values used for the 71M6521 Demo Board are WRATE 122 IMAX 208 VMAX 600 In_8 1 Nacc 2520 X 6 Explanation of factors used in the Kh calculation WRATE The factor input by the user to determine Kh IMAX The current input scaling factor i e the input current generating 177mVrms at the IA IB IC input pins of the 71M6521 177mV rms is equivalent to 250mV peak VMAX The voltage input scaling factor i e the voltage generating 177mVrms at the VA VB VC input pins of the 71M6521 In 8 The setting for the additional ADC gain 8 or 1 determined by the CE register A SHUNT Nacc The number of samples per accumulation interval i e SAMPS SUM CYCLES X The pulse rate control factor determined by the CE registers PULSE SLOW and PULSE FAST Page 28 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 1 8 3 l J TERIDIAN Almost any desired Kh factor can be selected for the Demo Board by resolving the formula for WRATE WRATE VMAX 47 1132 Kh In 8 X For the Kh of 3 2Wh the value 122 decimal should be entered for WRATE at location 0x11 using the CLI command gt 11 122 ADJUSTING THE DEMO BOARDS TO DIFFERENT CURRENT T
125. rt the HyperTerminal application or any other suitable communication program and create a session using the communication parameters shown in Table 1 4 Port speed baud 9600 300t 9600 300t 9600 3001 Data bits NN EN RE 7 7 ro M Table 1 4 COM Port Setup Parameters HyperTerminal can be found by selecting Programs Accessories 2 Communications from the Windows start menu The connection parameters are configured by selecting File gt Properties and then by pressing the Configure button see Figure 1 4 A setup file file name Demo Board Connection ht for HyperTerminal that can be loaded with File 2 Open is also provided with the tools and utilities on the supplied CD ROM COM1 Properties Port Settings Bits per second 9600 Data bits 8 None Stop bis Flow control kon Restore Defaults Figure 1 4 Port Configuration Setup Note Port parameters can only be adjusted when the connection is not active The disconnect button as shown in Figure 1 5 must be clicked in order to disconnect the port Page 14 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g J TERIDIAN 00000000 00000000 00069C2F 00 F7 3602D93E 207463CB 1770 5E 0820 BB 0000 E1 00 DE 05 4DECBE 3DCC7800 0820 A3 0007D58D lt Connected 0 22 30 ANSIW 9600 7 N 2 Figure 1 5 Hyperterminal Sample Window with Disconnect Button
126. s 71M6521BE 71M6521DE 71M6521FE and removed re ferences to discontinued versions 71M6521B 71M6521D 71M6521F Modified statements in 1 10 2 to reflect the fact that all Demo Kits are shipped noe ex clusively with the 71M6521FE Corrected value of PPMC for 71M6521BE Demo Code Added comments containing default values in MPU variable table for 71M6521DE FE Demo Code Updated chapter 1 3 Demo Kit Contents Updated default value and explanation of corresponding current value for IThrshldA in Table 1 13 Added alternative method for determining QUANT in section 2 2 6 User Manual This User Manual contains proprietary product definition information of TERIDIAN Semiconductor Corporation TSC and is made available for informational purposes only TERIDIAN assumes no obligation regarding future manufacture unless agreed to in writing when manufactured and sold this product is sold subject to the terms and conditions of sale supplied at the time of order acknowledgment including those pertaining to warranty patent infringement and limitation of liability TERIDIAN Semiconductor Corporation TSC reserves the right to make changes in specifications at any time without notice Accordingly the reader is cautioned to verify that a data sheet is current before placing orders TSC assumes no liability for applications assistance TERIDIAN Semiconductor Corp 6440 Oak Canyon Rd Suite 100 Irvine CA 92618 5201 TEL 714
127. s in the VAR calculation that can be eliminated using the QUANT_VAR variable QUANT_VAR is determined using the same formula as QUANT CALIBRATING METERS WITH COMBINED CT AND SHUNT RESISTOR In many cases it is desirable to discourage tampering by using two current sensors The simple tampering method that involves connecting the low side of the load to earth ground neutral can be detected by adding a second current sensor in the neutral path as shown in Figure 2 7 In this configuration the shunt resistor is connected to the IA channel while the current transformer is connected to the IB channel of the 71M6521 Calibrating this arrangement requires a few extra steps above the regular calibration The calibration procedure applies to the sensor arrangement described above SHUNT IB Preparation 1 Set the meter equation field of the configuration RAM for EQU to zero using the command 2 RIOO 10 EQU 0 1 TMUX 0 3 For the sake of calculation individual WRATE parameters for Pulse generation i e WRATE_SHUNT and WRATE_CT will be used 4 Itis also necessary to compute and estimate MAX SHUNT and IMAX_CT parameters for meter billing purposes 5 Using IMAX_SHUNT and VMAX the energy calculations for channel A should be performed The energy calculations for channel should be performed using MAX CT and VMAX 7 LSB values for measurements for WOSUM WISUM VAROSUM VARISUM IOSQSUM IISQSUM V
128. sabled the MPU functions at very low speed DIO pins and the UART are still functional If the chip supports the command line interface it will signal Brownout mode and the command prompt will be visible on the terminal connected to the Demo Board followed by the gt sign B gt Both the RESET and PB buttons are disabled in the Demo Board default configuration Section 3 contains instructions on how to enable RESET and PB Page 26 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 g J TERIDIAN The LCD displays a decimal dot in the left most digit to indicate that it is in Brownout mode as shown below The following commands can be entered via the CLI in Brownout mode BL enters LCD mode BS enters Sleep mode BWSn enters sleep mode for seconds then returns to Brownout mode BWMm enters sleep mode for m minutes then returns to Brownout mode In Sleep Mode almost all functions are disabled Only the RTC and the wakeup timer are still active The wakeup signal from the timer and the pushbutton SW2 on the Demo Board take the 71M6521 back to Brownout mode A hardwa reset while in any battery mode takes the 71M6521 back to Brownout mode Precautions when adding a battery When a battery or other DC supply is added to a Demo Board that is powered down the 71M6521 Demo Code will cause the chip to enter
129. ser s Manual SEMICONDUCTOR CORP 2 1 3 12 3 Eco tan 60 E 2 Now that we know the and errors we calculate the new calibration voltage gain coefficient from the previous ones CAL Vy a XV We calculate PHADJ from s the desired phase lag tan jl 2 2 1 2 cos 2af T 1 27 sin 2af T tan l 2 cos 2af T And we calculate the new calibration current gain coefficient including compensation for a slight gain increase in the phase calibration circuit CAL I 1 Ay 27 PHADJ 2 2 PHADJ 2 1 2 cos 2zf T 1 2 1 2 cosQzf T 1 2 PHADJ CAL FAST CALIBRATION A very fast calibration process can be implemented by offering a known voltage and current at exactly zero degree phase angle to the meter If the meter is exposed to the current and voltage source for a known integer number of accumulation intervals the accumulated real Wh and reactive VARh energy values along with the accumulated voltage V7h can be used to determine the calibration factors quickly Another advantage of this method is that no pulse counts are necessary since the energy accumulation values are directly accessible via their associated registers in the Demo Code The phase angle can be directly calculated from the inverse tangens of the ratio of reactive and real energy tan 2 tan n The energy quantit
130. ser s Manual SEMICONDUCTOR CORP In order to operate the D6521T4A7 Demo Board with a current shunt sensor the following measures must be taken 1 8 6 1 9 1 9 1 a Remove the jumper on JP17 b Make sure that L9 and L12 are removed and that R88 is installed c Make sure that R24 is a 10kQ resistor if IA IN is the input channel for the current shunt and that R106 is a 10kO resistor if IB IN is the input channel for the current shunt d TheLIVE line must be connected to the spade terminal J4 bottom of the board The blue and white pair of wires from the shunt resistor must be connected to contacts 1 and 2 on J3 if IA IN is the input channel or contacts 1 and 2 on J16 if IB IN is the input channel The white wire must be connected to pin 1 the blue wire must be connected to pin 2 f connection is necessary for the green wire from the pre wired shunt resistor ADAPTING DEMO CODE PARAMETERS TO OPERATION WITH SHUNT RESISTOR The ZMAX variable has to checked for current shunt mode using the formula IMAX 177mV Rsnunt The new value for IMAX XRAM address 0x0A should be entered using the command line interface as follows using the shunt resistor provided by TERIDIAN Rshunt 40040 with resulting IMAX 440A gt A 4400 IMAX values have a LSB resolution of 0 1A VMAX values have a LSB resolution of 0 1V Since has been changed WRATE has to be recalculated to maintain the Kh of 3 2Wh c pulse as
131. sin it arbe HART 26 1 8 Using the Demo Board for Metering Functions ss nnnnnennnnnnennnenense 28 1 8 1 Using the Demo Board CT Mode iii 28 1 8 2 Adjusting the kh Factor for the Demo Board ss 28 1 8 3 Adjusting the Demo Boards to Different Current Transformers and Voltage Dividers 29 1 8 4 Connecting Demo Boards to a Shunt Resistor nennen nens 30 1 8 5 Connecting Demo Board Revisions D6521T4A7 D6521T4A8 and D6521T4A10 to a Shunt Resistor 31 1 8 6 Adapting Demo Code Parameters to Operation with Shunt Resistor 32 1 9 Calibration Parameters 32 1 9 1 General Calibration Procedure sise 32 1 9 2 Updating the 6521 demo hex ini ir eni nta en REI REA 33 1 9 3 Calibration Macro File enne nennen nennen ener E a REE eaae renes nnne nnns 33 1 9 4 Updating Calibration Data in EEPROM nnn nennen 34 1 9 5 Loading the 6521 demo hex file into the Demo Board seen 34 1 9 6 Programming Interface of the 71 6521 36 1 10 Demo COG pc 36 1 10 1 Demo Code Description sise 36 1 10 2 Demo Code Variations saiisine eaae aaa Eaa aana aE A Aaaa
132. t OUT 50 STAR CONNECTION ou C22 0 1UF R15 R16 R17 R18 100 6 3V 2M 1 1W 274K 1 270 1 698 1 12 05 50 TANTALUM VAIN Ou END 600 OHM R32 co A TP2 Only one shunt can be used at a time 750 1 1000pF 1 IA L12 1B 53 i i Note 524 BOR Note 106 18 Lik 1 7 4 4 DC and R25 is NC if and R107 is NC if wc using current using current que i VREF ss shunt shunt GND VREF 16 600 OHM 17 6000HM OPTIONAL 0 1uF CAP MAY BE PLACED o BETWEEN VREF AND GND ol AN AAA JA C17 AN I T T 2 re 7 750 TPi C24 1 6 22pF J3 R24 gt R25 DA STER x 10K 3 4 XOUT amp X AC2 A2 1000pF XOUT C27 C15 1000 1000pF 1000pF BAVESDW 4 1 1 V3P3 C25 L 32 768kHz 1206 PACKAGE 22pF CONNECTIONS lt 4 XIN 59 yin L4 600 OHM 15 6000 GND 111 logo logo al sd o n U5A x NA 6521 EN 1 i 8104 750 TP19 TERIDIAN Warning 1 6 416 R106 gt R10 He 455 x 34 534 20 c29 EN 1000pF C36 cat 1000PF 1000pF 1000pF BAVESDW 1 TERIDIAN SEMICONDUCTOR CORP Me 4p n 71 6521 Demo Board Schematic SMT 64 Pin Package MOUNT Document Number lev B 065217447 7 Date Tuesday 17 2007 Ense 1 c 7 Revision 2 18 Figure 4 1 D6521T4A7 Demo Board Elect
133. the RTC to zero seconds 00 minutes 00 12 hours OC Wednesday 03 24 18 of May 05 2006 06 Uses the wild card checksum 10 0008 00 00004000 00004000 00004000 Writes the default values 0x4000 for the 00004000 E8 calibration constants CAL_IA CAL_IB CAL_VA and CAL_VC to the CE data RAM 00 starting at address 0x08 0008 The second command causes the Demo Code to write the data to permanent storage 00 0000 01 FF 10 1020 03 FF Causes the Demo Board to display the data from address 0x1020 to 0x102F Table 1 9 Hex Record Examples The Demo Board will not echo any inputs from the terminal they screen will stay blank except for the asterisk issued after the user enters lt CR gt lt LF gt It is useful to configure Hyperterminal for auto echo This can be done by selecting Properties from the File menu then clicking on the Settings tab and clicking the ASCII Setup button lt ENTER gt key is necessary at the end of a manually entered record Spaces in between the fields to increase readability as in the example above are ignored by the Demo Boards If a hex record is accepted the Demo Board returns a If the hex record is not accepted the Demo Board sends a and other text depending on the context only the 16KB Demo Code will send text Page 24 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN
134. the internal flash memory This interface consists of the following signals E RXTX data E TCLK clock E RST reset These signals along with and GND are available on the emulator header J14 Production meters may be equipped with much simpler programming connectors e g a 5x1 header Programming of the flash memory requires a specific in circuit emulator the ADM51 by Signum Systems http www signumsystems com or the Flash Programmer TFP2 provided by TERIDIAN Semiconductor In Circuit Emulator If firmware exists in the 71M6521 flash memory this memory has to be erased before loading a new file into memory Figure 1 11 and Figure 1 12 show the emulator software active In order to erase the flash memory the RESET button of the emulator software has to be clicked followed by the ERASE button Figure 1 11 Once the flash memory is erased the new file can be loaded using the commands File followed by Load The dialog box shown in Figure 1 12 will then appear making it possible to select the file to be loaded by clicking the Browse button Once the file is selected pressing the OK button will load the file into the flash memory of the 71M6521 IC At this point the emulator probe cable can be removed Once the 71M6521 IC is reset using the reset button on the Demo Board the new code starts executing Teridian Flash Programmer TFP2 Follow the instructions given in the User Manual for the TFP2 Page 34 of 111 200
135. tures are currently not supported by Demo Code Demo Code will be supplied to interested customers as soon as it becomes available 3 4 3 D6521T4A10 BOARD DESCRIPTION The D6521T4A10 Demo Board is very similar to the D6521T4A8 and D6521T4A7 Demo Boards The main functional elements and connectors are shown in Figure 3 5 7 0000000900090000 g Magnetic sensor s L luee 1 4 NERY pio her PA ENS 27 e BAT MODE ICE interface mu 5 VDC Power Supply T rr n 4 Components for India option MT1 R V1 VA IN Figure 3 5 D6521T4A10 Demo Board Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 77 of 111 g STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 4 APPENDIX Demo Board Description This appendix includes the following documentation tables and drawings for the D65214A7 D65214A8 and D6521T4A10 Demo Boards Schematics Bills of Materials Parts Lists Layout Views Debug Board Description Debug Board Electrical Schematic Debug Board Bill of Materials Debug Board PCB Silk screen layer Top and Bottom side Debug Board PCB Metal Layer Top and Bottom side signal layer Debug Board PCB Metal Layer Middle 1 ground plane Debug Board PCB Metal Layer Middle 2 supply plane 71M6521 Pin Out and Mechanical Description 71M6521 Pin Description 71M6
136. uency is fo T is equal to 1 fs where fs is the sample frequency 2560 62Hz Set all calibration factors to nominal CAL A 16384 CAL VA 16384 PHADJA 0 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 49 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP From the voltage measurement we determine that 129 Ay E 1 We use the other two measurements to determine and Axi _ IV Ay Ay cos 0 2 E IV 0 1 Ay Ay cos 9 1 28 Ag xm IV Ay Ay cos 60 9 je cos 60 9 4 IV cos 60 cos 60 x E Aw Au cos 60 cos gs sin 60 sin gs cos 60 Ay Ay cos Ay tan 60 sin 1 Combining 2a and 3a 4 1 tan 60 tan 9 Es m E E 1 tan 60 62 tan Eco E 1 tan 60 and from 2a 5 tan 1 COS 9 Now that we know the Axi and errors we calculate the new calibration voltage gain coefficient from the previous ones CAL_V A 7 3 CAL Vy XV We calculate PHADJ from s the desired phase lag tan 1 2 220 2 cosQf T PHADJ 2 A 1 2 sin 2zf T jl 1 27 cos 2zf T Page 50 of 111 2005 2009 TERIDIAN Semiconductor Corporation Revision 2 18 l J TERIDIAN And we calculate the new calibration current gain coefficient including compensation for a slight gain increase i
137. values in yellow fields Results will show in green fields Total Wh 0 8414 16384 16401 Expected Wh 0 7847 J 384 15263 Total VARh 00070 0 21312 0 0 47869219 4 16170 Total Wh 1973 Expected Wh Ant 0 0 72010832 Total VARh 0 0100 Figure 2 5 Calibration Spreadsheet for Fast Calibration 2 2 6 COMPENSATING FOR NON LINEARITIES Nonlinearity is most noticeable at low currents as shown in Figure 2 6 and can result from input noise and truncation Nonlinearities can be eliminated using the QUANT variable error Figure 2 6 Non Linearity Caused by Quantification Noise The error can be seen as the presence of a virtual constant noise current While 10mA hardly contribute any error at currents of 10A and above the noise becomes dominant at small currents The value to be used for QUANT can be determined by the following formula error 100 VMAX IMAX LSB Where error observed error at a given voltage V and current I VMAX voltage scaling factor as described in section 1 8 2 IMAX current scaling factor as described in section 1 8 2 V I QUANT Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 57 of 111 l STERIDIAN 71M6521 Demo Board User s Manual SEMICONDUCTOR CORP 2 2 7 LSB QUANT LSB value 7 4162 10 W Example Assuming an observed error as in Figure 2 6 we determine the error at 1A to be 1 If VMAX
138. w CAL should be scaled by 1 1 0 01 This constant controls the CT phase compensation No compensation 0x1030 PHADJ A occurs when PHADJ A 0 As PHADJ A is increased more compensation lag is introduced Range 2 1 This constant controls the CT phase compensation No compensation 0x1034 PHADJ B occurs when PHADJ B 0 As PHADJ B is increased more compensation lag is introduced Range 2 1 0148 used 0 0 _ used 0 0x103C 0x1040 0x5020 See description of CESTATE in the table below Kh VMAX IMAX 47 1132 WRATE 360 Nacc Wh pulse The default 0x1044 WRATE 389 value results in a Kh of 1 0Wh pulse when 2520 samples are taken in each accumulation interval aad VMAX 600 IMAX 208 In 8 1 0x1048 GAIN ADJ 16384 GAIN ADJ is controlled by the temperature compensation mechanism and scales all voltage and current inputs 16384 provides unity gain This parameter is added to the Watt calculation for element 0 to 0x104C QUANTA compensate for input noise and truncation LSB VMAX IMAX 7 4162 10 W The threshold for sag warnings The default value is equivalent to 80V 0x1050 443000 RMS if VMAX 600V The LSB value is 80V 443000 Revision 2 18 2005 2009 TERIDIAN Semiconductor Corporation Page 45 of 111 d J TERIDIAN 0x1054 DEGSCALE 0 This constant is used for the calculation of DELTA 0x1058 This parameter is added to compensate for input noise
139. with WRATE CT using the command 11 WRATE CT 4 Enter the command gt 7 2 Configure WISUM as external pulse source since the CT is connected to Channel 1 for VA IB 5 Test for accuracy at 15A 240V at phase angle 0 phase angle 60 and at phase angle 60 6 Apply these values to the calibration spread sheet revision 2 0 or later and derive the calibration factor PHADJ_B 7 Update only the CE address OxOF with the value for PHADJ B using the command PHADJ B 8 Adjust CAL for the total error found in the accuracy test using the formula CAL IB 16384 1 error 100 That is if the chip reports an error of 2 5 CAL should be adjusted to a value of 16384 1 2 5 100 9 Since CAL VA and CAL have already been adjusted for channel A these registers should not be updated 10 Retest for accuracy at several currents and phase angles After completing the calibration the energy values WOSUM based on VA IA and W1SUM based on VA IB are accessible to the MPU firmware The pulse rate is controlled by WISUM and determined by the parameters selected for the CT channel VA IB Differences between WOSUM and WISUM indicating tampering can be detected by the MPU for each accumulation interval The User has to customize the Demo Code to utilize the values obtained from the VA IA and IB channels for proper calculation of tariffs Table 2 1 summarizes the important parameters used in the calibrat

71M6521 Demo Board User's Manual

Contents

Download Pdf Manuals

Related Search

Related Contents