AT91EB55 Evaluation Board User Guide
Contents
1. m BIG 614 4 T h Ser d a Ta N N N n 1 5 3 Sen Sz i En M 619 023 N 318 5 S So te B 813 682 065 D H edt CB14 CB13 m mmm PS AT91M55800A 33 Al 012 E 05 s3 8189 689 LH 2 5 D 04 128K x8 TP1 N oO 5 x 962 xx um x 10 n 10 T o T D n Bn Ld Appendix Schematics Figure 6 1 PCB Layout AT91EB55 Evaluatuon Board User Guide AIMEL L ad 1709 07 02 6 2 20 L0 INHV 1V 8604Z1 uonjenj e 3 84841619 Buy 5 9 MEMORIES EBI 0 4 EBI_ 0 49 IOB_ 0 71 PLE memories connected on MOSI MICROCONTROLLEFR SDA SCL NPCS 0 3 NPCSI0 3 P 080 11 7 a EBl_ 0 49 micro Rs cop t TAG TT SUPPLY and RTC SAVE SHDN SHDN NPCS 0 3 IOB_ 0 72. Qty Reference Part Designation R22 R42 R43 R44 41 16 R45 R46 R48 R52 100K Resistor 5 R53 R54 SW1 SW2 SW3 Push button with black 42 5 SW4 124 43 1 SW5 TP 33 Push button with red cabochon 44 2 S1 S2 Push Button CMS Push button 45 4 TP1 2 TP4 Test Point Corner CMS Test point 46 1 U1 AT49BV1614 90TC Flash 2M bytes x 16 bits 479 1 04 05 IBrziVoASATSpH 791816 memory 128k X 8 19 double implantation 48 1 U6 74LVCO4AD Reverser LVC serial 49 1 U8 74LV244D Buffer 50 1 U9 74LV125D Tri state buffer 51 1 U10 MAX3223ECAP Driver RS232 ESD E 52 1 U12 AT91M55800A Microcontroller 53 1 013 LM61BIM3 Temperature sensor 54 2 014 015 REF192GS Reference of voltage 2V5 0 5 55 1 U16 74LVC74AD D flip flop LVC serial 56 1 U30 74LCX74 D Flip Flop LCX serial MAX6315US27D1 Circuit LVD reset Threshold xd 2 UIS 2 7 Timeout 1 ms 58 1 U19 LT 1507CS8 3 3 Voltage Regulator DC DC 59 1 U20 LTC 1503CS8 2 Voltage Regulator DC DC 4 U2t AT45DB321 TC Serial ash wired according to availability AT24C512W1 61 1 U23 10SC 2 7 EEPROM 64K bytes 62 2 U27 U29 74LV138D Decoder 3 to 8 63 1 U28 boy 080 32K bytes 64 1 Y2 Crystal 32768 kHz ee ee Oana ARMES 65 1 Y4 Crystal 16 MHz Crystal 16 MHz 30ppm at 25 c 66 4 PS1 PS2 PS3 PS4 Board Support Plastic bases H gt 10mm
3. EAEDOA Mw TWNDIS OND prr 9184 Mons Yw 1 Wad a H ww 9 1 t trad i EAIA 4 6 7144 7184 8 6 019 80 N Rt f wol 9 s 1 a H WW va A 2 1 Ms 06211101 H en e uo 88 9 0184 H PN n 484 3 dur RENE Ho zus 09 uo 94 Nw 10 a A 4 7 38d yoo Q 3001 E eu 2001 31 N3 id 48181 1 7 5 E 5707801 1 d is 1 eneodn eneodh 1709 07 02 6 6 Appendix Schematics Figure 6 6 AT91M55800A I A 99A D15 D D D D D DA 182701 801 Juadah gol 801 CCE DIPPPPP 22222 PS 22992 55 SSPS2S222222 25 35555 25 Sess 222228 qo 99 5 55
4. 5 5 2 8888585585558 5t 5t _ EE 5 lt 3 5 e 5 T ays 5 8 2 8 2 8 8 S 5 2 x SH 77 572 25 2 95 IIIS 11 2 En E18 m T 12 118 5 z F SP S E ere Z Ju 3 a 47 8 HH 4 S E 5 22 ae 5 1 5 8 EJ Bu 213 Dis 5 8 2 ar Sr To 8 I 2 28 84 3 5 Ba E 12 o gt gt 4 g j Le o er uo M 2 R2 AIMEL AT91EB55 Evaluatuon Board User Guide Appendix Schematics Figure 6 8 Power Supply JAVYS 219 van HO pue uo 6zH WIM AE NGPPA XO E 624 3029 0 PBAL NGPPA ipu 0 em ON edunt qp TEE 6dr n 180109 1 19000 1501
5. 4a 90 sa 2 1 00 and and YSIN SSON ISIN ISIN 6v 81 A699 81892 ui uv oiv and and IN 9v v ov 12 SIN OV 1581 ENEION ESIN 25200 ISON OSON MIN LIVMN GUN 8nN IHMN 3MN OUMN and and SON SON IV AXE W 017 9v 6 5 1709B ATARM 07 02 MEL AT91EB55 Evaluatuon Board User Guide Figure 6 5 Push Buttons LEDs and Serial Interface Appendix B Schematics AT91EB55 Evaluatuon Board User Guide AIMEL A Ww 46 a 418 3822 dzz 120 920 8 1 35 Hes dd on TRE L 3 ON 1edun TUXE td yu UUXH Sa T gt TUXI HTVA t T DOXI 1 1 aiz A Lawo n wl T 0 4 3 00 8 E 1913 8 T XE PU t 8 5 819 s 0 Hes uo z td b 2 BARON ET u so Lea p LS eneoon H Lo S
6. TRENTO 18 70114 lo cub d 5555 EE 61Vd 2408 0244 3 20 1 Nd ZOXY 12214 01001 pH oid 340900 A ptt In do Lado dn a ISON ISON G2Yd TQM SSN 0SOdN 92 4 5 x 34001 c olodN 1894 12 4 so 8 0 882 2SOdN 82Yd sa 0 0 62Yd i 2 88941 40 i ti 1 NI 0 5 2 n 8 5 110 201 3001 w er 00 st 04 100 3I8VN3 9N aqa 71400 A 4 01 889 NIX Em Inox vy 023V PC 479 201 34089 Teano 101 0114019 o AE mpm SIE P 9794 Tel 22 N 61 nano lt k zx aly PES LW 3 25 ZE LNOX 3001 lt 800A 91 2 989 26 10 108001 L ry 3 ak i een nelsun VOOSSSINL6LV ely naano q U a aw and 2 89 950 29 Di n ev Jo 065 8v VON9 lt p 4n80No mm ngano ano 39001 89281438 xoo 878 FL eh p 300 nl T 049 SONS 10 114100 43318 ov 9 fon 9 V eh iv i xL o VOA 289 10861 gy AS 338 8 iit oo 204 02 ory ja 089 sin 9 MSIDA edy rov u pe 90 vano Al SOY ezi aay iw 2 90 101 and 30 10 VONS Lay
7. tal tdl 3506086111 2190109 1581 1890109 0 T SSINOHS I 311 3 T9 z 890 290 199 9 A0 z 380200A L ENIDA peA 816001 9109ppA z 2 380001 A A N ON dun 29 94 3068 18213422 vada 090 us wur zeig per 1 wp 00100 sid 2 z Naus ald ori 5 as ON 19dun Av OIPPA sf 4 3986 omas wipe NOLHS ug MEN 0001 8 ae x N 30001 2 u A609h n O 685010801 4 210 6 9 1709 07 02 AIMEL AT91EB55 Evaluatuon Board User Guide Figure 6 9 SPI and Memories Appendix Schematics AT91EB55 Evaluatuon Board User Guide i 3900 069 0 Na 22 0501 14952521 uy eF x 14 30001 3048 p 2791591251 z 019 timo is LZ OSIN Von 54 LEE q Ta ISON 89S9IdSN LOO NIG BABOON 109 82 L san 820 esu 1 284 CONTI L 01 1 91 126805 Lv 4 Na 5 45014581 EAEOON 18601481 INE 4 Y
8. 1 Rev 1709 07 02 Appendix Configuration Straps 5 2 1709 07 02 4 Temperature Sensor Enabling Closed The temperature sensor device is connected to the ADC channel 1 AD1 input Open The temperature sensor device is not connected to the ADC channel 1 AD1 input This authorizes users to connect the corresponding ADC channel to their own resources via the I O expansion connector CB5 Analog Converter Peripherals Loopback Closed DAC Channel 0 is connected to ADC Channel 4 for test purposes Open DAC Channel 0 is not connected to ADC Channel 4 This authorizes users to connect the corresponding Analog Channels to their own resources via the I O expansion connector CB6 Analog Converters Peripherals Loopback Closed DAC Channel 1 is connected to ADC Channel 0 for test purposes Open DAC Channel 1 is not connected to ADC Channel 0 This authorizes users to connect the corresponding Analog Channels to their own resources via the expansion connector CB9 On board Boot Chip Select Closed NCSO select signal is connected to the Flash memory Open NCSO select signal is not connected to the Flash memory This authorizes users to connect the corresponding select signal to their own resources via the EBI expansion connector CB10 Flash Reset Closed The on board reset signal is connected to t
9. 9 114100 43318 NE 1 ox AT 2 12 aH SE pin Wd a ova OSON VONS va ae lt M m vand DE duo 82 3409004 22222 gt olaan BERSS 8 8 zzzz 33322 5 OE S uu d 85 889 22 5555 22006 22 9 99 2 Q 22 144 2 979 guiidv 184 55 soo BER oS 5 T 98 5 WoL 92721 oa 884 B 289 62211 0104 380000A 818 9 1SEN gt 15 9 1004 3A00MN lt 1359917 SUN ___ 4 45553 eneoont Inejeg P OXON E 3001 16907183 ru L OISIN 2 0112 xo 98 8184 518 IVNN 6110 7770184 6 7 1709 07 02 91 55 Evaluatuon Board User Guide Appendix B Schematics Figure 6 7 Reset and JTAG Interface VDDBU vocav3 6 8 1709 07 02 8 2 2 2 2 gl ENS 18 8 e C a 5 lt 8 q g 8 m 35 4 E In Ei a 5 14 18 8 082 gt 5 2 AA AS 2 T lt gt 8 o 5 u 8 7 Bd E b Bu Bu Bu m AE HE a N 858 5 5 5 gt 5 8 J 8 dw eo ETS 44 d ss E 207 4 2 22012052 121 M Rae
10. ENEOON 2 quo 244 73 O I 288 188 058 628 828 2274 188 928 Wd szg ved Vd ezg d 208 va 028 va 18 994 818 v 18 919 918 718 18 218 094 018 4 68 9284 88 5284 18 7084 98 8284 58 2284 78 1284 58 0284 28 6184 18 a 9SOIdSN SSOIdSN 7945 62 4 ISON 52 4 OSIN 2 4 11594 2895 0ZVd 10 8114 10X1 I DI9S I LLYd 00 91Vd 00 1 S1 Vd 0495 v1 Vd 58011 8Vd SVOIL Vd 8191 9 4 79011 S d OIL 79191 EVd 8801 VOIL 1 Vd 83121 04 28011 2288 24011 9284 23101 19899 18011 284 101 6884 2284 08011 1284 OVOIL 0284 03121 6184 824 684 884 284 184 10199 402 lt gt 10 q a SU 46994 33 01 m eneoon H H ne 1521468 N gS231dSN 4881 1 qu aise E 184 0184 eA 09A ZN 69 HV 99 IV SW Jiga _ 1 084 SLY sad W 908 HT you Y eneoon tH 03164 Hd ans ENEOON 2081 ano H 108 0144 618 EY rn Vid 101991105 193 109 183 u09 73 183 and and sia ra 81 01 64 80 A699A
11. Notes 1 If the AT49BV1614 is replaced with the AT49BV1604 the jumper must be connected AT91EB55 Evaluatuon Board User Guide 2 The EB55 is equipped with SRAM U2 U3 or U4 U5 the difference lies in case type only The choice is made according to availability AIMEL 7 3 1709 07 02 Appendix Bill of Material 7 4 Alm L AT91EB55 Evaluatuon Board User Guide ey _ 1709 07 02 AMEL Section 8 Appendix D Flash Memory The following figure shows the embedded software mapping after the remap It describes the location for the different programs in the AT49BV16X4 flash memory and the division into sectors Figure 8 1 EB55 Flash Memory Software Location 0x011FFFFF Not Used 16 Sectors 1MB 64K byte sector User Mode Led Swing Application example 0x01100000 7 Not Used 15 Sectors 64K Byte sector 1MB Standard Mode 0x01010000 6 Sectors Angel Software 8K Byte sector Functional Test Software SRAM Downloader Boot 0x01004000 2 Sectors 8K Byte sector 0 01000000 8 1 91 55 Evaluatuon Board User Guide Rev 1709 07 02 Appendix D Flash Memory 8 2 Alm L AT91EB55 Evaluatuon Board User Guide ey _ 1709 07 02 AMEL m Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose CA 95131 TEL 1 408 441 0311 FAX 1 408 487 2600 Europe Atmel S
12. Straps 15 als to the evaluation board These peripherals may require more lines than available JP1 9 while the board is in its default state Extra lines can be made available by disabling some of the on board peripherals or features This is done using the configuration straps detailed below Some of these straps present a default wire notified by the default men tion that must be cut before soldering the strap CB1 On board NCS4 Signal Closed NCS4 signal is connected to the expansion connector P1 B21 Open NCS4 signal is not connected to the EBI expansion connector P1 B21 This authorizes users to connect the EBI expansion connector of this board to the MPI expansion connector of an AT91EB63 evaluation board without conflict problems CB2 ADCO Trigger Input Command Closed ADCO trigger input ADOTRIG is controlled by the PA4 PIO line Open ADCO trigger input ADOTRIG is not connected to the PA4 PIO line This authorizes users to connect the corresponding lines to their own resources via the I O expansion connector CB3 ADC1 Trigger Input Command Closed ADC1 trigger input AD1TRIG is controlled by the PA7 PIO line Open ADC1 trigger input AD1TRIG is not connected to the PIO line This authorizes users to connect the corresponding lines to their own resources via the I O expansion connector AT91EB55 Evaluatuon Board User Guide 5
13. gt LH 3MN OHMN 3 00 4000 20001 4000 2 D ET vo 9 20 19 99 ddA ON 3001 oN i 8 EASIT EAGOSA on 6y wh 6 Eneo Suiv E BE ev LE o Y lav 2 ov FT z SV am SY s LWW ely yo SDNITEMN M 56 na 3 20 40 2 400A D encoan ane EM E Fano Eu a 99A no 62 2d 50 510 oe 30 80 9 30N QUN IE 8v ISIN 30N QUN Eli W pv 25 28 oly NY 3 giv ev SIN 91 16 oy 91 16 LW S IY S ety st 12 LN Wis zn WOOP 108 10 Figure 6 3 Memories 6 4 Appendix Schematics 1709 07 02 Appendix Schematics 0801 984 793 O I san OND i871 18d 06 629 30 sav sav 409 922 XO 200 22 Way 29 125 00 and 223 giy100Y 98d 619 and 819 lia IR 219 S 712 lezy 12 4319 430 Ney TT Y m cu 237 77139 9184 7774 16771174 Figure 6 4 Expansion Connectors 1184 9184 7184 8184 LACIJA LACIJA 112 and 82 89 1 84 20 1 4 39 52 Wigd 75 Jerga 2
14. 1 10 _ 0 53 10B_ 0 71 EBI_ 0 49 EBI_41 SERIAL MEMORIES 108 68 71 NPCSIO 3 SERIAL MEMORIES INPUT OUTPUT ON BOARD 108 0 52 ertat Connectors t P B 1 LED Extension Connectors 108 0 71 0 49 sisdou S 59019 ssgalelv 2 9 941614 x puaddy ero 183 30N QUN 8nN IHMN 3MN OUMN AT91EB55 Evaluatuon Board User Guide xf o Fa x o LX Lt 0 el Xu HN Paz QVPODATHL a EY oy Y ly 8 Li ov 8L Ly iv L Y s B T CE M P i 1004 4351 SDNTEMN m 4 1 180 za LE 4 ijo EASHOA 09 ano pet 0 D 50 994 02 and 99 L and de 1edunf i IF vid 60 90 1d 0 4 510 80 44 96 6 30N QUN ISIN LE s 8 ISIN 1004 01 5 80l Ln C8 jay 023V 79801 wl zy 82 a o W LW EM 4 17 81 ev N 0 x 81 x oon NE 3219 WOOP 40881 10 1no e m enegan lu 3001 9106 7091 9691 E xt 18988 ISUN 0180 10001 30 82 30N QUN
15. 1 2 1709 07 02 m Eight LEDs 256 byte of 16 bit SRAM upgradable to 1 MB 2M bytes of 16 bit Flash of which 1 MB is available for user software 4M bytes of Serial Data Flash upgradeable to 16 MB m 64K bytes of with 12 access m 32K bytes of SPI E 2 x 32 pin EBI expansion connector E 3 x 32 pin I O expansion connector 20 JTAG interface connector If required user defined peripherals can also be added to the board See Appendix for details AIMEL A AT91EB55 Evaluatuon Board User Guide Figure 1 1 AT91EB55 Block Diagram AT91M55800 Reset Controller ARM7TDMI Processor JTAG ICE Connector 16 MHz XTAL Push Buttons Clock Generator Interrupt Controller Watchdog Timer ce RTC Reset Controller Wake Up Push Button Vppio and VppcoRE Power Supply 32 768 kHz XTAL Battery Power Supply AIMEL AT91EB55 Evaluatuon Board User Guide Counters D Overview EBI Expansion Connector 1 0 Expansion Connector Temperature Sensor VppconE 2 AC Ports DB9 Serial Connectors RS232 Transceivers 1 3 1709B ATARM 07 02 Overview 1 4 Alm L AT91EB55 Evaluatuon Board User Guide LA 1709 07 02 AMEL 2 1 Electrostatic Warning 2 2 Requirements 2 3 Layout AT91EB55 Evaluatuon Board User Guide Sectio
16. 4 1 4 2 2 Expansion Connector 4 1 4 2 3 unse este anhand 4 2 4 37 L Sau ressens tend none rade die 4 2 4 4 ADC and DAC Peripheral Connections 4 2 45 Power and Crystal Quartz 4 2 46 Push Buttons LEDs Reset and Serial Interface 4 3 4 7 bayout Drawing oie rre n cashes 4 4 AT91EB55 Evaluatuon Board User Guide i 1709B ATARM 07 02 Table of Contents 1709 07 02 Section 5 Appendix A Configuration 4 44 4 122 1 5 1 5 1 Configuration Straps CB1 15 JP1 9 5 1 5 2 Power Consumption Measurement Straps JP5 JP9 5 4 5 3 Ground Links JP idle trece pet 5 4 5 4 Increasing Memory Size 5 5 Section 6 Appendix 6 1 6 1 uno e toit itte ted tete tee ten 6 1 Section 7 Appendix C Bill 2220 7 1 Section 8 Appendix D Flash Memory ehe oet lade see inae 8 1 AIMEL A AT91EB55 Evaluatuon Board User Guide AMEL 1 1 Scope 1 2 Deliverables 1 3 The AT91EB55 Evaluation Board Section 1 Overview The AT91EB55 Evaluation Board enables real time code development and evaluation It sup
17. AT91EB55 Evaluatuon Board User Guide AMEL m Table of Contents AMEL Section 1 6 2 2 558 55552522222225252423 422564252421555225 1 1 1 1 SCOPE E 1 1 1 2 1 1 1 3 AT91EB55 Evaluation Board 1 1 Section 2 Setting Up the AT91EB55 Evallalon BOSS oo AN 2 1 2 1 Electrostatic Warning 2 1 2 2 Requirements anne 2 1 2 3 PETER DM M ESSE 2 1 2 4 Jumper Settings nn a 2 2 25 Powering Up Board 2 2 2 6 Measuring Current Consumption on the 1 55800 2 2 2 7 Testing the AT91EB55 Evaluation 2 2 Section 3 On board nee een 3 1 3 1 91 55 Evaluation Board 3 1 3 2 Boot Software Program 3 1 3 3 Programmed Default Memory 3 2 3 4 SRAM Downloader 3 2 3 5 Angel Debug Monitor 3 2 Section 4 Girc it Descriptio MP 4 1 41 91 55800 Processor 4 1 4 2 Expansion Connectors and JTAG 4 1 4 2 1 IO Expansion Connector
18. ON ON ES ON ON ON ON ON 8 ON ON 190195 6x ON 6 IN 0521458 SIN 190 NI8 ON ON ON ON He ON ON un ON ON 24 ON ON so t amp d oN 8 4 mI 30 sl 5821458 30 sl 289188 699 yos 999 yos ENEOON L n 3048 L Im 3048 ON 08 ON 08 Selon 8 on ig IN 6 ISON Er ISON 9 0 D IE TON ON P RP yoo 868 c aM 13838 a od 08 148 ISUN Xi Len ISUN Xs A 09 BAEOON gen sen LASITA ENEOON OL IZEBOSFLY 01 12880881 122 0801 1121 809211 A RIIN 2 ror 09 Vos LES Ta 199 8 8 1005 ON ae ON ON S ON ON 1 0N ON ON s N ON a ON eK ON ON eK ON ON 3900 ON ON vos HEN 199 oon aN 189 30001 Bahn 9 fer 159195 20001 029 80 0501951 of ON N 89 so 924 N ON xas a n ON aas ON ON L y 045 L y 3948 o oS for OSIN CAES oS OSIN a ON 8 Fop ISON FRE S ISON INE 80 ON 50 mx 9 ON 7 ON es 0 ov EX 298 3001 26 ON 3001 ieu us ISEN Hr 183 2 LSEN ra rn H ws LASITA ENEOON vn A 09A A 00 EASON ENEOOA ENEOON 6 10 1709 07 02 AMEL Section 7 Append
19. V ESR lt 0 5Q 17 1 C60 3 3 nF 10 Ceramic X7R 25V 10 18 3 C61 C62 C64 1 uF 10 Ceramic X7R 10V 10 78 79 80 81 19 6 84 85 10 pF Ceramic X7R 16V D1 02 D3 04 05 20 10 D6 07 08 010 Red LED Red LED H R 3mm T1 7mcd 60 011 21 1 09 BAS32L Diode signal 22 1 012 13914 Diode signal Transil 12 8V 600W 23 1 D14 SMT6T15CA VBRmini 14 3V 24 1 D15 1N5817 Schottky diode 1A 0 45V 25 4 D16 D17 D18 D19 10 0060 Diode rectifying 0 62V 0 77A 26 1 F1 1000 mA Fuse rarm 1000 mA 30V 27 3 JP1 JP8 jumper_3P 3 point jumper 28 6 JP5 JP7 JP9 jumper_NO 2 point jumper 29 1 J1 Diameter Jack socket 2 1mm 2 1mm 30 1 L1 10 uH Self 10 uH at 1A and 500 kHz Sub D 9b Female socket right 31 1 P3 Sub D 9b F angle mechanical strength locking Sub D 9b Male socket right 32 1 P4 Sub D 9b M angle mechanical strength locking 33 1 P5 HE10 2x10 HE10 2x10 socket low profile right angle R3 R4 R5 R14 R15 R16 R17 R25 R26 R27 R31 R32 i 34 27 R33 R34 R35 R36 100K Resistor 5 R37 R38 R39 R40 R41 R51 R55 35 2 R56 R57 10K Resistor 5 R6 R7 R8 R9 36 10 R10 R11 R12 R13 100R Resistor 5 R23 R24 37 1 18 270K Resistor 5 38 1 R20 287R 1 E48 Resistor 1 RR2 RRS Resistance network 4 99 3 RR4 1995 resistors with 1 common point 40 1 R29 OR Shunt OR AIMEL IMEL AT91EB55 Evaluatuon Board User Guide Table 7 1 Bill of Material Continued Appendix Bill of Material
20. ard 2 6 Measuring Current Consumption on the AT91M55800A 2 7 Testing the AT91EB55 Evaluation Board 2 2 1709 07 02 JP1 is used to boot on standard or user programs For standard operations set it in the STD position JP8 is used to select the core power supply of the AT91M55800A Operations at 2V not supported on the current silicon For more information about jumpers and other straps see Appendix A DC power is supplied to the board via the 2 1 mm socket J1 shown below in Figure 2 2 The polarity of the power supply is not critical The minimum voltage required is 7V Figure 2 2 2 1 mm Socket positive or negative 2 1 connector The board has a voltage regulator providing 3 3V The regulator allows the input volt age to be from 7V to 12V When you switch the power on the red LED marked POWER will light up If it does not switch off and check the power supply connections The battery BT1 provides a 3V power supply to the Advanced Power Management Con troller and the Real Time Clock In order to power up this module the user must first close the JP9 jumper The board is designed to generate the power for the AT91 product only through the jumpers 5 and JPY This feature enables measure ments to be made on the current consumption of the AT91 product See Appendix A for further details In order to te
21. arl Route des Arsenaux 41 Case Postale 80 CH 1705 Fribourg Switzerland TEL 41 26 426 5555 FAX 41 26 426 5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721 9778 FAX 852 2722 1369 Japan 9F Tonetsu Shinkawa Bldg 1 24 8 Shinkawa Chuo ku Tokyo 104 0033 Japan TEL 81 3 3523 3551 FAX 81 3 3523 7581 POWERED Atmel Corporation 2002 Atmel Operations Memory 2325 Orchard Parkway San Jose CA 95131 TEL 1 408 441 0311 FAX 1 408 436 4314 Microcontrollers 2325 Orchard Parkway San Jose CA 95131 TEL 1 408 441 0311 FAX 1 408 436 4314 La Chantrerie BP 70602 44306 Nantes Cedex 3 France TEL 33 2 40 18 18 18 FAX 33 2 40 18 19 60 ASIC ASSP Smart Cards Zone Industrielle 13106 Rousset Cedex France TEL 33 4 42 53 60 00 FAX 33 4 42 53 60 01 1150 East Cheyenne Min Blvd Colorado Springs CO 80906 TEL 1 719 576 3300 FAX 1 719 540 1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 Scotland TEL 44 1355 803 000 44 1355 242 743 RF Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn Germany TEL 49 71 31 67 0 FAX 49 71 31 67 2340 1150 East Cheyenne Mtn Blvd Colorado Springs CO 80906 TEL 1 719 576 3300 FAX 1 719 540 1759 Biometrics Imaging Hi Rel MPU High Speed Converters RF Datacom Avenue de Rochepleine BP 123 38521 Saint Egr
22. chematics also shows eight general purpose LEDs connected to Port B PIO pins PB8 to PB15 Two 9 way D type connectors P3 4 are provided for serial port connection Serial Port A P3 is used primarily for host PC communication and is a DB9 female con nector TXD and RXD are swapped so that a straight through cable can be used CTS and RTS are connected together as are DCD DSR and DTR Serial Port B P4 is a DB9 male connector with TXD and RXD obeying the standard RS 232 pin out Apart from TXD RXD and Ground the other pins are not connected A MAX3223 device U10 and associated bulk storage capacitors provide RS 232 level conversion AIMEL AT91EB55 Evaluatuon Board User Guide 4 3 1709 07 02 Circuit Description 4 7 Layout Drawing 4 4 1709 07 02 The layout diagram schematic shows approximate floorplan for the board This has been designed to give the lowest board area while still providing access to all test points jumpers and switches on the board See Figure 1 in Appendix Schematics The board is provided with four mounting holes one at each corner into which feet are attached The board has two signal layers and two power planes A MEL AT91EB55 Evaluatuon Board User Guide LA AMEL Section 5 Appendix A Configuration Straps 5 1 Configuration By adding the I O and EBI expansion connectors users can connect their own
23. ctor 18 Flash Configuration Open Should be open when an 49 1614 is fitted on the board Closed Should be closed when 49 1604 is fitted on the board JP1 User or Standard Boot Selection 2 3 The first half of the Flash memory is accessible at its base address 1 2 The second half of the Flash memory is accessible at its base address This authorizes users to download their own application software in this part and to boot on it AT91EB55 Evaluatuon Board User Guide AIMEL IMEL 5 3 1709 07 02 Appendix Configuration Straps 5 2 Power Consumption Measurement Straps JP5 JP9 5 3 Ground Links JP6 5 4 1709 07 02 JP2 Push Button Enabling Open SW1 4 inputs to the AT91 are valid Closed SW1 4 inputs to the AT91 are not valid This authorizes users to connect the corresponding PIO to their own resources via the I O expansion connector JP3 RS 232 Driver Enabled Open The RS 232 transceivers are enabled Closed The RS 232 transceivers are disabled This authorizes users to connect the corresponding PIO to their own resources via the I O expansion connector JP7 Power Shut down Feature Open The power supply shut down feature is disabled Closed The power supply shut down feature is enabled The user may shut down the board main power supply by using the APMC shut down feature The system may be a
24. ding on where the serial cable is connected to the host PC and the baud rate for communications 115200 baud 1 stop bit no parity then open the file to be downloaded and send it Wait for the transfer to end 4 Press any button to end the download The control is switched to the address 0x02000000 The Angel Debug Monitor is located in the flash from 0x01004000 up to 0x0100FFFF The boot program starts it if no button is pressed When Angel starts it recopies itself in SRAM in order to run faster The SRAM used by Angel is from 0x02020000 to 0x0203FFFF i e the highest half part of the SRAM AIMEL AT91EB55 Evaluatuon Board User Guide The On board Software The Angel on the AT91EB55 can be upgraded regardless of the version programmed on it Note f the debugger is started through ICE while the Angel monitor is on the Advanced Interrupt Controller AIC and the USART channel are enabled AT91EB55 Evaluatuon Board User Guide AIMEL 3 3 1709B ATARM 07 02 The On board Software 3 4 Alm L AT91EB55 Evaluatuon Board User Guide ey _ 1709 07 02 AMEL 4 1 AT91M55800A Processor 4 2 Expansion Connectors and JTAG Interface 4 2 1 Expansion Connector 4 2 2 EBI Expansion Connector Section 4 Circuit Description Figure 1 in Appendix Schematics shows the AT91M55800A The footprint is for a 176 pin TQFP package Strap CB15 enables the user to choose between the standard ICE debug m
25. eve Cedex France TEL 33 4 76 58 30 00 FAX 33 4 76 58 34 80 e mail literature atmel com Web Site http www atmel com Atmel Corporation makes no warranty for the use of its products other than those expressly contained in the Company s standard warranty which is detailed Atmel s Terms and Conditions located on the Company s web site The Company assumes no responsibility for any errors which may appear in this document reserves the right to change devices or specifications detailed herein at any time without notice and does not make any commitment to update the information contained herein No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products expressly or by implication Atmel s products are not authorized for use as critical components in life support devices or systems ATMEL and DataFlash are the registered trademarks of Atmel ARM Powered ARM7tDMI AMBA and Angel are the registered trademarks of ARM Limited Other terms and product names may be the trademarks of others Printed recycled paper 1709 07 02
26. he Flash RESET input Open The on board reset signal is not connected to the Flash RESET input CB11 Boot Mode Strap Configuration Open The BMS MCU input pin is set for the microcontroller to boot on an external 16 bit memory at reset Closed The BMS MCU input pin is set for the microcontroller to boot on an external 8 bit memory at reset AIMEL 444444 4 2 AT91EB55 Evaluatuon Board User Guide Appendix Configuration Straps CB13 CB14 EEPROM Enabling Closed E PROM communication is enabled Open E PROM communication is disabled This authorizes users to connect the corresponding PIO to their own resources via the I O expansion connector CB15 JTAGSEL 1 20 The MCU standard ICE debug feature is enabled 2 3 IEEE 1149 1 JTAG boundary scan feature is enabled CB16 R eturn TCK ICE Signal Synchronization 1 2 The TCK signal from the JTAG interface can be synchronized with MCKO signal and returns to the JTAG interface RTCK 2 30 The TCK and RTCK ICE signals are not synchronized with MCKO CB17 Voltage Measurement Closed The Power supply is connected to the ADC Channel 2 AD2 input through a resistor bridge divisor ratio 1 2 Open The Vopcore power supply is not connected to the ADC Channel 2 input This authorizes users to connect the corresponding ADC Channel to their own resources via the I O expansion conne
27. ix Bill of Material Table 7 1 Bill of Material Item Qty Reference Part Designation Li MnO2 180 mAH pile UL 1 1 BT1 3V Button Pile MH13654 N 3 position jumper jumper 2 2 CBIG between 2 3 3 1 3 18 CB NO If AT49BV1614 90TC is used do not connect the jumper C1 C2 C3 C4 C5 C12 C13 C16 C17 C18 C19 C22 C28 C29 C30 C31 C32 C36 C38 C39 C42 4 41 C49 C50 C51 C52 100 nF Ceramic X7R 10V C53 C54 C65 C66 C67 C68 C69 C70 C89 C90 C91 C94 C95 C96 5 4 C10 C11 C14 15 47 nF Ceramic X7R 10V C20 C21 C23 C24 6 6 C26 C27 22 pF Ceramic NPO 10V C25 C71 C72 C73 7 11 C74 C75 C76 C77 10 nF Ceramic X7R 16V C82 C83 C86 8 3 C33 C37 C40 1 uF 16V Tantalum 16V 10 TAJ 9 2 C41 C63 10 UF 16V Tantalum 16V 10 TAJ 10 3 C43 C47 C48 10 pF Ceramic NPO 10V 5 2 Adjustable Capacitor serial 11 1 C44 4 25pF TZBX4 12 1 C45 68 pF 10 Ceramic X7R 10V 10 13 1 C46 680 pF 10 Ceramic X7R 10V 10 14 2 C55 C59 22 pF 25V Ceramic X7R 25V 15 1 C57 10 uF 25V 25V ESR lt 0 50 0 5Arms AT91EB55 Evaluatuon Board User Guide 7 1 Rev 1709 07 02 Appendix Bill of Material 7 2 1709 07 02 Table 7 1 Bill of Material Continued Item Qty Reference Part Designation 16 1 C58 100 uF 10V Tantalum 10
28. lash device contains m The Boot Software Program m The Functional Test Software m The SRAM Downloader m The Angel Debug Monitor m A Default User Boot with a Default Application The boot FTS and SRAM downloader are in sectors 0 and 1 of the Flash These sec tors are not locked for an easy on board upgrade The user must avoid overwriting this sector The Boot Software Program configures the AT91M55800A and thus controls the mem ory and other board devices The Boot Software Program is started at reset if JP1 is in the STD position If JP1 is in the USER position the AT91M55800A boots from address 0x01010000 in the Flash which must have a user defined boot The Boot Software Program first initializes the master clock frequency at 32 MHz the EBI then executes the REMAP and checks the state of the buttons as described below As long as the SW1 button is pressed m All the LEDs light together m The D1 LED remains lit until SW1 is released m The Functional Test Software FTS is started As long as the SW2 button is pressed m All the LEDs light together m The D2 LED remains lit until SW2 is released AT91EB55 Evaluatuon Board User Guide 3 1 Rev 1709 07 02 The On board Software 3 3 Programmed Default Memory Mapping 3 4 The SRAM Downloader 3 5 The Angel Debug Monitor 3 2 1709 07 02 m The SRAM downloader is activated When the SW4 button is pressed The shutdown functio
29. n 2 Setting Up the AT91EB55 Evaluation Board The AT91EB55 Evaluation Board is shipped in protective anti static packaging The board must not be subjected to high electrostatic potentials A grounding strap or similar protective device should be worn when handling the board Avoid touching the compo nent pins or any other metallic element Requirements in order to set up the AT91EB55 Evaluation Board are m The AT91EB55 Evaluation Board itself B DC power supply capable of supplying 7V to 12V not supplied Figure 2 1 shows the layout of the AT91EB55 Evaluation Board Figure 2 1 Layout of the AT91EB55 Evaluation Board O D el x in 95 2 115 mE Dass o 128K x8 QU 20 z 127 U26 512Kx8 178 Fs Cats 8 Somom Eu domom E 8 508 g 428 uate 1 55800 9 LC 8 af Jok ose 128K x 8 33A E 8 ob EUN E 15 Y4 1 512 8 lt gt EJ m 05 cars cara Fes ms oo elle 2 pus u 5 t 2 Bl u30 5 0 0 ofa 1 805 80 51 2 HE u23 Drum 80 go un 09 Fina RR4 ARI 2 1 Rev 1709 07 02 Setting Up the AT91EB55 Evaluation Board 2 4 Jumper Settings 2 5 Powering Up the Bo
30. n from AT91M55800A is activated The power up can be achieved by pressing the S1 push button only Wake up function When no buttons pressed B Branch at address 0 01004000 B The Angel Debug Monitor starts from this address by recopying itself in external SRAM The following table defines the mapping defined by the boot program Table 3 1 Memory Map Part Name Start Address End Address Size Device U1 0 01000000 0x011FFFFF 2 Mbyte Flash 49 16 4 02 03 0x02000000 Ox0203FFFF 256 Kbyte SRAM The Boot Software Program FTS and SRAM downloader are in sectors 0 and 1 of the Flash device Sectors 2 to 7 support the Angel Debug Monitor Sector 24 at address 0x01100000 must be programmed with a boot sequence to be debugged This sector can be mapped at address 0 01000000 0 0 after a reset when the jumper JP1 is in the USER position The SRAM downloader allows an application to be loaded in the SRAM at the address 0x02000000 and then activates it The boot starts it if the SW2 button is pressed at reset The procedure is as follows 1 Connect the AT91EB55 Evaluation Board to the host PC serial connection using the straight serial cable provided 2 Power on or press RESET simultaneously holding down the SW2 button Wait for D2 to light up and then release SW2 3 Start the BINCOM utility available in the AT91 Library on the host computer Select the communication port COM1 or COM2 depen
31. o power the RTC and APMC It has been provided to ensure the power supply for approxi mately 1 year The IRQO TIOAO PB17 and PB19 switches are debounced and buffered A supervisory circuit has been included in the design to detect and consequently reset the board when the 3 3V supply voltage drops below a typical 3 0V threshold Note that the threshold can change depending on the board production series The supervisory circuit also provides a debounced reset signal This device can also generate the reset signal in case of watchdog timeout as the pin NWDOVF of the AT91M55800A is con nected on its input MR The assertion of this reset signal will light the red RESET LED D10 and if the CLEAR RESET push button is pressed the LED D10 will unlight Another supervisory circuit separately initializes the microcontroller embedded JTAG ICE interface when the 3 3V supply voltage drops below a typical 3 0V threshold Note that this voltage can change depending on the board production series The sepa rated reset lines allow the user to reset the board without resetting the JTAG ICE interface while debugging bill An RC device has been fitted on board to ensure a correct power on reset for the bat tery power supply modules first power or when has been disconnected This RC network has been calculated to generate a valid 300 ms mini mum pulse width NRSTBU signal The schematic Figure 5 in Appendix B S
32. ode and the JTAG boundary scan mode of operation The operating mode is defined by the state of the JTAGSEL input detected at reset Jumper JP5 can be removed by the user to allow measurement of the current demand the whole microcontroller and Jumper JP8 can be removed to mea sure the core microcontroller consumption See Figure 8 in Appendix B Schematics Jumper JP9 can be removed by the user to allow measurement of the current demand by the APMC and RTC microcontroller modules Vppgu See Figure 8 in Appendix B Schematics The two expansion connectors I O expansion connector and expansion connector and the JTAG Interface are described below The I O and EBI expansion connectors pin outs and positions are compatible with the other evaluation boards except for the I O expansion connector pin out and position of the EB40 so that users can connect their prototype daughter boards to any of these evaluation boards For the I O expansion connector rows A and B are position and pinout compatible The I O expansion connector makes the general purpose I O GPIO lines VCC3V3 and Ground available to the user Configuration straps CB2 CB3 CB4 CB5 CB6 CB13 CB14 and CB17 are used to select between the lines being used by the evaluation board or by the user via the I O expansion connector The connector is not fitted at the factory however the user can fit any 32
33. ports the AT91M55800A This user guide focuses on the AT91 Evaluation Board as an evaluation and demonstra tion platform B Section 1 provides an overview E Section 2 describes how to setup the evaluation board E Section describes the on board software E Section 4 contains a description of the circuit board Appendixes A and B cover configuration straps and schematics including pin connectors The evaluation board is supplied with a DB9 plug to DB9 socket straight through serial cable to connect the target evaluation board to a PC There is also a bare power lead with a 2 1 mm jack on one end for connection to a bench power supply The evaluation board is also delivered with a CD ROM that contains an evaluation ver sion of Software Development Toolkit and the documentation that outlines the AT91 microcontroller family The evaluation board is capable of supporting different kinds of debugging systems using an ICE interface or the on board Angel Debug Monitor Refer to the EB55 Get ting Started tutorial documents for recommendations on using the evaluation board in a full debugging environment The board consists of an AT91M55800A together with several peripherals Two serial ports Reset push button m An indicator which memorizes a reset appearance Memory clear for the reset indicator Four user defined push buttons AT91EB55 Evaluatuon Board User Guide 1 1 Rev 1709 07 02 Overview
34. r of the AT91M55800A and a 16 MHz one connected to the main oscillator The AT91M55800A Master Clock can be derived from the 32 768 kHz crystal quartz or the 16 MHz crystal quartz depending on the programming of the APMC registers The on chip oscillators together with one PLL based frequency multiplier and the prescaler results in a programmable Master Clock between 500 Hz and 33 MHz AIMEL 44 4444 4 2 AT91EB55 Evaluatuon Board User Guide 4 6 Push Buttons LEDs Reset Serial Interface Circuit Description Components for the PLL filter are fitted by default on the board Figure 6 in Appendix Schematics They are calculated to provide a 32 MHz multiplier factor of 2 and set tling time of 160 us Master Clock frequency The Voltage Regulator provides 3 3V to the board and will light the red POWER LED D11 when operating This Voltage Regulator can be turned off by using the APMC shutdown feature when the JP7 jumper is closed See Figure 8 in Appendix B Schematics A wake up push but ton S1 is provided to exit this mode Alternatively the user can program a RTC alarm to awake the voltage regulator Power can be applied via the 2 1 mm connector to the regulator in either polarity because of the diode rectifying circuit Another regulator allows the user to power the AT91M55800A core with 3 3V or 2V by the mean of the JP8 jumper A battery is provided on board Figure 8 in Appendix B Schematics t
35. rints are provided to fit AT45DB321 devices giving a total of 16M bytes AT91EB55 Evaluatuon Board User Guide AIMEL 5 5 1709B ATARM 07 02 Appendix Configuration Straps 5 6 Alm L AT91EB55 Evaluatuon Board User Guide ey _ 1709 07 02 AMEL 6 1 Schematics Section 6 Appendix Schematics The following schematics are appended E Figure 6 1 PCB Layout E Figure 6 2 AT91EB55 Blocks Synopsis E Figure 6 3 EBI Memories E Figure 6 4 I O and EBI Expansion Connectors E Figure 6 5 Push Buttons LEDs and Serial Interface Figure 6 6 AT91M55800A E Figure 6 7 Reset and JTAG Interface B Figure 6 8 Power Supply Figure 6 9 SPI and IC Memories The pin connectors are indicated on the schematics P1 Expansion External Bus Interface Figure 6 4 B 2 Expansion Connector Figure 6 4 B P3 Serial A Serial Interface Figure 6 5 P4 Serial Serial Interface Figure 6 5 B P5 Interface Figure 6 7 AT91EB55 Evaluatuon Board User Guide 6 1 Rev 1709 07 02 Sia 2 m QU 659 OSH N C5BB c58 3 022
36. st the AT91EB55 Evaluation board the following procedure should be performed 1 Hold down the SW1 button and power up the board or generate a reset and wait for the light sequence on each LED to complete All the LEDs light once and the D1 LED remains lit 2 Release the SW1 button The LEDs D1 to D7 light up in sequential order If an error is detected all the LEDs will light up twice The LEDs represent the following devices m D1 for the internal SRAM B D2 for the external SRAM Setting Up the AT91EB55 Evaluation Board E D3 for the external Flash D4 for the with access B D5 for the SPI data flash m D6 for the SPI E7PROM B D7 for the USART B D8 for the ADC and DAC If a test is not carried out the corresponding LED remains unlit and the test sequence restarts AT91EB55 Evaluatuon Board User Guide AIMEL 2 3 1709B ATARM 07 02 Setting Up the AT91EB55 Evaluation Board 2 4 Alm L AT91EB55 Evaluatuon Board User Guide ey _ 1709 07 02 AMEL 3 1 3 2 AT91EB55 Evaluation Board The Boot Software Program Section 3 The On board Software The AT91EB55 Evaluation Board contains an AT49BV16X4 Flash device programmed with default software Only the lowest eight 8 Kbyte sectors are used The remaining sectors are user definable and can be programmed using one of the Flash downloader solutions offered in the AT91 library When delivered the F
37. the AT91 SPI peripheral PCSDEC bit of the SPI Mode Register Note AT91EB55 is fitted with two 128K x 8 SRAM devices and one AT45DB321 serial DataFlash device U21 The AT91EB55 may be fitted with a Flash using either an AT49BV1604 CB18 should be closed or an AT49BV1614 CB18 should be open Strap JP1 shown on the schematic is used to select which part of 1 Mbyte of the flash is to be accessed This is to enable users to flash download their application in the second part of the flash and to boot on it Two of the ADC and DAC channels are loop backed together DAO on AD4 and DA1 on ADO Two 2 5V voltage reference devices are fitted on the board and connected to the DAVREF and ADVREF inputs See Figures 6 in Appendix B Schematics The user can fit other voltage reference value devices from this family REF19x from Analog Devices as the footprints are compatible A temperature sensor LM61 figure 6 in Appendix B Schematics is connected to the AD1 input and is placed near the 32 768 kHz crystal quartz It enables the user to take into account the frequency drift due to temperature evolutions using a software program The With a resistor bridge 10 provides the following value VDDCORE ge This voltage can be measured by AD2 input and allows the user to select the running clock accordingly The board features two quartz crystals a 32 768 kHz one connected to the RTC low power oscillato
38. wakened by pushing the S1 Wake Up push button or by programming an alarm in the RTC module JP8 Core Power Supply Selection 2 3 The MCU core is powered by a 3 3V power supply 1 2 Not supported on the current microcontroller revision Notes 1 Hardwired default position To cancel this default configuration cut or place the wire a jumper on the board The JP5 strap enables the user to connect an ammeter to measure the AT91M55800A global consumption and Vppio When power supply is derived from Vppio 3V3 position The user can measure the core consumption by connecting another ammeter between JP8 1 2 or 2 3 depending on the power supply used to power the core The JP9 strap enables the user to connect an ammeter to measure the AT91M55800A APMC and RTC modules battery backup consumption The JP6 strap allows the user to connect the electrical and mechanical ground Alm L AT91EB55 Evaluatuon Board User Guide Appendix Configuration Straps 5 4 Increasing The AT91EB55 evaluation board is supplied with two 128K bytes x 8 SRAM memories Memory Size If however the user needs more than 256K bytes of memory the devices can be replaced with two 512K x 8 3 3V 10 15 ns SRAMs giving in total 1024K bytes The AT91EB55 evaluation board is supplied with one 4 MB Serial Data Flash If the user needs more storage memory 3 additional footp
39. x 3 connector on a 0 1 2 54 mm pitch The schematic illustrated in Figure 4 in Appendix B Schematics also shows the Bus expansion connector which like the I O expansion connector is not fitted at the factory The user can fit any 32 x 2 connector on a 0 1 2 54 mm pitch to gain access to the data address chip select read write oscillator output and wait request pins VCC3V3 and Ground are also available on this connector Configuration strap CB1 when open allows the user to connect the EBI expansion connector to the MPI expansion connector of an AT91EB63 evaluation board without fearing any conflict problem AT91EB55 Evaluatuon Board User Guide 4 1 Rev 1709 07 02 Circuit Description 4 2 3 JTAG Interface 4 3 Memories 4 4 ADC and DAC Peripheral Connections 4 5 Power and Crystal Quartz 4 2 1709 07 02 ARM standard 20 pin box header P5 is provided to enable connection of an ICE to the JTAG inputs on the AT91 This allows code to be developed on the board without using system resources such as memory and serial ports The schematics in Figures 3 and 9 in Appendix B Schematics show one 49 16 4 2 Mbyte 16 bit Flash one AT24C512 64 Kbyte EEPROM one AT25256 32 Kbyte EEPROM two 128K 512K x 8 SRAM devices and four AT45DB321 4 Mbyte serial data Flash devices The SPI devices are accessible through a 4 to 16 line decoder and by using the Chip Select Decode feature of
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