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University of Alberta Project Board (UA7K) User's Manual
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2. 3 pin header Altera s Max7000 devices are capable of multi voltage operation allowing one device to be compatible with both 3 3V and 5V logic at the same time This is accomplished by the Altera device having 2 sets of power pins The first set of power pins are for an internal power supply The second set of power supply pins are for the I O power supply The internal power supply must be run at 5V The I O power supply can be ran at either 5V or 3 3V When the I O uses 3 3V as its power supply it supplies a logic low of OV and a logic high of 3 3V Inputs can accept a 3 3V or a 5V input because the internal circuitry is running at 5V The three pins on the power supply header are labeled Va GND and 5V By default the board is set up for single voltage operation at 5V so normally pins GND and 5V will be connected to the power supply The Va input is used for 3 3V operation For more infor mation on this see 3 3V 5V Operation on page 9 2 2 2 Input Protection The board has a 500mA fuse for short circuit protection A diode also protects the board from being powered with reverse polarity If this is attempted the diode conducts and short circuits the power supply for a short period of time until the fuse blows Also if a short is ever encountered on the board then the fuse will blow if more than 500mA of cur rent is being drawn A 10uF electrolytic capacitor provides voltage regulation If the board is used for 3 3V operation the
3. an XOR of two clocks If there 1s no change the RC oscillator is not working Verify that LEDs 3 to 5 are flashing as described above If they are flashing improperly there is probably a solder bridge between pins or an I O pin is stuck at a 0 or 1 Toggle all DIP switches and pushbuttons LED 1 or LED2 should change depending on what you have pressed That s it for the test go on to the next board University of Alberta Project Board July 22 1998 11 6 0 MAX7032S 44 pin Device The footprint for the 44 pin device is inside the footprint for the 84 pin device The table below gives the connections between the 84 pin footprint and the 44 pin footprint The connections are also shown on the schematic diagram TABLE 9 44Pin Device Pin Connections 84 Pin FP 44 Pin FP 84 Pin FP 44 Pin FP 15 8 16 9 20 11 22 12 24 14 27 16 28 17 37 18 39 19 40 20 41 21 44 24 45 25 46 26 48 27 49 5 2 84 81 73 67 63 58 University of Alberta Project Board July 22 1998 7 0 Board Schematics and PCB Images 7 1 Schematic a gd
4. 3 3V 5V Operation 4 2 1 Modification The board has been designed so that 1t can be easily modified to use a 3 3V and a 5V power supply This mode is very useful when interfacing both 5V and 3 3V logic There are 2 places that traces need to be cut so that the board can use multiple supply voltages Cut the traces in the 2 spots indicated below The trace that is labeled J1 is a trace that connects the 5V power supply to the 3 3V power supply on the board This is done because most people will only use a single 5V power supply The second place that needs modification is the trace in the power plane under the Max7128S device This trace will disconnect the 5V power supply from the power plane and will cause the power plane to become a 3 3V power plane This trace has been made easy to cut by surrounding it with a small rectangular box 4 2 2 Jumper A jumper now needs to be soldered into J1 Placing the jumper on the left will use the board at 3 3V Putting the jumper on the right will cause the board to use only 5V If a jumper is not put on and the modification was made then the MAX7128S device is not guaranteed to operate properly 4 3 Potentiometer Bypass Jumper 2 J2 is intended to be used if the Pot is not populated and needs to be installed if the relaxation oscillator is used without the pot This just removes the pot from the cir cuitry and allows the oscillator to operate at a fixed frequency determined by the capacitor and
5. Alberta Project Board July 22 1998 7 4 Top PCB with SilkScreen tad cad IMS p HILIMS 8 d10 gt HILIMS 8 d10 8 d10 16 July 22 1998 University of Alberta Project Board
6. E l to R2 The system input is at R1 The frequency of s l the resulting oscillator is approximately f 1 2 2 x R2xC mt if fie ii el i This formula is most accurate if the component values have the following limitations R2 gt 10R1 10K lt R2 lt 1M 1000pF lt C lt 10uF On the Max7k Project Board C luF R2 IMQ R1 consists of both a fixed and vari able resistor R1 430Q IMQ potentiometer 2 4 JTAG_IN Header The JTAG header is where the ByteBlaster or BitBlaster is connected to the project board for programming The Altera data book specifies how the JTAG connections are to be made to the Altera device University of Alberta Project Board July 22 1998 4 TABLE 2 JTAG Head JTAG PIN er Connections Description Clock Signal Signal Ground Data from Device Power Supply JTAG state machine control No connect No connect No connect 1 2 3 4 3 6 7 8 9 Data0 a Signal Ground The following table gives the pur pose of each pin on the JTAG header and the following figure shows the header with the connec tions FIGURE 3 JTAG Header VCC TCK TDO 3 A TMS g e 7 y EA E A i University of Alberta Project Board July 22 1998 2 5 Prototyping Headers TABLE 3 Header 1 Pin Connections TABLE 4 HOLE NUMBER SIGNAL PIN HOLE NUMBER SIGNAL PIN HOLE NUMBER Header 2 Pin C
7. It should be noted that the 44pin device has not been tested in the PCB Table 1 provided below shows the pin out of the MAX7128 device which is the one that will be typically populated Since the 44 pin device will not be used very often the documentation for it is included near the end of this document Please see MAX7032S 44 pin Device on page 12 for more information TABLE 1 EPM7128A Dedicated Pin Outs Dedicated Pin 84 Pin J Lead Project Board Connection INPUT GCLK1 83 Header 1 RC Oscillator INPUT GCLR 1 Header 1 PB2 INPUT OE1 84 Header 1 INPUT OE2 GCLK2 2 Header 1 Crystal Oscillator TDI 14 JTAG Connector TMS 23 JTAG Connector TCK 62 JTAG Connector TDO 71 JTAG Connector GND 7 19 32 42 47 59 72 82 GND VCCINT 3 43 5V VCCIO 13 26 38 53 66 78 Va 5V Total User I O Pins 64 Headers 1 2 and 3 DIP Switches PB1 LEDs University of Alberta Project Board July 22 1998 2 2 2 Power Input The power input circuit features dual 3 3V FIGURE 1 Power Supply Circuit 5V capability short circuit and reverse polar ci 3 ity protection electrolytic capacitors for reg TT J ulation and a power on LED This is shown mo o in the power circuitry schematic shown on ME the right Spain Toor IJF ARE Zpiove al 2 2 1 Multivolt Operation A JICON3 E Power is supplied to the board via a
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9. University of Alberta Project Board UA7K User s Manual Steven Sutankayo Curtis Wickman Copyright 1998 University of Alberta Department of Electrical Engineering 1 0 2 0 3 0 4 0 5 0 6 0 7 0 Table of Contents Introducir 1 1 1 ENS IA E atheestnessches 1 1 2 Download Cables a ieee ieee Le cee ed ee 1 Board Descriptio rinda tio aid rafia arias 2 2 1 MAX 7000 Device cedida eie a a idad 2 2 2 Power pU a ee eke Aa SS RSO ANNS 3 2240 Multivolt Operation siii ic ib 3 2 22 A A TO 3 2 3 Os Cll cate ridad 3 23 4 Crystal Oscillators ci iii 3 D232 RE Oslo iia 4 2 4 TAG IN Header seit sis A AS 4 2 5 Prototyping Headers snini se io da arena abans EE E EN 6 2 6 Push buttonss icsasselncisietiewmctinaaiein ta 6 2 7 DIPS witchess 3 chicane ea eaies lis ae end HA ae A es 7 2 8 LEDS tt abst cope thar be eeu a e whedon aahaks 7 DEVICES Pro et anAM a o nd ESENES SEa 7 3 1 MAXPLUS2 SoftWafe ima 7 3 2 A E A doverAeeeevaevinle 8 Board Configuration Options JUMPErS coooocccnnncccnoncccnoncnononcnononcncnnnncnnnnccnnnnccnnnnoos 8 4 1 Modification Note di 8 4 2 3 3 V DV Ope at OM srta iii 9 4 2 1 SAA AN 9 422 IMM air 9 4 3 Potentiometer Bypass iine i E cussesaecouaneessaveccousicevgccodsbensheorsdoupeessnsyvdeceseeey bens 9 4 4 Oscillator Isola ao aia 9 Bor IO iio 10 5 1 Test Description 10 5 2 TENERLO EA iii ind Eee 11 MAX70325 44a pin Devices ptas 12 Board Schematics and PCB images jis15 5sccjerest
10. casucsondescceatzeodenssuceaccesstsncendedansdaans 13 7 1 CAMA citaron 13 Ted TOP VI W oes iii 14 TZN Top PUB Ts aie 14 B22 BotomPEB o is 14 7 3 Bottom Mi Wise ae A eves ur aa davenenateerd caveat se NR a E AAE NAS 15 7 4 Top PCB with SulkS creeis 16 Table of Contents July 22 1998 1 University of Alberta Project Board User s Manual 1 0 Introduction The UA7K is a programmable general purpose project board intended to be used for the EE480 digital design course It is also intended to be useful for other course work where an ASIC type solution is needed The UA7K is basically a slimmed down version of Altera s UP1 board On this board stu dents can create designs in VHDL and send them to the board via programming software and a special cable which attaches directly to the board Programming is fast and easy so designs can be rapidly changed without having to remove the device from the board for programming The Altera UP1 board has two devices one EPM7128S a MAX7k series device which is on our board and one FLEX10k chip The main difference between this board and the UA7K is that our board has space for only one device an Altera MAX7000 series device The board provides many features useful for a course project board such as push buttons DIP switches LEDs power input protection prototyping headers and built in oscillators It also provides text on the board that shows the header pin numbers and provides
11. files that are there make sure your project board is powered up then click on Detect JTAG Info It should confirm successfully press OK You will be taken back to the Programmer window Press Program to start the operation The most common thing to go wrong during this operation is to fail when trying to Detect JTAG Info Possible causes of this are JTAG cable not connected board not powered up more than one file selected in the device programming list software version not capable or licensed for programming try a different version 3 2 JTAG Connector The Altera ByteBlaster cable has a polarized plug that can FIGURE 5 JTAG Connector not be inserted backwards into the JTAG header The Bit Blaster however does not have this polarized plug and home made cables may not have it either In this case pin 1 of the header is marked at the lower right corner of the header as shown in the picture below On a ribbon cable the red line on one side of the cable denotes pin one The figure below shows the PCB and the location of pin 1 4 0 Board Configuration Options Jumpers yright 1998 Universi 4 1 Modification Note All of the modifications described below can be done with an exacto knife After the modification is done a jumper block and a jumper can be installed to get the board back to the original mode of operation University of Alberta Project Board July 22 1998 8 4 2
12. labels for the board s components For flexibility footprints for two different versions of the MAX 7000 device are available the 84 pin J Lead and the 44 pin J Lead 1 1 MaxPluslIl Software The MaxPluslI software package can be used for all the steps of the design process from design entry compilation simulation synthesis and finally programming 1 2 Download Cable There are two different ways to program the project board Both solutions use the MAX PLUSII software The first way to program the device is to use a ByteBlaster cable The ByteBlaster cable connects to a standard parallel port The second way to program the device is to use a BitBlaster cable The BitBlaster cable uses a serial port connection to program the device Because the cable connects directly to the project board and designs are downloaded directly to the device this means that design iterations can be accomplished quickly and easily without having to remove the chip from the board University of Alberta Project Board July 22 1998 1 For more information on the cables see Altera s data sheet Byte Blaster Parallel Port Download Cable or see Bit Blaster Serial Port Download Cable 2 0 Board Description 2 1 MAX 7000 Device The UA7K has footprints for two versions of the MAX 7000 device the 84 pin J Lead and the 44 pin J Lead The 84 pin EPM7128S will probably be used exclusively but the other footprint is there for flexibility
13. onnections SIGNAL PIN 2 76 1 33 2 34 4 NC 35 4 36 6 80 37 6 NC 8 NC 39 8 40 10 84 41 10 NC 12 NC 12 44 14 45 14 46 16 NC 16 48 18 49 18 50 20 51 20 52 22 24 26 28 NC HOLE NUMBER SIGNAL PIN 22 HOLE NUMBER NC TABLE 5 Header 3 Pin Connections SIGNAL PIN a0 1 54 2 55 32 56 4 57 34 58 6 NC 36 60 8 61 38 NC 10 63 40 64 12 65 42 NC 14 67 44 68 16 69 70 18 NC Note NC indicates No Connect NC 20 73 74 2 6 Push buttons The push buttons are 6mm momentary tact switches The board is equipped for 4 hole or 5 hole switches The fifth hole is for an optional ground pin for ESD protection The signals from the push button are pulled up with 1k resistors The resistors used are on the same resistor array used by the JTAG connector PB2 is connected to pin 1 of the Altera device which is a dedicated global clear input PB1 is connected to pin 40 a general purpose I O pin 22 NC TABLE 6 Push Buttons Button Number PB1 PB2 University of Alberta Project Board July 22 1998 2 7 DIP Switches An 8 DIP switch array is available The inputs are pulled up with 1KQ resistors A 10
14. pin 9 resistor array 1s needed for these resistors TABLE 7 DIP Switches Switch Number Pin Number 2 8 LEDs The UA7K contains 5 LEDs that are FIGURE 4 LED Positions TABLE 8 LED pulled up with 330 Q resistors The Connections LEDs are connected directly to the EPM7128S device Each LED can be illuminated by driving the con nected I O pin with a logic 0 Table 8 shows the I O pin for each LED 3 0 Device Programming To program the device with a design the user needs a PC ByteBlaster or BitBlaster cable the MaxPlusII software and the UA7K and power supply 3 1 MAXPLUS2 Software To program the UA7K board the user must be familiar with the use of the Altera Max PlusII software package To program the board do the following e run the Programmer tool which is part of MaxPluslI e select JTAG In the menu at the top of the screen e make sure that Multi Device JTAG Chain is checked off e click on Multi Device JTAG Chain Setup to bring up its dialog box e ensure that EPM7128S is selected under Device Name e click the Select Programming File button to bring up a file browsing dialog box e search for your pof file which is created by the compile tool and press OK e click Add to add your file to the device programming list University of Alberta Project Board July 22 1998 7 ensure that only one file is in the list by deleting any other
15. re is NO short circuit protection or reverse polarity protection on the 3 3V power line There is however another 10uF electrolytic capacitor to provide voltage regulation for the 3 3V power 2 3 Oscillators There is space for two different oscillators on the project board a crystal oscillator and an RC oscillator Both are described below 2 3 1 Crystal Oscillator The standard EE480 board will not have a crystal oscillator because they are quite expen sive If one is needed any standard 4 pin oscillator can be used they come in a 14 pin DIP package The output of the crystal is directly connected to pin 2 GCLK2 of the University of Alberta Project Board July 22 1998 3 EPM7128S device The connection is made through J4 so that the crystal can be discon nected if required The board can also support a half crystal which comes in a 8 pin DIP package The Altera UP1 board uses a 25 175 MHz crystal but that board uses a higher speed chip 7 opposed to our 10 chips So a conservative choice would be an 8MHz crystal but requirements may vary depending on the particular design being programmed on the board 2 3 2 RC Oscillator FIGURE 2 Relaxation Oscillator With some logic between input terminals a cheap 7 oscillator can be made from only two resistors and a i ie j capacitor Y In the above figure positive feedback is applied to the Chip Y capacitor terminal and negative feedback is applied
16. resistor on the board 4 4 Oscillator Isolation Global clock pins GCLK1 and GCLK2 are by default connected to oscillators located on the project board GCLK1 is connected to an RC relaxation oscillator and GCLK2 is con University of Alberta Project Board July 22 1998 9 nected to a crystal oscillator Both connections are routed through jumpers The jumpers by default are shorted by traces on the PCB Both oscillators may be effectively removed by cutting the traces between the jumper pins GCLK1 can be isolated by cutting the trace between the holes for jumper 3 J3 GCLK2 can be isolated by cutting the trace between the holes for jumper 4 J4 If so desired the oscillators may be re connected by soldering the connection where the trace was cut or by inserting a 2 pin header and an appropriate jumper 5 0 Board Testing An test has been created to verify that the UA7K board is working properly The test verifies that the DIP switches and push buttons work properly the LEDs work and that both the RC and crystal oscillators are functioning The general purpose I O pins are also tested because the clock signal is routed all the way around the chip The pins are configured in VHDL as inout pins The test signal is output to a given pin then that same pin is used as an input to the next pin in the chain Two chains are used in order to detect solder bridges between adjacent pins as in the schematic below CLK_IN J J J J
17. to LEDS Do gt gt gt gt to LEDS XI XI XI XI XI The two signal paths leapfrog over each other so that a solder bridge between adjacent I O pins will cause one or both of the signals to go out of phase disrupting the flashing LEDs 5 1 Test Description The behavior of the test is as follows 1 A clock signal is created from the XOR of the crystal and RC oscillators The crystal is clock divided by 8 million first so that it is roughly 1 Hz if the crystal is present of course When the RC oscillator frequency is adjusted properly the clock signal appears to be fairly random 2 LEDs 3 to 5 flash according to the clock signal The pattern is shown below BD on O off iS off gt on O off O on University of Alberta Project Board July 22 1998 10 3 4 When PB2 or DIP switch 1 to 4 is toggled LED 1 changes When pin 83 PB1 or DIP switch 5 to 8 is toggled LED 2 changes 5 2 Test Procedure To run the test do the following 1 Ze Locate the programming file for the test check the UA7K web page Power the board on and program it If this doesn t work with this particular board i e you can program other boards the JTAG connections could be broken or the chip could be blown Adjust the potentiometer for the RC oscillator You should be able to adjust the fre quency such that the clock signal appears random it is
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