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MPF-I User's manual

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1. eO 739 90 20 2215 aoyeu puedxo o3 Quem no 31 7929 99 2 76 2 91 7 at st P 1oI nba AS AL 92 HIA _ 0082 NB HAAG _ 0002 8 4833327 0007 ILON 335 ZLON 8 X9 12338 _ 0 3310 _ 0 vole 9n i THD T O79 oo AAA ee EEE Matrix Keyboard and Display 014 8255 has 3 I O ports PBO PB7 control individual segments in a display 015 Ul2 are segment drivers 5 select which display 15 to be activated 013 75492 is a 6 digit digit driver The LED display uses a Multiplexing method only one is selected at a time from right to left Due to its rapid multiplexing rate The displays appear to be on continuously Whenever the diaplays are accesed keyboard activity is also checked via 014 8255 PAO PA5 If no key is pressed PAO PA5 are high when there is one key pressed via keyboard scan routine the CPU will detect which key id pressed In MPF I there are x 6 36 keys but only 32 keys are checked through the key board matrix User Key The user key is not assigned a function and is reserved for user s future use The state of this key is detected via PA6 of 8255 via PAG of 8255 Audio Tape Interface The program or data to be stored in Magnetic
2. 1 USER S MANUAL THE FIRST 50 YEARS THE 20TH CENTURY WITNESSED THE IN VENTION OF THE INTERNAL COMBUSTION ENGINE WHICH GREATLY EXTENDED THE PHYSICAL STRENGTH OF THE HUMAN BODY IN THE 2ND HAL F OF THE CENTURY THE BIRTH OF THE MICROPOR CESSOR FURTHER EXTENDED OUR MENTAL STRENGTH APPLICA TIONS OF THIS AMAZING PRODUCT IN VARIOUS INDUSTRIES HAVE INTRODUCED SO MUCH IMPACT ON OUR LIFE HENCE IS CALLED THE SECOND INDUSTRIAL REVOLUTION CONGRATULATIONS Your Micro Professor will lead you to the world of microprocessor Unpacking the MPF I you will have found the Micro Professor an adaptor and a manual The standard configuration of your includes one MPF I microcomputer set two pieces of built in male header one unit of book type package one AC DC adaptor and a copy of User s and Experimental Manual In addition to those standard items three options are for your function expansien which you can buy from local distributor choice 1 SSB MPF which is a speech synthesizer board based on Texas Instruments 55200 5220 and which can reproduce sound and voices stored in its memory 2 which is an EPROM programmer board for 52508 TMS2516 TMS2532 Intel 2578 Intel 2716 and Intel 2732 3 BASIC MPF which is a 2K byte tiny BASIC interpreter Still there are some accessories for your choice You can select 1 SSB CPK 280 counter and timer and Z
3. 4 CBAS CRAG CBA7 CBAS CBA9 CBAA CBAB CBAC CBAD CBAE CBBO CBB CBB2 CBB3 SND eS MIC ET rie ET 7 D rer RESO H RESO L RES 0 HL RESOA RES 1 8 RES 1 C RES 1 D RES 1 RES LH RES 1 1 RES RES 1A RES 2 8 RES2 C RES 2 0 RES 2 RES 2 H RES 2 L RES 2 RES 2 RES 3 RES RES 3 0 RES 3 RES 3 H RES 3 L RES HU RES RES 4 RES 4 4 0 RES RES 4 H RES 4 L RES 4 HL RES 4 RES 5 RES 5 C RES 5 0 RES 5 RES 5 H RESSL RES 5 RES 5 RES 6 B RES 6 RES 60 RES 6 GER ALAN NT CBBS CBB6 C8B7 CBBS CBBB CBBC CBBO CBC2 CBC3 CBC4 CBCS CBC6 CBC CBC3 C8C9 CBCA CBCB CBCC CBCO CBCE CBDO CBD1 CBD2 CBD3 CBD4 CBD5 CBD6 7 CBD8 9 CBDD CBDE CBDF CBEO RES b H RES 5 L RES 6 HL RESGA RES 7 8 RES 7 2 0 SET 2 SET 2 H 21 SET 2 SET 2 A SET 2 8 SEY SEY 3 0 SET SET 3 H SET 3 1 SEY 3 HL SET SET 4B SET 4 SEY 4 0 SETAE NDA E AN O 4 CREA 5 4 1 CBEA CBE
4. LDC Y ed DD2A8405 _ LD 1X NN 00218405 LDIX NN FD2A8405 LDIY NN FD218405 LDIY NN 6E LD L HL 006 05 01 FD6EOS LD L 6F LD LA 68 LD L B 69 LD L C 6A LD L D 6B LOLE 6C 60 LD 2620 LDLN 788405 LD SP NN F9 LD SP HL DDF9 LD SP 1X FDF9 LD SP 1Y 318405 LD SP NN EDAB LDD LDDR OR tX d FDB605 OR Y d 87 OR A 80 OR 8 B1 OR 82 83 84 OR H BS OR Lt F620 OR OTDR EDB3 OYIR 2079 OUT 041 OUT IC B ED49 OUT 51 OUT C D 59 OUT ED61 OUT C H ED69 OUT OUT OUTD ODCB0S86 FDCB0586 C887 C880 CB81 CB82 CB83 CB84 C885 DDCB058E FOCBOSBE 88 CB89 casc CB96 596 FOCB0596 C897 90 91 CB92 CR93 CB94 CB95 DDCBOSIE 059 CB9F pidio OUTI POP AF POP BC POP DE POP HL POP IX POP IY PUSH AF PUSH BC PUSH OE PUSH PUSH IX PUSH IY RES RES 0 1X d RES Y d RES RES 0 8 RESO C RES 0 0 RES RESO RES RES 1 RES 1 1X d RES 1 1Y d RES RES 1 8 RES 1 RES 1 0 RES RES 1 RES TL RES 2 HL RES 2 1X d RES 2 IY d RES 2 A RES 2 B RES 2 RES 2 0 RES 2 E RES2 H RES 2 L RES 3 HL RES 3 RES 3
5. f 5 h Disable interrupt IFF set to 0 I regiser set to 0 Interrupt mode set to 0 User s PC is set to 1800 User s SP is set to 1F9F Break point is disabled Set the content of 1 to 66 and set the content of 1FFF to 00 When the code beginning at 0038 is executed the CPU will jump to 0066 This is equivalent to press is displayed one character at at a time from right to left 2 Press e are the same as 1 The contents of 1FFE IFFF and break point are unaffected UPF 1 is displayed all digits simultaneously m M S 4 7 Tape Data Format 1 Bit format RRRRRRRAI LL 1 2 8 UKI 2 fCycle 1 1 4 ns m Fig des Tape bit fomat 2 Byte format Start Slop 2b1t3bit4 MESE o SSeS 60 ms Fig 4 6 Tape byte format 3 File format start End Chk Mi sync name addrjacddr sum svnc ES 1KHz 1 2KHz 2KH2 4sec Byte Byte 25 Length 2 Fig 4 7 Tape file format A A 5 Monitor Subroutines 5 1 Summary ADDRESS MNEMONIC FUNCTION Scan keyboard and display one cycle 0624 SCANI OSFR SCAN Scan keyboard and display until a new key in 0689 Convert hexade
6. Mask 0 C Redi Enable Low Follows BEER Sc ein O ERE In Mode 3 if Mask follows 1 the next control word is 07 00 M8 MBE MBs MB 0 Monitor the vit 1 Mask the bil MB3 1402 8 Control Register ENABLE MSABLE INTERRUPYS 07 EC _ _ DM 10 Int Enable X X X 0 0 1 Control Registar 3 0 CTC PIN DESCRIPTION Du D P CPU DAYA BUS C31 CONTROL Mi NT a INTERRUPT INT ENABLE CONTROL IN INT ENABLE OUT gee CLT TRGg 2C 10g CLK TRG4 ZC tO4 CHANNEL SIGNALS GLK TRG2 22702 CLK TRG4 280 280 FIGURE 3 0 1 CTC PIN CONFIGURATION 39 CTC PROGRAMMYNG SUMMARY REGISTER SELECTION SELECT LIN S 8 50 CHANNEL SELECTEO PRIDRITY 0 P Highest 0 1 0 1 1 Lowest READ DOWN COUNTER CONTROL REGISTER LOADINTERAUPT VECTOR 650 5 0 07 60 ooo Ta Control n the binary equivalent of interrupting channel number SET OPERATING MODE Timer Mode only 07 _ IN 00 interrupi Y Load Time Control Enable rigger Constant Res Register Coonter Timer 256 16 tj Load Time Constant 1 Ihe next control word s the Time Constant CTC Channel interrupts when 01H is decremented to Time Content Decimal counts to interrupt Oly 1 FFH 255 00H 256
7. LD AB LO DAD LD A E LD AH LDA L LD LD ADD ADD ADDA D ADD AE ADO AH ADD AL ADD ADD 26 ADC A B ADC A C ADC ADC ADC ADC A L ADC A IHL SUB 8 SUB C SUB D SUB E SUB H SUB L SUB HL SUB A SBC SBC SBC SBC SBC SBC AL SBC A HL SBC AND B C AND D ANDE ANO H AND L AND HL AND A XORB XORC XOR D XOR E XOR H XOR L XOR HL XOR A OR B ORC OR O REIT p CPL CP HL CPA RETNZ POP BC JPNZ NN JPNN CALL NZ NN PUSH BC EX SPLHL CALL PONN PUSHHL AND N RST 20H JP HL 10 CB13 CB 14 CB15 CB16 C817 CB18 CB19 CB1A C818 EX DE HL CALL PE NN RST 28H RETP POP AF JP PNN DI CALL PNN PUSH OR N RLC L RLCA RAC HL RRCA RL B RLC RLO C 27 ESS NSE CBIC CB10 CB1E C820 CB21 22 CB23 CB24 CB25 1 C826 CB27 1 CB28 1 CB29 CB2A 2 CB2C X CB2D 2 J CB2F 4 CB38 C839 CB3A d lt 4 CB30 1 CB3F CB40 C841 CB42 C843 CB44 845 CB46 CB47 CB48 CB49 CB4A CB4C CBAD CBAE CB4F 50 CBS CB52 RRL RR HL RRA SLAB SLAC SLA D SLA
8. L LO HLIN LD 1X d A LD 1 LD LD 1X d D 007305 007405 007505 00360520 807705 FO7005 FO7105 07205 FD7305 FD7405 ED7505 FD360520 328405 0438405 0538405 228405 00228405 FD228405 ED738405 0A 1A TE DD7EOS FD7EOS 348405 7 78 57 70 3 20 46 004605 024605 47 40 41 42 43 44 45 0620 ED4B88405 018405 LO Xt E LD IX td H LO L LO N LO UY 3 CO LD IY d O LO LD LV LD Yid L LO IY d N LO NN LD BC LO NN LD HL LO NN IX LD NN IY LD NN SP LD LO ADE CD 11 LD A td LD ALY LD AANA LD AA 1D LO LO A D iD LD AH LO LO LD A N LD BAHL LD LD LOBA LO LD 8 C LD LD LD B L LDBN LD LD 32 FD4 05 ar 005605 F06605 67 60 61 62 63 64 65 2620 2 48405 218405 4 05 047 LO C B LOC C LD LD C E LD LO C L LD LO D HL LD D IX d D LD LD 0 8 LD D C LO D D LD LDOL LO LD H IX d LO LD H B LO H D LD LD LD HL LDH N LD HL INN LO HL NN SS
9. oed dea P eee re eer dd ea 34 A2 loput OU tatty o oe nee ee S 36 Program 39 4 4 Software Break Instruction RST opcode 40 28 SE A A 41 O RA 42 aT Tape Formen guid Boden med Per eddie ofr E 43 5 Montor SUDEDUEIDBS Recap 44 aca Locas aq eem Suc a end did pad editi dca dod Pieces d 4 4 Bie SOA c m 45 rr 46 BEN ee 48 EIN rrr 49 A 4412 pt ee ee 50 DATE nee 51 cce at 52 10 Program 2 e he 53 AR od ioa d 58 EPROM 0000 02 FF bs aged 58 6 2 Check RAM Region 1800 copar ORC CC APPENDIX A Display Format Position Code and Internal Code 1 Theory of Hardware Circuit B 1 Z80 CPU Programming reference C 1 Reference Book D 1 1 MPF I Specification 1 1 Hardware Specifications 1 2 3 4 5 6 7 8 CPU Central Processing Unit Zilog 2 80 CPU with 158 instructions and 2 5 MHz maxi
10. HL IMIR 1C IX XE 101 101 EU 2 5 21 Ag Ay 6 8 10 110 010 62 4840 Bto Pg HL 1 2 4 16 Repeat until 0 8 0 D 10 x atx x tx in or 101 2 16 Cto Ag B B 1 1 10 101 010 AA B to 1 INDA jn 1010 ED 2 5 2 Cto Ag 8 1 MO 111 010 BA t B 40 Ag Arg 2 6 15 Repeat unti B 0 8 0 DUT in 1 jo 8 leo n oto on 03 2 3 In Ay EN OUT Chr 1 o fi 101 101 ED 2 3 02 Cto Ag Aj 000 001 8 Ais lO 1 11 101 tory 0 12 4 16 Ag 8 84 10 100 01 B to Ag Aye ML HL f OTIR n 12 5 21 Ag Ay 8 1 10 110 011 83 I Bol B to Ag Ayg HL 2 4 16 Repeat until 2 0 8 0 OUTO X x xX pa non tory 12 4 16 Cto Ag Ay B 8 1 10 101 011 Bin Ag Ass HL 1 OTOR XIV IX 1 o nior 101 2 E 21 Cto Ag 10 111 011 840 B to Ag Arg HL 1 2 4 16 Repeat unii 18 0 8 0 Notes 1 If iha result of
11. flag set X flag is unknown lag is affecied according to the result of the operation Rotate iaft accumulator Rotate left accumulator Rotate right circular eccumulalor Rotate right accumulator Rotate left circular register r 000 091 010 011 100 101 gt lastructian lorgat and states are ss shown ALC form new Op Cods replace 000 of RECI with showa code Rotate digit left and right between the ccumulstor and location HL The content of the upper hall bi the accumulator 15 unalected BIT SET 2 pr 06 E7 ca 92 ca CB A BIT MANIPULATION GROUP 93 98 A3 CB C8 AB AC ca 83 Ci ca 03 CB CB 08 oc EJ cB CB EC 08 AS CB AD 46 REB IHDEXED 1 9 4e 9 d 2 ca DD ca d 66 d 36 s 9E CB ce 5 AB Ae d d y d 86 86 DOD FO CB d D FO B
12. HL 0 d d CB40 CB41 CB42 1 CB43 CB44 CB45 CB4E DOCBO054E FDCBO54E 4 BC48 9 CB4A CB4B CB4C C840 C856 DDCB0556 FDCB0556 CB57 7 CB50 CB51 CB52 CB53 CB54 CB55 CB5E DDCB055E FOCBOSSE CB58 859 4 CB5A CB5B CB5C CB5D CB66 DDCB0566 0566 CB67 CB60 CB61 C862 CB63 CB64 C865 CB6E BITOA BIT 0 8 BIT 0 D BIT O E BIT 0 H BIT OL BIT 1 HL BIT 1 01X d BIT 1 tY d BIT 1 A BIT 1 1 C BIT BIT 1 BITIH BITIL BIT 2 HL BIT 2 1X d BIT 2 1Y d BIT2A BIT 2 B BIT 2 C BIT 2 0 BIT 2 BIT 2 H BIT 2 L BIT 3 HL BIT 3 1X d BIT 3 Y d BIT BIT 3 8 BIT 3 0 3 E BIT 3 H BIT 3 L 317 4 BIT 4 1X d BIT 4 IY d BIT 4 A BIT 4 B BIT 4 C BIT 4 0 BIT 4 E BIT 4 H BIT 4 L BITS HL CB6F 68 69 CB6A 6 CB6C CB6D 76 DDCB0576 0576 77 70 71 CB72 CB73 CB74 CB75 CB7E DDCBO057E FDCBO57E CB78 CB79 CB7A 7 CBIC CB7D DC8405 FC8405 048405 CD8405 C48405 F48405 EC8405 E48405 DOCBOS6E FOCBO56E BIT 5 1X d BIT 5 1Y d BIT 5 A BIT 5 8 BIT 5 C BIT 5 0 5 E BIT 5 H BIT5 L BIT 6 HL BIT 6 1 BIT 6 0 Y 4 BIT 6 A BIT 6 B BIT 6 C BIT 6 BIT 6 BIT 6 H BIT
13. Restart to 66y or 10210 register contents INTERRUPT ENABLE DISASLE FLOP FLOPS Action CPU Asset Di LO A I LD A R Accept RMI RETN Accept INT RETI IFE 0 0 0 2 o 0 gt N indicates change amp bit Vector from Peripharal Parity Parity fleg gt iFF2 IFF 36 280 ASSIGNMENT cey 0 DATA lt 845 PORT B A SEL CONTROL DATA SEL MO CONTROL CHIP ENABLE ioR NY INTERRUPT INT ENABLE IN CONTROL ENABLE OUT lt 4 37 gt 24 22 200 PIO FIGURE 3 01 MO CONFIGURATION 1 14 13 12 10 Pak Ay gt ADY 578 ROY 578 1 0 C 37 PIO PROGRAMMING SU REGISTEA SELECTION SELECY LINES REGISTEA SELECTED 0 0 Data 0 Dala 1 0 A Control 1 8 Contral LDOADINTERRUPT VECTOR SET OPERATING MODE D7 S 00 1 40 X X 1 1 1 flegistar Mode Number MO Moda 0 0 0 Dutput 1 0 1 Input 2 1 0 Bidirectional 3 Control Mode 3 selected the next contro word is OF _ gt 06 1 06 1 05 1 03 1 07 1 03 05 Contcol Register MO 1 Sate bit to Input 1 0 0 Sats bit to Output SET INTERRUPY CONTROL D7 DO Int
14. fn LD dd eo 1 101 101 ED 4 6 20 dd inn 01 dd 01 fi LOIX a e mon wm 0D 4 20 00 101 010 2A 11125 LO IY nn 11 117 101 FD 6 6 20 inn 00 10 010 n n LO an H 4 00106 010 22 3 5 16 L n LO dd x fe e 11 101 101 eo 6 6 20 dd 01 dd 01 ma n 0 IX fe o 13 011 10 4 6 20 nn 00 100 030 22 n n 0 IY lem ete efits 901 la le lx IYL 00 100 010 22 LD SP HL SP HL o 01 001 Fs LO SP SP IX X 17 011 101 00 2 2 10 19 601 9 LD SP IY SP 1Y fo jo 31 11 ior F0 2 2 10 14 111 001 F9 4 Par PUSH 44 5 2 qq o 11000 101 1 3 11 00 SP 1 0i OE PUSHIX SP 2 o x e ele 110 00 2 a ss 10 HL ISP Xy 11 100 101 5 AF PUSH IY SP 2 polo x e nit 101 2 6 15 IS
15. the left four digits stand for address and the right two digits represent the data The address field is indicated by four points and requires 4 digits more than 4 digits are keyed in only the last 4 are accepted If less than 4 digits are entered the 4 hex digits on the display are assumed to be the address When is pressed the indication points will be shifted to the rightmost two digits prompting the user to enter data The content of the addressed locat on will be replaced by the entered data Pressing or will increase or decrease the address field If the indication points are already in tne data field then it is unnecessary to press After pressing the user may press or directly If the user attempts to change the contents of ROM the display will blank out After releasing the key the display will be restored 13 EI i 3 1 3 Examine Update Registers and Keys register da ta 21 1 EXAMPLE Check the contents of registers Change the contents of register to 12 and register to 34 Gi DISPLAY 5 register name XXXXH L jo X Xxx Y el E ata field of register 1 4AF 54 gt all 1 2 54 AC 1 COMMENTS SET
16. 11 SP INC s 144 100 150 OF 1 1 6 INC IX IX IX 1 6 X e x e 01 10 00 2 2 10 00 100 011 23 INC IY Jo X 11 111 101 FO 2 2 10 00 100 011 23 OEC 4 1 9 st 011 1 1 6 e 101 oo 2 10 D 101 011 28 DEC 1Y IY 1 fe e nao dl 2 k 10 00 101 011 28 Notes ss any of the register pairs HL SP pp is any of che register pairs BC DE SP rt i any of ihe register pais OE SP flag Natation nor allected D reset flag set X unkaown flag altected according to the result of the operation ROTATES AND SHIFTS Yourte and Destination 00 06 6 CB CB GE d DD CB C8 16 d 35 90 TAR OF ye SHIFT 26 00 d DD C6 C8 3E a JE ED ALO by bg Rott Left Circular LUCERE m cv Right Circular Rotate cv Lefi Rotate CY os Shilt tum je Left arithmetic v Sit Right Arithmetic bi Shi 7 Right Logica 0 Right 0E HL KI Y d
17. 29 1 16 10 04 INS DEL GO STELP 23 1 17 11 o RELA TPRD 2 Internal Code CALL SCAN 1C MOVE RELA TPER Gummi um mia i m acm ms BEE me E ev APPENDIX Theory of Hardware Circuit A Systen Clock U3a U3b and 3 58M Hz crystal produce 3 58 2 signal This signal is sent to 02 pin 3 to produce 3 58Milz 2 1 79MHz system clock Reset Signal U2b is used to trim the Reset signal produced by power on or pressing key The trimmed RST is sent to CPU and RST is sent to the 8255 Memory Addressing MREQ 15 14 413 12 11 AIO Selected Chip Address 0 0 0 0 A ETA U6 0000 9 1 0 X X ses A 07 2000 2FFF 0 0 0 1 1 U8 1800 1 06 is the monitor for it may be TMSZ2516 an Intel 2716 07 is a spare socket for future expansion usage 1t may a ROM Circuit design is default for 2716 2516 2532 EPROM when user intends to plug in Intel 2732 6116 he should consult tne note on Sheet 4 of the schematic 08 is a system RAM the memory size is 2K bytes D Input Output port addressing U96 7415139 is port decoder TORQ 6 Selected I O Port Address 0 0 8255 DO 03 0 0 1 40 43 0 1 0 80 83 Note port is not fully decoded e g the 16 combinations 00 03
18. Reg A Heg C x x C Reg X X X Fig 3 1 The moving rule for REG indication points 15 followings are some special register mnemonics 1 The alternate registers AF DE are dicated by the decimal point at the right 2 IX IY is indicated by 3 Register and interrupt 2 is indicated by IF The meaning of each bit in F is shown figure 3 2 y FH Flag High FL Flag Low does not matter Fig 3 2 Flag register MPF I decodes the flag register and displays it in 4 bit groups To display one of four bit groups refer to the tabla below Selection Key FH 52 FL PNC SZ H FL PNC When decoded flags are modified only the least significant bit LSB of the input key is used The next time you check AF register the contents will be updated automatically EXAMPLE Check the carry flag and update it A DISPLAY COMMENTS ozl XX2Z9AF Contents of 16 20 1001FL Check the carry bit 100 1F1 100 0 F L Reset carry flag gt A E xx2BAF F is updated automatically 16 3 1 4 Program Counter Key Reset user s program counter The basic RAM of 1 is 2K bytes It can be expanded to 4K bytes When the monitor is reset it finds the lowest RAM address 1800 and sets the user s program counter to this address If pressed after R
19. The 280 Counter Timer Controller CTC is a programmable component with four independent channels that provide counting and timing function for microcomputer systems based on the Z80 CPU The I O addresses of are from 40H to 43H The 280 parallel 1 0 PIO is a programmable two port device which provides a TTL compatible interface between peripheral devices and the Z80 CPU The I O address of PIO are from 80H to 83H Address lines are not fully decoded only AO and are used 2 through 5 are undecoded lines 38 4 3 Program Interrupt The nonmaskable interrupt is used by the monitor The user is not allowed to use it Pin 16 of the CPU INT is connected to jumper I on the left edge of the PC board and to When the monitor code at address 0038 is executed control will be transfered to the address stored in 1FFE amp IFFF During this process all CPU status an affected The default contents of 1FFE 1FFF are 0066 This is the entry point of the service routine 0038 is executed in the following situations 1 Mode 1 interrupt is acknowl edged 2 Instruction RST 38H opcode FF is executed 3 The data bus are pulled high If mode O interrupt is acknowledged without the interrupt vector RST 38H will be executed 4 When there isan error in program execution and jumps to a nonexistent memory The opcode fetched by CPU is FF If the contents of 1FEE 1FEF are not changed
20. x 93 _ oo 2 3 Error Messages When an illegal key is entered the monitor program will blank out the Display to indicate an error condition has occurred Some program errors will cause an error pattern such ud E to be displayed When this occurs locate and enter the appropriate key 2 4 Addressing The addresses of the basic RAM are from 1800 to 1 The addresses reserved for expansion RAM ate from 2008 to 2 1F9F 1FF3 of the basic RAM are allocated to the monitor The user should read chapter 4 before using this area of memory et nn m M 3 Introduction to Operation This chapter is divided into three parts basic operations program debugging and support functions Notations are described in 2 2 3 1 Basic Operations 3 1 1 System Reset Key Pressing the Reset Button will display UBP 1 On a power up the six digit UPF 1 are shifted out by one from right to left monitor program is initialized either the reset button is pressed or on a power up 3 1 2 Examine or modify the contents of memory and Keys add ress lt data gt lt data gt EXAMPLE Check the contents of memory locations 0000 0003 KEY DISPLAY COMMENTS Tne four index points notify user to input ADDress AF The conten
21. 100 10 0C2 2 If condition not met 1 3 It condition is met i x X 100 109 069 2 condition not met e2 i 1 It condition I ri Up Eg ji ns n 12 X mm 29 eM e e nn ve ter gt 2 695 gg gt oro 000 5 TAN el i BVO 2 the ex ens on in the relative addressing mode e isa signed Iwo s complement number ia the range lt 1 26 129 gt e in the op code crov des an effective 3ddress of pere as PE it incremented by 2 crier to the addition ol e Flag Notation flag not affected flag reset flag set X flag it unknown flag s affected according ta the rerult of the operation C 21 CALL AND RETURN GROUP UN HON COND CARRY CARRY co 04 nn n n 2 5 n A P 8 00 SP ED INT RETI INDIR 741 4D ge NON MASKABLE INT RETN NOTE CERTAIN FLAGS HAVE MORE THAN ONE PURPOSE REFER TO 280 CPU TECHNICAL MANUAL FOR DETAILS RESTART GROUP CORDITION NON ZERO PARITY PARITY 000 8570 AST 8 RST 16 ASF 24 RSY 32 RST 40 RST 48 AST 56
22. CBEC CBED CBFO 4 CBES 6 7 GBFO CBFA CBFB CBFC CBFD CBFE CBFF 0009 0019 00218405 00228405 0023 0029 DD2A8405 2028 003405 003505 20360520 0039 004605 004605 005605 DOSEOS 006605 DD6E05 007005 207105 9 A LAS ESPADAS SET 4H SETAL SET 4 HL SETIA SET58 SET 5 C SET 5 0 SEY SET 5 H SEY 5L 5 6 8 SET SET 6 0 SET SET 6 4 SET 6 L SET 6 HL SET 7 8 7 6 SEY 7 0 SET 7 E SET 7H SET 7 L SET 7 HL SET 7 ADD ADD DE LO IX NN LO NN IX INC IX ADD IX LD IX NN INC 1X d DEC LD 1X d N ADD IX SP LO B IX d d LD D IX d LD IX rd 1X d LD L IX d LD B LD ss Ah I A A AEREA ARRE E m C A RAS xe E OSADO V 2007205 007305 007405 007505 007705 DD7E05 008605 DD8EO5 verfus NANO o Pt gt Pus i DATAN IA DE idi T RM 009605 09605 6005 05 008505 5 DDE1
23. Hegate Acc 427 complement Complement Carry Slag Set Carry Flag MISCELLANEOUS CPI CONTROL DISABLE INT O1 ENABLE INT IN SET HT MODE D 8080 MODE DEVICE 25 POINTER ____ ET INT en RESTART TO LOCATION 0 8 ME 56 SET INT MODE ED NDIRECT CALL USING REGISTER SE I ANO 8 BITS FROM INTERRUPTING 12 GENERAL PURPOSE ARITHMETIC AND CPU CONTROL GROUPS Symbolic debe Op Code Masmofic Oporation Hv 176 EE DAA Converts ace 169 2 packed BCO fotlowiag add of subtract with packed 1 BCD opersnds CPL ee i 00101111 zr NEG Atl x fi 1 101 101 ED 01 000 100 44 xX 0 00 111 111 SCF CY 1 0 00 110 111 37 No operation 9 00 000 000 00 CPU halted e 01 110 110 26 DI Ff 0 9 VA 110 031 F3 El 1 jis 111 011 fe 0 interrupt jojo 11 101 101 ED moda 0 01 000 1101 46 1 Set interrupt n ipl 103 mode 1 01 010 110 56 Set interrupt 11 101 101 ED mode 2 mon se
24. 04 07 08 all select the 5 8255 The CTC amp PIO are also selected by 16 different combinations i 2 AL ON 31vO 740 5 82 1 2 vo L 6185 1 3 AT mT 7 mw lt a in 5 339 512 19 En 72 0901 pon TI II RE suat izz 12 Q In 2T u c Ll TEN En Dean 5 013 UA HS 33 212 Qu EXS5OSINE j 6 L 9 ki 5 20h EE 20 N ig F j 7 5 09 5 OL an a snos aam aava 740 X3aHs I ddwW 1 TILL NT 86 264 9031014 61 24 44 24 91 2 91 24 92 74 42 23 92 23 52 24 92 24 62 23 22 24 2 64 4 76 9 24 6 24 01 23 21 24 El Zd 21 74 51 44 else JOST 29d 082 t 2d ld 96 2d Zd St 2d LE 145 131 26 lt YOL I dd Peppe 350 daatia Oe pa
25. 3 060 110 CY 0 001 ENS ol n 508 A A s 1 1 1 0101 Ht I X dl S8C A s 4 xX x IV II 011 Y d as shown fos ANO s a 1010 100 ADO instruction ORs ys 10 The indicated bils replace the 000 in LAER ihe ADO set above INCr 0 oo 100 INC HL HU HO 11 L I I XI gy x lv o0 1100100 INC d hr om 10 oo 3 00 110 100 INC 1Y d Je pum d 3 UY diei 00 130 100 DEC 1 2 1 101 sis vy of r same format and states as Replace 100 with OP Code Notes The V symbol in the P V column indicates that the P V flag contains the overflow of the result of the operation Similarly the P symbol indicates parity V 1 means overflow 0 means not overflow P 1 meant parity of the result is oven P 0 means parity of the result is odd Flag Notation 9 flag not affected 0 flag reset flag set X flag it unknown lag os allected according to the resolt of the operation C 11 GENERAL PURPOSE OPERATIONS eco Atus Acc DAA o a Acc CPL
26. CBC4 CBC5 CBCE DDCBO5CE 05 CBC8 9 ARCD SETHE RRCE RRCH RAC L RRCA RRD RSTO RST 10H RST 18H RST 20H RST 28H RST 30H RST 38H RST 8 SBC SBC 1 34 SBC SBC A B SBC A C SBC SBC AE SBC AH SBC ALL SBC SBC HL BC SBC HL DE SBC HL HL SBC HL SP SCF SET SET 0 1X d SET 0 1Y d SET SET OB SET 0 SET 0 0 SET 0 E SET OH SET OL SET 1 HL SET 1 1X d SET 1 Yd SET SET 1 8 SET SET 10 C 34 CBCO DOCB05D6 FOCB05D6 CBO7 CBD3 CBOS CBD8 CBDE DDCBOSDE FDCBOSDE CBD9 CBDA CBDB CBDC C8DD DDCBOSEG 0566 CBE 2 CBE4 5 FOCBOSEE CBEF 9 CBED CBF6 DDCBOSF6 FDCBO5F6 CBF CBFO 1 SET 1L SET 2 HL SET 2 1X di SET 2 9 2 A SET 2 B SET 2 C SET 2 0 SET 2 SET 2 H SET 2 L SET 3 8 SET 3 HL SET 3 d 3 1Y d SET SET 3 C SET 3 0 SET SET 3 H SET 31 SEY 4 HL SET 4 tX d 4 lY d SET 4 A SEY 4 SET 4 SEY 4 0 SETAE SET 4 H SETAL SET 5 SET 5 d SETS c SET 5 A SET SET 5 C SET 5 0 SET 5 E SET SET 5 L SET SET 6 lX a SET 6 1Y td S
27. DDE3 ODES DDE9 DDFI DDCB0506 DOCBOSOE DOCBO516 DDCBOSIE DDCB0526 052 DOCBOS3E 006080546 DDCBOS4E 0556 055 0566 DDCBOSGE DDCBO576 5 20680586 ODCBO58E DOCB0596 DOCBO59E 6 DOCBOSAE DDCBOSB6 ODCBOSBE ODCROS5C DOCBOSCE DOCB05D6 DOCBO5DE 05 6 ann ELIGE LD IX d D LD IX d E LD 1X 4 H LO IX gT L LD 1 9 LD A 9 ADD 1 4 ADC SUB 1X d AND 1 9 IX gt d OR 1X d IX td POP IX EX IX PUSH IX JP 1X LD SP LX RLC IX d RRC IX d RL 1 RR IX d SLA IX 3 SRA IX td SRL d BIT 9 BIT 1 d 2 3 1 0 4 0 BIT 5 1X 3 BIT 6 1X d BIT 7 X d RES 0 1X d RES 7 1X d RES 2 d RES 3 rd RES 4 RES 511X d RES 6 1 dl RES 7 1 9 SETO 4 SET SET 2 1X d SET 3 1X di SET 4 1 d SET 5 29 A T SUMATE ET ASE Ll Phi a e nn LL AN Yra 4 DOCBO5F6 ODCBOSFE 2040 4 ED41 ED42 ED438405 2044 045 2046 2047 2048 2049 ED4A 1 ED488405 2040 1 2050 205 ED52 4 0538405 ED56 4 2057 0588405 ED60
28. ED61 ED62 ED67 ED68 ED69 2072 0738405 078 079 ED7A 20788405 EDAO EDA1 EDA 8 EDA9 EDAA EDAB SET6GNIX d SET 7 1 4 IN OUT C B SBC HL BC LD NN OUT 0 0 SBC LO DE IM 1 LD IN E OUT ADC HL DE LD IM 2 OUT ALD SBC HL SP LD NN SP IN OUT ADC 5 LDI CPI OUTI LDD IND OUTD EDBI 2082 EDB3 2088 1 2089 2088 FDO9 2019 FD218405 FD228405 2023 F029 FD2A8405 5 2028 03405 FD3505 FD360520 20680506 LDIR CPIR INIR OTIR LDOR CPDR INDR OTDR ADO IY BC AOD IY DE LDIY LD IV INC IY ADD Y IY LD IY NN DEC IY INC IY ed DEC LD N AOD SP LDB 1Y d LDC LD DALY LO LD HUY d LD L QY td LD IY d B LO IY d C LD IY g D LD IY d E LD IY d H LD LD A LD A d ADO A 1Y d ADC SUB IY d SBC 139 AND tV d tY d OR LY d 1 9 POP IY EX 5 IV PUSH IY JP t Y LD SP IY ALC 1 FDCB0516 FDCBOSIE FDCB0526 FDCB052t FDCBOS3E FDC80546 FDCBOSAE FDC80556
29. FDCBOSSE 0566 FDCBO56 FDCB0576 FOCBOS7E FDCB0586 0596 FOCBOSOE 0 5 6 J FDCBOSAE FDCB0586 FOC805C6 FOCBOSCE 0506 FDCBOSDE FOCBOSE6 FDCBOSE E FOCBOSFE 5 SET 7416 P RL IY d RR IY d SLA 1Y d SRA IY d SRL IY d 0 1Y d BIT 1 1W d 2 1Y d BIT 3 1 4 BIT 4 1 BITS 6 1Y BIT 7 IY d RES 0 1 9 RES 1 1Y d RES 2 IV d RES 3 1 d RES 4 d RES 5 rd RES 6 1Y 4 RES 7 IV d SET 0 1 d SET 1 1Y d SET 2 1 d SET 3 1 8 SET 4 1Y d SET 5 0 d SET 6 1 4 280 INSTRUCTIONS SORTED BY MNEMONIC ADC 4 A lIYtd ADC 30 008605 08605 87 FDA605 CB46 DOCB0546 0546 ADC ADC ADC ADC ADC AH ADC 1 ADC ADC ADC HL DE ADC HL SP ADO ADO 1 4 ADO 1134 ADD ADO ADD ADD ADO ADO ADD ADD ADD HL DE ADD HL ADD HL SP ADO ADD IX DE ADD ADD 5 ADD ADD IY DE ADD IY 1Y ADD IY SP AND HL AND AND Y AND A AND AND AND E L ANDN BIT
30. Notes IFE indicates ihe interrupt enable flip CY indicates the carry flip flop ftag Notation flag not affected 0 flag reset 1 flag sat 7 unkaowa Ho oi Bytes e 1 affected according to the result the operation S gt fa of 1 Cycles States wR gt 4 Comment Decimal adjut Complement eccumulstor One s complement Negate 4 complement Complement carry lag Set carry 16 ARITHMETIC DESTINATION ADD WITH CARRY SET FLAGS 508 WITH CARRY AND SET FLAGS SBC INCREMENT DECREMENT DEC C 14 16 ARITHMETIC GROUP Symbolic Flags No of Ho of Knemonic Ogeration Zy PA NIC Bytes Cyches Comments ADO Hi Hin o fo OT 0051 001 3 11 3 Rey 00 BC HU 1 IX XT XT vi od 17 101 101 15 01 01 si 010 0 Mi 1 Sf SCHL ss x x vi 1 j 10 1001 en 01 0 010 001 IX x x x tor 2 po Reg 00 001 00 0 10 IX 1 SP ADD IY IY 0 ji 111 101 2 4 15 Rig 00 sel 001 00 BC 01 DE 10
31. ee SIGN SIGN REG NEG POS 890 FC F4 n 0 C 22 CALL RETURN GROUP Symbole Flags Op Coda of M T Mnemonic Opesuon S 2 JH JPNIN IE 78 543 240 Bytes States Comments 2 5 1 eepe ei x oo co 3 5 17 ISP 21 PC PC nn h CALL tf condition joj X o 9 itl ce 100 3 3 10 f cc i5 tarse cc n false continue a 3 5 17 true otharwise same 51 CALL HEY PC SP e X 64 81616 n 001 001 CI 3 10 SPeil If condition e e 9 ies e 11 000 1 5 If cc os dalse cc is false 1 3 11 true othervare ec Condition ____ 13 M9 as 000 NZ non zero 001 2 ero 010 carry RETI Retura kom e e x o o M tortor ED 2 4 14 QM C carry Interrupt 01 001 101 40 100 parity odd RETNI Ratura from e 11 101 101 to 4 14 10 PE party even non maskable 000 101 49 1 P positive interrupt yet M negalive RST p 1 PCy e X m 3 11 SP 2 PC PC 0 PC p 1 000 00 001 08H 016 10H 011 18H 100 20H 101 28H 110 30H 11 18H loads IFF FF Howt
32. 1 RES RES 3 8 33 99 CB9A cage CB9C CB9D CBA6 0068056 FDCBO5A6 1 2 4 5 ODCBOSAE FDCBOSAE CBAF 9 CBB6 DDCB0586 FDCB0586 CBBO CBB1 83 CBB4 5 CBBE DOCBOSBE FOCBOSBE CBBF CBB8 RES3C RES 3 0 RES RES 3 H RES 3 1 RES 4 HL RES 4 1 9 RES 4 4 RES4A RES 4 8 RES 4 RES 4 0 RES 4 E RES 4 H RES4L RES 5 HL RES 5 1X d RES 5 17 g RES 5 RES 5 RES 5 RES 5 D RES 5 RES 5 R amp S St RES 6 HL RES 6 1X d RES 6 td RES 6 A RES 6 B RES 6 RES 6 0 RES 6 E RES 6 H RES 6 L RES 7 HL RES 7 RES 7 RES 7 RES 7 8 RES 7 C RES 7 0 RES 7 RES 7 H RES 7 L RET RETC RETM 0516 0516 17 0506 FDC80506 807 00 CB02 CB03 CB04 DDCBOS1E FDCB051E CB1F CB18 19 C81B FDCBOSOE CBOF CB08 RL HL AL IX d RL td RLA RLB RLC RLD RLE RLH RLL RLA RLC RL RLC IY d RLC D HLCH RLD RR HL RR 1X d RR IY d RRA RRB RAC RR E RR H RRL RRA RRC HL 1X d RRC 1Y d RACE FDCBO5C6 CBC CBCO 1 CBC2 CBC3
33. SLA H SLA SLA HL SLA SRA SRA SRA D SRA SRA H SRA L SRA SRA SRLB SAL SRL D SRL E SRL H SRL SFL HL SRL A BIT 0 8 BIT BIT 0 0 BIT 0 BITOH BIT 0 BIT OA 18 BIT 81110 BIY 1H BIT AL BIT 1 HL BITIA BIT 2 0 BIT 2 C BIT 2 0 2 APRA SEA PRESEN CB54 BIT 2 4 55 BIT 2 L CR56 BIT 2 HE CB57 BIT CB58 811 8 C859 CB5A BIT 3 0 858 BIT 3E CB5C BIN 3H 5 BI 3 4 3 UL CB5F BIT 3 CB60 4 CB61 811 C862 Bl 0 CB63 Bl CB64 Bl 4H CB65 BIT AL CB66 BIT 4 HL CB67 BIT 4 4 5 8 CBGS BIT S C 5 0 CB6B 5 CB6C BITS H CB6D BITS L BITS HL CB6F BIT 5 A 879 8 T 6 8 CB71 6 C Ch72 BIT 6 0 C373 BIT 6 C374 BIT 6 H CB75 6 1 CB76 BIT 6 HL 7 GA 78 BIT B CB79 7 BIT 7 0 C878 BIT E CB7C BIT 7 CB7D BIT 7 L CB7E BIT 7 HL CB7F BIT 7 CB80 RESOB CB81 RES CB82 RES 0 0 RES ee e ad n MEN ctm 5 as c um m Je C885 CB86 CBE CB59 k 1 CB8B CB8C CBSD 99 CB91 C892 CB93 CB94 CBS5 CB96 CB9 CB98 CB99 C89A Ca9B 9 CBSE CB9F BAG 1 2
34. SR para 1 1 2 SoftWare 3 1 3 Physical Configuration ses aupa T 4 General 2 1 Function of Monitor rad 5 2 2 Notations Used in This 2a urat ene da Ras 6 A P Operation 10 1 0 3 1 1 System Reset E 11 3 1 2 Substitute Memory e 11 3 1 3 Examine amp Update Registers and EM AA A 14 3 1 4 Program Counter B Kay pare Honc PL PEE EU 17 3 2 Pr oram Ee dod e So RR do 18 3 2 1 Program Execution d 3 2 2 Single Step 3 2 3 Set Break Point 3 2 4 Clear Break Point 3 2 5 Immediately Break did SUBBOrt FUNCTIONS cu cee eee wc Be 3 3 1 Block Transfer 3 3 2 Data Deletion Key 3 3 3 Data Insertion 3 3 5 Storing Data Onto Tape 3 3 6 Reading Data from Tape 4 Software and Hardware Description 1 oth bx RR Rea Pn 34 4 1 Memory Address ica ge oic
35. Y is zero the 2 0 is 501 otherwise os Flag Notation flag not affected 0 ceset 1 flag set X ss flag is affected according to the result of the operation 6 25 280 INSTRUCTIONS SORTED BY Ber OP CODE 248405 SOURCE STATEMENT NOP E LC LD INT INC DEC 8 EX ADD LO DEC DECC LD RRACA DJNZ OIS DEJA INC DE INC D DEC D LD OLN RLA JR DIS ADD HL DE LD DE DEC DE INC E DEC JR NZ DIS LD HL NN LO NN HL INC HL INCH DEC LOHN DAA dv 5 ADD HL LO HL NN DEC HL INCL DECL LO CPL JR NC DIS LO SP NN LD NNLLA INC SP INC HL DEC HL LD HL N 5 JR ADD HL SP LD A NN DEC SP INC DEC A LD LO B 8 LD B C LD LD LO LO BL LD BAHL LOBA LD LO C D C H LUCL LO 008 LO D C LODO DOE LD D L D IHL LD Pr gt LD H HL LD LD L C LO LD LD LE LDL H LOLL LD L HL LDL A LO HL B LD tHL C LD HLI O LD HL LD HL H LO HL L HALT LD
36. after power on the effect of executing 0038 is the same as for pressing key or break point The user may define his own service routine by changing the contents of 1FEE amp IFEF 4 4 Software Break Introduction RST F7 RST 30H has the same effect break It is called software break because no hardware operation is involved It is usually used as the terminator of a user s program 1 1 also very useful in multi break point program debugging __ o _ Q 40 wu 4 5 Stack Figure 4 4 snows the stack configuration The default value of the user s stack pointer is 1F9F Each time the user s program breaks the monitor checks his SP will be displayed if the user s SP points to the system stack If there is stack related instruction e g RET in the user s program an error may occur when user s stack and systen stack overlap initial value Herault of user s SP 1POE User s Stack initial value Monitor Used rea a of system SP gt 1PAF LEYS Fig 4 4 Stack distribution map SYS SP can occur in the following situations 1 Pressing when monitor is controlling the CPU This operation will destroy all user s registers and should be avoided 2 Executing the monitor itself by pressing 4 6 Reset There are two possible results When the monitor is reset 1 Power on a
37. by your outlet in the United States it is assumed unless a special order is make that the supply is I17VAC which is usually referred to as one ten 110V You should also check the fre quency the label on the adaptor will show the frequency in Hertz Hz AC ADAPTOR MODEL ST 9600 INPUT AC 110 60HZ OUTPUT DC 9V at 600ma loading let voltage for MICROPROFESSOR use only 9Y Circular Socket Art ADAPTOR Plug the 9V circular socket into the power receptacle on the The side onposite the Adaptor label is to be plugged into your outlet CR HOR FORO OR R CAUTION DO NOT TOUCH THE PRONGS WHEN PLUGGING THE AC ADAPTOR INTO YOUR OUTLET I HOR IG When power is applied to the MPF 1 the following series of patterns should appear First pattern Sos Aus Due M P Final pattern Strong background light will make the displays hard to read If at all possible avoid bright lighting TESTING AND FAMILARIZATION the exercise below you will be shown how to enter and ex cute a short program Performing this exercise will test some of the MPF I functions and familarize you with the MPF I The program used in this section adds two numbers and stores the
38. for this key 1 the same as After insertion the last byte of the inserted block lost The inserted address is one byte after the displayed address Pressing this key causes all the data after the displayed address to be shifted up one position Then the address field is incremented by one and the user may enter the data he wants to insert 28 2 6 E 3 3 4 Relative Address Calculation M Key Instructions JR and DJNZ require relative addresses MPF I supports the calculation of relative addresses throught the key lt address gt lt address gt EXAMPLE ssume there 15 JR instruction in your program The address of opcode is 1800 the address to jump to is 1804 KEY DISPLAY COMMENTS S is the mnemonic of starting address Starting address 1800 D is the mnemonic of destination address 8 1 8 0 4 a Destination 1804 02 computes the relative address and stores the result in the next byte of the JR opcode The result s also displayed Description After pressing the display becomes S S represents the starting point of JR or DJNZ Pressing L the display becomes d represents the destination address of JR DJNZ Pressing gt MPF I computes the relative address then Stores it in the 2nd byte of opcode The display becomes of the Addr Data form The address containing the relative addr
39. gt 1802 11 22 1803 22 33 1804 33 44 1805 44 XX DISPLAY COMMENTS KEY 1 8 0 2 11 To change the display to the Adar Data form and enter the address to be deleted 180222 The old contents of 1802 have DE 2 been deleted and data above it have been shifted down The new contents of 1802 are 22 which ws the original contents 1803 EE e IL Ls 180000 Check LL E 1802 2 2 180552 1804 4 4 BB n Description Data in ROM not be deleted The valid regions for this key 1800 1DFF When the deleted address is between 1800 1DFF all the data after this address shift down position The last one 1DFF is filled with O 27 3 3 3 Data insertion data gt When the display is of the Addr Data form the input data will be inserted after the displayed address EXAMPLE Assume the contents of RAM are as follows ADDRESS OLD DATA DATA AFTER INSERTION 1800 00 O0 1801 11 11 1802 22 22 33 gt 1803 44 33 1804 55 44 1805 66 55 DISPLAY COMMENTS KEY 1 8 0 2 22 To change the display to the Addr Data form and enter the address of the insertion 180500 Insert one byte after 1802 address field becomes 1803 1803 3 2 Key data 33 EI 1 8 0 0 0 0 Check 18011 1 180222 1805 5 5 1804 4 4 180555 gt Description The valid region
40. jack of MPF 1 and press PLAY and REC to start recording If the recorder is not ready and you press data is still sent out This data will not be recorded on tape During transfer the display is blank the TONE OUT LED is on and a tone sounds 31 3 3 6 Reading Data from filename EXAMPLE Read the data trom tape recorder filename is 1234 the data on the tape was written by using the key see storing data onto tape KE Y DISPLAY BC DE AL AF 1 gt 4 PLAY 1234 COMMENTS F is the mnemonic of filename Filename 1234 Connect the recorder using earphone jack to the EAR jack in MPF I Start execution display is blank while MPF I is searching for the filename Press PLAY on the recorder The recorder output volume should be turned to maximum MPF I echoes the signal read from tape on its own speaker if the volume is too lov then there will be no sound Every file name read by the monitor will be displayed for 1 5 seconds When the desired file is found is changed into When finished the last address read in is displayed Description Before execution the user must connect the recorder using earphone jack to the EAR jack in MPF I Turn the volume of the recorder to maximum Then press and finall Start the recorder PLAY Initially the display ie ee the desired file is found the display becomes Sta
41. result in mem PROGRAM ENGLISH Load the first number into the A register and the second number into the register Add the contents of the register to the con tents of the register and put the result sum in the A register store the value in the A register in memory location 1830H H stands for hexadecimal Finally halt the Micro Professor Source Program in Assembly Language ORG 1800H Start code at 1800 hexadecimal LD 05 gt Load the register with 5 04 Load the register with 4 ADD A B LD 1830H A 3 Store A at memory location 1830H HALT Stop execution of program BER EN UT ill ge AN 1 ASSEMBLY LISTING All program are entered into the MPF I in hexadecimal There fore you first write your program in assembly language and then translate 16 into hexadecimal 11 of the demonstration programs written in the manuals will also list the machine language code which 16 in in hexadecimal complete assembly listing is shown below LOCATION MACH INE STATEMENT ASS EMBL Y COUNTER LANGUAGE NUMBER ANGUAGE 1800 1 ORG 1800H Start code at 1800 hexadecimal 1800 3505 2 LD 05 Load the register with 5 1802 0604 203 LD 04 Load the register with 4 1804 80 4 ADD AA 1805 323018 5 LD 1830H A Store A at memory location 1830H 1808 76 6 HAL T Stop execution of program Fig 0 1 Assembly Languag
42. with carty 586 HL SS TX 16 bit subtract with carry 0 1 0 11 Rotate accumulator RL RLC s RRE Rolate and shift locations StA SRL RLD RAD 0 0 Rotate digit lett and right DAA IX Decimal adjust accumulator CPL o 1 e Complement accumulator SCF e X 0 0 1 Sercary CCF le 0 Complement carry IN Io X P 0 tnpul register indirect INE IND OUTI OUTO X XIX input and output INIR INDR OTIR UTDR X IX X X X o 25048 otherwise 2 101 109 jo fe transfer instructions LOIR LOOR X xXIx 0 0 0 IP Vs1if BC 0 otherwite P V 0 1 Block march instructions Z Vif Az HL otherwise 2 0 P V 1 if BC 0 otherwise 0 1 LOA 9 The content of the ntercupt enable flip flop IFF is copied into the PIV flag The state of bit b of locations is copied into the 2 flag The following potation is used in this table Symbol Operation C 129 the operation produced a carry the MSB of the operand or Z Zero 221 if the result of the oparation is zero Sign 5 1 if
43. 1 60 mm W O case Width 15 75 cm W O case Depth 22 30 cm W O case Weight 1 41 With Case A M HM M M M e 1 2 Software Specifications MPF I contains a high performance 2K byte monitor program It is designed to respond to user input monitor commences execution when power is applied In addition to the key monitor functions the monitor contains a memory checking routine The following is a simple description of the key f unctions 1 EJE system reset 2 i set memory address 3 set a register name ME input data to memory or a register 5 recall program counter 6 increment memory address or a register by one 7 decrement memory address or register by one 8 single step the user s program 9 set breakpoint in user s program 10 Clear breakpoint in user s program 11 non terminate the executing program and return the control to the monitor 12 commence execution at address shown on the display 13 insert 1 byte into memory 14 oa delete 1 byte from memory 15 move a block of data from one area to another 16 relative address calculation 17 store data from memory onto audio tape 18 88 retrieve data from audio tape 19 ma maskable interrupt connected to CPU s INT pin 20 ver user defined key connected to inpu
44. 10 Fisgs and tene states lor SET iniiruction C 19 JUMP GROUP CONDITION PARITY PARITY IERO 000 DECREMENT 8 JUMP ZERO RELATIVE PC E u 20 Symbolic Mmaa Opermion JP na JP cc na If condition cc jit true otherwatg Re e JR C 2 0 continue 1 PC t l 0 PC JR 2 2 0 27 1 PC if 251 0 fr JR e JR NZ J dA E PL DJHZ 8 1 0 Icontinue BAR PCr Notes o JUMP GROUP Flogs of M No o1 Y 76 553 210 Bytes Cyetos States Coraraents X o X C3 n n gt cc Conditioa 11 c 010 3 000 NZ non zero m 001 2 b p a 010 cany O11 carry 100 PO parity odd 101 PE parity even 10 P sign positive 00 011 000 3 11 negative _ X s 6 100 111 000 2 condition not mel 4 3 It condition is met Xie X d E 00 110 000 2 condition not el 3 condition i d xj
45. 110 110 tow X 0t 101 110 110 no 111 101 110 110 d S X 001 010 X 011010 X 11 010 n gt t X 000 010 X 010 010 X 110 010 A 701 101 010 111 X 10i 101 011 111 X 301 101 000 111 101 101 001 111 BO DO PD 36 DD 36 0 12 32 I Bytes 7 me ie 2 mi of M y tie Sti ue 423 Commenti Rog 090 8 001 910 0 DTI f 100 101 11 C 5 m 4 gt PUSH INSTRUCTIONS NOTE The Push amp Pop Instructions adjust the SP after every execution 16 LOAD GROUP LD PUSH AND POP SOURCE REGISTER POP INSTRUCTIONS 6 16 BIT LOAD GROUP Symbolic 3 of of of T Fa Op Code Mnemonic Operation STZ 76 210 He Bytes Cychs Stator Comments LO dd d an 00 090 001 3 3 10 08 Pair 00 BC 01 LD IX nn jo 101 00 4 14 10 00 100 001 21 SP 1 n ma n LO 11 111 101 Fo 4 4 14 00 100 001 21 a LO HL W 1 x e 00 101 010 2A 3 5 16
46. 2 Register 18 0 1 8034 7 Second step becomes 1803 Register incremented Ilze Third step PC becomes 1804 Register becomes 01 When executing using single step the monitor uses user s stack to store interrupt return address The user s stack pointer must point to RAM If not Err SP Will be displayed If user s stack pointer points to System stack area SYS SP will be displayed Stack overlap will cause an error when RET instruction is executed In these two cases you must change the stack pointer or press the reset key After reset the system 111 set user s SP to its default value the user then need not worry about his stack pointer See section 4 5 19 ee eee Lite vum eS a A U DU i een ar 3 2 3 Set Break Point Key When a program is long s ngle step execution can be very time consuming Setting break points allows the program to execute more than one instruction and then halt Pressing step many times has almost the same effect but takes longer The monitor regains control whenever user s PC passes a specified break point address The uset may examine or modify memory and registers when his program has reached a break point SBR means set break point When the display is in Addr Data form with address pointing to RAM area pressing this key causes the displayed address to be set as a break point EXAMPLE Store the following pr
47. 4 D fE DE CB 6 15 FI C8 d ED 4 26 FD ca 8 FD 68 4 Oqit Rotate Digit 16 RRA RLCr RLC HL ALE 1Y d RRCs RAs SLAs SRA 1 SRL RLO RRD Mosmonic Symbolic _Operation o 1X d 1Y d 07 Xd iY d s r X80 Lo 6 cv s ZELIO Xd 7 0 EE Y 0 y HO 1X d 1V d 0 off E UY 415 0 QINL Flag Notation AND SMIFY GROUP DECat ln pesto us 0 0 oo 000 111 07 0 0 00 010 111 17 or 0 o 00 011 111 0 11 001 011 CB 00 000 0 0 11 091 0114 CB 00 000 110 0 0 11 011 101 OD 11 001 011 00 600 110 0 11 111 101 Fo 11 001 011 d 00 500 110 0 Bt IP 0 001 olx 0 A 0 1601 fe 0 11 111 t 01 101 ED 1 101 31 0 101 101 ED 1 100 111 67 No of No of fio ot Bytes Comments 1 1 1 1 1 1 1 1 2 2 2 4 4 6 4 2 5 18 2 5 18 leg not aflected 0 flag reset
48. 4 LD HL 100H 1800 CDE405 8 CALL TONE 1810 18 9 LOOP l 3 11 TONE EQU OSE4 12 END 1 Low frequency C 0 equivalent to 256 HL COH 192 so the period 1 44 13 256 2 0 56 3777 mic ro sec trequency 1 3777 265Hz length of the sound 3777 micro sec x192 73sec 2 High frequency C COH 192 HL 100H 256 so the period 44 13x192 x2x0 56 2845 micro sec frequency 1 2845 352Hz length of the sound 2845 x256 73sec 57 6 1 Check 0000 07FF The sum of all monitor codes is zero Routine ROMTEST at 06 6 uses this property to check the monitor EPROM ROMTEST O6A6 210000 LD HL 06A9 010008 LD 800 031 06 CALL SUM 2801 2 SUMOK 0681 76 HALT ERROR 0682 CT SMUOK RST DISPLAY UPF j 0531 XOR 0532 86 SUMCAL ADD HL 0533 1 CPI 0535 205 PE SUMCAL 0538 B7 OR 0539 9 This program calculates the sum of all codes If the result is 00 UPF 1 is displayed The key sequence is as follows 1 Correct the display is 2 Error WALT LED will come on 6 2 Check Region 1800 1FFF RAMTEST 0694 210018 LD HL 18008 0697 010008 LD BC 800H 0G9A CDF605 RAMT CALL RAMCHK 069D 2801 JR 7 TNEXT 069F 76 HALT TE ERROR 06A0 EDA TNEXT CPI 0642 1 07 JP RAMT 0645 C7 RST 0 DISPLAY UPF
49. 61 7 BIT 7 1X d 7 1 4 BIT 7 7 8 7 C 7 0 BIT 7 E BIT 7 H 7 1 CALL CALL CALL CALL NN CALL NZ NN CALL CALL PE NN CALL PO NN CALL Z NN CCF CP HL CP 1X d 1Y d C 31 Pt RS EV BD rE20 9 089 1 1 2 27 35 003505 FD3505 3D 05 gt 1 CPIR CPL DAA DEC HL DEC 1X d DEC DEC DEC D DEC DE DEC OEC DEC HL OEC IX DECIY DEC L DEC SP Dl DJNZ DIS EX 5 ISP SP IY EX AF AF EX IMO IM 1 IM 2 IN IN IN IN D C IN IN IN L C INC HL INC INC a 75 3620 007705 007005 007105 007205 ERES EIA ATARI FRE AT AT AI INCA INC B INC BC INC INC D INC DE INC INC H INC HL INC IX INC IY INC L INC SP INO INDR INI INIR JP HL JP 1X JP t Y JP C NN JP JP JP NIN JP NZ NN JP PNN JP PENN JP PO NN JP ZNN JR C OIS JR DIS JR NC DIS JR NZ DIS 2 015 LO 8 LO LO LD HL B LD LD IHL O LO HL LO HL H LO
50. 80 PIO parallel chip kit 2 MPF BBD 1 42 x 3 15 breadboard 3 MPF 2KRAM 2K x 8 RAM 6116 58725 or others in function equivalent 4 MPF 2KROM blank 2K bytes 52516 12716 or equivalent 5 MPF 4KROM blank 4K bytes EPROM TMS2532 12732 or equivalent Notes When your 15 in use the power regulator 7805 which 1 installed in the upper right corner of the may heat up temperature of 70 is normal Just keep your hands off the power regulator Cassettee interface 1 Use high quality audio tape and tape recorder 2 When read data from cassette the volume switch of your tape recorder should be turned to its maximum 3 In case you have problems using your cassette recorder for data storage or retrival properly the battery of cassette recorder may run out of power Change with new batterles any problem occurs while you use our MPF 1 we wish you to contact us or your local dealers immediately NOTE USER This manual is not meant to serve as an introduction to computer programming the reader is supposed to have had some previous experience on microcomputer and microprocessor The reader without any previous background on basic concept of computer is suggested to refer An Introduction to Microcomputers Volume O the Beginner s Book by Adam Osborne Osborne and Associates Inc before he starts reading this manual The reader is also suggested to refer textb
51. ATA FIELD Line 3 of the listing also contains two bytes of hexadecimal data enter these bytes by keying 9 6 a similar manor enter 0 4 the rest of the program namely 0 13 23 37 0 0 8 1 7 6 IV CHECKING FOR DATA ENTRY ERRORS The program had been entered It is wise to check for entry errors Press 9 0 Are the rightmost two dis plays dara field equal to If not press and enter E To examine the next byte press there 05 in the data field If the display is correct continue inspection of all the remaining data using the key the present byte or successive bytes are incorrect enter the correct data Section 3 1 2 contains a formal description of how to enter data PROGRAM EXECUTION There are two ways to begin execution at address 18008 The sim plest is to press and then GO The second method allows execution to begin at any address Press LADDR the beginning execution address e g 1 0 0 then GO When you press the screen will eventually go back less than a second and stay blank The program has reached the HALT instruction and is waiting for the next operator action CHECKING THE RESULTS To regain control of the keyboard functions press answer to 5 4 was stored at location 1830H Key ADDR 0 dislay should show 1 8 3 0 ADDRESS FIELD DATA FIELD The action of t
52. BC DE HL 51 5 9 2 Address OSE2 Function Generate a sound of 2KHz Input The number of periods is in HL Output None Register Destroy AF BC HL DE 52 lt lt ggf 5 10 Program Examples EXAMPLE 1 Display HELPUS HALT when is pressed 1 DISPLAY US UNTIL STEP KEY PUSHED 1800 2 ORG 1800H 1800 DD212018 3 LD HELP 1804 CDFEOS 4 DISP CALL SCAN 1807 FE13 5 13H KEY STEP 1809 20 9 6 JR Z DISP 180B 76 Yi HALT 8 1820 9 ORG 1820H 1820 10 DEFB OAEH 2 1821 TJ DEFB OBSH 0 1822 1 12 1823 85 18 085H a 1824 14 DEFB 08FH sun 1825 37 15 DEFB 037H sin 16 3 17 SCAN EQU OSFEH 18 END Details of the display buffer are given below Display Segment of Position Format Illumination 9 Right 7 f TZ a l il D n X A nn x eMe 1824 dep eun Data 10101110 1 0110101 B5 00011111 I 0 0 0 o E 1 85 10001 1 11 m U 001101114137 1825 u lr ee nn Please refor to App
53. C 40 APPENDIX Reference Books 1 780 Assembly Language programming Manual 2 Intel Component Data Catalog 3 The TTL handbook DOC 1001 87098 3 4 vey a gu Lx gt h a a ln o m NM 4 de gt a Ju H P E P gt E gm E 2 t ei A
54. D 2 flagis Vd A CHL otherwise Z 0 Flag Notation f M Ho of Cycles States Comments 4 uf E 21 16 21 16 21 16 21 16 lag riot 0 flag reset 1 set X flag is unknown lag alfecitd according to the result af the operation Register bank and auxiliary register bank exchange Load HU into DE increment the pointers and decrement the byte counter BC 0 I 8 0 118C 0 It BC 0 l 8C Oand HU M BC 7 0 oc H1 If 0aad A 7 HL 9 ARITHMETIC AND LOGIC SOURCE REGISTER ADDRESSING INDEXED IMME 0 ADO w CARRY SUBTRACI SUB CARRY SBC ANO INCREMENT INC DECREMENT 30 05 we d b d s C 10 Mnemonic Operation 5 76 543 210 Hex Bytes ADD A ADD ADO A HO AHL 8 LOGICAL GROUP Symbolic Flag Op Code Y Commentt Pdf Xe 060 X 0 1 10 0009110 2 i i 0 10 000 110 1 ADO Xid A A X D Ei dT ip Ivo ltr oso DD 10 8601110 d A00 Ey XL te XP Vv PO 11 111 s00 D
55. ET 6 A SET 6 8 e SET 6 C CBFA 5 CBFE DDCBO5FE FDCBOBFE CBFF 9 CBFA CBFD CB26 075080526 0525 27 CB20 CB21 CB22 CB23 24 CB25 2 52 1 052 CB2F CR28 29 2 CB2B CB2C CB2D CB3E DOCBOS3E FOCBOSIE CB3F C838 39 CB3C CB30 A IS 2 A Fk SET 6 0 SET GE SET SET 6 L SET 7 HL SET 7 Dd SET 7 IY sd SET 78 SET 7 SET 7 SET 7 SET 7 SLA HL SLA SLA SLAA SLAB SLAC SLAD SLAE SLA H SLA L SRA HL SRA tX a SRA SRAA SRA SRAC SRA D SRA E SRA SRAL SRL HL SAL SAL SRL SAL SRLC SAL D SRL E SRL H SRL SUB HL SUB IX d SUB LY d HL IX td 1Y d XOR A XOR XOR XOR D XOR XOR XOR L XOR N Example Values Inn EQU 584H ld FOU 5 In EQU 20H 30H de A A A 0 36 MASKABLE 0 Place inttrucboa onto Data But during INTA Mi 1 like 8080A 1 280 CPU INTERRUPT STRUCTURE Restart 10 38 or 56 q 567 Mode 2 Used by 280 Peripherals Interrupt Service Routine Starting Addres Table NON MASKABLE Low Order High Order
56. L RAMCIIK O5F6 78 LD A HL 05F7 2 CPL 05F8 77 HL A 05 9 TE LD HL OSFA CPL 77 LD O5FC BR UL OSFD c9 RET This progcan tests every byte region 1800 JEFE If the byte is good it continues testing Lill all bvtes nave been tested t there is any bad byte the HALT LED will come on You press fel to get the address that has the error Then press to zet the content of that byte If you want to continue testing vou may press The key sequence 1 as follov Jet EEE 1 1 2 Error LED will come 45 displayed SEE es ee D APPENDIX Display format position code and internai zode DISPLAY FORMAT COED 36 AE 38 47 80 DATA 0 1 2 3 4 5 6 7 9 A B C G 2 3 q 5 i none CODE 8F OF AD 37 89 Bi 97 85 28 23 ir 03 DATA E F C I J K L M N Q R er E E e 87 85 7 9 07 6 8 83 2 32 02 00 B3 S T U W pS o A SS nn Appendix 2 1 Position Code CALL 5 LE 18 12 OC 06 00 SBR 0 17 2 E 19 13 OD 07 01 b a di a er 20 14 OF 08 02 DATA REG p 113 15 09 03 ADDR C x 2
57. P 1 1YH 11 100 101 ES POP 15 1 y o Xi e 940 001 1 3 10 SP IXH 1SP 1 o x 11 011 101 09 2 4 14 X SP 11 100 001 Ex POP IY 5 1 e o xX x Jo 11 111 101 FO 2 4 14 IY t1 100 001 En Noles dds any of the register pairs 8 DE SP 94 any of the register pairs AF BC DE HL PAIR y refer vo high order and low order eight bits of the register respectively eg Flag Notation not atlecte 0 flag reset 12 flag sat X is unknow 4139 is affected according to the result of Ihe operation EXCHANGES AND EXX IMPLIED ADDRESSING BLOCK TRANSFER GROUP SOURCE LOM Load DE lt tnc HL amp DE LOIR Losd DE 1 Inc HL amp DE Dec 8 until BC 0 _ LOD 1080 OE HL Dac HL amp OE Dex BC LOD A Load Dec amp DE Dec BC Repestuntil 0 to rourca OE paints destination BC is byte counter DESTINATION BLOCK SEARCH GROUP SEARCH tOCATIOR toc HL Dec BC until BC 0 lind match CPDR Dec HL amp OC _Rapeat until 0 or find maich HL points to location in memory to Compared accumulator c
58. S the left of the display is the lowest RAM address See Example DIS PLAY COMMENTS E 1800 Lowest ADDress 17 3 2 Program Debugging 3 2 1 Program Execution Key This key is valid only when the display is in the standard Addr Data format After pressing this key the CPU jumps to the address on the display control to the user s progran Before transferring it restores all the user s registers User s registers can be preset by pressing EXAMPLE Executing program KEY DISPLAY LFAF SP LFAFSP 1800 XXXXXX COMMENTS The left field of the display is not an address Display 1s blank indicating an error Display returns to normal after releasing the key The left field is an address CPU starts execution from 18090 3 2 2 Single step ve similar to gt It is valid only when the display is in Addr Data form Pressing this key causes the CPU to execute the instruction pointed to by the current setting of the PC register After execution the monitor regains control and displays the new PC and its contents The user may examine and modify registers and memory contents after each step EXAMPLE Store program in and execute 1 by single steps KEY DISPLAY COMMENT 1 Reset system m LD B A First step becomes 180
59. Tape 15 serially sent out via of 8255 The filtering amp decaying circuit composed of C13 R11 C12 R12 and R13 This decayed signal is to Microphone inlet of Tape recorder 92 drives an LED and speaker PC7 is also used as the port for audio output recorded file may be read back to the RAM from the Earphone outlet of Tape recorder The input interface circuit is composed of R14 CR2 1 and C11 This circuit converts EAR inputed signal to level signal and detected by CPU via of 8255 Step Break point and Monitor Break PC6 is nomally high This signal send to RO input of U4 7490 will preset U4 output to 0000 and make of Z 80 high When PC reach Breakpoint execute single step PC6 will output low U4 starts counting after 5th OP code fetch NMI becomes low This will interrupt program execution and jump to monitor program Logic State of 04 741 590 RO Qa Qd Qc Qb NMI Comment Nomal State 1 000 0 1 04 preset to 0000 0 0 0 0 0 0 1 RO BREAK 0 ist MI 0 0 1 1 7490 Start commting 2nd MI 0 0 0 0 1 0 1 Qad Qc Qb is Mod 5 MI 2 20 0 1 1 1 Counter th MI 0 0 0 1 0 0 5th 6 10 Q D from 0 1 when from 190 Preset 1001 m O e Pressing m i 8 eps Aft
60. ca d ao manok 2 sommano gt my m T mo 18 Mnemonic F BIY b BY b SET b SET b HL SET b 1X d SET b Y d RES b Symbolit Opsrition 2 x fp gt HU 1 Xda 1 i 1 a ib 0 n RL 1 9 1Y ed Notes The notstion sp indicates bit b 0 to 2 or location s Fleg Notsuon BIT SET AND TEST GROUP xX 40 31 001 00 b iX 0 doi Of b 0 11 01 11 001 0 o 11 111 11 001 e e 11 001 dl b el xo xJo 11 001 b 91 9 6 11011 11 001 d o jo 1 111 11 001 d d flag sot altecred 1 159 91 X 7 Hag is unknown flag it alfected eccordin to tha result of the operation Flags Op Code 21 JUS mern 011 C8 0111 CB 80 101 00 911 CB 110 101 FD 011 CB 110 011 CB 011 110 101 00 011 C8 110 Oi 041 CB 110 Ho of T Xm oco ma To new Code replace 172 0 SET 5 1 with
61. cimal digit into the 7 segment display format 0678 ENTRO Convert two cala 7 o display format 0 O5F6 RAMCHK Check if the given address 165 in O5E4 Generate sound OSDE TONEIK Hana at 1K liz 0562 2 Generate sound at 2K Hz 4 4 5 2 5 1 Address 0624 Function Scan keyboard and display 1 cycle from right to left Execution time is about 10 9 97ms exactly Input IX points to the display buffer Output 1 If no then carry flag 1 2 If key in carry flag O and the position code of the key is stored in register See appendix Register Destroy A F B C D E Supplement 1 6 bytes are required for storiag 6 word patterns 2 IX points to the righimost word IX 5 points to tne leftmost word gt the rightmost word Display Buffer IX45 gt the leftmost word 3 See appendix for the relation between each bit and the seven segments 45 5 3 SCAN Address 05 Function Similar to SCAN1 except 1 SCAN1 scans one cycle but SCAN will scan till new key in 2 SCAN returns the position while SCAN returns the internal code of the key pressed see appendix A Input IX points to the display buffer Output Register A contains the internal code of the key pressed Register De
62. e keys you may change the program as follows 1 DISPLAY POSITION CODE 1800 2 ORG 180011 1800 00210019 3 LD OUTBF 1804 CD2406 4 LOOP CALL SCANI 1807 38FB 5 JR C LOOP 1809 210019 6 LD HL OUTBF 180C 07806 f CALE HEX7SG 80F 1873 B JR LOOP 9 EXAMPLE 4 Convert 3 continuous bytes into 7 segment display format display then 1900 1902 1903 110019 210319 0603 DD210319 CDFEOS 76 10 32 54 Store the results in 1903 1908 then DISPLAY 3 BYTES IN RAM 6 HEXA DIGITS LOOP 1 HEX7 SG SCAN ORG 1800H LD DE BYTEO LD HL OUTBF LD B 3 LD CALL 7 56 DE DJNZ LOOP CONVERSION COMPLETE BREAK FOR CHECK LD IX OUTBF CALL SCAN HALT ORG 1900H DEFB 104 DEFB 32H DEFB 54H DEFS 5 EQU 0678H EQU END The three bytes of binary data are stored 1900 1902 The user can set a break point at 180F to check if the conversion is correct before displaying the result A Er er DE EXAMPLE 5 Simulate police car siren The sound of a police car siren is simulated by alternating two different frequencies Register controls the frequency of the sound and register pair HL controls the length of the sound 1 POLICE CAR SIREN 1800 2 ORG 1800H 1800 0600 3 LOOP LD 6 0 1802 21 000 4 LD HL 1805 CDE405 5 CALL TONE 1808 OECO 6 LD 180 210001
63. e Listing III LOADING THE MACHINE LANGUAGE CODE You will now enter the machine language code shown in the assembly language listing Fig 0 1 If you haven t already done so connect your MPF I to the power source Now press the system reset key RS Section 3 1 1 of the reference manual contains a brief explanation of reset key actions Since the available RAM random access memory starts at hexa decimal location 1800 the entry of machine language code will start at 1800 Press the address key ADDR a random address will be displayed on the four leftmost digits these digits will be referred to as ELD DATA FIELD ADDRESS FI The address field Enter the starting address for the machine language code by pressing 0 0 same result can ob tained by pressing the program counter key this only works when your program starts at 1800H Now inform the Micro Professor that data is to be entered by pressing DATA Refer to line 2 of the assembly language listing Line 2 contains two bytes of machine lan guage code and 05 Key in the first byte by pressing and E The display should now show 1 o o ADDRESS FIELD DATA FIELD Advance the address field display by pressing The display will snow o 1 unknown data ADDRESS FIELD DATA FIELD Enter the second byte of hexadecimal data by pressing 0 then The display will now show 1 fe 0 1 105 ADDRESS FIELD D
64. elative address calculation Using the functions provided by the The user can develop his own special purpose microcomputer system based on 2 2 Notations Used This Manual 1 re seven segment LED seven segment display Hexadecimal number system and display format binary number decimal number hexadecimal number inc Ai N Sl Pa enm Number system Fig A run mm 2 Each display is assigned a number for reference purposes as shown Fig 2 2 123456 Fig 2 2 the display number 3 When the contents of the display are unknown or do not matter an will be indicated 4 square stands for a key button as shown in figure 2 3 Fig 2 3 Symbols for buttons 5 address stands for a memory address which is 4 hexadecimal digits entered by the user If more than four digits are entered the last four digits are accepted by MPF I If less than 4 digits are entered leading digits are assumed to be 0 6 lt data gt stands for 1 byte of data which is 2 digits entered by the user The rules are the same as for lt address gt 7 some key lt address gt or lt data gt is enclosed by e g lt address gt it may be omitted m m M
65. endix A EXAMPLE 2 Flash US Use routine SCAN1 to display HELPUS and blank alternately Display each pattern 500ms by looping SCANI o0 times FLASH HELP US 1800 2 ORG 1800 1800 212618 gt LD HL BLANK 1803 5 4 HL 1804 10212018 5 LD HELP 1808 DDE3 LOOP EX SP IX 1804 0632 T LD B 50 CD2406 8 HELFSEG CALL SCAN 180 10FB 9 HELT S EG 1811 1825 10 JR LOOP dks 5 2820 12 ORG 1820H 1820 13 HELP O 1821 B5 14 DEFB OBSH 1822 1 1o DEFB 1823 35 16 DEFB 085 a P 1824 17 DEFB O8FH 1825 37 18 DEFB 037H 1826 00 19 BLANK DEFB 1827 00 20 DEFB O 1828 00 21 DEFB 0 1829 00 22 DEFB 0 182A 00 23 DEFB 0 1828 00 24 DEFB 0 5 2 SCANI EQU 0624H 27 END The content of 180B determines the flash frequency You may change to any value EXAMPLE 3 Display 1800 1800 1804 1807 1804 1800 1900 1900 1901 1902 1903 1904 1905 00210019 CDF EOS 210019 CD7806 18F5 00 00 00 00 00 00 the Co ly m When a key 1 pressed is displayed the data field with Appendix key code of the key pressed DISPLAY INTERNAL CODE LOOP OUTBF SCAN HEX7SG ORG 1800H TA OU TBE SCAN HL OUTBF HEX7SG LOOP 1900H OSFER 0678H the internal code for that conmand The user may compare it If you want to display the position code of th
66. er key is pressed of 04 is high Qa becomes high and NMI becomes Low So CPU jump back to monitor progran execution due to nonmaskable interrupt PIO and CTC 011 CTC and 110 PIO are daisy chained has the higher interrupt priority Jet PIO IEO channel signals and PIO I O port are reserved on 2 edge connector for user future expansion APPENDIX 7 80 Programming reference My MREG SYSTEM ORO CONTROL RO WR RFSH WAIT CONYROL EN INT NMI RESEY GPU 8USRO BUS CONTROL 8USAK i 35V GNO 2 28 18 24 16 17 26 25 23 29 ADDRESS BUS 280 DATA BUS CPU PIN OUTS ALTERNATE REG SET GENERAL PURPOSE REGISTERS MEMOR Y REFRESH VECTOR SPECIAL PURPOSE REGISTERS 80 CPU REGISTER CONFIGURATION C 2 SUMMARY OF FLAG OPERATION 07 00 Instruction 2 VIN Comments AOD ADCs 1 PX JO amp bitadd add with carry SUB x SBC 3 CPs NEG 1 X 8 bit subtract subtract with carry compare and negate accumulator ANOs fit Ix P 0 ORs XOR t x ele lo Logical operations INC I It vO amp bitinccemen DEC xX e X VET 8 56 decrameni AOD 00 0 16 bit ADC HL 55 16 bit add
67. ess is displayed If the result exceeds decimal 127 or 128 the display becomes Err 29 A AA nn A A 3 3 5 Storing Data onto Key Cassette tape is a large capacity non volatile MPF I contains hardware and software storage medium drivers lt file name gt lt address gt lt add ress gt EXAMPLE DISPLAY prem 1185025 ma are store the data of 1800 18FF on tape use 1234 as file name COMMENTS is the mnemonic of filename filename 1234 S is the mnemonic of starting address Starting address 1800 is the mnemonic of ending address Ending address 18FF Connect the microphone of the tape recorder to 1 MIC Start recording by pressing PLAY and REC key of recorder Begin to output data During transfer the display is dark but the TONE OUT LED is on When transfer is completed the ending address is displayed 30 Description Pressing the display becomes F F means file name It is used to distinguish different data sets stored on a single cassette It 15 also used to read back data Press and the display becomes S represents the starting address of the data to be written Press again and the display becomes 2 E represents the ending address of the data to be written Before pressing you must connect the microphone of the recorder to MIC
68. fresh counter 8 b l value in range lt 0 255 gt nn 16 bit value in range lt 0 65535 gt C 3 3 BIT LOAD GROUP LD y EXT REGISTER REG INDIRECT INDEXED ADOR sree 1 ke M DE fi xsaliY d n op 2 REGISTER 0 t 6 OESTINATION REG RIBES 88 Zn am C 4 Symbalie LO rt 1 0 f lt LOr ro H1 LO 1X 34 LD 4 Y LO HU r LO 1 LO Y d 670 r LO H1 n 0 LO IY d n 801 BC LO A OE DE LO A inn nn 10 6 80 LO DEI 0 LD A R LO 1 A LONA RA Operation 8 B1Y LOAD GRON Hotes any of the registers A B 0 L IFF the content of the interrupt enabls is copied into the P Y Flag Notation 9 ileg ot affected 0 flag reset 1 Meg X flag unknow fleg 15 affecied according to the result of the opecation Op Code RE BEA 16 543 210 X p x X r 114 r 110 X 011 101 110 d X 113 101 r 110 4 X X 011 161 110 4 e 111 101 110 d X
69. he and keys are explained in section 3 1 4 3 2 1 respectively PROGRAM EXAMPLES Section 5 10 contains five programming examples Using the know ledge gained in exercise above enter the hexadecimal code shown in each program and then execute the program Perform the same steps with the MPF I Experiment Manual in Experiment 12 13 14 17 18 IF YOU MAKE AN ERROR 1 byte was incorrectly entered Write the correct over the in correct byte 2 One or more bytes were left out Read section 3 3 3 then remove the bytes one by one 3 One or more bytes need to be added Read section 3 3 2 then add each byte 4 To trace the execution of each instruction see section 3 2 2 Warning If you are not familiar with the concept of single stepping you will need to read this section several times You may find 1t necessary to consult additional learning material LEARNING AND EXPERIMENTING For self learning proceed to section III Section III con Lains a series of experiments Read the theory background of each experiment and then do the exercises If you do not understand parts of an experiment do not be discouraged of the experiments quite advanced You can refer to the MPF 1 Student Workbook VI 1 3 I USER S MANUAL TABLE CONTENTS MPP SBecITICO tIODS cursor a AR A 1 1 1 Hardware SDe5l Heal ODIS o crsa o dei ce Ronde
70. into REGister Mode The names and contents of the registers are displayed when the register Key is depressed To display a specific register first depress the REG Key then press the register name AF LY The two points under the Data field of register F notify USER to input Data into the Data field The two indication points move to the Data field of register A Register A is now changed to 12 register register Ls AAA A 14 description lt register name gt is the name of the register Each register is addressed by one key When is pressed the display becones prompting the user to key in the name After pressing register name the right field of the display the register mnemonic the left field is the register content For example 1234SP means the contents of the stack pointer is 1234 register name gt is a one key command the user wants to check several registers he just presses register name gt once for each register It is necessary to press or if the user wants to update the contents The change is done on a byte basis When C or is pressed the display will show two points notifying the user to input data and indicating that the register is being changed Pressing or will move the indication points in the direction shown in figure 3 1 name display Flags X X
71. ion 9 flag not allected 0 lag reset 1 gt sal X unknown gt flag affected according to the ryaull of the operation C 23 INPUT GROUP Ci m INPUT INC INPUT DESTINATION 3 7 nm gt PORT ADDRESS REG INDIR _ M INV INPUT amp tac HL Dec B _ 1 Inc HL REPEAT IF 870 REG NO INPUT 5 INDIR INPUT Dec HL Cec B REPEAT If OUTPUT GROUP SOUNCE IMMED REG IND OUTI OUTPUT REG Inc HL Dect QNOD OUTPUT inc HL A Dec B REPEAT iF BO HINO DUTD OUTPUT REG Oec Ht Dec B iun OFO R OUTPUT Der HL AEG Dec REPEAT IF BIO PORT OESTINATION ADORESS RLOCK INPUT COMMANOS to leo 59 BLOCK OUTPUT COMMANOS INPUT AND OUTPUT GROUP Op Code No of Mo of MM No of Y Mnemonic Operation 12 1 76 543 210 Hex N Bytes Cycies States Comments A In 011 o8 2 1 a to Ag wb x Act IN r CI r 0 10 101 101 2 3 12 Ag d 9 110 only 0 000 B10 Ag the Hags vall be affected INI C e t 101 101 2 4 16 Cto gt Ay 8 10 100 010 Bro Ag
72. llowing lines need to cut and jumpered if 6116 is inserted in 07 Cut l nes Jumped lines PIN 3 4 of Jumper PIN 4 5 of jumper 4 2 Input Output I O Address PIO D PIO 13 CA Fig 4 2 I O address map Description 1 8255 is programmable peripheral interface with 24 parallel 1 0 lines These 24 I O lines are divided into three 8 bit ports See 8255 data sheet for details 2 The control word of 8255 is 03 Port A is an input port ports and are output ports a Port A address 00 bit 7 tape input bit 6 connected to key active low bit 5 0 connected to 6 rows of the keyboard matrix The input signal becomes low only when keys in the active column are pressed b Port address 01 controls the seven segments and decimal point of the display Figure 4 3 shows the name of each segment and the corresponding bit in port B All output bits are active high BES ef cf d p c b a g e ZEN d p Fig 4 3 The corresponding bits of the 7 segment display 37 Port address 02 3 4 5 bit 7 tape output also connected to the speaker and the LED TONE OUT LED is turned on when output is 0 bit 6 monitor break control Any attempt to change this bit is forbidden bit 5 0 connected to 6 columns of display 4 keyboard matrix Bit O is the rightmost display bit 5 is the leftmost display All these bits are active high
73. mum clock rate MPF 1 system clock is 1 79 MHZ ROM Read Only Memory Single 5V EPROM 2516 2532 total 2K 4K bytes Monitor EPROM Address O000 07FF OPFFE RAM Random ccess Memory Static RAM 6116 total 2K bytes Basic RAM Address 1800 1FFF Memory Expansion Area Single 5V EPROM 2516 2716 2532 2732 EPROM or 6116 static RAM on Board Expansion Address 2000 2FFF I O Port Programmable I O Port 8255 a total 24 parallel I O lines are used for keyboard scanning and seven segment LED display con trol I 0 addresses 00 03 Programmable PIO a total of 16 parallel I O lines 1 0 address 80 83H Programmable CTC a total of 4 independent counter timers channels I O address 40 43 Display 6 digit 0 5 7 Segment red LED display Keyboard 36 keys including 19 function keys 16 hex decimal keys and 1 user defined key Speaker and Speaker Driver Circuits A 2 25 diameter speaker is provided for user s expansion 9 User Area 3 5 x 1 36 wire wrapping area is provided for user s expansion 10 Audio Tape Interface Can be connected to any cassette Data transmission rate 15 165 baud per second bps 11 System Clock Rate 3 58 MHz crystal is divided by 2 cycle time is 0 56 micro sec 12 System Power Consumption Single 5 power supply current consumption 500 m 13 Main Power Input Power adaptor Input 110 9V 500mA 14 Physical characteristics Height
74. nstruction r 21 i Description 1 2 3 5 5 7 8 It is illegal to set break points in ROM area If you do so the monitor will blank out the display one instruction has more than one byte a break point must be set at the first byte Otherwise errors will occur When the display is the Addr Data form and the address field is the break address six 1 points are set to indicate that the address 13 a break point contents of a break address can still be modified by key When the user s program executes to the break point the display 13 in the Addr Data form The address field the user s PC After program executed the break point all the status and registers are saved See 3 2 2 for stack rules Only one break point may be set 22 3 2 4 Clear Break Point Key the user want to eliminate the break point his proyram he can press to clear the break point This key 15 accepted at any time After pressing it the display wil Pe Break point is set to 3 2 5 Immediately Break When executing a program many errors may occur For example a program will lose control when the CPU executes a nonexistant operation code or when a program has an infinite loop Moni means monitor time you press this key the same mechanism as used by single step will transfer con
75. ogram in Use SBR to see the results of the execution address machine code instruction 1800 3E00 LD A 0 1802 3C INC A 1803 47 LD B A 1804 04 INC 1805 48 LD C B 1806 FB EI 20 DISPLAY COMMENTS UPF 1 RESET EA ERES El 1 8 0 0 x x Set Starting ADDR ls Pe 1800 Initialize Data Field 1830100 Increment Program Counter 1802257 Program Counter 1 8 0 2 4 7 Increment Program Counter 18040 4 Increment Program Counter 180548 Increment Program Counter 1806F B Increment Program Counter 1 8 0 6 F B Set Breakpoint at 1806 ac 1 9 1 8 0 0 3 E Program starts at 1800 1807 The program is executed from 1800 1806 The program halts at 1807 Note this is the ADDR of next instruction r EG To verify results use REG Key contents of the reg is correct F reg valve in the register are correct 0202BC lt lt reg C reg The interrupt Flip Flop is set 00011 This is the result of Enable Interrupt Change instruction from EI to La 1 8 0 6 DI Disable interrupt oun 1 8 0 6 F 3 Enter into Data field E 1 8 0 0 3 E Set starting ADDR of program 1807 Execute OOOOIF Check Note Bit has been reset result of DI i
76. ontenti BC is byte counter C 8 bKineman t EX DE HL AS AF EX SP HL SP IX EX SP IY LDI LDIR LDOR CPIR CPOR EXCHANGE GROUP AND BLOCK TRANSFER AND SEARCH GROUP Symbolic Ogaratinn DE HL AF AF C BC DE DE HL HL H ISP 1 L 16 IXH SP 1 45 Sprit IY ASP DE HL DE HL HL 9 8 1 DE HHL 1 HL HL 1 Repeat until BC 0 IDEI HL DEI HL HL OE HL DE DEN HL HL BC Repeat unii BC 0 HL HL HL 1 BC 8C1 HL HL 8C 1 Repeat until or BC 0 Rt HLI HL HL 1 8C 8 1 Repeat until HL or BC 0 Notes No of 543 210 Hex Bytes 101 011 1 001 000 08 011 001 OS 100 011 1 011 101 00 2 190 011 3 11t 101 FO 2 100 011 101 101 ED 2 100 000 AO 101 101 2 110 0001 2 10 11 101 101 ED 2 10 10 000 A8 010 11 101 101 ED 2 10 111 000 88 2 D 1 tt 191 101 0 2 10 100 001 D 9 11 101 101 ED 2 16 110 001 2 X 1 o 11 101 101 ED 2 10 101 001 9 lad 11 hr 10 101 2 10 11 001 B9 2 1 PIV flag is the result of 86 1 0 otherwise P V 1
77. ook on 2 80 assembly programming such as 280 Assembly Language Programming Manual published by Zilog Inc MANUAL In order to improve the functions and memory capacity of the we have changed the design of the MPF I slightly The changes are as follows The ROM chip mounted at board location U6 was upgraded to 2764 whose memory space is from 0000H to l7FFH Previously the ROM was 2732 with a address space from 0000H to OFFFH memory chips which be installed on board location U7 are of the following types 2716 2732 2764 or 6264 These changes are incorporated in the printed circuit board PCB of MPF I with version number 820010 9 or higher The PCB version number is printed in between U6 and the crystal oscillator on the PC board Please refer to the new schematic Giagrams for details READ FIRST The manuals that aeconoany your Micro Professor are designed for reference and to suggest xperiments showing examples get started itis suggested that you follow the proceedures given below UNPACKING AND INSTALLATION Open the hook containing the Micro Professor MPF I Locate the power connector in the upper cignt hand corner Art A Art Location of the MPF I power connector Find the AC adaptor The adaptor Art is a black box labeled AC ADAPTORH You should make certain that the voltage input shown on the adaptor matches the voltage supplied
78. rting and ending addresses are already stored the tape so there is no need to input them The user just needs to input the file name check 1 also recorded on the tape which MPF I will check when reading back not matched the display will Er r If matched the last input byte will be displayed data read from the tape is stored a system stack errors will occur Care must be taken when you prepare tape data tape data is echoed on the MPF I speaker so it is very easy to determine whether the tape is empty or not This allows you to check a tape before recording data on it so you do not destroy data that has been previously recorded 4 Software and Hardware Description 4 1 Memory ddress 0000 EPROM 2516 U6 07 FF 0800 OFFF 1000 L7FF 1800 2000 07 2516 2716 6116 2800 2FFE Fig 4 1 Memory map Description 1 U6 EPROM monitor 2 U7 RAM or EPROM reserved for expansion U8 RAM basic RAM of which 1FAF 1FFF are used by monitor Address lines are fully decoded MPF I Traces don t need to be cut or jumpers added on the PC board if 2516 2716 or 2532 are inserted in U7 a The following lines need to cut and jumpered if a 2732 is inserted in U7 Cut lines Jumped lines PIN 1 2 of jumper PIN 2 3 of jumper PIN 3 4 of jumper PIN 4 5 of jumper PIN 5 6 of jumper PIN 6 7 of jumper b The fo
79. stroy AF B HL DE a ee 5 4 HEX7 Address 0689 Function Convert a hexadecimal number into its 7 segment display format Input The least significant 4 bits of register contain the hexdecimal number O F Output The result is also stored in register Register Destroy AF only 47 5 5 HEX7SG Address 0678 Function Convert two hexa decimal numbers into 7 segment display format Input The first number is stored in the right 4 bits of A The second number is stored in the left 4 bits of Output The first display pattern is stored in HL the second is in HL is increased by 2 Register Destroy AF HL 48 5 6 Address O5F6 Function Check if the given address is tn RAM Input The address to check is in HL Output If it is in RAM then Zero flag 1 otherwise Zero flag 0 Register Destroy AF 49 5 7 Address 05E4 Function Generate sound Input 1 controls the frequency of the sound The period is about 44 Cx13 x2x0 56 micro sec the frequency 15 200 10 3xC KHz 2 HL contains the number of cycles max value is 32768 Output None Register Destroy AF B DE HL 5 8 Address 0505 Function Generate a sound of 1KHz Input Number of periods HL Output None Register Destroy AF
80. t pore 2n bit 6 s div Is Is 6 6 gs hexa digit or register name nn m nn 3 7 4 CIS a MOS ALSO PB8200110 SA 08 1 Sa 18 id 2 28 40 017 018 918 00 021 02 RS HOYE HS SBR MON RELA DEL CBR TAPE 5 INTA WR STEP DATA AF USER TAPE D RO 60 ADOR AF ec u ve 1 C e gt ah CM m xb gt cL f C 010 7 A ae c 2 General Description 2 1 Functions of Monitor Program The MPF I monitor provides the necessary functions for the user to develop his program These functions include 1 2 3 4 The ability to enter the user s program into RAM and to check and modify the program Execute the user s program which is stored beginning from the address on the displays Using Single Step or Set Break Point function the user execute programs step by step After each step control is transferred to the monitor and the current status of the CPU is saved user can check or modify registers and memory before executing the next step of the program This function 15 very useful in debugging a program Other support functions include audio tap control and r
81. the key the display becomes 5 S means the starting address of the data to be transfered After pressing the display becomes x x XX means the ending address of the data to be transfered Press again and the display becomes xx xx p D means the destination address of the data to be moved When finished the display is of the Addr Data form The address field is the last byte moved Movement can be upward or downward When moving upward the last address is the lower lirit of the destination area When moving downward the last address is the upper limit of the destination area as shown in figure 3 3 Because of the fast speed of the microcomputer the transfer be finished instantaneously After pressing the result will be displayed at once moving upward moving downward Fig 3 3 Function arrow indicates the first byte moved If the destination area overlaps the system stack the system stack will be destroyed The user Should pressed to reset the system TUN 26 3 3 2 Data Deletion This key is valid when the display is of the Addr Data form Pressing this key causes the data of the displayed address to be deleted 11 the data above this address is shifted down one position EXAMPLE Assume the present contents of RAM and the desired contents are as follows ADDRESS OLD DATA DATA AFTER DELETING 1800 00 00 1801 11 11 delete address
82. the MSB of the result is one P V Parity overflow flag Parity and overflow V share the same flag Logical operations affect this flag with the parity of the cetult white arithmetic operations affect this flag wiih Ihe overflow of the result If P V holds pacity P V 1 if the result ol the operation even P V 0 it result is odd If P V holds overflow P V 1 if the result of the operation produced an pveritow H Half carry H 1 it the add or subtract operation produced a carry into borrow from bit 4 of the accumuntos N Add Subtract lag N 1 if the previous Operation was a subtract and flags are used in conjuaction with the decimal adjust instruction to properly correct the result into packed BCD format following addition or subtraction using operands with packed BCO format The is affected according to Ihe result of the operation 5 The flag is unchanged by the operation 0 The flag is reset by the operation 1 The flag is set by the operation X The flag is a don t care V P N flag affected according to the overflow result of operation P P N flag affected according to the parity result of tha operation r Any one of the CPU register C D E L 3 Any 8 bit location fos all the addressing modes allowed for the particular instruction n Any 16 bit location for all the addressing modes allowed for that instruction Any one of the two index regisier IX IY Re
83. trol to the monitor Then User s PC and its contents are displayed When the HALT instruction is executed pressing will return control to monitor retrieve the contents of the new PC After is pressed the monitor will check the user s SP The rules are the same as for single step and break point EXAMPLE HALT and return to monitor KEY DISPLAY COMMENTS 1800 5 1800 7 6 Store HALT in 1800 CPU halts the display is blanked the LED HALT 15 turned on 1801 display is of the Addr Data form The address field is the user s PC All registers are reserved E EXAMPLE Pressing this key when monitor is being executed KEY DISPLAY COMMENTS The monitor is scanning the keyboard The system treats the monitor as the SYS SP user s program The user s SP 15 in the system Stack 3 3 Support Functions 3 3 1 Block Transfer Key lt address gt lt address gt lt address gt EXAMPLE Move the data 1800 18FF to 1810 190F KEY DISPLAY B E 1 B00 5 mem Mr X X X X d EET COMMENTS S 15 the mnemonic of starting address Starting address 1800 E is the mnemonic of ending address Ending address 18 D the of destination address Destination address 1810 Transfer completed the last byte moved is 1810 25 Description After pressing
84. ts of ADDR Oare6 o 0 0 0 0 06 Note Display format for ADDR ADDR DATA CEN 9 0 0 Li Data Bytes Address Bytes refer to Description for addition information I 12 O Note that the KEY 000100 increments the ADDR counter by ONE 0002 1 0 Contents of ADDR 0002 15 10 0003F E Contents of ADDR 0003 is FE EXAMPLE Change the contents of 1898 into AB 1801 into CD KEY DISPLAY COMMENTS 4 index points n ADDRESS field notify USER to input ADDRESS ADDR field enter 1800 by pressing the DR 1 8 0 0 appropriate KEYS DATA Pressing the data function 1 800 xx KEY allows the user to input data into DATA Field DATA field 11 SI H 1800 801 xx 5 OU er 1801 _ O a m ae 7 SS Enter into the DATA FIELD enter B into the Data field If DATA is more than two digits the last two will be used ADDR Feild increases one The 2 points in the DATA Field notify user ts Data Enter Data by pressing the C and D Keys 4XAMPLE Update the contents of 0000 KEY Bc 5 DISPLAY 00000 6 o COMMENTS ADDRESS 15 0000 The contents of ROM cannot be changed so the display is blanked After easing the Key the Display will return as before description Addr means address After pressing this key the display is in the standard format

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