GigaBee XC6SLX Series User Manual
Contents
1. i d trenz GigaBee XC6SLX Series User Manual 0 electronic Industrial Grade Xilinx Spartan 6 LX FPGA Micromodules Bud UM TEO600 v 1 02 18 June 2012 Trenz Electronic GmbH Overview e FPGA graphics Trenz Electronic GigaBee XC6SLX series are 0 Image processing industrial grade FPGA micromodules e P intellectual property cores integrating a leading edge Xilinx Spartan 6 IX e Low power design FPGA Gigabit Ethernet transceiver physical Parallel layer two independent banks of 16 bit wide S Faraile processing 128 MB DDR3 SDRAM 8 MB SPI Flash e Rapid prototyping memory for configuration and operation and e Reconfigurable computing powerful switch mode power supplies for all e System on Chip SoC development on board voltages A large number of configurable I Os is provided via robust board to board B2B connectors All this on a tiny footprint smaller than half a credit card at the most competitive price Hardware and software development environment as well as reference designs are available at www trenz electronic de Sample Applications e Cryptographic hardware module e Digital signal processing e Embedded educational platform e Embedded industrial OEM platform e Embedded system design e Emulation platforms o V S i Sekt LE Re LA J 2 JEN SE EE l J TAIWA o Fe a Si a Figure 1 GigaBee XC6SLX top view Figure 2 GigaBee XC6SLX bottom view Manual Key Features 2 34 U2. 12 of connector J2 can be used e Connect pin 81 of connector J1 VFS to power supply 3 3V pins 1 3 5 7 9 11 13 15 of connector J1 can be used e Program eFUSE using JTAG cable and iMPACT software e Remove power supply connections to VCCAUX and VFS e Restore ferrite bead L3 e Restore resistors R11 and R12 4 B2B Connectors Pin Descriptions This section describes how the various pins on B2B connectors J1 and J2 connects to TEO600 on board components There are five main signal types connected to B2B connectors 21 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin Descriptions UM TE0600 v 1 02 18 June 2012 e FPGA users signals e FPGA system signals Power signals e Ethernet PHY signals Other system signals 4 1 Pin Labelling FPGA user signals connected to B2B connectors are characterized by the B2B_Bx_Lyy_p naming convention where B2B defines a FPGA to B2B signal type e Bx defines the FPGA bank x bank number e Lyy defines a differential pair or signal number yy pair number e p defines a differential signal polarity P positive N negative single ended signals do not have this field Ethernet PHY signals use PHY_name naming conversions where PHY defines signal type PHY to B2B and name is PHY signal name Remaining signals use custom names 4 2 Pin Numbering Note that GigaBee XC6SLX have hermaphroditic B2B connectors A feat
3. 2 RoHS Restriction of Hazardous Substances compliance statement Trenz Electronic GmbH herewith declares that all its products are developed manufactured and distributed RoHS compliant 8 3 WEEE Waste Electrical and Electronic Equipment 32 34 Information for users within the European Union in accordance with Directive 2002 96 EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment WEEE Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately By the 13 August 2005 Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge Member States shall ensure the availability and accessibility of the necessary collection facilities Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment Presence of hazardous substances in electrical and electronic equipment results in potential
4. 44 B2B Bo ls P DIO c9 9 92mm 45 B2B B0 133 N DIO C10 5 66mm 46 B2B B0 134 N DIO A10 7 58mm 47 B28 Bo L33 P DIO D10 6 76mm 48 B2B_B0 L34 P DIO B10 8 60mm 40 ME ou 50 GND GND K 51 B2B BO L36 P DIO D11 6 76mm 52 B2BB0135N DIO A11 8 89mm 53 B2BB0136N DIO c12 5 87mm 54 B2B_B0 L35 P DIO CH 9 92mm 55 B2BB0149P DIO D14 6 96mm 56 B2B BO L37 N DIO A12 7 52mm 57 B2BB0149N DIO C14 5 96mm 58 B2B B0 L37 P DIO B12 8 74mm 59 EZE ou S a 60 GND GND 3 61 B2B BO L62 P DIO D15 7 44mm 62 B2B_B0_L38 N DIO A13 8 38mm 63 B2B BO L62 N DIO C16 6 95mm 64 B2BB0138 P DIO C13 9 87mm 65 B28 Bo Les P DIO E16 8 07mm 66 B2B BO L50N DIO A14 7 66mm 67 B2B BO L66 N DIO D17 6 96mm 68 B2B_B0_L50 P DIO B14 8 87mm co EZE ou a e 70 GND GND 71 B2B Bi L10 P DIO F16 9 56mm 72 B2B BO L51 N DIO A15 10 22mm 73 B2B_B1 L10 N DIO F17 8 85mm 74 B2B B0 L51 P DIO C15 10 67mm 75 B2BB1L9P DIO G16 10 59mm 76 B2B_B0 L63 N DIO A16 7 95mm 77 B2BB1L9N DIO G17 10 23mm 78 B2BB0L63P DIO B16 9 12mm 72 EZE cn 80 GND GND e 81 B2BB1121N DIO J16 13 22mm 82 B2BB0164N DIO A17 9 55mm 83 B2B Bi L21 P DIO K16 1441mm 84 B2B BO 164 P DIO C17 10 25mm 85 B2B_B1 L61 P DIO L17 14 89mm 86 B2B_B0_L65 N DIO A18 8 51mm 87 B2BB1161N DIO vun 1359mm 88 B2B B0L65P DIO B18 9 29mm s PND ou z 90 GND GND 2 26 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin
5. Descriptions UM TE0600 v 1 02 18 June 2012 Type FPGA Net Length pin J2 pin FPGA pin Net Length B2B_B1_L20_P 8 02mm JTAG C18 94 B2B_B1_L20 N DIO A21 7 82mm JTAG E18 r 96 B2B_B1_L19 P DIO B21 9 63mm JTAG A19 e 98 B2B B1L19N DIO B22 9 06mm JTAG G15 E 100 B2B_B1_L59 sio P19 27 19mm Table 11 J2 pin out 4 6 Signal Integrity Considerations Traces of differential signals pairs are routed symmetrically as symmetric pairs Traces of differential signals pairs are NOT routed with equal engt For applications where traces length has to be matched or timing differences have to be compensated Table 10 and Table 11 list the trace length of I O signal lines measured from FPGA balls to B2B connector pins Traces of differential signals pairs are routed with a differential impedance between the two traces of 100 ohm Single ended traces are routed with 60 ohm impedance An electronic version of these pin out tables are available for download from the Trenz Electronic support area of the web site 5 Difference in signal lines length is negligible for used signal frequency 27 34 www trenz electronic de GigaBee XC6SLX Series User Manual 5 Related Materials and References UM TE0600 v 1 02 18 June 2012 5 Related Materials and References The following documents provide supplementary information useful with this user manual 5 1 Data Sheets e Xilinx DS160 S
6. and zero resistor R79 is not populated 2 2 3 5 VCCAUX Power Rail It is derived from the 2 5V rail by a power line ferrite bead to supply e FPGA auxiliary circuits e J2 connector 2 2 3 6 VCCIOO Power Rail There are 4 options to supply this rail e from 3 3 V power rail if zero resistor R79 is populated and R65 R80 are not e from 2 5 V power rail if zero resistor R80 is populated and R65 R79 are not e from 1 5 V power rail if zero resistor R65 is populated and R79 R80 are not e from an external power source through J2 B2B connector pins 1 3 5 7 9 if none of R65 R79 and R80 are populated It supplies e FPGA bank 0 Veco e FPGA bank 1 Veco option Figure 6 show simplified schematic of power options Dashed resistors are not populated by default 2 Default assembling for VCCIOO rail 11 34 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 Figure 6 Power options diagram Table 3 summarizes power rails information power rail nominal maximum power system user name NETA current A source supply supply 2 4 Ji lt 1 2A 3 3V 3 3 e Ji J2 module J2 lt 1 2 A 3 3 option lt 2 1 option d Ji lt 0 3 A 2 5V 2 5 0 8 3 3V linear Ethernet 32 option DDR3 SDRAM 1 5V 1 5 1 0 3 3V switch VCCO 1 3 Ji lt 0 3 A VCCINT 1 2V 12 3 0 3 3V switch Ethernet Ji lt 0 6 A VCCAUX z lt 0 8 2 5V gt
7. bead FPGA J2 lt 0 3 A VCCCIOO 1 2 1 5 1 8 2 5 3 3 0 9 J2 VCCO 0 J2 lt 0 9 A Table 3 On board power rails summary 2 3 Power Supervision 2 3 1 Power on Reset During power on the RESET line is first asserted Thereafter the supply voltage supervisor monitors the power supply rail 3 3V and keeps the RESET line active low as long as the supply rail remains below the threshold voltage 2 93 volt An internal timer delays the return of the RESET line to the inactive state high to ensure proper system reset prior to a regular system start up The typical delay time t4 of 200 ms starts after the supply rail has risen above the threshold voltage 12 34 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 Figure 7 Reset on power on After this delay the RESET line is reset high and the FPGA configuration can start When the supply rail voltage drops below the threshold voltage the RESET line becomes active low again and stays active low as long as the rail voltage remains below the threshold voltage 2 93 volt Once the rail voltage raises again and remains over the threshold voltage for more than the typical delay time ty of 200 ms the RESET line returns to the inactive state high to allow a new system start up Figure 8 Reset on power drop 2 3 2 Power Fail 13 34 GigaBee XC6SLX integrates a power fail
8. programmed in several ways e Direct SPI programming via J1 connector e Indirect SPI programming via FPGA pins controlled by JTAG e Direct SPI programming by FPGA using SPI core Serial flash is connected to FPGA bank 2 and B2B connector J1 used pins are listed in Table 8 Flash signal FPGA pin J1 pin CS T5 87 CLK Y21 91 DI IOO AB20 95 DO IO1 AA20 93 WP 102 U14 99 HOLD IO3 U13 97 Table 8 Serial flash signals connection 2 8 Ethernet 18 34 The board contains a Marvell Alaska Ethernet PHY chip 88E1111 operating at 10 100 1000 Mb s The board supports GMII interface mode with the FPGA Configuration details e PHY address 00111 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 e Advertise pause e Auto Neg e Advertise all caps e Prefer slave e Auto crossover e 125clk enabled e GMII to copper e Fiber auto detect disabled e Sleep mode disabled Ethernet signals from PHY are connected to B2B connector J1 To use Ethernet in your design GigaBee module should be connected to the carrier board which have Ethernet magnetics and RJ45 connector TEO603 carrier board can be used to access Ethernet capabilities of GigaBee XC6SLX series modules 2 9 Oscillators The module has one 25 MHz oscillator for Ethernet PHY U9 Ethernet PHY provides clock multiplication and resulting 125 MHz clock acts as a sy
9. 012 06 18 FDR Removed junction temperature limits under connector current ratings 34 34 www trenz electronic de GigaBee XC6SLX Series User Manual
10. 11 7 52mm 51 B2BB2145P DIO AAs 11 053mm 52 B2B_B2 142P DIO v11 8 36mm 53 ME cx 54 GND GND 8 55 B2B B2143N DIO AB9 1375mm 56 B2B_B2 118P DIO v13 7 94mm 57 B2B 82 143 P DIO Y9 12 97mm 58 B2B B2118N DIO w13 6 96mm 59 B2B B2 L4 N DIO AB10 10 33mm 60 B2BB218N DIO U16 9 92mm 61 B2B B2 L41 P DIO AMO 11 01mm 62 B2B B2 L8 P DIO U17 9 94mm o SO cx E 64 GND GND d z 65 B2B_B2 L21 P DIO Y15 1312mm 66 B2B_B2_111_P DIO v17 8 31mm 67 B2BB2121N DIO AB15 1237mm 68 B2B_B2 L1 N DIO w17 7 29mm 69 B28B2L15P DIO Y17 1420mm 70 B2BB216P DIO w18 7 40mm 71 B2BB2115N DIO AB17 1377mm 72 B2BB2L6N DIO Y18 6 94mm 73 GND 74 GND GND 75 SIO AB12 1230mm 76 B2B B2L5 P DIO Y19 6 18mm 77 SYS N15 19 23mm 78 B2B B2L5N DIO AB19 6 12mm 79 CONFIG R17 80 B2B B2L9N DIO v18 8 43mm 81 CONFIG P16 82 B2BB2L9P DIO v19 8 36mm 83 CONFIG P15 y 84 GND GND E E 85 SYS T19 1415mm 86 B2B B2L4N DIO 117 11 88mm 87 SPI T5 a 88 B2B_B2L4 P DIO T18 11 96mm 89 GND a 90 GND GND 24 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin Descriptions UM TE0600 v 1 02 18 June 2012 Type FPGA pin Net Length J1 pin FPGA pin Net Length SIO Y12 13 58mm B2B_B2_L10_N DIO R15 17 01mm SPI AB20 96 B2B_B2_L10_P DIO R16 1
11. 3 K logic cells industrial grade e XC6SLX100 2F GG484C 101 K logic cells commercial grade XC6SLX100 2FGG4841 101 K logic cells industrial grade e XC6SLX150 2F GG484C 147 K logic cells commercial grade XC6SLX150 2FGG4841 147 K logic cells industrial grade 10 100 1000 Gigabit Ethernet transceiver physical layer Marvell Semiconductor 88E1111 2 x independent 16 bit wide data bus 1 Gigabit 128 megabyte DDR3 SDRAM 64 megabit 8 megabyte serial Flash memory with dual quad SPI interface 48 bit node address chip Maxim Integrated Products DS2502 E48 2 x fine pitch 0 5 mm 100 pin high speed up to 10 0 GHz 20 Gbps hermaphroditic strips LSHM 150 04 0 L DV A S K TR Up to 52 differential FPGA input output pins available on B2B strips Up to 109 single ended 1 dual purpose FPGA input output pins available on B2B strips Ethernet PHY JTAG and SPI pins available on B2B strips 3 0 A high efficiency DC DC switching regulator for power rail 1 2V 1 0 A high efficiency DC DC switching regulator for power rail 1 5V 800 mA DC DC linear regulator for power rails 2 5V and VCCAUX Processor supervisory circuits with power fail and watchdog Texas Instruments TPS3705 33 125 MHz clock signal system user Footprint for custom single ended oscillator option 1 x LED user Power supply voltage 3 3 V Power supply source board to board interconnect e g carrier board Dimensions 50 mm x 40 mm 20 cm Minimum modu
12. 6 97mm SPI U13 98 B2B_B2_L2_N DIO AB21 5 06mm SPI U14 100 B2B_B2_L2 P DIO AA21 6 19mm Table 10 J1 pin out 25 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin Descriptions UM TE0600 v 1 02 18 June 2012 4 5 J2 Pin out FPGA Net Length J2 pin FPGA pin Net Length POW POW POW 7 POW POW POW POW 5 POW POW CONFIG POW CONFIG sio A4 9 017mm 15 B2B_B3 L60 N DIO B1 5 44mm 16 PFI TE 17 B2B B3 L60 P DIO B2 5 27mm 18 MR TE mm Em POW a e 20 GND GND 21 B2B 83 19 n DIO T3 19 36mm 22 B2BB012P DIO c5 10 17mm 23 B2BB3L9P DIO T4 18 76mm 24 B2B BOL2N DIO A5 9 60mm 25 B2BB013P DIO D6 6 76mm 26 B2BBOLAN DIO A6 7 65mm 27 B2B BOL3N DIO C6 5 66mm 28 B2B BO LAP DIO B6 8 71mm 29 ME ou y 30 GND GND i A 31 B2B_B3 59 P DIO J7 11 90mm 32 B2B B0 L5 N DIO A7 8 59mm 33 B2B_B3 L59N DIO H8 11 71mm 34 B2B BOL5 P DIO c7 9 54mm 35 B2B_B0 L32 P DIO D7 6 93mm 36 B2BB0L6N DIO AS 7 42mm 37 B2BB0132N DIO D8 6 87mm 38 B2B_BO_L6 P Do B8 8 43mm 39 EZE GND e 3 40 GND GND 3 41 B2B BOL7N Do C8 6 62mm 42 B2BB018N DIO A9 9 28mm 43 B2B_BOL7 P Do D9 6 71mm
13. DV A N Current Rating per Contact 30 Deg Rise 20 Derated 1 1 Amps Room Temp 21 1C Maximum Current Amp per Conta ct 140 Ambient Temperature C Figure 13 Current carrying capacity chart 8 4 pairs contacts in linear series 17 34 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 2 5 EPROM More details can be found in the Samtec Razor Beam LSHM series overview Design Verification Test Report GigaBee XC6SLX board contains a Maxim DS2502 E48 node address chip with factory programmed valid MAC 48 address and 768 bits of OTP EPROM memory for user data Address chip provide convenient data access through 1 Wire interface up to 16 3 kbps FPGA pin T11 More information can be found in the Maxim DS2502 E48 product overwiew 2 6 DDR3 SDRAM Memory The board contains two 1 Gb 128 MB DDR3 SDRAM chips Data width of each chip is 16 bit With data bus connected in parallel chips can act as 32 bit memory DDR3 memory connected to FPGA bank 1 and FPGA bank 3 2 7 Flash Memory GigaBee XC6SLX board contains 64 Mb 8 MB serial flash memory chip Winbond W25Q64BV U11 This serial flash chip can operate as general SPI memory mode and in double or quad modes Usage of dual and quad modes increase bandwidth up to 40 MB s For more information see Winbond W25Q64BV product owerview Flash can be
14. M TE0600 v 1 02 18 June 2012 Industrial grade Xilinx Spartan 6 LX FPGA micromodule LX45 LX100 LX150 10 100 1000 tri speed Gigabit Ethernet transceiver PHY 2 x 16 bit wide 1 Gb 128 MB DDR3 SDRAM 64 Mb 8 MB SPI Flash memory for configuration and operation accessible through B2B connector SPI direct FPGA JTAG port SPI indirect FPGA configuration through e B2B connector e JTAG port e SPI Flash memory Plug on module with 2 x 100 pin high speed hermaphroditic strips Up to 52 differential up to 109 single ended 1 dual purpose FPGA I O pins available on B2B strips 3 0 Ax 1 2 V power rail 1 0 Ax 1 5 V power rail 125 MHz reference clock signal Single ended custom oscillator option eFUSE bit stream encryption LX100 or larger 1 user LED Evenly spread supply pins for good signal integrity Other assembly options for cost or performance optimization available upon request www trenz electronic de GigaBee XC6SLX Series User Manual UM TE0600 v 1 02 18 June 2012 Table of Contents NR wt EE TE nennen 5 EA een 5 k2 DIMENSION EE 6 1 3 Power ON O id ee D 2 Detailed TOS Gi TN EE 8 2 3 BIKE DIM ricardo diles 8 A A A A 8 2 2 1 Power SUPpDly SUITES need 9 2 2 2 FPGA banks VCCIO power TUE 9 22 9 ONO PONE E 10 2 a POWE SP EE 12 2 Nee 12 2 S92 POWE A seein Ena ded oaincla a a 13 2 ABRO DO COMO ac ee 14 2 leegen dalla lap a 16 2 4 2 Connector lo PE A Se cee Sase tice cada ocenssutetiec cipcer
15. X board must be powered at least in one of the following two ways e through B2B connector J1 pins 1 3 5 7 9 11 13 15 e through B2B connector J2 pins 2 4 6 8 10 12 We recommend to supply the module with all these 14 pins When one or more of these pins are not power supplied it or they can be used as power source for user applications Please make sure that your logic design does not draw more RMS current per pin than specified in section 2 4 Board to board Connectors 2 2 2 FPGA banks VCCIO power supply FPGA VCCIO power options shown in Table 2 Default values for configurable voltages shown in braces Bank Supply voltage BO VCCIO 0 3 3 V B1 VCCIO 1 1 5 V B2 3 3 V B3 1 5 V Table 2 FPGA banks VCCIO power supply Bank 0 power supply VCCIO O can be configured by user to 3 3 V 2 5 V or 1 5 V see Chapter 2 2 3 6 VCCIOO Power Rail Bank 1 VCCIO supply voltage is configured to 1 5 V to communicate with DDR3 SDRAM memory chip 1 By special request modules can be supplied without DDR3 SDRAM chips Contact Trenz Electronic support for details 9 34 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 2 2 3 On board Power Rails GigaBee XC6SLX has the following power rails on board 2 2 3 1 3 3V Power Rail It is the main internal power rail and must be supplied from an external power source It supplies the othe
16. can be used to estimate usable system bandwidth in a typical two level signalling environment mated height single ended signalling es GC eg differential pair signalling u Se F er Table 7 Connectors speed rating More details can be found in the Samtec Razor Beam LSHM series overview High Speed Characterization Reports 2 4 2 Connector Current Rating Samtec provides current rating data for the Samtec Razor Beam LSHM connector system The chart reported in Figure 12 gives current ratings for temperatures up to 125 C when two opposite pins carry the same current www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 TC0923 2523 22x1 Contacts in Linear series Part Numbers LSHM 50 06 0 L DV A NLSHM 50 06 0 L DV A N Current Rating per Contact 30 Deg Rise 20 Derated 2 0Amps 7 0 Room Temp 22 2 C e o a o 125 C Limit Sei o N o Maximum Current Amp per Contact gt o 4 o 20 40 60 80 100 120 140 Ambient Temperature C Figure 12 Current carrying capacity chart 2 1 pair contacts in linear series The chart reported in Figure 13 gives current ratings for temperatures up to 125 C when 4 contiguous pins and their opposites carry the same current TC0923 2523 8 2X4 Contacts in Linear series Part Numbers LSHM 50 06 0 L DV A NLS HM 50 06 0 L
17. comparator which can be used for low battery detection power fail warning or for monitoring a power supply other than the main supply 3 3 V When the voltage of the PFI power fail comparator input input pin 16 of connector J2 line drops below 1 25 volt the PFO power fail comparator output FPGA pin A2 label IO_L83P_3 line becomes active low The user application can sense this line to take action To set a power fail threshold higher than 1 25 volt the user can implement a simple resistive voltage divider on the carrier board www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 2 4 Board to board Connectors 14 34 GigaBee XC6SLX mounts two Samtec Razor Beam LSHM connectors J1 and J2 on the bottom side Each connector features the following characteristics e rows per connector 2 e contacts per row 50 e contacts per connector 100 e connector gender hermaphrodite e pitch 0 50 mm 19 7 mil 0197 e mated height min 5 0 mm typ 8 0 mm max 12 0 mm e mating force min 39 N typ 59 N max 62 N e un mating force min 49 N typ 73 N max 74 N Figure 9 Samtec Razor Beam LSHM connector The overall number of connector contacts on the GigaBee XC6SLX is 200 Samtec Razor Beam LSHM is a high speed interconnect system with very fine pitch 50 mil and low profile design Razor Beam connectors are well suited for high speed applicatio
18. ed to could result in damage to the product or loss of important data Do not proceed beyond a WARNING notice until the indicated conditions are fully understood and met A CAUTION notice denotes a risk It calls attention to an operating procedure practice or the like that if not correctly performed or adhered to could result in a fault undesired condition that can lead to an error Do not proceed beyond a CAUTION notice until the indicated conditions are fully understood and met API application programming interface B2B board to board DSP digital signal processing digital signal processor EDK Embedded Development Kit IOB input output blocks I O blocks IP intellectual property ISP In System Programmability OTP one time programmable PB push button SDK Software Development Kit TE Trenz Electronic XPS Xilinx Platform Studio 30 34 www trenz electronic de GigaBee XC6SLX Series User Manual 7 Legal Notices UM TE0600 v 1 02 18 June 2012 7 Legal Notices 7 1 Document Warranty The material contained in this document is provided as is and is subject to being changed at any time without notice Trenz Electronic does not warrant the accuracy and completeness of the materials in this document Further to the maximum extent permitted by applicable law Trenz Electronic disclaims all warranties either express or implied with regard to this document and any information contained herein including but not limited t
19. effects on the environment and human health The symbol www trenz electronic de GigaBee XC6SLX Series User Manual 8 Environmental protection UM TE0600 v 1 02 18 June 2012 consisting of the crossed out wheeled bin indicates separate collection for waste electrical and electronic equipment 33 34 www trenz electronic de GigaBee XC6SLX Series User Manual Document Change History UM TE0600 v 1 02 18 June 2012 Document Change History ver date author description 0 01 2011 10 01 AIK Release 0 02 2011 10 05 AIK Added B2B pin out section 0 03 2011 10 06 AIK Reformatted pin out tables Added eFUSE programming section 0 04 2011 10 06 AIK Added board photos Additions to eFUSE section 0 05 2011 10 06 AIK Removed net length information for nets which can t be measured right 0 06 2011 10 06 AIK Added power consumption section 0 07 2011 10 08 AIK Little fixes after FDR audit 0 08 2011 10 12 AIK Fix in eFUSE section 0 09 2011 11 11 AIK Added pin numbering description for B2B connectors 0 10 2012 01 20 AIK Added pin compatibility note and manual reference 0 11 2012 04 12 AIK Added FPGA banks VCCIO voltages table 1 00 2012 04 17 FDR Updated documentation link Replaced obsolete ElDesI and RedMine links with current GitHub links Updated dating convention 1 01 2012 05 18 AIK Corrected cross reference in section 3 2 Corrected LED description 1 02 2
20. eseendeae dee 16 ZVEFR N EE 18 2 6 DDR3 ABRA MEMO sis 18 EE 18 2 0 EEMO A oh E AE EE E E E A 19 El e 19 210 O ie een 19 A a taster ete a 19 EA A ee ee 21 TAS OO nennen 21 so Pe 21 SN e isa aiii 21 4 B2B Connectors Pin Wl ii A A A A A a AA 22 PA ea ee ree ee 22 42 Fi NMR un EE 22 A cease E S a eee 22 0 IV 2 1 2 E 24 e EE E 26 3 6 Signal ae e EE 27 5 Related Materials and t sii nnaiae 28 SDAI SNET Eelere E a A A A 28 5 2 Documentation Archives ea sn 28 SS Sr EE 28 5 4 Designand Development TOOS iia ee 29 O Sole na ne ee ee 29 AA O Up auavaiaadeasunlaaiecateiabtass OAT rE 29 6 Glossary of Abbreviations and ACTOS dista 30 Z Legal NOtiCES nn ee 31 7 1 Document VI E 31 2 2 LINE ot NN ee ee ee 31 A e near EN 4A Technology AAA PS gman peed ee eee eae 31 8 Environmental POE HO nr eebe 32 8 1 REACH Registration Evaluation Authorisation and Restriction of Chemicals 4 34 UM TE0600 v 1 02 18 June 2012 compliance statement lu an NEE a E E E ee nes 32 8 2 ROHS Restriction of Hazardous Substances compliance staiement 32 8 3 WEEE Waste Electrical and Electronic Equipment resssseinunnn 32 Document Change HEY anne 34 www trenz electronic de GigaBee XC6SLX Series User Manual 1 Technical Specifications UM TE0600 v 1 02 18 June 2012 1 Technical Specifications 1 1 Components 5 34 Xilinx Spartan 6 LX FPGA e XC6SLX45 2F GG484C 43 K logic cells commercial grade XC6SLX45 2FGG4841 4
21. l 8 Environmental protection UM TE0600 v 1 02 18 June 2012 8 Environmental protection To confront directly with the responsibility toward the environment the global community and eventually also oneself Such a resolution should be integral part not only of everybody s life Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space That is why Trenz Electronic invests in the protection of our Environment 8 1 REACH Registration Evaluation Authorisation and Restriction of Chemicals compliance statement Trenz Electronic is a manufacturer and a distributor of electronic products It is therefore a so called downstream user in the sense of REACH The products we supply to you are solely non chemical products goods Moreover and under normal and reasonably foreseeable circumstances of application the goods supplied to you shall not release any substance For that Trenz Electronic is obliged to neither register nor to provide safety data sheet According to present knowledge and to best of our knowledge no SVHC Substances of Very High Concern on the Candidate List are contained in our products Furthermore we will immediately and unsolicited inform our customers in compliance with REACH Article 33 if any substance present in our goods above a concentration of 0 1 weight by weight will be classified as SVHC by the European Chemicals Agency ECHA 8
22. le height 8 mm without connectors Maximum height on carrier board surface 13 mm standard connectors www trenz electronic de GigaBee XC6SLX Series User Manual 1 Technical Specifications UM TE0600 v 1 02 18 June 2012 e Minimum height on carrier board surface 5 mm standard connectors e Weight 17 2 0 1g e Temperature grades e commercial C type FPGA device e industrial I type FPGA device 1 2 Dimensions 8 A A J J J J Figure 3 GigaBee board dimensions top view GigaBee XC6SLX can reach a minimum vertical height of about 8 mm if B2B connectors are not assembled The maximum component height on the module board on the top side is about 3 5 mm The maximum component height on the 1 Technical Specifications UM TE0600 v 1 02 18 June 2012 module board on the bottom side is about 3 0 mm The typical minimum and maximum height from the carrier board surface of a GigaBee XC6SLX when it mounted on a carrier board is respectively about 5 0 mm and about 13 mm GigaBee XC6SLX has 4 mounting holes one in each corner The module can be fixed by screwing M3 screws ISO 262 onto a carrier board through those mounting holes GigaBee XC6SLX weighs between 17 1 and 17 3 g with standard connectors 1 3 Power Consumption 7 34 Power consumption of GigaBee XC6SLX modules highly depend on the FPGA design implemented Some typical power consumptions are provided in Table 1 for the following reference s
23. ns with performance up to 11 5 GHz 23 Gb s at 3 dB insertion loss Razor Beam contacts are ideal for high speed and rugged applications featuring undercut retention notches that increase the withdrawal force and provide an audible click when the contacts engage In addition the self mating hermaphroditic design can help reduce inventory costs The LSHM Series features also optional shielding for EMI protection default on GigaBee XC6SLX Samtec Razor Beam LSHM connectors are keyed On the bottom side of the GigaBee XSL6 the connectors are assembled in such a way to prevent the 144 wwmtrenzelectronicde GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 15 34 module to be reverse mounted on carrier boards Samtec Razor Beam LSHM are available in different lead styles see Table 4 for details 02 5 3 95 1 00 03 0 4 45 1 50 04 0 5 45 2 50 06 0 7 45 4 50 Table 4 Samtec Razor Beam LSHM lead styles Figure 10 A and B features of Samtec Razor Beam LSHM series MATED LSHM HEIGHT gL Figure 11 Definition of mated height for Samtec Razor Beam LSHM series The standard connector mounted on the GigaBee XC6SLX is Samtec Razor Beam LSHM 150 04 0 L DV A S K TR lead style 04 0 tail option vertical shield option with shield Trenz Electronic recommends the same part as mating connector due to its self mating capability The Samtec Razor Beam LSHM se
24. o the implied warranties of merchantability fitness for a particular purpose or non infringement of intellectual property Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing use or performance of this document or of any information contained herein 7 2 Limitation of Liability In no event will Trenz Electronic its suppliers or other third parties mentioned in this document be liable for any damages whatsoever including without limitation those resulting from lost profits lost data or business interruption arising out of the use inability to use or the results of use of this document any documents linked to this document or the materials or information contained at any or all such documents If your use of the materials or information from this document results in the need for servicing repair or correction of equipment or data you assume all costs thereof 7 3 Copyright Notice No part of this manual may be reproduced in any form or by any means including electronic storage and retrieval or translation into a foreign language without prior agreement and written consent from Trenz Electronic 7 4 Technology Licenses The hardware firmware software described in this document are furnished under a license and may be used modified copied only in accordance with the terms of such license 31 34 www trenz electronic de GigaBee XC6SLX Series User Manua
25. partan 6 Family Overview This overview outlines the features and product selection of the Spartan 6 family http www xilinx com support documentation data_sheets ds160 pdf e Xilinx DS162 Spartan 6 FPGA Data Sheet DC and Switching Characteristics This data sheet contains the DC and switching characteristic specifications for the Spartan 6 family http www xilinx com support documentation data_sheets ds162 pdf e Samtec Razor Beam LSHM series overview http www samtec com LSHM e Maxim DS2502 E48 product overview http www maxim ic com datasheet index mvp id 3748 e Winbond W25Q64BV product overview http www winbond com tw hq enu ProductAndSales ProductLines FlashMe mory SerialFlash W25Q64BV htm 5 2 Documentation Archives e Xilinx Spartan 6 Documentation http www xilinx com support documentation spartan 6 htm e Xilinx Documentation http www xilinx com documentation http www xilinx com support documentation e Trenz Electronic GigaBee Series Documentation http docs trenz electronic de Trenz_Electronic products TEO600 GigaBee_series 5 3 User Guides e Xilinx UG380 Spartan 6 FPGA Configuration User Guide This all encompassing configuration guide includes chapters on configuration interfaces serial and parallel multi bitstream management bitstream encryption boundary scan and JTAG configuration and reconfiguration techniques http www xilinx com support documentation user_guides ug380 pdf e Xilin
26. r following power rails e 1 2V 3 A on board high efficiency switching voltage regulator e 1 5V 1 A on board high efficiency switching voltage regulator e 2 5V 0 8 Alinear voltage regulator e VCCIOO power rail option if zero resistor R80 is not populated and zero resistor R79 is populated It supplies also e module supervisory circuits with power fail and watchdog e FPGA input output bank 2 e serial Flash memory 48 bit node address chip e differential oscillator at 200 MHz option e Ethernet oscillator at 25 MHz e user LED 2 2 3 2 1 2V Power Rail It is converted from the 3 3V rail by a switching voltage regulator and can provide up to 3 0 A to e FPGA Vecint power supply pins e Ethernet PHY e J1 connector 2 2 3 3 1 5V Power Rail 10 34 It is converted from the 3 3V rail by a switching voltage regulator and can provide up to 1 0 A to e DDR3 SDRAM e Vref1 Vref2 DDR3 SDRAM reference voltages e FPGA bank 1 VCCO if zero resistor R64 is populated and zero resistor R65 is not populated e FPGA bank 3 Veco e J1 connector www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 2 2 3 4 2 5V Power Rail It is converted from the 3 3V rail by a linear voltage regulator and can provide up to 0 8 Ato e VCCAUX power rail e Ethernet physical layer e J1 connector e J2 connector option if zero resistor R80 is populated
27. ries offers a variety of mated heights form 5 0 mm to 12 0 mm Two mated standard GigaBee XC6SLX connectors have a typical mated height of 8 0 mm Processing conditions will affect the following 15 34 wwmtrenzelectronicde GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 heights standard connector mating connector mated height min height from max height on lead style lead style mm carrier board mm carrier board mm 04 0 02 5 6 5 z 3 5 z 11 5 04 0 03 0 7 0 4 0 x 12 0 04 0 04 0 8 0 5 0 13 0 04 0 06 0 10 0 7 0 x 15 0 Table 5 Samtec Razor Beam LSHM mated heights Ordering codes for connectors J1 and J2 used in GigaBee XC6SLX board and their mating connectors are given in Table 6 lead style gender Samtec Trenz Electronic 02 5 hermaphroditic LSHM 150 02 5 L DV A S K TR 23836 03 0 hermaphroditic LSHM 150 03 0 L DV A S K TR 23837 04 0 hermaphroditic LSHM 150 04 0 L DV A S K TR 23838 06 0 hermaphroditic LSHM 150 06 0 L DV A S K TR 23839 Table 6 Ordered codes of recommended B2B connectors 2 4 1 Connector Speed Rating Samtec provides speed rating data for the Samtec Razor Beam LSHM connector system The data presented in Table 7 are applicable only to the maximum and minimum mated heights The speed rating is based on the 3 dB insertion loss point of the connector system The 3 dB point
28. ription UM TE0600 v 1 02 18 June 2012 One way to reach this goal is to leave FPGA pin V9 label IO_L5ON_2 undeclared in user constrains file UCF and set unused IOB pins to float in the Xilinx Project Navigator options see Fig 14 Project properties gt Configuration options gt Unused IOB Pins gt Float ES Process Pro perties Configuration Options Category General Options Configuration Options Property Name Wale Startup Options Conf tion Rat a w Readback Options Sun I Dee Encryption Options Configuration Clk Configuration Pins Pull Up Configuration Pin MO Pull Up Configuration Pin Mi Pull Up Configuration Pin MA Pull Up Configuration Pin Program Pull Up Configuration Pin Done Pull Up Configuration Pin Init Pull Up Configuration Pin CS Pull Up Configuration Pin Din Pull Up Configuration Pin Busy Pull Up Configuration Pin Adar Pull Up JTAG Pin TCK Pull Up JTAG Pin TDI Pull Up JTAG Pin TOO Pull Up JTAG Fin TMS Full Up Unused IDB Pins Pull Down UserlD Code 8 Digit Hexadecimal DEI Update Mode Pull Up Float Property display level Advanced ze Figure 14 Unused IOB Pins option selection In the standard assembly the WDO watchdog output line is left unconnected and the only possibility to reset the module is by driving the MR master reset line active low
29. round pin All must be connected Trenz Electronic specific pin type See the description of each pin in the user manual for additional information on the corresponding signals Power signals 4 DIO pins can be used as SIO 23 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin Descriptions 4 4 J1 Pin out FPGA pin Net Length J1 pin UM TE0600 v 1 02 18 June 2012 FPGA pin Net Length POW GND E POW PHY POW PHY A 8 POW GND z POW PHY a POW PHY E F POW PHY A POW PHY E e PHY PHY E PHY GND E 8 PHY PHY E e PHY PHY o PHY GND PHY TE E p GND CONFIG T6 gt B2B_B2 L57 N DIO SIO AB11 8 12mm 3 B2B 82 157 P DIO AM 9 84mm 34 GND p E 35 B2B B2149N DIO AB6 8 66mm 36 B2B B2 Leo P DIO 17 9 96mm 37 B2B 82 149P DIO AAG 9 58mm 38 B2B B2L60N DIO R7 11 16mm 39 POW 3 a 40 B2B B2159N DIO R8 11 42mm 41 POW f 42 B2B_B2 159 P DIO R9 11 36mm 43 POW 44 GND GND A 8 45 B2B_B2_L48 N DIO AB7 9 98mm 46 B2B B2144N DIO Y10 11 34mm 47 B2B B2 L48 P DIO Y7 10 98mm 48 B2B B2144P DIO w10 10 21mm 49 B2B B2 L45 N DIO ABB 10 60mm 50 B28 B2 La2 N DIO w
30. stem and user clock for the FPGA FPGA input pin AA12 The module also provides the footprint for custom 3 3 V single ended oscillator U12 which can be installed as an option FPGA input pin Y13 2 10 User LED The module contains one user active low LED connected to FPGA output pin T20 To access more LEDs use a carrier board and drive FPGA signals connected to B2B connectors As LED connected to FPGA bank with configurable VCCIO to light LED FPGA pin should in 0 low state To disable LED FPGA pin should be in Z High impedance 2 11 Watchdog 19 34 GigaBee XS6LX has a watchdog timer that is periodically triggered by a positive or negative transition of the WDI watchdog input line FPGA pin V9 When the supervising system fails to re trigger the watchdog circuit within the time out interval min 1 1 s typ 1 6 s max 2 3 s the WDO watchdog output line becomes active low This event also re initializes the watchdog timer If zero resistors R2 is not assembled the watchdog is disabled alternate assembly If zero resistors R2 is assembled the watchdog can be enabled standard assembly In this case there is still two options To enable the watchdog after module power up drive the WDI signal to generate at least one transition no matter positive or negative To keep watchdog disabled set WDI FPGA signal output to high impedance www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Desc
31. through pin 18 of connector J2 In the alternate assembly the WDO watchdog output line is connected through zero resistor R3 to MR master reset line If alternate assembly is used pin 18 of connector J2 must be left unconnected is not populated 20 34 www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 3 Configuration Options The FPGA on GigaBee XC6SLX board can be configured by means of the following devices e Xilinx download cable JTAG e SPI Flash memory 3 1 JTAG Configuration The FPGA can be configured through the JTAG interface JTAG signals are connected to B2B connector J2 When GigaBee XC6SLX board is used with the TE0603 carrier board the JTAG interface can be accessed via connectors J5 and J6 on the carrier board 3 2 Flash Configuration Default configuration option for FPGA is Master Serial SPI The bit stream for the FPGA is stored in a serial Flash chip U11 See chapter 2 7 Flash Memory for additional information 3 3 eFUSE Programming eFUSE programming feature is not directly supported by GigaBee XC6SLX modules but it is possible to use it To program eFUSE please follow the steps below e Remove ferrite bead L3 this will cut VCCAUX from power supply 2 5V e Remove resistor R12 e Replace resistor R11 from 0 Ohm to 1140 Ohm 1K14 e Connect pin 91 of connector J2 VCCAUX to power supply 3 3V pins 2 4 6 8
32. ure of hermaphroditic connector numbering is that connected signal numbers don t match Odd signals on module connect to even signals on baseboard For example module signal 1 to baseboard signal 2 module signal 2 to baseboard signal 1 module signal 3 to baseboard signal 4 and so on 4 3 Pin Types Most pins of B2B connectors J1 and J2 are general purpose user defined UC pins GPIOs There are however up to 8 different functional types of pins on the TEO600 as outlined in Table 9 In pin out tables Table 10 and Table 11 the individual pins are colour coded according to pin type as in Table 9 22 34 www trenz electronic de GigaBee XC6SLX Series User Manual 4 B2B Connectors Pin Descriptions UM TE0600 v 1 02 18 June 2012 type colour code description Unrestricted general purpose differential user I O pin Unrestricted general purpose user 1 O pin Dedicated configuration signals Control and status signals for the power saving Suspend mode Dedicated JTAG signals GND SPI signals Ethernet PHY signals Table 9 TE0600 pin types Note that some of Spartan 6 I O types are partially compatible so pins of compatible types can be used as inputs for signal of other type For example pins from FPGA bank with 1 5V VCCO IOSTANDARD LVCMOS15 can be used as inputs for 1 2V 1 8V 2 5V and 3 3V signals See Spartan 6 FPGA SelectlO Resources page 38 for detailed information Dedicated g
33. x UG381 Spartan 6 FPGA SelectlO Resources http www xilinx com support documentation user_guides ug381 pdf 28 34 www trenz electronic de GigaBee XC6SLX Series User Manual 5 Related Materials and References UM TE0600 v 1 02 18 June 2012 5 4 Design and Development Tools e Xilinx ISE Design Suite http www xilinx com ISE http www xilinx com tools designtools htm e Xilinx ISE Design Suite version archive http www xilinx com download http www xilinx com support download e Xilinx ISE WebPACK http www xilinx com tools webpack htm http www xilinx com webpack 5 5 Design Resources e Trenz Electronic GigaBee Design Resources http www trenz electronic de download d0 Trenz_Electronic d1 TEO600 GigaBee_series html e Trenz Electronic GigaBee Reference Designs https github com Trenz Electronic https github com Trenz Electronic TE EDK IP https github com Trenz Electronic TE060X GigaBee Reference Designs 5 6 Tutorials e Xilinx UG695 ISE In Depth Tutorial Chapter 8 Configuration Using IMPACT http www xilinx com support documentation sw_manuals xilinx13_1 ise_tuto rial_ug695 pdf 29 34 www trenz electronic de GigaBee XC6SLX Series User Manual 6 Glossary of Abbreviations and Acronyms UM TE0600 v 1 02 18 June 2012 6 Glossary of Abbreviations and Acronyms A WARNING notice denotes a hazard It calls attention to an operating procedure practice or the like that if not correctly performed or adher
34. ystems e Boards GigaBee XC6SLX 45 100 150 e Base board TE0603 02 e Power supply 5 V from baseboard e Connected Gigabit Ethernet cable Configured with Web AS CEMIS server reference design LX45 0 15 A 0 6A LX100 0 17 A 0 5A LX150 0 2A 0 5A Table 1 Power consumption www trenz electronic de GigaBee XC6SLX Series User Manual 2 Detailed Description UM TE0600 v 1 02 18 June 2012 2 Detailed Description 2 1 Block Diagram Figure 4 shows a block diagram of the GigaBee XC6SLX board 1Gb 128MB DDR3 SDRAM 1Gb 128MB DDR3 SDRAM B2B J1 21x2 2 44 el UO 31x2 3 65 User I O El PHY Xilinx FPGA e i ge n 6 LX Watchdog partan Supenisor 45 100 150 Quad SPI 64Mbit 8MB dual quad SPI EEPROM Serial Flash 48bit Ge ege MAC address SS Figure 4 GigaBee XC6SLX block diagram 2 2 Power Supply The nominal supply voltage of the GigaBee XC6SLX is 3 3 volt The minimum supply voltage is 3 0 volt The maximum supply voltage is 3 45 volt Supply voltages beyond the range might affect to device reliability or even cause permanent damage of the device Board power supply diagram is shown in Figure 5 2 Detailed Description UM TE0600 v 1 02 18 June 2012 Switching regulator 1 5V 1 2V 2 5V VCCAUX Watchdog Supervisor Reset Figure 5 Power supply diagram 2 2 1 Power Supply Sources GigaBee XC6SL
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