Home
EB73 - iCEblink40 iCE40HX1K Evaluation Kit User's Guide
Contents
1. 00 LOMO 3D 007 Ei SINIDd Sad quot juot finito ani i SOF G vINDA LU pad zal 06 8197 4197 919 512 415 E19 2191197012 i Old ooz Osan 75 ELNID4 O SIW OGd ad aS Se pot oy s gt ran I OS0 va ISOW ESN ET STE coe ees 6 Sy J L E su 3 SA LIND dNDS Lgd ENE DDA AND Yo S asn SLT lt DN 395 0 3 mM lt a ssasn vl zasno 61V voyngde a SS 0 t32 ou duol SUOL 4NL O Ant 69 8D D 9 ARRIR ay ay alnlala OJO OOO OOO OJO OJO OJO OO O OJO O O O OJO OOO Solololo NNN nnn NMA iaa lia valia va valia ua ua lia un Jun un DIPIPIS AJAJAalajajaja AIAJATATATATATATATATATATaTaTaJajalala e be E E Gad Dod bod Dod l LOA 15 ICO br a pal pal lol EA E E Gad bod 105 Ka 669 005 5 IOn L6 rd bra Pr pl hc hr ra K LEN JE he 1 be ololojo elo lo S 2 fololo lolo lolo lolo L SIOEN AOSZ 4UL o alalala a 13 s34 gt 0 PD alalals SA TA A laa A 114 Iv S L OASESN red kal hed E alalalajlalajala n n EAE DIN ffs SISSI Sp x m 0A3asn EEES elgleleigialale a 340 DDA a34 ANIS LON a34 ANIS LON 1NNHS WIG 191 JUBUUSINSLAA JIMOG OASESN EAE DDA av UIN asn Plays O I 1529 YM a quedao Ajjesweyse yy 9 S v c L 23 ICEblink40 ICE40HX1K Evaluation Kit a LATTICE User s Guide EE SEMICONDUCTOR Appendix B Bill of Materials Major Components Table 9 Bill of Materials Pari Number a Lattice Semicondu
2. n LAT TICE N EE SEMICONDUCTOR ICEblink40 iCE40HX1K Evaluation Kit User s Guide May 2012 Revision EB73 01 0 Sas LATTICE ICEblink40 iCE40HX1K Evaluation Kit UN 5 HM SEMICONDUCTOR User s Guide Introduction Thank you for choosing the Lattice Semiconductor iCEblink 40 HX1K Evaluation Kit This guide describes how to begin using the iCEblink40 Evaluation Kit an easy to use platform for rapidly prototyp ing designs using the CE40 mobileFPGA Features e High performance low power CE40HX1K mobileFPGA e USB programming debugging virtual I O functions and power supply e Four user LEDs e Four capacitive touch buttons e 3 3 MHz clock source e 1Mbit SPI serial configuration PROM Supported by Lattice iCEcube2 design software 68 LVCMOS LVTTL 3 3V digital I O connections on 0 1 through hole connections Supports third party I O expansion boards and modules including 3 3V Arduino Shield boards requires addi tional sockets not supplied Figure 1 iCEblink40 HX1K Evaluation Board and Major Hardware Features USB Programming Low Power iCE40 68 User 1 0 Pins Debug and Power mobileFPGA 3 3V Capacitive Touch a ya o SLL Buttons co 79885 EN Bi Be ene reel me User LEDs ee TTE cas ea nd as a LATTICE mo sie _ AAA T Ci L C e o4010 e osci MIDES MOO00000f NAAA EE Le e o 07 6 02 00 He ejo os a Woo 06 Software Requirements
3. 3 33MHZ Lower Position DEFAULT S 3J3MHZ User LEDs The iCEblink40 iCE40HX1K evaluation board includes four green user LEDs located along the left side of the board as shown in Figure 1 Operation To light a user LED drive the associated mobileFPGA pin High as shown in Table 3 To darken the LED drive the associated mobileFPGA pin Low Table 3 User LED Operation Light LED Drive High 1 Darken LED Drive Low 0 The LEDs may appear to glow slightly before the FPGA is configured or if the mobileFPGA pin is unused This is because the mobileFPGA I Os have a soft pull up resistor which may provide just enough current for the LED to glow dimly To completely turn off an LED drive it Low FPGA Connections The FPGA drives the user LEDs using the mobileFPGA pins listed in Table 4 These same signals also connect to the J12 header located in the lower left corner 10 san iCEblink40 iCE40HX1K Evaluation Kit MAA User s Guide Table 4 User LED Connections Capacitive Touch Buttons The CEblink40 CE40HX1K evaluation board has four capacitive touch buttons located toward the left side of the board as shown in Figure 1 These buttons have dedicated connections only to the FPGA These signals go nowhere else on the board and are not available on any of the breakout headers FPGA Connections Table 5 lists the four capacitive touch buttons on the CEblink40 board and the associated mobileFPGA pins Table 5
4. Before using the CEblink40 board please be sure to download and install CEcube2 Release 2011 12 or later This and later versions include the programming software for the CEblink40 board Currently the programming software is only available for the Windows operating system htto www latticesemi com products designsoftware icecube2 downloads cfm During the installation process be sure to install the Adept USB Programming Software as shown in Figure 2 1 Make sure that Adept USB Programming Software is checked This is the default setting 2 Click Next ICEblink40 ICE40HX1K Evaluation Kit a LATTICE User s Guide EE SEMICONDUCTOR Figure 2 Select the Adept Programming Software for Installation SiliconBlue Tools Setup E x Optional Components Select the components you want to Install Sbt Tools Core This feature is required It includes the following tools CEcube2 Project Navigator Placer Router v Adept USB Programming Soft Bitmap IP Tools Timing Constraints Editor Pin Constraints Editor Floor Planner Package View Power Estimator Timing Analysis Ttem Size 250M Total Size 702 0M A few steps later select the installation for the Adept programming software as shown in Figure 3 3 Make sure that both the Adept Runtime and Adept Application options are checked which are the default settings 4 Click Next Figure 3 Adept
5. C 1 E EN 1 S JI Sm 13 BIN 157 Tm Ou ON 0 Lo se 0 33 u C L O N CO 3U3 O Y END LD4 jo 333120 53 LOO 281121 JP1 J10 BTN3 54 271024 Be 3 261025 LO 10 a N 3U GN 51 ol a 2 UN RST 303 3U3 GND GND 1101 BTN4 52 S SOUIN 3 S00iN Ordering Information China RoHS Environment Friendly Description Ordering Part Number Use Period EFUP CEblink40 HX1K Evaluation Kit ICE40HX1K BLINK EVN Technical Support Assistance Hotline 1 800 LATTICE North America 1 503 268 8001 Outside North America e mail techsupportOlatticesemi com Internet www latticesemi com Revision History 2012 Lattice Semiconductor Corp All Lattice trademarks registered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice User s Guide ICEblink40 iCE40HX1K Evaluation Ki a LAT TICE EEE SEMICONDUCTOR A Schematic Appendix tic Figure 24 Schema LX 9 s v z L VOMS Ag UMBIg 20dyISPIE0g AT O Ya Sas MO alld gt uo SHOU 35315 Wes me W L O 19945 ZLOZ E S ied 0 9 200 005 E 109 proge LE ed HOLINONOTINAS MEN dE uqg rr J ILLV Tis AND MY UOnenjeaa LXHOPAUIlaI D a a
6. Capacitive Touch Buttons mobileFPGA Pin BTN1 BTN1 60 BTN2 BTN2 57 5 BTN3 BTN3 54 5 BTN4 52 Operation Figure 13 shows the circuit used for each capacitive touch button Each button is attached to one I O pin on the mobileFPGA Each signal line includes a 100 kQ pull up resistor to 3 3V and a 100 pF capacitor down to ground Figure 13 Example Capacitive Touch Button Circuit Capacitive pp I O Pin N 3 Touch Button Value Figure 15 shows the general overall flowchart for the demonstration design to read the value on a capacitive touch button The sampling signal drives the voltage on the capacitive touch button to ground in order to bleed of any residual charge as shown in Figure 14 After a period of time depending on the button sample frequency the button is allowed to float High Once the mobileFPGA output goes to Hi Z high impedance floating three state the 100kQ pull up resistor to 3 3V charges the 100 pF capacitor After about an RC time constant t or tau the voltage on the pad exceeds the input switching threshold of the mobileFPGA A finger pressed against the capacitive touch button adds about another 5 pF of capacitance increasing the RC constant and delaying the Low to High transition for a pressed but ton 11 ICEblink40 ICE40HX1K Evaluation Kit cm LAI TICE User s Guide EEE SEMICONDUCTOR Figure 14 Capacitive Touch Timing Examples Sampling Allow pad to Signal Drive pad
7. 0ld ks mn T Haa TINI LNIV LAX4 TAd El ES AND LE d0O Wa Tad SN 2H 1014 a v80dd Old LINI ONIV LGd AND ENLA dv ys H Z GOWd ga asn Z D 232 1014 8 0dd E0ld OLNI 90D0 0Gd 203 M oda cola d0 Wd oga asn 9 ZNLG dv ZS 00 LOAO ID ON v Ed0OWd zasno OlV W ea 06 2 Old 89040 0ld oC Dea S peor oy 00 gt zan NIG dv 097 091 11030308 Cram EII 86 Waad FON SI l Sd 100 Lig Set 1014 ENI8D gt SAT ddA asodd Old GOW 29 101d 2NI89 ta ne vs YS0dG EOld onigo Hetaa 0800 39 197 918 d0 W a Foz col NES TI 1950 BEAN NWII ZISNOGELV von ngden TNL8 dv CON 9 101 ss vroda gold ESAS TIVO VA sy ggg LL say cov vin AND L O W S9 y 11 195d JIVM 8SN Z a s 1014 BE0dA E0Id EZ _ __ _ SINIDA VIDO 9d Osa 991 a 68 veodar sold jaN A viy ALUMS SM EZ 6INIDA B1D0 5Dd cosa 89 a dd ze azoda sold he ELIOHd Ette 0 LINIDd 3d 0 TISA 69 19 ee 1d0Wd aL SG 0 bab al sw asn 90 Sos 177 Old VZ0d0 EO0ld ELY 007 es osa ilon se 4 lt lt lt 91040 E01d oN sa HNZ 0 t Sd ZZ AND LL s ASA ZOO WA aL SV 0 bab No asnS vo EAE DDA 90 2350 Ea JOI aa Vo Z 200Wd old o or 101d OOO 900dd t0ld L a 0 05 vl Kolbas EE E ZOOWd 15 22h Lean Es auo 3uoL vot suo anio anto am ani PIO eu SMO GLY X XL aNo la ea To a TEE 000 1000002610 vr ina da44Ns LON INOG 0 Fab zf LINDAD 1901v007 L AND 3409 DA 13 SHO PD maa ee eae
8. 7 Pmod Module Headers Female Socket Manufacturer Part Number Header Type Straight through Right angle 2x6 header on 0 1 centers Each is a Pmod12 header that Sullins Connector Sullins Connector supports two six pin Pmod modules Both together form a Solutions Solutions double wide Pmod connection PPPCO62LFBN RC PPPCO62LJBN RC 2x8 header on 0 1 centers The left side of header J5 forms a Pmod12 header as shown in Figure 16 A 2x6 header sim SA ee oul necio ilar to J1 J12 can also be used but must be mounted toward solutions Solutions stat PPPC082LFBN RC PPPCO82LJBN RC the right end of the holes as marked As shown in Figure 17 a Pmod module has six connections four I O plus power and ground A Pmod12 module has 12 connections and the module is effectively two six pin Pmod modules stacked together Finally a double wide Pmod12 consists of two Pmod12 headers spaced apart Most of the Pmod modules also include interface cables to allow easy connection to other header types 15 am CEblink40 CE40HX1K Evaluation Kit EE SEMICONDUCTOR Figure 17 Pmod Module Types Pmod12 Pmod Pmod For a complete list of Pmod peripheral modules visit the Digilent web site www digilentinc com Products Catalog cfm NavPath 2 401 amp Cat 9 Arduino Shield Board Support The iCEblink40 board also mechanically and electrically supports select 3 3V Arduino Shield boards popular in the microcontro
9. Setup Options A Digilent Adept Setup E 7 x Choose Components Choose which features of Digilent Adept you want to install Check the components you want to install and uncheck the components you don t want to install Click Next to continue Select components to install Adept Runtime Adept Application Space required 27 8MB lt Back Cancel Connecting to the iCEblink40 Evaluation Board Before connecting the CEblink40 board be sure to download and install a supported version of the CEcube2 soft ware Connect the iCEblink40 evaluation board to your PC using the USB cable provided The USB connector on the board is labeled with reference designator J3 and is located in the upper left corner Once connected the red power good LED LD1 adjacent to the USB connector illuminates See Figure 4 to locate the power good LED am CEblink40 CE40HX1K Evaluation Kit NON SEMICONDUCTOR Power and Configuration Status LEDs The CEblink40 evaluation board has two status LEDs as shown in Figure 4 These two status LEDs indicate the current status of the CEblink40 board as listed in Table 1 The red LED LD1 located near the USB connector indi cates if the USB power supply the 3 3V supply and the 1 2V supply are within the specified ranges The yellow LED LD6 located below the mobileFPGA indicates whether the mobileFPGA is configured properly This LED lights up when the FPGA is
10. header J1 J2 J4 J1 J6 J7 1x6 0 1 centers offset Left edge top Production programming of USB controller J11 J5 P3 J12 3 3V digital I O Connections between the mobile FPGA and the TAO O Caer ONSET Mage Toward 1er SPI PROM Compatible with Digilent 1x6 PMod modules 3 3V digital I O Portions compatible with Digilent 1x6 and 2x6 2x8 0 1 centers Bottom edge right side PMod modules Portions also compatible with 3 3V Arduino Shield boards ixo ii centers Middle to left of 3 3V digital I O Clock connections from the LTC1799 oscillator mobileFPGA GBIN7 and possible into GBIN2 3 3V digital I O Connections to the user LED I O Compatible MOS 1x6 0 1 centers Bottom edge left side with Digilent 1x6 Pmod modules Supported Pmod Peripheral Modules As shown in Figure 16 the iCEblink40 board supports a variety of Pmod peripheral modules for easy I O expan sion Table 7 lists the 0 1 through hole headers on the iCEblink40 board that support Pmod modules Pmod mod ules come in a few different form factors and each Pmod header includes power and ground supplies Figure 17 shows the how the different Pmod form factors interrelate The easiest way to support a Pmod module is to add the appropriate female socket listed or an equivalent Straight through or right angle through hole sockets are listed Male headers are also possible solutions when using the interface cable provided with most Pmod modules J Table
11. nu 5 H bs 293 e AND 9N WAV OLASTW Zt NE8SN E O gt 06 ENE DOA SO AULAS LEA a a poron Se 2 yeu Pan INS a ra vivass Se a34 4N1S LON WS 0 PD T DE a MOL gt ced 15 0 93 z AOS PNG dVD OS 0 Y 3 9EY Y nw91 za sno 6LV g S5073 z 13 533 431 SPS PPY aN guo gt 15 paysankes odds GOWd Ids euondo AND COW PIM Sja JIM aqnedua Kieu W J mon appar Lanes IND g SS 0 van HD 890010 A GE KRRRRRRKARAR L T Els jslajskajalajajsjajajal ENE DIA T T T T T T T T T T T T T T 0ASg sn oL alo slekelsieleisleisisiza ZHI EEE AND AId g SS OLASZM osy AIS PNPN ZHN E EE EAE DDA NIA AND a34 4N1S LON 15 0 Pao ar m LINV430 ZHN NadO AId zar 312019 Hulwweijbolg gsn jaunv AND ear g SS 0 YID AND 49 duL S 9664 1917 AND AD SAS ala sislelwlwlwlwlwINnIvIroIw mas NA AND val 06 IMOT Blu INANOD W 0 0 ONIO TE ON Woe 4d001 135 c peo ON D gt 278 EN O ui dad 4N1S LON EAEaSN 134 JN1S LON 5000 peed i DO So fo AND aly lb wee mo 55 aoe A ana E zz ND SAS g Yo S asn EN13 dD Una zu 9zu gt m aa T z gsn uoyngde vv 4 Du X L ja OSI W 9S EEE So AND 101 BID gt 1seg ENE DDA ISOW gsn 2828 ve o 13 534 4sI wo s Gad JNS LON DNS haz quot quot Junto ani 7 00 LOAD YI DZI LO OIDO DEN NWIL ZISNOGIV ENE DOA 00 LOMO 139 AZII A EE A a 0 1014 MASA LLL eva vaJ TS 00 LOAO 3 VOI vado va vad asn OL TR zs 24 ooz LZY renr e ENN LOXL Edd 20130 1014 980dd
12. to ground float High Button a i o Switching L No Finger Threshold T R sutton no e Time delta between g pressed and unpressed button Button 777S DECO e witchi Finger Press KO af Fecha T R Cgurron Crincer Sa Button Value Finger Press The switching time difference between an unpressed and one or more pressed buttons is roughly 300 to 500 ns Using the 3 33 MHz input this amounts to a one clock delay difference between an unpressed and pressed but tons The simple circuit used on the iCEblink40 board detects simultaneous button presses on up to three of the capaci tive touch buttons Pressing all four buttons is the same as pressing no buttons 12 1 ATTICE ICEblink40 iCE40HX1K Evaluation Kit UN MOM SEMICONDUCTOR User s Guide Figure 15 CEblink40 Demo Application Capacitive Touch Button Flowchart Drive pin connected to Capacitive button Low long enough to guarantee that the pin is at GND despite the attached RC network Force pin to Hi Z The external pull up resistor pulls the pin High and charges the capacitor Did any pin go High Wait one 3 3 MHz clock period 300 ns Sample all pin values Are all buttons High Did pin value change from last sample Toggle pin value 13 ICEblink40 ICE40HX1K Evaluation Kit om LAT TICE User s Guide EE SEMICONDUCTOR User I O Connections Figure 16 shows the location of th
13. E EE SEMICONDUCTOR iCEblink40 iCE40HX1K Evaluation Kit User s Guide 4 Click Start I O Remember the associated I O Expander design must be part of the compiled FPGA design before the Virtual I Os work 5 If the virtual I O expansion design is functioning correctly the green virtual status LED will turn from red to green Figure 8 Starting the Digilent Adept Virtual I O Expansion Application To disconnect the virtual I O interface simply click the Stop I O button in the graphical interface A Digilent Adept eee eee A eee ae A u A G 25 P E K e PS 7 To FPGA Light Bar oxffe4 ars LEDs Send Format Decimal v KO O O G O O a O Switches r Buttons Adept Application Rev 2 4 2 Copyright 2010 Loading board information Warning Could not find specific board information Default information loaded V O Ex Started successfully Controlling the Physical LEDs from Virtual I Os in the Demonstration Design When active the virtual I Os optionally control the physical LEDs on the board as shown in Figure 9 For example with the virtual I Os active change the position of virtual switch 7 the bottom left switch in the graphical interface Note how the physical LEDs on the board change direction Change virtual switch 6 to the up position Now the physical LEDs are controlled b
14. O expansion interface Operating the Capacitive Touch Buttons Upon power up the green LEDs on the board scroll in an upward pattern as described in Figure 5 Pressing any of the capacitive touch buttons stops the LEDs from scrolling and places the board in a different operating mode Figure 5 Preprogrammed Demonstration Design LEDs S v hk A 1 Power On Green LEDs scroll upward 2 Press any button to enter LED Toggle Mode 3 Press a button to toggle the associated LED on or off If no button is pressed within five seconds the board returns to Scroll LEDs Mode In the second operating mode toggle individual LEDs on and off by pressing the associated capacitive touch but ton If no button was pressed during the last five seconds the board returns to scrolling the LEDs The demonstration application is available for download from the Lattice website at www latticesemi com iceblink40 hx1k Virtual I O Expansion Debugging Interface The iCEblink40 board is powered and programmed via the USB interface Additionally the USB interface also pro vides a convenient means to monitor and control logic inside the mobileFPGA as shown in Figure 6 The USB con troller drives a byte wide parallel port expander implemented within the mobileFPGA controlled by software running on the PC The Digilent ADEPT2 I O Expansion screen shown in Figure 7 provides a mix of virtual switches pushbuttons LEDs light bars and 32 bit inp
15. To take a guick measurement follow these steps 1 Disconnect power to the iCEblink40 board by removing the USB cable connection either at the board or at the computer 2 Remove the jumper JP1 which isolates the mobileFPGA s core supply from the 1 2V supply on the board 3 Connect your multimeter s alligator or test clips to the stake pins on header JP1 4 Configure the multimeter to measure current using its highest MA or Amp range This setting typically has the lowest voltage drop internally within the meter 5 Re connect the USB cable that supplies power to the iCEblink40 board and configure the mobileF PGA device if necessary 6 Observe the power reading on the multimeter At low clock rates which results in lower power consumption switch the meter to a lower amperage setting for better accuracy However this also may increase the resis tance across the meter leads Using too low of a meter setting causes a large voltage drop within the meter potentially violating the minimum input voltage specification to the mobileFPGA device 7 The value measured by the multimeter is a current Convert the measurement to power using Equation 1 The voltage is the operating voltage the voltage across the jumper This value can be accurately measured with a second multimeter to show the voltage drop across the first However just measuring the initial voltage before taking any current readings usually provides acceptable accuracy and the vol
16. correctly loaded with a valid bitstream Figure 4 CEblink40 Status LEDs Power Good LED LD1 Red LED ICE40HX1K BLINK EUN DIGITAL BTN1 60 aaa LAT TIC HMM SEMICONDUCTOR 2 CE40HX1K o a ile 331120 281121 271124 BTN3 54 26 25 BTN4 52 mobileFPGA Configuration Done LED LD6 Yellow LED Table 1 iCEblink40 Status LED Descriptions Power Good Configuration DONE LED LD1 LED LD6 Description The board is powered the mobileFPGA successfully configured and the On On A l mobileFPGA application is operating Board is unpowered Connect the board to a computer USB port a pow ered hub or a USB based wall plug Off Off If board is plugged in and previously operating indicates that an SPI Flash programming operation is in progress The board is powered but the mobileFPGA is not yet configured On ACTION Program the onboard SPI Flash PROM with a valid mobileFPGA configuration bitstream ERROR The board is powered but there is a problem with the USB Off On l power supply or with the on board regulator am CEblink40 CE40HX1K Evaluation Kit EE SEMICONDUCTOR Pre programmed Demonstration Design The iCEblink40 board comes preprogrammed with a demonstration application The application supports two inter faces 1 Controlthe LEDs from the four capacitive touch buttons on the board itself 2 Controlthe LEDs and other internal logic using the USB based I
17. ctor iCE40HX1K VQ100 iCE40 HX series mobileFPGA IC4 Analog Devices ADP2140ACPZ3312R7 Low guiescent buck LDO regulator 1 2V 3 3V B Linear Technology LTC1799CS5 TRPBF Oscillator Micron Technology M25P10 AVMN6 1Mbit SPI serial configuration Flash PROM 103 Atmel Corporation AT90USB162 16MU USB programming and debugging interface 24
18. d in Programming the iCEblink40 Board below Digilent Parallel Port DPP The Digilent Parallel Port DPP interface is used for virtual l O and debugging using a USB connection to the board from a Windows PC See Virtual I O Expansion Debugging Interface on page 5 for additional information 1Mbit SPI Configuration PROM The configuration bitstream for the iCE40 mobileFPGA is stored in a M25P10A 1Mbit SPI serial Flash PROM The PROM is large enough to hold two configuration images and supports the iCE40 WarmBoot feature if so enabled within the FPGA application The PROM is physically located on the back side of the board Programming the iCEblink40 Board The CEblink40 board includes on board USB based programming support either from the Lattice CEcube2 soft ware or using a command from a console window or DOS box From iCEcube2 Figure 21 shows the command seguence for programming the SPI Flash PROM on the iCEblink40 board using the ICEcube2 development software 18 sam iCEblink40 iCE40HX1K Evaluation Kit fae tele heres User s Guide Figure 21 Programming the CEblink40 Board from CEcube2 Programmer Programming Options Programming Hardware iCEblink40 iCEMan65 SiliconBlue iEcube2 capbtn Output dl NonvOolatie Configuration Memory INV 5 GE O Timing Constraints Editor 4 Pin Constraints Editor Name PL 9 Project A New Packa
19. e 3 3V compatible digital I O connections on the iCEblink40 board Each connec tion shows the pin number of the mobileFPGA I O pin that attaches to the connection Likewise Table 6 lists the various I O headers and their designed usage Figure 16 Location of the 3 3V Digital I O Connections and the mobileFPGA Pin Number Digital I O 3 3V 3 3V Arduino Shield Compatible Digital I O 3 3V SPI PROM Connections O G amp BH FH m eh T F 80 00 mm 0 59 0 0 M A A N iCFblink40 HX1K Evaluation Kit HELATTICE CON DUCTOR 5 Si 19 El JP3 13 33 Clocks User LEDs Double PMOD 12 Double wide Digilent 2x6 Header Digital I O 3 3V PMOD12 Digilent 2x6 Header PMOD Digilent 1x6 Header 14 san iCEblink40 iCE40HX1K Evaluation Kit MAA User s Guide Table 6 Digital I O Headers and Their Functions I O Header Header Group Type Location 2x8 0 1 centers Top edge middle 3 3V digital I O Compatible with 3 3V Arduino Shield boards 2x8 0 1 centers Top edge left side 3 3V digital I O Compatible with 3 3V Arduino Shield boards 3 3V digital I O 3 3V digital I O Compatible with Digilent 1x6 and 2x6 0 1 centers Left edge top 2x6 PMod modules Also supports double PMod12 modules when used with header J6 3 3V digital I O Compatible with Digilent 1x6 and 2x6 PMod mod KN 2x6 0 1 centers Left edge bottom ules Also supports double PMod12 modules when used with
20. ge View Open 7 Power Estimator External SPI Serial Flash PROM M25P10A ol Image Image Type Single Image 1 Select Tool gt Programmer from the iCEcube2 menu bar Click the dropdown button under Programming Hardware Select iCEblink40 amp N The bitstream file should already be set appropriately based on the iCEcube2 project settings If not click Image Files Settings to select the configuration bitstream file 5 Click Execute to program the iCEblink40 board If all is working correctly the power on LED and the configuration done LED will both go out momentarily as iCEcube2 programs the on board SPI Flash PROM After programming is complete both LEDs should light up again and the mobileFPGA will execute the new configuration image From Command Line The iCEblink40 programming software can also be executed from a console window or DOS box To open a con sole window or DOS box click the Start button and type cmd in the textbox immediately above the Start button Executable Location After installation the programming software executable is called iceutil exe and is located in the Sbt Tools sbt_backend bin win32 opt directory The iecutil exe executable can be copied into the same directory as the mobileFPGA bitstream image or can be pointed to on the command line mobileFPGA Bitstream Configuration File The required bit
21. ing the board to a computer USB port a power USB hub or a USB based AC adapter commonly used in consumer electronics A typical USB port provides up to 500 mA at 5V pro viding up to 2 5W of total power The CE40HX1K consumes SIGNIFICANTLY LESS power even when operating at full performance However be careful when using the board to power off board peripheral funds Connector The USB connector to the board is located in the upper left corner labeled J3 The board connects using a stan dard USB cable with a male mini B connector Power Supply Figure 20 shows the iCEblink40 power supply circuit that derives power from the USB mini B connector J3 The USB connector provides up to 500 mA at 5V DC An Analog Devices ADP2140 regulator generates 1 2V for the mobileFPGA core VCC and 3 3V for all I O connections The regulator also indicates when power is good and lights up the red power good LED LD1 17 Sa LATTICE ICEblink40 iCE40HX1K Evaluation Kit UN HM SEMICONDUCTOR User s Guide Figure 20 CEblink40 USB Power Supply Circuit Power Good LED LD1 Mini B USB Connector J3 Analog Devices Lattice ADP2140 iCE40HX1K Voltage mobileFPGA Regulator VCCIO Configuration Done LED LD6 Jumper JP1 provides a convenient location from which to measure core power to the mobileFPGA SPI Flash Programming The USB interface also provides Flash programming for the on board SPI PROM as describe
22. lled by virtual pushbuttons 3 0 Virtual Values to and from FPGA in the Demonstration Design The virtual I O interface also includes a 32 bit value from the FPGA logic and a 32 bit value to the FPGA logic as shown in Figure 12 Two virtual switches 14 and 15 control the behavior in of the virtual 32 bit values in the demonstration design Figure 12 Virtual Values to and from the FPGA 13 O0 s s G TEELE To FPGA From FPGA nl Ox1 OOOffff efff0000 toma Reset Buttons Continuously increment Continuously decrement Hg One s complement APO eee of input value Reverse bit order Input value of input value Clocking Resources The iCEblink40 board includes a Linear Technology LT1799 oscillator X1 on the board and in the schematic to generate a 3 33 MHz clock FPGA Input The output from the LT1799 oscillator feeds pin 13 of the iCE40HX1K mobileFPGA FPGA pin 13 is also the global buffer input GBIN7 Sas LATTICE ICEblink40 iCE40HX1K Evaluation Kit UN HM SEMICONDUCTOR User s Guide Supporting Other Freguencies On the iCEblink40 board the LT1799 produces a 3 3 MHz clock output by default Other frequencies are possible via simple modifications of the board using the 1x3 connections on JP2 as listed in Table 2 Table 2 Selecting Other Oscillator Freguencies Using Jumper JP2 Clock Freguency JP2 Setting Jumper Position 3 33 MHz default EN E D TM L LI am Upper Position DEFAULT
23. ller development community The Shield connections are located on headers J4 J2 J8 and a portion of J5 as shown in Figure 18 Headers jumper J4 and J2 are 3 3V digital I O connections Header J8 provides power connections to the Shield board The left side of header J5 also provides 3 3V digital I O but the 3 3V and GND connections do not connect to the Shield board Figure 18 Arduino Shield Board Connections Arduino Shield Connections Gh 40HX1K BLINK EUN 3U3 GND BTN1 60 za LAT TICE TILIN gt BTN2 57 331120 281121 271124 BTN3 541 261125 BTN4 52 Reguired Header Sockets To support Arduino Shield boards the indicated headers must be loaded with female socket headers on 0 1 head ers as listed in Table 19 16 Sas LATTICE ICEblink40 iCE40HX1K Evaluation Kit UN 5 HM SEMICONDUCTOR User s Guide Table 8 Sockets to Support Arduino Shield Boards Header Manufacturer Part Number i Sullins Connector Solutions J2 J4 J5 2x8 female header socket on 0 1 centers PPPC082LFBN RC i Sullins Connector Solutions 1x6 female header socket on 0 1 centers PPPC061LFBN RC Tested Arduino Boards Figure 19 shows the Arduino Shield boards have been tested for basic compatibility Other Arduino Shield boards may also be compatible Figure 19 Compatible Arduino Shield Boards chipKITBasic I O Shield chipKIT Pmod Shield Uno USB Interface The iCEblink40 board is powered by connect
24. lues displayed on these virtual LEDs depends on the settings of virtual switches 9 and 8 The eight LEDs are separated into left and right halves When both virtual switches 9 and 8 are Low the down position the left LEDs echo the scrolling pattern of the LEDs regardless if a physical cap sense button was pressed Use virtual switch 7 to reverse the direction of these LEDs The right most LEDs show the current toggle status of the four physical cap sense buttons Changing virtual switch 8 to High the up position the four left most LEDs then show the current value of the time out counter than marks the five seconds after pressing a cap sense button Press a cap sense button to reset the timer and note that the toggle status of the physical button changes on the right most LEDs The timer resets each time a physical button is pressed Wait five seconds and the physical LEDs change back to the scrolling pat tern ICEblink40 ICE40HX1K Evaluation Kit a LATTICE User s Guide EE SEMICONDUCTOR Figure 11 Controlling the Virtual LEDs vaass LEDs EA CEE HN O00000 00 9 8 9 Bl Scrolling LED Toggle value la pattern of physical cap sense buttons 9 Bl Cap sense push button to u time out counter change 9 3 2 1 0 S na AL lkm Hat foo onang TELTE snadin When virtual switch 9 is High in the up position then the left LEDs are controlled by virtual switches 3 0 and the right LEDs are contro
25. se a high precision resistor e The resistor must handle the power dissipated under the anticipated test conditions e Too small a resistor value may result in too small a voltage difference across the resistor to measure with your test equipment e Too large a resistor value may result in too large of a voltage difference across the resistor Too large a voltage drop might violate the minimum voltage specifications for the mobileFPGA device Figure 22 shows an example header block designed to fit over one of the jump locations Measure the voltage drop across the low value resistor either with a voltmeter or with data acquisition equipment Figure 22 Resistor Header Block Voltmeter Low Q High Precision Resistor This method is recommended for taking power measurements over time Mechanical Specifications Figure 23 shows the mechanical dimensions for the iCEblink40 board including the location of the four mounting holes With a jumper installed on JP1 the board height is approximately 0 700 inches high including the four rub ber feet mounted on the bottom side of the board 21 ICEblink40 ICE40HX1K Evaluation Kit om LAT TICE User s Guide EE SEMICONDUCTOR Figure 23 CEblink40 HX1K Board Mechanical Dimension 24 250i1M la s Gide O 6001N gt O E nae DIGITAL fidita ICE40HX1K BLINK OC cout e 3U3 YERBAS CE H GND l BTN1 60 N LD2 Eva SV Ariman BELATTICE C JP2 H JP3 LD3 56 VQ100
26. stream image is part of the iCEcube2 project Multiple versions of the bitstream are stored in the lt projname gt Implmntisbtioutputsibitmap directory The raw hexadecimal version of the bitstream is called lt projname gt bitmap hex The alternate format of the same information is an Intel hexadecimal file called lt proj name gt bitmap int hex Raw Hexadecimal Command Example lt path gt iceutil d iCE40 res cr m M25P10A fh w lt path projname gt bitmap hex Intel Hexadecimal Command Example lt path gt iceutil d 1CE40 res cr m M25P10A fi w lt path projname gt bitmap int hex 19 Sas LATTICE ICEblink40 iCE40HX1K Evaluation Kit UN HM SEMICONDUCTOR User s Guide Help lt path gt iceutil help Testing Core Power Jumper JP1 provides the ability to measure core power consumption by the mobileFPGA Two power measure ment methods are supported Note The iCEblink40 HX1K evaluation board uses an early version of the CE40HX1K silicon that has higher than expected static current consumption Although the demonstration application consumes less than 500 uA the pro duction silicon will consume even less current Similarly the lower power iCE40LP1K devices use even less power than the CE40HX1K mobileFPGA Easy Method Using a Multimeter Connect the iCEblink40 board through your high accuracy multimeter Use a meter with a minimum of 10 000 counts 50 000 counts or more is recommended for better accuracy
27. tage drop across the meter is generally small Power Current x Voltage 1 Although this method is easy here are a few caveats and pointers e Always start at the highest current setting for your meter Using too small a setting may damage your meter After determining the maximum current range for your measurement then you can safely use the appro priate lower current setting e The voltage drop across the meter leads may violate the minimum supply voltage specification for the mobile FPGA device To determine the voltage drop use a second multimeter to measure either the voltage across the first meter s leads during a test or the resistance between the first meter s leads e Using the highest current measurement setting typically results in the lowest voltage drop 20 ICEblink40 ICE40HX1K Evaluation Kit om LAT TICE User s Guide EE SEMICONDUCTOR Using High Precision Small Value Resistors For more accurate time sensitive measurements place a low value resistor across the jumper test point Accord ing to Ohm s Law the current passing through the resistor produces a voltage drop Measure the voltage differen tial across the resistor during expected operation Convert the measurement to power using Eguation 2 The voltage is the measured voltage across the resistor the resistance is the value of the resistor Voltage 2 Resistance The following are a few guidelines on selecting a resistor Power e U
28. ut and outputs san iCEblink40 iCE40HX1K Evaluation Kit E User s Guide Figure 6 CEblink40 Board Supports Virtual VO Connections over USB Debug l O Expansion Core Debug I O Expansion Core LEDs 7 0 Data 7 0 DB l LightBar 23 0 Address Strobe FromFPGA 31 0 To From Data Strobe FPGA Switches 15 0 Read Write Buttons 15 0 mones Wait ToFPGA 31 0 USB Controller mobileFPGA Control and monitor mobileFPGA logic values in real time over USB from PC graphical interface Digilent Adept 2 Figure 7 Digilent Adept 2 I O Expansion Interface and mobileFPGA Connections Connect iCE40 see Product Digilent Device Register I O File I0 I O Ex Settings To FPGA From FPGA Light Bar VLightBar comercaria JUDODONDODNDD0000000000N LEDs VLEDs Format Decimal v ER ce CIE Eo a 6 N TINO ee SRA Eo 1 0 T EE EE ae A A o pee POOR oe VButtons VSwitches oe E J a 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 start VO O Using the Virtual I Os in the Demo Application By default the virtual I Os are disconnected and the USB controller s I O connections to the FPGA are high imped ance Hi Z To connect the virtual I O perform the following steps outlined in Figure 8 1 From the Windows Start menu select Start gt All Program gt Digilent gt Adept gt Adept 2 Ensure that the Adept interface connects to the iCE40 3 Click the I O Ex tab zas LAT TIC
29. y the virtual switches 3 0 and virtual pushbuttons 3 0 The values of the virtual switches are XORed together inside the FPGA The virtual slide switches set a specific value for the physical LEDs The pushbutton momentarily inverts the value while the virtual pushbutton is pressed in the graphical interface san iCEblink40 iCE40HX1K Evaluation Kit Hie AU User s Guide Figure 9 Controlling the Physical LEDs from Virtual I O NNN Cana van Nunn EET onodooan vina eee eee E C D N E E R R E G eee Virtual Switches x ened 7 181 12 1 10 Virtual Pushbuttons 6 1 Scroll down MAMADA 3 2 1 0 1 Control LEDs from Virtual I Os 0 Scroll up JUUL 0 Control LEDs from FPGA 2 A Om EH RA Cerna Physical Buttons gt a and LEDs J Controlling the Virtual Light Bar in the Demonstration Design When the virtual I Os are active the virtual light bar lights up from left to right controlled by logic inside the FPGA The virtual pushbuttons 15 and 14 control the light bar Pushbutton 15 resets the light bar clearing all the lights Pushbutton 14 forces the light bar to hold its current value Figure 10 Controlling the Virtual Light Bar Lights Up from Left to Right Light Bar A INIT N Ii onnonon O O BE 8050808050 on Reset Hold Light Value Bar Controlling the Virtual LEDs in the Demonstration Design The virtual I O interface includes eight round green LEDs as shown in Figure 11 The va
Download Pdf Manuals
Related Search
Related Contents
Lavish Home 72-LP271F-S Instructions / Assembly JANOME 900CPX Instruction Booklet Repute 1.5 User Manual Case Study of Trantex - Walden Family website BENUTZERHANDBUCH Sikafloor 100 ESD PNY DIM102GBN/12800/3CXL memory module ADVANCED 280M Subside fédéral pour la guidance et l`accompagnement d`ayants Spice QT-44 User's Manual Copyright © All rights reserved.
Failed to retrieve file