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JNEye User Guide

1. JNEye 15 0 supports link optimization with IBIS AMI receiver models On the left are the model specific parameters For each parameter that JNEye determines is tunable a pull down menu allows you to assign the receiver parameters The types of receiver parameters are as follows No Sweep No sweeping or link optimization is performed Sweep JNEye sweeps or performs link optimization using available options provided by the IBIS AMI model This parameter is not supported in the JNEye 15 0 release CTLE Adapt Controller This receiver parameter enables or disables automatic adaptation of the CTLE or analog equalizer This sweep parameter is used when the link optimization method is CTLE gt FIR gt DFE or CTLE gt FIR amp DFE DFE Adapt Controller This receiver parameter enables or disables automatic adaptation of the DFE This sweep parameter is used when the link optimization method is CTLE gt FIR gt DFE or CTLE gt FIR amp DFE Sweep as CTLE This receiver parameter is swept as the CTLE or analog equalizer with all available options Sweep as CTLE AC Gain Tthis receiver parameter is swept as the CTLE s AC gain controller This sweep parameter is generally used in conjunction with the Sweep as CTLE DC Gain parameter Sweep as CTLE DC Gain This receiver parameter is swept as the CTLE s DC gain controller This sweep parameter is generally used in conjunction with the Sweep as CTLE AC Gain parameter W
2. 33 2015 05 04 Constructing Communication Links in the Link Designer Module s points can be manually placed into the link by clicking Test Point and connecting to the desired location in the link The following rules of link construction apply to the Link Designer module e A transmitter can only have one output port or connector e A receiver can only have one input port or connector Achannel component has one input and one output port e A test point can only be connected to an input port e A connection between two components can be established from an output port to an input port Atransmitter cannot be connected directly to a receiver A link establishment checking algorithm runs constantly in the background checking whether a link is established for simulations When a link is established between a transmitter and receiver the link lines become bold and color coded Bold black lines indicate signal paths green lines indicate crosstalk signal paths and purple lines point to test point port locations The following figure shows an example link topology A table of link components is displayed in the Channel tab for reference Figure 2 3 JNEye Link Designer with Channel Table A Demo ALTERA JNEye Release 15 0 Win32 c m WW V ALTERA JNEye NV JNEy e Release 15 0 Transmitter Channel Receiver Test Point Gf Connect i TA Q zi Ue rn B Ere Channel gl ER PCl Express 8GT Receiver L
3. ae mi a at Set the following parameters in the Receiver tab e Receiver PCI Express 8GT e Package PCI Express 8GT e CTLE Setting Auto e DFE Mode Auto e CDR Type Bang Bang e CDR Bandwidth Medium e PVT Process Typical e PVT Voltage Typical PVT Temperature 25 deg C DJ 0 056 UL 7 ps e RJ 1 55 ps RMS key in and then use pull down menu to set RJ unit Click Receiver Options In the Receiver Configuration window click the Equalization tab Set DFE Tap Length to 1 and Step Size to 0 0078125 Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback l UG 1146 3 10 Constructing the Channel 2015 05 04 Figure 3 9 Additional Receiver Configuration A ALTERA JNEye Receiver Configuration TENNIEEENENR imu oa a ALTERA JNEye Receiver Configuration EG Configuration FFE DFE Setting Algorithm 00 0078125 Summation Node Model 3dB Bandwidth RC Filter RC Filter Bandwidth Filter File Name JNEye Recerver Configuration Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Constructing the Channel Next construct the channel between the transmitter and receiver In JNEye the package models for the Stratix V GX transmitter and PCI Express 8GT receiver are embedded The transmitter and receiver packages are automat
4. Time Interval Error TIE Histogram Plots This plot shows the histogram of TIE records Five histograms are displayed e All transitions e Rising edge transitions e Ffalling edge transitions e Even bit edge transitions e Odd bit edge transitions If Jitter Analysis is enabled and the simulation mode is Hybrid jitter analysis results are displayed under the TIE plot Functional Description Altera Corporation GJ Send Feedback 2 92 JNEye Data Viewer Module Figure 2 74 Time Interval Error TIE Histogram with Jitter Analysis Results ALTERA JNEye Data Viewer JNEye UG 1146 2015 05 04 ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Cantour 3 TX Eye Width G Factor 4 TX Eye Height G Factor 5 TX TIE 7 TX Rise Fall Time Histogr 8 TX Spectrum 8 TX Waveform 10 TX Scope Eyediagram 11 TX Scope BER Eye 12 TX Scape BER Contour 13 TX Scope Eye Width Q 14 TX Scope Eye Height G 15 TX Scope Phase Noise 16 TX Scope TIE 17 TX Scape TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveform 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width G Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 29 CTLE BER Eye 30 CTLE BER Contour 31 CTLE Eye Width Q Fact 32 CTLE Eye Height G Fac HCTF TIE meu ccurances BER Target Aight
5. _ Note Patial test pattem is used Please referto Use Test Point Location LE DFE l Reference Clock MHz Actual Reference Cock Frequency 0000 Mhz Probe Type Reference Clock Setting Reference Clock Option Reference Clock ideal Clock Jitter Analysis Options irk Optimization Method FOM of Link Optimization My notes j Compliance Mask of 3 Set the following parameters in the Link and Simulation Settings tab e Data Rate 28 Gbps e Simulation Length 65536 Bits e Target BER 10 15 e Test Pattern PRBS 31 e Reference Clock 700 MHz e Link Optimization Method CTLE gt FIR gt DFE e FOM of Link Optimization Area e Compliance Mask Off e Simulation Mode Hybrid Output Options Data Viewer with Image Output Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 2015 05 04 Setting Up the Control Module 4 5 Transmitter Tab Figure 4 4 Transmitter Settings VOD Selection Es VOD 101388 mV Pre Emphasis ME i TX EQ AC Gain dB PLL Type ATX LG j Bandwidth ow 0 0 00 0r Seo votos uy MEO ea s Set the following parameters in the Transmitter tab e Transmitter Arria 10 GT use the Link Designer or Transmitter tab to add or select a transmitter e Package Arria 10 GT e VOD Selection 28 1000 mV e Pre emphasis Auto e PLL Type ATX LC PLL Bandwidth Low e Jitter Noise Component
6. i i Link Designer i l Transmitter Channel Receiver Fant cm ac Table 2 1 Supported Transmitter Channel and Receiver Components Transmitter TX Component Channel Component Receiver RX Component Altera Stratix V GX Transmission Altera Stratix V GX Altera Arria V GZ Connector Altera Arria V GZ Altera Stratix V GT Far end Crosstalk Altera Stratix V GT Altera Arria 10 GX SX Near end Crosstalk Altera Arria 10 GX SX Altera Arria 10 GT Package Altera Arria 10 GT IBIS AMI AC Coupling Capacitor IBIS AMI Custom Shunt Capacitor Custom PCI Express 8GT PCI Express 8GT JNEye supports the following simulations e Altera TX to Altera RX e Altera TX to non Altera RX e Non Altera TX to Altera RX Note Non Altera to non Altera link simulations are not supported A link consists of a transmitter a receiver and one or more channel components Select the transmitter receiver and channel components from the menus at the top of the Link Designer workspace After the link components are placed into the workspace click Connect to connect the components In connect mode one or two connectors are shown on each component Connect the link components by dragging the line from one connector to another Two types of connections are provided in Link Designer Right Angled Line and Straight Line Right Angled Line is the default connection method Test Altera Corporation Functional Description GJ Send Feedback UG 1146 T
7. e After changing the link and device configurations such as data rate VOD PLL type and bandwidth and PVT condition you must update the jitter value by clicking Characterization Data Access e When the Jitter Noise Data Lock check box is checked JNEye examines whether the jitter data matches the simulation configuration during the following conditions e Start simulation e Save link configuration e In batch simulation mode jitter data is retrieved and calculated based on the link configura tion When the link configuration exceeds the supporting range of Characterization Data Access a warning message conditions 1 and 2 is shown and jitter is reset all conditions Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Characterization Data Access 2 37 Figure 2 26 Characterization Data Access PVT Conditions and Jitter Noise Lock Check Box SS CEA ey ay Link g ation Se 5 00 ILU Receiver Channd Aggressor Transmitter Package Ania 10 GX SX v Option Est VOD 82954 mV Jitter Noise PVT Configuration BUJ rem Jitter Noise RJ Data Lock Pre Tap1 Post Tap1 ALTERA JNEye When the transmitter jitter noise i5 set using Altera s characterization data the transmitter jitter noise entries will be locked to ensure simulation accuracy If you want to manually edit the jitter noise parameters uncheck the box next
8. S12p_pin2pin 642010 512plLoss Sinch_4mils_ustrip s4plLoss inch 4mils_ustrip s4plLoee Combined CH Amplitude mv Amplitude mM 24 28 12 04 tae j 5 55 11 88 17 Bo 3 2335 23 87 Time bet mpulse Response Single Bit Response Channel Analysis The following figure shows the Channel Analysis GUI Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 113 Figure 2 93 Channel Analysis User Interface Nw JNEye Demo s12p Loss Fitted Demo s12p Loss Demo s12p FEXT Demo s12p FEXT 2 L Min IL Max XTLK PS Amplitude dB 000 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 30 00 Frequency GHz Right mouse click to zoom pan plot Data Cursor ALTERA JNEye Channel Viewer Channel Viewer 150401_Channel_Analysis Demo Channel Analysis Configuration Max Freq 15 20 80 Tr f 30 Nom max IL at Nyq 25 NEXT Amplitude 12 FEXT Amplitude 12 NEXT Tr f 30 FEXT Tr f 30 Crosstalk dB Factor 20 Compliance Mask Custom IL Min Mask Freq Amp dB 10 1e9 1 IL Max Mask Freq Amp dB 1 3 2e9 15 ILD Min Mask Freq Amp dB In the Channel Analysis Configuration panel the following parameters can be configured to your link configuration or preferences Max Freq Maximum frequency where channel analysis
9. UG 1146 2 52 Characterization Data Access 2015 05 04 Figure 2 34 JNEye Receiver Jitter Noise Configuration Window 2 ALTERA JNEye Receiver Jitter Noise Configuration ALTERA JNEye Receiver Jitter and Noise Configuration Jitter Noize Configuration Deterministic Jitter DJ Method Bounded Uncorrelated Jitter BUJ Method Deterministic Noise DN Method Bounded Uncorrelated Noise BUN Method Truncated Gaussian Band Peakio RMS Raio 14 0 Random Noise RN Method si Noise PDF Method Mier Classfication Diagram in the jtter noise component mode it is assumed that all jtter noise types do not ganan j r i LU r N r o Jupes 0 L9 JNtye Receiver Jitter Noise Configuration Characterization Data Access You can retrieve the receiver jitter values from the built in device characterization database JNEye supports Arria 10 GX SX GT Stratix V GT Stratix V GX and Arria V GZ characterization database access upon request If you need this capability contact your Altera representative or supporting team for details Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Characterization Data Access 2 53 Use the following guidelines for characterization data access e When Stratix V GX Stratix V GT Arria V GZ or Arria 10 GX SX GT is selected the Characteriza tion Data Access button appears and you can include the receiver jitter parameters in the simu
10. e Hexadecimal Hexadecimal strings start with 0x For example a PRBS 7 test pattern can be specified by 0x8cd501fbe7ae1ba62b05e3b64a4272d0 The custom file name must have a hex extension e Binary Binary strings have a format such as 001000111 Blank characters and new lines returns are allowed in the input binary string file The custom file name must have a bin extension Note The custom test pattern has a maximum text length of 262 142 characters about 1M bits with a hexadecimal text format or about 246K bits with a binary text format Altera recommends that the test pattern string hexadecimal or binary is specified in a single row without spaces especially for long custom test patterns If a custom test pattern is input with multiple lines of text the line returns or end of line control characters on each line of text are counted as an item or entry by the text parser Reference Clock Specifies the reference clock that feeds into the transmitter The supported clock frequencies are shown in MHz By default the reference is assumed to be ideal without any noise or jitter You can configure and specify the reference clock characteristics by clicking Reference Clock Option The reference clock can be fed to a transmitter with or without enabling a phase locked loop PLL module When the transmitter PLL is disabled or not present the reference clock noise and jitter directly affects the serial output signal With integer
11. Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel Viewer Module 2 99 Figure 2 78 Start JNEye Channel Viewer from JNEye Controller Module el JNEye ALTERA JNEye Release 14 1 Transmitter Channel Receiver TestPoint f Connect X m Ega Delete Batch Channel Sim Setup ess eceiver View in Channel iewer Start Channel Viewer Properties b with existing channel components Demo s12p ID 3 Start Channel Viewer Link and Simulation Setting i Receiver CES Aa seethe selected channel From Transmitter Channel Test Point Name Tua ie TRI E dd Aog Rel Loss 2 2 Start new Channel Viewer There are four ways to start JNEye Channel Viewer e Double click the JNEye_Channel_Viewer_SA exe icon in Windows Explorer e Click Channel Viewer in the JNEye Control Module to start a new Channel Viewer refer to the previous figure e Click Channel Viewer in the JNEye Control Module s Channel tab refer to the following figure When you start JNEye Channel Viewer from the Channel tab the channel information from the link configuration is transferred to the Channel View and is ready for viewing e Select a channel in JNEye Control Module s Link Designer right click and select View in Channel Viewer The following figure shows the JNEye Channel Viewer user interface The viewer has six panels that allow you to select and control the channel plot option
12. Frequency GHz AC Coupling Capacitor 0 nF Shunt Capacitor 0 p F Series Inductor mim ud Passivity Check No Passivity Violation Causality Check Channel is causal OK 7 Add three more crosstalk channels using this procedure Add the channel model files VSR_XTLK2 s4p VSR_XTLK3 s4p and VSR_XTLK4 s4p to the Link Designer workspace Assign the following frequency offsets for each crosstalk channel respectively 600 ppm 900 ppm and 1200 ppm Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 4 9 2015 05 04 Completing the System Completing the System All the link components are now chosen and placed in the Link Designer Click Connect in the Link Designer to begin connecting the components Refer to the Link and Simulation Setting section for link construction in the Link Designer The following figure shows the completed link system Figure 4 8 Complete VSR 28 Gbps Link Connection in Link Designer Release 15 0 L i Iram fad COE IN VSR Thr s p Altera Arria 10 GT Troie i p all gt a zi pom e VSR TIKA s4p TITLE We am A From Transmitter AC Shunt Agg Channel Test Point Name Cap Cap ID VSR ET s4p VSR ATLET sip VSR XILK2 s4p 4 VSR XTLK3 s4p 5 VSR XILK4 sdp To Receiver The link configuration is complete Use the Save Save as buttons to save the configuration for later use Analysis Use the Channel Vi
13. UI V Area UI V TX Output Scope 0 7412 0 8073 0 5984 TX Output PO 25929 0 7894 0 4679 Channel Output 200000 0 0000 0 0000 CTLE Output Retimed 20 4111 0 1929 0 07592 Eye Mask Margin SOULS 0 1129 CTLE Output 20 32 90 7 0 1462 0 0444 Eye Mask Margin 20 0057 0 0762 DFE Output Retimed 0 5 000 OMERE 020937 Eye Mask Margin Oe 906 DENDO ANC DFE Output 0 3408 Ou LSTI 9 0539 Eye Mask Margin 0 0314 0 0673 p dir dir dir dir dir di div div dir dir dir dir di div div dir dir dir dir dir dir di dir dir dir dir di dir di dir dir dir dir diro dies di dir dir dir dir diro dir dir dir dir dir dir dir dir dir dir dir dir dir diro dir dir dir dir dir dir diro di dir dir dir dir dir dios dir dir di dir dir dio diro div di dir dir dir dir diris XC ck ck ck CK oc ockockock ck ok Ko ckockock ck ck ko kockck ck kk Simulation Time 0 1 6 Overall Simulation Time 0 1 21 Use the Data Viewer to see previous JNEye simulation results by clicking Load A file browser opens and helps you find the master JNEye output data file JNEye Sim Result jneomlist for individual Functional Description Altera Corporation GJ Send Feedback UG 1146 2 98 JNEye Channel Viewer Module 2015 05 04 simulations JNEye simulation output data is usually located in a file directory that has the same name as the saved project name For example if the saved JNEye configuration file is Demol jne the previous simu
14. With a high impedance probe the waveform signal or eye diagram is plotted by emulating a high impedance probe sensing the probe location Jitter Analysis Options JNEye can perform jitter decomposition and analysis on a waveform at specified test points The jitter analysis feature is in the beta testing stage in the JNEye 15 0 release e Disable Jitter analysis is disabled e Jitter Component Using proprietary algorithms JNEye performs a series of spectrum and probability density function PDF analyses on the time interval error TIE record of the simulated waveforms The jitter decomposition algorithms extract various jitter components as shown in the following figure Functional Description Altera Corporation GJ Send Feedback A UG 1146 2 20 Link and Simulation Setting 2015 05 04 Figure 2 13 Jitter Component Supported in JNEye Jitter Analysis Feature The jitter decomposition process conceptual is shown in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Link and Simulation Setting 2 21 Figure 2 14 Jitter Decomposition Process Conceptual TIE Extraction Jitter PDF Analysis Jitter Spectrum Analysis In JNEye 15 0 the following jitter components are extracted and reported e PJ Periodic jitter peak peak e DCD Duty cycle distortion peak peak e ISI Inter symbol interference peak peak e BUJ Bounded uncorrelated jitter
15. and after RX CDR with transmitter and receiver s intrinsic jitter black The associated random jitter from the phase noise power spectrum at each of the above stages are calculated and displayed in the text below the plot Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Analysis zs Figure 3 25 Phase Noise of Reference Clock and Its Transitions through PLL and CDR JNEye Data Viewer 64 DFE CDR Phase Noise 37 23 RetCLK PN T After PLL PN After PLL PN Intrin 3733 i After CDR PN 8733 z After CDR PN ntrin 117 33 wo cadem 157 33 o 37233 e i i i 5 19233 P ON 1 E D a E uu U 287 33 r 317 33 1 00 10 00 100 00 1000 00 10000 00 100000 00 1000000 00 10000000 0 100000000 1000000000 0 00 DO Offset Frequency Hz Random Jitter RJ Components After PLL Total RJ 26 281 ps rms RJ from RefCLE 26 211 ps rms RJ from intrinsic source 1 000 ps rms After Measurement COR Total RJ 1 822 ps rms RJ from RefCLK 7 081 fs rms RJ from intrinsic source 1 822 ps rms These examples demonstrated how to use JNEye to set up a serial link and evaluate its link performance JNEye allows you to e Configure a link e Configure an external reference clock e Configure a transmitter and receiver e Configure a channel e Configure and model jitter and noise sources e Derive accurate jitter figures for Altera devices from the
16. 7 Transmission PQ20401N4K130178 s4p hem l ID 2 Altera Arria 10GT Receiver tiie m Altera Arria 10 G ae Victim TX Aggressor R FEXT PQ20401 e bi bom Individual Aggressor TX Data Rate 12 5 v Gbps Test Pattem PRBS 15 B VOD 0 8 V Note on transmitter pre emphasis input 7 in manual input mode Raich beni Transmitter tab page Transmitter Type 2 Example Strat V GX 7 0 20 3 represents pretap level is 7 posttap 1 is 20 and posttap 2 is 3 Pre emphasis FIR 1 0 5 1 3 When user input does not match the TX FIR configuration the TX pre emphasis will be disabled in simulation Functional Description Altera Corporation GJ Send Feedback UG 1146 2 68 Channel Setting 2015 05 04 Location For multiple channel lane S parameters simulating crosstalk effects you must specify the ageressor location For example the above figures show four possible crosstalk configurations from a 12 port S parameter model Use the Aggressor Location menu in the Channel Wizard to change the ageressor location The Aggressor ID field is ignored for a victim channel Loss type Note The Aggressor ID index excludes victim lanes For example in a 12 port S parameter there are three lanes If the middle lane Lane ID 2 is a victim lane the two aggressor channels have Aggressor ID 1 and 2 not 1 and 3 Relative Amplitude Each crosstalk aggressor can have different aggressor amplitude re
17. Frequency GHz 3 33333333e7 amar Bm r mere meee JL a The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit Altera Corporation Functional Description C Send Feedback UG 1146 l A 2015 05 04 JNEye Channel Designer After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel characteristics may have changed Click Analyze to redraw the channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or the X button of the window the design will be discarded RLGC Transmission Line Component The channel will be constructed with unit length RLGC models A typical RLGC transmission line structure is shown in the following figure with these parameters e Input parameters e L Unit Length inductance in various units e Rdc Unit length DC resistance in various units e Rac Unit length skin effect resistance in various units e C Unit leng
18. Functional Description GJ Send Feedback Altera Corporation Input Input Output UG 1146 2 104 Plot Option Panel 2015 05 04 The Channel List Panel contains the following command buttons Add Channel Open a file browser and locate the required channel model files Delete Delete a channel or test point Duplicate Duplicate the selected channel component or test point in the channel list Disable Disable the selected channel component or test point Enable Enable the selected channel component or test point Clear Delete all channel components and test points Load Load channel list and channel viewer configuration Save Save current channel list and channel viewer configuration Save as Save current channel list and channel viewer configuration in a new configuration file Move Up Move the selected channel component or test point up toward the transmitter side Move Down Move the selected channel component or test point down toward the receiver side Plot Option Panel The Plot Option panel has the following sub panels Altera Corporation S parameter mode panel Plot configuration panel Functional Description GJ Send Feedback UG 1146 are 2015 05 04 S parameter Mode Panel S parameter Mode Panel Figure 2 85 S parameter Mode Panel 7 NN JNEye ALTERA JNEye Channel Viewer P Channel Viewer v Rite F Sdd11 7 Sdd12 7 Sdc11 7 Sdc12 4 Sdd21 Sdd22 Sdc21 S
19. JANOS R3 AN 101 Innovation Drive San Jose CA 95134 UG 1146 4 2 Methodology 2015 05 04 To accomplish these goals set up a transmitter model a receiver model and a link with the following parameters e Data rate 28 Gbps e Test pattern PRBS 31 e BER target BER lt 10 P e Arria 10 GT transmitter Vor 28 1000 mV e Edge rate Per Arria 10 GT characteristics e 5 Tap TX FIR 2 pre taps and 2 post taps e Arria 10 GT package model embedded e PLL ATX LC set to low bandwidth e Output Jitter DCD BUJ and RJ are from JNEye Characterization Data Access e DCD 0 015 UI e BUJ 0 037 UI e RJ 0 211 pspms e Arria 10 GT receiver e CILE in High Data Rate mode Peak Frequency 3 e DFE is disabled e VGA Bandwidth 3 e Arria 10 GT package model embedded e CDR Bandwidth High e Jitter from JNEye Characterization Data Access DJ 0 112 UI RJ 0 421 PSRMS Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 a A 2015 05 04 Setup and Initialization 4 3 Figure 4 2 OIF VSR Channel Characteristics 3 B CU UEECUENNERO00 0M M ALTERA JNEye Channel Viewer E OOOO j JNEye ALTERA JNEye Channel Viewer Channel Viewer 141114 A10 GT 28G VSR be Plot Configuration S parameter Mode Plot Option Freq Axis Max Freq Amplitude dB CIA Neem a Jx 001 v sx 001 F 31723 aL 54 10 VSR Thru s4p Loss
20. Ta a a E lt I Location Relative Amplitude Delay L 0 Frequency Offset p 0 ppm Aggressor fequency offset is negative only Maximum aggressor frequency offset is 950 000 ppm Ss hange Channel Ci r 21 r d 8 01 10 01 12 01 14 01 16 01 18 01 Frequency GHz AC Coupling Capacitor B 0 nF Shunt Capacitor a 0 pF Series Inductor p Passivity Check Passi Causality Check Somewhat non causal OK e Lane This field lists the channel lane ID number For channel lane S parameters that are 8 port and above a channel lane must be chosen for link simulations For example the above figures show a 12 port 3 lane S parameter After loading the channel file JNEye assigns the center lane as the default simulating channel or victim channel for crosstalk simulations Use the Channel Wizard to change the lane ID For 2 port or 4 port S parameter models the lane ID is ignored e Rev This field indicates whether the channel signal flow direction is to be reversed This is generally used for the device package model when you want to make sure transmitter and receiver devices are connected to the die side of the package S parameter model Refer to the S parameter comment section for S parameter signal flow configuration e AC Cap This field records AC coupling capacitor value in nF nano Farad 10 F e Shunt Cap This field records shunt capacitance value in pF pico Farad 10 1 F Altera Corporation Fu
21. Table 2 6 Transmitter PVT Model Coverage Transmitter Type Waveform PVT Model Jitter Noise PVT Model Stratix V GX Typical Process Typical Fast Slow Voltage Typical High Low Temperature 40 C to 100 C Arria V GZ Typical Process Typical Fast Slow Voltage Typical High Low Temperature 40 C to 100 C Stratix V GT Typical Process Typical Fast Slow Voltage Typical High Low Temperature 0 C to 100 C Arria 10 GX SX Typical Fast Slow Typical Arria 10 GT Typical Fast Slow Typical IBIS AMI Provide by IBIS AMI Provide by IBIS AMI model model JNEye to Quartus II Parameter Translation for Arria 10 GX SX GT Transmitters The following table provides a translation from JNEye Arria 10 GX SX GT transmitter parameter names to the equivalent Quartus II parameter names Use the Quartus II software to transfer optimum device settings from a JNEye simulation to an actual device configuration Functional Description Altera Corporation GJ Send Feedback UG 1146 2 26 Jitter Noise Component 2015 05 04 Table 2 7 JNEye to Quartus Il Parameter Translation for Arria 10 GX SX GT Transmitters JNEye Name Quartus Il Name Vod Selection Post Tap 1 Post Tap 2 Pre Tap 1 Pre Tap 2 Sign of Post Tap 1 Sign of Post Tap 2 Sign of Pre Tap 1 Sign of Pre Tap 2 PLL Type e ATX LC e Fractional PLL e CMU PLL Bandwidth Transmitter Output Swing Level Transmitter Pre Emphasis First Post Tap Magnitude
22. e Periodic Jitter Type Same as in Option 1 Reference Clock Jitter e Plot Update Plot You can plot the input phase noise and spurs in the plotting area and confirm the reference clock characteristics Link Optimization Method JNEye can find optimal transmitter and receiver equalization settings with a user specified link configura tion Note The TX RX joint link optimization function is specific to JNEye and may not be supported by the transmitter and receiver devices Table 2 4 Link Operation Modes Supported by JNEye Manual Manual Both TX and RX equalizations are manually set Auto Manual JNEye finds optimal TX equalization setting RX EQ NUTUS ET setting is manually set Starting Point Manual Auto TX EQ is manually set JNEye finds optimal RX EQ setting Auto Auto JNEye finds both TX and RX EQ settings Auto with Manual Starting Point JNEye has four link optimization methods for finding the optimal link setting such as a transmitter pre emphasis and receiver CTLE and DFE with a given link configuration Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Link and Simulation Setting 2 15 FIR gt CTLE gt DFE default Optimizes the link performance by finding the optimal transmitter setting receiver equalization setting or both This method prioritizes the transmitter equalization such as pre emphasis de emphasis or FIR based over receiver equalization schemes However t
23. esa O O O 1 ERA IBIS File ibs a10 m 5pliibs X Componer a E tan Click here to selectan AMI Status IBIS AMI model file Model alm o V Automatic Jitter Noise Update Model Selector a10_rx_100 v Manual Jitter Noise Update Comer Typ 4 AMI File ami alO0 rx 5p1 ami DLL File dil alO0gx ami rx x86 dll IBIS Model a 10 ix 5pT ibs Power Clamp VI data is not avaiable e Package Package models are required in all IBIS models JNEye includes the IBIS package model in the simulation by default You can choose other package models by changing the Package selection to Custom and specifying the external package model Channel type Package as a channel component e IBIS Files Click the file open button next to the IBIS File text box to select an IBIS model file JNEye scans through the IBIS file and allocates all available receiver components and models If JNEye encounters any of the following issues in opening or interpreting the IBIS AMI model a warning message will be shown e No receiver component or model can be located e The DLL for the computer platform cannot be located Note that the IBIS AMI model is platform dependent For example a 32 bit DLL is required to simulate in a 32 bit link simulator A 64 bit DLL is required to simulate in a 64 bit simulator A 32 bit DLL cannot simulate with a 64 bit DLL in the same simulation The DLL occupies so much memory that JNEye was not able
24. limited to the maximum text length allowed by the text box the maximum size is 32767 bytes The frequency grid of a mask must be monotonic increasing Load from file Allows you to load a predefined custom channel compliance Each mask definition starts with a keyword followed by a pair of numbers that represent the data points for Frequency Hz and Amplitude dB Following is a sample of a custom channel compliance mask file IL Mask Min 1 0 Le 1 l0e9 2 5 IL Mask Max 1 0 le9 1 10e9 2 5 ILD Mask Min 1 0 le9 4 10e9 4 ILD Mask Max 1 0 le9 4 10e9 4 RL Mask 1 10 1e9 10 10e9 4 ICR Mask Ley 55 25e9 25 ICN Mask 1 10 5 10 25 0 When you click Plot the Channel Viewer computes and generates a sequence of plots that show the performance of the channels in the channel list e Insertion Loss Plot This plot is labeled CP IL In this plot the insertion loss of channels fitted curve of transmission channels insertion loss crosstalk channels amplitude and power sum of all crosstalk channels is shown An example is illustrated in the above figure e Insertion Loss Deviation Plot This plot is labeled CP ILD In this plot the insertion loss deviation is shown as in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 115 Figure 2 94 Channel Analysis Module s Insertion Loss Deviation ILD Analysis Exam
25. you use the CTLE gt FIR gt DFE link optimization method Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Setup and Initialization First start JNEye Input the following settings in the control module Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Setting Up the Control Module Link and Simulation Tab Figure 3 5 Link and Simulation Setting Data Rate 8 Gbps Project Name mem Simulation Length 65536 Bts Simulation Mode Target BER 10 12 Output Options Test Pattem PRBS 23 in Note Partial test pattem is used Please referto Use Test Point Location Ws Aad Cock mere EDD Pabe Te Reference Cock Setting Reference Clock Option M Reference Cock Option 2 Jitter Analysis Tm rk Optinzation Method CLE FRAOFE ar ommum PD ol bul enone Nine Compliance Mask PCI Express SGT Y Set the following parameters in the Link and Simulation Setting tab e Data Rate 8 Gbps e Simulation Length 65536 Bits e Target BER 10 12 e Test Pattern PRBS 23 e Reference Clock 100 MHz e Link Optimization Method CTLE gt FIR amp DFE e FOM of Link Optimization Area e Compliance Mask PCI Express 8GT e Project Name Demo Altera Corporation Tutorial PCI Expr
26. 1146 2015 05 04 displayed No transmitter component or model can be located The DLL for the computer platform cannot be located The IBIS AMI model is platform dependent For example a 32 bit DLL is required to simulate in a 32 bit link simulator and a 64 bit DLL is required to simulate in a 64 bit simulator A 32 bit DLL cannot simulate in a 64 bit DLL simulator The DLL occupies too much memory and JNEye was not able to load it However JNEye might be able to run the simulation with such a DLL because of memory allocation differences in the JNEye GUI and the simulation engine e Component Select an IBIS component from the IBIS model e IBIS tab The IBIS tab shows the following configuration parameters AMI tab Model Select a device model within a component of an IBIS model Model Selector Select a model from the model selector list Corner Select the corner type of a device model The choices are Typ Min and Max AMI File Shows the AMI file specified in the IBIS model Note JNEye currently only supports device models with AMI modeling components DLL File Shows the DLL file specified in the IBIS model Use External Termination A checked box indicates that an external termination is used in the simulation The external termination single ended is specified in the text box on the right The default setting is not using external termination and the default external termination if applicable is 50 ohms single
27. A typical stripline structure is shown in the following figure with these parameters e Input parameters W Signal trace width in various units L Signal trace length in various units T Signal trace thickness in various units H Separation between ground planes in various units Er Dk Relative dielectric constant JNEye Channel Designer supports frequency dependent dielectric constant mapping TanD Df Dielectric loss tangent JNEye Channel Designer supports frequency dependent dissipation factor mapping Cond Conductor conductivity S m Rough Surface roughness in various units Mur Relative permeability no unit Freq Frequency where the Z0 Impedance and E Eff electrical length are reported in various units e Output parameters Z0 Impedance at specified frequency Freq Ohm E Eff Electrical length in various units Figure 2 113 Stripline Channel Component Configuration ae o T a a E lt 0 01 1e8 0 01 1e3 0 011 2e9 E 501 10 01 1501 2001 2501 0 0115 5e9 Frequency GHz TUE e Ommam The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit Functional Description GJ Send Feedback Altera Corporation UG 1146 2 138 JNEye Channel Designer 20
28. Designer 2 131 View Select Sim Result Open and load simulation result if available of the selected job Move Up Move the highlighted job forward in the job list Move Down V Mowve the highlighted job toward to back of the job list Load Load JNEye Batch Simulation Controller configuration file Save Save as Save or save new JNEye Batch Simulation Controller configuration file Exit Exit the JNEye Batch Simulation Controller Stop Stop batch simulation of jobs Start Batch Simulation Start batch simulation of all not executed jobs in the job list Maximum Concurrent Simulation Session Set the number of concurrent simulations JNEye Batch Simulation Controller monitors the number of executing jobs It starts a new simulation job when the computing resource is available Simulation Result Display Option This menu controls the simulation result display option There are three options e Display Result When each simulation is completed a new Data Viewer window will open and show the result e Ask to Display Result When each simulation is completed a message box will open and ask if the simulation results will be shown e Manually Select Job amp Display Result This is the default option When a job is finished no result will be shown You must manually select the job and click View Selected Sim Result to see the simulation results Simulation Window Close Time When a simulation is completed the JNEye S
29. Eye 30 CTLE BER Contour 31 CTLE Eye Width G Fact 00 30 00 4000 5000 60 00 70 00 CILE Height G Fac a CTIF ERE Tine aen 4 t t BER Target Aight mouse cick fo zoom ban wavefoam image Out Save Selected Plot Save All Plots Load ccurances Rise Fall Time Histogram er eee 11122014 5 17 21 PM Demo JNEye_Sim_Result Waveform C Data Cursor UG 1146 2015 05 04 ALTERA JNEye Data Viewer Data Viewer Demo EE Rise EN Fall EH Rise Fall 90 00 100 00 115 00 120 00 For Hybrid mode or Full Waveform mode simulations a waveform of each test point is plotted The Data Viewer by default displays the final 4096 bits of the waveform Use the following settings to specify the location of the waveform e Plot The Plot menu specifies the reference location of the simulated waveform It has the following choices e Beginning plots the waveform from the beginning of the simulation e End displays the last part of simulated waveform e Custom you specify the starting and ending bit locations e Length If the Plot selection is Beginning or End the length of waveform in bits to be plotted is specified e From to If the Plot selection is Custom these two entries specify the start and end points of waveform in bits to be plotted Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Data Vie
30. Figure 2 12 Diamond Shaped Eye Diagram Mask Editor m Re Rm ee oe A custom eye diagram mask can be saved and loaded for future use Project Name A user defined name for the current task project Currently the session name is the saved user configura tion file name when the simulation configuration is saved Notes e The simulation results are automatically written to a directory with the same project name e The location of the output directory can be configured as a the same location as the project configura tion file jne jneschm this is the default or b a location you specify in the System Options Refer to the System Options section for details Simulation Mode JNEye provides three simulation modes statistical full waveform and hybrid to meet your simulation and link analysis preferences and needs Hybrid mode is the default Functional Description GJ Send Feedback Altera Corporation DE UG 1146 z Link and Simulation Setting 2015 05 04 Table 2 5 Simulation Modes PDF Probability Density Function Statistical Mode Full Waveform Mode Hybrid Mode Default Simulation Method Statistical Method Time domain Method Time domain and Statistical Methods Jitter Injection and Statistical Domain Time Domain Mixed Domain Time Simulation PDF based Domain and PDF based Noise Injection and Statistical Domain Time Domain Mixed Domain Time Simulation PDF based Domain and PDF based S
31. GHz which requires heavy TX and RX equalizations to achieve the required BER target For comparative purposes the following table and figure show a typical external 100 MHz transmitter reference clock with measured phase noise characteristics and spurs at three different frequencies Table 3 1 Phase Noise Characteristics Phase Noise 10 Hz 100 KHz 100 Hz 90 Altera Corporation Tutorial PCI Express 8GT send Feedback UG 1146 2015 05 04 Phase Noise Methodology 3 5 Spurs 1 KHz oe E E fe ALTERA JNEye Reference Clock Configuration mL Ideal Reference Clock Option 1 Reference Clock Jitter Option Z Phase Noise Select TX Reference Clock Option 2 Phase Noise dBc Hz JNEye Reference Clock Configuration NEN ALTERA JNEye Reference Clock Configuration Reference Clock Noise Profile 10000 00 100000 00 1000000 00 Mant Cees PL Frequency 0 0 Hz Amplitude 0 0 Phase Offset Auto Hershey Shape Key 0 05 Sharkfin Shape Key The PLL in the Stratix V GX transmitter is enabled using ATX LC with low bandwidth configuration The PLL effectively reduces the noise effects from the external reference clock Tutorial PCI Express 8GT GJ Send Feedback Altera Corporation UM UG 1146 3 6 Setup and Initialization 2015 05 04 Use the JNEye s link optimization algorithm to find the optimal equalization settings for both the transmitter and receiver In this demonstration
32. JNEye a To improve the performance of the JNEye 64 bit version the JNEye Installer asks for administra tion level access right to install additional Microsoft NET components b Ifthe installer cannot get administration level access the installation installs both 32 bit and 64 bit JNEye components You can install the additional NET components after installation when you can grant administration level access to your computer c Ifthe installer can acquire the administration level access given user approval acknowledge the installer automatically includes and installs the additional NET components The installation process is much longer can exceed 10 minutes than previous JNEye releases 3 Execute JNEye exe to start JNEye The JNEye 15 0 release comes with both 32 bit and 64 bit executa bles 32 bit JNEye is located in JNEye Installation Directory gt bin and 64 bit JNEye is in lt JNEye Installation Directory gt bin64 JNEye requires an Altera Quartus II Subscription License to perform simulations and view channel characteristics Contact your Altera sales supports or your system administrator if you have questions about obtaining an Altera Quartus II Subscription License JNEye automatically checks the license server specified in the system environment variable LM LICENSE FILE for the required license The license checking configuration can be configured by editing the following entries in the configuration file JAEye Config
33. Jitter 0 784156 ps RMS Bit Errors 0 p dir dir dir dir dir di div div dir dir dir dir di dir di dir dir dir dir dir dir div dir dir dir dir dir dir div dir dir dir dir diro dir div dir dir dir dir dir dir div dir dir dir dios dir diro dir dir dir dir dir dios dir dir dir dir dir dir diro dir dir dir dir dir dir dir dir dir dir dir dir dio diro dir di dir dir dir dir diris KKEKKKKKKKKKKKKKKKKK Simulation Result Summary mucus cse TX FIR Pre emphasis RX CTLE and DER Settings Aere area nes Pre emphasis Pre tapl main tap Post tapli POS t tap2 Levels 20 000 0 000 0 000 0 000 Coeff 20 000 1 000 0 000 0 000 CILE Setting CODO 0 000 dB AC 12 000 PW 12 000 Volt 1 000 CTLE AC Gain 14 411 dB DFE tap1 tap2 tap3 tap4 tap Levels P0000 1 000 000 Urs DOO 0 000 Coeff 0000 0 036 0 036 0 000 0000 p dir dir dir dir dir di div div dir dir dir dir di dir div dir dir dir dir dir dir div dir dir dir di dios dir div di dir dir dir dios dir div dir dir dir dir dir dir div dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir di dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir dir di dir diris XC ck ck ck Ck ockockockckock Ko kockockck ck ck ko kock ck ck kk Tx ewe ke Diagram Wirt and Eye Diagram HelgDb Ws979 9099 8 8089 ann eee Eye Width Eye Height Eye Opening
34. PLLs JNEye supports an integer divider ratio between the data rate and the reference clock frequency If the ratio is not an integer the reference clock frequency is rounded to the closest integer divided ratio frequency The actual reference clock frequency used in the simulation is displayed in the message box next to the pull down menu With fractional N PLLs fractional divider ratios are allowed In the simulation with specific transmitter devices such as Arria 10 GX SX GT Stratix V GT Stratix V GX and Arria V GZ devices the supported data rate to reference clock divider ratios are limited If a specific combination of data rate PLL divider ratio and reference clock frequency cannot be found the reference clock used in the simulation can be further adjusted Functional Description Altera Corporation GJ Send Feedback m UG 1146 A Link and Simulation Setting 2015 05 04 The reference clock frequencies listed are commonly used in most serial link protocols If you cannot find the exact reference clock frequency from the list you can add your reference clock frequency with the following procedure Close JNEye Navigate to the JNEye installation directory Typically JNEye is installed in C altera 15 0 jneye Under the Database folder find RefCLK List jnetxdata Edit the file by adding your desired reference clock frequencies Save the change and exit the editor Restart JNEye DNH Reference Clock Option The refer
35. Package type to the Link Designer workspace the receiver is simulated without any package model Functional Description Altera Corporation GJ Send Feedback MT l l UG 1146 T Receiver Setting 2015 05 04 JNEye comes with the following receiver package models e Stratix V GX e Arria V GZ e Stratix V GT e Arria 10 GX SX Options Additional package models shown in the following figure are available for Arria 10 devices The package model is specified as its trace length inside the package These models are chosen to cover the range of package trace lengths in Arria 10 transceiver transmitters e Default The default package model is same as the 14 mm option e 14mm e 16 5mm e 20mm e 24mm Contact your Altera s representative if you would like to know how to pair your design with the Arria 10 package model options Figure 2 33 Arria 10 Receiver Package Options Link and Simulation Setting Transmitter First Floating DFE Tap COR Type andwa lean 7 Supply Voltage Defaut BP v PVT Typical v Vom PVT Model Coverage Waveform e Arria 10 GT Same options as Arria 10 GX SX e PCI Express 8GT CTLE Setting Select or specify the CTLE Continuous Time Linear Equalizer operation mode and model Auto Manual and Off if available settings are supported Altera Corporation Functional Description GJ Send Feedback UG 1146 Receiver Setting 2 45 e Stratix V GX Arria V GZ Stratix V GT Arria 10
36. VSR_XTLK1 s4p FEXT VSR XTLK2 s4p FEXT VSR_XTLK3 s4p FEXT VSR_XTLK4 s4p FEXT 20 00 Frequency GHz Output Options Channel Test Point Name Type Pot Cfg Lane Agg ID Rel Amp Output Image Type Disable OSS 2 Output Directory im iiia ia Ll E E i Save current plot to a file VSR XILK2 s4p VSR XTLK3 s4p The JNEye Channel Viewer shows that the channel has approximately 7 4 dB loss at 14 GHz The four crosstalk channels have an amplitude of about 45 dB at 14 GHz Use the ideal transmitter reference clock to simulate a more ideal case The PLL in the Arria 10 GT transmitter is enabled using ATX LC with low bandwidth configuration Use the JNEye s link optimization algorithm to find optimal equalization settings for both the transmitter and receiver This demonstration uses the FIR gt CTLE gt DFE link optimization method Setup and Initialization First start JNEye Input the following settings in the control module Tutorial 28 Gbps OIF VSR Link with Arria 10 GT GJ Send Feedback Altera Corporation UG 1146 4 4 Setting Up the Control Module 2015 05 04 Setting Up the Control Module Link and Simulation Tab Figure 4 3 Link and Simulation Settings Link and Simulation Setting Sedan Corinto Data Rate l 28 0 Gbps Project Name 150402_A10GT_VSR_CTLE Smdtion rth MS Slaton Mode Target BER woo s Output Options Test Pattem Pattem Designer
37. a set of typical FIR coefficients is included in the pull down menu e Off Estimated TX EQ AC Gain Select pre tap and post tap values to estimate the AC gain in dB scale The TX EQ AC gain is calculated as the gain between the DC 0 Hz and the Nyquist frequency of the link assuming a FIR type of transmitter pre emphasis scheme Note This is a rough analytical estimate of TX EQ AC gain that may differ from the actual AC gain generated by the transmitter PLL Type and Bandwidth Select the type and bandwidth of the PLL used in the transmitter to generate the transmitter clock e Ideal Clock The default PLL setting The PLL is disabled and the clock is passed from the external reference clock e For Altera transmitters PLL models and configurations are automatically set based on the following settings e Data rate e Reference clock frequency e Oscillator type e Stratix V GX and Arria VGZ ATX LC or CMU e Stratix V GI ATX LC e Arria 10 GX SX GT ATX LC Fractional PLL or CMU e PLL bandwidth e Altera transmitter PLL configurations such as internal divider ratios Altera recommends that you follow Altera s reference clock selection and PLL configurations recommendations when setting up the transmitter PLL Without following the reference clock and PLL guidelines you might operate and simulate an unstable PLL and see unexpected results e For Custom transmitters PLL models and configuration are set automatically based o
38. and eye diagram height 25 mV refer to PCI Express Base Specification 4 3 Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Analysis 3 23 Figure 3 23 TP4 Hybrid Eye Diagram and BER Analysis Measured with Ideal Clock Amphiiude mv Ampatude mv 124 24 f oe 3000 200 000 2500 3000 7309 0009 T2300 2500 PR pa L om 5328 Dr Berii Dosuracc 55 Leg IB BE FS Vockairens Ocean Amplitude my D Face t ug Time pa The PCI Express 8GT eye diagram mask is shown in the following figure to see the margins to the specifi cation limits Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 24 Analysis 2015 05 04 Figure 3 24 TP4 Hybrid Eye Diagram Measured with CDR Recovered Clock and PCI Express 8GT Receiver Eye Diagram Mask Ampitude mM Amplitude mV TE S06 500 000 2900 O00 7505 0000 12500 3800 B 2500 60 2300 SO T7500 Mp a c Femma Doc omnc 4 Log t BER Foire D cruemn ra ace ete 122200 Amplitude a D Factor 8 Time pa Time ps i When you enable a CDR in a receiver the reference clock s phase noise is shaped and filtered with the CDR s response The following figure shows the characteristics of phase noise at the output of the reference clock blue after transmitter PLL red after transmitter PLL plus transmitter s intrinsic jitter red after RX CDR cyan
39. and then click View using Channel Wizard The JNEye Channel Wizard helps you configure the channel e To see all channels characteristics click View All using Channel Viewer to start the Channel Viewer refer to the JNEye Channel Viewer Module sections for details e Use the pull down menus or buttons below the channel list boxes to change individual channel configuration e Optionally you can edit the batch simulation file name header in the pull down menu or the text box below the channel list boxes By default JNEye uses the Date Time string as the file name header You can also type the desired header name in this box Functional Description Altera Corporation GJ Send Feedback l l l l UG 1146 2 72 Batch Channel Simulation Configuration 2015 05 04 Figure 2 55 Example of Batch Channel Selections Fo m m ALTERA JNEye Batch Simulation Channel Selection Selected Channel Optical Intel 2014041 8 viZ 125woid v1 El M E Add Channel GexmAl X View All using Channel Viewer Batch Configuration File Name Header Date Time i m RN mer mn Cine JNEye Batch Simulation Channel Selection 3 When channel selection is complete click Generate Simulation Configuration to generate JNEye simulation configuration files with the selected channels Note In the current implementation of JNEye all of the simulation configuration files generated from step 3 will be saved in JNEye installation directory After completing t
40. at each of the above stages was calculated and displayed in the text below the plot Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 22 Analysis 2015 05 04 Figure 3 22 Phase Noise of Reference Clock and Its Transitions through PLL and CDR JNEye Data Viewer 43 CTLE CDR Phase Noise 3733 RefCLK PN es After PLL PN After PLL PN Intrin H 33 i After COR PM 87 3i x After CDR PFN Intrin 117 23 I fI X oj Ww TO B 157 33 AM 17733 c 5 19233 Do mnm 237 33 257 33 1 00 10 00 100 00 1000 00 10000 00 100000 00 1000000 00 10000000 0 100000000 0 oO 00 Offset Frequency Hz Random Jitter RJ Components After PLL Total RJ 26 281 ps rms RJ from RefCLE 26 211 ps rms RJ from intrinsic source 1 000 ps rms After Measurement COR Total RJ 1 822 ps rms RJ from RefCLK 7 081 fs rms RJ from intrinsic source 1 822 ps rms At the output of the PCI Express 8G receiver s 1 Tap DFE the following figures show that the DFE has further opened the eye diagram with a total jitter of 1 UI at BER lt 10 with ideal clock and sinusoidal jitter from the transmitter reference clock and 0 53 UI with CDR recovered clock and eye diagram opening height of 0 mV with ideal clock and 66 mV with recovered clock The BER bathtub curve and contour show good behavior and successfully meet the PCI Express 8GT RX requirements TJ 0 7 UI
41. be The channel model needs to be regenerated impacted by design tools or re taken by instruments The confidence of simulation results using this channel model is low Table 2 3 Channel Causality Check Results and Recommendations Causality Violation Check Impact on Link Simulation Recommendations Results Accuracy Channel is causal Slight non causal Somewhat non causal Non causal No impact No action needed There may not be a noticeable The channel model can be further effect in the simulation result improved but the improvement in terms of simulation results accuracy can be small There may be a noticeable The channel model can be further effect in the simulation result improved The differences in terms of simulation results and accuracy are expected Simulation result will be The channel model needs to be regenerated impacted by design tools or re taken by instruments The confidence of simulation results using this channel model is low To select another S parameter within the Channel Wizard click Change Channel Note Altera recommends that you replace or change a channel with one of the same channel type Link Designer allows channel changing with different channel types but you might see inconsistent channel icons in the design workspace An existing channel can be changed by adding a new channel component or by modifying an existing channel component Right click in the Link designer module a
42. crosstalk and an Altera Arria 10 GT receiver with embedded package model The link operates at 28 Gbps with a transmitter differential output voltage Vop of about 1000 mV The test pattern is PRBS 31 and the BER target is 10 P Per Arria 10 GT specifications the transmitter has a 5 tap FIR and the receiver has CTLE and a 1 rap DFE at 28 Gbps DFE is not required in the OIF VSR standard so DFE is disabled in this tutorial 2015 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance Iso of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any 9001 2008 products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information Registered product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services
43. dat e 9696 LM License File Name License file name If a license server is used this entry is ignored The default value is na JNEye automatically checks whether a license server exists If a valid license server does not exist JNEye checks the individual license file specified in this entry e LM License Feature Name The feature or type of license to be checked out for JNEye use The default value is quartus When you execute JNEye for the first time JNEye may ask permission to create a JNEye working directory at JNEye Installation Directory XGUI Work Click Yes to use the default location To use a different working directory modify the GUIWorkDir ectory entry in JNEye Config dat Altera Corporation System Requirements and Installation Guide GJ Send Feedback UG 1146 m 2015 05 04 Program and File Types 5 If you have problems running JNEye after installing the program follow these instructions e Check whether the Microsoft Visual C 2013 library is on your system e Ifyou execute JNEye in a system that doesn t have the Microsoft Visual C 2013 library you will get an error message e Download the Visual C 2013 library from the Microsoft web site and install it Note For 64 bit Windows operating systems the 32 bit version of the Visual C 2013 library is required for running the 32 bit version JNEye e Check whether Microsoft NET Framework 4 is on your system e If you execute JNEye Release in a sys
44. e The fourth plot shows Q Factor curves which are another representation of BER bathtub curve using Q factor by assuming the noise jitter is Gaussian With the Gaussian random jitter injected into the link the BER bathtub and Q Factor plots clearly show the effects where this unbounded jitter narrows the eye diagram width as the BER target reduces Figure 4 10 TP1 Hybrid Eye Diagrams and BER Analysis Measured with Ideal Clock IHE ye Data Viewer 0 TX Eyediagram JNEye Data Viewer 1 TX BER Eye Amplinide mM Amplitude mV n Ka Log ib BER u g il E a ul t Factor Amplitude mv The second set of TX outputs are measured with the golden CDR which has a loop bandwidth of 1 1667 of the data rate This set of outputs reflects the common lab scope measurement With the golden CDR in place the low frequency jitter such as the 1 MHz sinusoidal jitter and noise which are included in phase noise and spurs are tracked When you enable a PLL in a transmitter the reference clock s phase noise is shaped and filtered with the PLL s response For a demonstration of PLL and transmitter reference clock phase noise refer to the JNEye Tutorial PCI Express 8GT Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Altera Corporation GJ Send Feedback UG 1146 4 12 Analysis 2015 05 04 The following figure shows that the transmitter output jitter which includes the transmitter output jitter is about 0 33
45. err nr E E dete EI OEE 2 101 OE AE S A e E A E A E E E 2 102 PP OI ON PA os E N E E E E T E E T EN IUBE pue eDds 2 104 EUS PANE borisi o En E EEE T E ET EEEE 2 129 NEve Datchsumulgti ni Controll eioan ib oi aet a ene nte 2 129 JNE ve Channel DeSISHET coerente iino etin itti E eS b itti ant Ne Ee ENIM LAU 2 131 Tutornb PCEExpress 9G Tuoi oci eR anae 3 1 A danse C 3 1 berup ATM AZ ENO genre IRE seta buceo E E IA N RUU EIE CRDI E GENESIS US 3 6 oethns Up ithe Contool Mod le uicina met En Cb DE Une 3 6 Cons mucti TROC Daniels ue cient err AEA tuu terres ever n atas 3 10 COIT DIEI Ene S yole Msaani a e Terre terre erent emer E ert ee ete 3 13 ULL eee 3 14 Tutorial 28 Gbps OIF VSR Link with Arria 10 GT eere 4 1 hszdpuu c C 4 1 S SIRVE ENC TANI AEN OD PRETIO TT 4 3 Seline Upthe Control iore c 4 4 Gey oy He bho Bn he C Dante Lois onec eet rT npr nrg re ery ee eer eee eei asses ee 4 6 Completing the System eeesessseeseeeeeesceeeseseescsceseseeeesceceecseecscseeacseeacaeseeseseeesseeessceeeaceeeaseees 4 9 DUC m 4 9 Altera Corporation JNEye User Guide TOC 3 Additional nformatiOn ccccccscscsscscsccscsccscecsccscsccscscsssscsccccscessscecessssesssseces Do B Cores bi
46. fi an Eua Dosurmecc 5 Amphirude mV Lin 107 80 5 si 27 80 e E 57 80 ux 5 A6 An me m aum 50s ns 3230 E ot c 2 Er E 22320 B0 Od A120 2 00 11225 L 00 DO 200 009 2500 5000 72500 BOS T2500 EE EET B cay a em aie b FT Io en 122 50 Fockairens Ditor 25 50 Ampatude mv Lop IB BE FS 500 i Oc 0 00 A 0C JG 2009 XD UO 300 3000 7509 mow TAN Hus amp 18 m Amplitude my 25 20 D Face us au Time pa Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Analysis 3 21 Figure 3 21 CTLE Output Hybrid Eye Diagram and BER Analysis with CDR Recovered Clock Ampitude myW Amplitude mV 800 B 2500 000 2800 Sono T7500 Mpe a aio has noo 23 500 S500 2500 00 2400 Do EDO 600 12800 1500 O00 Log ibpeE RR Q Factor Amplitude inv Tima ga When you enable CDR in a receiver the reference clock s phase noise is shaped and filtered with the CDR s response The following figure shows the characteristics of phase noise at the output of the reference clock blue after the transmitter PLL red after the transmitter PLL plus the transmitter s intrinsic jitter red after the RX CDR cyan and after the RX CDR with transmitter and receiver s intrinsic jitter black The associated random jitter from the phase noise power spectrum
47. in various units Mur Relative permeability no unit Freq Frequency where the Z0 Impedance and E Eff electrical length are reported in various units Output parameters Z0 Impedance at specified frequency Freq Ohm E Eff Electrical length in various units Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel Designer 2 139 Figure 2 114 Microstrip Channel Component Configuration JNEye Microstrip Designer a c o D a a E 0 01 1e8 0 01 1e9 0 011 2e9 0 0115 5e9 5 01 10 01 15 01 20 01 Frequency GHz m ao TTE Eo Cis ome CNN NN The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel characteristics may have changed Click Analyze to redraw the channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or
48. ls riu 11 to 2014 3 17 21 PM Demo JNEye Sim Result Transmitter Reference Clock Phase Noise Analysis and Plots JNEye plots the phase noise power spectrum through the link The transmitter reference clock s phase noise travels through the transmitter PLL emulated scope channel and the RX CDR In this process phase noise is shaped by the TX PLL scope pass through only and RX CDR At the same time the transmitter and receiver also generate their own intrinsic jitter which is mixed with the jitter caused by the shaped phase noise The JNEye simulation engine processes and records the phase noise characteristics transition and the amount of random jitter the device contributed internally Altera Corporation Functional Description GJ Send Feedback UG 1146 2 2015 05 04 JNEye Data Viewer Module 89 Figure 2 71 Transmitter Reference Phase Noise Analysis At Transmitter Output BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Contour 3 TX Eye Width G Factor ma ReiClK PN 2 TX Ee Height oct m j Ce ter PLL PN E TX TIE Ha QE 01 N 1 ENDO ferii sq After CDR PN 7 TX Rise Fall Time Histogr i Te 8 TX Spectrum 33 After CDR PHN Intrin 8 TX Waveforn 10 TX Scope Eyediagram 11 TX Scope BER Eye 12 TX Scope BER Contour 13 TX Scope Eye Width G 14 TX Scope Eye Height Q pe Phase Noise 15 TX Scope TIE 17 TX Scope T
49. mouse click fo zoom Dan waveform PJ 0 112 Ul DCD 0 012 Ul IS 0 021 Ul BUJ 0 089 Ul RJ RMS 6 291 ps Beta image Out Save Selected Plot Save All Plots Load I daa ric Ud 11 12 2014 3 17 21 PM Demo JNEye Sim Result Waveform Spectrum Plots The frequency spectrum of the waveform is plotted Altera Corporation 0 05 0 07 Time Ul C Data Cursor Functional Description GJ Send Feedback UG 1146 2 2015 05 04 JNEye Data Viewer Module 93 Figure 2 75 Waveform Spectrum Plot _ALTERA JNEye Data Viewer l l E ES BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Contour 3 TX Eye Width G Factor 4 TX Eye Height G Factor 5 TX TIE B TX TIE Histogram TX Rise Fall Time Histo 8 TX Waveform 10 TX Scope Eyediagram 11 TX Scope BER Eye 12 TX Scape BER Contour 13 TX Scope Eye Width Q 14 TX Scope Eye Height G 15 TX Scope Phase Noise 16 TX Scope TIE 17 TX Scape TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveform 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width G Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 29 CTLE BER Eye 30 CTLE BER Contour 31 CTLE Eye Width Q Fact 00 5 00 10 00 15 00 CILE Height G Fac per TLE Be tentur n Frequency GHz meu e Aight mouse cick fo zoom pan wav
50. not be applied even if they are visually the same Refer to the JNEye User s Guide for more information A message box appears when the Characterization Data Access button is clicked Note The characterization data is only included in the simulation when the compliance mask is disabled set to Off Refer to the Compliance Mask section for references Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Receiver Options 2 55 Figure 2 37 Altera Receivers Jitter Data Usage Message Window FE Receiver jitter data from Characterization Data Access includes the receiver device s deterministic jitter random jitter and setup hold time variations Simulations with Altera receiver characterization data represent the final eye diagram opening margins of the link You are advised to not apply the receiver compliance mask in the simulation configuration Jitter data will be included in the simulation only when the compliance mask is off To do this select Off in the Compliance Mask menu Receiver Options Receiver options provide further configuration and setting options for receivers Functional Description Altera Corporation C Send Feedback UG 1146 2 56 Receiver Options 2015 05 04 Termination tab This section specifies receiver impedance Figure 2 38 Receiver Termination Configuration ALTERA JNEye Receiver Configuration ALTERA JNEye Receiver Configurati
51. plot the Insertion Loss to Crosstalk Ratio ICR of channels is plotted ICR is calculated as the distance between the insertion loss and combined crosstalk channels as in the following figure Functional Description GJ Send Feedback Altera Corporation UG 1146 Plot Configuration Panel 2 117 2015 05 04 Figure 2 96 Channel Analysis Module s Insertion Loss to Crosstalk Ratio ICR Analysis Example ALTERA JNEye C n n ALTERA JNEye Channel Viewer NXJNEye channel View er 150401 Channel Analysis Demo Amplitude dB Fb 13 t H H 2e9 15 1005 1205 14 05 ILD Min Mask Freq Amp dB Frequency GHz 10 1e9 4 Niue run 2d 150401 Channel Analysis Demo Ns Crosstalk Limit Plot This plot is labeled CP XTLK Limit In this plot a crosstalk noise figure XTLKrms in mV at Nyquist frequency is calculated based on the user configurations as in the following figure Functional Description Altera Corporation GJ Send Feedback 2 118 Plot Configuration Panel Figure 2 97 Channel Analysis Module s Crosstalk Limit Analysis Example JNEye Integrated Crosstalk Noise mV RMS DE 5 00 7 00 00 11 00 13 00 15 00 17 00 19 00 2100 2300 2500 Insertion Loss dB Channel Test Point Name 10GBASE KR Channel Compliance The following figure shows the IOGBASE KR channel compliance check GUI Altera Corporation UG 1146 2015 05 04 ALTERA JNEye Chann
52. ps RMS Format Dual Dirac lt mean gt lt mean gt lt sigma gt Rx_Clock_PDF Usage Info Type Float DJ lt maxDJ gt UI pk or ps pk Uniform distribution RJ lt sigma gt UI RMS or ps RMS Format DjRj minDj gt maxDj gt lt sigma gt Rx_Clock_PDF Usage Info Type Integer Float UI Float Refer to receiver jitter PDF Format Table Labels Row_No Time or UI Probability 5 5e 12 le 10 Me fe Seem ons Ji IBIS AMI RX Receiver Sensitivity Parameter JNEye Interpretation Rx Receiver Sensitivity Usage Info Type Float Not supported Format Value value Rx Receiver Sensitivity Usage Info Type Float Not supported Format Range lt typ gt min lt max gt Rx Receiver Sensitivity Usage Info Type Float Not supported Format Corner slow fast e Model Specific Parameters This section lists all the model specific parameters that the IBIS AMI model provides You can use their selections or specify parameters for the simulation Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Receiver Options 2 61 Figure 2 42 Receiver IBIS AMI Parameter Type Designation for Link Optimization Link and Simulation Seting Transmite NTT Rese esa o n Bel IBIS File ibs AMI Model Stratix 5 S5GX_v2p x Component swmix v gx m 00 upke gt apis AMI Status rs MS gt m V
53. setting e Default C2C Supply voltage for chip to chip applications that have a dependency on the data rate setting 0 9V Arria 10 GX SX GT e 1 0 V Arria 10 GX SX GT e 1 1 V Arria 10 GT Vem Vem is the common voltage of the receiver input signal V4 options are only available when CTLE mode is QPI PVT Select the process voltage and temperature PVT models for the selected receiver device PVT model support varies depending on device type device data availability and model coverage A message is shown on the Receiver tab page to indicate the PVT model coverage Receiver PVT model coverage and conditions are shown in the following table Altera Corporation Functional Description GJ Send Feedback UG 1146 i 2 47 2015 05 04 Receiver Setting Table 2 10 Receiver PVT Model Coverage Receiver Type Waveform PVT Model Jitter Noise PVT Model Stratix V GX Typical Process Typical Fast Slow Voltage Typical High Low Temperature 40 C to 100 C Arria V GZ Typical Process Typical Fast Slow Voltage Typical High Low Temperature 40 C to 100 C Stratix V GT Typical Process Typical Fast Slow Voltage Typical High Low Temperature 0 C to 100 C Arria 10 GX SX Typical Fast Slow Typical Arria 10 GT Typical Fast Slow Typical IBIS AMI Provide by IBIS AMI Provide by IBIS AMI model model JNEye to Quartus II Parameter Translation for Arria 10 GX SX GT Receivers The following table shows the mapping between t
54. to load it However JNEye might be able to run the simulation with such a DLL because of memory allocation differences in the JNEye GUI and the simulation engine e Component Select an IBIS component from the IBIS model IBIS tab e Model Select a device model within a component of an IBIS model e Model Selector Select a model from the model selector list e Corner Select the corner type of a device model The choices are Typ Min and Max e AMI File Shows the AMI file specified in the IBIS model Note JNEye currently only supports device models with AMI modeling components e DLL File Shows the DLL file specified in the IBIS model Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Receiver Options 2 59 Use External Termination A checked box indicates that an external termination is used in the simulation The external termination single ended is specified in the text box on the right The default setting is not using external termination and the default external termination if applicable is 50 ohms single ended Note JNEye automatically enables the external termination option when it detects that the IBIS AMI model is using series pin mapping with R series configuration Automatic Jitter Noise Update 4A checked box allows automatic jitter noise updates from the IBIS AMI model available for models which are compliant with IBIS AMI 6 0 and later e Manual Jitter Noise U
55. will be performed 20 80 Tr Tf 2096 8096 rise fall time of the input signal to the victim or transmission channel s Nom max IL at Nyquist Nominal maximum insertion loss at Nyquist frequency This parameter specifies the maximum allowed insertion loss at Nyquist frequency which is defined as half of the maximum frequency specified above NEXT Amplitude Near end crosstalk aggressor signal amplitude FEXT Amplitude Far end crosstalk aggressor signal amplitude NEXT Tr Tf Near end crosstalk aggressor 20 80 rise fall time Functional Description GJ Send Feedback Altera Corporation UG 1146 2 114 Plot Configuration Panel 2015 05 04 e FEXT Tr Tf Far end crosstalk aggressor 2096 8096 rise fall time e Crosstalk dB Factor This parameter Y defines how dB is calculated where dB Y log10 amplitude e Compliance Mask Select the channel compliance mask to be used in the channel analysis The Compliance Mask menu contains the following selections 10GBASE KR Use the 1OGBASE KR channel compliance mask OIF CEI 28G SR 3 0 Use the OIF CEI 28G SR channel compliance mask OIF CEI 25G LR 3 0 Use the OIF CEI 25G LR channel compliance mask Custom Refer to Figure 2 93 Several text boxes for each channel compliance check item are shown You can copy or manually input the mask definitions The format for each mask definition data point is Frequency in Hz followed by Amplitude in dB The number of data points is
56. 0 Post Tap 1 2 00 Post Tap 2 0 00 JNEye Data Viewer 1712 2014 3 17 21 PM Demo JNEye Sim Result Plot GUI User Jitter Interface Histogram Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Data Viewer Module 2 81 The following GUI capabilities are provided in the Data Viewer e Zoom control e Inan eye diagram plot Click Zoom In or click and drag a rectangle box to show the details of a plot Click Zoom Out to restore the plot scale e Others Right click to bring up a menu with Zoom Out Select Zoom Pan and waveform commands e Data Cursor Select Data Cursor to show the data cursor boxes You can select and drag a data cursor box with the data values shown in the box The data values are colored according to the data lines Note The Data Cursor button may not be present in certain types of plots such as waveform plots If you move the cursor over a data point a pop up window shows the data value Figure 2 64 Data Cursor Example amp ALTERA JNEye Data Viewer 9 990 bgg 7 ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Cantour 3 TX Eye Width Q Factor M A cen 4 TX Eye Height G Factor X 1 26E 004 After PLL PN 5 TX TIE 0 f 12 After PLL PN ntrin 6 TX TIE Histogram ta After CDR PN 7 TX Rise Fall Time Histogr NC er CDR PNelntrin 8 TX Spectrum x
57. 0401N4K130176 s4p FEXT PQ20401N4K130175 s4p FEXT PQ20401N4K130177 s4p FEXT IL Min Output Directory Save current plot to a file PQ20401N4K130176 s4p PQ20401N4K130175 s4p Channel Test Point Name Output Image Type Seems Demo 28G C2C Channel OIF CEI 25G LR OIF CEI 28G MR and OIF CEI 28G SR channel compliances are similar in configura tion and usage Both cases are covered in this section All parameters are predefined as described in the OIF CEI 25G LR OIF CEI 28G MR and OIF CEI 28G SR standards so there is no user input Click Plot to proceed Channel Viewer computes and generates a sequence of plots that show the performance of the channels in the channel list e Insertion Loss Plot This plot is labeled CP IL In this plot the insertion loss of channels fitted curve of transmission channels insertion loss insertion loss masks crosstalk channels amplitude and power sum of all crosstalk channels are shown An example is illustrated in athe above figure e Insertion Loss Deviation Plot This plot is labeled CP ILD In this plot the insertion loss deviation and ILD masks are shown as in the following figure Functional Description GJ Send Feedback Altera Corporation UG 1146 2 124 Plot Configuration Panel 2015 05 04 Figure 2 103 OIF CEI 28G SR 3 0 Channel Compliance Module s Insertion Loss Deviation ILD Analysis Example ALTERA JNEye Cha i AL
58. 15 05 04 After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel characteristics may have changed Click Analyze to redraw the channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or the X button of the window the design will be discarded Microstrip Component Microstrip is a type of electrical transmission line It consists of a conducting strip separated from a ground plane by a dielectric layer known as the substrate A typical microstrip structure is shown in the following figure with these parameters Altera Corporation Input parameters W Signal trace width in various units L Signal trace length in various units T Signal trace thickness in various units H Separation between ground planes in various units Er Dk Relative dielectric constant JNEye Channel Designer supports frequency dependent dielectric constant mapping TanD Df Dielectric loss tangent JNEye Channel Designer supports frequency dependent dissipation factor mapping Cond Conductor conductivity S m Rough Surface roughness
59. 3 17 21 PM Demo JMEye Sim Result Functional Description Altera Corporation GJ Send Feedback UG 1146 2 88 JNEye Data Viewer Module 2015 05 04 Figure 2 70 JNEye Data Viewer Q Factor Plot Amplitude Axis EXE _ ALTERA JNEye Data Viewer BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 38 CTLE CDA Eyediagram 38 CTLE CDR BER Eye 40 CTLE CDR BER Contou 41 CTLE CDR Eye Width G 42 CTLE CDR Eye Height 43 CTLE CDR Phase Noise 44 CTLE CDR TIE 45 CTLE CDR TIE Histogra 46 CTLE CDR Rise Fall Tin 47 CTLECDR Spectrum 48 CTLE CDR Waveform 43 DFE Eyediagram 50 DFE BER Eye 51 DFE BER Contour 52 DFE Eye Width G Facto 53 DFE Eye Height Q Factc 54 DFE TIE 55 DFE TIE Histogram al 56 DFE Rise Fall Time Hist 57 DFE Spectrum 58 DFE Waveform 53 DFE CDR Eyediagram 60 DFE CDR BER Eye 61 DFE CDR BER Contour 62 DFE CDR Eye Width G _ 63 DFEC e Height Giles B4 DFE COR Phase Noise 65 DFE CDR TIE 66 DFE CDR TIE Histogran 67 DFE CDR Rise Fall Time 68 DFE CDR Spectrum jp M 69 DFE CDR Waveform Amplitude mV 70 Simulation Report 124 06 104 06 HB HE HE 4 Th BER Target Aight mouse otek fo zoom pan waveform Image Output Eyediagram Height G Factor Eye Width 0 45UI 56 519ps Eye Height 65 12mV Jitter p p 0 55UI 68 481ps at BER 10 12 DFE Coefficients 18 28 mV
60. 35 0 34 3 TX Eye Width Q Factor Ji ANI Canna DT nmn T 4 TX Eye idi ELE sess T 7 T1 T TX TIE Hi 7 TX Rise Fall Tie Histogr 2z 1 EHI BHLSEIEBM STI Dm is TX 7 Qa U I ee dH LU Tc Sore Bei x1 N E RI ee 11 TX Scope BER Eye 12 TX Scope BER Cortour w A A A IEEE I f 13 TX Scope Eye Width Q 1d TX Scope Eje Height Q alu T I TEES IHE Ti RE XSemeTEE j s Jill JT TIE TITS IT E ES IE D Pe 1 scope ee ar wr Mo HI O A 5 m 19 TX Scope Spectrum AD a BLA uL IIMEALSJL ee s E D EL Amplitude V E CH BER Contour 4o AA dU HE BI dl ect be vii rar LE AUC CHEER Picus AL HL DS CTLE Ejeduram xxi 31 A La 23H 4 I A HIM IP 28 CTLE BER Eye 0 41 T T T TITAL 32 FEO 32 TIZA 32 TUO840 37 T931840 32 TS332840 32 TUX3BAD 32 Time ps E pda Load ieee 1112 2014 3 17 21 PM Demo JMEye Sim Result e Legends Plot legends are shown when plots are generated Use the Page Up Page Down Home and End keys on the keyboard to move the legend box Turn the Legends check box on or off to show or hide the legend box Within the Data Viewer you can modify the link s BER target using the BER Target menu The JNEye Data Viewer recalculates the jitter and the eye opening height and width dynamically because the JNEye Simulation Engine has pre calculated the results at different BER targets in the simulation range Use the Colormap menu to change the color map of eye diagrams wit
61. 8 TX Waveform 3 10 TX Scope Eyediagram eae 11 TX Scope BER Eye 12 TX Scope BER Contour ad 13 TX Scope Eye Width Q 14 TX S Eye Height G Fhase Noise 16 TX Scope TIE 17 TX Scope TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveform 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width G Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 25 CTLE BER Eye 30 CTLE BER Contour 31 CTLE Eye Width Q Fact 100 00 1000 00 10000 00 100000 00 1000000 00 10000000 0 100000000 1 32 CTLE Eye Height G Fac _ T oo Tr optem EQ Offset Frequency Hz Phase Noise dBclHz BER Target Aight mouse click ta zoom ban waveform Data Cursor Image Output Disable Random Jitter RJ Components After PLL Total RJ 6 291 psms RJ from RefCLK 6 211 psms RJ from intrinsic source 1 000 ps 4ms After Measurement CDR Total RJ 0 985 ps4ms RJ from RefCLK 34 735 fs4ms RJ from intrinsic source 0 985 ps4ms Load Psi iid il 12 2014 3 17 21 PM Demo JMEye Sim Result Functional Description Altera Corporation GJ Send Feedback UG 1146 2 82 JNEye Data Viewer Module 2015 05 04 Figure 2 65 Data Cursor Example for Waveform Plot je ALTERA JNEye Data Viewer i ili S JNEye ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Cantour 0
62. 8 Vem Defaut v PVT Model Coverage Waveform Ul pk pk v ps RMS E ALTERA NE INEy Eye Transmitter Jitter Noise Component Method Configuration NX JNEye m r Transmitter Jitter and Noise Component Method Configuration Jitter Noise Configuration 151 Inter Symbol Interference Method DCD PW J Data PWJ and Clock DCD Method P BUJ Bounded Uncorrelated Jitter Method DN Deterministic Noise Method BUN Bounded Uncorrelated Noise Method runcated Gaussian Nois i o Peakio RMS Ratio 14 0 RN Random Noise Method Mio w PDFN Noise PDF Method In the jiter ncise component mode it is assumed that all jitter noise types do not Jitter types included in the Component Method JNEye Transmitter Jitter Noise Component Method Configuration Altera Corporation Functional Description GJ Send Feedback UG 1146 m 2015 05 04 Jitter Noise Component DJ RJ DN RJ mode All deterministic jitter noise components are included in DJ and DN Figure 2 20 Specifying Transmitter Jitter and Noise in DJ RJ DN RJ Mode VOD Selection Es VOD 82954 mV TX in AC Gain Pre Tap2 Pre Tapi Post Tap1 Post Tap2 a mmt imd PLL Type Linked to Characterization Data ALTERA JNEye Transmitter Jitter a NV JNEye ALTERA JNEye Transmitter Jitter and Noise DJ RJ Method ML DJ Deterministic Atter Method RJ Random Jitter M
63. Altera JBE database e Load and save a link configuration e Observe the channel characteristics e Set up test points within the link Compute and observe an eye diagram e Perform BER analysis Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 26 Analysis 2015 05 04 Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Tutorial PCI Express 8GT GJ Send Feedback Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT 2015 05 04 UG 1146 C Subscribe GJ Send Feedback This tutorial uses JNEye to run an OIF VSR 28 Gbps link simulation using Altera s Arria 10 GT devices The link topology is shown in the following figure Note This link configuration and simulation are for demonstration purposes It is not intended for actual implementation Consult Altera design guidelines for actual high speed link design and implementation Figure 4 1 Example OIF VSR 28G Link Topology i Data IN i Channel t Data Qut 1 Transmission ER VSR Thru sdp Altera Arria 10 GT Transmitter ID 271 iN j eoi FEXT FEXT FEKT VSR MILKS s4p VSR_XTLK1s4 FEXT FEXT FEKT FET VSR XTLKA s4p VSR XTLK2 s4p ID 25 ID 3 Methodology This simulation emulates an Altera Arria 10 GT transmitter with embedded package model an OIF 25 Gbps VSR channel with
64. Configuration d i dore PLL Divider Method When PLL divider ratio method is set to Automatic JNEye wil L hancboak When Manua method i used users can manually M set the divider ratio numbers Dunng simulation JNEye nf chack f the dider rato is avarable or valid hn the cence and Stratix V PLL IMEye Transmitter Configuration i aa I B LLL _ OOUNUNM S z z ze Misc tab Reserved This tab is blank Characterization Data Access Characterization Data Access Transmitter jitter values can be retrieved from the built in device characterization database Note JNEye supports Arria 10 GX SX GT Stratix V GT Stratix V GX and Arria V GZ characterization database access upon request If you need this capability contact your Altera representative or supporting team for details Altera Corporation Functional Description GJ Send Feedback ju UG 1146 2 36 Characterization Data Access 2015 05 04 Use the following guidelines for characterization data access e When Stratix V GX Stratix V GT Arria V GZ or Arria 10 GX SX GT is selected the Characteriza tion Data Access button appears and you can include the transmitter jitter parameters in the simulation e Altera Characterization Data Access covers PVT variations You can select appropriate process voltage and temperature conditions that best match the desired operation conditions e After clicking the button Altera Characterization Data Ac
65. Configuration in Channel Wizard JNEye Channel Wizard Channel Demo s17p Channel Type 2o pot Cota ipei Poems ea Input Input Input Output Output Output a e zx e m um mdi uu Em IEEE les T etre 300 pe a mm Se mm m mm Maximum aggressor frequency offset is 950 000 bpm i 15 01 Frequency GHz aed Mode sazi v Sandro arsenas Zoom zo Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Completing the System All the link components are now chosen and placed in the Link Designer Click Connect in the Link Designer to begin connecting the components Refer to the Link and Simulation Setting section for link construction in the Link Designer The following figure shows the completed link system Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 14 Analysis 2015 05 04 Figure 3 13 Complete Link Connection in Link Designer al A JEye ALTERA JNEye Release 15 0 Demo ALTER M UNE UNE SITIO ALL CP i id ii Transmitter Channel Receiver Test Point ig Connect TX a ie F F Q m 5 OGA Altera Stratix um Teme E CLE inris BGT Receiver Channel Test Point Name AC Shunt The link configuration is complete Use the Save Save as buttons to save the configuration for later use Related In
66. Corporation GJ Send Feedback 2 108 Plot Configuration Panel UG 1146 2015 05 04 Figure 2 87 Plot Configuration Panel Impulse Response and Single Bit Response NN JNEye STG eg Demo ALTERA JNEye Channel Viewer Channel Viewer Demo Plot Configuration parameter Mode Channel Analysis and Compliance Module Off Plot Type Single Bt Response Plot Option Time Axis Bt Data Rate Sampling Rate Length Remove Propagation Delay This panel allows you to select and configure the channel plotting The JNEye Channel Viewer can plot channel characteristics in either frequency domain or time domain Typical frequency domain amplitude and group delay plots are shown in the following figure Altera Corporation Functional Description C Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 109 Figure 2 88 Typical Frequency Domain Channel Characteristics Plots JHE ye Channel Viewer 9 FR Sdd21 JNEye Channel Viewer 12 FR Sdd21 channel s p Loss S12p pin2pin 542010 512p FEXT 512p pinpin 642010 812p FEXT 2 Amplitude dB Group Delay ns 30 iz00 ie O0 Ju Bi iz Frequeney GHz Frequency Hz Channel Response ChannelRespanse The JNEye Channel Viewer plots the channels amplitude and group delay frequency responses in a linear or logarithmic frequency scale It also allows you to limit the plot frequency range When multiple transmiss
67. Crosstalk Ratio Plot This plot is labeled CP ICR In this plot the Insertion Loss to Crosstalk Ratio ICR of channels and the ICR mask are plotted as in the following figure Functional Description C Send Feedback Altera Corporation l l UG 1146 2 126 Plot Configuration Panel 2015 05 04 Figure 2 105 OIF CEI 28G SR 3 0 Channel Compliance Module s Insertion Loss to Crosstalk Ratio ICR Analysis Example I ALTERA JNEye Channel Viewer e Ba rum X 43m ALTERA JNEye Channel Viewer JNEye Channel Viewer Demo 28G C2C Channel Piot Configuration SpemmeerMode Channel Analysis and Compliance Module OIF CEI 28G SR 3 0 Y 0 FR Sdd21 Amplitude dB 405 605 805 10 05 1205 14 05 16 05 18 05 2005 2205 2405 2605 2805 Frequency GHz Output Image Type Disable PQ20401N4K130178 s4p i i Output Directory PQ20401N4K130174 s4p Save current plot to a file PQ20401N4K130176 s4p PQ20401N4K130175 s4p Seema Demo 28G C2C Channel e Crosstalk Limit Plot This plot is labeled CP XTLK Limit In this plot a crosstalk noise figure XTLKrms in mV at Nyquist frequency is calculated based on the user configurations as in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 127 Figure 2 106 OIF CEI 28G SR 3 0 Channel Analysis Module s Crosstalk Limit Analysis Example ALTERA JN
68. Eye Channel Viewer es eee ioe x ALTERA JNE e Channel Viewer JNEye n Channel Viewer Demo 28G C2C Channel Channel Analysis and Compliance Module OIF CEI 28G SR 3 0 a a E E o p o 2 e 900 10 00 11 00 Insertion Loss dB XTLK ms 2 76314 mV ms at Nyquist Frequency 14 025 GHz IL 7 37435 dB click to zoom pan plot Data Cursor 4 Legends Channel Test Point Name 1 PQ20401N4K130178 s4p Loss 2 1 1 1 2 jomowkmmesp rem 2 tt pn Js 3 PQXMOIMKi3U6sp 2 A 9 E 4 jPQXMOIMKI3USsp rem ttt leer da tg Naeem ise Demo_28G_C2C Channel EE o 6o OININEENENNNNNNER Functional Description Altera Corporation C Send Feedback UG 1146 2 128 Options Panel 2015 05 04 Options Panel Figure 2 107 Options Panel ALTERA JNEye Channel Viewer JNEye Channel Viewer Demo Output Options System Options V Enable Instant Plot Plot Combined Channel Response V Auto S parameter Configuration Checker 4 Enable Channel Wizard S parameter Integrity Check Enable s SG eg Demo Use this panel to select the following plot options e Enable Instant Plot Enable and disable instant channel plotting when a new channel is added to the channel list When you disable this option you must click Plot to plot the channel response e Plot Combined Channel Response When you enable this option the Channel
69. GX SX and Arria 10 GI CTLE models are e In Manual setting EQ Bandwidth AC Gain and DC Gain menus are shown for user selection e In Auto setting you select the EQ bandwidth and maximum CTLE DC gain level if available that e JNEye uses Altera s proprietary algorithm to find optimal CTLE setting in Auto setting e Custom receiver and PCI Express 8GT receiver You can select or input the CTLE gain in dB listed in the pull down menu The custom CTLE model uses the PCI Express 8GT CTLE behavior Note If you are using the Arria 10 QPI mode manually adjust the input waveform amplitude by a constant factor of 0 4481 to get accurate QPI mode simulation results The amplitude adjustment can be applied on the transmitter output waveform amplitude or by using an amplitude scaling channel component such as an S parameter within a link Following is an example of a 4 port The VGA Bandwidth selection is available when an Arria 10 GX SX GT model is selected The available VGA bandwidth settings are listed in the pull down menu The default setting is 3 highest bandwidth The VGA Gain selection is available when an Arria 10 GX SX GT model is selected The available VGA gain settings are listed in the pull down menu If Auto default setting is selected the VGA gain setting is 2015 05 04 e Altera device receivers embedded in JNEye e Both Auto and Manual settings are supported you want to use model template constant amplitude scaling S pa
70. I with CDR recovered clock if DFE is not used The eye diagram opening height margin is 83 mV at BER lt 10 with ideal clock and 90 mV with recovered clock Because both the transmitter and receiver intrinsic jitter are included in the simulation the eye opening indicates the link margin at this observation point Note that the eye opening is smaller than the channel output results because the receiver intrinsic jitter is included in the CTLE output results When you enable the CDR in a receiver the transmitter random jitter is shaped and filtered with the CDR s response Refer to the JNEye Tutorial PCI Express SGT for a demonstration of this part Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Altera Corporation GJ Send Feedback 4 14 UG 1146 Analysis 2015 05 04 Figure 4 13 CTLE Output Hybrid Eye Diagram and BER Analysis with Ideal Clock xem Lagan Legit 706 EL SN 0008 T 50 00 25 000 dino Ampliude my Amplitude mV ados denis puc am g4p BAT don 1423 7314 000 Th 3428 Ziel 22885 EH NS Hoi 1428 714 000 Ti 3428 2141 2858 3574 Fani Diocumenca T Tame pa Tame pa 3a 4 pue de 04 J4 Eo s H H 4H An T 13 E LE HN Camo um An LES LEE Log ibpeE RR Faine D cruemn Lu a zs Wicdts Margin 35 3501 Du oth Ft on Tt 429 174 28 24 239 3418 TI id os wed MUI I PE I IAZ 2200 nu t Bde 4s t E Cas a 34 I1 3 E u
71. IE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveforn 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width Q Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 23 CTLE BER Eye 30 CTLE BER Contour j j 31 CTLE Eye Width Q Fact l 00 1000 00 10000 00 100000 00 1000000 00 10000000 0 100000000 1000000000 32 CTLE Eye Height Q Fac _ 2 oo 00 par CTI TIE Offset Frequency Hz Phase Noise dBclHz BER Target Aight mouse click ta zoom pan wavefom Data Cursor Image Output Random Jitter RJ Components Save Selected Plot After PLL Total RJ 6 2891 psms RJ from RefCLK 6 211 psms Rd from intrinsic source 1 000 ps4ms Save All Plots After Measurement COR Total RJ 0 385 psms RJ from RefCLK 34 735 ts4ms RJ from intrinsic source 0 385 ps4ms _Load eee oo l 12 2014 3 17 21 PM Demo JMEye Sim Result Functional Description Altera Corporation GJ Send Feedback UG 1146 2 90 JNEye Data Viewer Module 2015 05 04 Figure 2 72 Transmitter Reference Phase Noise Analysis At Receiver Output ALTERA JNEye EXE Viewer s emm xX BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 38 CTLE CDR Eyediagram 33 CTLE CDR BER Eye 40 CTLE CDR BER Contou 41 CTLE CDR Eye Width G RetCLK PN 42 CTLE CDR Eye Height After PLL PN ie ETE EB Ms
72. JNEye User Guide OX subscribe UG 1146 2015 05 04 GJ Send Feedback 101 Innovation Drive San Jose CA 95134 A DTE BAN www altera com TOC 2 JNEye User Guide Contents System Requirements and Installation Guide ss 1 1 ARET BIGTI S oe ceteros ta toe uie PIN IUe Lou EDU eM I OE D cox pM rere te 1 1 io SCARE 6 e pve re E E A E E A eT err rere eee ee 1 2 Program and File Types seessssecesseceseseesessecescscesssceesscseescscecescsesseseeassesaeaeeeeaseceeeseseesceeeasseeesaceeeaseeeess 1 3 Functional Desc py C1 Oca s once eer cateces E iR o FOIE Io E 2 1 ies ere aide VM CG T 2 1 Constructing Communication Links in the Link Designer Module 2 1 Link and Senna Or SeNi ecce otta ia E ede iet e sere eerie ees 2 6 Me canes UII UR M M 2522 RECEIVED S o E e 2 42 Channel cop 2 62 Batch Channel Simulation Configuration esee nennen 2 70 Crosstalk Aggressor Transmitter SettlDp uaueedo eei eet iieri etia tee nreb e upto tiat eto ectopeie i drtes 2 73 SV SUCH Orso D 2277 INEye Data Viewer Module uie ironia edes ota n cen ts aac cen iba iE Et bu Buisson Ead aa aTa Sia 2 80 INEye Channel Viewer Mod le T 2 98 Channel TIOE n
73. Noise After PLL PN ntrin 45 CTLE CDR TIE Histogra em d o M 46 CTLE CDR Rise Fall Tin 47 CTLE CDR Spectrum 3 48 CTLE CDR Waveform 43 DFE Eyediagram 50 DFE BER Eye 51 DFE BER Contour 52 DFE Eye Width Q Facto 53 DFE Eye Height G Factc 54 DFE TIE 55 DFE TIE Histogram Hl 56 DFE Rise Fall Time Hist 57 DFE Spectrum 58 DFE Waveform 59 DFE CDR Eyediagram 60 DFE COR BER Eye 61 DFE COR BER Contour 62 DFE CDR Eye Width Q 63 DFE CDR Eye Height G 64 DFE CDR Phase Noise 65 DFE CDR TIE 66 DFE CDR TIE Histogran 67 DFE COR Rise Fall Time 68 DFE COR Spectrum 63 DFE COR Waveforn LO 00 l 10000 00 100000 00 1000000 00 10000000 0 100000000 1000000000 70 Simulation Report 2 oo 00 4 _ Offset Frequency Hz Phase Nose dBclHz BER Target Aight mouse click fa zoom pan waveform Data Cursor Image Output Random Jitter RJ Components Save Selected Plot After PLL Total RJ 6 281 psms RJ from RefCLK 6 211 psms Rd from intrinsic source 1 000 ps4ms Save All Plots After Measurement COR Total RJ 1 822 psms RJ from RefCLK 7 091 fs ms RJ from intrinsic source 1 822 ps ms Load hr Ds ru lili12 2014 3 17 21 PM Demo JMEye Sim Result TX pre emphasis de emphasis or FIR coefficients are displayed with the transmitter output The CTLE setting is displayed for the test point after CTLE DFE coefficients are disp
74. Observer cascades the channels with Loss type and plots it along with other channel characteristics The crosstalk channels NEXT and FEXT are not cascaded e Auto S parameter Configuration Checker ASCC Enable and disable the ASCC function The Channel Viewer uses the ASCC function to determine the port configuration of S parameters When you disable ASCC you must manually select the port configuration of each S parameter channel model e Enable Channel Wizard If checked when you select a channel file Channel Wizard helps configure the channel configuration If unchecked you must manually configure the channel configuration e S parameter Integrity Check If enabled Channel Wizard checks the channel integrity the passivity and causality If JNEye has problems with opening or accessing an S parameter you can disable the S parameter Integrity Check Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Output Options Panel 2 129 Output Options Panel To generate images of new channel plots click Save current plot to a file when the Output Image Type menu is set to PNG JPG or GIF A file browser opens to help you find a location for the image file You can also specify an output directory where the output image files are saved when Output Image File is set Figure 2 108 Output Options Panel ALTERA JNEye Channel Viewer WNJNEye Channel Viewer Demo Output Image Type Disable Outpu
75. Retrieve the Arria 10 GT transmitter intrinsic jitter values from JNEye s Characterization Data Access by clicking Characterization Data Access This populates Arria 10 GT s DCD BUJ and RJ values The final TX jitter configuration is e DCD 0 015 UI in Clock DCD type e BUJ 0 036 UI in Uniform distribution RJ 0 211 PSRMs Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Altera Corporation GJ Send Feedback UG 1146 4 6 Constructing the Channel 2015 05 04 Receiver Tab Figure 4 5 Receiver Settings CTLESetting Au VGABW f x VGA Gain d dus al Mode Hoh Data Rate Peak Freg ay T DFE Mode OF First Floating DFE Tap Ato CDR Type Hbid we Bandwidth Hih tse Supply Voltage iiy PVT Typical Vem Defauit v PVT Model Coverage Waveform Set the following parameters in the Receiver tab e Receiver Arria 10 GT use the Link Designer or Receiver tab to add or select a receiver e Package Arria 10 GT e CILE Setting Auto e CTLE Mode High Data Rate Peak Freq 3 e VGA BW 3 e VGA Gain Auto e DFE Mode Off e CDR Type Hybrid e CDR Bandwidth High e Jitter Noise Component Retrieve the Arria 10 GT receiver intrinsic jitter values from JNEye s Characterization Data Access by clicking Characterization Data Access This populates Arria 10 GT s DJ and RJ values The jitter value and jitter properties are linked to JNEye s embedded characterization database which is automatically adjusted when t
76. TERA JNEye Channel Viewer NV JNEye i Channel Viewer Demo 28G C2C Channel Pet Contguration SparameerMode jif PQ20401 N4K130178 s4p ILD Min j Module OIFCEL28G SR30 v 0 FR Sdd21 D o uo 2 T E lt x 8 00 1000 1200 1400 16 00 Frequency GHz PG20401N4K130178 s4p ILD4ms 0 1877 dB Right mouse click to zoom pan plot Data Cursor Channel Test Point Name Output Image Type PQ20401N4K130178 s4p 1 1 1 am Output Directory PQ20401N4K130174 s4 i Save current plot to a file PQ20401N4K130176 s4p PQ20401N4K130175 s4p Seema Demo 28G C2C Channel e Return Loss Plot This plot is labeled CP RL In this plot return loss RL characteristics of channels and RL mask are shown as in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 125 Figure 2 104 OIF CEI 28G SR 3 0 Channel Compliance Module s Return Loss RL Analysis Example UE ALTERA JNEye Channel Viewer Channel Viewer Demo 28G C2C Channel Plot Configuration CP ILD l l i ee eee CP ICR 3 Module OIFCEF28G SR30 VV Amplitude dB 15 00 Frequency GHz PQ20401N4K130178 s4p PQ20401N4K130174 s4p Output nage Type Output Directory Save current plot to a file PQ20401N4K130176 s4p PQ20401N4K130175 s4p Seems Demo 28G C2C Channel e Insertion Loss to
77. Transmitter Pre Emphasis Second Post Tap Magnitude Transmitter Pre Emphasis First Pre Tap Magnitude Transmitter Pre Emphasis Second Pre Tap Magnitude Transmitter Pre Emphasis First Post Tap Polarity 2 Transmitter Pre Emphasis Second Post Tap Polarity Transmitter Pre Emphasis First Pre Tap Polarity Transmitter Pre Emphasis Second Pre Tap Polarity Quartus II PLL Type e Arria 10 Transceiver ATX PLL e Arria 10 fPLL e Arria 10 Transceiver CMU PLL Bandwidth in PLL Configuration Options in selected PLL type Jitter Noise Component The Jitter Noise panel allows you to input or import jitter and noise parameters JNEye provides extensive transmitter jitter and noise modeling and configuration capabilities The following figure shows the jitter decomposition diagram and the breakdown of jitter components In JNEye when Pre emphasis is selected as Manual or Auto with Manual Starting Point O Q non inverted which is positive tap selections in JNEye 1 inverted which is negative tap selections in JNEye Altera Corporation Functional Description GJ Send Feedback UG 1146 l 2015 05 04 Jitter Noise Component E Figure 2 17 Transmitter Jitter Decomposition Total Jitter TJ Deterministic Jitter DJ Data Dependent Jitter DDJ Bounded Uncorrelated Jitter BUJ Periodic Jitter PJ Duty Cycle Distortion DCD Table 2 8 Trans
78. UI at BER 107 Figure 4 11 Transmitter Scope Output Measured with Golden CDR ye Data Viewer 11 TX Scope BER Eye Amplitude mv Amphitude mv GUT 141 MS TA UO PMH 7423 Na Ap 337 Tome pa eg da BE FS Factor ua Amplitude my At the channel output which is located at the end of the OIF VSR channel with crosstalk the opening eye area is reduced because of the channel loss crosstalk and input jitter from TX and additional sinusoidal jitter The eye diagram opening is about 0 54 UI and 1 29 mV at BER 107 Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 2015 05 04 Analysis 4 13 Figure 4 12 Channel Output Hybrid Eye Diagrams and BER Analysis Ampliudie my JNEye Data Viewer 20 CH Eyediagram JHEye Data Viewer 21 CH BER Eye Amp tude mv Ampatude mv ae 141 oe G774 OUT 423 i14 Oo 3374 Time pa Les dO D E FR D Fact ia At the CTLE output the signal after the receiver s CTLE the Arria 10 GT CTLE AC gain level 13 is identified by JNEye s link optimization algorithm as the optimal CTLE setting Similar to the TX output case when the receiver CDR is enabled or included in the simulation two sets of CTLE outputs are shown The first set of outputs is with the ideal clock and the second one is with the CDR recovered clock The total jitter is 0 69 UI at BER lt 107 with ideal clock or 0 67 U
79. am opening e The third plot lower left is a BER contour plot that shows the eye diagram opening area at various BER targets e The fourth plot shows Q Factor curves which are another representation of BER bathtub curve using Q factor by assuming the noise jitter is Gaussian With the Gaussian random jitter injected into the link the BER bathtub and Q Factor plots clearly show the effects where this unbounded jitter narrows the eye diagram width as the BER target reduces Figure 3 15 TX Output Hybrid Eye Diagrams and BER Analysis Measured with Ideal Clock Amplitude mM Amplitude mV oh Hm Ampliude aw T Ss a ae oS TS a Se gon is The second set of TX outputs are measured with the golden CDR which has a loop bandwidth of 1 1667 of the data rate This set of outputs reflects the common lab scope measurement With the golden CDR in place the low frequency jitter and noise which are included in phase noise and spurs are tracked The following figure shows the Time Interval Error TIE plots before and after the golden CDR With reference to the ideal clock that is before the golden CDR the low frequency sinusoidal jitter from the reference clock characteristics can be clearly observed in the plot on the left After the golden CDR those low frequency sinusoidal jitters are tracked as shown in the plot on the right The figure also shows the jitter components results that reflect the effects of t
80. ams at test points and inside the receiver after CTLE and DFE A goal of this tutorial was for JNEye to automatically find the optimal link setting for both transmitter and receiver In the simulation time the progress bar flashes multiple times indicating the JNEye Simulation Engine is exploring the solution space The link performance and result of the final setting is shown in a JNEye Data View At TX output which is located after the Altera Arria 10 GT transmitter output pin after the TX package model the results are shown in the following figure JNEye found the optimal TX FIR setting Pre tap 2 1 Pre tap 1 6 Post Tap 1 13 and Post Tap 2 4 The configured transmitter generates 0 32 UI of jitter at BER 10 1 This set of TX outputs is measured with the transmitter s intrinsic jitter and additional sinusoidal jitter using the ideal clock reference Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 2015 05 04 Analysis 4 11 e The first figure top left is a hybrid eye diagram that includes deterministic jitter and probability density function PDF because of unbounded jitter and noise sources e The second figure top right contains the cumulative distribution CDF eye diagram with BER bathtub curves for both width and height in the eye diagram opening e The third plot lower left is a BER contour plot that shows the eye diagram opening area at various BER targets
81. annel List Panel 2 103 Lane n 2 n 2 n 3 n 4 n 5 Input Input Output Input e Lane ID Lane For multiple channel lane S parameters 8 port and above a channel lane must be chosen for link simulations For example the above figures show a 12 port 3 lane S parameter After loading the channel file JNEye assigns the middle lane as the default simulating channel or victim channel for crosstalk simulations You can change the Lane ID by using the menu below the Lane ID list box For 2 port or 4 port S parameter models the Lane ID is ignored e Aggressor ID Agg ID For multiple channel lane S parameters simulating crosstalk effects you must specify the aggressor location For example the above figures show four possible crosstalk configurations from a 12 port S parameter model Use the menu below the Aggressor ID list box to change the aggress location For Victim channel Loss type the Aggressor ID field is ignored Note The Aggressor ID is indexed in a way that excludes the victim lane For example in a 12 port S parameter there are three lanes The middle lane Lane ID 2 is the victim lane The two aggressor channels have Aggressor IDs 1 and 2 not 1 and 3 e Relative Amplitude Rel Amp You can manually adjust the amplitude of crosstalk NEXT FEXT channel components The amplitude adjustment is reflected in the channel plots and the channel compliance results The amplitude adjustment is in a linear scale
82. artus II software subscription license Related Information e Download Microsoft NET Framework 4 e Download Microsoft Visual C 2013 Library 2015 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance ISO of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any 9001 2008 products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information Registered product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services JN Oe RYA 101 Innovation Drive San Jose CA 95134 UG 1146 1 2 Installation 2015 05 04 Installation To install JNEye perform the following steps 1 Acquire the JNEye 15 0 Installation Package from the Altera Download Center 2 Execute the installation file to install
83. asis Manual MM TX EQ AC Gain Pre Tap2 Pre Tap1 Post Tap1 Post Tap2 24mm T NE PLL Type axe Bandwidth Supply Voltage Defaut Bp v PVT Typical v Vem PVT Model Coverage Waveform Linked to Characterization Data e Arria 10 GT Same options as Arria 10 GX SX e PCI Express 8GT VOD Selection Select the VOD differential output voltage for the transmitter VOD selections can be either by voltage level or by index depending on the transmitter selected For supported devices the target VOD value is displayed in the Transmitter tab page The VOD value depends on the device type supply voltage and PVT Functional Description Altera Corporation GJ Send Feedback UG 1146 2 24 Transmitter Setting 2015 05 04 Pre Emphasis Select or specify the transmitter pre emphasis de emphasis or TX FIR configuration in one of the following modes e Auto JNEye uses its link optimization algorithm to find the optimal transmitter FIR settings Auto with Manual Starting Point Specify the initial TX pre emphasis or FIR configuration JNEye s link optimization engine uses the TX settings as initial conditions e Manual For non Altera devices you can manually input the tap coefficients For Altera devices select individual FIR levels from the menus for each FIR tap The FIR selection for Altera devices is VOD dependent Therefore changing the VOD or device type can reset the TX FIR menu contents For a generic transmitter type
84. attern generation is with logic 1s in all shift registers for the valid PRBS patterns The most commonly used PRBS test patterns are listed in the Test Pattern menu Other PRBS test pattern can be selected or configured in the Pattern Designer Functional Description Altera Corporation GJ Send Feedback 2m UG 1146 z Link and Simulation Setting 2015 05 04 e Pattern Designer Allows you to specify your own custom test patterns The following figure shows the Pattern Designer user interface Figure 2 6 JNEye Pattern Designer E ALTERA JNEye Pattern Designer ALTERA JNEye Pattern Designer NVJNEye d Pattem Generator Configuration Test Patter Generation Method PRBS PRES Type PRBS 2 7 1 7 6 Example 7 EBA TeX 5 1I Crop Option Use First Part of Generated PRES Sequence The Pattern Designer includes the following test pattern generation methods e PRBS Provides an extensive list of common PRBS test patterns You can also specify custom PRBS polynomials and seeds The internal linear feedback shift register LFSR engine uses the information to generate the desired test pattern Other options include selecting how the test pattern is repeated or extracted when the simulation length is longer or shorter than the generated test patterns There are two options for selecting the partial test patterns e Use First Part of Generated PRBS Sequence e Include Longest Ru
85. bability density PDF Probability amplitude function The input format is Noise amplitude in Density Probability volt and probability The following is a noise PDF Function example 50e 3 le 10 40e 3 3e 7 30e 3 le 4 20e 3 le 2 10e 3 0 29 0 0 4 10e 3 0 29 20e 3 le 2 30e 3 le 4 40e 3 3e 7 50e 3 le 10 Click Jitter Noise Options to further configure each jitter and noise type There are two jitter noise modes for JNEye s transmitters Jitter Noise Component mode and DJ RJ DN RJ mode Only one jitter noise mode is active at a time and you must determine which mode to use in your simulations Functional Description Altera Corporation GJ Send Feedback UG 1146 2 30 Jitter Noise Component 2015 05 04 e Jitter Noise Component mode JNEyve uses a flat jitter noise structure that assumes no overlapping among all the jitter and noise components Avoid double counting when inputting or importing jitter noise figures In the following figure there are six specific jitter components DCD ISI SJ BUJ RJ and jitter PDF The noise components DN BUN RN and noise PDF must also be specified separately Figure 2 18 Specifying Transmitter Jitter and Noise in Jitter Noise Mode Tink nd Simulation Seng Transmitter Amal GX SX v Package Amia GX SX v VOD Selection Est VOD PEE Manual Transmitter Jitter Noise Mode Paneland Selection TX EQ AC Gain Pre Tap2 Pre Tap1 Post Tap1 PLL Type Bandwidth 0000
86. brid Eye Diagrams and BER Analysis 3 11 Ss Ae Seinen M 208 11 TI 158 11 180 En IE 108 11 104 11 53 1 z 3M EXT regat z in j i NNI ANKLE 2 85 4 1 ande eee m n J 1 538 ue a8 M pd aima 150 85 asas f aug ums E 90 H8 Tn Js 00 2510 009 1800 OP mO cODOD S800 nin m gt 4108 OME SE 000 2800 3000 7500 NOD 12810 oo D wa ha D BOL Log ibpeER 3 13 333 _ 4 15 t uu uo AR a e E i au LE 7 13 TR EL ae a Time pa Time pa The CTLE is a PCI Express 8GT CTLE behavior model output stage The JNEye s link optimization algorithm has identified the optimal gain setting at 10 dB level Similar to the TX output case when the receiver CDR is enabled or included in the simulation two sets of CTLE outputs are shown The first set of outputs is with the ideal clock and the second one is with the CDR recovered clock The total jitter is 1 UI at BER lt 10 with ideal clock or 0 54 UI with CDR recovered clock The eye diagram opening height is 0 mV with ideal clock and 41 mV with recovered clock The eye diagram opening is marginal to PCI Express 8GT requirements Therefore further equalization of the signal with DFE is needed Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback 3 20 Analysis UG 1146 2015 05 04 Figure 3 20 CTLE Output Hybrid Eye Diagram and BER Analysis with Ideal Clock 407g h e720 oe i89 FLE gu 12 2 rer
87. cess configures JNEye to use the characteri zation data by e Selecting Jitter Noise Component Mode for characterization data entries e Setting the Jitter Noise Data Lock check box e Importing device characterization data based on the jitter unit selection e RJ Unit selection can be UI RMS or ps RMS e Other Jitter Unit selection can be UI pk pk UI pk ps pk pk or ps pk These actions inform the JNEye simulation engine to use the characterization data from the database Note The characterization data is displayed in the text box for reference purposes The JNEye simulation engine uses proprietary algorithms to accurately model the jitter and noise in the simulations e You can unlock the jitter and noise contents by turning off the Jitter Noise Data Lock check box However the jitter and noise models and values can be different from those when the Jitter Noise Data Lock check box is checked e Characterization Data Access is supported when the data rate is in the following range e Stratix V GX 5 Gbps to 14 1 Gbps e Stratix V GT 19 6 Gbps to 28 1 Gbps e Arria V GZ 5 Gbps to 14 1 Gbps e Arria V GX SX 3 Gbps to 17 4 Gbps Typical PVT only e Arria 10 GT 3 Gbps to 28 3 Gbps Typical PVT only When the data rate is out of the specified range JNEye displays a warning message and no jitter data is retrieved If you change the data rate you must retrieve the new jitter data by clicking Characterization Data Access
88. channel characteristics can be insertion loss Loss far end crosstalk FEXT or near end crosstalk NEXT You can change the channel or channel type by selecting the channel from the Link Designer using the Channel Wizard e Port Configuration Depending on the S parameter measurement condition the port configuration can be one of the following types Use the Channel Wizard to change the port configuration of an S parameter Functional Description Altera Corporation GJ Send Feedback 2 64 Channel Setting Figure 2 45 S parameter with Port Configuration Type 1 Input Input Input Input Input Input Input Input Input Altera Corporation Lane 1 Lane 2 Victim gt ext Lane 3 mi Lane 1 FEX 7 Lane 2 Victim Lane 3 gt Lane 1 Lane 2 Victim gt M odi Lane 3 sis n 2 1 n 2 2 n 2 3 n 2 4 n 2 5 n 2 6 10 12 n 1 n 2 n 3 n 4 n 5 Output Output Output Output Output Output Output Input Output Output Input Output Victim Lane Functional Description UG 1146 2015 05 04 n 2 1 5 Q n 2 2 S n 2 3 a n 2 4 6 n 2 5 5 Q n 2 6 2 5 Q 4 6 53 5 6 10 Q 12 n 5 Q n 1 n 2 a n 3 5 n 4 Q n 5 C Send Feedback UG 1146 2015 05 04 Figure 2 48 S parameter with Custom Port Configuration Input Input Input Input Output Output Output Output Output Output Input O
89. clicking Receiver Jitter Options which leads to the Receiver Jitter Noise Configuration window JNEye uses a flat jitter noise structure that assumes no overlapping among the jitter and noise components Avoid double counting when inputting or importing jitter noise figures In the following figure DJ contains DCD ISI PJ and BUJ This implies that when you specify DCD and BUJ the DJ should not be used or the DJ figure should not contain any DCD and BUJ components Table 2 12 Receiver Intrinsic Jitter and Noise Types Description Support in Comments JNEye Deterministic You can generate the receiver DJ by using a Jitter uniform distribution dual Dirac or truncated Gaussian method You can select the DJ generation method in the Receiver Jitter Noise Configuration Window The default receiver DJ method is dual Dirac Functional Description Altera Corporation GJ Send Feedback UG 1146 2 50 Jitter Noise Setting 2015 05 04 Description Support in Comments JNEye BUJ Bounded Yes Same as receiver s Deterministic Jitter The Uncorrelated default method is Uniform distribution You Jitter can select the BUJ generation method in the Receiver Jitter Noise Configuration Window RJ is assumed to be Gaussian You can specify the receiver RJ in eighth pico second ps RMS or unit interval UI RMS RJ Random Jitter UI RMS or ps RMS DN Deterministic Noise You can generate the receiver DN by using a uniform distribution d
90. cy GHz ER NEED a ee ee GNE ONE OG ONE ONERE ee GER ONE ee ONE ee ONERE GER GEN OG t ith os 8 8 8 8 8 8 8 8 8 8 8 Uf UE UE US n mm i i i li T T F T T i L m m ng a a E A N ee m m m mmc m m m m m ns D a m m EM m Uptions Sustam Ontinns ID Channel Test Point Name ype Port Cf Agg IC Rel Am i Plot f Wu Demo s12p 2 Demosi2p Channel List Panel 2 Option Panel v Add Transmission v Edt Delete Clear Load Save Save as Plot eee D m m m ml Gegen EE Ee Se ee wer Ge Mugs Gee Neve ch E a Viewer eels Channel Plot Panel This panel contains the Channel Viewer and Plot Selector The JNEye Channel Viewer shows the characteristics of the channels in the channel list with the plot options specified Use the Channel Viewer to plot channels with different options and browse the plots Use the Plot Selector to choose one of the existing plots The Channel Viewer provides the following GUI capabilities Zoom In Zoom Out Pan Data Select Right click on the Channel Plot panel to select one of these functions To zoom in on the plot select Zoom In and then click and drag a rectangle box to show the details of the plot To zoom out select Zoom Out Up to ten previous scalings are saved so you can restore older versions by clicking Zoom Out more than once To pan over the plot select Pan and then click and drag the plot e Data Cursor By checking the Data Cursor radio button the data cursor box
91. cy JNEye uses linear extrapolation to calculate the phase noise at fmay which can lead to inaccurate results Periodic Jitter Type Specify the shape profile frequency in Hz and amplitude in ps The shape profile can be e Triangle e Hershey with programmable Hershey shape parameter e Sharkfin with programmable Sharkfin shape parameter e Sinusoidal Spurs Specify clock spectrum spurs with individual frequency in Hz and amplitude in dBc For example if the reference clock has three spurs 110 dBc at 100 KHz 90 dBc at 1 MHz and 80 dBc at 10 MHz you can input the following text into the Spurs text box 100e3 110 Tep e 90 l0e6 80 Spur Phase Offset Use the Spur Phase Offset pull down menu to configure the initial phase of spur noises The options are e Auto JNEye automatically selects the default initial spur noise phase The default initial spur phase is 0 rad e Random JNEye randomly sets the initial spur noise phases e Zero JNEye sets the initial spur noise phase to 0 rad e Specified You can manually specify the initial spur phase individually by adding the phase value after the amplitude value The following example shows the initial spur noise phases are 1 0 2 0 and 3 0 rad LODS 110 2 0 teo 90 2 0 10686 p 340 Functional Description GJ Send Feedback UG 1146 2015 05 04 Link and Simulation Setting 2 13 e Option 2 Phase Noise Figure 2 10 Reference Clock Option 2 Phase Nois
92. d CHDE Component JNEye Channel Design can use an existing JNEye Channel Designer project as a channel component When you click the CHDE icon a file browser opens and lets you select an existing Channel Designer configuration file Functional Description GJ Send Feedback Altera Corporation Tutorial PCI Express 8GT 2015 05 04 UG 1146 C Subscribe GJ Send Feedback This tutorial uses JNEye to run a link simulation This example and its associated channel models are provided with the JNEye distribution The configuration file Demo jne included in the software distribu tion contains the same link topology and a majority of the link settings discussed in this tutorial In this tutorial a link that approximates a typical PCI Express 8GT system with an Altera Stratix V GX transmitter and a generic PCI Express 8GT receiver is built and simulated in JNEye The following figure shows the link topology Note This link configuration and simulation are for demonstration purposes It is not intended for actual implementation Consult Altera design guidelines for actual high speed link design and implementation Figure 3 1 Example of PCI Express 8GT Link Topology s UOI EEES i m d D 4 Tx i i a Il mg P Data IN i IR s F ai l TM UM Data Out PCl Express 8GT Receiver Related Information Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parame
93. dc22 E Sed11 Scd12 F Sect1 E Scc12 i Scd21 Scd22 Scc21 Scc22 Standard Mode Component js st 751 14 21 22 23 24 31 E 32 33 7 S34 E S41 E 542 S43 L S44 ane A L T jo WA LE Lua nm Mo In MW TA MANY i STG ag Demo e Mixed Mode Selector Panel This panel allows you to select and plot an S parameter s mixed mode characteristics The JNEye Channel Viewer can convert standard mode that is single ended frequency responses into its differential pair format mixed mode frequency responses For high speed serial links with differential signaling scheme Altera recommends you observe channel characteristics and performance in mixed mode e Standard Mode Selector Panel This panel allows you to select and plot an S parameter s standard mode characteristics An open 4 port single ended S parameter is supported in this plot mode Functional Description Altera Corporation GJ Send Feedback UG 1146 2 106 Plot Configuration Panel 2015 05 04 Plot Configuration Panel The Channel Analysis and Compliance Module menu controls the channel characteristics plotting modes Altera Corporation Off Channel Viewer plots channel characteristics as directed by user configuration In the mode you can plot frequency responses impulse responses and single bit responses This is the default Channel Vierwer plotting mode Channel Analysis Channel Viewer performs a sequence of op
94. e ALTERA JNEye Reference Clock Configuration Reference Clock Moise Profile pes Fe reseed ge se ees eee eee Phase Noise dBcHz 10000 00 100000 00 100000000 1000000000 zi Ni ii PH EE cam Em f Lis 1 0833263140212000e 001 63 546324 1 1134336030623600e 001 Functional Description Altera Corporation C Send Feedback UG 1146 2 14 Link and Simulation Setting 2015 05 04 Option 2 configures the reference clock with the following options e Phase Noise Specify reference clock jitter using a phase noise profile Reference clock phase noise is specified with the noise power spectrum described with frequency and amplitude The above figure demonstrates a phase noise profile with a measured reference clock phase noise data set Note Altera recommends that the maximum frequency range fmax of the phase noise be set to the reference clock frequency If the fmax is less than the reference clock frequency JNEye uses linear extrapolation to calculate the phase noise at fmax which can lead to inaccurate results e Spurs Specify clock spectrum spurs with individual frequency in Hz and amplitude in dBc For example if the reference clock has three spurs 80 dBc at 100 KHz 90 dBc at 1 MHz and 96 dBc at 10 MHz you can input the following text into the text box IO00 amp 83 90 leo 90 l0e6 96 e Spur Phase Offset Same as in Option 1 Reference Clock Jitter
95. e JNEye Batch Simulation Controller has a built in timer and house keeping routine that constantly monitors the status of simulating tasks It can also launch more than one simulation job at a time to better utilize the multi core multi processor computing environment Check whether your JNEye license or license server supports multiple simulations at the same time After adding jobs some key job information is shown in the job list including simulation data rate test pattern simulation length and initial job status of Not Run After simulation key simulation results such as the final eye diagram height and weight are displayed in the job list along with the simulation time The following options are available in the JNEye Batch Simulation Controller user interface e Add Add a JNEye simulation job to the job list Use the file browser to locate jne configuration files e Delete Delete the highlighted job in the job list e Enable Disable Enable or disable the highlighted job in the job list e Reset Select Jobs Reset the status of highlighted jobs to Not Run e Reset All Jobs Reset all jobs in the job list to Not Run e Clear All Jobs Clear and delete all jobs in the job list e View Job Configuration Open and load JNEye Control Module with the highlighted job e Run Selected Job Execute the highlighted job Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel
96. e Wavefom 294 37 21 CH Eyediagram 344 37 22 CH BER Eye 23 CH BER Contour NEMORE 24 CH Eye Width Q Factor 444 37 25 CH Eye Height G Factor 2 00 26 CH Spectrum Relative Dccurrence 55 27 CH Waveforn 28 CTLE Eyediagram 23 CTLE BER Eye 30 CTLE BER Contour 31 CTLE Eye Width Q Fact 32 CTLE Eye Height G Fac _ I331 0TI E aon 4 Tm E H emm mmm mmm jm nm mmc mm mm dm mmm ln he bh pe Relative C ccumen Eye Width 0 83UI 104 126ps Eye Height 637 3UmV Jitterip p 0 1 7UI 20 8 74ps at BERcz1U 12 Stratix V GX TX Pre emphasis Pre Tap 1 2 4 00 Post Tap 1 2 00 Post Tap 2 0 00 Save All Plots Load Iis IER EXE 11 12 2014 3 17 21 PM Demo JMEye Sim Result ERU E E 3 Cumulative Distribution Function CDF Eye Diagram This scope shows the CDF eye diagram with probability color map horizontal BER bathtub curve fixed at 0 V in JNEye vertical BER bathtub curve at ideal clock or CDR sampling phase and eye diagram opening width and height The eye diagram compliance mask is plotted when it is enabled and applicable Altera Corporation Functional Description GJ Send Feedback UG 1146 2 2015 05 04 JNEye Data Viewer Module 85 Figure 2 67 JNEye Scope CDF and Plots ALTER RA INES e Data Viewer LJ B x 3 IAE E 7 ALTERA JNE e Data Viewe
97. e added to the channel See sessions below for details e Design Space e System Options Set up system level parameters and options e S parameter Max Frequency Set the maximum frequency of the resulting channel model e S parameter Frequency Step Set the frequency step of the resulting channel model e Reference Impedance Set the reference impedance of the resulting channel model e S parameter Integrity Check Select if channel integrity check e g passivity and causality will be performed on the input S parameter model If JNEye Channel Designer has issues opening or accessing certain S parameter files a user can disable the channel integrity check to see if the issue is resolved e Project management and Commands e Load Load previously saved Channel Designer project e Save Save as Save current project e Reset Clear all channel components e Plot All Components Plot all individual channel components in the Design Space using JNEye Channel Viewer e Plot Result Channel Generate the result channel and plot its characteristics using JNEye Channel Viewer e Generate s4p File Generate the result channel and save it in a 4 port Touchstone S parameter file e Quit Exit JNEye Channel Designer Constructing a Channel in Channel Designer Similar to the Link Designer operations in JNEye s Control Module a channel consists of one or more channel components between the input port Port 1 and the output port Port 2 After t
98. e following figure shows an example Functional Description GJ Send Feedback Altera Corporation UG 1146 2 136 JNEye Channel Designer 2015 05 04 Figure 2 112 Capacitance and Inductance Channel Component Configuration in Channel Wizard EXER eS y Channel Shunt Capacitor Channel Configuration Channel Characteristics Channel Type Shunt Capacitor e m 3 Lane 1 Pier Input Lane Z Victim NE cedi Lana 3 Input Input Output Output Output ea E a a a a E lt I Crosstalk Aggressor Configuration Signal Source Inline Location 7 Relative Amplitude Delay Aggressor frequency offset is negative only Change Channel m sel ESSET Frequency GHz AC Coupling Capacitor 0 nF Shunt Capacitor Series Inductor An shunt capacitor is characterized by a capacitance value Shunt capacitor represents as a high pass filter to the link characteristics OK Stripline Component A stripline uses a flat strip of metal that is sandwiched between two parallel ground planes The insulating material of the substrate forms a dielectric The width of the strip the thickness of the substrate and the Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel Designer 2 137 relative permittivity of the substrate determine the characteristic impedance of the strip which is a transmission line
99. earS Sim Result c 0 ai CONES ANN ___ BER Contour The Data Viewer shows the BER contour and eye diagram opening width and height The eye diagram compliance mask is plotted when it is enabled and applicable Functional Description Altera Corporation GJ Send Feedback UG 1146 2 86 JNEye Data Viewer Module 2015 05 04 Figure 2 68 JNEye Scope BER Contour and Plots Sc ALTERA JNEye Data Viewer Data Viewer Demo puppe pum eese ure ay 38 CTLE CDA Eyediagram 38 CTLE CDR BER Eye 40 CTLE CDR BER Contou 41 CTLE CDR Eye Width G 42 CTLE CDR Eye Height 43 CTLE CDR Phase Noise 44 CTLE CDR TIE 45 CTLE CDR TIE Histogra 46 CTLE CDR Rise Fall Tin 47 CTLECDR Spectrum 48 CTLE CDR Waveform 43 DFE Eyediagram 50 DFE BER Eye 51 DFE BER Contour 52 DFE Eye Width G Facto 53 DFE Eye Height Q Factc 54 DFE TIE 55 DFE TIE Histogram 56 DFE Rise Fall Time Hist 57 DFE Spectrum 58 DFE Waveform 53 DFE CDR Eyediagram 60 DFE CDR BER Amplitude mv 62 DFE CDR Eye Width Q 63 DFE CDR Eye Height G4 B4 DFE COR Phase Noise 65 DFE CDR TIE 66 DFE CDR TIE Histogran 67 DFE CDR Rise Fall Time 68 DFE CDR Spectrum 69 DFE CDR Waveform 70 Simulation Report 4 BER Target Fight mouse click fa zoom pan waveform BER Contour E P Eye Width 0 45U1 56 519ps Eye Height 65 12mV Jitter p p D 55UI 68 481ps at BER 1U0 12 Save All Plots DFE Coeff
100. efom Data Cursor Image Output Spectrum Load Amplitude dB I acad 11 12 2014 3 17 21 PM Demo JNEye Sim Result Rise Fall Time Histogram Plots JNEye calculates the rise fall time across the bit time boundary Note JNEye computes the rise fall time based on the presented waveform JNEye assumes there are no over or under shootings that are commonly seen when transmitter and receiver equalization effects are present Furthermore with a channel effect such as ISI the waveform transition time may be slowed down dramatically compared to a transmitter output waveform Therefore you may see rise fall times exceed the bit time boundary You must use proper judgment when interpreting the rise fall time results Functional Description Altera Corporation GJ Send Feedback 2 94 JNEye Data Viewer Module Figure 2 76 Rise fall Time Histogram Plot A TERA JN ye Data Viewer _ JNEye 0 TX Eyediagram 1 TX BER Eye 2 TX BER Contour 3 TX Eye Width G Factor 4 TX Eye Height G Factor 12 TX Scape BER Contour 13 TX Scope Eye Width Q 14 TX Scope Eye Height Q 15 TX Scope Phase Noise 16 TX Scope TIE 17 TX Scape TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveform 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width Q Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 29 CTLE BER
101. el Simulation Configuration 2015 05 04 Batch Channel Simulation Configuration JNEye provides a convenient way to set up batch channel simulations Batch channel simulation generation can be accomplished when the following conditions are met e A complete link is graphically configured This requires that e The link contains a transmitter receiver and at least one transmission channel e Inthe Link Designer the connection lines from the transmitter to the receiver are bold black lines e The link configuration is complete and ready for simulating with a variety of channels Link configura tions such as data rate test pattern BER target reference clock setting transmitter and receiver operation mode and link optimization method are set and ready for simulations When these conditions are met perform the following steps to set up a batch simulation This example creates a batch simulation using the same transmitter receiver and other link settings while evaluating a group of channels at the place of the channel 20in 4mils s4p as shown in the following figure Figure 2 52 Example Link Configuration for Creating Batch Channel Simulations Transmitter Channel Receiver TestPoint Text Box Ef Connect E TA F F Q o rBEZU IBIS AMI Transmi ther IBIS AMI Receiver 1 Choose a connected channel from the Link Designer work space Right click on the channel to bring up a context menu Figure 2 53 Batch Channel Sim
102. el Viewer ewer 150401 Channel Analysis Demo IL Min Mask Freq Amp dB 10 Te9 1 IL Max Mask Freq Amp dB 13 2e9 15 ILD Mn Mask Freq Amp dB Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 119 Figure 2 98 TOGBASE KR Channel Compliance Check User Interface ALTERA JNEye Channel Viewer ALTERA JNEye Channel Viewer Channel Viewer Demo Demo s12p Loss Fitted Demo s12p Loss Module 10GBASE KR Demo s12p FEXT Demo s12p FEXT 2 12 CP ILD 13 CP Retum Loss 14 CP ICR Amplitude dB 2 50 3 00 3 50 Frequency GHz Outpt Options System Optons Output Directory Save current plot to a file Uy eee oie Demo All parameters are predefined as described in the IEEE 802 3ap 10GBASE KR standards so there is no user input Click Plot to proceed Channel Viewer computes and generates a sequence of plots that show the performance of the channels in the channel list Insertion Loss Plot This plot is labeled CP IL In this plot the insertion loss of channels fitted curve of transmission channels insertion loss maximum insertion loss limits crosstalk channels amplitude and power sum of all crosstalk channels is shown An example is illustrated in the above figure Insertion Loss Deviation Plot This plot is labeled CP ILD In this plot the insertion loss d
103. eload the link configuration in his or her JNEye session Make sure all other associated files such as channel model files and device model files are included so that simulations can be run correctly JNEye provides limited backward compatibility with link configuration files saved in previous versions System Requirements and Installation Guide Altera Corporation GJ Send Feedback Functional Description 2015 05 04 UG 1146 C Subscribe GJ Send Feedback JNEye Control Module Double click the JNEye exe icon to launch JNEye Figure 2 1 JNEye Control Module Demo ALTERA JNEye Release 15 0 Win eT X NJNEye ALTERA JNEye Release 15 0 Transmitter Channel Receiver TestPoint Connect X w RGA Nr i Transmission Demo s12p Link Designer I Transmitter Setting N PCI Express 8GT Receiver Altera Stratix V GX Transmitter i AL UR 3 mE A n Demo FEXT 755 ID 22 Es aa FEKT Demo s12p i ID 3 Link Global Setting TX EQ AC Gain Pre Tap1 Post Tap1 Post Tap2 a s s PETI de m 2 i 0 vj i pet Type ATX LC x Bandwidth Low 4 b i os x emphasis Supply Voltage Defaut v PVT Proc Typical Vot Typical Tem 25 c Gain Est Vom Default v V Nodal Covenga Bosw Juin iu C XN a ae s s SE ee I Start New Start New Start New Channel Receiver Channel System Channel Viewe
104. ence clock option user interface allows you to configure the characteristics of the reference clock used in the simulation The reference clock can be specified with the following methods e Ideal Reference Clock With this setting the reference clock is ideal without any noise or jitter Figure 2 8 Ideal Reference Clock Setting n ALTERA JEye Reference Clock Configuration E ee P rp NX JNEye B ideal Reference Clock ALTERA JNEye Reference Clock Configuration E Indicate using ideal reference clock Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Link and Simulation Setting 2 11 e Option I Reference Clock Jitter Figure 2 9 Reference Clock Option 1 Reference Clock Jitter ao kk m AA EA S ALTERA JNEye Reference Clock Configuration LJ z a JE ALTERA JNEye Reference Clock Configuration Sex i P Select TX Reference Clock Option 1 Random and Periodic Jitter Profile Spur Freq Hz Amp dBc Functional Description Altera Corporation GJ Send Feedback UG 1146 2 12 Link and Simulation Setting 2015 05 04 Option 1 configures the reference clock with the following options Altera Corporation Random Jitter Specify the frequency range in ps Note Altera recommends that the maximum frequency range fmax of the phase noise be set to the reference clock frequency If the fmax is less than the reference clock frequen
105. end Feedback Additional information about the document and Altera Document Revision History ae vesen T cheas May 2015 2015 05 04 Updated channel compliance check and analysis documentation in the JNEye Channel Viewer section e Updated the PCI Express tutorial with new measurements and results e Updated the OIF VSR tutorial with new configuration and results e Updated most GUI screenshots to reflect 15 0 changes December 2014 12 15 Added the JNEye Channel Designer section aa e Added channel compliance check and analysis documentation in the JNEye Channel Viewer section e Updated the two tutorials with new measurements and results e Updated all GUI screenshots with new plots June 2014 2014 06 30 Incorporated new features of the JNEye Channel Viewer Added new waveform display feature Updated the Arria 10 models Updated all GUI screenshots with new plots December 2013 12 09 Initial release 2013 2015 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance Iso of its semiconductor products to current specifications in accordance wi
106. ended Use Rising Falling Waveform If rising falling waveforms are available in the IBIS model the rising falling waveforms are used to model the transmitter by default If you turn off this option ramp data in the IBIS model is used in the simulation Automatic Jitter Noise Update A checked box allows automatic jitter noise updates from the IBIS AMI model available for models which are compliant with IBIS AMI 6 0 and later Manual Jitter Noise Update When the Automatic Jitter Noise Update option is disabled turning on this option allows you to manually update the jitter noise figures from the IBIS AMI model available for models which are compliant with IBIS AMI 6 0 and later The AMI tab shows the following AMI configuration parameters Altera Corporation Functional Description GJ Send Feedback UG 1146 5 2015 05 04 Characterization Data Access gt Figure 2 29 Transmitter IBIS AMI Model AMI Configuration Tab EONA t P Sete mi lU NIZETEXEEeD e Model Name IBIS AMI model name Functional Description Altera Corporation C Send Feedback UG 1146 2 40 Characterization Data Access 2015 05 04 e Reserved Parameters e The IBIS AMI reserved parameters are shown The reserved parameters are meant for the JNEye simulation configuration e IBIS AMI Rev 5 0 and 6 0 jitter parameters Tx_Jitter are extracted and automatically set in the Transmitter s Jitter Noise window with the interpretation
107. equalizer in link optimization Sweep as TX Post Tap n Sign JNEye treats this parameter as the sign bit of the n th post cursor tap in link optimization Sweep as TX Pre Tap n JNEye treats this parameter as the n th pre cursor tap of transmitter equalizer in link optimization Sweep as TX Pre Tap n Sign JNEye treats this parameter as the sign bit of the n th pre cursor tap in link optimization With the information provided in the IBIS AMI model and parameter type selections JNEye determines the link optimization approach and conducts the simulation All link optimization methods are supported with IBIS AMI transmitter models but generally the CTLE gt FIR gt DFE and CTLE gt FIR amp DFE methods are more efficient in terms of simulation time and effective If you cannot determine the nature of the model specific parameters consult with the IBIS AMI vendors An example of transmitter IBIS AMI parameter type designations is shown in the above figure Note As mentioned in the JNEye transmitter jitter and noise section JNEye assumes no overlapping between jitter and noise components Examine the IBIS AMI Tx_Jitter parameters when they are imported into JNEye Consult device vendors or model providers about the scope or definition of the DJ component and DCD component in the IBIS AMI model to avoid double counting their effects For example if the imported DJ already contains DCD the DCD effect should be subtracted from the DJ figure S
108. er Setting 2 43 JNEye provides the following settings and configurations for receivers Receiver The following receiver types are supported e Stratix V GX e Arria V GZ e Stratix V GT e Arria 10 GX SX e Arria 10 GT e IBIS AMI e Custom e PCI Express 8GT Parameters or selections within the receiver setting are specific to the receiver type For example package model available CDR Clock and Data Recovery type and bandwidth available CTLE Continuous Time Linear Equalizer selections DFE operation mode and settings and additional receiver options are set and shown when a new device is selected When a new receiver is chosen it is automatically inserted into the Link Designer ready for connecting to other link components Package Select the package type for a receiver device For Altera products and PCI Express 8GT receivers the package models are included in the receiver models For Custom devices you can specify package models in the channel setting by inserting a Package channel component When you select the Custom package type for any transmitter devices the embedded package mode if available will be disabled and you can add a channel component such as an S parameter with type Package in the Link Designer workspace The Custom package model must be placed adjacent to the receiver module so it can be simulated and analyzed correctly If you choose the Custom package type but do not add a channel component with
109. erations to calculate and show channel performance in terms of ILD Insertion Loss Deviation RL Return Loss ICR Insertion Loss to Crosstalk Ratio and Crosstalk Noise calculations This allows you to determine the wellness of the channels Channel Analysis supports customizable compliance masks for IL ILD RL ICN and ICR This feature can be used to perform custom channel compliance checks for proprietary links When Custom is selected you can enter channel compliance mask definition in each text box with the format frequency Hz and amplitude dB You can also load a predefined custom channel compliance mask definition from a file IOGBASE KR Channel Compliance Channel Viewer performs channel compliance checks per 10 Gbps Ethernet over backplane IEEE 802 3ap 1OGBASE KR standards OIF CEI 28G SR 3 0 Channel Compliance Channel Viewer performs channel compliance checks per OIF CEI 28G SR 3 0 standards OIF CEI 25G LR 3 0 Channel Compliance Channel Viewer performs channel compliance checks per OIF CEI 25G LR standards OIF CEI 28G MR 3 1 Channel Compliance Channel Viewer performs channel compliance checks per OIF CEI 28G MR standards Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 107 User Directed Channel Plotting Figure 2 86 Plot Configuration Panel Frequency Response ALTERA JNEye Channel Viewer Channe annei viewer Vemo Functional Description Altera
110. eristics may have changed Click Analyze to redraw the channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or the X button of the window the design will be discarded Via Component In printed circuit board design a via consists of two pads in corresponding positions on different layers of the board The pads are electrically connected by a hole through the board In JNEye Channel Designer an analytical PCB Via model is constructed A typical PCB via structure is shown in the following figure Functional Description GJ Send Feedback Altera Corporation 2 144 JNEye Channel Designer UG 1146 2015 05 04 and the analytical via model structure is shown in the figure after that The via is configured with the following parameters Input parameters Via e Impedance Z3 Ohm e Electrical Length td3 in various units Pad 1 e Capacitance C1 in various units Pad 2 e Capacitance C2 in various units Via Stub 1 e Impedance Z1 Ohm e Electrical Length td1 in various units e Termination R1 in various units Via Stub 2 e Impedance Z2 Ohm e Electrical Length td2 in various units e Termination R2 in various units Figure 2 118 PCB Via Channel Component Configuration z p A tera JNEye Via Designer ra JNEye Via Designer o NN JNE
111. es will show You can select and drag a data cursor box with the data values shown in the box The data values are colored according to the data lines e Legends Plot legends are shown when plots are generated Use the Page Up Page Down Home and End keys on the keyboard to move the legend box You can also check or uncheck the Legends check box to show or hide the legend box Functional Description Altera Corporation GJ Send Feedback 2 102 Channel List Panel Channel List Panel This panel maintains the channels of interest Channels can be either transferred from the JNEye Control Module or added within the Channel Viewer The channel list in the Channel Viewer is independent from UG 1146 2015 05 04 the list in JNEye Control Module Therefore you can add and delete channels in the Channel Viewer without affecting the lsimulation configuration in the JNEye Control Module An S parameter channel component such as a connector cable or backplane can be described by the following parameters or information as shown in the Channel List e ID Sequence or location of the channel component e Channel Name An S parameter file that describes the channel component The S parameter file can be 4 port 8 port 12 port 16 port and so forth e Type Specify the type of channel characteristics in the link simulation The type of channel characteristics can be insertion loss Loss far end crosstalk FEXT or near end crossta
112. escribed by a 12 port S parameter model The S parameter is measured or generated with port configuration type 2 as shown in the following figure Figure 3 2 12 port S parameter with Port Configuration Type 2 Type 2 5 1 2 a amp Ss 3 E 5 5 6 32 L d 8 oO ael Lnd d a 9 10 amp 11 12 5 Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 4 Methodology 2015 05 04 Figure 3 3 Channel Characteristics Using JNEye Channel Viewer with Data Cursor Enabled JNEye ALTERA JNEye Channel Viewer Channel Viewer Demo 0 FR Sdd21 Plot Configuration S parameter Mode i i i Demo si2pfLoss Channel Analysis and Compliance p FEXTI 2 i s12p Rx kg 642010 512p Loss Plot Type Frequency Response Combined i i Plot Option Freg Axis Max Freq o o uc a E 8 00 10 00 1200 14 00 16 00 18 00 2000 2200 2400 2600 28 00 30 00 Frequency GHz 000 200 400 6 00 Enable Instant Plot Plot Combined Channel Response Auto S parameter Configuration Checker Enable Channel Wizard Sparameter integrty Check Ivi Xe Enna T4 Demo The JNEye Channel Viewer shows that the backplane channel has approximately 17 15 dB loss at 4 GHz The PCI SIG RX package has 3 5 dB insertion loss at 4 GHz The overall link has about 21 dB of loss as shown in the Combined Channel black curve not including Stratix V GX transmitter package at 4
113. ess 8GT GJ Send Feedback UG 1146 2015 05 04 Setting Up the Control Module 3 7 e Simulation Mode Hybrid e Output Options Data Viewer with Image Output This option tells JNEye to generate image files png for all output plots e Jitter Analysis Options Jitter Component This selection enables the jitter analysis function during the link simulation Click Reference Clock Option Figure 3 6 Reference Clock Configuration EM Da ALTERA JNEye Reference Clock Configuration l ALTERA JNEye Reference Clock Configuration ideal Reference Clock Option 1 Reference Clock Jitter Option 2 Phase Noise Select TX Reference Clock Option 2 Reference Clock Noise Profile pd Phase Noise Poll Spur M og ua E p 0 a Ti un UJ a 10000 00 100000 00 1000000 00 Mant Cees PLS Frequency Axis Scale Phase Noise Offset F Hz Amp dE c Hz Spurs Offset F Hz Amp dBc Phase rad opt 1 0000000000000000e 001 gt 100e3 80 a Periodic ter Type leg 30 n E L3 10e6 96 Frequency 0 0 Hz 68 700748 oo 1 0551964788902399e 001 ME a 69 057223 Phase Offset Auto 1 0839269140212000e 001 QM 546324 Hershey Shape Key 0 05 T TEM 1 Sharkfin Shape Key 05 Hz Spur Phase Offset JNEye Reference Clock Configuration e Turn off the Ideal Reference Clock option e Click the Option 2 Phase Noise tab e Turn on the Select TX Reference Clock Option 2 option e Ty
114. ethod DN Deterministic Noise Method RN Random Noise Method inthe jtter noise component mode tis assumed that MM ore do net overlap with each other JH re Transmitter Jitter Noise DI RI N Met hod E Configuration T r meg Functional Description GJ Send Feedback Altera Corporation UG 1146 2 32 Transmitter Options 2015 05 04 Note Jitter specified in the Transmitter Noise Jitter panel is the transmitter s intrinsic jitter and noise Jitter specified in the Reference Clock configuration window is external reference clock jitter You must distinguish between these two parts and avoid double counting jitter from the same source Transmitter Options Transmitter options provide further configuration and setting options for transmitters The additional options are only displayed or valid for transmitter devices that allow custom configurations Note Not all Transmitter Options are available for all transmitter devices Termination tab This section specifies the transmitter impedance Figure 2 22 Transmitter Advanced Options Window Transmitter Termination s ALTERA JNEye Transmitter Configuration ALTERA JNEye Transmitter Configuration Termination Pulse Shaping FIR Pre emphasis PLL Misc Transmitter Termination Setting Termination Pulse Shaping FIR Pre emphasis PLL Misc Transmitter Termination Setting TX Termination Configuration _ Termi
115. etting dialog box contains the following fields Data Rate Link data rate is specified in Gbps Simulation Length Simulation length is specified in the number of bits running at the specified data rate Simulation length should be at least 4096 bits Altera recommends that the length is a power of 2 factor for the best computation efficiency The simulation length does not apply in Statistical mode Note Simulation length is adjusted automatically to the closest power of 2 factor Target BER Target bit error rate is used to calculate the jitter and noise at low BER conditions The methodology of jitter and noise at low BER can be found in HST Jitter and BER Estimator Tool User Guide for Stratix IV GT and GX Devices Altera Corporation Functional Description GJ Send Feedback UG 1146 2 7 2015 05 04 Link and Simulation Setting x Test Pattern Allows you to specify the test pattern used in the simulation The following test patterns are available e PRBS 7 PRBS 9 PRBS 11 PRBS 15 PRBS 23 and PRBS 31 e The PRBS test patterns are generated using JNEye s built in pattern generator e Ifthe whole PRBS pattern is shorter than the simulation length the PRBS pattern is inverted and repeated The inversion is applied to achieve DC balance of the generated PRBS test pattern e Ifthe PRBS patterns are longer than the simulation length a partial test pattern of the PRBS pattern is used The default initial condition of PRBS test p
116. eviation and ILD masks are shown as in the following figure Functional Description GJ Send Feedback Altera Corporation UG 1146 2 120 Plot Configuration Panel 2015 05 04 Figure 2 99 10GBASE KR Channel Compliance Module s Insertion Loss Deviation ILD Analysis Example ALTERA JNEye Channel Viewer 7 a ey eS ALTERA JNEye Channel Viewer JNEye Channel Viewer Demo Pit Corfiguration S parameter Mode Channel Analysis and Compliance Module 10GBASE KR m o uo 2 T E lt x Output Image Type Disable Demo s12p Output Directory Save current plot to a file US ee Demo e Return Loss Plot This plot is labeled CP RL In this plot return loss RL characteristics of channels and the RL mask are shown as in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 121 Figure 2 100 1OGBASE KR Channel Compliance Module s Return Loss RL Analysis Example ALTERA JNEye Channel Viewer lis m ALTERA JNEye Channel Viewer INEye appends channel Viewer Demo Plot Configuration S parameter Mode Channel Analysis and Compliance Module 10GBASE KR acr ILD 13 CP Retum Loss CP ICR Amplitude dB Frequency Hz Output Options Out rage Te Output Directory Save current plot to a file viae rna T4 Demo e Insertion Loss to Cros
117. ewer to observe and analyze the channel characteristics The Channel Viewer button is located on the right side of the Channel tab This example shows the 447 of the five channels you selected as well as the channel responses at test points and the overall channel You can leave the Channel Viewer module open or close it by clicking OK or Exit Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Altera Corporation GJ Send Feedback UG 1146 4 10 Analysis 2015 05 04 Figure 4 9 Channel Characteristics of Victim and 2 FEXT Channels f ALTERA JNEye Channel Viewer E E SEO OO S ALTERA JNEye Channel Viewer NX JNEye Channel Viewer 141114_A10_GT_28G_ VSR f Plot Option Amplitude v Y Freq Axis Linear X Max Freq Max GHz Amplitude dB VSR Thru s4p Loss VSR_XTLK1 s4p FEXT VSR_XTLK2 s4p FEXT morn VSR_XTLK3 s4p FEXT VSR_XTLK4 s4p FEXT 20 00 Frequency GHz ata Cur OupdOpoe System Options Channel Test Point Name Type Port Cfg Lane Agg ID RelAmp Output Image Type Output Directory VSR XTLK1 s4 FEXT VSR X p l LL 4 I Save current plot to a file VSR XTLK2 s4p FEXT VSR_XTLK3 s4p FEXT Es E aT zT eee soe 141114 A10 GT 28G VSR Start the channel simulation by clicking Simulate in the lower right corner of the JNEye Control Module The JNEye Simulation Engine excises all the models and generates eye diagr
118. for example S a21 is applied in the pulse shaping Figure 2 23 Transmitter Options Pulse Shaping Configuration ALTERA JNEye Transmitter Configuration FIR Pre emphasis tab Specify the length of the TX FIR and the location of the main cursor tap This setting is only valid for the Custom transmitter type Functional Description Altera Corporation GJ Send Feedback UG 1146 2 34 Transmitter Options 2015 05 04 Figure 2 24 Transmitter Options Transmitter FIR Pre emphasis and De emphasis Configuration 1 ALTERA JNEye Transmitter Configuration Termination Pulse Shaping FIR Pre emphasis PLL Misc Transmitter FIF and Pre De emphasis Configuration TX FIR Length 3 Tapes Main Tap Location 2 Tap onfiquration A LULA Ei INEye Transmitter C PLL tab Use this panel to set the custom PLL divider ratio This panel provides an alternative to JNEye s automatic divider ratio configuration For example Altera transmitters provide three programmable dividers L M and N You can set the divider ratio manually Refer to Altera transceiver documentation for PLL setting recommendations Note JNEye does not support the N divider Altera Corporation Functional Description GJ Send Feedback UG 1146 Characterization Data Access 2 35 2015 05 04 Figure 2 25 Transmitter Options PLL Configuration ALTERA JNEye Transmitter
119. formation Link and Simulation Setting on page 2 6 The Link and Simulation Setting tab sets the global link parameters and simulation configurations Analysis Use the Channel Viewer to observe and analyze the channel characteristics The Channel Viewer button is located on the right side of the Channel tab This example shows the Sdd21 of the three channels you selected as well as the channel responses at test points and the overall channel You can leave the Channel Viewer module open or close it by clicking OK or Exit Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Analysis 3 15 Figure 3 14 Channel Characteristics of Victim and 2 FEXT Channels with Data Cursor Enabled A ALTERA JNEye Channel Viewer sni tt NN JNEye cr 1 FR Sdd21 2 FR Sdd21 Amplitude dB Demo s12p Loss Demo s12p FEXT Demo s12p FEXT 2 0 1400 1600 1800 2000 2200 2400 26 00 2800 30 00 Frequency GHz Type Pot Cfg Lane Aag ID zi Rel Amp i ALTERA JNEye Channel Viewer Channel Viewer Demo Freg Axis Max Freq Output Options System Options Enable Instant Plot Plot Combined Channel Response Auto S parameter Configuration Checker v Enable Channel Wizard S parameter Integrity Check Start the channel simulation by clicking Simulate in the lower right corner of the JNEye Control Module The JNEye Simulation Engi
120. gach 0 em oop 6 On ulii 62 PC ee ror 5 1 How to Contact ACIS xccciconccaseceseceuectaisesavesnaedelesdeieosceutleocdeceadeudasasancecddeeatnotaacetl a eead e aTe dAn ri a Paadid aasi 5 2 Altera Corporation System Requirements and Installation Guide 2015 05 04 UG 1146 C Subscribe GJ Send Feedback JNEye JNEye is a high speed transceiver link simulation When you design high speed multi gigabit transceiver links you must ensure the end to end performance from transmitter TX to receiver RX and all interconnects in between JNEye s graphical user interface GUI and link simulator allow you to quickly and easily set up and evaluate high speed link performance early in your design cycle JNEye also helps you identify possible issues in board level design With JNEye you can quickly estimate optimal link equalization and other electrical parameter settings for transmitter and receiver You can also use JNEye to predict link perform ance such as jitter and noise at a small probability level System Requirements JNEye has the following minimum system requirements e Microsoft Windows XP Windows 7 or Windows 8 e 4GBRAM e 3 GB storage space e Microsoft NET Framework 4 JNEye requires a Quartus II software subscription license to perform simulations design channels and view channel characteristics Contact your Altera sales representative or your system administrator if you have questions regarding accessing the Qu
121. he optimization algorithm is also capable of detecting and utilizing optimal receiver equalization In practice this usually implies that most of the heavy lifting in channel compensation is performed by the transmitter equalization FIR gt CTLE amp DFE Extends the FIR gt CTLE gt DFE method by enabling RX DFE Decision Feedback Equalizer when RX optimization is performed This method exploits DFE capabilities by possibly reducing the channel compensation from CTLE depending on the channel characteristics CTLE gt FIR gt DFE Prioritizes the receiver s CTLE capability over the transmitter s equalization Most of the channel compensation is performed by the receiver s CTLE while the TX equalization provides additional compensation if needed RX DFE is adapted in the final stage This method is supported in non IBIS AMI devices For Altera transmitters you can manually set initial TX FIR configurations so the link optimizations can yield better solutions more quickly when the initial conditions are proper CTLE gt FIR amp DFE Extends the CTLE gt FIR gt DFE method by joint optimizing TX pre emphasis FIR and RX DFE This method allows co optimization between the TX FIR and RX DFE For Altera transmitters you can manually set the initial TX FIR configurations so the link optimiza tions can yield better solutions more quickly when the initial conditions are proper Use the following guidelines for choosing the best link
122. he JNEye s Arria 10 GX SX GT receiver model parameters and the Assignments Editor entries in the Quartus II software Unless otherwise noted values translate directly between the two domains Table 2 11 JNEye to Quartus II Parameter Translation for Arria 10 GX SX GT Receivers JNEye Name Quartus Il Name Receiver Options gt Termination gt R Receiver On Chip Termination Supply Voltage Vccer Vccet Power Functional Description Altera Corporation GJ Send Feedback 2 48 Receiver Setting UG 1146 2015 05 04 JNEye Name Quartus Il Name CTLE Setting Mode VGA BW CTLE Setting Mode CTLE Setting e Auto e Manual AC Gain with CTLE Setting Manual Mode High Data Rate AC Gain with CTLE Setting Manual Mode High Gain DC Gain with CTLE Setting Manual Mode High Gain VGA Gain DFE Mode DFE Tap 1 Altera Corporation Eq_bw_sel Equalizer bandwidth Selection If Receiver High Data Rate Mode Equalizer 1 0 JNEye CILE Setting Mode High Data Rate Peak Freq 0 e 1 JNEye CILE Setting Mode High Data Rate Peak Freq 1 e 2 JNEye CILE Setting Mode High Data Rate Peak Freq 2 e 3 JNEye CILE Setting Mode High Data Rate Peak Freq 3 If Receiver High Data Rate Mode Equalizer 0 e 0 JNEye CILE Setting Mode High Gain Low BW e 1 JNEye CILE Setting Mode High Gain High BW VGA bandwidth Select Receiver High Data Rate Mode Equalizer If Receiver High Data Rate Mode Equalize
123. he channel components are placed into the workspace click Connect to connect the components In Connect mode one or two connectors are shown on each component Connect the channel components by dragging the line from one connector to another Two types of connections are provided in Channel Designer Right Angled Line and Straight Line The following rules of channel construction apply to the Channel Designer e The Input port Port 1 has one output port or connector e The Output port Port 2 has one input port or connector Achannel component has one input and one output port e A connection between two components can be established from an output port to an input port e An input port cannot be connected directly to an output port A channel establishment checking algorithm runs constantly in the background checking whether a channel is established for channel generation When a channel is established between an input port and an output port the link lines become bold The User Interface figure above shows an established channel link Altera Corporation Functional Description GJ Send Feedback UG 1146 2 2015 05 04 JNEye Channel Designer 135 Channel Components The Channel Designer contains the following components e Port 1 Port 1 is the input port of the channel under construction e Port 2 Port 2 is the output port of the channel under construction e S parameter channel component Use an S parameter channel mode
124. he channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or the X button of the window the design will be discarded Ideal Transmission Line Component e Input parameters e Z0 Target impedance Ohm e Electrical length in various units Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel Designer 2 143 Figure 2 117 Ideal Transmission Line Channel Component Configuration Altera JNEye Ideal Transmission Line Designer Se N VJNEye JNEye Ideal Transmission Line Designer Physical Dimension Ideal Transmission Line Characteristics Ohm eO S En a n E lt r Frequency GHz eren T SS oe ee NC EN ED NC UN p Ea ee The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel charact
125. he golden CDR Beta feature Tutorial PCI Express 8GT GJ Send Feedback Altera Corporation UG 1146 2015 05 04 Analysis 3 17 Figure 3 16 Transmitter Output TIE Time Interval Error Plots with Reference Clock Phase Noise and Spurs Before and After the Golden CDR nt un Tee uly on Lex 339 8 S45 4 WAS X IX x05 Pru 35102 40 46303 29 In the following figure the transmitter output jitter which includes transmitter intrinsic jitter and PLL filtered reference clock jitter is about 0 17 UI at BER 10 Figure 3 17 Transmitter Scope Output Measured with Golden CDR Amplitude m Ampltuda m 00 800 2500 000 22900 300 7505 0000 12800 3800 000 2500 00 2300 Sano 7500 me am MAD O0 DG Mop O0 Fan noa Occurence 1 4 m 25 Mn 23 bow g umi Er H f m 4b Ex poU bud i azg i 4 la 41 T Cy C 41 I ee eee rior ne Ee ees 1 3 1X 30 1 Q Factor Amplitude mv P m 4 p pR choc o3 OA QA k BeS eee ses ee amp Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 18 Analysis 2015 05 04 When you enable a PLL in a transmitter the reference clock s phase noise is shaped and filtered with the PLL s response The following figure shows the characteristics of phase noise at the output of the reference clock blue after the transmitter PLL green after the transmitter PLL
126. he link or device configuration changes The receiver jitter configuration is e DJ0 112 UI RJ 0 421 PSRMs Constructing the Channel Next construct the channel between the transmitter and receiver In JNEye the package models for the Arria 10 GT transmitter and Arria 10 GT receiver are embedded The transmitter and receiver packages are automatically included in the simulation JNEye supports crosstalk modeling capabilities The channel engine and simulation engine can extract and interpret crosstalk characteristics from a single or a multi lane S parameter file and compute the crosstalk effects In the channel list crosstalk channels are assumed to run in parallel with the victim channel and the crosstalk noises are superimposed This section describes how to set up crosstalk simulation in JNEye The backplane model is provided as five 4 port S parameters It consists of one insertion loss victim model and four crosstalk models Therefore you are going to insert five channels one at a time Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 2015 05 04 Constructing the Channel 4 7 Perform the following steps to add a victim channel 1 Click Channel in the Link Designer and select Transmission 2 Use the file browser to locate the channel model file VSR_Thru s4p and add it to the channel list as victim 3 The JNEye Channel Wizard displays the Sgqo characteristics JNEye automatica
127. hese steps a series of JNEye simulation configuration files are generated For example by using the Date Time header option four sets of JNEye simulation configuration files are generated Figure 2 56 Batch Generated JNEye Simulation Configuration Files 2014 4 9 17 14 10 1 BatchSim 20inch 4mils ustrip jne 4 9 2014 5 14 PM JNE File 53 KB 2014 4 9 17 14 10 1 BatchSim 20inch 4mils ustrip jneschm 4 9 2014 5 14 PM JNESCHM File 50 KB 2014 4 9 17 14 10 2 BatchSim 25inch 4mils ustrip ne 4 9 2014 5 14 PM JNE File 53 KB 2014 4 9 17 14 10 2 BatchSim 25inch 4mils ustrip jneschm 4 9 2014 5 14 PM JNESCHM File 50 KB 2014 4 9 17 14 10 3 BatchSim 35inch 4mils ustrip jne 4 9 2014 5 14 PM JNE File 53 KB 2014 4 9 17 14 10 3 BatchSim 35inch 4mils ustrip jneschm 4 9 2014 5 14 PM JMESCHM File 50 KB _ 2014 4 89 17 14 10 4 BatchSim 4 inch 4mils ustrip jne 4 9 2014 5 14 PM JNE File 53 KB 2014 4 89 17 14 10 4 BatchSim 4 inch 4mils ustrip jneschm 4 0 2014 5 14 PM JNESCHM File 50 KB Altera Corporation Functional Description GJ Send Feedback UG 1146 l l T 2015 05 04 Crosstalk Aggressor Transmitter Setting z Launch JNEye Batch Simulation Controller to run the generated link simulations refer to the JNEye Batch Simulation Controller section for details The following figure shows the generated batch channel simulations added in the JNEye Batch Simulation Controller and ready for batch simulations Figure 2 57 Added Generated Batch Chan
128. hin the Data Viewer JNEye provides eight different color maps that you can choose from depending on your analysis purpose and visual preferences The color maps can be divided into two groups e Logarithmic Color Scale Default Blue Heat and Bone e Linear Color Scale Default Linear Blue Linear Heat Linear and Bone Linear The logarithmic color scale provides good visual performance in displaying low probability data points such as the low BER portion of an eye diagram The linear color scale is more suitable for showing minor differences in close range data values The Blue Blue Default Linear is good for showing deterministic Altera Corporation Functional Description GJ Send Feedback UG 1146 l ae 2015 05 04 JNEye Data Viewer Module simulation results when no jitter or noise is present JNEye automatically chooses the most suitable color map based on the type or configuration of a simulation The default color map is either Default or Blue The Image Output menu allows you to generate output images in png jpg or gif format This is useful when you want to generate images after simulation is done previously Refer to Figure 2 77 e When Save Selected Plot is clicked a file browser helps you select the image file to be saved An image file of the currently selected plot is saved in the format specified in the Image Output e When Save All Plots is clicked a folder browser helps you select the folder location where all
129. ically included in the simulation JNEye supports crosstalk modeling capabilities The channel engine and simulation engine can extract and interpret crosstalk characteristics from a single or a multi lane S parameter file and compute the crosstalk effects In the channel list crosstalk channels are assumed to run in parallel with the victim Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Constructing the Channel 3 11 channel and the crosstalk noises are superimposed This section describes how to set up crosstalk simulation in JNEye The backplane model is provided as a 12 port S parameter It consists of both insertion loss and crosstalk characteristics However JNEye requires you to add them one at a time even if the loss and crosstalk characteristics are from the same multiple lane S parameter file Therefore you are going to insert three channel components during channel setup one backplane victim channel and two backplane aggressor channels Perform the following steps to add a victim channel 1 Click Channel in the Link Designer and select Transmission 2 Use the file browser to locate the channel model file Demo s12p and add it to the channel list as victim 3 The JNEye Channel Wizard displays the Sdd21 characteristics of the middle lane lane 2 in the 12 port S parameter 4 Click OK to close the Channel Wizard 5 Place the channel icon in the Link Designer Figure 3 10 Configu
130. icients 18 26 mV Load aE n il 12 2014 3 17 21 PM Demo JMEye Sim Result 0 EE Q Factor Curve A different view of the BER bathtub curve using Q factor Altera Corporation Functional Description GJ Send Feedback UG 1146 2 2015 05 04 JNEye Data Viewer Module 87 Figure 2 69 JNEye Data Viewer Q Factor Plot Time Axis BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 38 CTLE CDR Eyediagram 38 CTLE CDR BER Eye 40 CTLE CDR BER Contou 41 CTLE CDR Eye Width G 42 CTLE CDR Eye Height 43 CTLE CDR Phase Noise 44 CTLE CDR TIE 45 CTLE CDR TIE Histogra 46 CTLE CDR Rise Fall Tin 47 CTLECDR Spectrum 48 CTLE CDR Wavefom 43 DFE Eyediagram 50 DFE BER Eye 51 DFE BER Contour 52 DFE Eye Width G Facto 53 DFE Eye Height G Factc 54 DFE TIE 55 DFE TIE Histogram 56 DFE Rise Fall Time Hist 57 DFE Spectrum 58 DFE Wavefon 59 DFE CDR Eyediagram 60 DFE COR BER Eye 5 SS RE 63 DFE CDR Eye Height G7 64 DFE COR Phase Noise 65 DFE CDR TIE 66 DFE CDR TIE Histogran 67 DFE CDR Rise Fall Time 68 DFE CDR Spectrum 69 DFE CDR Waveform 70 Simulation Report 4 m BER Target Aight mouse click fo zoom pan waveform Image Output Eyediagram Width Q Factor Save Selected Plot Eye Width 0 45U1 56 519ps Eye Height 65 12mV Jitterp p 0 55UI 68 481ps at BER lt 10 12 Save All Plots DFE Coefficients 18 26 mV Load Ds ER 11 12 2014
131. image files will be saved Image files of all plots are saved in the format specified in the Image Output The JNEye Data Viewer Module shows the following types of simulation results Probability Density Function PDF Eye Diagram This scope shows the PDF eye diagram with probability color map horizontal histogram at slicer voltage level fixed at 0 V in the JNEye vertical histogram at Ideal Clock or CDR sampling phase and eye diagram opening width and height information Device settings such as transmitter pre emphasis FIR setting and receiver equalization settings are shown in the text display area below the plots Functional Description Altera Corporation GJ Send Feedback l UG 1146 2 84 JNEye Data Viewer Module 2015 05 04 Figure 2 66 JNEye Data Viewer PDF Eye Diagram and Plots i ALTERA JNEye Data Viewer L5 y BN JNEye ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Contour 405 63 3 TX Eye Width G Factor 355 53 4 TX Eye Height Q Factor PECES 5 TX TIE goin 6 TX TIE Histogram 205 55 7 TX Rise Fall Time Histogr 205 863 8 TX Spectrum 3 TX Wavefo pei 10 TX Scope Eyediagram EKGs 11 TX Scope BER Eye 55 63 12 TX Scope BER Contour 5 53 13 TX Scope Eye Width Q ax 14 TX Scope Eye Height Q 15 TX Scope Phase Noise HIT 15 TX Scope TIE 144 37 17 TX Scope TIE Histogran 1184 37 18 TX Scope Rise Fall Tim e 19 TX Scope Spectrum 244 37 20 TX Scop
132. imulation Engine window will remain open for the specified time before closing Output Directory Specify the output directory where all the batch simulation results will be saved This output location overrides the output directory option specified in each individual simulation job Notes JNEye Batch Simulation Controller launches each job in an individual process Make sure there are no file read write access conflicts The most common issue is that several jobs might want to open and or modify the same file for example log file from IBIS AMI models This will cause the job process to fail When a job fails to complete it may occupy one simulation resource such as the CPU indefinitely If this occurs manually close the failing simulation engine to free the computing resource Check your JNEye license type or license server configuration to see if simultaneous multiple simulations are supported Some license servers do not allow you to check out multiple license at the same time Altera recommends you run batch simulation with two or more concurrent sessions if supported by the computation environment This avoids blocking the batch simulation queue Altera recommends you run batch simulations with the Manual Select Job amp Display Result option because viewing all simulation results may take a large amount of computing resources JNEye Channel Designer The JNEye Channel Designer JCDE allows you to design your own channel model
133. imulation Speed Fast Slow Optimal to meet your specified BER target Recommended N A You do not need to gt 500 000 bits 60 000 bits Simulation Length specify simulation length in statistical mode Further information and comparisons among the three simulation modes can be found in the following papers 1 Comparison of Two Statistical Methods for High Speed Serial Link Simulation by M Shimanouchi M Li and H Wu DesignCon 2013 Santa Clara CA 2 Advancements in High Speed Link Modeling and Simulation by M Li M Shimanouchi and H Wu IEEE Custom Integrated Circuits Conference 2013 3 High Speed Link Simulation Strategy for Meeting Ultra Long Data Pattern under Low BER Require ments by H Wu M Shimanouchi and M Li DesignCon 2014 Santa Clara CA Output Options e Data Viewer When simulation is complete a new JNEye Data Viewer opens and the results are shown The simulation results can be loaded and viewed at a later time with JNEye Data Viewer e Data Viewer with Image Output When simulation is complete all the simulation results are also saved as image files that can be used in documentation JNEye supports three image output options PNG JPEG and GIF The saved images are located in the same directory as the simulation results for each project Altera Corporation Functional Description GJ Send Feedback UG 1146 m 2015 05 04 Link and Simulation Setting E Test Point Options JNEye pr
134. ink and Simulation Seting Channel Data Channel System Batch ete toot sare sare as Sir wee Sos ome j me j Ee j ae When a channel component for example a transmission line connector far end crosstalk FEXT near end crosstalk NEXT package AC coupling capacitor or shunt capacitor is chosen the Channel Wizard helps you verify or set the channel configuration Functional Description Altera Corporation GJ Send Feedback ed UG 1146 2 4 Constructing Communication Links in the Link Designer Module 2015 05 04 Figure 2 4 JNEye Channel Wizard ALTERA JNEye Channel Wizard _ m o 2 um AO sh m DOR JNEye Channel Wizard JNEye ee aaa eee gi Channet Demo s12p Channel Type Transmission Port Config Type 2 l 4 Input Le Input Input Output Output Output ray Had Gi Ez GE LL E s Frequency Offset Aggressor frequency offset rs negatve only Max mum aggressor frequancy offsat a 950 000 nem j 15 01 Frequency GHz Passivity Check No Passivity Violation Causality Check Slightly non causal OK a The Channel Wizard displays the channel characteristics and allows you to verify the correctness of the channel component such as a component represented by an S parameter The Channel Wizard allows you to select a channel type port configuration signal lanes for multiple lane S parameters with eight and more p
135. ion Panel 2 111 Figure 2 90 Impulse Response and Single Bit Response Examples JMEye Channel Viewer 25 IR Sdd21 JNEye Channel Viewer 26 SBR Sdd 1 E pw H 34558 NENNEN oo 13 88 31 88 47 58 Time bit mpulse Response Single Bit Response Combined time domain channel responses can also be done in the JNEye Channel Viewer The following figure shows examples of combined time domain channel response of a lossy backplane channel and a 5 microstrip PCB trace Figure 2 91 Combined Time Domain Channel Responses JNEye Channel Viewer 28 IR Sdd 1 JNEye Channel Viewer 27 SBR s 5597 i E i z T t t 7 E o ar 1674 TEE d 200 1 500 1558 3188 4758 EN mu 0 00 4758 358 7a mpulse Response gm Single Bit Res ponse By turning on the Remove Propogation Delay option the JNEye Channel Viewer can mathematically remove the delay of channels so that more direct comparison among channels can be seen The following figure shows an example of Remove Propogation Delay channel response of the same channels used in the previous figure Functional Description GJ Send Feedback Altera Corporation UG 1146 2 112 Plot Configuration Panel 2015 05 04 Figure 2 92 Time Domain Channel Plots with Remove Propogation Delay Option JNEye Channel Viewer 30 IR Sdd 1 JNEye Channel Viewer 31 SBR Sdd 1 Si2p pin2pin 6420108 12p Loss
136. ion channels such as loss or victim are in the Channel List you can plot the cascaded channel response by turning on the Plot Combined Channel Response option in the Systems Options panel An example of a combined channel response is shown in the following figure in which a lossy backplane channel is cascaded with a 5 microstrip PCB trace Note JNEye only cascades or combines victim transmission channels Crosstalk channels are not combined with the loss channels in the plot Functional Description Altera Corporation GJ Send Feedback z UG 1146 2 110 Plot Configuration Panel 2015 05 04 Figure 2 89 Combined Channel Response Example JNEye Channel Viewer 18 FR Sdd 1 Si2p pin2pin 642010 512p Loss Finch 4mils_ustip s4p Loss Combined CH 40 00 m a 3 5000 LE E Es 80 00 100 00 4 0 00 4 00 8 00 12 00 16 00 20 00 Frequency GHz Combined Channel Response The JNEye Channel Viewer can also plot channel responses in a time domain It can compute the impulse response IR and single bit response SBR of a channel or a combined response of channels When performing a time domain plot you must specify the maximum frequency and plot length of the time domain response The following figure shows examples of impulse response and single bit response of a 5 microstrip PCB trace Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configurat
137. isplays a warning message and no jitter data is retrieved If you change the data rate you must retrieve the new jitter data by clicking Characterization Data Access e After changing the link and device configurations such as data rate bandwidth and PVT condition you must update the jitter value by clicking Characterization Data Access e When the Jitter Noise Data Lock check box is checked JNEye examines whether the jitter data matches the simulation configuration during the following conditions e Start simulation e Save link configuration e In batch simulation mode jitter data is retrieved and calculated based on the link configura tion When the link configuration exceeds the supporting range of Characterization Data Access a warning message conditions 1 and 2 is shown and jitter is reset all conditions Functional Description Altera Corporation GJ Send Feedback a UG 1146 2 54 Characterization Data Access 2015 05 04 Figure 2 35 Characterization Data Access PVT Conditions and Jitter Noise Lock Check Box STEE 2361 A Jitter Noise PVT DN Jitter Noise Configuration Bun Data Lock CDR Type Supply Voltage Vem the receiver jitter noise entries will be locked to ensure simulation accuracy If you want to manually edit the jitter noise parameters uncheck the box next to the Iitter Moise Options button to release the lock After unlocking the jrtter noise data entries the Altera characterization data entries might
138. ith the information provided in the IBIS AMI model and parameter type selections JNEye determines the link optimization approach and conducts the simulation If you cannot determine the nature of the model specific parameters consult with the IBIS AMI vendors An example of transmitter IBIS AMI parameter type designations is shown in the above figure Note JNEye assumes no overlapping between jitter and noise components Examine the IBIS AMI Rx Clock PDF parameters when they are imported into JNEye Consult device vendors or model providers about the scope or definition of the DJ component and DCD component in the IBIS AMI model to avoid double counting their effects Status tab The Status tab shows the parameters that are fed into the IBIS AMI model for simulations Functional Description Altera Corporation GJ Send Feedback UG 1146 2 62 Channel Setting 2015 05 04 Figure 2 43 Receiver IBIS AMI Model Status Tab wa Umm T e m Nl oo Juss 0 0 fos emis oo g AMI Control Parameters Stratixb Rx rx power 0 rx bw 0 pwr_vecela 0 rx dcgain 0 r Note Consider the following for the IBIS AMI receiver modeling support in JNEye e JNEye only supports the IBIS model with an AMI component An IBIS model without an AMI component will not be simulated e Rx Receiver Sensitivity is not supported in this JNEye release e Receiver CDR is supported by the IBIS AMI model itself e JNEye supports IBIS AMI rece
139. iver models with the on die S parameter model using the rxic IBIS AMI keyword When JNEye detects the rxic keyword the Channel Wizard helps you determine the on die S parameter configuration Channel Setting The channel connects the transmitter and the receiver It contains transmission media such as PCB traces connectors backplanes cables and device packages A channel is a combination of numerous components described by channel models JNEye s channel processing engine first interprets the channel models and then cascades channels to construct one channel component for link simulations JNEye supports single ended Touchstone S parameter channel models It can access and process n port S parameters and extract transmission responses and crosstalk responses After successfully extracting the channel characteristics it performs differential pair channel cascading for subsequent link simulation Note Make sure the single ended Touchstone S parameter is used in JNEye Unexpected results will be seen if you use a mixed mode or differential mode S parameter in a simulation If you receive a mixed mode S parameter file Altera recommends you convert it to single ended format using third party tools Consult your Altera supporting team if you have questions about this subject JNEye implements the Link Designer which allows you to graphically construct the communication link In the following figure the Channel List shows the channel constructi
140. l Viewer Example 2 ALTERA JNEye Channel Viewer JNEye ID FR Sdd21 Demo s12p Loss Demo s12p FEXT Demo s12p FEXT 2 Amplitude dB 10 00 12 00 14 00 16 00 1800 2000 2200 2400 2600 28 00 3000 Frequency GHz Type Pot Cfg Lane Agg ID Rel Amp Loss 1 NS eee one Demo ALTERA JNEye Channel Viewer Channel Viewer Demo Plot Configuration S parameter Mode Plot Option Freg Axis Max Freq Output Directory Refer to the Tutorial PCI Express 8GT chapter for step by step channel setup instructions Automatic S parameter Configuration Check ASCC JNEye uses a proprietary Automatic S parameter Configuration Checker ASCC to help you set and connect the S parameter in the channel chain With ASCC JNEye inspects the S parameter model and determines the port number and port configuration ASCC also selects the middle lane as the victim channel insertion loss channel and sets the Lane and Aggressor pull down menus for user configuration Channel configuration information is saved individually for each channel Therefore S parameters with different port numbers and or port configurations can be mixed and cascaded in JNEye Related Information e Tutorial PCI Express 8GT on page 3 1 e Crosstalk Aggressor Transmitter Setting on page 2 73 Functional Description GJ Send Feedback Altera Corporation UG 1146 2 70 Batch Chann
141. l file as part of the channel under construction When you click the S parameter icon the Channel Wizard appears to help you configure the S parameter file Refer to the JNEye Control Module s Channel Wizard section for detailed usage The following figure shows an example of the Channel Wizard Figure 2 111 Channel Wizard Example ALTERA JNEye Channel Wizard y Channel 20inchFR4 s4p Channel Configuration Channel Characteristics Channel Type Transmission Lane 1 Lane 1 Input TEXT gy Lane Z Victim r Me Lane 3 Input Input Output Output Output e a a E r Crosstalk Aggressor Configuration Signal Source Inline Location 1 Relative Amplitude Delay Frequency Offset Oo Aggressor frequency offset i negative only 4 3 im Bi es m cpm mm ie aa AC Coupling Capacitor 0 nF Frequency GHz Shunt Capacitor 0 pF Series Inductor 0 nH Passivity Check Passivity Violation Simulation result will be impacted Causality Check Slightly non causal OK Capacitance and Inductance Model Components You can insert the following capacitance and or inductance components as part of the channel e Shunt capacitance e Series capacitance Listed in the Channel Wizard under the AC Coupling Capacitor e Series Inductance JNEye Channel Designer uses the Channel Wizard to configure these capacitance and inductance components so you can input the capacitance and inductance values there Th
142. lation e Characterization Data Access covers PVT variations You can select the appropriate process voltage and temperature conditions that best match the desired operation conditions e After clicking Characterization Data Access JNEye is configured to use the characterization data by e Setting Jitter Noise Component Mode for characterization data entries e Setting the Jitter Noise Data Lock check box e Importing device characterization data based on the jitter unit selection e RJ Unit selection can be UI RMS or ps RMS e Other Jitter Unit selection can be UI pk pk UI pk ps pk pk or ps pk The JNEye simulation engine uses this characterization data from the database Note The characterization data is displayed in the text box for reference purposes The JNEye simulation engine uses proprietary algorithms to accurately model the jitter and noise in the simulations e You can unlock the jitter and noise contents by turning off the Jitter Noise Data Lock check box However the jitter and noise models and values can be different from those when the Jitter Noise Data Lock check box is checked e Characterization Data Access is supported when the data rate is in the following range e Stratix V GX 5 Gbps to 14 1 Gbps e Stratix V GT 19 6 Gbps to 28 1 Gbps e Arria V GZ 5 Gbps to 14 1 Gbps e Arria V GX SX 3 Gbps to 17 4 Gbps e Arria 10 GT 3 Gbps to 28 3 Gbps When the data rate is out of the specified range JNEye d
143. lation results are stored a directory named Demol Navigate to the directory select the JNEye Sim Result jneomlist file and open it to load the simulation data Figure 2 77 Load Previous JNEye Simulation Results P Select a JNEye Scope Configuration File Gok P Computer WOTG Th 139920 Dermol Organize New foider 7r fros BE Gektor d Yuka E e a Ji Downie Cc INEye Sim Resultjneomlist 5 Recent gg My Ste h ses EA Share Select and open this file to load previous run a Ubane simulation results Docum i al kiusa t Picture B Videos e Compute E OSDeck ca WOTSO Co rena V CS Frwu V Lg prev s M am lita File name JNEye Scope Configuration File v JNEye Channel Viewer Module The JNEye Channel Viewer provides a convenient way of observing and comparing channel characteris tics The following types of channel characteristics which are represented by Touchstone S parameter format can be displayed in the Channel Viewer e Standard mode Single ended S parameter for example S11 S12 S21 e Mixed mode Differential S parameters for example Sqaij1 Sdd21 gt Scd21 e Frequency Domain Plots Amplitude and propagation group delay plots e Time Domain Plots Impulse responses and single bit responses Channel Viewer also provides channel compliance checks and channel analysis Use these features to observe a channel s characteristics and its associated signal integrity matrices
144. lative to its original amplitude The default value for aggressor is 1 0 which indicates the aggressor has its original amplitude The Aggressor ID field is ignored for a victim channel Loss type Delay Each crosstalk aggressor can have individual delay or time offset The delay is input in picosec onds ps 107 second Positive values in aggressor delay indicate the aggressor is lagging behind the victim waveform Negative values indicate the aggressor is ahead of the victim signal waveform The Aggressor ID field is ignored for a victim channel Loss type Frequency Offset Each crosstalk aggressor can run on an offset frequency compared to the victim channel s transmitter The frequency offset is given in negative ppm parts per million The maximum frequency is 950 000 ppm The Channel Viewer button is a convenient way of observing channel characteristics in the current channel list Click Channel Viewer to transfer the channels to a new Channel Viewer window You can then observe various parts of channel characteristics in either frequency or time domain Use the JNEye Channel Viewer to view cascaded channel characteristics if multiple channel components are used in the victim signal path The following figure illustrates the Channel Viewer plot of the channel construct shown in Figure 2 44 Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Channel Setting 2 69 Figure 2 51 JNEye Channe
145. layed for the test point after DFE Time Interval Error TIE Plots TIE plots capture the time differences between the waveform transition time across data sensing threshold and ideal reference waveform transition time If Jitter Analysis is enabled and the simulation mode is Hybrid jitter analysis results are displayed under the TIE plot Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Data Viewer Module 2 91 Figure 2 73 Time Interval Error TIE Plot with Jitter Analysis Results _ALTERA JNEye Data Viewer EI pem m SNEye ALTERA JNEye Data Viewer Data Viewer Demo 0 TX Eyediagram 1 TX BER Eye 2 TX BER Contour 3 TX Eye Width G Factor 4 TX Eye Height G Factor B TX TIE Histogram 7 TX Rise Fall Time Histogr 12 TX Scope BER Contour 13 TX Scope Eye Width Q 14 TX Scope Eye Height G 15 TX Scope Phase Noise 16 TX Scope TIE 17 TX Scape TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Waveform 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width G Factor 25 CH Eye Height G Factor 26 CH Spectrum 27 CH Waveforn 28 CTLE Eyediagram 29 CTLE BER Eye 30 CTLE BER Contour E COT ES VEU 31 CTLE Eye Width Q Fact 00 22403 20 ETLE Height G Fac i 8 CT E zs ie zs Time bit C Data Cursor Save All Plots Load D sari Ud 11 12 2014 3 17 21 PM Demo JNEye Sim Result
146. lk NEXT Change the channel type by selecting the channel from the channel list and then selecting the appropriate channel type from the Type menu e Port Configuration Port Cfg Depending on the S parameter measurement condition the port configuration can be one of the types shown in the following figures You can change the port configu ration of an S parameter by using the menu below the Port Configuration list box Figure 2 81 S parameter with Port Configuration Type 1 1 Lane 1 Input 2 FEXxr 1 Lane 2 Victim gt 9 Lane 3 6 ES Input Input Lane 1 Input 3 FExT 7 Lane 2 Victim gt 5 7 9 Lane 3 11 Input Input Altera Corporation n 2 1 n 2 2 n 2 3 n 2 4 n 2 5 n 2 6 10 12 Output Output Output Output Output Output Output Input Output Output Input Output 11 Victim Lane Functional Description n 2 1 n 2 2 n 2 3 n 2 4 n 2 5 n 2 6 10 12 C Send Feedback Input Input Output Input Input Output UG 1146 2015 05 04 Figure 2 83 S parameter with Port Configuration Type 3 5 5 i 1 Lane 1 n g amp 2 FEXT y n 1 6 6 dus zl 3 Lane 2 y n 2 a 5 t 4 Victim n 3 e A 5 Lane 3 n 4 3 2 6 e n 5 o x O z S P Pu24 2 P2 P2238 G 5 P3 Pn 2 3 8 5 amp P4 Pn2 4 5 5 53 PS Pasa B P6 Pn 2 6 6 O Pni2 4 Pot SB Pn Pn S P1 P2 P3 P4 P5 P6 Pn 2 1 Pn 2 Ch
147. lly detected the port configuration of this S parameter Type 2 in this case 4 Click OK to close the Channel Wizard 5 Place the channel icon in the Link Designer Figure 4 6 Configure Victim Channel with JNEye Channel Wizard ja ALTERA JNEye Channel Wizard gs sas ww JNEye JNEye Channel Wizard Channel VSR_Thru s4p Channel Configuration Channel Characteristics Channel Type Transmission Lane E 7 I 0 00 p i i 2 VSR _Thrus4p Input Lane 2 Victim O odi Lane 3 9 Input Input Output Output Output oo a T ray E lt r Relative Amplitude Delay Aggressor frequency offset is negative only Maximum aggressor frequency offset is 950 G00 pom Lange Chane AC Coupling Capacitor 0 Shunt Capacitor 0 Series Inductor C Passivity Check No Passivity Violation Causality Check Slightly non causal OK Perform the following steps to add the first crosstalk channel 1 Click Channel in the Link Designer panel and select Far end Crosstalk FEXT 2 Use the file browser to locate the channel model file VSR_XTLK1 s4p and add it to the channel list as FEXT Tutorial 28 Gbps OIF VSR Link with Arria 10 GT GJ Send Feedback Altera Corporation UG 1146 4 8 Constructing the Channel 2015 05 04 e Because the crosstalk channel is provided as a single la
148. mitter Intrinsic Jitter and Noise Types Description Support Comments in JNEye DJ Deterministic Unit Interval Yes DJ can be generated using a uniform distribution Jitter UI dual Dirac or truncated Gaussian method Select the DJ generation method in the Transmitter Jitter Noise Options Window The default DJ method is dual Dirac DJ consists of periodic jitter bounded uncorrelated jitter inter symbol interfer ence and duty cycle distortion The DJ value is used in the simulation when the DJ RJ DN RN method is selected ISI Inter Symbol UI Yes ISI can be generated using a uniform distribution Interference dual Dirac or truncated Gaussian method Select the ISI generation method in the Transmitter Jitter Noise Options Window The default ISI method is dual Dirac Functional Description Altera Corporation C Send Feedback UG 1146 Jitter Noise Component 2015 05 04 Description Support Comments in JNEye Duty Cycle The DCD parameter models two types of jitter Distortion Positive pulse width jitter PPWJ and Clock DCD The PPWJ shortens or lengthens the logic 1 waveform The Clock DCD emulates distorted clock waveform effects on the transmitter output waveform You can select the DCD generation method in the Transmitter Jitter Noise Options Window The default DCD method is PPWJ shortened positive waveform BUJ Bounded UI Yes Same as Deterministic Jitter The default BUJ Uncorrelated method is Uniform dist
149. n Length Bit Sequence The longest run length test pattern will be located at the ending portion of the test bit sequence e Consecutive Bit Patterns Defines the test patterns with repeating patterns e Clock Generates a clock like pattern e All 1 s Generates an all ones test pattern that usually feeds into a coder or scrambler e All 0 s Generates an all zeros test pattern that usually feeds into a coder or scrambler Encoder and Scrambler NEye supports the following encoders and scramblers 8B 10B 64B 66B 64B 67B and 128B 130B Altera Corporation Functional Description GJ Send Feedback UG 1146 2 9 2015 05 04 Link and Simulation Setting z e Custom Click the open file dialog button to select a custom test pattern file Figure 2 7 Custom Test Pattern File Browser Button Data Rate 8 Gbps Project Name Demo Simulation Length 65536 Bits Simulation Mode Hybrid 4 Target BER 10 12 Output Options Data Viewer 4 Test Pattem PRBS 23 Custom ost pantom Test Point Location TX Channe CTLE DFE Data Latch v browser button f Reference Clock 100 v i im Probe Type Ideal Reference Clock Setting prem Option gt Jitter Analysis Options Disable Y Link Optimization Method CTLE gt FRADE 7 EN CON NE FOM of Link Optimization Ares Y My notes Compliance Mask PCI Express 8GT The custom pattern files are in the following formats
150. n settings similar to that of Altera PLLs while more comprehensive PLL configuration capabilities are under development With custom transmitters the VCO can be either LC type or ring oscillator Ring type More PLL to reference clock divider ratios are supported in the custom PLL type Follow Altera s PLL and reference clock guidelines when setting up transmitter PLLs to avoid unexpected results e PLL is currently not supported for IBIS AMI transmitters Altera Corporation Functional Description GJ Send Feedback UG 1146 l l 2015 05 04 Transmitter Setting Supply Voltage For supported devices you can choose the supply voltage In JNEye 15 0 the Arria 10 GX SX GT transmitter model provides the following supply voltages e Default BP Supply voltage for backplane applications that have a dependency on the data rate setting e Default C2C Supply voltage for chip to chip applications that have a dependency on the data rate setting e 0 9 V Arria 10 GX SX GT e 1 0 V Arria 10 GX SX GT e 1 1 V Arria 10 GT Vem Vom is the common voltage of the transmitted signal PVT Select the process voltage and temperature PVT models for the selected transmitter device PVT model support varies depending on device type device data availability and model coverage A message is shown on the Transmitter tab page to indicate the PVT model coverage Transmitter PVT model coverage and conditions are shown in the following table
151. nation Topology R C1 x R 50 ohms Single ended Ci 0 2 pF Single ended For selected Altera devices use the TX Impedance pull down menu to select a termination configuration You can also customize the termination configuration by selecting the Custom option When the Custom TX Impedance method is chosen the termination can be configured as follows e Ideal TX termination The transmitter is ideal with a 50 ohms single ended termination e Non ideal TX termination Select one of the following options e R Transmitter impedance is modeled as a resistance R ohms single ended e R C1 Transmitter impedance is modeled as an RC network with a parallel resistor in ohms and a capacitance in pF e File Input Frequency Real Imaginary Transmitter impedance is modeled by a frequency dependent complex impedance table described in the input file For an Altera transmitter the default termination configurations are automatically selected and specified Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Transmitter Options 2 33 Pulse Shaping tab JNEye supports two pulse shaping methods for Custom transmitters e Edge Rate A pulse shaping filter is generated by using a Gaussian low pass filter that matches the specified edge rate e S parameter A pulse shaping filter is specified by your S parameter file Only the differential insertion loss
152. nctional Description GJ Send Feedback UG 1146 2015 05 04 Channel Setting 2 67 A crosstalk aggressor has the following parameters e Source Each crosstalk aggressor can be of Inline Transmitter or Aggressor type With an inline aggressor the input to the crosstalk channel is the input waveform at the last transmission victim channel segment e With a transmitter aggressor the aggressor waveform is the same as the victim transmitter with the above aggressor effects such as frequency offset delay and relative amplitude applied e Ifthe aggressor type is Aggressor X the aggressor is modeled by the Xth aggressor type as shown in the Aggressor Transmitter tab refer to the Crosstalk Aggressor Transmitter Setting section The following figure shows the three crosstalk aggressor transmitter types Inline aggressor means the signal feeding into the crosstalk channel comes from the immediate victim channel in parallel with the XTLK channel as shown in the red dotted arrow line TX Aggressor means that regardless of where the XTLK channel is located this XTLK always uses the VICTIM TX output as its signal source shown in the green dotted line The Individual Aggressor TX is similar to the Victim TX Aggressor but it can be generated separately Figure 2 50 Crosstalk Aggressor Types Inline Aggressor ou N f Channel gp Channel Ns p a T Ly Transmission d 4mil_stripline_5in s4p ID 1
153. nd select Properties When using the package channel component follow these guidelines e Package models should be placed next to the devices e Each device can have only one package model Therefore the external package model can only be used when the device s package type is Custom e The package model type is used by the simulation engine to identify the boundary of the devices and generate a waveform for observation and analysis e The package model is treated the same way as the Transmission channel type Therefore use the Iransmission channel type even if the model represents a physical package in your system but it is not a package of the TX and RX Functional Description GJ Send Feedback Altera Corporation P UG 1146 Link and Simulation Setting 2015 05 04 Link and Simulation Setting The Link and Simulation Setting tab sets the global link parameters and simulation configurations Figure 2 5 Link and Simulation Setting Tab Link and Simulation Seting Data Rate 8 Gbps Project Name Demo Simulation Length 65536 Bts Simulation Mode Target BER 10 12 Output Options Data Viewer Test Pattem PRBS 23 Note Partial test pattem is used Please referto Use Test Point Location Atlee ik fy Pabe Te len Ck pn eC a srs ers Dae Link Optimization Method CTLE gt FIR amp DFE vi II II FOM of Link Optimization ides Compliance Mask PCI Express SGT Y The Link and Simulation S
154. ne 4 port S parameter there is no difference between near end NEXT and far end FEXT crosstalk Choosing NEXT or FEXT yields the same result e Check and validate the port configuration of crosstalk channels Because non transmission channels have more diverse channel characteristics JNEye s ASCC Automatic S parameter Configuration Checker can sometimes misinterpret the channel port configuration 3 The JNEye Channel Wizard displays the FEXT 1 characteristic Because the crosstalk is provided as single lane 4 port S parameter the aggressor location selection is ignored 4 Setthe frequency offset to 300 ppm to introduce phase shifting effect to this crosstalk noise source This indicates the aggressor will not be frequency synchronous to the victim channel 5 Click OK to close the Channel Wizard 6 Place the channel icon in the Link Designer Figure 4 7 First Far end Crosstalk Configuration in Channel Wizard rm NANE e JNEye Channel Wizard y Channel SR_XTLK1 s4p Channel Configuration Channel Characteristics Channel Type FEXT d Lane i PN 3 3 2 2 Input EXT gy Lane 2 Victim a sd Lane 3 Input Input Output Output Output oo T a a EE E I Crosstalk Aggressor Configuration Sina Source Location 1 e Relative Amplitude 1 Delay o ops Frequency Offset 300 Aggressor frequency offset is negstve only Maximum aggressor frequency offset ms 950 000 pom
155. ne simulates all the models and generates eye diagrams at test points and inside the receiver after CTLE and DFE A goal of this tutorial was for JNEye to automatically find the optimal link setting for both transmitter and receiver In the simulation time the progress bar flashes indicating the JNEye Simulation Engine is exploring the solution space The link performance and result of the final setting is shown in a JNEye Data View At TX output which is located after the Altera Stratix V GX transmitter output pin after the TX package model the results are shown in the following figure JNEye found the optimal TX FIR setting Pre tap 1 4 Post tap 1 2 and Post tap 2 0 The configured transmitter generates 0 83 UI of jitter at BER 107 This set of TX outputs is measured with an ideal clock In addition to the transmitter s intrinsic jitter the reference clock s jitter and noise recall that external reference clock phase noise and spurs in this simulation are filtered by the Stratix V GX s PLL are seen here Tutorial PCI Express 8GT GJ Send Feedback Altera Corporation UG 1146 3 16 Analysis 2015 05 04 e The first figure is a hybrid eye diagram that includes deterministic jitter and probability density function PDF because of unbounded jitter and noise sources e The second figure top right contains the cumulative distribution CDF eye diagram with BER bathtub curves for both width and height in the eye diagr
156. nel Simulation Configuration in JNEye Batch Simulation Controller f ALTERA Batch Simulation Controller L ALTERA JN iEye il j wx JNEye Baten Simulation Contraller Surmulsbon Hyra 2014 43 17 14 00 T Bucht Z ngh See ERO n 2014 9 17 14 M 2 Bucht Z5nch Aes sangre 2014 19 17 14 10 3 Batch Sam nch Seda sap ne SS IMEyr TUM rm THH mra Elapsed Tiree HR Related Information e JNEye Channel Viewer Module on page 2 98 e JNEye Batch Simulation Controller on page 2 129 Crosstalk Aggressor Transmitter Setting Aggressor transmitter configurations allow you to configure crosstalk aggressors individually with different transmitter types pre emphasis settings amplitudes data rates and so forth The following figure shows a 3 aggressor link with three different aggressor transmitters Functional Description Altera Corporation GJ Send Feedback UG 1146 2 74 Crosstalk Aggressor Transmitter Setting 2015 05 04 Figure 2 58 Aggressor Transmitter with Three Individual Aggressor Transmitters bara ALTERA JNEye Release 74 0 Follow the steps described in the previous section to set up a link with crosstalk channels In the Channel Wizard window in the Signal Source menu of the Crosstalk Aggressor panel select the Inline Transmitter or one of the eight available Aggressor types Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Crosstalk Aggress
157. om package type for any transmitter devices the embedded package model if available is disabled You can then add a channel component such as an S parameter with type Package in the Link Designer workspace The Custom package model must be placed next to the transmitter module so it can be simulated and analyzed correctly If you choose the Custom package type but do not add a channel component with Package type to the Link Designer workspace the transmitter is simulated without any package model Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Transmitter Setting 2 23 JNEye comes with the following transmitter package models e Stratix V GX e Arria V GZ e Stratix V GT e Arria 10 GX SX Options Additional package models shown in the following figure are available for Arria 10 devices The package model is specified as its trace length inside the package These models are chosen to cover the range of package trace lengths in Arria 10 transceiver transmitters e Default The default package model is same as the 14 mm option e 14mm e 16 5mm e 20mm e 24mm Contact your Altera s representative if you would like to know how to pair your design with the Arria 10 package model options Figure 2 16 Arria 10 Transmitter Package Options Link and Simulation Setting Transmitter Transmitter Aria 10GX SX x Package Aria 10GX SX v Option Defaut v Ts Se Pre Emph
158. omatically or manually set When automatic floating DFE tap location mode is selected JNEye uses proprietary algorithms to find the optimal floating DFE tap location e Custom receiver and PCI Express receiver JNEye implements a generic behavior DFE model You can customize the DFE model with the Receiver Options Window CDR Type and CDR Bandwidth Select the type of Clock and Data Recovery CDR module used in the receiver There are two options Ideal Clock and supported CDR type When you select the ideal clock option the eye diagram is plotted using the ideal system clock When you enable CDR both ideal clocked and CDR retimed eye diagrams are shown e Altera Receivers Stratix V GX Arria V GZ Stratix V GT Arria 10 GX SX and Arria 10 GT Hybrid CDR models are supported The CDR models and configurations are automatically set according to the data rate and CDR bandwidth setting Consult Altera design guides for CDR bandwidth configura tions e Custom receiver and PCI Express 8GT receiver A generic CDR with bang bang phase detector is supported The CDR bandwidth for the generic receiver is 18 MHz low bandwidth 26 MHz medium bandwidth and 34 MHz high bandwidth Supply Voltage For supported devices you can choose the supply voltage In JNEye 15 0 the Arria 10 GX SX GT receiver model provides the following supply voltages e Default BP Supply voltage for backplane applications that have a dependency on the data rate
159. on n B pc x S JNEye ALTERA JNEye Receiver Configuration Termination Topology R C1 x R 50 ohms Single ended File Name Ci 02 pF Sngeended JNEye Receiver Configuration Altera Corporation For selected Altera devices use the RX Impedance pull down menu to select a termination configura tion You can also customize the termination configuration by selecting the Custom option When the Custom RX Impedance method is chosen the termination can be configured as follows e Ideal TX termination The transmitter is ideal with a 50 ohms single ended termination e Non ideal TX termination Select one of the following options e R Transmitter impedance is modeled as a resistance R ohms single ended e R C1 Transmitter impedance is modeled as an RC network with a parallel resistor in ohms and a capacitance in pF e File Input Frequency Real Imaginary Transmitter impedance is modeled by a frequency dependent complex impedance table described in the input file For an Altera transmitter the default termination configurations are automatically selected and specified Functional Description GJ Send Feedback UG 1146 l l 2015 05 04 Receiver Options 2 57 e Equalization tab For Arria 10 GX SX GT Stratix V GX and Arria V GZ devices the DFE model is embedded in the JNEye and is not configurable For Custom and PCI Express 8GT receivers the follo
160. on example with one transmission channel such as a loss channel or a victim channel and two crosstalk channels Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Channel Setting 2 63 Figure 2 44 JNEye Channel Setting with Link Design and Channel List lt A Demo ALTERA JMEye Release 15 0 Win32 NY JNEye i E TEDTTWTERR Release 15 0 Transmitter Channel Receiver Test Point Gf Connect TX FS TA F Q ua 1 4 i maar Channel DERE v E i PCLFawess fGT Becervir Link and Simulaton Setting Shunt Agg Channel Test Point Name Cs p An S parameter channel component such as a connector cable or backplane can be described by the following parameters or information e ID Sequence or location of the channel component The top channel is connected to the transmitter and the bottom channel is connected to the receiver Note Embedded package models such as Package models for Altera devices and PCI Express Gen3 devices are not shown in the channel list or Link Designer e Channel Name An S parameter file that describes the channel component The S parameter can be 4 port 8 port 12 port 16 port and so forth When your cursor hovers on a channel list a tooltip shows the S parameter file location This information is useful if you share JNEye configuration files e Type Specify the type of channel characteristics to be used in the link simulation The type of
161. ons are completed Use a compliance mask to examine whether the waveform or eye diagram meets the receiver s requirements at certain conditions such as BER target PCI Express 8GT receiver eye masks are provided Note Device intrinsic jitter can be included in the link simulation by using the Characterization Data Access function in JNEye When both transmitter and receiver jitter are extracted from the Characterization Data Access and included in the simulation the simulation results at the end of Functional Description Altera Corporation GJ Send Feedback l l l l UG 1146 2 16 Link and Simulation Setting 2015 05 04 the link represent the link margin at the specified bit error rate BER target Link margin simulation using transmitter and receiver jitter provides better accuracy than the conventional eye mask method Eye Diagram Mask Designer JNEye supports custom eye diagram mask definition When the Eye Diagram Mask Designer option is selected the custom eye diagram mask configuration window opens You can then specify the dimension of the eye diagram mask The custom eye diagram mask is used in the simulation Two eye diagram mask types are supported Figure 2 11 Hexagon Shaped Eye Diagram Mask Editor ALTERA JNEye Eye Diagram Mask Designer o JNEye Eye Diagram Mask tent Tee Tae ee Co Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Link and Simulation Setting 2 17
162. optimization method FIR gt CTLE gt DFE is a good choice for most applications or channels for time efficient link optimizations It is the default link optimization method in JNEye For heavy insertion loss channels such as when insertion loss gt 25 dB at Nyquist frequency FIR gt CTLE gt DFE provides good coverage For strong impedance discontinuities CTLE gt FIR gt DFE methods provide better performance in general For large crosstalk noises choose FIR gt CTLE amp DFE for high loss channels or CTLE gt FIR amp DFE for moderate loss applications Notes JNEye supports link optimization for selected IBIS AMI models for the link optimization modes and the methods shown above Refer to the IBIS AMI model support sections for details For a transmitter equalization sweep simulation JNEye provides batch simulation capability using the JNEye Batch Simulation Controller tool Refer to the JNEye Batch Simulation Controller section for details FOM of Link Optimization Use this menu to select the figure of merit FOM for optimizing the serial link There are three options Area Width and Height The signal conditioning mechanisms which include transmitter pre emphasis de emphasis and receiver equalizers use these selections to optimize the waveform so that it has the best eye diagram opening in terms of area width or height Compliance Mask JNEye plots link compliance eye diagram masks after the simulati
163. or Transmitter Setting 2 75 Figure 2 59 Setting Up the Crosstalk Aggressor for a Crosstalk Channel coy 2 X ee ALTERA JNEye Channel Wizard Channel Demo s12p Chanisel Characberrstie a e 1 f JNEye supports up to eight individual crosstalk aggressor transmitters However a crosstalk aggressor transmitter can be shared among crosstalk channels By combining the aggressor relative amplitude frequency offset and delay setting JNEye can generate a variety of crosstalk aggressor signal sources After completing the configuration in the Channel Wizard go to the JNEye GUI and select the Aggressor Transmitter tab Functional Description Altera Corporation GJ Send Feedback 2 76 Crosstalk Aggressor Transmitter Setting Figure 2 60 Aggressor Transmitter Tab Altera Corporation UG 1146 2015 05 04 oe x ALTERA JNEye Release 14 0 L harra Feuf mode Fpof fu eA 15 g Ps Se see fom Mice i Tarea Lib poe 2 Dome Static VO 7 0 20 Fees peip Areal T poria Tir 20 and poar ap ia 3 J Mien user hpa does nor mateh dhe TX E28 configuration the TX pee emphasis mif be cisadieci in suai Functional Description send Feedback UG 1146 2015 05 04 System Options 2 77 Within the Aggressor Transmitter tab there are eight aggressor types associated with the aggressor types in the Channel Wizard s Signal Source menu Each aggressor can be configured as follows e Data Ra
164. or specify parameters for the simulation Figure 2 30 Transmitter IBIS AMI Parameter Type Designation for Link Optimization Link and Simulation Seting TET Receiver Channd Aggressor Transmitter Ss se canne IBIS File ibs AMI Model Stratix 5NS5GX v2pt x Component StratixSGX_Tx Jitter Noise Components 1Bis AMI Status tap1 0 v E Sweep as TX Post Tap1 f tap2 0 v Sweep as TX Post Tap2 v ptap 0 Sweep as TXPre Tapl v inv_tap1 0 0 Sweep as TXPostTapl Sign M 0 BW Sweepas TXPostTap2 Sign inv_ptap 0 _ Sweepas TXPIETASISign o JNEye 15 0 supports link optimization with IBIS AMI transmitter models On the left are the model specific parameters For each parameter that JNEye determines is sweepable a pull down menu allows you to assign the transmitter parameters The types of transmitter parameters are as follows No Sweep No sweeping or link optimization is performed Sweep JNEye sweeps or performs link optimization using available options provided by the IBIS AMI model Sweep as TX Main Tap JNEye treats this parameter as the main cursor tap of transmitter equalizer in link optimization Sweep as TX Main Tap Sign JNEye treats this parameter as the sign bit of the main cursor tap in link optimization Sweep as TX Post Tap n JNEYye treats this parameter as the n th post cursor tap of transmitter
165. orts crosstalk aggressor location for multiple lane S parameters aggressor series inductance value in nH AC coupling capacitor value in nF and shunt capacitance value in pF The Channel Wizard checks the integrity of the channel component in terms of passivity and causality characteristics When the Channel Wizard detects passivity and causality violations it displays messages about the severeness of the violations in the text box on the left of the OK button The levels of channel integrity violation are listed in the following tables Table 2 2 Channel Passivity Check Results and Recommendations Passivity Violation Check Impact on Link Simulation Recommendations Results Accuracy No Passivity Violation No impact No action needed Altera Corporation Functional Description C Send Feedback UG 1146 2015 05 04 Constructing Communication Links in the Link Designer Module 2 5 Passivity Violation Check Impact on Link Simulation Recommendations Results Accuracy Slight Passivity Violation Minor Passivity Violation Passivity Violation There may not be a noticeable The channel model can be further effect in the simulation result improved but the improvement in terms of simulation results accuracy can be small There may be a noticeable The channel model can be further effect in the simulation result improved The differences in terms of simulation results and accuracy are expected Simulation result will
166. ory Mode setting Output Directory Mode e Sync with jne file location Automatically sets the output directory to the directory location when jne jneschm is created by a user with the Save or Save as command e As specified in the Output Directory Sets the output directory to the location specified in the Output Directory text box Default Output Image Format Set the default output image format to PNG JPG or GIF e Jitter Sensing Sensitivity Select the sensitivity of jitter detection when JNEye performs jitter analysis Beta feature in the 15 0 release The selections are Default Ideal Low Medium and High The Default setting is equivalent to the Ideal setting e S parameter Integrity Check Use this entry to enable or disable channel integrity checking in JNEye The default setting is Enable Choose Disable if JNEye has issues in opening or accessing an S parameter model Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 System Options 2 79 Simulation tab Figure 2 62 System Options Window Simulation Tab ALTERA JNEye System Options ALTERA JNEye System Options Link Optimization Option Accuracy Default Eye Diagram Plot Length 4036 bits Channel Generation Setting Channel Generalion Frequency Step INEye Channel Generation Max Frequency 3Hz S parameter Caching Enable System Options Oo a Defaul
167. ovides the following default test point options e Data Latch Only default option Simulation results at the data latch will be saved and displayed Data latch can be at DFE output CTLE output or input stage of receiver depending on the link or device configuration Custom test points will be neglected and the simulation results at test points will not be shown e TX Channel CTLE DFE Latch JNEye automatically sets up to four test points for the link e Transmitter output Ifa transmitter package model is present for example the package model is embedded as in Altera devices and PCI Express 8GT or external for example using the Custom package option the output appears after the package model If no package model is present the output appears at the transmitter output e Channel output The second test point is at the end of channels e CTLE output If you enable the receiver CTLE the third test point is at the output of the CTLE e DFEoutput The fourth test point is at the output of the receiver DFE Note Custom test points are neglected with this test point option Custom Test Point and Data Latch JNEye plots the output at custom test points and the final data latch point Probe Type JNEye provides two type of probes e Ideal With an ideal probe the waveform signal or eye diagram is plotted by assuming that the link is terminated with an ideal 50 ohms termination at the probe location e High Impedance
168. pdate When the Automatic Jitter Noise Update option is disabled turning on this option allows you to manually update the jitter noise figures from the IBIS AMI model available for models which are compliant with IBIS AMI 6 0 and later AMI tab The AMI tab shows the following AMI configuration parameters Figure 2 41 Receiver IBIS AMI Model AMI Configuration Tab mkaniSimdakfdi CMI Channel Aagressor Toit Receives Bis AMI is AMI IBS Fle is AM Mode ra SOSGI 25 yeg g Functional Description Altera Corporation GJ Send Feedback UG 1146 2 60 Receiver Options 2015 05 04 e Model Name IBIS AMI model name e Reserved Parameters e The IBIS AMI reserved parameters are shown The reserved parameters are meant for the JNEye simulation configuration e JNEye supports the IBIS AMI Rev 5 0 and 6 0 jitter format IBIS AMI receiver jitter parameters Rx_Clock_PDF are extracted and automatically set in the Receiver s Jitter Noise window with the interpretation shown in the following table Table 2 13 IBIS AMI Receiver Jitter Parameters IBIS AMI Rx_Clock_PDF Parameter JNEye Interpretation Rx_Clock_PDF Usage Info Type Float DJ lt mean gt UI pk or ps pk Uniform distribution RJ sigma UI RMS or ps RMS Format Gaussian lt mean gt lt sigma gt Rx_Clock_PDF Usage Info Type Float DJ lt mean gt lt mean gt 2 UI pk or ps pk Dual dirac distribution RJ sigma UI RMS or
169. pe or copy the phase noise and spur data in the text boxes as shown in the above figure The reference clock phase noise data can be found in the example configuration file Demo jne Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback UG 1146 3 8 Setting Up the Control Module 2015 05 04 Transmitter Tab Figure 3 7 Transmitter Settings TX EQ AC Gain Pre Tap 234 Post Tap1 Post Tap2 Set the following parameters in the Transmitter tab e Transmitter Stratix V GX e Package Stratix V GX e VOD Selection 40 800 mV e Pre emphasis Auto e PLL Type ATX LC e PLL Bandwidth Low e Jitter Noise Component e Ifthe Altera Device Characterization Data Access function is enabled click Characterization Data Access A message box appears Read and close the message box Transmitter jitter figures are populated automatically and the jitter noise modeling mode is selected e If Altera Device Characterization Data Access is not available manually type in the jitter numbers shown in the above figure Note that the simulation results might differ slightly if the jitter data is from manual input Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Setting Up the Control Module 3 9 Receiver Tab Figure 3 8 Receiver Settings Configuration ss d o 9 e s 3 iun 4 4 e
170. peak peak e RJ RMS Random jitter RMS Note In JNEye 15 0 jitter analysis is available in Hybrid simulation mode only Related Information e JNEye Batch Simulation Controller on page 2 129 e HST Jitter and BER Estimator Tool User Guide for Stratix IV GT and GX Devices Functional Description Altera Corporation GJ Send Feedback UG 1146 Transmitter Setting 2015 05 04 Transmitter Setting The transmitter generates signals based on the transmitter clock and test pattern conditions Figure 2 15 JNEye Transmitter Settings TUE VOD Selection v Es VOD 829 54 mV Pre Emphasis Manual 7 Aa Pre Tap2 Pre Tap1 Post Tap1 Post Tap2 D 2 0S 09 o nares Supply Voltage Defaut BP_ v PVT Vem Defat v PVT Model Coverage Waveform E Linked to Characterization Data Transmitter The following transmitter types are supported e Stratix V GX e Arria V GZ e Arria 10 GX SX e Arria 10 GT e IBIS AMI e Custom e PCI Express 8GT The transmitter type determines what other transmitter settings you can select When a transmitter is chosen it is automatically inserted into the Link Designer ready to connect to other link components Package Select a package type for the transmitter device For Altera products and IBIS AMI models the package models are included in the device models For Custom devices the package model is specified in the channel setting When you select the Cust
171. ple LL TER JIN ve ALTERA JNEye Channel Viewer Ch el Viewer 150401 Channel Analysis Demo Amplitude dB IL Me Mask Freq Amp dB 10 Te9 1 IL Max Mask Freq Amp dB DL LL LL LLL Ld 253 15 3 05 4 05 5 05 6 05 7 05 ILD Min Mask Freq Amp dB Frequency GHz 1e9 4 ei eeu ese 190401 Channel Analysis Demo Return Loss Plot This plot is labeled CP RL In this plot the return loss characteristics of channels are shown as in the following figure Functional Description Altera Corporation GJ Send Feedback UG 1146 2 116 Plot Configuration Panel 2015 05 04 Figure 2 95 Channel Analysis Module s Return Loss RL Analysis Example ALTERA JNEye C c gt So ALTERA JNE e Channel Viewer Sw JNEye anneal s er 1150401 git Analycic T Taat at Channel Viewer 150401 Channel Analysis Demo Amplitude dB ECHO M 10 1e9 1 d ee ee IL Max Mask Freq Amp dB i H H 1 i i i i Llc E lxxx aas 08 1005 12 14 16 18 4 05 8 2 05 o5 05 05 2005 2205 2 2605 28 05 ILD Min Mask Freq Amp dB Frequency GHz 10 le9 4 405 6 05 see aee E CENTUM TN ro n 1 i Lec cC d T Py TTET a ID Channel Test Point Name Type Port Cfg Lane Agg D Rel Amp 1 2 Loss 2 2 1 1 JNEye Tae ATIS 150401 Channel Analysis Demo Insertion Loss to Crosstalk Ratio Plot This plot is labeled CP ICR In this
172. plus the transmitter s intrinsic jitter red after the Golden CDR most likely in a scope cyan and after the Golden CDR with transmitter s intrinsic jitter black The associated random jitter from the phase noise power spectrum at each of the above stages are calculated and displayed in the text below the plot Figure 3 18 Reference Clock Phase Noise Characteristics Before and After TX PLL JNEye Data Viewer 15 TX Scope Phase Noise 40 53 m X 30 53 B DN 0 Anm ee a A NL i LL Ae Pi Pieinrin 70 53 After COR PN nis amic 100 53 110 53 120 53 130 53 140 53 120 253 160 33 170 53 180 53 Phase Noise dBclHz 190 23 200 53 210 53 220 53 230 53 240 53 z d 5 L 1 00 10 00 100 00 1000 00 10000 00 100000 00 1000000 00 100 0 100000000 TODO 0 OD UU Offset Frequency Hz Random Jitter RJ Components After PLL Total RJ 26 281 ps rms RJ from RefCLk 26 211 ps rms RJ from intrinsic source 1 000 ps rms After Measurement CDR Total RJ 0 885 ps rms Rd from RefCLK 234 735 fs rms RJ from intrinsic source 20 885 ps rms At the channel output which is located at the end of backplane channel with crosstalk the eye diagram is largely closed because of the large channel loss from the TX package and the backplane Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Analysis 3 19 Figure 3 19 Channel Output Hy
173. r 1 e JNEye CILE Setting Mode High Data Rate If Receiver High Data Rate Mode Equalizer 0 e JNEye CILE Setting Mode High Gain Refer to the Arria 10 Transceiver PHY User Guide Receiver High Data Rate Mode Equalizer AC Gain Control Receiver High Gain Mode Equalizer AC Gain Control Receiver High Gain Mode Equalizer DC Gain Control Receiver Variable Gain Amplifier Voltage Swing Select Receiver Decision Feedback Equalizer Mode Receiver Decision Feedback Equalizer Fix Tap One Coefficient Functional Description GJ Send Feedback UG 1146 2015 05 04 Jitter Noise Setting 2 49 DFE Tap 2 Receiver Decision Feedback Equalizer Fix Tap Two Coefficient DFE Tap 3 Receiver Decision Feedback Equalizer Fix Tap Three Coefficient DFE Tap 4 Receiver Decision Feedback Equalizer Fix Tap Four Coefficient DFE Tap 5 Receiver Decision Feedback Equalizer Fix Tap Five Coefficient DFE Tap 6 Receiver Decision Feedback Equalizer Fix Tap Six Coefficient DFE Tap 7 Receiver Decision Feedback Equalizer Fix Tap Seven Coefficient RX Impedance Receiver On Chip Termination R in Receiver Options Termination CDR Type Arria 10 Transceiver CMU PLL Hybrid CDR Bandwidth Bandwidth in PLL Options Jitter Noise Setting JNEye provides extensive jitter and noise modeling and configuration capabilities The receiver intrinsic jitter and noise types are categorized in the following table You can configure each jitter and noise type by
174. r mee ji lata Viewer Demo Plot List D TX Eyediagram 1 TX BER Eye 2 TX BER Contour E 400 001 3 TX Eye Width G Factor 350 00 4 TX Eye Height Q Factor TOR 5 TX TIE c A 30 2 rcc fe ime j Au 6 TS TIE Histogram a a 7 TX Rise Fall Time Pero 8 TX Spectrum 3 Ks Waveform L I 4 d I e m X ma La ae ma me 1 I I l I I i I I I a I 11 TX Scope BER Eye 12 TX Scope BER Contour 13 TX Scope Eye Width Q 14 TX Scope Eye Height G 15 TX Scope Phase Noise 16 TX Scope TIE 17 TX Scope TIE Histogran 18 TX Scope Rise Fall Tim 13 TX Scope Spectrum 20 TX Scope Wavefom 21 CH Eyediagram 22 CH BER Eye 23 CH BER Contour 24 CH Eye Width Q Factor 3 SAT at a 3 s cg A s 25 CH Eye Height G Factor J ir NS HN 30 00 25 00 OM 25 00 OD 75 00 100 00 123 00 26 CH Spectrum T Tes 27 CH Waveform D 30 28 CTLE Eyediagram 34 253 CTLE BER Eye d 30 CTLE BER Contour 31 CTLE Eye Width G Fact 8 12 32 CTLE Eye Height Q Fac _ 1205 acne TIF We IER Te I 15 00 Lc pasame o Em Image Output m inis Plot SaveAllPles J All Plots S P I bapen npa nmm ma l m a m m m h ill m p l m m ee ee m m i fa m m m F M m m a 5 18 1 Leg IO BER Load re Data Viewer 11 12 2014 3 17 21 PM D
175. r Data Viewer Designer Setting Setting Options Constructing Communication Links in the Link Designer Module The Link Designer module allows you to construct communication links 2015 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance ISO of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any 9001 2008 products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information Registered product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services JN Oe RYA 101 Innovation Drive San Jose CA 95134 Tm UG 1146 2 2 Constructing Communication Links in the Link Designer Module 2015 05 04 Figure 2 2 JNEye Link Designer Module Transmitter 1 D i Receiver I i l i
176. rameter MHz S DB R 50 00 0 000 400 0 6 9725 0 400 0 400 0 6 9725 0 400 0 400 0 400 0 400 0 400 0 400 0 6 9725 O0 400 0 400 0 6 9725 0 400 O0 10 0 400 0 6 9725 0 400 0 400 0 6 9725 0 400 0 400 0 400 0 400 0 400 0 400 0 6 9725 O0 400 0 400 0 6 9725 0 400 O0 100 0 400 0 6 9725 0 400 0 400 u 6 9725 0 400 0 400 0 400 0 400 0 400 0 400 0 6 9725 O0 400 0 400 0 6 9725 0 400 O0 1000 0 400 0 6 9725 0 400 0 400 0 6 9725 0 400 Q0 400 0 400 0 400 0 400 0 400 0 6 9725 O0 400 0 400 0 6 9725 0 400 O0 10000 0 400 0 6 9725 0 400 0 400 0 6 9725 0 400 0 400 0 400 0 400 0 400 0 400 0 6 9725 0 400 0 400 0 6 9725 0 400 O0 100000 0 400 X 6 9725 0 400 0 400 0 6 9725 0 400 0 400 0 400 0 400 0 400 0 400 0 6 9725 O0 400 0 400 0 6 9725 0 400 O0 VGA Bandwidth VGA Gain determined by the receiver model DFE Mode The DFE can operate in Auto mode Manual mode or be disabled Functional Description GJ Send Feedback Altera Corporation UG 1146 2 46 Receiver Setting 2015 05 04 e Altera receivers e Stratix V GX Arria V GZ Aria 10 GX SX and Arria 10 GT DFE models are supported in both Auto mode and Manual mode e In Auto mode JNEye finds the optimal DFE setting for the given link configuration e In Manual mode you select and set each DFE tap level e For Arria 10 GX SX GT with floating DFE tap supports a floating DFE tap location can be either aut
177. re Victim Channel with JNEye Channel Wizard A ALTERA JNEye Channel Wizard ell JNEye Channel Wizard NX JNEye Channel Demo s12p Channel Configuration Channel Characteristics Channel Type Lane 0 00 1 Input Lane 2 Victim m ooi Lane 3 39 Input Input Output Output Output Amplitude dE Crosstalk Aggressor Configuration Signal Source m mni Relative Amplitude Delay Frequency Offset Aggressor fequency offset is negative oniy Maamum aggressor frequency offset rs 990 000 ppm Frequency GHz Passivity Check No Passivity Violation Causality Check Slightly non causal OK Tutorial PCI Express 8GT Altera Corporation GJ Send Feedback l UG 1146 3 12 Constructing the Channel 2015 05 04 Perform the following steps to add the first crosstalk channel 1 Click Channel in the Link Designer panel and select Far end Crosstalk FEXT 2 Use the file browser to locate the channel model file Demo s12p and add it to the channel list as FEXT 3 The JNEye Channel Wizard displays the FEXT 1 characteristic Note that the Crosstalk Aggressor Location 1 is selected in for this channel 4 Click OK to close the Channel Wizard 5 Place the channel icon in the Link Designer Figure 3 11 First Far end Crosstalk Configuration in Channel Wizard ALTERA JNEye Channel Wizard ww JNEye Channel Configuration JNEye Channel Wi
178. req Hz Amplitude dBoc 100000 110 le 006 90 le 007 80 Periodic Jitter Method Triangle Frequency 0 Hz Amplitude 0 ps Hershey Key 0 05 Sharkfin Key 04 5 Transmitter Stratix V GX Package Stratix V GX VOD 1 V Functional Description Altera Corporation GJ Send Feedback l UG 1146 2 96 JNEye Data Viewer Module 2015 05 04 PLL Type Enable PLL Bandwidth SVGX TXPLL High TX Pre emphasis FIR Mode Off Jitter amp Noise Configuration DJ 8 53333 ps DCD 0 ps BUJ 0 ps RJ 0 74 ps rms SJ 0 ps at 0 MHz DN 0 mV BUN 0 mV RN 0 mV rms Receiverr Arria V GZ Package Arria V GZ Supply Voltage 1V CTLE Mode Auto CDR Type Alexander CDR Bandwidth SVGX CDR Medium BW DFE Enable Enable DFE Mode Auto Transmitter Jitter amp Noise Configuration No Jitter and Noise Channel Configuration 1 File Name S12p pin2pin 642010 s12p Channel Type Loss Port Oonrtrigurgstlon i 2 Lane Number 2 Port Number 12 Aggressor ID 1 Aggressor Relative Amplitude 1 Aggressor Delay O0 ACKCkCk KCck KkCckock kCk Kk Ck Kok Kok Kk CK KK I KICK OK KI SK CK CK UK KU KK UK KK OU KO SK OK KO KK KK KO KK ok KK KR Kk MK Ko X XX ACkKCkCck Kock ck ckck kok ck ck kock ck ck ck kk kk Simulation Record KKKKKKKKKKKKKKKKKKKKKKKKKKKKK Transmitter Reference Clock Random Jitter 0 ps RMS Test Point 1 with Ideal Clock Stratix V GX TX Pre emphasis Pre Tap 1 0 00 Post Tap 1 0 00 Post Tap 2 0 00 Eye Wid
179. ribution Jitter RJ Random Jitter UI RMS or ps RMS SJ Sinusoidal Amplitude UI Jitter RJ is assumed to be Gaussian RJ can be specified in either pico second ps RMS or UI RMS Yes Sinusoidal jitter can be specified with amplitude and Eus frequency MHz Yes DNcan be generated using a uniform distribution dual Dirac or truncated Gaussian method You can select the DN generation method in the Transmitter Jitter Noise Options Window The DN Deterministic Noise default DN method is uniform Same as DN The default method is Truncated Gaussian method with a Peak to RMS ratio of 14 You can select the BUN generation method and parameters in the Transmitter Jitter Noise Options Window Uncorrelated Noise B RN is assumed to be Gaussian Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Jitter Noise Component 2 29 Description Support Comments in JNEye Jitter PDF Jitter Jitter Yes _ Jitter PDF defines the jitter probability density Probability amplitude function The input format is jitter amplitude in Density Probability second and probability The following is a jitter PDF Function Jitter example PDF m ae can Rei Weil e in absolute time or UI 4e 12 3e 7 unit interval unit 3e 12 le 4 ae 7 Teen le 12 0 29 0 0 4 le 12 0 29 MENA Teen 3e 12 le 4 4e 12 3e 7 5e 12 le 10 Noise Noise Noise Yes Noise PDF defines the noise pro
180. s Functional Description Altera Corporation GJ Send Feedback 2 100 JNEye Channel Viewer Module Figure 2 79 JNEye Channel Viewer User Interface ALTERA JNEye Channel Views Amplitude dB 800 10 00 1200 1400 16 00 00 2000 2200 24 00 2600 2800 3000 Frequency GHz xX F Sdd22 Fi Scd22 c21 Channei Viewer Demo N Sdc11 Sdc22 Scd12 7 Sect Sgr Scc 12 13 14 a ne b s22 S23 2 gs NC S32 S94 F S42 F saa V IN 524 Viewer DE Ao eo oum Y Sove J Saves P s Channel interface Selection Ul The following figure shows the Channel Viewer GUI panel partitions Altera Corporation GUI Plot Controls aw Data Cursors m Frequency Response Impulse Response UG 1146 2015 05 04 and Single Bit Response S parameter Control ks E oers Output Options Functional Description GJ Send Feedback UG 1146 2015 05 04 Channel Plot Panel 2 101 Figure 2 80 JNEye Channel Viewer GUI Panel Partitions ALTERA JNEye Channel Viewer SN ALTERA JNEye Channel Viewer NY JNEye Channel Viewer Demo mum mEm ee NEED ee NES ee Configuration S parameter Mode Y o Fri Saa21 Channel Analysis and Compliance M ule OF Plot Type Frequency Response v Amplitude m Linear Max Plot Control Panel Amplitude dB a Plot ud NY IN SPERA Frequen
181. s JNEye Channel Designer JCDE contains the following channel components Stripline Microstrip Coax RLGC transmission line Functional Description Altera Corporation GJ Send Feedback 2 132 JNEye Channel Designer Nereus e Ideal transmission line e Via model based on composite transmission line blocks e Shunt and series capacitance e Series inductance e S parameter model A channel design can include one or multiple channel components JNEye Channel Designer can combine and generate Touchstone S parameter models that can be used in link simulations JNEye Channel Designer provides user friendly and integrated interfaces The channel components and resulting channel models can be observed and analyzed using embedded plot functions or the JNEye Channel Viewer In the 15 0 JNEye release a 2 port single ended channel model will be generated internally for all of the above components except the S parameter model After the single ended model is generated JNEye Channel Designer converts it into a 4 port differential pair format by assuming that these two single ended channels are uncoupled Channel cascading of all channel components which include S parameter channel components are done in the 4 port level Starting the JNEye Channel Designer You can start JNEye Channel Designer in two ways e Double click JNAEye Channel Designer exe e Click Channel Designer in the JNEye Control Module The JNEye Channel Designer s graphical
182. shown in the following table Table 2 9 IBIS AMI Jitter Parameters IBIS AMI Tx_Jitter Parameter JNEye Interpretation Tx_Jitter Usage Info Type Float DJ lt mean gt UI pk or ps pk Uniform distribution RJ sigma UI RMS or ps RMS Format Gaussian lt mean gt lt sigma gt Tx_Jitter Usage Info Type Float DJ lt mean gt lt mean gt 2 UI pk or ps pk Dual Dirac distribution RJ lt sigma gt UI RMS or ps RMS Format Dual Dirac mean mean lt sigma gt Tx Jitter Usage Info Type Float DJ lt maxDJ gt UI pk or ps pk Uniform distribution RJ sigma UI RMS or ps RMS Format DjRj minDj gt maxDj gt lt sigma gt Tx_Jitter Usage Info Type Integer Float UI Float Refer to the transmitter jitter description Format Table Labels Row_No Time or UI Probability in the Jitter Noise Component section CS 52 10 16 10 4 4e 12 3e 7 IBIS AMI Tx_DCD Parameter JNEye Interpretation Tx_DCD Usage Info Type Float DCD lt typ or min or max based on corner selection gt UI pk or ps pk Clock jitter distribution Format Range lt typ gt lt min gt lt max gt Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Characterization Data Access 2 41 e Model Specific Parameters This section lists all the model specific parameters that the IBIS AMI model provides You can use their selections
183. sion of device specifications before relying on any published information and before placing orders for products or services JANOS R3 AN 101 Innovation Drive San Jose CA 95134 3 2 Methodology UG 1146 2015 05 04 Stratix V GX transmitter has a 4 tap FIR to compensate for channel effects The PCI Express 8G receiver has CTLE and a 1 Tap DFE per PCI SIG definition To accomplish these goals set up a transmitter model a receiver model and a link with the following parameters Altera Corporation Data rate 8 Gbps Test pattern PRBS 23 BER target BER lt 10 stratix V GX transmitter Vop 800 mV VOD Level 40 Edge rate Per Stratix V GX characteristics 4 Tap TX FIR 1 pre tap and 2 post taps Stratix V GX package model embedded PLL ATX LC set to low bandwidth Output Jitter Retrieved from the Altera Characterization Database embedded in JNEye contact your Altera representative to enable this function e DCD 0 012 UI e BUJ 0 032 UI e RJ 1 00 psgms 8 Gbps BER lt 1071 Receiver CTLE e Programmable with 6 dB 12 dB boost at 4 GHz e Per PCI SIG specifications 1 tap DFE PCI SIG receiver package model 12 port S parameter model from PCI SIG CDR Generic binary CDR with high loop bandwidth 26 MHz Receiver Jitter e Dj 7ps e RJ 1 55 pspys at BER lt 10712 Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Methodology 3 3 The 18 inch backplane channel is d
184. stalk Ratio Plot This plot is labeled CP ICR In this plot the Insertion Loss to Crosstalk Ratio ICR of channels and the ICR mask are plotted as in the following figure Functional Description Altera Corporation GJ Send Feedback UG 1146 2 122 Plot Configuration Panel 2015 05 04 Figure 2 101 10GBASE KR Channel Compliance Module s Insertion Loss to Crosstalk Ratio ICR Analysis Example ALTERA JNEye Channel a v we e x ALTERA JNEye Channel Viewer NV JNEye y Channel Viewer Demo Pet Corfiguration S parameter Mode Channel Analysis and Compliance Module 10GBASE KR a o a E lt x 1 00E 009 Frequency Hz Output Image Type Disable Y Demo s12p Output Directory Save current plot to a file OIF CEI 28G SR 3 0 and OIF CEI 25G LR Channel Compliances The following figure shows the OIF CEI 28G SR 3 0 channel compliance check GUI Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 Plot Configuration Panel 2 123 Figure 2 102 OIF CEI 28G SR 3 0 Channel Compliance Check User Interface UB ALTERA JNEye Channel Viewer P990 90 MD ALTERA JNEye Channel Viewer Channel Viewer Demo_28G_C2C Channel Channel Analysis and Compliance Module OIF CEI 28G SR 3 0 Y Amplitude dB PQ20401N4K130178 s4p Loss Fitted PQ20401N4K130178 s4p Loss PQ20401N4K130174 s4p FEXT PQ2
185. t Directory Save current plot to a file Il ST eg Demo JNEye Batch Simulation Controller The JNEye Batch Simulation Controller allows you to run multiple simulations by not invoking the JNEye Control Module This capability allows you to run multiple link simulations and then review the results offline Functional Description Altera Corporation GJ Send Feedback UG 1146 2 130 JNEye Batch Simulation Controller 2015 05 04 Figure 2 109 JNEye Batch Simulation Controller Simulation Name Test Pattem SimLength Status Eye Width Eye Height Sim Time 2015 4 2 10 42 54 1 BatchSen_Sinch 4mis uspje PRBS 23 65536 NotRun 0 20154 2 10 42 54 2 BatchSem l inch 4mils ustrpjne PRBS 23 65536 NotRun 0 2015 4 2 10 42 54 3 Batchtum VSR Thnijne 8 PRBS 23 Delete Disabl Reset Reset All Clear Al View Job Run View Selected Batch Simulation Configuration Max Conurrent Simulation Sessions 1 Output Directory ma Simulation Result Display Option Manually Select Job amp Display Result Simulation Window Close Time 2 5 mm mr Se th Stn eee eee ome Total Simulation Elapsed Time 00 00 00 s The JNEye Batch Simulation Controller accepts JNEye simulation configuration jne files You can set up and save their link simulation configurations using JNEye Control Module You can then add each individual JNEye job to the batch job list and execute all the jobs Th
186. t Eye Diagram Plot Length This parameter controls the waveform length used to construct the eye diagram when the Build Eye Diagram w Whole Waveform option is disabled You can increase the length as long as the length is less than the simulation length The default value is 4096 bits Build Eye Diagram w Whole Waveform If Enable is selected JNEye uses the whole simulated waveform to build the eye diagrams If the simulation length is large this will take more time The default setting is Enable Link Optimization Option The choices are Accuracy or Speed The default is Accuracy By selecting Speed the link optimization process runs faster at the cost of possibly less optimal solutions Channel Generation Max Frequency Sets the default maximum frequency of the channel models generated in JNEye The default value is 35 GHz Channel Generation Frequency Step Sets the default frequency step of the channel models generated in JNEye The default value is 10 MHz S parameter Caching If Enable is selected the last read S parameter file is cached in memory for faster access and processing Doing this greatly improves GUI performance when reading a multiple lane S parameter file with large file size You can disable this feature Functional Description Altera Corporation GJ Send Feedback l UG 1146 2 80 JNEye Data Viewer Module 2015 05 04 JNEye Data Viewer Module The JNEye Data Viewer displays simulation and analysis results The Da
187. ta Viewer can be started in the following ways e Automatically start after the completion of a simulation e Click Data View in JNEye s main GUI e Double click JNEye_Data_Viewer exe JNEye uses the Data Viewer to show various types of simulation and analysis results It can show multiple plots Use the list box in the left panel to select the plots Figure 2 63 JNEye Data Viewer User Interface A ALTERA JNEye Data Viewer arm ALTERA JNEye Data Viewer WJNEye Data Viewer Demo Voltage Histogram 0 TX Eyediagram at Sampling 1 TX BER Eye 2 TX BER Contour Point 3 TX Eye Width Q Factor a Eye Height Q Factor 7 TX Rise Fall 9 T2 TX Scope BER Contour i j Wt idth Q Observation Point senio anh rear Selection 15 TX Scope Phase Noise L 294 37 344 37 Observation Type 23 CH BER Contour 39437 444 37 Selection la hap Eo Hache nd 0 00 75 00 50 00 50 00 75 00 100 00 125 00 125 00 100 00 26 CH Spectrum Relative Occurrence 5 27 CH Waveform 28 CTLE Eyediagram 29 CTLE BER Eye 30 CTLE BER Contour 31 CTLE Eye Width Q Fact 32 CTLE Eye Height Q Fac fAa1 CTI F TIE Simulation a lee results and Eye diagram Relative O ccurren BER Targa cii des um Tok aeDaba Cursor 2 Zoom Eye Width 0 831 74 126ps Eye Height 637 30mV Jitter gt p 0 17UI 20 874ps at BER lt 10 12 paramete rs Cuatix V GX TX Pre emphasis Pre Tap 1 4 0
188. tatus tab The Status tab shows the parameters that are fed into the IBIS AMI model for simulations Functional Description Altera Corporation GJ Send Feedba ck we l l UG 1146 z Receiver Setting 2015 05 04 Figure 2 31 Transmitter IBIS AMI Model Status Tab Link and Simulation Setting o Tn IBIS File ibs AMI Model Stratix 5 S5GX_v2pi _ x Component Configuratior AMI Control Parameters Stratixh Tx lanore Bits 4 Max_Init_Agoressors 0 Init_Returns_Impul Consider the following for the IBIS AMI transmitter modeling support in JNEye e JNEye only supports the IBIS model with an AMI component An IBIS model without an AMI component will not be simulated e Transmitter PLL is not supported when the IBIS AMI transmitter is selected e JNEye supports IBIS AMI transmitter models with the on die S parameter model using the txic IBIS AMI keyword When JNEye detects the txic keyword the Channel Wizard helps you determine the on die S parameter configuration Related Information Jitter Noise Component on page 2 26 Receiver Setting A receiver receives waveforms from the channel and processes the waveforms through the receiver equalizer and clock and data recovery module Figure 2 32 JNEye Receiver Settings First Floating DFE Tap Me CDR Type Bandwidth Susi V ioe in Vem PVT Model Coverage Waveform Altera Corporation Functional Description GJ Send Feedback UG 1146 l 2015 05 04 Receiv
189. te Data rate of the selected aggressor transmitter in Gbps e Test Pattern Aggressor transmitter s test pattern JNEye supports the following test patterns e Same as victim TX e PRBS 7 PRBS 9 PRBS 11 PRBS 15 PRBS 23 PRBS 31 e VOD Differential output voltage of the aggressor transmitter in volts e Transmitter Type Aggressor transmitter can be one of the following transmitter types e Same as victim TX e Stratix V GX e Arria V GZ e Stratix V GT e Custom e Pre emphasis FIR Pre emphasis or FIR setting of the aggressor transmitter You can set it to be the same as the victim TX or you can type in the setting Note In manual pre emphasis FIR input mode the pre emphasis FIR setting must be in the same format as used in the Transmitter tab This does not mean that the aggressor transmitter must be the same type as the victim transmitter but that the pre emphasis setting format must be in the format as if it is a victim transmitter For example if the aggressor transmitter type is Altera Stratix V GX the pre emphasis FIR setting will be in a list of TX FIR levels such as 1 0 20 3 where 1 is the pre tap 1 value 20 is the post tap 1 value and 3 is the post tap 2 value The main tap can be any value because JNEye determines the main tap s value based on the values of other FIR taps e Ifthe user input TX pre emphasis FIR is invalid for the selected transmitter type pre emphasis FIR will be disabled If the transmi
190. tem that doesn t have Microsoft NET Framework 4 you will get an error message e Download NET Framework 4 0 from the Microsoft web site and install it e 32 bit Windows Execute dotNetFx40 Client x86 exe e 64 bit Windows Execute dotNetFx40 Full x86 x64 exe You may have to install Windows Imaging Component WIC before installing NET Framework 4 You can download WIC from the Microsoft web site Related Information Download Windows Imaging Component Program and File Types JNEye comes with the following executable files e JNEye exe JNEye s main user interface e JNEye Simulation Engine exe NEye simulation engine e JNEye Simulation Engine Console exe JNEye simulation engine console version e JNEye Data Viewer exe The JNEye Data Viewer displays simulation results e JNEye Channel Viewer SA exe Il he JNEye Channel Viewer displays channel characteristics e JNEye Batch Simulation Controller exe The JNEye Batch Simulation Controller runs simulations in batch mode e JNEye Channel Designer exe JNEye s channel designer that generate S parameter channel models for link simulations JNEye uses the following file extensions e jne JNEye simulation configuration e jneschm JNEye simulation schematic configuration e jnetxdata jnerxdata jnedevdata jneledata and others JNEye internal data When you want to share a JNEye link configuration both jne and jneschm files are needed for other users to r
191. ters and simulation configurations Methodology This simulation emulates an Altera Stratix V GX transmitter with embedded package model a PCI Express 8GT receiver with embedded package model and a 18 inch backplane channel Per PCI Express 8GT specifications the link operates at 8 Gbps with a bit error rate BER lt 107 The transmitter must have a minimum differential output voltage of 800 mV and a rise fall time of 35 ps at 0 8 V Voy In this simulation the Stratix V GX transmitter is set to 800 mV Vop VOD level 40 Additionally the 2015 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE ENPIRION MAX MEGACORE NIOS QUARTUS and STRATIX words and logos are trademarks of Altera Corporation and registered in the U S Patent and Trademark Office and in other countries All other words and logos identified as trademarks or service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance Iso of its semiconductor products to current specifications in accordance with Altera s standard warranty but reserves the right to make changes to any 9001 2008 products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information Registered product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest ver
192. th 0 59UI 57 481ps Eye Height 789 36mV Jitter p p 0 41UI 39 489ps Random Jitter 0 883382 ps RMS Test Point 1 with Recovered Clock Stratix V GX TX Pre emphasis Pre Tap 1 0 00 Post Tap 1 0 00 Post Tap 2 0 00 Eye Width 0 74UI 71 875ps Eye Height 807 31mV Jitter p p 0 26UI 25 095ps Random Jitter 0 840335 ps RMS Bit Errors 0 Test Point 2 Eye Width 0 00UI 0 000ps Eye Height 0 DOmV Jacrer p p L 00UL 96 970ps Random Jitter 0 883382 ps RMS Test Point 3 with Ideal Clock CTLE Setting Arria V GZ CTLE DC 0dB AC 12 Gain 14 4111dB BW 12GHz Vod H Auto Mode Method Area Eye Width 0 30UI 29 451ps Eye Height 146 21mV Jitter p p 0 70UI 67 519ps Random Jitter 0 883382 ps RMS Test Point 3 with Recovered Clock CTLE Setting Arria V GZ CTLE DC 0dB AC 12 Gain 14 4111dB BW 12GHz Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Data Viewer Module 2 97 Vod H Auto Mode Method Area Eye Width 0 41UI 39 867ps Eye Height 182 92mV Jitter p p 0 59UI 57 102ps Random Jitter 0 784156 ps RMS Bit Errors 0 Test Point 4 with Ideal Clock DFE Coefficients O Ly 1 O 0 Eye Width 0 34UI 33 049ps Eye Height 157 31mV Jitter p p 0 66UI 63 920ps Random Jitter 0 983392 ps RMS Test Point 4 with Recovered Clock DFE Coefficients O 1 eL O 0 Eye Width 0 50UI 48 485ps Eye Height 187 33mV Jitter p p 0 50UI 48 485ps Random
193. th Altera s standard warranty but reserves the right to make changes to any 9001 2008 products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information Registered product or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services JN Oe RYA 101 Innovation Drive San Jose CA 95134 UG 1146 5 2 How to Contact Altera 2015 05 04 How to Contact Altera Table 5 1 Altera Contact Information Technical support Website www altera com support Website www altera com training custrain altera com Product literature www altera com literature Nontechnical a a support Software licensing authorization altera com Related Information Technical training e www altera com support e www altera com training e www altera com literature 9 You can also contact your local Altera sales office or sales representative Altera Corporation Additional Information GJ Send Feedback
194. th capacitance in various units e Gdc Unit length DC conductance in various units e Gac Unit length AC conductance in various units e Length Length of the coax in various units e Freq Frequency where the Z0 Impedance and E Eff electrical length are reported in various units e Output parameters e Z0 Impedance at specified frequency Freq Ohm e E Eff Electrical length in various units Functional Description Altera Corporation GJ Send Feedback UG 1146 2 142 JNEye Channel Designer 2015 05 04 Figure 2 116 RLGC Transmission Line Channel Component Configuration Altera JNEye RLGC Transmission Line Designer m Da ET Fi WA JNEye JNEye RLGC Transmission Line Ec RLGC Transmission Line Characteristics RLGC TL oO a uu EL E 15 01 Frequency GHz er c ZemOa jm C ee ote TS a The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel characteristics may have changed Click Analyze to redraw t
195. the X button of the window the design will be discarded Functional Description GJ Send Feedback Altera Corporation 2 140 JNEye Channel Designer UG 1146 2015 05 04 Coax Component A coax transmission line consists of two round conductors in which one completely surrounds the other The two conductors are separated by a continuous solid dielectric A typical coax structure is shown in the following figure with these parameters e Input parameters a Diameter of inner conductor in various units b Diameter of outer conductor in various units t Thickness of outer conductor in various units Length Length of the coax in various units Er Dk Relative dielectric constant JNEye Channel Designer supports frequency dependent dielectric constant mapping TanD Df Dielectric loss tangent JNEye Channel Designer supports frequency dependent dissipation factor mapping Cond a Conductor conductivity of inner conductor S m Cond b Conductor conductivity of outer conductor S m Freq Frequency where the Z0 Impedance and E Eff electrical length are reported in various units e Output parameters Z0 Impedance at specified frequency Freq Ohm E Eff Electrical length in various units Figure 2 115 Coax Channel Component Configuration Altera JNEye Coax Desi ww JNEye CENE NC Amplitude dB m X m r E ER 120083 074 5 01 10 01 15 01 20 01
196. to the Jitter Moise Options button to release the lock After unlocking the jitter noise data entries the Altera characterization data entries might not be applied even if they are visually the same Refer to the JNEye User s Guide for more information IBIS AMI Transmitter JNEye supports IBIS AMI transmitter modeling When IBIS AMI Transmitter is selected the IBIS AMI Transmitter page is shown Figure 2 28 Transmitter IBIS AMI Model IBIS Configuration IBIS File ibs at 0gx ami tx ibs AMI File ami a10gx ami tx V28 ami DLL File di a10gx ami tx x86 di 2 IBIS Model a T gx ami tx ibs s voltage range exceeds the voltage noted in the V table Ideal Pullup network will be used Linked to IBIS AMI Model Functional Description Altera Corporation C Send Feedback 2 38 Characterization Data Access Package Package models are required in all IBIS models JNEye includes the IBIS package model in the simulation by default You can choose other package models by changing the Package selection to Custom and specifying the external package model Channel type Package as a channel component IBIS Files Click the file open button next to the IBIS File text box to select an IBIS model file JNEye scans through the IBIS file and allocates all available transmitter components and models If JNEye encounters the following issues in opening or interpreting the IBIS AMI model a warning message is UG
197. tter type is Custom the following parameters are also used e Edge Rate JNEye generates a transmitter output waveform with the specified edge rate Edge rate is in the format of ps Volt e TX FIR Length Length of TX FIR for custom aggressor transmitter e Main Tap Location Location of main tap of aggressor transmitter The example shown in Figure 2 60 indicates an aggressor transmitter which is a custom transmitter type running at 6 5 Gbps with the PRBS 23 test pattern and a VOD of 1 2 V The TX FIR coefficients are 0 1 0 65 0 25 with a TX FIR length of 3 and the main tap is at 2nd tap According to the link configuration shown in Figure 2 58 this aggressor transmitter is associated with Crosstalk FEXT channel ID 3 System Options Use the System Option windows to set the simulation setting Functional Description Altera Corporation GJ Send Feedback UG 1146 2 78 System Options 2015 05 04 e System tab Figure 2 61 JNEye System Options Window System Tab S TTE fe ALTERA JNEye System Options c S N JNEye ALTERA JNEye System Options system Simulation Hle Directory Setting Output Directory Output Directory Mode Sync with jne file location Jitter Calculation Options Jitter Sensing Sensitivity Channel Integrity Check Options S parameter inter y Check JNEye System Options Output Directory Specify an output directory for the simulation results according to the Output Direct
198. u o L A EN pum BEI p t 4 E aE Au 725 oT lt lt lt a MEO Ed 1 T HF T Hn AEO E d e ij ey E EL Lt 1H a _ 4 2B sb 8 3580 25 71 TE TL 478 1428 2428 H Time ga Time pas j Eye Width Margined 3100 11 0555 Eye He aris 10 GT CI Altera Corporation Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Send Feedback UG 1146 2015 05 04 Analysis 4 15 Figure 4 14 CTLE Output Hybrid Eye Diagram and BER Analysis with CDR Recovered Clock ewer 38 CTLE COR BER Eye Amplitude m Amplitude mV Log iepeE A Viewer 38 CTLE CDR BER Contour Amplitude my This example demonstrated how to use JNEye to set up an OIF VSR 28 Gbps serial link with Altera s Arria 10 GT devices and evaluate its link performance JNEye allows you to e Configure a link e Configure an external reference clock e Configure a transmitter and receiver e Configure a channel e Configure and model jitter and noise sources e Derive accurate jitter figures for Altera devices from the Altera JBE database e Load and save a link configuration e Observe the channel characteristics e Set up test points within the link Compute and observe an eye diagram e Perform BER analysis Tutorial 28 Gbps OIF VSR Link with Arria 10 GT Altera Corporation GJ Send Feedback Additional Information 2015 05 04 UG 1146 Subscribe GJ S
199. ual Dirac or truncated Gaussian method You can select the DN generation method in the Receiver Jitter Noise Configuration Window The default DJ method is uniform BUN Bound Uncorrelated Noise Same as receiver DN above The default method is Truncated Gaussian method You can select the BUN generation method in the Receiver Jitter Noise Configuration Window RN is assumed to be Gaussian Jitter Jitter Jitter Jitter PDF defines the jitter probability density PDF Probability amplitude function The input format is jitter amplitude in Density Probability second and probability The following is a jitter Function PDF Jitter PDF example amplitude can be in absolute time or UI unit interval unit 5e 12 le 10 4e 12 3e 7 3e 12 le 4 2e 12 le 2 le 12 0 29 0 0 4 le 12 0 29 2e 12 le 2 3e 12 le 4 4e 12 3e 7 5e 12 le 10 Altera Corporation Functional Description GJ Send Feedback UG 1146 Jitter Noise Setting 2 51 Comments 2015 05 04 Description Support in JNEye Noise Noise Noise Yes PDF Probability amplitude Density Probability Function Functional Description C Send Feedback Noise PDF defines the noise probability density function The input format is Noise amplitude in volt and probability The following is a noise PDF example 50e 3 le 10 40e 3 3e 7 30e 3 le 4 20e 3 le 2 10e 3 0 29 0 0 4 10e 3 0 29 20e 3 le 2 30e 3 le 4 40e 3 3e 7 50e 3 le 10 Altera Corporation
200. ulation Configuration Selection Transmitter Channel Receiver Test Point Text Box Ef Connect Y ian La kd F Q E AT gaa IBIS AMI Transmitt iD 1 Properties IBIE AMI Receiver The JNEye Batch Simulation Channel Selection window appears Altera Corporation Functional Description GJ Send Feedback UG 1146 s 2015 05 04 Batch Channel Simulation Configuration 2 71 Figure 2 54 Batch Simulation Channel Selection Window Selected Channel Optical Intel 20140418 v02 125void v16 View ving Channel Wizard Jos 7i Add Channel View Al using Channel Viewer i Batch Configuration Ale Name Header Date Time S lm mn RN RN JMEye Batch Simulation Channel Selection 2 Click Add Channel to select channel files A file browser helps you select the channel files you want You can select multiple channels within the file browser You can also click Add Channel repeatedly to add more channels The added channel is listed in the Channel list box with channel type port configuration lane if the channel is 8 port or more and aggressor identification if the channel is a crosstalk channel within a multiple lane S parameter e JNEye uses the Automatic S parameter Configuration Check ASCC algorithm to automatically detect S parameter models port configuration and designate default transmission lane e To observe a channel s characteristics or change a channel s configuration you can e Select the channel
201. user interface is shown in the following figure Altera Corporation Functional Description GJ Send Feedback UG 1146 2015 05 04 JNEye Channel Designer 2 133 Figure 2 110 JNEye Channel Designer User Interface oy x a 141029 ChDE test JNEye Channel Designer Win32 JNEye JNEye Channel Designer 141029_ChDE_test Design Space d Connect EXE ur LE X 65 PF Microstrip Microstrip2 Input Output Component ID 1 Ports See Stripline ee n ta Sei S parameter MEM component Landc 2 Ideal T Line component 2 Via Model Ps Stripline j JNEye Channel Designer d Bao ca j Pii Options Channel Configuration e Coax i S parameter Max Frequency 35 0 GHz S parameter Integrity Check Enable z S parameter Frequency Step 10 0 MHz RLGC T Line Faderence inpedance 500 Ohm Lae Load Save Saveas Reset Piot Aii Components Plot Result Channel Apennin E aw JNEye Channel Designer Channel Designer P EIS i E b E OO m x Project Management and Commands System Options Functional Description Altera Corporation GJ Send Feedback UG 1146 2 134 JNEye Channel Designer 2015 05 04 e Connect Use the straight line or right angled line to connect channel components e Edit User can use these commands to delete copy or paste channel components e Component Individual channel components to b
202. utput P1 P2 P3 P4 P5 P6 eee Pn 2 Pn 2 Channel Setting 2 65 Pn 2 1 5 a Pn 2 2 Pn 2 3 2 Pn 2 4 5 Pn 245 5 Qa Pn 246 Pn4 S Qa Pn If the S parameter file is not Type 1 Type 2 or Type 3 you can use the Custom option in the Channel Wizard s Port Config pull down menu as shown in the following figure When a Custom port configura tion is selected in the Channel Wizard a text box named Port Map appears below the port configuration figure one of the configurations in the above figure Enter the port numbers in the sequence P1 P2 P3 Pn where n is the number of ports as illustrated in the figure above that matches the selected S parameter model In the figure below the Port Map sequence 1 3 2 4 corresponds to a 4 port n 4 S parameter model with port configuration Type 2 where P1 1 P3 Pn 2 1 2 P2 3 and P4 Pn 2 2 4 When a custom port configuration is assigned to an S parameter model it is displayed as port configura tion Type 4 in the channel table Functional Description GJ Send Feedback Altera Corporation UG 1146 2 66 Channel Setting 2015 05 04 Figure 2 49 Custom Port Configuration in Channel Wizard JNEye Channel Wizard Channel 5inch 4mils ustrip s4p Channel Characteristics Channel Type Transmission Lane 1 Pot Cont Sinch_4mils_ustrip s4p Input Input Input Output Output Output Output Input Pot Map 132 4 Crosstalk Aggres e E a
203. wer Module 2 95 Simulation Report A simulation report is shown in the last page of the output windows The simulation report is organized as follows e Simulation Log If link optimization is performed the link optimization FOM figure of merit transition is reported here e User Defined Link Configuration Link configuration is listed in this section which includes e Transmitter Reference clock configuration e Transmitter configuration e Receiver configuration e Channel configuration e Simulation Record Report the simulation results at each test points e Simulation Result Summary e TX FIR Pre emphasis RX CTLE and DFE Settings e Eye Diagram Widths Heights and Margins to the eye diagram mask JNEye Simulation Log Tue Apr 09 22 35 29 2013 Link Optimization Mode TX Manual RX Auto Link Optimization FOM Area Link Optimization Stage Initialization Altera JNEye Simulation Report Tue Apr 09 22 35 44 2013 KKEKKKKKKKKKKKKKKEKK User Defined Link Configuration KKEKKKKKKKKKKKKKKKKKKHK Project Name Demo 7 SVGX AVGZ All Simulation Mode Hybrid Data Rate 10 3125 Gbps Simulation Length 655360 bits Test Pattern PRBS 23 BER Target 1e 012 Transmitter Reference Clock Frequency 644 53 MHz Configuration Method Option 2 Phase Noise Profile Freq Hz Amplitude dBcoc ipo 52 L0 62 LOU 72 LIO0O0D 52 10000 110 Phase Noise Fmin 100000 Hz Phase Noise Fmax 6 4453e 008 Hz Spur Profile F
204. wing options are provided Figure 2 39 JNEye Receiver Options Equalization Configuration FFE DFE Setting Algorithm 0 0078125 DFE Tap Length i Summation Node Model 348 Bandwidth RC Fiter RIZ Fiber Bandwidkh 0 frye Kecemrver Configuration e Algorithm The DFE is adapted using the LMS algorithm and its variations e Step Size Step size of the LMS algorithm This parameter controls the speed of the LMS adaptation The default value is 0 01 e DFE Tap Length Number of DFE taps This option is only available for Custom and PCI Express 8GT receivers e Summation Node Model JNEye supports two generic custom summation node modeling methods e 3dB Bandwidth RC filter Use a first order RC filter to perform low pass filtering of the DFE adjustment e S parameter Use your S parameter file to specify a pulse shaping filter Only the differential insertion loss Sag is applied in the pulse shaping e Misc tab Reserved This tab is blank IBIS AMI Receiver JNEye supports IBIS AMI receiver modeling When you select the IBIS AMI receiver the IBIS AMI Receiver page appears The IBIS AMI page includes three tabs for additional settings of the IBIS AMI model Functional Description Altera Corporation GJ Send Feedback UG 1146 2 58 Receiver Options 2015 05 04 Figure 2 40 Receiver IBIS AMI Model IBIS Configuration Page Link and Simulation Setting Transmitter Recerver we
205. ye Amplitude dB Altera Corporation XII gt ozm JNEye Via Designer 5 01 10 01 15 01 20 01 25 01 30 01 Frequency GHz Data Cursor ie e e eo Functional Description C Send Feedback UG 1146 2015 05 04 JNEye Channel Designer 2 145 Figure 2 119 PCB Via Analytical Model Structure mc Altera JNEye Via Designer le lel x JNEye Via Designer Amplitude dB 5 01 10 01 15 01 20 01 25 01 30 01 Frequency GHz lest J Zoom On jm NNNM NNNM NN NT The channel component designer GUI can perform parameter unit conversion interactively For example you can change the length unit from mil to mm and the GUI will automatically compute the length value with the new unit After entering the model parameters click Analyze and Channel Designer will compute the frequency response of the current design The integrated plotting engine can display the insertion loss or return loss characteristics When you alter the model parameters the GUI displays a message that indicates the channel characteristics may have changed Click Analyze to redraw the channel characteristics You can also load or save the component design for reuse in the future If you are satisfied with your design click OK to save and close the component design GUI If you click Exit or the X button of the window the design will be discarde
206. zard Channel Demo s12p Channel Type FEXT DNE E m i Input Input Input Output Output Output a ha e E e Aggressor frequency offset is negative only Maximum aggressor frequency offset i 950 000 bpm L Change Channel AC Coupling Capacitor 0 nF Shunt Capacitor 0 pF Series inductor P Mud Mode sa s Sander Modo nisus v ZoomOu zoom in O Dua Cuno Passivity Check No Passivity Violation Causality Check Channel is causal OK 15 01 Frequency GHz Perform the following steps to add the second crosstalk channel 1 Click Channel in the Link Designer panel and select Far end Crosstalk FEXT 2 Use the file browser to locate the channel model file Demo s12p and add it to the channel list as second FEXT 3 The JNEye Channel Wizard displays the first FEXT channel characteristic by default 4 Change the Crosstalk Aggressor Location to 2 This tells JNEye to select the second FEXT in the12 port S parameter Altera Corporation Tutorial PCI Express 8GT GJ Send Feedback UG 1146 2015 05 04 Completing the System 5 Setthe aggressor frequency offset to 300 ppm to emulate the phase shifting effect for this crosstalk noise source This setting indicates the 2nd crosstalk is not frequency synchronous to the victim channel 6 Click OK to close the Channel Wizard 7 Place the channel icon in the Link Designer Figure 3 12 Second Far end Crosstalk

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