EB81 - CSI2 to Parallel Bridge Board User's Guide
Contents
1. dO23 Se pesn eq ued uor3oung OU ALY ssog gt gt 1dSIH NO SATS s 2 Jeunjoenuey 7 AS 0 dQ0t 0 P Z L40 1 zssog 2808 Ov 8E 1951 d 159 d SAIS s IdSIH ISO d SA1S ls IdSIH N ISO N SATS IdSIH N IS N SATS 151 IdSIH 4X2 1S9 SA1S 1951 dX9 ISO dW19 SATS IdSIH NXO 1597 SATS SNOILO3NNOO NNOO WOLLOd IdSIH ISO NXT19 SATS IdSIH NOISO SOWO G31 oY Y More 2 kdl z p 15509 zonu Esa SE Ze SENId eeNid SE LENId HEE LE 62 IdSIH di ISI di SAIS IdSIH NL ISO NL SATS IdSIH NZ ISO NZ SATS 3 IdSIH dz 1S9 dz SAIS jen idSIH di S2 di SATS IdSIH ISO Nk SATS SE EZ 6lNid LE IdSIH dz 192 dz SATS 6r 1451 NZ ISD NZ SMS ZINId 2 HE idSIH d0 2 d0 SAIS LONLLLIJ HO OdSA uaavaH Aso daor v ziad er SNId LS SS V ldSIH NO ISO NO SATS MO dO3 03 IdS HDIH NWOLLOG Is lel Is Is Ul s s 102. z 3 Y s Z Ad VYLSIAONYN XW IAIN ano ano ano ano v ASL ASL 9L 9L ASL ASL anyo anyo ant anyo ant 0 090 160 650 960 850 69 180 162 AE BALA QNS SE eui esop 35 vd E als lo 291 NOLLdO Inv 43d 78 NOLLdO 1 ZBL NOlLdO L Inv43a Z0v0 OWS ans EWE 090 AWS zeer 182 ogzr no N N ozz 022 z oz vovi oz LA sere fon 91 Nd S sas SATS SATS SAT NO swis s 19 V SQAT NE SAIS sa eT NE SATS W sawrweswis SAIS 81 s 1 NZ SNIS amp T sagrWz T AW SanT NE siis 0 Nz 5 18 ooe sai 00 sev 00 anal vere isra oz zov ozi oz b dc 8 Is 1 SqAT eno SATS t W saxrawio SATS 90 SATS 19 s d SMSKSA E EATS t sas SAAT de SATs s SJ 1 sae dz sais sar az siis t sms s ozz ozz ver ozz ez Erra ow cn 0530 H38INDN Ld 030 1 3OLLLVT 39imo jnueW 3OILLV1 Jainpejnuey Or guo Qr ruaavs i94s gt SI lOld p 600 EE SO 88 THQVS 36S 11019 e 800 90 289 s iss Lod A80 9gu ke 500 X80 Sgu fel 00d 990 yeu N
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4. snob nob I 2 I S260 ASL n any edin Z T imo sao er k SdIA Sdv23a wl owl ny nr dni dni H SdCA SdVo3a ano sao vao ezo 1260 Lj T t T ASL ASL ASL ano ASL ASL ASL sn 4nro 7 dni anro ano e060 ereo 160 anov sco zero I 9060 9060 A d j d Fus ui us d Fw T T T T T ASL ASL AOL AOL anvo Ano Ao anro anro ASL AOL ASL AOL AOL VOZE AoT An 0 qu anor anor so 29 29 049 uo anoc snvo anvo Aro anor anor 1169 Zo 6060 0169 9160 5162 T T voco 060 0060 1069 2260 1160 L 1 1 4 4 L LA 2 AAA T zain E AAA T 1 1 aan zaba 2 HOLY 230a ava Sa ceu SdV E CdIA SdVO3a Ld NI ZA SdVoaa ano 9 HASWNN 1 ANOS 40969 039 H38AQN LYVd SOLLLVT seunpeynuey WAN ZH ONO Tid anzz 8 angy ano AOL 2689 a snob 2 180 9260 u 001 ZH M Z9 OOATd Ar o V 2 2 1 a T 23s 4
5. LAT TICE SEMICONDUCTOR CSI2 to Parallel Bridge Board User s Guide February 2013 Revision EB81_01 1 mm L ATTICE CSI2 to Parallel Bridge Board SEMICONDUCTOR User s Guide Introduction The CSI to Parallel Bridge Board comprises a compact low cost CSI2 Camera Serial Interface image sen Sor lens and lens housing with adjustable focus that can bolt directly onto the Lattice HDR 60 Base Board or the MachXO2 M Dual Sensor Interface Board Both the CSI2 to Parallel Bridge Board and the MachXO2 Dual Sensor Interface Board are designed to work together These boards plug into the HDR 60 Base Board to allow for a dem onstration The CSI2 to Parallel Bridge Board is designed to use the Sony IMX169 CMOS Digital Image Sensors which feature Up to 13 megapixels HD video 1080p30 mode configurable Selectable video or single frame modes MIPI CSI2 output either two or four data lanes Read more about the image sensor specifications in the Sony IMX169 data sheet Features Key features of the CSI2 to Parallel Bridge Board include Sony IMX169 CMOS Digital Image Sensor Lens F 1 59 796 distortion with minimized flare halo and ghosting Lens holder with adjustable focus e CSI2 or parallel signal connections to the MachXO2 Dual Sensor Interface Board or HDR 60 Base Board Selectable on board 27 000 MHz MEMs oscillator or HDR 60 Base Board oscillator Power status LEDs with one user
6. User s Guide CSI2 to Parallel Bridge Board fas LAT TICE SEMICONDUCTOR 12C Bypass Connection Z A34 WALSIAONYN XNI IdIN 19 10s yeast z E I Y s zat Linvaaa 104504 090 0 IIEISUI NOLLdO 1 4 Joyseti 090 0 NOLLdO 1 090 AWS 090 AWS 19 iuaavs eas lt wortog nos g norog waavs s 19 nos 199 saavs over ler X31ON 19inpejnueW Legerolys0 LYYd ano Legerolso 1 Ole sona v iss ost z ON OSIN HK 0150 os 00301 1 e LT SOWOS 0719715 23 ISON HK LT sono o 1507005700901 lv el Sid 34v QNS 55 lt lt sono 0 ISO SS ovao p e via aav 9 E S ler Na las Ig vg 13538 gt gt ava assy lt 19595 34v lec 10s Td edo3 M19 Ids Ta WHOS Td edd ze Jeinpeynuey ano Wa pid edoa Tad dO3 je 998 es MHOFOLOSXL YJANWNN 1uVd 3 vivas 221 MQrOLOSXL 11 98 IOS l el Od 34v 1 6 009 9c E 6 Loa 100 zg td 33 2 tear gt AE BALA Gz POND l el 11 sowo v Iso ss or3o
7. NOILdO 1 eeudd Soe IdSIH NZ ISO NZ SATS 1 IdSIH d ISO d SA1S2 dE 150 d SAIS Z 1 sqAT sis SaM dE SAIS L NOlLdO L1nvdaa 0 Yda 1 IdSIH NL 1S9 NI SA1S2 IdSIH dv 1S9 di SA1S2 NL ISO NL SAIS Z di 182 db SAIS NZ ISO NZ SAIS Z I saei N SASK NE SAIS T 8Z NOlLdO L Inv4aa 0 2 NOILdO L nvdaa 0 Seda ec SGAT NI SAIS SOAT dt SATS L 150 dWi0 SAIS Z 19 sawi ano ssa ano SATS T 8diA QNO NOLLdO 1 231 NOILA LNY zoro ans 200 AWS ever p 9TN 01 esop 32v 1d oz zery 310N 4 ozi TSGAT NI SATS NI SAIS T SUNT NO SAIS SGAT NO SAIS 00 ooe qd Sva Serry ozi Serry o T Sant SAT Menar SATS T SQAT 40 SATS Msn ad SNIS oz ozz leu berg BA ano di ano 0930 i38WnN uva T S 3 ILLV1 jeinpejnue g MERN E 0539 tia8WnN 1uvd x 3 ILLV1 jeinpejnuew 019 8 5 ve0da old gg or 8 0dd tOld m VL0dQ Old 5 990807019 m vol amp lod 1 9 5 15 99080 ANI ld SATS vs ld 5 Ov ar iji 013882 E SES 9 1 SqAT de SA1S ae age 19 i Sa 1 NE S 1S race 19 sqAT SMS 82
8. vi amp 9 ASL aNo ONO 024 ms m A9 3n01 anyo ETY 49d 003SZ0 917 en 90 180 L zv xe E 1 NSE090 ING aca zovou 9 A9JHn0L woz 0 ano ano wwooe i iH so oy z sora ATL 7 Linea N Fe ASL m anyo ano J8dioqaszoeor1 vn vo 8 2 ano I L L SE 0dSA ZOvOH 00 S YOOL NZL EDI ano QNO zey rdv 20 px L 9 zz 9 1S 090 IN wo ano ano czs 0 ano ano oasa osu 020 E E sory L ino 2 NI ZOvOH ASZ Ou sur Y D neo ASL WOOL ds 31100 ab szori 4 anyo ano QNO LINSZOFO 001 5 4 dadtoa3szoeo11 un 619 949 ES rv gg Na ma b ANSE090 ING aco A9 4NOL eve ano ano oog 9 ove zo LA gt AGT M N GdZA 99 Y m 9 ezon AQ ANOL anyo alt 494 0038Z0 917 sn 69 629 L ano AE ctL 98S SdZA cs VRE QNS S 8dTA S vt En L 8L 6vH 39V 110A INTIVA LNNHS Ino 389003820011 ano Em ano ano Vwooe zav 29 wh Od A 10 AS Z 40 ASL vo 001 NZ DM sur er 0 ano ano ely 8dLA VaN pz sora ano ano eeo iwszoro noor gt Ja ano ano amp N Fe ASL spf 39 rg p yag BdIA szor nro LWS 090 ING Ag9 zorod o ezo 4 9 5 ano ano AWS090 ING 9 4 L 120 ere
9. defined LED General Description The CSI2 to Parallel Bridge Board has been designed for use the MachXO2 Dual Interface Sensor Board the HDR 60 Base Board The CSI2 to Parallel Bridge Board contains the camera sensor portion while the MachXO2 Dual Sensor Interface Board performs the CSI2 to parallel conversion The HDR 60 Base Board allows the user to see an image on a HDMI monitor See RD1146 MIPI CSI2 to CMOS Parallel Sensor Bridge for more information concerning a related demo Initial Setup and Handling The following is recommended reading prior to removing the CSI2 to Parallel Bridge Board from the static shielding bag and may or may not apply to your particular use of the board CAUTION The devices on the boards can be damaged by improper handling The devices on the evaluation boards contain fairly robust ESD Electro Static Discharge protection structures within them able to withstand typical static discharges see the Human Body Model specification for an example of ESD characterization requirements Even so the devices are static sensitive to conditions that exceed their designed in protection For example higher static voltages as well as lower voltages with lower series resistance or larger capacitance than the respective ESD specifications require can potentially damage or degrade the devices on the evaluation board As such it is recommended that you wear an approved and functioning grounded wrist strap
10. with Sony IMX169 CSI2 Sensor J253 Short Pins 3 to 4 MEMS Oscillator Y2 As shown in Figure 2 J5 is set such that the IMX169 sensor will receive a clock input signal from the internal 27 000 MHz MEMS oscillator Y2 The alternate position of J5 will select the HDR 60 Base Board oscillator for the sensor clock input High Speed CSI2 Connector J8 The Sony IMX169 U12 will produce high speed CSI2 differential signals after proper configuration via SCLK and SADDR pins There is a CSI2 differential clock and up to four CSI2 differential data lanes The J8 connector can plug into the MachXO2 Dual Sensor Interface Board or into the HDR 60 Base Board The signals are identified in Table 2 Table 2 CSI2 to Parallel Bridge Board J8 User s Guide J8 Pin IMX169 I O Pin Signal Polarity Description 13 K4 CSI2 data0 P Differential CSI2 data 11 J4 CSI2 data0 N Differential CSI2 data 29 K6 CSI2 data1 P Differential CSI2 data 27 J6 CSI2 data1 N Differential CSI2 data 21 K3 512 data2 P Differential CSI2 data 19 J3 CSI2 data2 N Differential CSI2 data 26 K7 CSI2 data3 P Differential CSI2 data 24 J7 CSI2 data3 N Differential CSI2 data 18 K5 CSI2 clock P Differential CSI2 clock 16 J5 CSI2 clock N Differential CSI2 clock 12 J4 CSI2 low speed data bit 0 Single ended CSI2 data 0 N side m L ATTICE CSI2 to Parallel Bridge Board SEMICONDUCTOR User s Guide Parallel Conne
11. EAHDR60 DKN adapter 12V AC adapter power supply QuickSTART Guide Technical Support Assistance Hotline 1 800 LATTICE North America 1 503 268 8001 Outside North America e mail techsupport latticesemi com Internet www latticesemi com CSI2 to Parallel Bridge Board zs LAT TICE User s Guide SEMICONDUCTOR Revision History Date Version Change Summary December 2012 01 0 Initial release February 2013 01 1 Clarify that CSI 2 is for use with MachXO2 2013 Lattice Semiconductor Corp All Lattice trademarks registered trademarks patents and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice ZLOZ Gz 1990120 User s Guide g Z A34 VHISSAONVN XII IdIN oq 9 Joquinn jewincog eas en CSI2 to Parallel Bridge Board SdV2O3dG i3MOd NOILO3NNOO YOLVISNVUL T3A31 NOILO3NNOO YOLVINSAY DANV8S 3 OINVG OINVE 8 OINVG NOILO3NNOO SSVdAd OCI NOILO3NNOO NNOO WOLLOG INV35VIG HOOT X3GNI TFT YN O 0 0 VILSJAONVN XWI Appendix A Schematic Index LAT TICE SEMICONDUCTOR User s Guide CSI2 to Parall
12. K 144 d di SOND 0553 SS Bd d 9d XE ear aiv Be LT SOWO G Is os g 9 1 SOND 0 155 HOS 091091 00 z Pere Fak oe 106 0 zz n lel LT SOND 0 sS Is orao rz 24 e zi SOND USS S OPO 500 tz oq pd 900 OZ 20 39 lc LT sowo oso os 70301 r 4 2 tay lo e 00 SL gq 34v lec eod 1 6d 34v 899 lec oia i 2 ora adv 9 Lid 34v n SL zia aav 21 eid aav AQ sin d A L 30001 3001 anya ann 34v 929 z9 N NI oe 3wviud UHVA RYE tr 33v 1 5 eoo ACE BALA dgA bq Wx lt lt S19WWA 08dSZW LYVd IN 0739 H38ADN Lav 1 1eunjoejnuejv Jeunyoejnuey ayo S19WWA 08dSZW nba Llano SOND 0 159 OS SOWD 0 159 SS 07301 eo 9 Old Z 999 SONW 0 ISO 05 07301 Lj 5995 SOND 0 155 1S 09501 SOW 0192 1S 0V3O ZH Qa Tl 2 SONW 0 ISD SS 07301 SOWO 0 150 OS 07301 i S amp 99 Nd r aen a ano 9 EdE er ova ASL ASL anyo anyo 1260 AE 8260 NOILO3NNOO SSVdA amp JCI T z I Y 5 11 2 9z NOLLdO L nvdaa 0 vEHdG IdSIH NE ISO NE SATS 3 NE ISO NE SAIS Z SAIS 9Z NOLLdO L Invdaa 0 1 le IdSIH dO ISO 19 SAIS 8
13. O 70 90 Svid ASO 28 OXI EE S0 18H lig 990 2129 0 990 929 x Eu 00 EE 480 S K 385 EE 90 275 Ip 10S 84s zog EE 50 LH A 900 EE 990 219 e s ge Web aN TVA EE 4S0 12H ANOS 70019 ONIgO 9 1 235 0v35 N AE BALA T I z D I s Regulator Connections T 5 02 2102792 1990120 EI ano z eod A9 Jequmwjueumoog ez ano 2 VHISSAONVN XNI IdIN L TE en 001 ano QNO zzu im a zi n s V 39 INS 090 ING A 9 o A9 an0 0 ano ano se ecu E p aNo gt 7110 2 9 ASL ano l m 4 anro 389003920017 en uo 780 L 5 5 ZOvOM auo QNO m puis No 5 20 Ab ze ee Mig d A QNS veu LWSE090 ING Ag9 zovoM 08 a A9 3n0L oz 0 ano ano L n 19 gt 1010 ZOvOM gt
14. Parallel Bridge Board power is supplied by the 5V DC power applied at connectors J7 and J8 pins 1 2 39 and 40 The on board linear voltage regulators then provide the necessary supply voltages to power the sen sor 2 7V VDDIO 1 2V 1 8V 2 5V and 3 3V The regulator in location U10 can be configured as shown in Table 1 Table 1 CSI2 to Parallel Bridge Board Regulator Voltages Supply Voltage Regulator Resistor Ratio Comment R45 R50 1 8V V1P8_V3P3 On HDR 60 Base Board R58 R50 2 5V 2 5V 3 and 4 default configuration R59 R50 3 3V 3 3V 5 and 6 Each of the LT3025 regulators are the linear low dropout voltage type that incorporate an external resistor divider voltage feedback to divide down the regulator output voltage and compare it against an internal reference voltage The regulator then adjusts the output voltage higher or lower such that the resistor divided voltage matches the internal reference By doing this each regulator output voltage remains at a constant voltage value independent of the load it drives Each regulator output voltage follows this equation Vout 1 resistor ratio x regulator internal reference voltage See the LT3025 device data sheet for additional details about this device The default configuration for J253 is for 2 5V via shorting pins 3 and 4 as shown in Figure 2 LAT TICE SEMICONDUCTOR CSI2 to Parallel Bridge Board Figure 2 CSI2 to Parallel Bridge Board
15. at all times while han dling the evaluation boards when they are removed from the static shielding bag If you will not be using the boards for a while it is best to put them back in the static shielding bag Please save the static shielding bag and packing box for future storage of the boards when they are not in use m L ATTICE CSI2 to Parallel Bridge Board SEMICONDUCTOR User s Guide When reaching for the boards it is recommended that you first touch the outside shield portion of the J11 BNC connector on the HDR 60 Base Board If the CSI2 to Parallel Bridge Board is not installed on the HDR 60 Base Board then when reaching for the CSI2 to Parallel Bridge Board it is recommended that you first touch the outside edge of the mounting holes on the CSI2 to Parallel Bridge Board This will neutralize any static voltage difference between your body and the board prior to any contact with signal I O CAUTION To minimize the possibility of ESD damage the first and last electrical connection to the board should be from test equipment chassis ground to the J11 BNC shield GND on the HDR 60 Base Board Before connecting signals or power to the board attach a cable from chassis ground on grounded test equipment to the J11 BNC shield GND on the HDR 60 Base Board Connecting the board ground to test equipment chassis ground will decrease the risk of ESD damage to the I O on the board as the initial connections to the board are made Likewise when u
16. ctor J7 Connector J7 is primarily reserved for future use When used with the MachXO2 Dual Sensor Interface Board only a few pins are used as shown in Table 3 Table 3 CSI2 to Parallel Bridge Board J7 J7 Pins IMX169 I O Pin Signal Polarity Description 30 K4 CSI2 low speed data bit 0 Single ended CSI2 data 0 P side 28 C5 SCLK Serial clock to program IMX169 26 B5 SADDR Serial address to program IMX169 9 25 27 29 31 Reserved for future use via iCE40 References RD1146 MIPI CSI2 to CMOS Parallel Sensor Bridge HDR 60 Video Camera Development Kit web page DS1021 LatticeECP3 Family Data Sheet HB1009 LatticeECP3 Family Handbook EB59 HDR 60 Base Board User s Guide EB69 MachXO2 Dual Sensor Interface Board Users Guide QS010 LatticeECP3 Video Camera Development Kit QuickSTART Guide Ordering Information The CSI2 to Parallel Bridge Board is designed solely for use with the MachXO2 Dual Sensor Interface Board and or the HDR 60 Video Camera Development Kit Description Ordering Part Number China RoHS Environment Friendly CSI to Parallel Bridge Board LF C2P EVN MachXO2 Dual Sensor Interface Board LCMXO2 4000HE DSIB EVN HDR 60 Video Camera Development Kit Contains HDR 60 Base Board with LatticeECP3 e FPGA pre loaded with Image Signal Processing ISP f A Demo two USB cables HDMI cable with HDMI to DVI F FS 7 O
17. eAg ANOL T 2 zvy zo pz Y gt Aga AL S anyo EN 49d 003SZ0 917 089 cM zou Laden L AE BALA 5 oas ooe Rm SNOILIO3NNOO IO V 115338 Level Translator Connections 8 p 8 w 2102792 191002019 EE z lt 00 gt 8 A Jequiny weuncog VHISSAONVN XAT IdIN v a bl jeimpejnuew ano YNDAZOLOSXL YAGWAN LYVd 0105 1 irc 10S md Eda X I gt gt Wollog o mid edoa 3 Wo1Lo8 uaavs 3 t S YIDA erna 2GZ010SXi ano ano AE BALA ASL ASL 21001 21001 920 20 AE BALA A rinvaaq 090 as lt onona el ano ano ano Jenenuey 0000 2 Z3VL0010SQ Jequiny Hed 1 ZHN JZ neo w LT an anyo DSO JOXI pa Ne 00 szo v L SL ZA 1e8u BZY BOR ZA GINSLogoyiZzWia VANS 183 Sensor Power and Decaps T 6 Jo 6 19949 2102 SZ 189090 Eg oog y equiny eag Z VHLSSAONVN XWI IdIN ano i angy M ASL rae Fu m An
18. el Bridge Board fas LAT TICE SEMICONDUCTOR Block Diagram ood jueuinooq Z AAY VHISSAONVN IdIN o 8 19945 ana J 9 _ lt 1 lt K e 4 an Orb e z r o sam 28174 Es e rm M O 0 ZN s 3 us ZANY ae 9 3 us sw s 3 us 3204S gt z INV CET INVA 30123NNOO 145 H9IH WOLLO SEK 2 AO m a t 3 us 9 3 us IdS Z 18945 suolvinoau 3 us YOLIINNOD WOLLOS i p 19915 O8dSZW HSV14 WVYSOVId 2018 E User s Guide CSI2 to Parallel Bridge Board fas LAT TICE SEMICONDUCTOR Bottom Conn Connections T 6 Jo 19945 102192 1940100 Kepung lt 000 gt Jequiny jueumnoog 2 VHISSAONVN XNI IdIN 231 NOlLdO L Inv43d 2000 QNS ITSOWD 0 150 SS 09301 1951 90 159 90 SAS ser NOlLdO LINY OLZL GWS IL 0dSA
19. g SGAT SATS ld 8L Old 800dd Old VOOdQ Old 0I99 9 v 23s 25 SdLA 981MWZLS7IWS H38WAN Led wan ez g IdsiH ISO dz SAIS 42 150 4 SAIS Z ld 92 SMSK Sana SNS T 81 ldSIH NO SAT NOlLdO 17nv43a NOlLdO L1nv4aad 0 0 c IdSIH ND 150 N19 SATIS ISD SAIS Z l SATNI SANSK SIAT N SAIS T e IdSIH d0 SATS SCAT NO SAIS v NOlLdO L Inv43a 0 ae 9zuda 191 AHdd NO SAIS uaa NO SA TS Ago Jnzzo 8689 NJO 189 SATS ISO SAIS NE 150 SATS dE 159 d SAIS NZ 159 NZ SAIS 150 de SAIS NI ISO NP SATS db 182 db SATS NO 189 NO SATS 90 159 d0 SATS SGAT d0 SAIS v Z NO ISD NO SATS NOLLdO 1 0 n lo AMdd SAIS ig 30 SiS L 291 NOlLdO nva 20 0 AWS lg g WOLLOS SNId YOSNAS ANOS 3HL OL 35012 OTTA STTY PTT EOTY 510151591 SONY SENSOR ANOS 19X dl Gbuaavs o r QO xos lev lt lt MONI ANOS Sb AL Z 40 60 d0 SAIS e s Banko and Bank1
20. nplugging cables from the evaluation board the last connection unplugged should be the chassis GND connection to the evaluation board GND If you have a signal source that is floating with respect to chassis GND attempt to neutralize any static charge on that signal source prior to attaching it to the evaluation board If you are holding or carrying the board while it is not in a static shielding bag please keep one finger on the J11 BNC shield GND on the HDR 60 Base Board If carrying the CSI2 to Parallel Bridge Board alone keep one finger one of the mounting holes This will keep the board at the same voltage potential as your body until you can pick up the static shielding bag and put the board back in it Electrical Mechanical and Environmental Specifications The nominal board dimensions are 42mm x 42mm 1 654 x 1 654 Additional mechanical board dimension infor mation is included on the mechanical drawing shown in Appendix A Figure On the physical board itself connec tors include pin 1 indictors as either an arrow or triangle point near pin 1 on the outer layer silk screen The environmental specifications are as follows e Operating temperature 0 C to 55 C Storage temperature 40 C to 75 C e Humidity 9596 without condensation m L ATTICE CSI2 to Parallel Bridge Board SEMICONDUCTOR User s Guide Functional Description Figure 1 CSI2 to Parallel Bridge Board Revision B Voltage Regulators The CSI2 to
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