ModelSim-Altera Software Simulation User Guide
Contents
1. vlib rtl wor vmap work rt Delete Copying F a Copy 32a Modifying moc Warning New b sin Upd Properties vlog vlog lcompat work work incdir F b ted With Quartus II Simulation counter count Model Technology ModelSim ALTERA vlog 6 6c Coamniline maile oconmnter 3 Right click the count signal in the Wave window and then click Delete January 2013 Altera Corporation ModelSim Altera Software Simulation User Guide 1 4 Simulating with the ModelSim Altera Software Creating Stimulus Waveforms Creating the Clock Waveform 1 Right click the clk signal in the waveform point to Edit and then click create modify The Create Pattern Wizard appears Figure 1 3 Figure 1 3 Create Pattern Wizard V Create Pattern Wizard Generate a waveform for Select Pattem any signal for the chosen Patterns Signal Name pattern Clock NewSig counter clk The allowed patterns are T CCnaetant cert Time End Time Time Unit Constant C Random 0 sood Ins Clock Repeater Random Repeater Counter C Counter Cancel Under Patterns select Clock For Start Time enter 0 for End Time enter 5000 and for Time Unit enter ns Click Next For Clock Period enter 100 for Time Unit enter ns and for Duty Cycle enter 50 Click Finish 9v qe Wm ee dS Creating the Reset Waveform 1 Right click the reset signal in the waveform point2. folder gt simulation modelsim folder You can use the testbench file for the simulation of your Quartus II design January 2013 Altera Corporation ModelSim Altera Software Simulation User Guide 1 8 Simulating with the ModelSim Altera Software Exporting Created Stimulus Waveforms as an HDL Testbench ModelSim Altera Software Simulation User Guide January 2013 Altera Corporation N DTE BAAN Additional Information This section provides additional information about the document and Altera Document Revision History The following table shows the revision history for this document Date Version Changes January 2013 2 0 Updated Linux and GUI information June 2011 1 0 Initial release How to Contact Altera To locate the most up to date information about Altera products refer to the following table Contact 7 Contact Method Address Technical support Website www altera com support Website www altera com training Technical training Email custrain altera com Product literature Website www altera com literature Non technical support General Email nacomp altera com Software Licensing Email authorization altera com Note to Table 1 You can also contact your local Altera sales office or sales representative Typographic Conventions The following table shows the typographic conventions this document uses Visual Cue Meaning Indicate command names dialog box
3. titles dialog box options and other GUI Bold Type with Inita Capital labels For example Save As dialog box For GUI elements capitalization matches Letters the GUI Indicates directory names project names disk drive names file names file name bold type extensions software utility names and GUI labels For example qdesigns directory D drive and chiptrip gdf file Italic Type with Initial Capital Letters Indicate document titles For example Stratix IV Design Guidelines Indicates variables For example n 1 italic type Variable names are enclosed in angle brackets For example file name and lt project name pof file January 2013 Altera Corporation ModelSim Altera Software Simulation User Guide Info 2 Additional InformationAdditional Information Typographic Conventions Visual Cue Initial Capital Letters Indicate keyboard keys and menu names For example the Delete key and the Options menu Subheading Title Quotation marks indicate references to sections within a document and titles of Quartus Help topics For example Typographic Conventions Courier type Indicates signal port register bit block and primitive names For example data1 tdi and input The suffix n denotes an active low signal For example resetn Indicates command line commands and anything that must be typed exactly as it appears For example c qdesigns tutorial chiptri
4. Altera Starter Edition or ModelSim Altera Edition software The Quartus II software supports HDL design simulation at register transfer RTL and gate levels in various industry standard simulators You can use the Quartus II NativeLink feature to integrate your EDA simulator within the Quartus II design flow and streamline simulation processing steps For more tool specific guidelines refer to Aldec Active HDL and Riviera PRO Support Synopsys VCS and VCS MX Support Cadence Incisive Enterprise Simulator Support or Mentor Graphics ModelSim and QuestaSim Support in the Quartus II Handbook Prerequisites This user guide assumes you have a working knowledge of the following subjects m Verilog HDL SystemVerilog or VHDL hardware description languages m Subjects covered in the Quartus II software Getting Started Tutorial Starting the ModelSim Altera Software with the Quartus Il Software To start the ModelSim Altera software follow these steps 1 Unzip the provided Quartus II design example project counter zip 2 Start the Quartus II software and open the design example Quartus II project file counter qpf Setting Up EDA Tool Options You can specify where your third party EDA simulators are installed with the EDA tool options settings in the Quartus II software These settings enable you to start third party EDA simulators from the Quartus II software The ModelSim Altera tool path is automatically added during Quartus II installati
5. ModelSim Altera Software Simulation ANU S RYAN 101 Innovation Drive San Jose CA 95134 www altera com UG 01102 2 0 User Guide Document last updated for Altera Complete Design Suite version Document publication date 12 1 January 2013 2013 Altera Corporation All rights reserved ALTERA ARRIA CYCLONE HARDCOPY MAX MEGACORE NIOS QUARTUS and STRATIX are Reg U S Pat amp Tm Off and or trademarks of Altera Corporation in the U S and other countries All other trademarks and service marks are the property of their respective holders as described at www altera com common legal html Altera warrants performance of its semiconductor products to current specifications in accordance with Altera s standard Warranty but reserves the right to make changes to any products and services at any time without notice Altera assumes no responsibility or liability arising out of the application or use of any information qproduet or service described herein except as expressly agreed to in writing by Altera Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services QUALITY 150 9001 2008 NSAI Certified ModelSim Altera Software Simulation User Guide January 2013 Altera Corporation Simulating with the ModelSim Altera JN DTE RAN 5 Software This user guide describes simulation using the ModelSim
6. bench file is conceptually similar to a waveform like the one created in Creating Stimulus Waveforms on page 1 3 but because it is written in HDL it is able to accommodate more complexity and flexibility than a graphical waveform ModelSim Altera Software Simulation User Guide January 2013 Altera Corporation Simulating with the ModelSim Altera Software 1 7 Exporting Created Stimulus Waveforms as an HDL Testbench The stimulus waveforms you created for the simulation can be exported as a HDL testbench file You can then use the HDL testbench file to simulate your design again without manually recreating the stimulus waveforms To export the stimulus waveform as an HDL testbench perform the following steps 1 Click in the Wave window to ensure it is active 2 On the File menu point to Export and then click Waveform The Export Waveform dialog box appears Figure 1 7 Figure 1 7 Export Waveform Dialog Box Ml Export Waveform Save As Force File EVCDFile C VHDL Testbench Verilog Testbench Start Time End Time Time Unit o S000 ns 4 Design Unit Name counter File Name cesq Browse In the Export Waveform dialog box under Save As select Verilog Testbench 3 4 For Start Time enter 0 for End Time enter 5000 and for Time Unit enter ns 5 In the File Name box type the name of your testbench or click the Browse button 6 Click OK The testbench appears in the Quartus II project
7. eating Stimulus Waveforms 2 On the Tools menu point to Run Simulation Tool and then click RTL Simulation The Quartus II software starts the ModelSim Altera simulator You can ignore error or warning messages about the tcounter v file In the next section you create stimulus waveforms and export the waveforms into tcounter v testbench file Creating Stimulus Waveforms This section guides you in adding signals to the Wave window creating the clock waveform and creating the reset waveform Adding Signals to the Wave Window To add signals to the Wave window follow these steps 1 In the ModelSim Altera GUI expand Work in the Library window and then right click counter 2 Click Create Wave Figure 1 2 Three signals clk reset and count from the counter design example are added in the Wave window where you can create stimulus waveforms for each signal to simulate the design In this example you will create stimulus waveforms for the clk and reset signals The count signal is not needed and can be deleted Figure 1 2 Create Wave on the Shortcut Menu tik vuernau H vitalzoo0 ii rtl work work z Simulate Jl wt unavalal Mast sd Simulate without Optimization Li ar Simulate with Full Optimization Mi Library FA Transcript Simulate with Coverage Edit Refresh Recompile Reading F a do counter n if file ex vdel NS Optimize Update
8. ime Unit 5 For Start Time enter 0 for End Time enter 120 and for Time Unit enter ns January 2013 Altera Corporation ModelSim Altera Software Simulation User Guide Simulating with the ModelSim Altera Software Exporting Created Stimulus Waveforms as an HDL Testbench 6 Click OK to invert the waveform Figure 1 6 shows the inverted waveform Figure 1 6 Inverted Waveform for reset Signal 0 120 ns Msgs jcounterjclk zl fcounter reset v me Now 7 Ja 3E RIS Starting Simulation To start the simulation follow these steps 1 Expand the Work library right click counter and click Simulate 2 Drag the count signal from the Objects window to the Wave window 3 In the Transcript window type the command run all After you type the run a11 command the example counter design is simulated with the created stimulus waveforms for the clk and reset signals The clk signal is a continuous clock waveform The reset signal is asserted for the first 120 ns When the reset signal is deasserted after 120 ns the counter begins to increment once on each rising edge of clk The output signal count produces the simulated waveform in the Wave window adjacent to the stimulus waveforms Exporting Created Stimulus Waveforms as an HDL Testbench An HDL testbench file is typically written in the same hardware description language as your design and interacts with your design as an instantiated module An HDL test
9. on Setting Up the Simulation To set up the Model Sim Altera simulation environment follow these steps 1 Onthe Tools menu click Options and specify the location of your simulator executable file on the EDA Tool Options page 2 On the Assignments menu click Settings 3 In the Settings dialog box under EDA Tool Settings select Simulation The Simulation page appears Figure 1 1 January 2013 Altera Corporation ModelSim Altera Software Simulation User Guide 1 2 Simulating with the ModelSim Altera Software Running ModelSim Altera from the Quartus II Software Figure 1 1 Simulation Page Settings Dialog Box Settings counter DER Category aed Files Libraries Specify options for generating output files for use with other EDA tools E Operating Settings and Conditions Voltage Temperature Compilation Process Settings Early Timing Estimate Incremental Compilation Physical Synthesis Optimizations EDA Netlist Writer settings EDA Tool Settings 2 i Design Entry Synthesis Format for output netlist Verilog HDL Time scale 1ps Tool name ModelSim Altera Run gate evel simulation automatically after compilation Timing Analysis Output directory simulation modelsim o_ Map illegal HDL characters Enable glitch filtering Analysis amp Synthesis Settings Options for Power Estimation VHDL Input NAE C Generate Value Change Dump VCD file script Fitter Settings TimeQues
10. p gdf Also indicates sections of an actual file such as a Report File references to parts of files for example the AHDL keyword SUBDESIGN and logic function names for example TRI An angled arrow instructs you to press the Enter key CO n o co 2 e and so on ES Numbered steps indicate a list of items when the sequence of the items is important such as the steps listed in a procedure g t Bullets indicate a list of items when the sequence of the items is not important j The hand points to information that requires special attention A question mark directs you to a software help system with related information The feet direct you to another document or website with related information gt ION P E 2 2 a A caution calls attention to a condition or possible situation that can damage or destroy the product or your work A warning calls attention to a condition or possible situation that can cause you injury ModelSim Altera Software Simulation User Guide The envelope links to the Email Subscription Management Center page of the Altera website where you can sign up to receive update notifications for Altera documents January 2013 Altera Corporation
11. t Timing Analyzer Assembler Design Assistant SignalTap II Logic Analyzer More EDA Netlist Writer Settings Logic Analyzer Interface PowerPlay Power Analyzer Settings NativeLink settings SSN Analyzer O None Compile test bench test counter Test Benches Use script to set up simulation Design instance name O Script to compile test bench More NativeLink Settings m um m m 1 In the Tool name list select ModelSim Altera Ensure that Run gate level simulation automatically after compilation box is turned off 2 Under EDA Netlist Writer settings in the Format for output netlist list select Verilog HDL Ensure that the Map illegal HDL characters Enable glitch filtering and Generate Value Change Dump VCD file script boxes are turned off 3 Under NativeLink settings select None T For more information about the Quartus II NativeLink feature refer to the Simulating Altera Designs chapter in volume 3 of the Quartus II Handbook Running ModelSim Altera from the Quartus Il Software To generate the ModelSim Altera automation script do file start the ModelSim Altera software and then compile the design files follow these steps 1 Onthe Processing menu point to Start and then click Start Analysis amp Elaboration ModelSim Altera Software Simulation User Guide January 2013 Altera Corporation Simulating with the ModelSim Altera Software 1 3 Cr
12. to Edit and then click create modify 2 In the Create Pattern Wizard under Patterns select Constant 3 For Start Time enter 0 for End Time enter 5000 and for Time Unit enter ns 4 Click Next 5 Enter St0 Strong 0 for Value 6 Click Finish St For more information refer to Chapter 13 Generating Stimulus with Waveform Editor in the ModelSim User s Manual In the ModelSim Altera software on the Help menu point to PDF Documentation and then click User s Manual Modifying Stimulus Waveforms To modify stimulus waveforms follow these steps 1 Click in the waveform window to enable the Wave menu 2 On the Wave menu point to Mouse Mode and then click Edit Mode Make sure the Wave window is activated To activate it click in the Wave window ModelSim Altera Software Simulation User Guide January 2013 Altera Corporation Simulating with the ModelSim Altera Software 1 5 Creating Stimulus Waveforms 3 Select the reset signal from 0 ns to approximately 120 ns The selection does not need to be exact Figure 1 4 Figure 1 4 Inverted Waveform for reset Signal jcounter clk fcounter reset Now 5000 ns Cursor 1 ve Edit Cursor 4 On the Wave menu point to Wave Editor and then click Invert The Edit Invert dialog box appears Figure 1 5 Figure 1 5 Edit Invert Dialog Box IA Edit Invert Signal Name NewSig counter reset Start Time End Time o 120 s v OK Cancel T
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