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nRF51822_422_DK User Guide.fm

1. Page 19 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 1 4 nRFgo nRF5 1422 DK module extension Connectors P1 and P2 on the nRF51422 DK module connect to the Motherboard VCC VCC nRF VIG VTG VCC VCC_nRF VIG VTG GND GND GND GND P0 00 P0 01 P0 24 P0 25 P0 02 P0 03 P0 26 P0 27 P0 04 P0 05 P0 28 P0 29 P0 06 P0 07 P0 30 Not in use GND GND GND GND Not in use Not in use Not in use Not in use Not in use Not in use Not in use Not in use GND GND GND GND Not in use Not in use BoardID GND Not in use RESET GND GND Not in use Not in use Not in use BoardID_EE P0 08 P0 09 P0 16 P0 17 P0 10 P0 11 P0 18 P0 19 P0 12 P0 13 P0 20 P0 21 P0 14 P0 15 P0 22 P0 23 GND GND GND GND GND GND GND GND Figure 12 nRF51422 DK module connectors P1 and P2 Page 20 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 1 5 Analog inputs Direct access to the nRF51422 analog input is available on connector P5 on the nRF51422 DK module Note P5 is not mounted on the board The analog inputs are routed through the extension connectors to the Motherboard To avoid noise from the Motherboard the O 2 resistors must be removed AINO 1 2 AIN1 AIN2 3 4 AIN3 AIN4 5 6 AIN5 AIN6 T 8 AIN7 AREFO 9 10 GND Figure 13 Analog inputs connector P5 on the nRF51422 DK board 5 1 6 SWD interface The programming and debugging interface is accessed throug
2. e Commands are written in Lucida Console e Pin names are written in Consolas File names and user interface components are written in bold e Internal cross references are italicized and written in semi bold 1 4 Development Kit release notes February 2013 2 0 Fixed known issue in kit v1 0 November 2012 1 0 Known issues PCA10003 v1 0 The antenna matching network and layout on these boards is suitable for applications using TX output power 0 dBm or less These boards are not suitable for applications using 4 dBm TX output power Page 3 of 52 NORDIC SEMICONDUCTOR nRF5 1422 Development Kit User Guide v1 1 2 Kit content The nRF51422 DK consists of hardware and access to software components documentation and design files from www nordicsemi com The 5210 nRF51422 SoftDevice is pre programmed on the nRF51422 and cannot be deleted or modified 2 1 NRF51422 Development Kit hardware content 1 x Helical monopole SMA antenna nRF NA NORDIC SEMICONDUCTOR Thank you for purchasing a Nordic Semiconductor product SERIES Please download ang d the User Guide re you begin The instructions an the back of this can anj 1 x nRFready ANT USB dongle nRF2779 1 x J Link Lite CortexM 9 JTAG SWD Emulator a OOO z gt 1 x nRF51422 DK PCB antenna module PCA10006 e t x T mod i OS E EA i Pe 2 A q m Me e INIH tr 5 Add 1 x nRF51422 DK SMA connector module PCA10007
3. 1 If you have Keil MDK ARM Lite already installed go to step 2 Otherwise download and install Keil MDK ARM Lite from https www keil com demo eval arm htm to your hard drive Keil downloads to c Keil unless you change the location when installing 2 Download and run the J Link Software and documentation pack for Windows from http www segger com jlink software html The serial number from your SEGGER J Link hardware is needed to identify your device and can be found printed on the chip on the J Link Lite emulator board 3 During installation you will be prompted to select the IDE that should be updated with the latest SEGGER DLLs Check the box for Keil MDK and any other IDEs you want to use with SEGGER JE SEGGER J Link DLL Updater V4 52c The following 3rd party applications using Link RM dll have been found keil MOK 4 54 DLL 44 53b in CAR eMARM MS egger Select All Select None Select the ones you would like to replace by this version The previous version will be renamed and kept in the same folder allowing manual undo ln case of doubt do not replace existing OLL 3 ou can always perform this operation at a later time via start menu Cars Go to www nordicsemi com and log in to your Nordic My Page account Select My Products from the left menu This takes you to the My Products page Enter the product key included with this kit into the Product Key field and click Add From the Add product box
4. Select C C Select Optimization level 0 from the scroll down list Uncheck Optimize for time A Page 43 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 The debugger is not able to detect my nRF51 device after have downloaded my firmware If the nRF51 device goes to SystemO ff too soon after reset it will have a problem communicating with the J Link debugger You can recover using the Recover button in nRFgo Studio 1 Cycle the power to the nRF51 chip before you start the Recover application Note The Recover function will erase all application firmware apart from the one that comes pre programmed on the chip Page 44 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Appendix A Installing drivers and configuring KEIL projects for the SEGGER debugger This appendix describes the steps for installing the software and using the SEGGER J Link Lite debugger with Keil uVision for nRF51 series devices based on J Link software version 4 52b or later Prerequisite You need Keil uVision with ARM MDK that you have tested to be working with MDK version 4 54 Note All projects in the nRF514 SDK are preset to work with the SEGGER debugger Only the following step Download and install SEGGER drivers is needed Download and install SEGGER drivers 1 Download the latest SEGGER J Link software and documentation pack from http www segger com jlink software html 2
5. select the product name and click Add Click the Downloads link in the Overview My Products table Download and run the nRF514 SDK installer Make sure to choose the Keil MDK ARM installer option ES Page 6 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 3 1 Install the nRF51422 connector module Connect the hardware 1 Screw the antenna into the SMA connector on the nRF51422 DK SMA PCA10007 connector module 2 Ensure that header K1 has a jumper connecting pin 2 and 3 The two upper rows of P4 should have two jumpers placed vertically matching the 32 kHz marking nRFgo NORDIC SEMICONDUCTOR chp E DRI2 fo Di D O pina EDRI SMA boo iE om EBA connector P4 i K1 header aA St 400006 OOSSRSK R40 Y E DRS 3 Plug the nRF51422 DK SMA connector module into the nRFgo Starter Kit Motherboard nRF6310 Connect a USB cable from the Motherboard to your computer 5 Using two 10 pin flat cables 2 54 mm included in the nRFgo Starter Kit connect one cable between P8 PORTO and P1 BUTTONS and one between P10 PORT1 and P2 LEDS on the nRFGo Motherboard Make sure the red marking on the cable is always connected to pin 1 as shown in the figure below 6 Connect the SEGGER J Link board to the nRF51422 module with the 10 pin flat cable 1 27 mm provided in the Development Kit 7 Connect a USB cable from the J Link board to your computer gt 4 TG KA
6. 1 x USB cable 1x 10 pin connector Figure 1 nRF51422 DK hardware content Page 4 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 2 2 Downloadable content The nRF51422 Development Kit includes firmware source code documentation hardware schematics and layout files To access these files log in to your My Page account enter your product key and download the files Instructions can be found in chapter 3 on page 6 2 2 1 nRF51422 DK software content e NRFgo Studio e NRF51 Software Development Kit SDK e Precompiled HEX files e Source code e Keil ARM project files e ANTware ll 2 2 2 nRF51422 DK documentation nRF5 1422 Development Kit User Guide nRF31 Series Reference Manual nRF5 1422 PS 210 NRF51422 SoftDevice Specification nRF51 SDK ANT API documentation nRF51422 PAN 2 2 3 Schematics Bill of Materials PCB layout files and production files The ZIP file and its subdirectories contain the hardware design files for the nRF51422 DK e Altium Designer files e Schematics e PCB layout files e Production files Assembly drawings e Drill files e Gerber files e Pick and Place files e Bill of Materials Page 5 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 3 Quick start This section shows you how to set up the nRF51422 Development Kit and provides example applications to help you start programming your device Register download and install
7. Download and run the J Link Software and documentation pack for Windows from http www segger com jlink software html The serial number from your SEGGER J Link hardware is needed see Figure 34 on page 46 3 During installation you will be prompted to select the IDE that you want updated with the latest SEGGER DLLs Check the box for Keil MDK and any other IDEs you want to use with SEGGER Rell MOK 4 54 DLL 4 53b in CO AReIWAM SS egger Select All Select None Select the ones you would like to replace by this version The previous version will be renamed and kept in the same folder allowing manual undo In case of doubt do not replace existing ULL 3 You can always perform this operation at a later time via start menu cane Figure 33 IDEs selected for updating to the latest SEGGER DLLs Page 45 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 4 Goto http www segger com IDE Integration Keil htiml knownproblems for MDK v4 54 Download JL2CM3 and copy it to lt keil gt ARM Segger This patch is necessary for the SEGGER debugger to work 5 Plug in the J Link Lite CortexM 9 module with USB cable The LED will blink while the driver installation occurs Wait until the LED is continuously lit Serial Number LED Figure 34 J Link Lite CortexM 9 serial number location Page 46 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Configuring KEIL proje
8. The Options for Target dialog box appears Select the Debug tab Apply the Use option and select the J Link J Trace debugger from the list Set Driver DLL to SARMCM3 DLL Set Dialog DLL to TARMCM1 DLL Cl gir IS Other options can be selected as needed To take full advantage of the debugger and its features the following are advised e Breakpoints Load Application at Startup e Memory Display Toolbox e Watch Windows Options for Target nrf51422 Device Target Output Listing User C C Asm Linker Debug Utities Use Simulator Settings Use Mn Limit Speed to Real Time 7 Load Application at Startup M Run to main V Load Application at Startup ft Run to main Initialization File Initialization File kk TJ B Edit E Edit Restore Debug Session Settings Restore Debug Session Settings 4 Breakpoints 4 Toolbox ff Breakpaints Mia 7 Watch Windows 4 Performance Analyzer 7 Watch Windows W Memory Display W Memory Display CPU DLL Parameter SARMCM3 DLL Dialog DLL Parameter DARMCMT DLL fanaF5 Figure 23 Debugger options 6 Click Settings next to the Use field in the top right of the window Page 33 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 7 In the Target driver setup provide information about debugging protocol and maximum speed Select SW in the Port drop down 8 In Max Clock the maximum speed for the debugging port cann
9. a part of the DK downloadable content available from your My Page account see section 2 2 on page 5 The SDK is downloaded as a MSI file a windows installer and is installed by running the application When installing the SDK you can select Keil MDK Support Master Control Panel and or Custom install e Keil MDK support installs Keil Vision example project files the code memory programming algorithm for the J Link debugger and the Nordic nRF51 series device database file for Keil e Custom install installs a software archive to a customized location nrfjprog installs a command line programming interface to be used with SEGGER debuggers Note The Keil MDK Support option will only be available if you already have the Keil MDK toolchain installed Page 42 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 9 Troubleshooting The nRF51422 device on the PCA10006 7 does not respond when try to contact it What has happened Verify that the jumper on connector K1 on the nRF51422 module is set in the position Pin 2 and Pin 3 When I connect multiple SEGGER J Link debugger boards to my computer Vision does not recognize them correctly This is a known limitation with uVision in MDK v4 53 or earlier that is fixed in later versions Upgrade to version 4 54 or later The debugger doesn t work Please refer to section 4 2 1 on page 15 On my 32 bit Windows XP machine get an error message with
10. area must be placed after the SoftDevice data area Table 2 shows examples for setting up the start address and size depending on the code and data size used by the SoftDevice The example is based on a chip with 256 kB of code memory and 16 kB of RAM Blank chip O kB O kB 0x0 0x40000 0x20000000 0x4000 SoftDevice A 64 kB 2 kB 0x10000 0x30000 0x20000800 0x3800 SoftDevice B 128 kB 8 kB 0x20000 0x20000 0x20002000 0x2000 Table 2 SoftDevice memory layout Note See the nRF51422 Product Specification for details on the total code memory and RAM available in the device The amount of code memory and RAM used by the SoftDevice is described in the 5210 nRF51422 SoftDevice Specification There are two ways to configure the memory layout Using Keil IDE Using a Scatter file not covered in this document Note The example code given by Nordic Semiconductor configures the memory layout in the Keil IDE Scatter file loading is not available when using the evaluation version of Keil IDE Page 29 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 2 1 1 Memory layout configuration in Keil IDE To access the Keil IDE memory layout 1 Click the Project menu and select Options for Target 2 Select the Linker tab 3 Check Use memory layout from Target Dialog Options for Target nrf51422 Device Target Output Listing User C C Asm Linker Debug Utiities jv Use Memory Layout from Target Dialo
11. can be accepted by clicking OK closing both the SEGGER Control Panel and Keil target Driver Setup Page 49 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 JLinkSettings ini file While debugging with a SoftDevice change AllowSimulation 1 to AllowSimulation 0 in your default JLinkSettings ini file under your project 1 Enter the utilities settings from KEIL target options ALT F7 and click the button to select the JLinksettings ini file 2 Click Edit and change the AllowSimulation as specified above Configure Hash Menu Command Use Target Driver for Aash Programming J LINK J Trace Cortex r Settings 4 Update Target before Debugging Use Extemal Tool for Hash Programming a mAg A a Hun Independent Figure 40 Locating JLinkSettings ini Page 50 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Liability disclaimer Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to improve reliability function or design Nordic Semiconductor ASA does not assume any liability arising out of the application or use of any product or circuits described herein Life support applications Nordic Semiconductor s products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expecte
12. main c 41 main function Br APTA 42 return O int return type required by ANSI ISO standard ss keil arm aa ej ao a 44 int main void H lib 45 Ft 46 uint8 t output state 0 47 Configure LED pins as outputs nrf gpio range cfg output LED START LED STOP while true nrf gpio port write LED PORT 1 lt lt output state LED OFFSET output gate output state 1 STATE MASK nrf delay ms 100 Fu 0 Te Build Output JLink Info J Link Flash download Flash programming performed for 1 range 0 bytes JLink Error PC of target system has unexpected value after programming sector PC OxFFFFFFFE JLink Info J Link Flash download Total time needed 134552735 622s Prepare 0 118s Compare 0 009s Program 727945417 067s Verify 593392682 385s 4 Enter or leave a debug session JLink Info Found Cortex MO r0po Little endian J LINK J Trace Cortex CAP NUM SCRL OVR R Figure 29 Start debugging mode Page 38 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 7 1 nRF51422 debug features and precautions This section contains information about the System Viewer Windows and debugging an application when a readback protected SoftDevice is present 7 1 1 System Viewer windows The System Viewer enables you to select device peripherals and see their conte
13. 0 00 00 00 00 00 Set Broadcast NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 A Development kit configuration This chapter shows where to download third party content and how the development environment is set up 4 1 Development environment ARM compiler IDE not included in this kit All the source code projects and examples can be compiled and used with the Keil Microcontroller Development Kit MDK For full use of the Development Kit source code projects and to upgrade firmware download and install the free KEIL MDK ARM Lite from https www keil com demo eval arm htm J Link Lite CortexM 9 driver not included in this kit For installing drivers for the SEGGER J Link Lite CortexM 9 visit www segger com and go to the Downloads section Select the J Link Lite and download the software and documentation You must correctly install the drivers for the device to use the J Link debugger with Keil MDK See Appendix A Installing drivers and configuring KEIL projects for the SEGGER debugger on page 45 41 1 Development environment setup The nRF51422 device can be programmed from several environments This section shows the development setup using Keil MDK ARM The nRF51422 DK can be configured for end to end ANT applications or for standard ANT profile based applications depending on your development requirements For development of end to end ANT applications you need the following 2x
14. 51xxx algorithm from the list to select the programming algorithm used by Keil IDE 7 Click Download a aha SO Na ES Note The nRF51 xxx algorithm is installed automatically during the SDK installation This algorithm is a generic nRF51 series algorithm which provides download capabilities to all series devices up to 2 MB of code memory coe noc Tag 0S M Debug Trace Flash Download Download Function RAM for Algorithm Erase Full Chip V Program LOAD Erase Sectors W Verify Start 0x20000000 Size 0c0800 C Donot Erase W Reset and Run Address Range 00000000H 001FFFFFH Figure 26 Selecting J Link J Trace Cortex Page 35 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 8 In the Utilities tab select Use Target Driver for Flash Programming Choose the available debugger from the list as shown in Figure 27 CC Device Target Output Listing User C C Asm Linker Debug Utilities Configure Flash Menu Command Use Target Driver for Flash Programming ILINK Trace Cortex I Update Target before Debugging kat File E Edit Use Extemal Tool for Flash Programming Command a Aguments T Run Independent Figure 27 Debugger selection 6 2 6 Erasing the device The code memory area available for the user application can be erased by doing the following 1 In the Target options dialog select the Utilities tab 2 Click Setti
15. D START LED STOP while true nrf gpio port write LED PORT 1 xx output state LED OFFSET output state output state 1 amp STATE MASK nrf delay ms 100 m VALUE Bits 31 0 RW 0x4000D508 RNG random number q Call Stack Locals A Name Location Value Type 5 9 main 0x0000A148 int f0 Load C Keil ARM Device Nordic nrf 51422 Board nrf6310 blinky examp _ output_state lt not in scope gt auto unsigned char JLink Warning Debugger writes to flash 428 bytes address 0x0000A000 LJ Write to flash is performed Further writes to flash memory will not cause v m r ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet BreakAccess Ey Call Stack Locals Ei Memory 1 i J LINK J Trace Cortex CAP NUM SCRL O Figure 30 System Viewer window of the RNG peripheral Page 39 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 7 1 2 Debugging an application when a readback protected SoftDevice is present Debugging applications with a SoftDevice present behaves as described in http www keil com uvision debug asp except when the program counter is in Region 0 on a SoftDevice with readback protection enabled Code words from addresses in the protected area will always return zero to the debugger Any values in peripheral registers that are restricted or blocked by the SoftDevice will b
16. DUCTOR nRF51422 Development Kit User Guide v1 1 6 1 4 Programming an application This function lets you program an application onto the chip on top of the 5210 nRF51422 SoftDevice Before nRFgo Studio starts programming it verifies that the HEX file matches the actual memory configuration If it matches nRFgo Studio continues with the programming if not it stops the programming and returns an error message This programming will not set up any memory Regions NN nRFgo Studio AA Boa File View nRF8001 Setup Help Features A eT Evaluation board 4104 23 ONZ 4 Front End Tests ANT device with pre programed SoftDevice TX carrier wave output RX constant carrier LO leakage nRF51422 TX RX channel sweep QFAACA RX sensitivity Region 1 l Program SoftDevice Program Application 4 Bluetooth nRF8001 Configuration Programing of application on nRF51 device Dispatcher Trace Translator Size 216 kB File to program Direct Test Mode nRF8002 Lock entire chip from read back Addr Oxa000 Device Manager Motherboards Region 0 4 nRF51 evaluation boards Read back Protected Segger Mea Size 40 kB nRF51 Programming Bootloaders FW 5210 nRF51422 1 2 0 alpha Log c Nordic Semiconductor ASA 2008 2011 1 Follow the steps in section 6 1 1 on page 27 and then select the Program Application tab 2 Click Browse and select the HEX file to progra
17. Extended Messaging Scan Channel Support Ext Channel Assignment Proximity Search WANT ears Channel 1 Refresh Device A Channel O SlaveRx ID 2 2 1 Mandatory Channel Setup Channel ID 0 O O Device 0 Release Device Type 0 Trans Type 0 Pairing Set ID Refresh Display Close Basic Advanced Inc ExcList Device Specific Get ID Get Status Set Channel Period 8192 32768 s period or 4 Hz Set Radio Frequency 2400Mhz 66 Mbhz 2466 Mhz Page 11 of 52 Clear Channel 2 Channel3 Channel4 Channel5 Channel6 Channel 7 RECEIVED DKUADLADS UVAIA_UX4E 4e 00 00 00 00 00 00 00 00 62 Received BROADCAST DATA Ox4E 4e 00 00 00 00 00 00 00 00 63 Received BROADCAST DATA 0Ox4E 4e 00 00 00 00 00 00 00 00 64 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 65 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 66 Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 67 Received BROADCAST DATA 0Ox4E 4e 00 00 00 00 00 00 00 00 68 Received BROADCAST DATA 0Ox4E 4e 00 00 00 00 00 00 00 00 69 Received BROADCAST DATA 0Ox4E 4e 00 00 00 00 00 00 00 00 6A Received BROADCAST DATA Ox4E 4e 00 00 00 00 00 00 00 00 6B Received BROADCAST DATA Ox4E 4e 00 00 00 00 00 00 00 00 6C Received BROADCAST_DATA_0x4E 4e 00 00 00 00 00 00 00 00 6D A o Show Pop out J Scroll to New Msgs na Simulation pr Ack Burst Extended General 00 00 0
18. Motherboards from the nRFgo Starter Kit not included 2x nRF51422 modules Page 12 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 nRF51422DK Examples and Applications written for Keil nRF51 SDK Osa aija ORAR RRA OS _ ERAS Project DI while true NRF_GPIC gt 0UT 1UL lt lt Output sta output state output_state 1 5 inline_delay_ms 100 Keil uVision IDE USB Application Programming amp Erase Via J Link nRFgo Studio USB 10 pin Flat Cable o e Configure Voltage sasa oa nRF51422 e 10 0 0 0 olol olo module O e oP IAS Figure 2 nRF51422 DK configuration for end to end ANT development platforms Page 13 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 For development demonstration of standard ANT profile based applications you need the following 1x Motherboard with attached nRF51422 module e 1XNRF2779 AP2 dongle e ANTware Il PC software The relationship between the hardware and software components and the Motherboard s can be seen in Figure 2 on page 13 and Figure 3 on page 14 Note The Keil uVision IDE is not included in the kit content nRF51422DK Examples and Applications written for Keil nRF51 SDK JAG aa ANTware Control and monitor Keil Vision IDE nRF2779 AP2 D
19. NORDIC SEMICONDUCTOR nRF51422 Development Kit NRF51422 User Guide v1 1 Copyright 2013 Nordic Semiconductor ASA All rights reserved Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Contents 1 Fi olt aua AAP AA 3 1 1 Minimum reguiremerntS rs 3 1 2 Bdernal resol COS ar Aa GN 3 1 3 Writing CONVE ION ise 3 1 4 Development Kit release notes omar 3 2 A Eaa pIE p i AREE ENNEA AA E AET E E O EE E EA T 4 2 1 nRF51422 Development Kit hardware COntent eseessessessessessessesseeseeseesessesseoseoneeseeseeseeseeseeseeneeseeseese 4 2 2 Downloadable Conter curo a OE ei reaR EA rE O E Eai 5 3 OUR Suc oia ER EEES 6 3 1 Install the nRF51422 connector MOCUIC cccceccessseccessssscessessssccsssssccessscccsccessseccessssccessssssccesssecsenenseces 7 3 2 ANG LINK SS 10 4 Development kit configuration csccssscessscsssccessscssccsssccssscessccescsessccessccesseesssessscessscessesesssecenseees 12 4 1 Devel0pmMenrtehVIKONMENL airada 12 4 2 AA AKA 15 5 Hardware descrip tioi ansia aaa 17 5 1 ARFJONMRF51422 DK Modules AAP ari 17 5 2 AREA ANT USD dongle AN NAA GAAN a ENEE EEEE 24 6 Flash programming and application development sseessoessecesocesocesscesccessocesocesscesscesoecssocesocesseess 26 6 1 Programming and erasing flash using NRFGO Studio ou maana nna nananwawanananansawanansasana
20. code 2908 when reinstalling either the nRF514 or nRF518 SDK Installing or reinstalling either the nRF518 SDK or the nRF514 SDK after the nRF518 SDK has been uninstalled will cause error message code 2908 during installation Use the Task manager Ctrl Shift Esc to end the task nRF514 8 SDK Setup Drivers included in nRF518 will still be installed if not already installed The debugger seems to freeze while debugging If running a SoftDevice that has been programmed with the Lock SoftDevice from Read back enabled see section section 6 1 on page 26 the debugger will halt while stepping to an SVC instruction You should set the breakpoint after the SVC instruction and run the application to the breakpoint or step over any SVC instructions See section 7 1 2 on page 40 for more details Note The nRF51422 chip is pre programmed with the 5210 nRF51422 SoftDevice with Lock SoftDevice from Read back enabled Software gets out of sync while debugging Setting modifying breakpoints on a running system using the SEGGER debugger will halt the CPU which may result in software that is out of sync You should avoid setting breakpoints while the system is running The debugger does not halt on breakpoints Some Keil projects in the SDK have Optimization level 3 03 and Optimize for time checked If you are debugging an application with these settings your breakpoint set might have no effect Press Alt F7 to open the Target options dialog
21. compatible 5 2 2 Hardware pictures ino et a E DRZ L EN B ce E N i H Pel C7 Siete 0083RUBR Figure 17 nRF2779 top side E Ci R2 fe i a la C2 o O Q O Z O o LL y Q Q aa O Z Figure 18 nRF2779 bottom side Page 24 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 2 3 Block diagram USB VBUS ee Data nRF24AP2 USB Antenna dd Bp Matching network IT Osc 16 MHz Figure 19 nRF2779 block diagram Page 25 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 Flash programming and application development The nRF51422 chip is shipped with the SoftDevice pre programmed on the chip It is not possible to upgrade or erase the SoftDevice on nRF51422 6 1 Programming and erasing flash using nRFgo Studio Use nRFgo Studio to program or erase an application HEX file onto the nRF51422 chip Note For details on memory organization and protection see the nRF51 Series Reference Manual List of SEGGER debuggers Code memory Programming tools Memory readback protection Device Manager nRF51 chip identification SoftDevice identification otto su PR oe File View nRF8001 Setup Help 4 Front End Tests TX carrier wave output RX constant carrier LO leakage TX RX channel sweep RX sensitivity 4 Blu
22. cts for SEGGER debugger for first time use Create JLinkSettings ini file with the contents shown in Figure 40 on page 50 The file JLinkSettings ini should be saved in the same folder as Keil uVision project uvproj file 1 Double click an example project file to open the Keil uVision IDE 2 Click Target Options on the toolbar or click Project menu and select Options for Target Debug Peripherals Tools SVCS Window Help ad ERAR SS we A se iy a Qs Configure target options Figure 35 Keil Target configuration Under the Debug tab in the Use list select J LINK J Trace Cortex option as shown in Figure 36 Click Settings as shown in Figure 36 Both the SEGGER Control Panel and the Keil Target Driver Setup will open opto Tose MRE O a Device Target Output Listing User C C Asm Linker Debug aes Settings Use ILINK Trace Cotex gt Setings Limit Speed to Real Time W Load Application at Startup ff Run to main Figure 36 Selecting J Link debugger in Keil Page 47 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Note If the SEGGER J Link Lite firmware requires an update you will be prompted with the message A new firmware version is available for the connected emulator In this case click OK General Settings Breakpoints Log CPU Regs Target Power SWY RAW Trace Device Emulator MemMap Flash V Start mi
23. d Output compiling system nrf51 c creating preprocessor file for nrf delay c compiling nrf delay c Ey 4 JLink Info Found Cortex MO r0p0 Little endian J LINK J Trace Cortex COU E Figure 25 Debugger initiation Page 34 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 2 4 Limitation when debugging on a chip with a SoftDevice When a SoftDevice is installed in a device there are certain limitations when debugging The nRF51422 has a Memory Protection Unit that prevents the debugger from having read write access to the SoftDevice code memory area The debugger reads this area as 0x0000 no operation instruction 6 2 5 Programming the device The code memory area occupied by the SoftDevice is read write and erase protected The debugger will read this area as 0x0000 no operation instruction When the SoftDevice is enabled the Memory Protection Unit enables write protection for certain peripherals used by the protocol stack Protected peripherals are described in the 5210 nRF51422 SoftDevice Specification Configure the debugger and compile and link the application code Download the application using the Keil IDE download button To configure and start the download Select Options for Target in the Project menu Select the Utilities tab in the Options for Target dialog box Click Settings Select the Program check box Choose Erase Full Chip Click Add and select the nRF
24. d to result in personal injury Nordic Semiconductor ASA customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such improper use or sale Contact details For your nearest dealer please see http www nordicsemi com Information regarding product updates downloads and technical support can be accessed through your My Page account on our homepage Main office Otto Nielsens veg 12 Mailing address Nordic Semiconductor 7052 Trondheim P O Box 2336 Norway 7004 Trondheim Phone 47 72 89 89 00 Norway Fax 47 72 89 89 89 ah Q TAVA NORWEGIA ACCREDITATION No S03 NS EN ISO 9001 CERTIFICATED FIRM Page 51 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Revision history February 2013 1 1 Updated content to match v2 0 of the hardware Updated the hardware content in chapter 5 on page 17 and SDK information in chapter 8 on page 42 November 2012 1 0 First release ARM statement Keil uVision and Cortex are trademarks of ARM Limited All other brands or product names are the property of their respective holders Page 52 of 52
25. e e The nRF51422 device is capable of operating at voltages higher and lower than 3 3 V This can be tested when the debugger is not required for programming or debugging the application However for the J Link Lite Cortex M that is included in the kit to function correctly the supply voltage must be set to 3 3 V on the Motherboard At all voltages other than 3 3 V the J Link Lite CortexM 9 debugger should be disconnected from the nRF51422 module SEGGER has debuggers that are capable of debugging in the entire voltage range The supply voltage operating range of the nRF51422 device is stated in the Product Specification Start the Blinky project 1 Locate the Blinky project found under lt keil path gt ARM Device Nordic nrf51422 board nrf6310 blinky_example arm 2 Open the Blinky project in Keil uVision by double clicking the blinky uvproj file 3 Select nRF51422 from the Select Target list and click Build or press F7 to compile the Blinky project 4 Click the Load icon to download and run the Blinky example firmware LEDO to LED7 on the nRFgo Starter Kit Motherboard should now blink sequentially Page 9 of 52 NORDIC SEMICONDUCTOR nRF5 1422 Development Kit User Guide v1 1 3 2 ANT Link demo Download and install ANTware II 1 Go to www nordicsemi com and log in to your Nordic My Page account 2 Download and install ANTware Il Plug in the ANT dongle 1 Plug the ANT dongle nRF2779 into your computer The dr
26. e invisible to the debugger as well Information on the SoftDevice configuration and memory resource mapping can be found in the 5210 nRF51422 SoftDevice Specification Note Avoid single stepping to the protected area Instead set the breakpoint right after SVC calls while debugging and run the application to the actual breakpoint see Figure 32 on page 41 The step over function F10 may also be used instead to step over SVC calls to avoid delays when entering the readback protected area C KeilNARM Device Nordic nrf51422 Board nrf6310 ant ant_hrm hrm tr arm ant_hrm_tauvproj pVisiond jam File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Dee s M c HD e EA R FFE RD erm Baile oo alts slo a oo Ema Ea 2 m x Registers q Disassembly 0x000020AE 0000 0x000020B0 0000 0x000020B2 0000 0x000020B4 0000 0x000020B6 0000 0x000020B8 0000 0x000020BA 0000 0x000020BC 0000 0x000020BE 0000 0x000020C0 0000 0x000020C2 0000 0x000020C4 0000 0x000020C6 0000 0x000020C8 0000 0x000020CA 0000 0x000020CC 0000 AxANnAn2nrr NANA lal Ox20000014 Ox00000041 OxE000E200 0x00000041 0x2000081C 0x00000002 00000000 00000000 OxFFFFFFFF OxFFFFFFFF 0x0000B004 000008004 OxFFFFFFFF 0x20001898 0x0000017F 0x000020AC 0x61000000 simple uart config RTS PIN NUMBER TX PIN NUMBER CTS PIN NUMBER RX PIN NUMBER a printf enter main n Thread MSP softdevice setup ti
27. etooth TABOO Configuration sal ile es orem Appkaton Dispatcher Programing of application on nRF51 device Trace Translator Direct Test Mode Size 216 kB File to program Browse nRF8002 7 Lock entire chip from read back Addr Oxa000 4 Motherboards Region 0 4 Board1 Read back Protected Module nRF51422 Size 40 kB nRF ISP Motherboard connector nRF51 Programming FW Bootloaders 5210 nRF51422 1 2 0 alpha Figure 20 nRFgo Studio dashboard Page 26 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 1 1 Selecting a board to program 1 Open nRFgo Studio 2 Inthe Device Manager pane select which board to program or erase 3 The nRF51422 DK modules PCA10006 PCA10007 cannot be selected directly The boards must be selected through the J Link debugger connected to them To do this you either select the actual module located under Motherboard gt Boardx or by clicking on nRF51 Programming 4 Select the debugger you want to use from the list of available J Link debuggers under Segger to use 6 1 2 Identifying the nRF51 chip and chip content When you select a board nRFgo Studio identifies the nRF51422 chip and how its memory is organized The following chip and memory information is displayed e NRF51 chip identification Identifies the chip by name and code variant for example nRF51422 QFAACA If the debugger is not connected to the chip or the debugge
28. firmware 6701 Latest motherboard firmware 6701 Boards connected Boards connected Device Manager TX carrier wave output RX constant carrier LO I Board 0 Firmware 6701 Upgrade Motherboards Bootloaders 4 Motherboards Board 0 N Bootloaders Log c Nordic Semiconductor ASA 2008 2011 Starting bootloader on board 0 Starting bootloader on board 0 Starting update of board 0 Board 0 is updated Page 8 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 Select the desired motherboard from the Device Manager pane in nRFgo Studio To find the board ID look on the 7 segment display on the Motherboard 6 In nRFgo Studio you can control the supply voltage VTG to the connected nRF5 1422 module Make sure the voltage is set to 3 3 V SA nkFgo Studio Board Lo ay File View nRF8001 Setup Help Features 4 24 GHz 4 Front End Tests Vtarget VTG TX carrier wave output Jump to bootloader RA constant carrier LO leakage TA RA channel sweep RA sensitivity 4 Bluetooth nRF amp 001 Configuration Dispatcher Trace Translator Direct Test Mode nRF amp oo2 4 Motherboards 4 Boardl Module nRF51422 nRF ISP Motherboard connector nRFS1 Programming Bootloaders c Nordic Semiconductor 454 2008 2011 Note Please refer to nRFgo Studio s help file for further information While in nRFgo Studio press F1 to open the help fil
29. g Make RW Sections Position Independent RO Base axo0000000 Make RO Sections Position Independent ug g3 Dont Search Standard Libraries f4 Report might fail Conditions as Errors disable Wamings O O A _build blinky_am sct cpu Cortex M0 o ibrary type microlib feedback _build blinky_am fed strict scatter _build blinky_am sct Figure 21 Keil linker settings Page 30 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Select the Target tab In Read Only Memory Areas define values for Start and Size In Read Write Memory Areas define values for Start and Size as seen in Figure 22 Click OK a SIGE Below is an example configuration for an application using a chip with 256 kB of code memory and 16 kB of RAM and a SoftDevice using 128 kB of code memory and 8 kB of RAM SoftDevice B described in Table 2 on page 29 Base code memory address 0x20000 and available code memory size is 0x20000 128 kB Base RAM memory address 0x20002000 and available RAM size is 0x2000 8 kB KA Options for Target nNRF51822 5110 Device Target Output Listing User C C Asm Linker Debug Utilities Nordic nRF51822 on ch man pa pamo Figure 22 Memory layout with example SoftDevice IROM1 Start Specify the start address for the application code Size Specify available code size for the application code IRAM1 Start Specify start address for the applica
30. gs yy NE CITIES y sa ile ooo o 20000 Ose lac o o orn OE 4 maigi Sn o E GI Han e ha rgo Motherboard PSN dl P10 P1 Page 7 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Turn on and set the supply voltage i 2 3 4 Slide the S8 switch on the Motherboard to VBUS Slide the On Off switch on the Motherboard to ON The VCC and VTG LEDs will light up On Off switch S8 switch VCC and VTG LED 200000 laodooo a nA Board ID ia o o 0 Oj Start nRFgo Studio The Motherboard firmware may require an update and if needed you will be prompted to begin the update If this occurs click OK and wait for the update to complete The firmware on board 0 is older than the current version It should be updated to assure correct functionality Do this by pressing the OK button Note While updating the firmware you will see nRFgo Studio look similar to the image on the left Features below On completion of the update the Updating message will change to Upgrade as seen in the figure on the right however this option is not immediately available after the latest update and will be greyed out anos nRFgo MotherBoard firmwares Features 4 24GHz TX carrier wave output RX constant carrier LO l Board 0 Firmware 5813 Updating 4 Front End Tests nRFgo MotherBoard firmwares 4 24GHz 4 Front End Tests Latest motherboard
31. h the 10 pin connector P3 on the nRF51422 DK module VTG 1 2 SWDIO GND 3 4 SWDCLK GND 5 6 NC NC 7 8 NC GND 9 10 NC Figure 14 SWD interface connector P3 1 VTG Reference voltage for programmer 2 SWDIO Serial Wire Debug Data 3 GND Ground 4 SWDCLK Serial Wire Debug Clock 5 GND Ground 6 NC No Connection 7 NC No Connection 8 NC No Connection 9 GND Ground 10 NC No Connection Table 1 SWD interface connector pin description Page 21 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 1 7 32 768 kHz crystal The nRF51422 can use an optional 32 768 kHz crystal X2 for higher accuracy and lower average power consumption On the nRF5 1422 DK module P0 26 and P0 27 are disconnected from the Motherboard and connected to the two jumpers on the nRF51422 DK module at the position 32 kHz on connector P4 Pin 1 and Pin 3 for XL1 and Pin 2 and Pin 4 for XL2 This is the default position of the jumpers when shipped If the jumpers are placed in the position I O on connector P4 Pin 3 and Pin 5 for XL1 and Pin 4 and Pin 6 for XL2 P0 26 and P0 27 connects to the Motherboard and can be used for normal I O XL2 C14 po27 RS OR amy 32 768kHz C13 12pF Figure 15 32 768 kHz crystal circuit schematic and PCB Page 22 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 1 8 Current measurements The current drawn from the nRF51422 device can be monitored using t
32. he Current Shunt Monitor CSM INA216 U2 The gain of the CSM is set to 200 V V for lowest possible drop voltage For current measurements using the CSM the jumper on connector K1 must be placed on Pin 2 and Pin 3 This is the default position of the jumpers when shipped Current on the nRF51422 module is measured on connector K2 as voltage proportional to the current For current measurements using the jumper P7 on the Motherboard the jumper on connector K1 must be placed on Pin 1 and Pin 2 VCC nRF K VCC nRF 1 2 3 R6 Pin List 1x3 Vout 100 Tin 100nF A JU2 Z Z INA216A4 Ex I 10mA gt Vout 1 0v a eE Gain 200V V z E Vdrop max 20mA 10mV K2 1 2 in TPS Pin List 1x2 Figure 16 Current measurement circuit schematic and PCB Page 23 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 23 nRFready ANT USB dongle nRF2779 The nRFready ANT USB dongle nRF2779 enables you to send data to nRF51422 as well as monitor the data sent from nRF51422 Software and drivers for the ANT USB dongle install automatically but are also available for download from the nRFready ANT USB dongle product page at www nordicsemi com The ANT USB dongle combined with ANTware II gives you a peer device for nRF51422 that you can use to test the wireless connection 5 2 1 Key features The nRF2779 has the following key features e NRF24AP2 IC e ANT
33. iver installation will start automatically Start the ANT TX broadcast example 1 Go to the ANT Broadcast TX project found under lt keilpath gt ARM Device Nordic nrf5 1422 Board nrf6310 ant ant_broadcast broadcast_tx arm 2 Open the project in Keil uVision by double clicking the ant_broadcast_tx uvproj file Click the Build icon or press F7 to compile the project 4 Click the Load icon to download and run the Broadcast example firmware 9 Note LEDO indicates ANT is transmitting and LED1 indicates that the device is idle Page 10 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Start ANTware Il and configure the ANT channel Below is an example of how to set the Slave setting in ANTware Il Select ANT dongle Device A Set Channel Assignment to Slave In the Channel ID window set Device to 0 set Device Type to 0 and set Trans Type to O Click Auto Open oY ge Monitor the traffic in the ANTware II Received Broadcast Data is shown in the feedback window showing packets coming from the ANT Broadcast TX A counter is added on the two last digits and will increase by one for each packet received Log Files Settings Help Available Devices Click on a device to view its channels Device A USB 0 Baud 57 6k Max ANT Channels 8 Max Networks 3 Max Data Channels 0 Capabilities Private Networks Serial Number Per Channel Tx Power Low Priority Search Search List
34. m 3 Select whether to enable or disable readback protection of the entire chip If you enable readback protection you will have to do an Erase All to reprogram the chip again Note A chip that is programmed with Lock entire chip from read back enabled will not work with a development toolchain To make it work you must perform Erase all Lock entire chip from read back can be used to prevent an accidental overwrite of the chip content Page 28 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 2 Application development The user application is compiled linked and downloaded independently from the SoftDevice This means that developing and debugging on a chip pre programmed with a SoftDevice is similar to that of a blank chip The main differences are memory layout and the call stack size 6 2 1 Configuring memory layout Specific SoftDevice versions and stacks could have different requirements Please review these before proceeding The applications vector table must be set up differently depending on whether it will run on a chip that is blank or pre programmed with a SoftDevice The SoftDevice program area starts at address 0x0 and has a predefined size The application start vector must be placed right after the SoftDevice The available size has to be set so that it uses the remaining memory for the application Similarly the SoftDevice data area starts at the lowest RAM address The application data
35. mer init E Project FB Registers Command q Call 00000000 R5 00000001 RE 0000A319 R7 200003044 TEEPE JLink Info J Link Flash download Total time needed 1116735 238s E e NG NAKEi TANARMNA Device lMiNordiciinrfs1422M1Bnardlinrf3101lanrilant 4 LU gt gt ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet BreakAccess E Call Stack Locals E Memory 1 J LINK J Trace Cortex t1 0 00000000 sec L 87 C4 Figure 31 Debugger information for a setup with a SoftDevice enabled in the protected area Page 40 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 C Keil ARM Device Nordic nrf51422 Board nrf6310 ant ant_hrm hrm_tx arm ant hrm txuvproj Visio eee E s File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Osua 2B 9 cle o P RAR EEE Ng Gb sc Jario cea solo o ads Eo ee Registers q Disas A g event flags EVENT TIMER EXPIRED return value nrf wait for app event DF3D SVC Ox3D 0001 MOVS El ED if NRF_SUCCESS return value f Code that should never be reached D002 BEQ OxOO00ASFC aborthandler ASSERT nrf wait for app event return value No else clause needed A057 ADR r0 ipc 2 0x0000A754 FOOOFS4E BL W aborthandler 0x0000A898 if g_event flags 6820 LDR ro r4 0x00 2800 CMP r0 0x00 DOF6 BEQ OxOO00ASFO if g_event flags amp EVENT ANT STACK B B and after that return
36. nanansasansasasasana 26 6 2 Application CS 710 AA 29 7 pPebugainginenn 31422 NAN NANANA NALANG 38 7 1 nRF51422 debug features and precautions csccsssssscssssscssessssssesesssssesessssssseessessessssessssseassesseseers 39 8 Software Development Kit cccccsssccssscessscesscccsssecessccesscecssscccssccesssccsssccescesessccesscccsscccessccesssees 42 8 1 Installing MenRFS Dana ra 42 9 TN ONES NS SU UNO rin iaa ENERET ESEESE TE NENEA 43 Appendix A Installing drivers and configuring KEIL projects for the SEGGER TENG nasa sc tuntassedsestacncs E E 45 Page 2 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 1 Introduction The nRF51422 Development Kit DK for ANT provides a complete solution for developing testing and evaluating the nRF51422 device nRF51422 is part of the nRF51 series which offers a range of ultra low power System on Chip SoC solutions for your 2 4 GHz wireless products 1 1 Minimum requirements e nRFgo Starter Kit nRFgo Studio v1 14 or later e Computer with a minimum of 2 USB ports e Windows XP 32 bit SP3 or Windows 7 1 2 External resources e Keil MDK ARM Lite v4 54 or later https www keil com demo eval arm htm e J Link Software v4 52b or later http www segger com jlink software html 1 3 Writing conventions This User Guide follows a set of typographic rules that makes the document consistent and easy to read The following writing conventions are used
37. ngs and select Erase Full Chip 3 Uncheck Program and Verify Page 36 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 A normal download procedure will erase the device application code memory area Download Function Erase Sectors TT Venfy Donot Erase Reset and Run 00000000H OO1FFFFFH Add Remove Figure 28 Erasing Note The SoftDevice pre programmed in the device cannot be erased Any erase procedure will only remove the information in the code memory area available for the user application Page 37 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 7 Debugging the nRF51422 For debugging with SEGGER J Link see Appendix A on page 45 For general information of how to debug using the Keil uVision IDE see http www keil com uvision debug asp The following steps tell how to configure the debugger in Keil 1 In the Project menu click Options for Target CTRL F7 2 Select the Debug tab 3 To enter debugging mode click Start Stop Debug Session or CTRL F5 RA ie CAKeiN ARMDeviceWNordicinrf51422Boardinrf63101blinky_examplerarmiblinky uvproj piVision4 mas File Edit View Project Flash Debug Peripherals Tools SVCS Window Help O m s als gt BR REF O vavinoume FR Ql 9 eE a r Start Stop Debug Session Ctrl F5 SS Enter or leave a debug session 2 i Bi S 88 rs422 Project q A C5 nf51422 39 a e
38. nimiz Vv Always on to rocess C Keil UV4 UV4 EXE DLL C Keil UV4 JLinkARM dll J Link ll Target y ndian Actual Host swf About JLINK GetFirmwareString Done 169 650 sec in2calls 4 Figure 37 SEGGER control panel 5 Click the Debug tab shown in the figure Set Port to SW and Max Clock to 1 MHz as shown in Figure 38 Make sure that SN and IDCODE are populated properly and click OK 7 Cortex JLink JTrace Target Driver Setup _ Debug Trace Flash Download J Link J Trace Adapter SN ice Hink OB SAM3U128 HW V1 00 dll d V4 BI SWD 008811477 ARM CoreSight SW DP Up Down ID CODE Device Name dd Delete Update IF len Manual Configuration Cache Options Download Options 4 Cache Code 7 Verify Code Download 4 Cache Memory FT Download to Flash State ready EEES DOTAR Ping Figure 38 Debug settings 6 Select the J Link device for target programing Page 48 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 Options for Target nrf51422 a aa a Configure Hash Menu Command Use Target Driver for Rash Programming U LINK J Trace Cortex y Settings Y Update Target before Debugging Use Extemal Tool for Aash Programming Run Independent Figure 39 Flash settings 7 If the J Link serial number appears in the SN field the device is properly installed The default settings
39. nts in separate windows In the View menu point to System Viewer and select the peripheral you want to see The peripheral register values are displayed in their respective pane in Keil as seen in Figure 30 More information on System Viewer can be found at http www keil com uvision db_view_sysview asp C Keil ARM Device Nordic nrf51422 Board nrf6310 blinky_example arm blinky uvproj File Edit View Project Flash Debug Peripherals Tools SVCS Window Help 7 a D8H 8x DA e BAR SS B wpne Fla AA eo Saba es mo seo o gt OE E a m x Registers q Disassembly q RNG uint8_t output_state 0 Configure LED pins as outputs Property TASKS START 000000000 nrf gpio range cfg output LED START LED STOP TASKS STOP 0xX00000000 Ox0000A14A 2008 MOVS ro 0x08 EVENTS_VALRDY 0x00000000 E EE NA ANANNATAN 215 MITE mi PAVA SHORTS 000000001 OXDODDATAC VALRDY_STOP 0 Disabled Shortcut disabled OxFFFFFFFF E main INTENSET OxFFFFFFFF main function VALRDY 0 Disabled Interrupt disabled OxFFFFFFFF return 0 int return type required by ANSI ISO standard INTENCLR OxFFFFFFFF VALRDY 10 Disabled Interrupt disabled OxFFFFFFFF int main void OxFFFFFFFF Co OxD000A1AC Ox20001000 uint8 t output state 0 DERCEN 0 Disabled Digital error correction disabled 0x0000A12D T a VALUE OXDODOA 1148 Configure LED pins as outputs VALUE 061000000 nrf gpio range cfg output LE
40. ongle ES USB Log c Nordic Semiconductor ASA 2008 2011 Application Programming amp Erase Via J Link nRFgo Studio 0 10 pin Flat Cable USB Configure Voltage waaa een ee nRF51422 module e e Figure 3 nRF51422 DK configuration for one ANT development platform Page 14 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 4 2 Kitsetup USB connected to computer J Link Lite 10 pin 2 54 mm CortexM flat cable P2 10 pin 1 27 mm flat cable P8 P10 P1 Figure 4 Kit setup 4 2 1 nRFgo nRF51422 DK modules The nRF51422 modules contain the nRF51422 device and its interfaces see section 5 1 on page 17 for a complete description The modules are plugged into the Motherboard which provides the power supply Make sure the jumper on header K1 is placed in the default position as described in section 5 1 8 on page 23 The Motherboard is connected to your computer with a USB cable and turned on as described in Turn on and set the supply voltage on page 8 On the Motherboard the two 10 pin flat cables connecting P8 PORTO and P1 BUTTONS and P10 PORT 1 and P2 LEDS are required to connect the correct I Os to the LEDs for the example projects in chapter 2 on page 4 and for projects in the SDK Note With the nRFgo Studio application you can control the supply voltage VTG to the connected nRF51422 DK module as described in Turn on and set the
41. ot be exceeded 1 MHz A proper configuration is shown in Figure 24 on page 34 Debug Trace Flash Download d link J Trace Adapter SN magan E Device J Limk Lite Cortex M HW V8 00 dl v4 50 FW J Link Lite Cortex M V8 compi Port Max Clock Automatic Detection ID CODE sw x MHz Y Manual Configuration Device Name Add Delete Update IF lerr USB TCPAP Scam State ready Figure 24 Target driver setup Click Start Stop Debug Session CTRL F5 in the Keil IDE to start debugging Th CC CP C TC _ CAKeiN ARMDevice Nordicinrf51422Boardinrf63101blinky_examplelarmiblinky uvproj uVision4 BS File Edit View Project Flash Debug Peripherals Tools SVCS Window Help Oaehd aelo e Ban EFE vepinnume HA PRQ o 9 E7 A Sue C3 1888 nri51422 HA BS d Start Stop Debug Session Ctrl F5 Enter or leave a debug session a Project a x ea nrf51422 terror Board is not defined 03 app endif o ho a keil arm uvd int 40 0 main function E E3 core Ga lib return O int return type required by ANSI ISO standard uint8_t output_state 0 Configure LED pins as outputs nrf gpio_range_cfg_output LED_START LED_ STOP while true nrf gpio port write LED PORT 1 lt lt output state LED OFFSET output state output state 1 amp STATE MASK nrf delay ms 100 HI E Pr eo Fu Oy Te Buil
42. r has a problem communicating with the chip it will show the following message No device detected Ensure that you have the SEGGER connected correctly to the board and that the board is powered and configured for debugging Code memory Shows how the code memory is organized in one or two regions Region 0 and 1 and the size of each region nRF51422 will always show two regions For devices containing a SoftDevice the code memory is divided in two regions with the SoftDevice in Region O The tool shows you how much memory is used by the SoftDevice and how much is left for the application e Memory readback protection Shows how the readback protection is set The two possible options are readback protection on Region 0 or readback protection of the whole code memory e SoftDevice identification nRFgo Studio tries to identify the firmware located in the chip at Region O For the firmware that it recognizes it prints the ID in clear text for the unrecognized firmware it prints the FWID number 6 1 3 Erase all Use Erase all in the following situation You have programmed an application on top of the 5210 nRF51422 SoftDevice and selected Lock entire chip from read back Once you have performed Erase All the application will be erased from the chip The 5210 nRF51422 SoftDevice will not be erased To use the Erase all function follow the steps in section 6 1 1 on page 27 Then click Erase all Page 27 of 52 NORDIC SEMICON
43. rade the SoftDevice on this chip 5 1 1 Key features The nRF51422 DK modules have the following key features nRF51422 flash based ANT SoC solution e Current Shunt Monitor CSM for current measurements e NRFgo Motherboard integration e PCB antenna PCA10006 only SMA connector compatibility PCA10007 only e SWD interface connector for programming and debugging 5 1 2 Hardware pictures nRFgo SNORDIC SEMICONDUCTOR 30 mE a NT Cm 33 mM a 3 m J ob amman 400005 Figure 7 nRF51422 DK module PCA10006 top Page 17 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 o o CEO CEQ CEO OEC TP1 TP2 a NG SWDCLK Figure 8 nRF51422 DK module PCA10006 bottom nRFgo QNORDIC SEMICONDUCTOR AAA AMD DAMA A Jwswaanseay EK JU914N X2 it Po a mm TERA TE O AL R40 Y E DR3 ee amp Figure 9 nRF51422 DK module PCA10007 top Page 18 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 S a a 4 A el el dl al Ol dl A Al Al A a S S S oee a N mla TP1 TP2 py suoIo 2 H SWOCLK P2 aaa ga HG qd G a KK KB K F o NG O O w a v v G o o Figure 10 nRF51422 DK module PCA10007 bottom 5 1 3 Block diagram Ext A1 Ext B1 RESET Cortex VY Matchin ee Analog nRF51422 6x6 a PCB antenna Osc Osc 32 768 kHz 16 MHz Figure 11 nRF51422 DK module block diagram
44. supply voltage on page 8 Page 15 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 4 2 2 nRFready ANT USB dongle nRF2779 The nRFready ANT USB dongle nRF2779 enables you to send data to nRF51422 as well as monitor the data sent from nRF51422 The nRFready ANT USB dongle is plugged into a USB port on your computer as described in Plug in the ANT dongle on page 10 4 2 3 J Link Lite CortexM 9 JTAG SWD Emulator The programming and debugging SWD interface of the nRF51422 device is accessed through a 10 pin connector P3 on the nRF51422 DK module Figure 5 Pin 1 position on the SEGGER J Link Lite CortexM 9 Connect the JTAG SWD emulator using the 10 pin 1 27 mm flat cable supplied with the kit to the nRF51422 DK module at P3 and to your computer with a USB cable as shown in Figure 6 saa NIM a BIT ONDUCTOR Hi IR Figure 6 nRF51422 DK module connected to the SEGGER J Link Lite CortexM 9 Page 16 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 5 Hardware description This chapter describes the nRF51422 DK modules and the nRFready ANT USB dongle nRF2779 For driver downloads please register your Development Kit in your My Page account to access the files 5 1 nRFgonRF51422 DK modules The nRF51422 modules PCA10006 PCA10007 are delivered with the 5210 nRF51422 SoftDevice ANT preloaded on the nRF5 1422 chip It is not possible to erase or upg
45. tion data Size Specify available RAM size for the application data Table 3 Memory layout Page 31 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 2 2 Shared call stack The user application shares the call stack with the SoftDevice if the SoftDevice is loaded on the chip The application must reserve enough memory for both itself and the SoftDevice in the call stack The call stack size required by the SoftDevice varies between devices and protocol stack versions and is supplied in the 210 NRF51422 SoftDevice Specification The user application sets its call stack size plus the amount needed by the SoftDevice It then writes the stack pointer at the first address of the application Reset Vector Note Using Keil with the ARMCC toolchain the call stack size can be set using the Stack S1ze definitions in your projects startup file typically arm startup nr f51 s Stack Size EQU 0x400 The application cal l stack size protocol call stack size AREA STACK NOINIT READWRITE ALIGN 3 Stack_Mem SPACE Stack_S1ze initial sp Page 32 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 6 2 3 Debugger configuration Project files delivered in the SDK are configured and ready for download and debugging If a new application project is used the debugger must be properly configured To configure the debugger 1 In Keil select Options for Target ALT F7 from the Project menu
46. to the sleep mode while 1 return value nrf wait for app event if NRF SUCCESS return value Code that should never be reached aborthandler ASSERT nrf_wait_for_app event return value No else clause needed if g event flags As we wake up for every periodic timer tick count interrupt most of the time we don t need to enter this method application event process No else clause needed Project FE Registers Command q Call Stack Locals Name Location Value Type JLink Info J Link Flash download Total time needed 1116735 2 BY main_hrmix 0x0000A5F4 void ff Load C Keil ARM Device Nordic nrf51422 Board nrf6310 ant Y return value enot in scope auto unsigned int BS Want hrm txX main hrm tx c 80 OX0000AECC e gt ASSIGN BreakDisable BreakEnable BreakKill BreakList BreakSet E Call Stack Locals E Memory 1 J LINK J Trace Cortex Figure 32 Setup with breakpoint after an SVC call Page 41 of 52 NORDIC SEMICONDUCTOR nRF51422 Development Kit User Guide v1 1 8 Software Development Kit The nRF51 Software Development Kit SDK enables you to develop applications for the following protocol stacks e ANT e ANT Note ANT keys are needed to use ANT profiles included in the SDK Please register as an ANT adopter at http thisisant com to get the keys 8 1 Installing the nRF51 SDK The nRF51 SDK is

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