User manual MSC MPW10K2, Rev. 1.1
Contents
1. 195 Table 8 11 Systematic Error Peak to Peak Values Remark Including the systematic error in the calculations of measurement and calibration values see Chapter 4 3 the singleshot measurement errors see Chapter 8 8 3 for instance can be much re duced MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com2. User Manual Version 1 1 Date 2010 02 08 MSC Vertriebs GmbH IndustriestraDe 16 7629 Stutensee Germany Author AP Phone 49 7249 910 288 Fax 49 7249 910 268 Email AP msc ge com MSC All rights reserved Although great care has been taken in preparing this document MSC can not be held responsible for any errors or omissions All information in here is subject to change without notice All hardware and software names used are trade names and or trademarks of the respective owners tdcfamsc ge com www msc ge com MSC User Manual MSC MPW10K2 Contents L BEAT URES e 2 BLOCK DIAGRAM os ansctiseseuieeeese e bxv ee qaa EEKIS SEES RENS EER SUME NER ERR ER ERR SURE rina asioinut 3 PACKAGE AND PIN CONFIGURATION eeeeee eee eee eee e nnne see ooee 3 1 PACT AO See eee ee ee ne eee ee ee 3 2 PIN CONFIGURATION ccccccscececcececcececcececcecscscececeececescecscsceseecesescecseecesescess 4 MEASURING PROCEDURES soccsssscssssoesencenssssssasveseavessssssentsoseosssesssessstvonvessestens 4 1 GENERATING CALIBRATION VALUES cccccscccsccsccsccescescenscesscesccusseusseuscencs 4 2 MOS ONERA ON ee aE A ee ee 4 3 CALCULATION OF MEASUREMENT AND CALIBRATION VALUES cene 4 4 CALCULATION OF THE MEASURED TIME DIFFERENCE TVyAL enne S GENERAL MEASUREMENT CYCLE ecce e eee eee eene eese
3. CN QN CN QN CN QN CN QN QN CO c0 CD c0 mo c0 CD c0 YO DO c0 co cst cst ct cst cst cS GG GG GG Gg GG S c Time ns Figure 8 4 Measurement Errors of Singleshot Measurements at 5V MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 30 of 31 8 8 4 Systematic Error Due to the measuring principle the TDC Core 10K2 has a systematic error shown in Figure 8 5 Systematic Error 50x per Meas Point incl Cal Increment 25ps Cal Clock 4MHz 3 3V 38 C M0z16 a fh AA A a Lue af pm NI ee TDC SR620 ns 16 fc m0 10 Time ns Figure 8 5 Systematic Error at 3 3V The systematic error is periodical with the fractional portion A fc m0 of the measurement value see formula 1 in Chapter 4 3 The periodicity is shown once more in Figure 8 6 Systematic Error 50x per Meas Point incl Cal Increment 25ps Cal Clock 4MHz 3 3V 38 C M0 16 0 55 TDC SR620 ns p w 16 fc m0 10 Figure 8 6 Periodicity of the Systematic Error at 3 3V MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 31 of 31 Table 8 11 shows the peak to peak values of the systematic error All values are averaged and derived from measurements on several chips Supply Voltage V Resolution ps Peak to Peak ps Peak to Peak LSB 8 S 40 J O 1D5 49 O
4. of 31 Author AP MSC User Manual MSC MPWIOK2 Page 3 of 31 5 APPEND CeC NES 22 8 1 ELECTRICAL SPECIFICATION scsi ssseescdosndenodsrssunedveseesdacsenesdosesasatsvouess easduotdournesa easdeactsersswelsd 22 8 2 MINIMUM PULSE WIDTH OF START AND STOP SIGNALS cccccceecceescceeesceeecceeseseeeeseeeees 23 8 3 D DTIP ee E E E E E 23 8 3 1 Dead time of time measurements eseeeseeeeseeeeeeeee eene hee nennen ese tese tese eee eese nnne 24 5 5 2 Dead time OF CALEL measurebilellts ooo cosa eset fet se steve seta T eu be Pato Te e Ene to doro rond 24 8 3 3 Dead time of CAL2 measurements eese eene hene hse tese esiti e eese eiue 24 8 4 RE OLOTO orci nce siassceinensaviguee E E EE EE E A A 25 Gu BHowtocaleulate qhe ROSODUPIOLR sieciahietaessscarcsstetateasieanseushedsaasenacestdeiutatsenaseausultetinossases 25 Oe VOM E D PIU Ne NET ETT 25 6 4 9 Temperature Dependente 2252222 20p2 E0220 os nee U sas a R EO petas tea esp RU i 22 8 5 MINIMUM AND MAXIMUM MEASUREMENT PERIOD eee e eee nnne 26 8 6 POWER ON CHARACTERISTICS gssceossdousinwssisitunedsasdnseunenvneuedsdacsdondeassbansaeulartevadadedocobesaneie 26 8 7 CURRENT CONSUMPTION TDC CORE 10K2 eeeeeeeeern eene nnne 26 5 8 MEASUREMENTERESULDES Sm Pe a ee T NEC DN HUE 27 56 0 1 Difioren al NOornsI Ie atlbyseuescossestste nepos eoo saxis EUM rO REONE ere 247 5 0 2 CITC Oey Oa uio aea tU se osos even eos Cio
5. processor interface DATA 7 0 RDN Control Register WRN Status Register READY STATUS REG Figure 6 3 processor interface block diagram In addition to the data and control lines the processor interface provides the status flag READY for interrupt generation at the connected processor 6 4 1 Data and Control Lines 6 4 1 1 Overview The MPWIOK2 provides the following data and control lines e DATA 7 0 Bi directional data bus e RDN Read strobe low active e WRN Write strobe low active e ADR 4 0 Address bus 6 4 1 2 Timing Diagrams Figure 6 4 and Figure 6 5 show the read and write cycle timings In Table 6 1 the associated read and write cycle timing characteristics are specified MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com tDWR DATA T 0 LL LLLLLUN EN LLLI twRD tRDWR WRN twR ERR m LADRWR ADRI amp O L B bL b b llllLLLLiN NIE CWRADR Figure 6 4 Write Cycle Timing tRppD1 DATA 7 0 B tRDD2 ui z D CADRD ADR 4 0 f IllhdlllLK NULL RDADR Figure 6 5 Read Cycle Timing tw 25 WRN e Vpp 2 7V 5 5V Ta 40 to 85 C Load 30pF e Vpp lt 3 3V 25 ns Table 6 1 Write Cycle and Read Cycle Timing Characteristics MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 18 of 31 6 4 2 Status Flag READY The status flag READY is ac
6. setting the Control Register s bit 4 or 5 to 1 and the rising edge of WRN when setting the Control Register s bit 0 4 or 5 to 1 for the next time or calibration measurement The dead time depends on the following factors period tcArcrx of the calibration clock CALCLK Division factor K of the calibration clock divider Time tmo for MO generation with 1 fold accuracy shown in Table 8 5 Accuracy factor A for MO generation Time tary for ALU calculations shown in Table 8 5 Symbol Unit ee ee ee twu ALUcalculation 6 8 10 14 15 23 ns D Vpp 5V 10 Ta 40 to 85 C D Vpp 3 3V 10 Ta 40 to 85 C Table 8 5 tary and tmo MPWIOK2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 24 of 31 The dead time contains the so called communication time tkom with the connected processor because the measurement result has to read out before next measurement The time tkom is made up as follows Readout the result registers 6 tgp trpn Disable channel resp reset the Control Register s bit 4 or 5 to 0 1 twr twrn Enable channel resp set the Control Register s bit 4 or 5 to 1 1 twr twrn gt 4 tkom 6 tup trpn 2 twr twrn The minimum values for tgp trpn twg and twgw are listed in Table 6 1 8 3 1 Dead time of time measurements The dead time tror of time measurements 1s cal
7. the measurement of two calibration clock periods would cause a measurement range overflow within the measuring core In order to achieve high precision accuracy the division factor should be selected in such a way that the time difference tyar to be measured is between one and two calibration clock periods MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 14 of 31 6 2 Measurement Channel Figure 6 2 shows the block diagram of the measurement channel ENABLE MO ACCURACY 1 0 START Measuring core TDC Core STOP me CC FC MO CALCLK I Figure 6 2 Measurement Channel Block Diagram 6 2 1 Input Unit The input unit handles the incoming start stop and calibration clock signals It decides which signal START STOP or CALCLK I is passed on as a start or stop signal to the measuring core depending on time or calibration measurement If the channel 1s disabled via the Control Register no start or stop signals will reach the measuring core and no time measurements will take place During a calibration measurement which has to be executed while the channel is disabled the channel is enabled automatically for the calibration clock 6 2 2 Measuring Core The measuring core of the MPW10K2 is realised as hardmacro TDC Core 10K2 The measuring core determines the time difference between a start and a stop signal with a typical resolution of 45ps S
8. x07 Pe 0x08 8 CC REG Jj LowBye o r aM ZZ OU 0x04 10 FC REG jJ LowBye r 0x0B FCREG V HighByeo r 0x0OC 12 MO REG jJ LowBye r o OxOD 13 MOREG JVHighyeo ro ow i4 STATUS REG S ox0F IS 0 00 7 o OxlO l e 4 J 4j on o O 17 j 000 o 0x12 Be j 0x13 19 c o Oxid4 20 4j 0x15 21 01 0 l 4 CoC a E x17 3 e 0 0 0 70 OxiB 24 00 o Oxi9 25 01 0 0 0 a OxXIA 26 0 0 o xB 27 7 j OxiC 28 xD 29 0bL 2 27 4 OxIE 30 STATUS REG T r OxIF 3 0 S 7 o Table 7 1 Register Addresses MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 20 of 31 7 2 Register Formats 7 2 1 Control Register CTRL REG 7 6 5 4 3 2 l 0 Bit 0 jojo o o Default Enable channel Calibration 0 channel disabled clock division 1 channel enabled S e Disable MO generation 10 _ 1 4 0 MO generation enabled We 1 2 1 MO generation disabled MO accurracy 00 1 fold 01 2 4 fold CAL2 measurement 10 16 fold 11 32 fold 0 Reset bit CA LI1 measurement 1 CAL2 measurement 0 Reset bit is executed 1 CALI measurement is executed Figure 7 1 Control Register CTRL REG Fo
9. PW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 27 of 31 8 8 Measurement Results 8 8 1 Differential Non Linearity The quality of a measurement not only depends on the TDC s resolution but also on its so called differential non linearity DNL The DNL is a criterion for the variation of the quantisation stage s width LSB width Figure 8 2 shows a typical histogram of the TDC Core 10K2 s LSB widths at Vpp 5V The LSB widths recur every 11 LSBs The average LSB width is identical with the resolution Furthermore the figure illustrates the definition of the DNL MPW10K2 LSB Widths at 5V LSB Width PS 60 max A 50 Hic 45 all In I I Lm rn TIl a 55 HIR maximum differential non linearity max DNL max A RES medium differential non linearity m DNL m A RES O er sS oP o LSB fc SD d PA Figure 8 2 Resolution LSB Width and Differential Non Linearity Table 8 8 shows the maximum differential non linearity max DNL and the medium differential non linearity m DNL based upon measurements of several MPW10K2 s at Vpp 5V and 3 3V RES ps 5V m DNL 5V max DNL RES ps 3 3V m DNL 3 3V_max DNL Table 8 8 Maximum and medium differential Non Linearity MPWIOK2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 28 of 31 8 8 2 Standard Dev
10. V 25 C The measuring core then provides measurement or calibration values in the form of raw values to the ALU for further processing In addition depending on the configuration the measuring core generates the TDC specific charac teristic quantity MO It can be selected by software whether MO is generated with 1 fold 4 fold 16 fold or with 32 fold accuracy To achieve a high precision accuracy electrical coupling effects can be minimized applying the MPW10K2 s separated power supply pins for the measuring core MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 15 of 31 6 2 3 Arithmetical Logic Unit ALU The ALU is a flash based ALU At the end of a time or calibration measurement which is indicated via pin READY and within the Status Register the ALU calculates the measurement result consisting of CC Coarsecount FC Finecount and if enabled M0 TDC specific characteristic quantity After 10ns 5V 25 C the measurement result is accessible via the result registers at the latest 6 3 MPWIOK2 Registers The MPW10K2 provides one Control Register three result registers and one Status Register The registers are accessible via the processor interface see Chapter 6 4 All registers are readable the only writeable register 1s the Control Register For addressing the registers refer to Chapter 7 1 6 3 1 Control Register The width of the Control Re
11. ally after each time and calibration measurement using the measuring core Via the Control Register it can be selected whether the measuring core generates MO with 1 fold 4 fold 16 fold or with 32 fold accuracy The generation of MO with 32 fold accuracy takes 32 times longer than the generation of MO with 1 fold accuracy Thus higher accuracy of MO causes a longer dead time of the measurement It s also possible to suppress the MO generation at all However in order to minimize the influences of temperature and supply voltage and to optimize the precision of measurement MO measurements have to be executed in cyclic temporal distances just like calibration measurements 4 3 Calculation of measurement and calibration values The measurement and calibration values VAL CALI and CAL2 named VALUE 1n formula 1 are calculated as follows using the MPW10K2 s measurement results CC FC and MO A Measurements WITH MO0 generation 0 VALUE CC A FC M0 M0 accuracy A 1 fold 1 4 fold 4 16 fold 16 32 fold 32 B Measurements WITHOUT MO generation In this case the measurement and calibration values are calculated using formula 1 too But MO has to be generated during a former calibration or time measurement and read out MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com User Manual MSC MPWIOK2 Page 11 of 31 MSC 4 4 Calculation of the measured time difference ty The measured t
12. bove these values may cause permanent damage to the device Table 8 3 Absolute Maximum Ratings MPWIOK2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 23 of 31 8 2 Minimum Pulse Width of Start and Stop Signals Table 8 4 shows the minimum pulse width t of signals on the start and stop inputs START and STOP for different conditions The time t 1s relevant for both high and low level of the signals Symbol EE e minimum pulse width start stop 4 5 5 8 8 I2 ns D Vpp 5V 1096 TA 40 to 85 C D Vpp 3 3V 1096 TA 40 to 85 C Table 8 4 Minimum Pulse Width of Start and Stop Signals 8 3 Dead Times Due to the measurement principle the MPW10K2 has a dead time tror after the execution of a measurement Depending on the configuration the dead time differs within a wide range During dead time the measuring core is disabled because of post processing and no new measurement will be started within the measuring core The dead time of a MPWIOK2 s time measurement is defined as the minimum time difference between the measurement s stop and the rising edge of WRN when setting the Control Register s bit 0 4 or 5 to 1 for the next time or calibration measurement The dead time of a MPW10K2 s calibration CALI or CAL2 measurement is defined as the minimum time difference between the rising edge of WRN when starting the measurement by
13. c of the TDC Core 4 1 Generating Calibration Values For calibration measurements a calibration clock has to be provided at the MPWIOK2 s pin CALCLK This clock is the absolute time reference and therefore the clock must have the precision of a quartz crystal The calibration clock 1s divided by an internal calibration clock divider The resulting clock CALCLK I is used as internal reference clock and measured by the measuring core CALI CAL2 CALCLK I cAL1 cAL2 Figure 4 3 Calibration Measurement During a calibration measurement the length of one and two periods of the divided calibration clock tcAL1 tcaL2 are measured and the resulting calibration values CAL1 and CAL2 resp FC CC and MO for their external calculation are stored just like the measurement value VAL resp its FC CC and MO in the result registers The time values tcAr1 and tcAr2 2 teats are well known MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 10 of 31 A MPWIOK2 s calibration measurement consists of two successive steps which have to be acti vated separately via the Control Register 1 Generation of calibration value CAL I 2 Generation of calibration value CAL2 4 2 MO Generation Measurement and calibration values VAL CALI CAL2 are standardized using the TDC spe cific internal characteristic quantity called M0 MO is generated automatic
14. cessible via pin and via the Status Register see Chapter 7 2 5 Figure 6 6 shows exemplarily the status flag READY during a time measurement cycle and the first part of a calibration measurement cycle CAL measurement with MO generation enabled time measurement CALI measurement CORE T Ei t ALU wal Lo EL m s E BERE E u EN B Result fo Registers Data not valid A wia A not vatig o0 0 y valid not valid MITIS ew Disable channel Start of CAL I Reset bit via software measurement via software set bit CORE Measurement in progress M0 MO generation ALU Calculation of CC FC and MO Vbp SV TA 25 C For other conditions refer to Table 8 5 tary Figure 6 6 Status Flag READY MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 19 of 31 7 Programming of the MPW10K2 Programming the MPWIOK2 configuring and reading out the status and measurement results 1s done via the processor interface The relevant data 1s read and written via the bi directional data bus DATA 7 0 For addressing the registers the 5 bit wide address bus ADR 4 0 is used 7 1 Addressing In Table 7 1 all register addresses are shown The Status Register 1s accessible via two addresses readable P or er x0 12 le 10 0 Tq CSC S s 0x03 3 0 0 0x04 4 Jj J l l 7 j 0x05 Se y o 0x06 6 e S o Po mm
15. culated as follows 3 5 tror 1 8 A tmo tatu tkom 8 3 2 Dead time of CAL1 measurements The dead time tror of CAL1 measurements is calculated as follows 6 tror 3 K tcarc xk 1 8 A tvo taro tkom 8 3 3 Dead time of CAL2 measurements The dead time tror of CAL2 measurements is calculated as follows 7 tror 4 K tcarcrk 1 8 A tmo tatu tkom Measurements without MO generation A 0 MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 25 of 31 8 4 Resolution 8 14 1 How to calculate the Resolution The TDC Core 10K2 s resolution RES is calculated using the divided calibration clock period tcaL1 the calibration values CALI and CAL2 M0 and its accuracy A 8 RES tca11 A MO CAL2 CAL1 M0 accuracy A 1 fold 1 4 fold 4 16 fold 16 32 fold 32 Example e tcaLi lcArcrk 250 ns e A 32 e MO 5088 e CALI 36 32054 e CALI2 72 44108 gt RES 43 53 ps 8 4 2 Voltage Dependence Table 8 6 shows the voltage dependence of the resolution at normal conditions typical process ambient temperature approx 25 C derived from averaging the resolution of several chips Table 8 6 Resolution Voltage Dependence Ta 25 C typ 8 4 3 Temperature Dependence The resolution increases by factors of approx 0 15 ps K at 3 3V and approx 0 11 ps K at 5V MPW 10K2RefManEngV11 doc Version 1 1 Au
16. e ALU result STOP 10K2 registers ADR 4 0 SS DATAIT 0 m T CALCLK Calibration Control Register clock READY divider Status Register RSTN Figure 2 1 MPW10K2 Block Diagram The measuring core of the MPWIOK2 is realised as hardmacro TDC Core 10K2 with one Start and one Stop input for time measurement between a rising edge of the start signal at the start input START and the following rising edge at the stop input STOP The measurement result is calculated within the ALU and stored in the result registers The result registers can be read out via the processor interface The configuration of the MPWIOK2 is done by writing the Control Register via the processor interface Status information can be accessed by reading the Status Register The calibration clock necessary for calibration the time measurement results has to be supplied by an externally generated quartz oscillator clock at the input CALCLK The calibration clock is di vided by the internal calibration clock divider circuit MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 6 of 31 3 Package and Pin Configuration 3 1 Package Figure 3 1 shows the chip s Ceramic Quad Flat Package with 44 pins CQFP44 and 0 8 mm pitch The package dimensions are specified 1n Table 3 1 The chip s marking is MSC MPWIOK2 V1 1 fafee Sai iia
17. ee eee enssauee 0 FUNCTIONAL DESCRIPTION diossesscteVekseeepbupus seo aa vr en pRE RUE o E Ea EE Np Sa pURE o n aoEE 6 1 CALIBRATION CLOCK DIVIDER i iens seiten on E 6 2 MEASUREMENT CHANNEL e eeeeeeeenennenenennennnn nnne n sehn nnns nnn n nnn nnn n nnn S EMI Foo O erre 022 IVC ASI Ce RERO EE 62 3 Arithmetical Logic Unit ALU ua suadeo cas ocputteucpioai sint ctt anea 5 5 MPWIOR Z REGISTERS iori tusite oett bet en E dedit rere ope MEE Eros e IRC a INTE COT 56 5 2 RCR o S uu ieieitpbtu casse r E cofep I ci LME EU DocU Coal CE RE t i PCR O e E E E E oust cateuetosate 0323 JMOSROPISICE sinsear e A EEE EEE E EEEa 0 5 9 ASEHUUSCISCDISICT e ENES O4 PROCESSOR INTERFACE eusina iais a DAL Data and Omit OL ANC Siogeausecvenmionunacseteit diae nca OPER EEEE OAL CV uu e oal EM a c D CAE DOE CAM TENENTES AME 1021140 bol wd bc ug READY Tm 7 PROGRAMMING OF THE MPW10K2 ssocooossecsccssssscssssoocossssscccccssessssessso 7 1 70D B dS ING NN en E T UT TT T2 ISEGISTERSPORNDATS e ecco ates E nae mI PRI INIM eR IPSNM JL Control Resister CTRE REG oosicedtes erotismo rta ies etbersiat beides Valet EO Hui CE 60 T Too PCrRecister EC IEG m Cpu MO Rester MO REG hce S 7 2 5 Status Register STATUS REO eeeeeeeeeeeeeeneen nnne MPW 10K2RefManEngV11 doc Version 1 1 tdcfamsc ge com WWW msc ge com Page 2
18. er Manual MSC MPWIOK2 Page 22 of 31 8 Appendix 8 1 Electrical Specification Von Supply Voltage Jo das X j 50 55 Y Vu cmos Input Low Voltage GND 03 03V V Vmcwos InputHigh Voltage 7 Vp Vpo 03 V Iw InputCurent VmzVpporGND O0 0 A Vou cos Output High Voltage Ion 4mA Vp 08 JV Von cmos Output Low Voltage loz 4mA 04 Y Toz 3 State Output Leakage Current Von Von or GND 10 f0 fya NOTE Junction temperature range 55 C to 125 C Table 8 1 DC Characteristics Vpp 5V Voo Supply Voltage bBo B3 36 Y Vu cmos InputLow Voltage GND 03 03V Y Vmcwos Input High Voltage 7 Vp Vpo 03 V Iw InputCurent VmzVpporGND 0 0 fpa Vou cos Output High Voltage Ion 4mA Vpg 08 W Vorcmos Output Low Voltage o 4mA 04 Y oz 3 State Output Leakage Current Von Von or GND 10 10 fpa NOTE Junction temperature range 55 C to 125 C Table 8 2 DC Characteristics 9 Vpp 3 3V V DC Supply Voltage 0 3t0 7 0 V Vw Input Pin Voltage 03toVpp 03 V 0 00 Tsma StorageTemperatue 65to 150 C _ Electrostatic Discharge 1000 V RzL5kOhm C IO0pF LeadTemperue 260 _ C T 10s NOTE Stresses a
19. gister is 8 bit Here the channel is enabled and disabled the MO gen eration can be suppressed and the MO accuracy and the division factor of the calibration clock divider are selected For detailed information on the individual register bits refer to Chapter 7 2 1 6 3 2 Result Registers The width of all result registers is 16 bit 6 3 2 1 CC Register The CC Register contains the Coarsecount CC For detailed information on the individual register bits refer to Chapter 7 2 2 6 3 2 2 FC Register The FC Register contains the Finecount FC For detailed information on the individual register bits refer to Chapter 7 2 3 6 3 2 3 M0 Register The MO Register contains the TDC specific characteristic quantity MO For detailed information on the individual register bits refer to Chapter 7 2 4 6 3 3 Status Register The width of the Status Register is 8 bit It reflects the present status of the MPW10K2 The Status Register contains three status flags which are described in detail in Chapter 6 4 2 and Chapter 112219 MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 16 of 31 6 4 Processor Interface Figure 6 3 shows the block diagram of the processor interface Via the processor interface the ac cess to the Control Register of the MPWIOK2 is performed as well as the access to the Status Register and the result registers J result registers ADR 4 0
20. iRest evi adesto mises A 28 0 5 2 S unpleshot Measurement Errors 2 2 resi spa det Eras pha redu d Rie yat pa Voted qt PROS Pa rote REO PE REM 20 ER Systemae EOL ETE OO OTT 30 MPWiOK RefManEnVlldoc Version ll Author AP tdcfamsc ge com WWW msc ge com MSC 1 Features Channels Typ resolution Typ measurement range Technology Voltage range Temperature range Calibration clock Calibration Processor interface Configuration Flash ALU Memory Package MPW10K2RefManEngV11 doc tdcfamsc ge com User Manual MSC MPW10K2 Page 4 of 31 TDC Core 10K2 implemented as hardmacro with one Start and one Stop input both inputs trigger on rising edges separated power supply for the core 45 ps 5V 60 ps 3 3V 5ns 10 us 5V 8 ns 13 us Q 3 3V 0 6u CMOS standard cell technology qualified for MIL 883 SV 10 55 C 125 C 2 1 N 5 5 V 40 C 85 C external oscillator clock 500 kHz 20 MHz programmable division factors 1 2 4 or 8 stand alone measurements of one and two periods of the divided calibration clock 8 bit data bus 5 bit address bus programmable via processor interface calculates the result of the measurement 48 bit result of one measurement CQFP44 with 0 8 mm pitch Version 1 1 Author AP WWW msc ge com MSC User Manual MSC MPWIOK2 Page 5 of 31 2 Block Diagram Figure 2 1 shows the block diagram of the MPWIOK2 L interface hese TDC Cor
21. iation Table 8 9 shows the maximum standard deviation max Std and the medium standard deviation m Std for measurements at the conditions below The values are averaged and derived from measurements on several chips Measurement period 150 600ns Increment 1 ns Sampling rate 50 time measurements per measuring point Calibration clock 4 MHz 1 calibration measurement CAL1 CAL2 measurement per time measurement Supply voltage 3 3V and 5V MO accuracy 16 fold Temperature approx 28 C Reference measurements Universal Time Interval Counter SR620 Stanford Research Systems with a standard deviation of max Std 46ps and m Std 32ps Std 5V Std 3 3V 5V ps max LSB ps m LSB m gt M pe max LSB ps m LSB 40 39 10 24 06 52 45 09 26 05 Table 8 9 Standard Deviation Figure 8 3 Standard Deviation at 5V shows exemplarily a MPW10K2 s standard deviation at 5V Standard deviation 50x per Meas Point incl Cal Increment 1ns Cal Clock 4MHz 5V 28 C M0 16 Time ns Figure 8 3 Standard Deviation at 5V MPWIOK2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 29 of 31 8 8 3 Singleshot Measurement Errors Table 8 10 shows the time based singleshot measurement errors c ps and the resolution based errors o LSB All errors are averaged values derived from measuremen
22. ie o L Figure 3 1 Package Table 3 1 Package Dimensions mm MPW10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 7 of 31 3 2 Pin Configuration Table 3 2 shows the MPW10K2 s pin configuration Pin names of low active signals end with N PinNo Pinname lO Function 5 7 35 VDDI Power supply for internal logic o 2 6 12 GND_I Ground for internal logic 36 38 28 39 VDD_R_ Power supply for Inputs O Z O Z 27 40 GNDR Ground for Inputs O 0 10 17 VDDO Powersupply for Outputs O Z S o 11 18 GNDO J GromndforOupus 0 42 44 VDD_C_ ___ Power supply for measuring core TDC Core 10K2 37 43 GNDC Groundformeasuringcore TDC Core 10K2 33 READY Out 4mA When READY O0 gt 1 the measurement has finished After 10ns SV 25 C the measurement results are accessible via the result registers at the latest 4 89 34 NC Notconnected O Remarks e All inputs are CMOS e Data bus DATA 7 0 is not allowed to float please pull up or down with e g 10k e Do not connect unused outputs Table 3 2 Pin Function List MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 8 of 31 4 Measuring procedure The MPW10K2 provides the measuring core TDC Core 10K2 with a typical res
23. ime difference tyAr is calculated using the clock period time tcar of the divided calibration clock CALCLK I the measurement value VAL and the calibration values CAL1 and CAL2 in accordance with the TDC characteristic see Figure 4 2 as follows VAL Offset 2 t tt VAL 1 CALI 3 Offset 2 CALI CAL2 MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 12 of 31 5 General Measurement Cycle Figure 5 1 shows the flowchart of a general measurement cycle At the beginning of a measurement cycle the MO generation the MO accuracy and the division factor of the calibration clock divider have to be specified within the Control Register During this time the channel has to be disabled When the channel is enabled the MPW10K2 is ready for time measurement and waits for a start signal on the start input START After start the MPW10K2 waits for a stop signal on the stop input STOP The end of a measurement is indicated via pin READY and within the Status Register as well After readout the result registers the channel has to be disabled For another time measurement the channel has to be enabled again Starting point Control Register configuration channel has to be disabled Enable the channel by setting the Control Register s bit Oto 1 Time measurement Read out the result registers Dis able the channel optiona
24. l Start of CALI measurement by setting the Control Register s bit 4 to 1 Read out the result registers then res et bit 4 to 0 Start of CAL2 measurement by setting the Control Register s bit 5 to 1 Read out the result registers then reset bit 5 to 0 TIME MEASUREMENT CALIBRATION MEASUREMENT Figure 5 1 General Measurement Cycle Flow A calibration measurement has to be performed while the channel is disabled Setting bit 4 of the Control Register to 1 starts the CALI measurement The end of the measurement is indicated via pin READY and within the Status Register After readout the result registers bit 4 has to be reset to 0 Then the CAL2 measurement is executed in the same way setting and resetting the Control Register s bit 5 MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 13 of 31 6 Functional Description 6 1 Calibration Clock Divider Figure 6 1 shows the principle function of the calibration clock divider CALCLK Divider CALCLK I 1 2 14 1 8 Figure 6 1 Calibration Clock Divider The external calibration clock CALCLK is divided by the MPW10K2 s calibration clock divider The division factors are programmable and can be 1 2 4 or 8 It is necessary to ensure that the clock period of the divided calibration clock is not larger than Sus 5V typ otherwise
25. olution of 45ps at SV and 25 C The core is realised as hardmacro As shown in Figure 4 1 one rising edge sensitive start input and one rising edge sensitive stop input are available for measuring the time differences tyar The time measurement in the measuring core is started by a start on the start input and ended by a stop on the stop input The internal ALU calculates the measurement result consisting of CC Coarsecount FC Finecount and MO TDC specific characteristic quantity which is stored into the result registers CC FC and MO are required for external calculation of the measurement value VAL MPWIOK2 measuring result 10K2 ALU registers START rae Calculation CC FC MO of measuremen value tvAL Figure 4 1 Time Difference Measurement The measurement value VAL is dependent on the temperature and the supply voltage It therefore has to be weighted according to the TDC characteristic measurement straight Figure 4 2 Offset and grade of the characteristic have to be determined by a so called calibration measurement This can be executed immediately after every time measurement MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 9 of 31 Measurement value A Call value measurement value Cal2 value CAL2 4 VAL ec cien Cyr CAL1 yao OFFSET gt t cAL1 tvaL cAL2 Figure 4 2 Characteristi
26. rmat 7 2 2 CC Register CC REG 15 11 10 0 Bit Default reserved Coarsecount CC 10 0 Occ to 2047 bec Data format UNSIGNED INTEGER Figure 7 2 CC Register CC_REG Format 7 2 3 FC Register FC_REG 15 9 8 0 Bit Default reserved Finecount FC 8 0 Occ to SI liec Data format UNSIGNED INTEGER Figure 7 3 FC Register FC_REG Format MPW10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com www msc ge com MSC User Manual MSC MPWIOK2 Page 21 of 31 7 2 4 MO Register M0 REG 15 14 13 0 Bit 0 xewwwe 0 Defaul reserved TDC specific characteristic quantity MO 13 0 04 to 16383 Data format UNSIGNED INTEGER Figure 7 4 MO Register MO REG Format 7 2 5 Status Register STATUS REG 7 5 4 3 2 1 0 Bit 2 10 0 0 20 90 JDefaul READY 0 Result registers no valid data reserved 1 Measurement has finished After 10ns 5V 25 C the measurement results are acces Overflow ALU sible via the result registers at the latest 0 ALU ok 1 Overflow reserved Overtlow measuring core reserved 0 Measuring core ok 1 Overflow Overflow is cleared e on power on reset e onreset the Control Register s bitO when time measurement e onreset the Control Register s bit4 resp bit5 when calibration measurement Figure 7 5 Status Register STATUS REG Format MPW 10K2RefManEngV11 doc Version 1 1 Author AP tdcfamsc ge com WWW msc ge com MSC Us
27. thor AP tdcfamsc ge com WWW msc ge com MSC User Manual MSC MPWIOK2 Page 26 of 31 8 5 Minimum and maximum Measurement Period Table 8 7 shows the minimum and the maximum measurement period of the MPWIOK2 depending on voltage temperature and process Unit Pe ee ee a tvarmin 3 5 5 8 10 I5 n tvamx 6 7 10 13 20 33 ys D Vpp 5V 1096 Ta 40 to 85 C D Vpp 3 3V 1096 TA 40 to 85 C Table 8 7 Minimum and maximum Measurement Period 8 6 Power On Characteristics The minimum pulse width of a low active power on reset pulse connected to pin RSTN is 100us Figure 8 1 shows a possible reset circuit RC circuit After power on reset the MPW10K2 is in the default state and has to be configured as shown in the general measurement cycle flow of Chapter 5 VDD Chip R Ik RSTN C 100nF T GND Figure 8 1 Reset Circuit 8 7 Current Consumption TDC Core 10K2 e 5V 25 C typ process During a measurement between start and stop event the current consumption of the meas urement core is approx 6 6mA After stop the current consumption is approx 19 2mA for a duration of 1 8 A tmo see Chapter 8 3 e 3 3V 25 C typ process During a measurement between start and stop event the current consumption of the meas urement core is approx 2 6mA After stop the current consumption is approx 8 3mA for a duration of 1 8 A tmo see Chapter 8 3 M
28. ts on several chips at the conditions given below In a normal distribution the so called one sigma area o contains about 68 3 of the measurement results About 95 5 will fall within the two sigma area 20 Measurement period 200 500ns Increment Ins Sampling rate One time measurement per measuring point Calibration clock 2 4 MHz 1 calibration measurement CALI CAL2 measurement per time measurement Supply voltage 3 3V and 5V MoO accuracy 16 fold Temperature approx 28 C Reference measurements Universal Time Interval Counter SR620 RES ps 5V ps o 5V_ LSB RES ps 9 33V ps o 9 33V LSB Table 8 10 Singleshot Measurement Errors Figure 8 4 shows exemplarily the measurement errors of singleshot measurements at 5V The offset of the diagram is approx 250ps This systematic error results from a different length of cables for start and stop and is irrelevant here Singleshot from 200ns to 500ns Increment 1ns Cal Clock 4MHz 5V 28 C M0z16 0 5 Error 9 ns 0 35 0 ALLE aa u balb 1L Haba LH s Da UA DL GUMPERT CTA IL TN LEUTE MCA LIPPE CUT FERRE d LO ODLIETIEHITLS S ptg M 0 15 i MM ILI LILILI LLLIIIT j 0 o oN o O o A O Oo O t N O O O TF oOo o O t N O O O TF QN O cO Ay O oco O FT ANO 0 O oOo Oo ANA QO st st O O N O O Q OQO CQ cO st O O OMN OO O O CO QN c0 s cs O OO Fr 0 0 OD CU CN CN QN
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