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User Manual for the Mother Boards: 886LCD-M/Flex 886LCD

1. LVDS Interface Ref LVDS Real Time 25 MHz Clock 32 768 Ref Qill South Bridge Ref ICHS_ ETHERNET controllers Ref ETH KBCLK MSE KBD Super I O e Ref LPCIO 51048 KBD MSE Clock buffer CLK 485 Ref CLKGEN48M CLK_ICH48 97 97 Ref Codec DVS 50580 V1 0 C Kontron 2861 0 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 21 of 80 4 Connector Definitions The following sections provide pin definitions and detailed description of all on board connectors The connector definitions follow the following notation Description Shows the pin numbers in the connector The graphical layout of the connector definition tables is made similar to the physical connectors The mnemonic name of the signal at the current pin The notation XX states that the signal XX is active low Al Analog Input Analog Output Input TTL compatible if nothing else stated Input Output TTL compatible if nothing else stated Bi directional tristate pin Schmitt trigger input TTL compatible Input open collector Output TTL compatible Pin not connected Output TTL compatible Output open collector or open drain TTL compatible Output with
2. pseoquo pesn V eles pesn eq GLOUI 8OUI 10 p sn jdnueju 0 MHOHOO pue s0113 uejs s IRQ4 IRQ5 IRQ6 Notes 1 Availability of the shaded IRQs depends on the setting in the BIOS According to the PCI Standard PCI Interrupts IRQA IRQD can be shared These interrupt lines are managed by the PnP handler and are subject to change during system initialisation 2 IRQ16 to IRQ26 are APIC interrupts 3 DVS 50580 V1 0 Kontron 8861 0 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 54 of 80 6 4 Map Address hex Description Programmable interrupt controller System Timer Standard keyboard System speaker System CMOS Real time clock Secondary Parallel ATA IDE Channel Primary Parallel ATA IDE Channel Comport 4 Comport 2 Printer Port 855GME VGA Controller 855GME VGA Controller Comport 3 Comport 1 PCI Bus Realtek 8169 Ethernet Controller PCI standard PCI to PCI brigde Realtek 8169 Ethernet Controller Realtek 8169 Ethernet Controller Standard Universal PCI to USB Host Controller Standard Universal PCI to USB Host Controller PCI System Management
3. TEUER 48 4 17 2 Signal Description Slot 49 4 17 3 886LCD M PCI IRQ amp INT 0 1 2 2 1 2000000016 1 60 nennen nnne nennen 50 5 ONBOARD CONNECTORS U U u u u u u u u 51 6 SYSTEM RESSOURCES 2 2 2 2 22 52 61 Memory ANULO 52 6 2 eiu AARAA 52 6 3 52 64 54 65 Usage nes innuna eaaa aa aaa aaaea aea 54 7 OVERVIEW BIOS 5 55 7 1 System Management BIOS SMBIOS 55 7 2 Legacy USB SUppOTtL 55 8 BIOS CONFIGURATION SETUP 56 84 mec 56 82 22 56 KEMEL OLEUM m
4. TIP Line out Left RING Line out Right SLEEVE GND TIP RING SLEEVE Note 1 Signals are shorted to GND internally in the connector when jack plug not inserted Note 2 Microphone is not supported on Engineering board samples 4 11 2 CD ROM Audio input CDROM CD ROM audio input may be connected to this connector It may also be used as a secondary line in signal Type loh lol Pull U D CD Left 2 a 3 CDGND ___5 I Right Signa Description 000 0 CD Left Left and right CD audio input lines or secondary Line in CD Right CD GND Analogue GND for Left and Right CD This analogue GND is not shorted to the general digital GND on the board DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 44 of 80 4 11 3 AUDIO Header AUDIO_HEAD Pull loh loh Pull Note p itor Te Pin AMP LFE OUT AMP CEN OUT AAGND 3 AAGND SPKR OUT 15 6 SPKR OUT R SURR OUT L_ 19 10 SURR OUT R F FRONT MIC1 F FRONT MIC2 AAGND F AUX IN L F AUX IN R F MONO OUT AAGND GND F SPDIF IN F SPDIF OUT GND Suma noe OUT Front Speak
5. Boot Boot Settings Configure Settings during System Boot Quick Boot Enabled Quiet Boot Disabled Bootup Num Lock On PS 2 Mouse Support Auto lt Select Screen Halt on A11 But Keyboard Select Item Hit DEL Message Display Enab ed Enter Go to Sub Screen Interrupt 19 Capture Disabled 1 10 Save Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Quick Boot Enabled Allows BIOS to skip certain test while booting Disabled Quiet Boot Disabled Shows boot logo instead of POST screen Enabled Enabled amp Maintain Bootup Num Lock Off On Select Power on state for numlock PS 2 Mouse Support Disabled Select support for PS 2 Mouse Enabled Auto Halt on Disabled Wait for F1 key to be pressed if error If no But Keyboard keyboard present post will continue Hit DEL Message Display Disabled Display the message or not Enabled Interrupt 19 Capture Disabled Allows option ROMs to trap interrupt 19 Enabled DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 72 of 80 List of errors Feature lt INS gt Pressed Timer Error Interrupt Controller 1 error Keyboard Interface Error Primary Master Hard Disk Error S M A R T HDD Error Cache Memory Error DMA Controller Error Resource C
6. 10 D pii D pA __ TB DA lO DAO 5 _ __ 1 2 22 cno PWR O Iowa TB RA GND 1 EN packs p 8K2 HDIRQA Eom Da DA DA2 E HDCSAOR HDCSA1 0 TBD 1 HDACTA CND 4 5 2 Hard Disk Connector IDE S This connector can be used for connection of up till two secondary IDE drive s but only if no drive s is installed via IDE S2 socket The IDE S is not available on the 886L CD M mITX Pull 2 pwr 087 104 O TBD DB 5 64 10 DB 47 84 O TBD 210 100 0 TBD D DB2 052 DB13 EUN DB DB14 080 5815 KEY ____ ppm 2112 GND O GND F GND O DDACKB GND jr HDIRQB DABI CELICE DABO DAB2 TBD O HDCSBOR HDCSBf O TBD 1 HDACTB GND DVS 50580 1 0 Kontron 386 Family always a Jump ahead
7. AUDIO_HEAD Molex 87831 2620 Molex 51110 2651 Kontron KT 821043 cable kit FRONTPNL Foxconn HL20121 Molex 90635 1243 Kontron KT 821042 cable kit FEATURE Molex 87831 3020 Molex 51110 3051 Kontron KT 821041 cable kit IDE_P Foxconn HL20201 UD2 Kontron KT 821018 cable kit IDE_S IDE_S2 Foxconn HS5522V AMP 2 111623 5 Kontron KT 821010 cable kit Don Connex C44 40CAT A Don Connex A32 40 C G B 1 Kontron KT 821018 cable kit Kontron KT 821155 cable kit DVS 50580 1 0 C Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 52 of 80 6 System Ressources 6 1 Memory map Address range hex Size Description 00000000 0007FFFF 512 Kbytes Conventional memory 00080000 0009FBFF 127 Kbyte Extended conventional memory 0009FCO00 0009FFFF 1 Kbyte Extended BIOS data 000A0000 000AFFFF 64 Kbytes 885GME Controller Video memory and BIOS 000B0000 OOOBFFFF 64 Kbytes 885GME VGA Controller Video memory and BIOS 000C0000 000CC5FF 49 Kbytes 885GME VGA Controller Video memory and BIOS 000CC800 000CD7FF 4 Kbytes Realtek 8169 Ethernet Controller D0000000 DFFFFFFF OxFFFFFFF 885GME Processor Controller E8000000 EFFFFFFF Ox7FFFFFF 885GME Controller F0000000 F7FFFFFF Ox7FFFFFF 885GME Controller FF7FF400 FF7FFAFF OxFF Realtek 8169 Ethernet Contr
8. ener 39 49 Ethernet conneclots UI roter toe teretes 40 4 9 1 Ethernet connector 1 ETHER1 U nennen 40 4 9 2 Ethernet connector 2 3 21 3 U I n eene nennen nnne 41 4 10 USB Connector USB II noia Cuna 42 4 10 1 USB Connector 0 2 08 0 2 44222 2 1 152 0 nennen rre nennen nnns 42 4 11 222 2 43 4 11 1 Audio Line in Line out and 43 4 11 2 CD ROM Audio input un kia aada 43 4 11 3 AUDIO Header AUDIO HEAD itr tn La eda e Led 44 4 12 Fan connectors FAN PROC and FAN nunne mnane nnana 45 4 13 The Clear CMOS Jumper Clr CMOS U J 45 4 14 LPC connector unsupported J 45 4 15 Front Panel connector FRONTPNILLL J u u u 46 4 16 Intruder Connector INT ioo reu eau taco AAR na eH cun nan 46 4 17 Feature Connector 4 u 47 4 171
9. 17 3 6 1 Testsystem configuration screeni 17 3 6 2 Measured Power Consumption Net 17 3 6 3 Power Consumption u u nana saa naa aan 18 3 6 4 Minimum recommended power supply 18 3 6 5 Recommended Power Supply specifications 18 3 7 886LCD M Clock Distribution u uu u u u u 19 4 CONNECTOR 21 44 a Q iu ai uu 22 4 1 1 886 1 22 4 1 2 BBGLCD M ATX RR 23 4 1 3 8861 24 42 Power Connector ATXPWR u u u u u T 25 43 Keyboard and 5 2 mouse connectors l u u u u u T T 26 4 3 1 Stacked MINI DIN keyboard and mouse Connector MSE amp 26 4 32 k
10. 05 Signal Description LVDS Flat Panel Connector Signal Description LVDS 0 LVDS A Channel data LVDS ACLK LVDS A Channel clock LVDS BO B3 LVDS B Channel data LVDS BCLK LVDS B Channel clock BKLTCTL Backlight control 1 PWM signal to implement voltage in the range 0 3 3V BKLTEN Backlight Enable signal active low 2 VDD ENABLE Output Display Enable LCDVCC VCC supply to the flat panel This supply includes power on off sequencing The flat panel supply may be either 5V DC or 3 3V DC depending on the CMOS configuration Maximum load is 1A at both voltages DDC CLK DDC Channel Clock DDC DATA DDC Channel Data Note 1 Windows API version Hwmon_KTAPI ver 4 5 or newer is available to operate the BKLTCTL signal Some Inverters has a limited voltage range 0 2 5V for this signal If voltage is gt 2 5V the Inverter might latch up Some Inverters generates noise to the BKLTCTL signal and this noise can make the Ivds transmision fail resulting in corrupted picture on the display By adding 1K Ohm resistor in series with this signal and mounted in the Inverter end of the cable kit the noise is limited and picture is stabil Note 2 If the Backlight Enable is required to be active high then make the BIOS Chipset setting Backlight Signal Inversion Enabled DVS 50580 V1 0 Kontron 886 Family always Jump ahead 00474 1 Public Use
11. DVS 50580 V1 0 C Kontron 58861 Family always a Jump ahead KTD 00474 Public User Manual Date 2006 06 02 Page 9 of 80 2 2 Requirement according to EN60950 Users of 886LCD boards should take care when designing chassis interface connectors in order to fulfill the EN60950 standard When an interface connector has a VCC or other power pin which is directly connected to a power plane like the VCC plane To protect the external power lines of peripheral devices the customer has to take care about e That the wires have the right diameter to withstand the maximum available power e That the enclosure of the peripheral device fulfils the fire protecting requirements of IEC EN 60950 Lithium Battery precautions CAUTION Danger of explosion if battery is incorrectly replaced Replace only with same or equivalent type recommended by manufacturer Dispose of used batteries according to the manufacturer s instructions ADVARSEL Lithiumbatteri Eksplosionsfare ved fejlagtig handtering Udskiftning ma kun ske med batteri af samme fabrikat og type Lev r det brugte batteri tilbage til leverand ren VARNING Explosionsfara vid felaktigt batteribyte Anv nd samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren Kassera anv nt batteri enligt fabrikantens instruktion DVS 50580 V1 0 VORSICHT Explosionsgefahr bei unsachgem em Austausch der Batterie Ersa
12. 4 17 3 886LCD M PCI IRQ amp INT routing Board type 886LCD M mITX 886LCD M FLEX 886LCD M ATX DVS 50580 V1 0 INTA INT INT INTB INT INT INTC INT PIRO4G INT PIRO4G INTD INT INT INT INT INT PIRQZH INT INT_PIRQ G INT INT INT INT PIRO4G INT INT INT INT INT PIRQZH INT INT INT INT INT INT PIRQZH INT INT INT PIRQZG INT_PIRQ D INT INT PIROZA INT INT INT PIROZA INT PIROZD C Kontron 2861 0 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 51 of 80 5 Onboard Connectors Connector Onboard Connectors Mating Connectors SYS 22 23 2031 1375820 3 FAN PROC INT KBDMSE Molex 22 23 2061 Molex 22 01 2065 CDROM Foxconn HF1104E Molex 50 57 9404 Molex 70543 0038 SATAO Molex 67491 0020 Molex 67489 8005 SATA1 Kontron KT 821035 cable kit ATXPWR FoxConn HM2510E Molex 39 01 2205 Foxconn HL20051 Molex 90635 1103 Kontron KT 821017 cable kit
13. 8 3 2 Advanced settings IDE Configuration Advanced IDE Configuration Select IDE Mode IDE Configuration P ATA Only S ATA Running Enhanced Yes poA oniy P ATA Channel Selection Both S ATA Ports Definition P0 3 2 P1 4th I Configure S ATA as RAID No SZATA OnLy 2 5 Primary IDE Master Hard Disk 2 Primary IDE Slave Not Detected S SRTA Secondary IDE Master ot Detected STATA Secondary IDE Slave Not Detected Third IDE Master Not Detected Third IDE Slave ot Detected Fourth IDE Master Not Detected Fourth IDE Slave Not Detected pus BEEESH Select Item ATA PI 80Pin Cable Detection Host amp Device 2 cnange operon P ATA1 Cable Detection force Disabled E Holp Hard Disk Write Protect Disabled ESC Exit IDE Detect Time Out Sec V02 58 C Copyright 1985 2005 American Megatrends Inc P ATA2 Cable Detection force Disabled F10 Save and Exit Feature Options Description IDE Configuration Disable Setup the configuration of the hard drive P ATA Only interfaces S ATA Only P ATA amp S ATA When P ATA amp S ATA mode is selected Feature Options Description Combined Mode Option P ATA 1st Channel Setup the configuration of the hard drive S ATA 1st Channel interfaces S ATA Ports Definition P0 Master P1 Slav
14. Select Screen PS 2 Kbd Mouse 54 55 Wake Disabled Select Item 53 55 Keyboard Hotkey Any key Change Option Fl General Help AC Power Loss Restart Off F10 Save and Exit SC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Power Management APM Options Disabled Enabled On Off Suspend Power Button Mode Description Setup the SMI APM support Select Power button functionality USB Controller Resume Disabled Enabled Lets the USB devices wake up from sleep state PME WOL Disabled Enabled Allow PME WOL to wake from sleep states RI Resume Disabled Enabled Allow RI Modem to wake from sleep states RTC Resume Enabled Disabled Let the board start up on a specific date and time RTC Alarm Date Every Day 1 31 Setup the date you want the board to start RTC Alarm Time HH MM SS Setup the time you want the board to start PS 2 Kbd Mouse 54 55 Wake Disabled Enabled When disabled the board can wake from S1 and 53 and when enabled it can also wake from S4 and S5 53 55 Keyboard Hotkey Any key Space Enter Sleep button Setup the key that can wake up the board AC Power Loss Restart Off On Previous State DVS 50580 V1 0 Select whether or not to restart the system after AC power loss Off keeps the power off until the power button is pressed On restores power to the computer Previous State restores the previou
15. April 1 2003 Product Category Information Technology Equipment Including Electrical Business Equipment Product Category CCN NWGQ2 NWGQ8 File number E194252 Theoretical MTBF 199 799hours 22 8years Calculation based on Telcordia SR 332 method Restriction of Hazardeous Substances RoHS All boards in the 886LCD M family is planned for ROHS compliance Capacitor utilization No Tantal capacitors on board Only Japanese brand Aluminium capacitors rated for 100degrees Celsius used on board Battery Exchangeable 3 0V Lithium battery for onboard Real Time Clock and CMOS RAM Manufacturer Toshiba Part number CR2032 Approximate 5 years retention CAUTION Danger of explosion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 13 of 80 3 2 Processor support table The 886LCD M mITX Flex and ATX are designed to support the following PGA 478 pins processors Intel Pentium M Processor Dothan 90 nm process FSB 400MHz with 2 MB L2 cache Intel Pentium M Processor Banias 130 nm process FSB 400MHz with 1 MB L2 cache Intel amp Celeron amp M Processor Dothan 90 nm process FSB 400MHz with 1 MB L2 cache Intel amp Celeron amp M Processor B
16. GND ss s OC GND GND eee Ov sv 3V3 Note 5V supply is not used onboard The requirements to the supply voltages are as follows also refer to ATX specification version 2 03 mn Mac Control signal description Signal Description Active high signal from the power supply indicating that the 5V and 3V3 supplies are within operating limits It is strongly recommended to use an ATX supply with the 886LCD M Flex 886LCD M ATX 886LCD M mlTX boards in order to implement the supervision of the 5V and 3V3 supplies These supplies are not supervised onboard the 886LCD M Flex 886LCD 886LCD M mITX boards PS Active low open drain signal from the board to the power supply to turn on the power supply outputs Signal must be pulled high by the power supply DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 26 of 80 4 3 Keyboard and PS 2 mouse connectors Attachment of a keyboard or PS 2 mouse adapter can be done through the stacked PS 2 mouse and keyboard connector MSE amp KBD Both interfaces utilize open drain signaling with on board pull up The PS 2 mouse and keyboard is supplied from 5V_STB when in standby mode in order to enable keyboard or mouse ac
17. IRRX IR Receive input IrDA 1 0 SIR up to 1 152K bps IRTX IR Transmit output IrDA 1 0 SIR up to 1 152K bps SMBC SMBus Clock signal SMBD SMBus Data signal DVS 50580 V1 0 G Kontron 8s6LCD M Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 48 of 80 4 171 PCI Slot Connector Terminal Note Type Signal 5 C Signal Type Note v ___ TRst me PWMR GND 0 n MIS PWMR sv _ _ j F9 co Oo j 1 RE3 PWR _ j ONTA o j GND GND GONG oo PWR GND nov O j Ck PWR GND GNO 07 REO GND PR vio I j _ ADO 1017 AD9 35v PWR GND AD o X 17 AD26 o 145 GND 3 37 f 0 oo j _ V _ GND __ 22 o p 0 0 j ADi8 ot 07 PWR PWR GND FRAME
18. SATA1 FRONTPNL 5 5 5 AGP DVO c INT ATXPWR 2 Dy INT Fy Y FEATURE gt CDROM lt DDR1 DDRO COM3 SIO Port1 SIO Port2 FAN PROC ETHER1 USBO USB2 DVS 50580 V1 0 Kontron 886 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 24 of 80 4 1 3 886LCD M mITX CF backside of 886L CD M mITX FRONTPNL LvDS FEATURE DE 52 SATAO RIECMOS LAN Sve IDE_P SATA1 DDRO ATXPWR E 2 COM3 Ge SIO Port1 SIO Port2 5 1 COM2 Port2 4 ENE a f ETHER1 mem USBO FAN PROC Ts Port1 PRINTER FLOPPY DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 25 of 80 4 2 Power Connector ATXPWR 886LCD M Flex 886LCD M ATX 886LCD M mITX is designed to be supplied from a standard ATX power supply Power Connector 886LCD M Flex 886LCD M ATX 886LCD M mITX Pull PIN Pull Note U D loh lol Type Signal Signal Type loh lol U D Note SESV o 191 S Bras SE Be 8 18 5v a GND a a 6 160 GND
19. Select Item t change option F1 General Help 10 Save Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc 8 3 8 Advanced settings ACPI Configuration Advanced ACPI Settings Enable Hardware Health Monitoring Device ACPI Aware O S Yes General ACPI Configuration Advanced ACPI Configuration lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description ____ _69 __ _ 5 Select if your O S supports ACPI No DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 65 of 80 8 3 9 Advanced settings General ACPI Configuration Advanced General ACPI Configuration Select the ACPI state used for System Suspend mode 51 amp 53 STR Suspend Repost Video on S3 Resume No S4BIOS Support Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Suspend mode 1 POS only Select the ACPI state used for System Suspend 51853 STR Repost Video on S3 No Determines whether to invoke VGA BIOS post on Resume Yes SS STR r
20. 5 4 5 SATAORX 6 SATAORX The signals used for the primary Serial harddisk interface are the following Signal Description SATAO Host transmitter differential signal pair RX SATAO Hostreceiver differential signal pair SATAO TX All of the above signals are compliant to 4 SATA1 Pull 2 5 1 S p sare SEES 4 5 SATA1 RX 11 6 LI GND The signals used for the secondary Serial ATA harddisk interface are the following Signal Description SATA1 Host transmitter differential signal pair SATA1 RX SATA1 Host receiver differential signal pair SATA1 TX All of the above signals are compliant to 4 DVS 50580 V1 0 G Kontron 886LCD M Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 38 of 80 4 7 Printer Port Connector PRINTER The printer port connector is provided in a standard DB25 pinout The signal definition in standard printer port mode is as follows Pull Pull U D loh lol Type Type loh lol U D 2 2 oc Fig _ aro 24124 2 2 The interpretation of the signals standard Centronics mode S
21. 55 55545 45 4 12 5 0 4 73 8 7 Chipset IE 74 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration 74 8 7 2 Advanced Chipset Settings SouthBridge 75 8 8 _ ePD 76 89 GEI C 77 8 10 AMI BIOS Beep Codes 78 9 OS SETUP uu SS Su S SS Sua 79 10 OE UE 80 DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 7 of 80 1 Introduction This manual describes the 886L CD M Flex 886LCD M ATX 886LCD M mITX boards made KONTRON Technology A S The boards will also be denoted 886LCD family if no differentiation is required All boards are to be used with the Intel Pentium M amp Intel Celeron M Processors Use of this manual implies a basic knowledge of PC AT hard and software This manual is focused on describing the 886 Board s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in chapter 3 before switching on the power All configuration and setup of the CPU board is either done automatically or by the user in the CMOS setup menus Except for the CMOS Clear jumper no jumper configurat
22. ADD ID 7 0 Description Pipelined Read This signal is asserted by the AGP master to indicate a full width address is to be enqueued on by the target using the AD bus One address is placed in the AGP request queue on each rising clock edge while PIPE is asserted When PIPE is deasserted no new requests are queued across the AD bus During SBA Operation This signal is not used if SBA Side Band Addressing is selected During FRAME Operation This signal is not used during AGP FRAME operation PIPE is a sustained tri state signal from masters graphics controller and is an input to the GMCH Side band Address These signals are used by the AGP master graphics controller to pass address and command to the GMCH The SBA bus and AD bus operate independently That is transactions can proceed on the SBA bus and the AD bus simultaneously During PIPE Operation These signals are not used during PIPE operation During FRAME Operation These signals not used during FRAME operation NOTE When sideband addressing is disabled these signals are isolated no external internal pull ups are required Flow control RBF Read Buffer Full Read buffer full indicates if the master is ready to accept previously requested low priority read data When RBF is asserted the GMCH is not allowed to initiate the return low priority read data That is the GMCH can finish returning the data for the request currently being s
23. Address Command Bus Maximum load is 1A or 2A per pin if using IDC connectorfladkabel or crimp terminals respectively HD_LED Hard Disk Activity LED SUS_LED Suspend Mode LED PWRBTN_IN Power Button In Toggle this signal low to start the ATX PSU and boot the board RSTIN Reset Input Pull low to reset the board SPKR OUT L Speaker Out Left channel amplified 3W SPKR OUT R Speaker Out Right channel amplified 3W SB3V3 Standby 3 3V voltage AGND Analogue Ground for Audio 5V 4 16 Intruder Connector INT This connector is available on the 886LCD M Flex only however please notice that the INTRUDER function is also available on the Feature connector Pull Type loh lol U D GND gt m GND INTRUDER detect be used to detect if the system case has been opened This signal s status is readable so it may be used like a when the Intruder switch is not needed DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 47 of 80 4 17 Feature Connector FEATURE L INTRUDER EXT_ISAIRQ EXT SM I PWROK 5 6 7 8 9 10 __ FAN3N VREF IRRX SMBD Note 1 Pull up to 3V3 supply Note 2 Pull up to RTC Voltage Signal Description INTRUDER INTRUDER may be used to de
24. Bus Realtek AC97 Audio Realtek AC97 Audio 855GME VGA Controller Primary Serial ATA IDE Channel Secondary Serial ATA IDE Channel N 5 6 5 Channel Usage Channel Number Data Width System Ressources 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits Available 8 or 16 bits DMA Controller 16 bits Available 16 bits Available 16 bits Available DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 55 of 80 7 Overview of BIOS features This Manual section details specific BIOS features for the 886LCD M boards The 886LCD M boards are based on the AMI BIOS core version 8 10 with Kontron BIOS extensions 7 1 System Management BIOS SMBIOS SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the Management Information Format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this info
25. Ca Kontron 386 0 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 1 of 80 User Manual for the Mother Boards 886LCD M ATX DVS 50580 V1 0 C Kontron 2861 0 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 2 of 80 Document revision history Updated the Processor Support Table IDE connector table unge 2008 pull up down resistors corrected Chapter 8 7 2 Double information removed May 9 2006 Removed SW Watchdog currently not supported by BIOS Added Video Memory size Feature Connector info Connector List updated COM port position on 886L CD M mITX corrected Pictures in chapter 4 1 are updated UDMA133 support removed Audio Bracket connector Line In and MIC position exchanged Audio Connector added info COMB and COMD position exchanged and COM ports renamed Connector List updated BIOS Configuration updated Minor corrections additions May 24 2005 PJA MLA Major revision BIOS information added Dec 20 2004 PJA 886LCD M ATX information added Dec 13 2004 PJA 886LCD M mITX information added Sept 27 2004 Many correction and added information but still preliminary June 14 2004 First preliminary manual version March 19 2006 March 3 2006 Copyright Notice Copyright 2006 KONTRON Technology A S ALL RIGHTS RESERVED No part of this document may be repr
26. Hard Disk Security lt Select Screen Select Item Primary Master HDD User Password Enter Go to Sub Screen Primary Slave HDD User Password F1 General Help Secondary Slave HDD User Password F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Change Supervisor Password Password Change the Supervisor Password Change User Password Password Change the User Password Clear User Password Ok Clears the User Password Cancel Boot Sector Virus Protection Enabled Will write protect the MBR when the BIOS is Disabled used to access the harddrive HDD Password Password Locks the HDD with a password the user needs to type the password on power on DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 74 of 80 8 7 Chipset Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Advanced Chipset Settings Intel Montara GML NorthBridge chipset configuration options Warning Setting wrong values in below sections may cause system to malfunction gt Intel Montara GML NorthBridge Configuration gt SouthBridge Configuration Boot Type CRT LFP Backlight Signal Inversion Disabled LCDVCC Voltage SV lt Select Screen EDID Support Enabled Select Item LVDS LM201U03 Enter Go to Sub Screen DVO N A F1 General Help F10 Save and E
27. Hardware Harddisks CD rom LCD Panels etc DVS 50580 V1 0 Kontron 386 Family always Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 4 of 80 Table of contents 1 INTRODUCTION m 7 2 INSTALLATION 25 25222 en ndun caue duis 8 2 the Doard u u 8 2 2 Requirement according to EN60950 U uuu uuu u u T 9 3 SYSTEM 5 10 31 Component 5 2 2 5 2 55444452 5 4 2541254255 uW 10 3 2 Processor Support table uere n 13 33 System Memory suppor l u u J J J J J J J J J J 13 3 4 Syst m OVERVIGW 14 3 5 886LCD M Power Distribution 4 Power State Map 15 EI NE CONSUMPTION
28. NOTE you cannot enable the floppy controller and parallel port at the same time Parallel Port Mode Normal Bi Directional EPP ECP Select the mode that the parallel port will operate in EPP Version ECP Mode DMA Channel 1 9 1 7 DMAO DMA3 Setup with version of EPP you want to run on the parallel port Select a DMA channel Parallel Port IRQ ICH SIO Serial Port1 Address ICH SIO Serial Port2 Address DVS 50580 V1 0 IRQS IRQ7 Disabled 3E8 IRQ6 10 2E8 IRQ11 Disabled 3E8 IRQ6 10 2E8 IRQ11 Select a IRQ Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 63 of 80 8 3 6 Advanced settings Hardware Health Configuration Advanced Hardware Health Event Monitoring Disable Full Speed System Temperatur 37 C 98 F Thermal Does regulate CPU Temperature 439 1099 fan speed according to External Temperature Sensor N A specified temperatur Fanl Speed Fail Speed Does regulat Fan Cruise Control Disabled according to specified Fan2 Speed 2537 RPM RTM Fan Cruise Control Thermal Fan Setting 45 C 113
29. at 33 MHz RST Reset is used to bring PCl specific registers sequencers and signals to a consistent state What effect RST has on a device beyond the PCI sequencer is beyond the scope of this specification except for reset states of required PCI configuration registers Anytime RST is asserted all PCI output signals must be driven to their benign state In general this means they must be asynchronously tri stated SERR open drain is floated REQ and GNT must both be tri stated they cannot be driven low or high during reset To prevent AD C BE and PAR signals from floating during reset the central resource may drive these lines during reset bus parking but only to a logic low level they may not be driven high 5 may be asynchronous to CLK when asserted or deasserted Although asynchronous deassertion 15 guaranteed to be a clean bounce free edge Except for configuration accesses only devices that are required to boot the system will respond after reset ADDRESS AND DATA 0 31 00 Address and Data are multiplexed the same PCI pins A bus transaction consists of an address phase followed by one or more data phases PCI supports both read and write bursts The address phase is the clock cycle in which FRAME is asserted During the address phase AD 31 00 contain a physical address 32 bits For I O this is a byte address for configuration and memory it is DWORD address During data phases AD 07 00 contain the
30. boot rom ETH2 Configuration Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom ETH3 Configuration DVS 50580 V1 0 Disabled Enabled With RPL PXE boot Select if you want to enable the LAN adapter or if you want to activate the RPL PXE boot rom Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 61 of 80 8 3 4 Advanced settings Floppy Configuration Advanced Floppy Configuration Select the type of floppy drive connected Floppy A Disabled to the system Floppy B Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Floppy A Disabled Select Floppy device installed in the system using 360KB the LPT gt Floppy cable 1 2MB 720KB 1 44MB 2 88MB Floppy B Disabled Select Floppy device installed in the system using 360KB the LPT gt Floppy cable 1 2MB 720KB 1 44MB 2 88MB Notes Enter SuperlO Configuration and enable Onboard Floppy Controller Parallel port can not be used if Onboard Floppy Controller is enabled DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 Public User Manual Da
31. connector The socket support DMA UDMA modules Pull U D loh lol C Signal Type loh lol o 15 GND PWR D J DB4 lO TBD D 6515 DB TBD PWR GND 8 7 TBD PNR GND 10 9 GND sv ER PWR GND 14 13 5V PWR PWR GND 116115 GND PWR DAB2 18 17 GND PWR DABO DAB1 Dp DBO lO _ N DB2 lO DB12 28 27 0811 IO DB13 DB12 CE DB14 O HDCSB 0815 IORB CBLIDB s lOWB v __ IRQB ___________ HDAC TBE GND IORDYS RESETB _ O DDACKB DDRQB TBD IO 089 DB8 DB10 2 Note 1 Pin is longer than average length of the other pins Note 2 Pin is shorter than average length of the other pins gt Ea p Heu pe DVS 50580 1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 37 of 80 4 6 Serial ATA harddisk interface Two serial ATA harddisk controllers are available on the board a primary controller SATAO and a secondary controller SATAB 4 6 11 SATA Hard Disk Connector SATAO SATA1 SATAO Pull Type loh lol U D Ey 0 0 0 EE es mer 2 SATAOTX
32. empty or when loop mode operation is initiated Receive Data receives serial data from the communication link Data Terminal Ready indicates to the modem or data set that the on board UART is ready to establish a communication link Data Set Ready indicates that the modem or data set is ready to establish a communication link RTS Request To Send indicates to the modem or data set that the on board UART is ready to exchange data Clear To Send indicates that the modem or data set is ready to exchange data Data Carrier Detect indicates that the modem or data set has detected the data carrier R Ring Indicator indicates that the modem has received telephone ringing signal The connector pinout for each operation mode is defined in the following sections 4 8 1 Comi Port1 DB9 Connector Pull Pull U D loh lol Type loh lol U D Pot C 4 8 2 2 Com3 amp 4 Pin Header Connectors The pinout of Serial ports Com2 Port2 Com3 SIO Port1 and Com4 SIO Port2 is as follows Pull Pull DSR EE ro 5 6 co F o 5 ov Note 1 5V supply is shared with supply pins 2 3 4 headers The common fuse is 1 1A If the DB9 adapter ribbon cable is used the 089 pino
33. least significant byte 150 and AD 31 24 contain the most significant byte Write data is stable and valid when IRDY is asserted and read data is stable and valid when TRDY is asserted Data is transferred during those clocks where both IRDY and TRDY are asserted 3 0 Bus Command and Byte Enables are multiplexed on the same PCI pins During the address phase of a transaction 3 0 define the bus command During the data phase C BE 3 0 are used as Byte Enables The Byte Enables are valid for the entire data phase and determine which byte lanes carry meaningful data C BE 0 applies to byte 0 Isb and C BE 3 applies to byte PAR Parity is even parity across AD 31 00 and C BE 3 0 Parity generation is required by all PCI agents PAR is stable and valid one clock after the address phase For data phases PAR is stable and valid one clock after either IRDY is asserted on a write transaction or TRDY is asserted a read transaction Once PAR is valid it remains valid until one clock after the completion of the current data phase PAR has the same timing as AD 31 00 but it is delayed by one clock The master drives PAR for address and write data phases the target drives PAR for read data phases INTERFACE CONTROL PINS FRAMEZ Cycle Frame is driven by the current master to indicate the beginning and duration of an access FRAME is asserted to indicate a bus transaction is beginning Whil
34. memory Flex and ATX Support for up to 1GB of system memory mITX ECC support depend on Intel ntel 855GME Chipset consisting of Intel amp 855GME Chipset Graphics and Memory Controller Hub Intel 6300ESB I O Controller Hub ICH 4 Mbit Firmware Hub FWH Intel Extreme Graphics 2 controller Shared Video Memory up to 64 Analog Display Support 350 MHz integrated 24 bit RAMDAC with support for analogue monitors up to 2048x1536 at 75 Hz Digital Video Out Port DVOB amp DVOC support dot clock up to 165 MHz DVI DVO ADD and CRT DVO ADD supported LVDS DVO ADD cards currently not supported Single or dual channel LVDS panel support 18 24bit OpenLDI SPWG up to UXGA panel resolution Dual independent pipe support Mirror and Dual independent display support Tri view support through LVDS interface DVO B C port and CRT CRT LVDS supported CRT DVO Add card supported LVDS DVO Add card supported e 2 0 1 5V connector DVO B C muxed w AGP supporting 1x 2x and 4x cards or an AGP Digital Display ADD card Audio AC97 version 2 3 subsystem using the Realtek ALC655 codec Audio Amplifier o FLEX and ATX 4x3W o mlTX 2x3W Line out CDROM in SPDIF Interface Surround e Microphone Onboard speaker Control Winbond W83627THF LPC Bus Controller Peripheral e Four USB 2 0 ports interfaces Four Serial ports RS232 Note Intel 6300ESB Serial port FIFO COM C D is not standard compliant May c
35. must be used If using the IDE S2 connector care should be taken in correct orientation when attaching the female cable The cables that KONTRON provide do not have a key There is possibility of damage to the HDD or PCB if the cable is not orientated correctly Note If the Audio Amplifiers shall be used to generate up to 3W on one or more of the Audio ouput channels then make sure that sufficent airflow is around the Audio Amplifier The Amplifier has integrated Thermal Protection and will not be damaged even though the airflow is insufficient for normal operation 6 Connect power supply to the board by the ATXPWR connector 7 on the power on the power supply 8 The PWRBTN IN must be toggled to start the Power supply this is done by shorting pins 16 PWRBTN and pin 18 GND on the FRONTPNL connector see Connector description A normally open switch can be connected via the FRONTPNL connector 9 Enterthe BIOS setup by pressing the F2 key during boot up Refer to the Software Manual under preparation for details on BIOS setup Enter Advanced Menu CPU Configuration Intel SpeedStep Tech and set this option to Maximum Performance Note To clear all CMOS settings including Password protection move the CMOS CLR jumper with or without power for approximately 1 minute Alternatively turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted
36. password etc without actually see the picture on the dispaly and If the Hot Keys have not been disabled in the Extreme Graphic driver then the following key combinations you can select a connected display Ctrl Alt F1 enables the CRT on board Ctrl Alt F3 enables the LVDS on board Ctrl Alt F4 enables display conneted to the ADD DVS 50580 V1 0 Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 80 of 80 10 Warranty KONTRON Technology warrants its products to be free from defects in material and workmanship during the warranty period If a product proves to be defective in material or workmanship during the warranty period KONTRON Technology will at its sole option repair or replace the product with a similar product Replacement Product or parts may include remanufactured or refurbished parts or components The warranty does not cover 1 Damage deterioration or malfunction resulting from Accident misuse neglect fire water lightning or other acts of nature unauthorized product modification or failure to follow instructions supplied with the product Repair or attempted repair by anyone not authorized by KONTRON Technology Causes external to the product such as electric power fluctuations or failure Normal wear and tear Any other causes which does not relate to a product defect 2 Removal installation and
37. set up service charges gt Exclusion of damages KONTRON TECHNOLOGY LIABILITY IS LIMITED TO THE COST OF REPAIR OR REPLACEMENT OF THE PRODUCT KONTRON TECHNOLOGY SHALL NOT BE LIABLE FOR 1 DAMAGE TO OTHER PROPERTY CAUSED BY ANY DEFECTS IN THE PRODUCT DAMAGES BASED UPON INCONVENIENCE LOSS OF USE OF THE PRODUCT LOSS OF TIME LOSS OF PROFITS LOSS OF BUSINESS OPPORTUNITY LOSS OF GOODWILL INTERFERENCE WITH BUSINESS RELATIONSHIPS OR OTHER COMMERCIAL LOSS EVEN IF ADVISED OF THEIR POSSIBILITY OF SUCH DAMAGES 2 ANY OTHER DAMAGES WHETHER INCIDENTAL CONSEQUENTIAL OR OTHERWISE 3 ANY CLAIM AGAINST THE CUSTOMER BY ANY OTHER PARTY DVS 50580 V1 0
38. the current access The GMCH asserts G_DEVSEL based on the DDR SDRAM address range being accessed by initiator an input G_DEVSEL indicates whether the AGP master has recognized a cycle to it REQ G_REQ Request During SBA Operation This signal is not used during SBA operation During PIPE and FRAME Operation G_REQ when asserted indicates that the AGP master is requesting use of the AGP interface to run FRAME PIPE based operation GNT G_GNT Grant During SBA PIPE and FRAME Operation G_GNT along with the information on the ST 2 0 signals status bus indicates how the AGP interface will be used next Refer to the AGP Interface Specification Revision 2 0 for further explanation of the ST 2 0 values and their meanings AD 31 0 G_AD 31 0 Address Data During PIPE and FRAME Operation The _ 0 31 0 signals are used to transfer both address and data information on the AGP interface During SBA Operation The G AD 31 0 signals are used to transfer data on the AGP interface continued DVS 50580 V1 0 Kontron 886LCD M Family always a Jump ahead KTD 00474 CBE 3 0 Public User Manual Date 2006 06 02 Page 32 of 80 Command Byte Enable During FRAME Operation During the address phase of a transaction the G_CBE 3 0 signals define the bus command During the data phase the G_CBE 3 0 signals are used as byte enables The b
39. transaction by asserting FRAMES AGP Strobes ADSTB 0 Address Data Bus Strobe 0 provides timing for 2x and 4x data on AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 0 Address Data Bus Strobe 0 Complement With AD STBO forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals The agent that is providing the data will drive this signal ADSTB 1 Address Data Bus Strobe 1 Provides timing for 2x and 4x data on AD 31 16 and C BE 3 2 signals The agent that is providing the data will drive this signal ADSTB 1 Address Data Bus Strobe 1 Complement With AD STB1 forms a differential strobe pair that provides timing information for the AD 15 0 and C BE 1 0 signals in 4X mode The agent that is providing the data will drive this signal SBSTB Sideband Strobe Provides timing for 2x and 4x data the SBA 7 0 bus It is driven by the AGP master after the system has been configured for 2x or 4x sideband address mode SBSTB DVS 50580 V1 0 Sideband Strobe Complement The differential complement to the SB_STB signal It is used to provide timing 4x mode continued Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 31 of 80 AGP PCI Signals Semantics FRAME G_FRAME Frame During PIPE and SBA Operation Not used by AGP SBA
40. 3 34 AI 655 55 OS 5 n 14 as o 100 gt go 150 av Weert E gt 26 FLASH THE USB 2 USB KBD MEE SEM 2 3 4 Header Header Header DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 15 of 80 3 5 886LCD M Power Distribution amp Power State Map ATX PSU Battery or V3 3_ALWAY Ref ATXPWR 5 Ref V5_ALWAYS V5S V3 3S VCC12 VCC 12 BTIII VCC 12 VCC12 LDO Regulator V1 8S Ref U3SS DC DC regulator VCC_CORE Ret COREREG V1 2S DC DC c LDO regulator regulator VCCP Ref Ref V1 5S VCCPAMP VCCPREG DC DC V2 5 regulator Ref V1 25S ACPICTRL MOSFET 5 DUAL Ref 150 750 5 V3 3 DUAL Ref 1SD 7 0 LDO Regulator V3 3ALWAYS LDO Regulator V1 5ALWAYS Ref U1SS Ref 0255 continued DVS 50580 V1 0 kontron 386 CD M Famil always a Jump ahead KTD 00474 I Public User Manual 50 53 55 V
41. 4ms 1 0A 4ms N A DVS 50580 V1 0 G Kontron 8s6LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 19 of 80 3 7 886LCD M Clock Distribution HOST QLOCKPAIRS CPU amp CPU PAKE 100M CFU amp QK 10M Ref Peries amp MH PAK 10M DRFSAK Noth Bidge DRAK R MH MH 0 5 POX Me ak icra 68M AGP 365 POX SATACLOCKPAR Ref AKIP amp 00 South Biche R IOHS _ PA LPG SO ak icra ME Rg PAX BICSFLASH Wa VR OE Super 44318M z arara 1431M Gockhuffer AKEEM Glock Generator 28 Rg Codec DVS 50580 1 0 continued Kontron 886LCD M Family always a Jump ahead KTD 00474 Public User Manual DAC_DDCACLK Date 2006 06 02 Page 20 of 80 M_CLK_DDRX amp M_CLK_DDRX CRT VGA Ref CRT_COMA _ _ North Bridge Ref GMCH_ LVDS CLKX amp LVDS_CLKX LVDS DDCPCLK DDR Memory Ref DDRO DDR1
42. 5S X N A N A V3 3S X N A N A VCC12 X N A N A VCC 12 X N A N A V1 8S X N A N A CORE X N A N A VCCP X N A N A V1 2S X N A N A V1 5S X N A N A V2 5 X X N A V1 25S X N A N A V5 DUAL X X N A V3 3 DUAL X X N A V5_ALWAYS X X N A V3 3ALWAYS X X N A V1 5ALWAYS X X N A V_RTC USB V5 DUAL connectors Ref USB ETH FRONTPNL V3 3S AC97 Codec V5 DUAL KBD MSE Ref Ref Codec KBD MSE VCC12 V5S LPT port Ref Ref CRT COMA L U1A1 U1A2 PT V3 3S BIOS Flash 55 drivers VCC12 Ref VCC 12 Ref FWH COMXDRV DVS 50580 V1 0 y Date 2006 06 02 Page VCC CORE 4VCCP V1 8S VCCP V1 2S V1 5S 2 5 V3 3S V5S V3 3S V1 5S VCCP V_RTC V5 ALWAYS V3 3 ALWAYS V1 5 ALWAYS 3 3 DUAL V2 5 V1 25S V3 3S V1 5S V3 3S V5S VCC12 V3 3 ALWAYS V3 3S V5S VCC12 VCC 12 V3 3 ALWAYS 3 3 DUAL V3 3S 16 of 80 Processor Ref BANIAS _ North Bridge Ref GMCH_ South Bridge Ref DDR Memory Ref DDRX AGP Ref AGP PCI slots Ref PCIX Ethernet Controllers Ref ETH1 Ethernet Controllers Ref 2 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 17 of 80 3 6 Power Consumption This section lists a summary of the
43. CK is obtained under its own protocol in conjunction with It is possible for different agents to use PCI while a single master retains ownership of LOCK If a device implements Executable Memory it should also implement LOCK and guarantee complete access exclusion in that memory A target of an access that supports LOCK must provide exclusion to a minimum of 16 bytes aligned Host bridges that have system memory behind them should implement LOCK as a target from the PCI bus point of view and optionally as a master IDSEL Initialization Device Select is used as a chip select during configuration read and write transactions DEVSEL Device Select when actively driven indicates the driving device has decoded its address as the target of the current access As an input DEVSEL indicates whether any device on the bus has been selected continued DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 50 of 80 ARBITRATION PINS BUS MASTERS ONLY Request indicates to the arbiter that this agent desires use of the bus This is a point to point signal Every master has its own REQ which must be tri stated while RST is asserted Grant indicates to the agent that access to the bus has been granted This is a point to point signal Every master has its own GNT which must be ignored while RST is asserted While RST is asserted the arbiter must ignore all R
44. EQ lines since they are tri stated and do not contain a valid request The arbiter can only perform arbitration after RST is deasserted A master must ignore its GNT while RST is asserted REQ and GNT are tri state signals due to power sequencing requirements when 3 3V or 5 0V only add in boards are used with add in boards that use a universal I O buffer ERROR REPORTING PINS The error reporting pins are required by all devices and maybe asserted when enabled Parity Error is only for the reporting of data parity errors during all PCI transactions except a Special Cycle The PERR pin is sustained tri state and must be driven active by the agent receiving data two clocks following the data when a data parity error is detected The minimum duration of PERR is one clock for each data phase that a data parity error is detected If sequential data phases each have a data parity error the PERR signal will be asserted for more than a single clock PERR must be driven high for one clock before being tri stated as with all sustained tri state signals There are no special conditions when a data parity error may be lost or when reporting of an error may be delayed An agent cannot report a PERR until it has claimed the access by asserting DEVSEL for a target and completed a data phase or is the master of the current transaction System Error is for reporting address parity errors data parity errors on the Special Cycle command or any other sys
45. F Fan3 Speed 22164 Fan Cruise Control Speed Fan Setting 2177 RPM Watchdog Function Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Fan Cruise Control Options Disabled Thermal Speed Description Select how the Fan shall operate When set to Thermal the Fan will start to run at the CPU die temperature set below When set to Speed the Fan will run at the Fixed speed set below Fan Settings Feature Watchdog DVS 50580 V1 0 1406 5625 RPM 30 75 Options Disabled 16 seconds 38 seconds 1 minute 2 minutes 5 minutes 10 minutes The fan can operate in Thermal mode or in a fixed fan speed mode Description Adjust the amounts of boot time allowed before system reset occurs Software must disable or reload timer Disable IO 869h Init value 861h 4 3Fh 2 4 38 sec Reload write to 860h C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 64 of 80 8 3 7 Advanced settings Voltage Monitor Advanced Voltage Monitor Enable Hardware Health Monitoring Device Requested Cor 1 484 V VcoreA 1 431 V VcoreB 1 483 V 3 3Vin 3 290 V 5Vin 24 985 V 12Vin 12026 V 12Vin Good 5VSB 25 012 V lt Select Screen
46. GA card No PCI IDE BusMaster Enabled Setup PCI bus mastering for read write to IDE Disabled drives PCI Raiser Support Disabled Setup if you are using a PCI Raiser card to PCI Slot3 get one more PCI Slot Vertical PCI Slot2 PCI Slot1 Disable Unused PCI Clocks Auto Disables PCI clocks if no PCI card is No detected Spread Spectrum Disabled A technique for spreading the signal Enabled bandwidth over a wide range of frequencies to lower Radiated Emission PCI Slot 1 IRQ Preference Auto Manual IRQ selection does not guarantee PCI slot device will be configured with choice WARNING Selected IRQ will not be allowed for other devices DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 71 of 80 8 5 Boot Menu Main Advanced Boot Security Chipset Power Exit Boot Settings Configure Settings during System Boot Boot Settings Configuration gt Boot Device Priority lt Select Screen Auto adjust Boot Priority Yes Select Item Removable Devices 1st No Enter Go to Sub Screen Force Boot Device Disabled F1 General Help Hide Removable Devices No F10 Save and Exit Execute Embedded Firmware Disabled ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc 8 51 Boot Boot Settings Configuration
47. KTD 00474 l Public User Manual Date 2006 06 02 Page 35 of 80 4 5 3 IDE Hard Disk Connector IDE_S2 This connector 44 pin 2 0 mm pitch can be used for connection of up till two secondary IDE drives but only if no drive s is installed via IDE_S socket pan RESETE j 15 51 1 D 088 TED TED io 086 5 6 TBD 78 Do 5 10 181 183 0812 ee IO TBD 0814 __ 0815 PWR GND 19 20 NC ran DDRGB 2112 GND 23124 GOD IORDYB CSS DDACKB GND HDROB NC ji a SSS SSS So DAB CBLIDB 1 SMES NOW DABO DAB2 TBD 5 1 O TBD HDACTB 39 40 GND PWR PWR 4142 vcc PWR PWR GND 43 44 NC DVS 50580 1 0 G Kontron 8s6LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 36 of 80 4 5 4 Connector CF This connector is mounted on the backside of the 886LCD M mITX only If a Compact Flash Disk is used then no IDE drive can be connected to the IDE_S2
48. Kontron 8861 0 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 18 of 80 3 6 3 Power Consumption Total 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 1600Mhz 37 0W Idle 1600Mhz 24 4W ACPI 51 1600Mhz ACPI 53 1600Mhz ACPI 54 1600Mhz ACPI S5 1600Mhz 886LCD M board 3x1GB LAN with Intel Mobile Celeron 600 400MHz OMB L2 Cache BGA 256MB DDR RAM 333MHz Power State CPU Speed Power consumption Full load 600Mhz Idle 600Mhz ACPI 51 600Mhz ACPI 3 600Mhz ACPI 54 600Mhz ACPI 85 600Mhz 3 6 4 Minimum recommended power supply specifications Note Minimum recommended power supply specifications do not include attachment of AUDIO Speakers AMP out USB AGP PCI devices If these devices are added to the board additional power requirements must be taken into account Refer to the Detailed Device Power consumption section Net Current I Peak Current 5VDC 8 0A 40 0A 3ms 3 3VDC 14 0A 3ms 12VDC 6 0A 4ms 5VSB 3 5A 14ms 12 VDC 1 0A 4ms 3 6 5 Recommended Power Supply specifications Note Recommended power supply specifications includes attachment of COM Fan 4xAudio Speakers 4 8 USB AGP PCI devices Net Current 1 Peak Current 5VDC 50 0A 3ms 3 3VDC 20 0A 3ms 12VDC 8 0A 4ms 5 0A 1
49. PP with a printer attached is as follows Description Parallel data bus from PC board to printer The data lines are able to operate in PS 2 compatible bi directional mode Signal to select the printer sent from CPU board to printer Signal from printer to indicate that the printer is selected This signal indicates to the printer that data at PD7 0 are valid Signal from printer indicating that the printer cannot accept further data Signal from printer indicating that the printer has received the data and is ready to accept further data This active low output initializes resets the printer This active low output causes the printer to add a line feed after each line printed Signal from printer indicating that an error has been detected Signal from printer indicating that the printer is out of paper The printer port additionally supports operation in the EPP and ECP mode as defined in 3 DVS 50580 V1 0 G Kontron 886LCD M Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 39 of 80 4 8 Serial Ports Four RS232C serial ports are available on the 886LCD M Flex 886LCD M ATX and 886LCD M mlTX The typical interpretation of the signals in the COM ports is as follows Signal Deseription Transmitte Data sends serial data to the communication link The signal is set to a marking state on hardware reset when the transmitter is
50. R or ___ V 107 DEVSE OD PWR j PWR GND 9 sros 100 v PER SDN 10 O ov SER j 33 or j CB AD5 o x j AD ov PW PWR GND ___ 013 o j T j ADO OD PWR PW GND 009 IOT SOLDER SIDE COMPONENT SIDE o Ao IOT o j AD Pwr Jj PWR 33V Abo j r j AD GND PWR 1 PWR GND ____ 2 j IT j ADI r j 1 PWR V O PWR Reas lor _ PW j 1 v DVS 50580 1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 49 of 80 4 17 2 Signal Description Slot Connector SYSTEM PINS CLK Clock provides timing for all transactions on PCI and is an input to every PCI device All other PCI signals except RST INTA INTB INTC and INTD are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge PCI operates
51. Reset Delay 10 Sec 20 Sec 30 Sec 40 Sec Description Number of seconds the BIOS waits for the USB device after start unit command Emulation Type Auto DVS 50580 V1 0 Floppy Forced FDD Hard Disk CDROM Setup the emulation type for the USB device C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 70 of 80 8 4 PCIPnP Menu Advanced PCI PnP Settings NO lets the BIOS configure all the Warning Setting wrong values in below sections devices in the system May cause system to malfunction YES lets the operating system Plug amp Play 0 5 01 configure Plug and PCI Latency Timer 64 Play PnP devices not Allocate IRO to PCI VGA Yes required for boot if PCI IDE BusMaster Enabled your system has a Plug PCI Raiser Support Disabled and Play operating Disable Unsed PCI Clocks Auto system Spread Spectrum Mode Disabled PCI Slot 1 IRO Preference Auto Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Plug amp Play O S No Select if you have a PnP O S Yes PCI Latency Timer 32 Value in units of PCI clocks for PCI device 64 latency timer register 96 128 160 192 224 248 Allocate IRQ to PCI VGA Yes Assigns IRQ to PCI V
52. WRITTEN APPROVAL OF THE GENERAL MANAGER OF KONTRON Technology A S As used herein 1 Life support devices or systems are devices or systems which a are intended for surgical implant into body or b support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user 2 A component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness KONTRON Technology Technical Support and Services If you have questions about installing or using your KONTRON Technology Product check this User s Manual first you will find answers to most questions here To obtain support please contact your local Distributor or Field Application Engineer FAE Before Contacting Support Please be prepared to provide as much information as possible CPU Board 1 Type 2 Part number Number starting with 53 3 Serial Number Configuration 1 CPU Type Clock speed 2 DRAM Type and Size 3 BIOS Revision Find the Version Info in the BIOS Setup in the Kontron Section 4 BIOS Settings different than Default Settings Refer to the Software Manual System 1 O S Make and Version 2 Driver Version numbers Graphics Network and Audio 3 Attached
53. al buffer DVO Hub interface DVOBCLK DVOBCLK DVOCCLK DVOCCLK Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOBCLK corresponds to the primary clock out DVOBCLK corresponds to the primary complementary clock out DVOBCLK and DVOBCLK should be left as NC Not Connected if the DVO B port is not implemented Differential DVO Clock Output These pins provide a differential pair reference clock that can run up to 165 MHz DVOCCLK corresponds to the primary clock out DVOCCLK corresponds to the primary complementary clock out DVOCCLK and DVOCCLK should be left as NC Not Connected if the DVO C port is not implemented DVOBCCLKINT DVOBC Pixel Clock Input Interrupt This signal may be selected as the reference input to either dot clock PLL DPLL or may be configured as an interrupt input A TV out device can provide the clock reference The maximum input frequency for this signal is 85 MHz DVOBC Pixel Clock Input When selected as the dot clock PLL DPLL reference input this clock reference input supports SSC clocking for DVO LVDS devices DVOBC Interrupt When configured as an interrupt input this interrupt can support either DVOB or DVOC DVOBCCLKINT needs to be pulled down if the signal is NOT used DVS 50580 V1 0 Display Power Management Signaling This signal is used only in mobile systems to act as the DREFCLK in certain power management s
54. amily always a Jump ahead Date 2006 06 02 Page 60 of 80 Description Select the mechanism for detecting 80Pin ATA Cable P ATA1 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel P ATA2 Cable Detection Force Disable 40Pin 80Pin Force the board to operate as if a 40Pin ATA cable or 80Pin ATA cable is installed on the Primary channel Hard Disk Write Protect Disable Enabled Enable write protection on HDDs only works when it is accessed through the BIOS IDE Detect Time Out Sec 8 3 8 Advanced settings LAN Configuration 0 5 10 15 20 25 30 35 Select the time out value when the BIOS is detecting ATA ATAPI Devices Advanced LAN Configuration Control of Ethernet Devices and RPL PXE Configuration With RPL PXE boot boot MAC Address 00 0 4000001 ETH2 Configuration Enabled MAC Address 00E0F4000002 ETH3 Configuration Enabled MAC Address 00E0F4000003 lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESG Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature ETH1 Configuration Options Disabled Enabled With RPL PXE boot Description Select if you want to enable the LAN adapter or if you want to activate the RPL PXE
55. an control system support Thermal and Speed cruise for three onboard Monitor Fan control connectors FAN PROC FAN SYS and FEATURE Subsystem Three thermal inputs CPU die temperature System temperature and External temperature input routed to FEATURE connector e Voltage monitoring e Intrusion detect input SMI violations BIOS on HW monitor not supported Supported by API Windows Operating Win2000 Systems WinXP Support Win98 USB2 0 ACPI S4 not supported Win2003 WinXP Embedded limitations may apply WinCE net limitations may apply Linux Feodora Core 3 Suse 9 2 limitations may apply continued DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 12 of 80 Environmental Operating Conditions 0 C 60 C operating temperature forced cooling It is the customer s responsibility to provide sufficient airflow around each of the components to keep them within allowed temperature range 10 90 relative humidity non condensing Storage 20 C 70 C 5 95 relative humidity non condensing Electro Static Discharge ESD Radiated Emissions All Peripheral interfaces intended for connection to external equipment are ESD EMI protected EN 61000 4 2 2000 ESD Immunity EN55022 1998 class B Generic Emission Standard Safety UL 60950 1 2003 First Edition CSA C22 2 60950 1 03 1st Ed
56. and PIPE operations During Fast Write Operation Used to frame transactions as an output during Fast Writes During FRAME Operation is an output when the GMCH acts as an initiator on the AGP Interface G_FRAME is asserted by the GMCH to indicate the beginning and duration of an access G_FRAME is an input when the GMCH acts as a FRAME based AGP target As a FRAME based AGP target the GMCH latches the C BE 3 0 and the AD 31 0 signals on the first clock edge on which GMCH samples FRAME active IRDY G_IRDY Initiator Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_IRDY is an output when GMCH acts as a FRAME based AGP initiator and an input when the GMCH acts as a FRAME based AGP target The assertion of G_IRDY indicates the current FRAME based AGP bus initiator s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_IRDY indicates that the AGP compliant master is ready to provide all write data for the current transaction Once G_IRDY is asserted for a write operation the master is not allowed to insert wait states The master is never allowed to insert a wait state during the initial data transfer 32 bytes of a write transaction However it may insert wait states after each 32 byte block is transferred TRDY G_TRDY Ta
57. anias 130 nm process FSB 400MHz with 512 L2 cache Processor Brand Processor sSpec no Thermal Embedded Number Guideline Intel Pentium M 90nm 2 1 GHz 765 SL7V3 21 0 W No 2 0 GHz 755 SL7EM 21 0 W No 1 8 GHz 745 SL7EN 21 0 W Yes 1 7 GHz 735 SL7EP 21 0 W No 1 6 GHz 725 SL7EG 21 0 W No 1 5 GHz 715 SL7GL 21 0 W No Intel Pentium M 130nm Intel Celeron M 90nm Intel Celeron M 130nm 886LCD M mITX BGA is a version including an Intel Mobile Celeron ULV 800 MHz BGA CPU 0 L2 3 3 System Memory support 886LCD M Flex 886LCD M ATX boards have two onboard DIMM sockets 886LCD M mITX equipped with one DIMM socket only and support the following memory features e 2 5V only 184 pin DDR SDRAM DIMMs with gold plated contacts e Supports up to two one on mITX single sided and or double sided DIMMs four rows populated with unbuffered 1600 2100 2700 DDR SDRAM with or without ECC depends on Intel e Supports 64 Mbit 128 Mbit 256 Mbit and 512 Mbit technologies for x8 and x16 width devices e Maximum of 2 Gbytes system 1GB mITX memory by using 512 Mbit technology devices double sided Supports 200 MHz 266 MHz and 333 MHz DDR devices 64 bit data interface 72 bit with ECC depends on Intel The installed DDR SDRAM should support the Serial Presence Detect SPD data structure This allows the BIOS to read and configu
58. arameters Enable RSDP pointers to 64 bit Fixed System Remote Access Enabled Description Tables Serial port number ICH COM1 Serial Port Mode 115200 8 1 Flow Control None Redirection Always Terminal Type ANSI VT UTF8 Combo Key Support Disabled lt Select Screen Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Remote Access Options Disabled Enabled Description Allows you to see the screen over the comport interface in a terminal window Serial port number Serial Port Mode SIO Port1 SIO Port2 115200 8 n 1 57600 8 n 1 38400 8 n 1 19200 8 n 1 9600 8 n 1 Setup which comport that should be used for communication Select the serial port speed Flow Control None Hardware Software Select Flow Control for serial port Redirection After BIOS POST Disabled Boot Loader Always How long shall the BIOS send the picture over the serial port Terminal Type ANSI VT100 VT UTF8 Select the target terminal type VT UTF8 Combo Key Support DVS 50580 V1 0 Disabled Enabled Setup VT UTF8 Combo Key C Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 68 of 80 8 3 12 Advanced settings USB Configuration Advanced USB Configuration Enables USB host controllers Modul
59. ause issues with specific SW One Parallel port SPP EPP ECP Floppy optional floppy with special cabling Two Serial ATA 150 IDE interfaces ATA Mode 6 not supported due to Intel Chipset restrictions Two Parallel ATA IDE interfaces with UDMA 33 ATA 66 100 support PS 2 keyboard and mouse ports Memory Chipset continued DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 11 of 80 LAN 3x 10 100 1000Mbits s LAN subsystem using Realtek RTL8110SB 32 LAN controllers or Support 1x 3x 10 100Mbits s LAN subsystem using Realtek RTL8100C LAN controllers depending on board configuration and RPL netboot supported Wake On LAN WOL supported on ETH1 only BIOS e Kontron Technology AMI BIOS core version e Support for Advanced Configuration and Power Interface ACPI 1 0 2 0 Plug and Play o Suspend To Ram o Suspend To Disk o Intel Speed Step Secure CMOS OEM Setup Defaults Always On BIOS power setting RAID Support RAID modes 0 and 1 Instantly Support for PCI Local Bus Specification Revision 2 2 oe Suspend to RAM support Technology Expansion SMBus routed to FEATURE connector Capabilities LPC Bus routed to LPC connector DDC Bus routed to LVDS connector 8 x GPIOs General Purpose I Os routed to FEATURE connector PCI Bus routed to PCI slot s PCI Local Bus Specification Revision 2 2 Hardware Smart F
60. e Select physical ports 1 to be Master Slave PO Slave P1 Master or Slave Master When S ATA only mode is selected Feature Options Description S ATA Ports Definition PO 1st P1 2nd Select physical ports 1 to be 1st 2nd or PO 2nd P 1 1st 2nd 1st When P ATA only mode is selected Feature Options Description S ATA Running Enhanced Yes Setup the S ATA interface to be running in Mode No enhanced mode or legacy mode P ATA Channel Selection Primary Secondary Setup the active IDE channels Both S ATA Ports Definition P0 3 P1 4 Select physical ports PO P1 to be 3 4 or 4 1 3 44 35 Configure 5 as RAID No Only available when P ATA Only is selected Yes Note Install the driver via USB Floppy connected to USB port 2 lower conn DVS 50580 V1 0 C Kontron 886 Family always a Jump ahead KTD 00474 Public User Manual 59 of 80 Date 2006 06 02 Page Advanced Primary IDE Master Select the type of devices connected to Device Hard Disk the system Vendor ST340014A Size 40 0GB LBA Mode Supported Block Mode 16Sectors PIO Mode 4 MultiWord DMA 2 Ultra DMA Ultra DMA 5 S M A R T Supported Type Auto lt Select Screen LBA Large Mode Auto n Select Item Block Multi Sector Transfer Auto t Change Option PIO Mode Auto E General Help DMA Mode Auto F10 Sa
61. e FRAME is asserted data transfers continue When is deasserted the transaction is in the final data phase or has completed IRDY Initiator Ready indicates the initiating agent s bus master s ability to complete the current data phase of the transaction IRDY is used in conjunction with TRDY A data phase is completed on any clock both IRDY and TRDY are sampled asserted During a write IRDY indicates that valid data is present on AD 31 00 During a read it indicates the master is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together TRDY Target Ready indicates the target agent s selected device s ability to complete the current data phase of the transaction TRDY is used in conjunction with IRDY A data phase is completed on any clock both TRDY and IRDY are sampled asserted During a read TRDY indicates that valid data is present on AD 31 00 During a write it indicates the target is prepared to accept data Wait cycles are inserted until both IRDY and TRDY are asserted together STOP Stop indicates the current target is requesting the master to stop the current transaction LOCK Lock indicates an atomic operation that may require multiple transactions to complete When LOCK is asserted non exclusive transactions may proceed to an address that is not currently locked A grant to start a transaction on PCI does not guarantee control of LOCK Control of LO
62. e Version 2 24 0 7 4 USB Devices Enabled 1 Drive USB Function All USB Ports Legacy USB Support Enabled USB 2 0 Controller Enabled USB 2 0 Controller Mode HiSpeed gt USB Mass Storage Device Configuration Select Screen Select Item t change option Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description USB Function Disabled Select the USB ports you want to enabled 2 USB Ports USB Ports Legacy USB Support Disabled Support for legacy USB Keyboard Enabled Auto USB 2 0 Controller Enabled Setup the USB 2 controller 480Mbps Disabled USB 2 0 Controller Mode FullSpeed Configures the USB 2 0 controller in HiSpeed HiSpeed 480Mbps or FullSpeed 12Mbps DVS 50580 V1 0 G Kontron 8s6LCD M Family always a Jump ahead KTD 00474 Public User Manual Date 2006 06 02 Page 69 of 80 8 313 Advanced settings USB Mass Storage Device Configuration Advanced Device 41 Emulation Type Auto USB Mass Storage Device Configuration USB Mass Storage Reset Delay 20 Sec JetFlash TS256MJF2L Enables USB host controllers lt Select Screen 11 Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options USB Mass Storage
63. e the BIOS Setup program and the maintenance menu 4 POST completes 5 The operating system loads While the operating system is loading USB keyboards and mice are recognized and may be used to configure the operating system Keyboards and mice are not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup program 6 After the operating system loads the USB drivers all legacy and non legacy USB devices are recognized by the operating system and Legacy USB support from the BIOS is no longer used To install an operating system that supports USB verify that Legacy USB support in the BIOS Setup program is set to Enabled and follow the operating system s installation instructions DVS 50580 1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 56 of 80 8 BIOS Configuration Setup 8 1 Introduction The BIOS Setup is used to view and configure BIOS settings for the 886LCD M board The BIOS Setup is accessed by pressing the DEL key after the Power On Self Test POST memory test begins and before the operating system boot begins The Menu bar look like this Main Advanced PCIPnP Boot Security Chipset Power Exit The available keys for the Menu screens are as Function Key Description lt gt 0 lt gt Select Screen lt f gt or Select Item lt gt lt gt Change Field Tab Select Fie
64. er Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Disabled Enabled Disabled Enabled Description Setup the ICHS IOAPIC function Setup the extended mode of ICHS IOAPIC OnBoard AC 97 Audio Disabled Enabled Setup the onboard audio OnBoard Amplifier Feature Boot Type Disabled Enabled Options VBIOS Default CRT TV EFP EFP2 EFP TV Use the OnBoard Amplifier on lineout Description Setup type of boot screen Backlight Signal Inversion Disabled Enabled Select the signal polarity LCDVCC Voltage 3 3V 5V Setup the LCD Voltage LVDS Panels Chose the connected LVDS panel DVO DVS 50580 V1 0 DVO Chip Select the DVO connection G always a Jump ahead Kontron 8s6LCD M Family KTD 00474 I Public User Manual Date 2006 06 02 Page 76 of 80 8 8 Power Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Enable Disable SMI ADVANCED SMI ENABLE CONTROLS based power management Power Management APM Enabled and APM support Power Button Mode On Off ADVANCED RESUME EVENT CONTROLS USB Controller Resume Disabled PME Resume Disabled RI Resume Disabled RTC Resume Enabled RTC Alarm Data 11 Alarm Time 12142121311 lt
65. ers Speaker Outlem w SPKROUTR Front Speakers Speaker ORO sw SURR OUT R Select 4 or 5 1 speakers AMP CEN OUT Select 5 1 speakers AMP LFE OUT Select 5 1 speakers 2 F SPDIF OUT S PDIF Output Enable SPDIF AAGND Audio Analogue ground Not amplified on 886LCD M mITX In the Realtek Audio Driver In the Realtek Audio Driver XP only Also enable SPDIF in Player if used DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 45 of 80 4 12 Fan connectors FAN PROC and FAN SYS The FAN PROC is used for connection of the active cooler for the CPU The FAN SYS can be used to power control and monitor a fan for chassis ventilation etc Pull Type loh lol U D r pow ono Signal description Signal Description 00000000 12V 12V supply for fan can be turned on off or modulated PWM by the chipset A maximum of 800 mA can be supplied from this pin Tacho signal from the fan for supervision The signals shall be generated by an open collector transistor or similar On board is a pull up resistor 4K7 to 12V The signal has to be pulses typically 2 Hz per rotation 4 13 The Clear CMOS Jumper Cir CMOS The Clr CMOS Jumper is used to clear the CMOS content 7 CPU location 7 No Jumper installed Pin numbers Jumper normal position T Jumper in Clea
66. erviced RBF is only sampled at the beginning of a cycle If the AGP master is always ready to accept return read data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation Write Buffer Full indicates if the master is ready to accept Fast Write data from the GMCH When WBF is asserted the GMCH is not allowed to drive Fast Write data to the AGP master WBF is only sampled at the beginning of a cycle If the AGP master is always ready to accept fast write data then it is not required to implement this signal During FRAME Operation This signal is not used during AGP FRAME operation AGP Status ST 2 0 Status Provides information from the arbiter to an AGP Master on what it may do ST 2 0 only have meaning to the master when its GNT is asserted When GNT is deasserted these signals have no meaning and must be ignored ST 2 0 Meaning 000 Previously requested low priority read data is being returned to the master 001 Previously requested high priority read data is being returned to the master 010 The master is to provide low priority write data for a previously queued write command 011 The master is to provide high priority write data for a previously queued write command 100 Reserved 101 Reserved 110 Reserved 111 The master has been given permission to start a bus transaction The master may queue requests by asserting PIPE start a PCI
67. esume SABIOS Support Disabled Determines if you want to support S4 power state Enabled DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 66 of 80 8 3 10 Advanced settings Advanced ACPI Configuration Advanced Advanced ACPI Configuration Enable RSDP pointers to 64 bit Fixed System ACPI 2 0 Features No Description Tables ACPI APIC support Enabled ACPI SCI IRQ Disabled AMI OEMB table Enabled Headless mode Disabled lt Select Screen E Select Item t change option F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description ACPI 2 0 Features No Enable Disable ACPI 2 0 features Yes APIC support Enabled Setup if the APIC controller should be supported Disabled in the ACPI code APIC ACPI SCI IRQ Enabled Enable Disable APIC ACPI SCI IRQ Disabled AMI OEMB table Enabled Enable Disable AMI OEMB table Disabled Headless mode Enabled Enable Disable Headless mode Disabled DVS 50580 V1 0 Kontron 386 Family always Jump ahead G KTD 00474 I Public User Manual Date 2006 06 02 Page 67 of 80 8 3 11 Advanced settings Remote Access Configuration Advanced Configure Remote Access type and p
68. et connector 1 ETHER1 Ethernet connector 1 is mounted together with USB Ports 0 and 2 The pinout of the RJ45 connector is as follows Signal loh lol DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 41 of 80 4 9 2 Ethernet connector 2 3 ETHER2 3 The two Ethernet channels in ETHER2 3 are supported by two discrete Ethernet controllers RTL8110SB connected to the onboard PCI bus This connector is not supported on the Engineering sample boards The pinout of the RJ45 s connector are as follows Signal loh lol DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 42 of 80 4 10 USB Connector USB 886LCD M Flex 886LCD M ATX 886LCD M mITX contains two USB Universal Serial Bus ports UHCI Host Controllers Each Host Controller includes a root hub with two separate USB ports each for a total of 4 USB ports The USB Host Controllers support the standard Universal Host Controller Interface UHCI Specification Rev 1 1 All 4 USB ports support both USB1 0 and USB2 0 signaling Over current detection on all four USB ports
69. eyboard and mouse pin row Connector 26 4 4 Display uuu LL 27 4 4 1 CRT Connector nnns 27 4 4 2 LVDS Flat Panel Connector 5 28 4 4 3 AGP DVO 2 29 45 Parallel ATA harddisk interface J u u uuu u uu u u u u 33 4 5 1 IDE Hard Disk Connector IDE 34 4 5 2 IDE Hard Disk Connector IDE 5 34 4 5 3 IDE Hard Disk Connector IDE 52 0 00004000 00 enemies 35 454 GF Connector A 36 4 6 Serial ATA harddisk interface u u uuu u uu uuu u u u u u u u u 37 4 6 1 SATA Hard Disk Connector SATAQ 5 37 47 Printer Port Connector PRINTER U UU u c ch u 38 DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 5 of 80 48 lj cc 39 4 8 1 Comi Port1 DB9 Connectors tert ele wid atid dae 39 4 8 2 2 amp Com4 Pin Header
70. failing DVS 50580 V1 0 C Kontron 2861 0 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 78 of 80 8 10 AMI BIOS Beep Codes Boot Block Beep Codes Number of Description Beeps Insert diskette in floppy drive A AMIBOOT ROM file not found in root directory of diskette in A Base Memory error Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error Flash Erase error 2 3 4 5 6 7 8 9 Flash Program error AMIBOOT ROM file size error BIOS ROM image mismatch file layout does not match image present in flash device POST BIOS Codes Number of Description Beeps Memory refresh timer error Parity error in base memory first 64 block Base memory read write test error Motherboard timer not operational Processor error 8042 Gate A20 test error cannot switch to protected mode General exception error processor exception interrupt error Display memory error system video adapter AMIBIOS ROM checksum error CMOS shutdown register read write error CO OO oO n Cache memory test failed Troubleshooting POST BIOS Beep Codes Number of Troubles
71. hooting Action Beeps 1 20r3 Reseat the memory or replace with known good modules 4 7 9 11 Fatal error indicating a serious problem with the system Consult your system manufacturer Before declaring the motherboard beyond all hope eliminate the possibility of interference by a malfunctioning add in card Remove all expansion cards except the video adapter beep codes are generated when all other expansion cards are absent consult your system manufacturer s technical support If beep codes are not generated when all other expansion cards are absent one of the add in cards is causing the malfunction Insert the cards back into the system one at a time until the problem happens again This will reveal the malfunctioning card If the system video adapter is an add in card replace or reseat the video adapter If the video adapter is an integrated part of the system board the board may be faulty DVS 50580 V1 0 Kontron 5861 Family always Jump ahead KTD 00474 l Public User Manual Date 2006 06 02 Page 79 of 80 9 OS setup Use the Setup exe files for all relevant drivers The drivers can be found on the 886LCD M Driver CD or they can be downloaded from the homepage www kontron emea com Note When installing using ADD cards like ADD DVI or ADD LVDS it s possible that the OS start up without any connected display s active If you are able to pass the Log On to Windows etc by entering the
72. ion is required DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 8 of 80 2 Installation procedure 2 1 Installing the board To get the board running follow these steps In some cases the board shipped from KONTRON Technology has CPU DDR DRAM and Cooler mounted In this case Step 2 4 can be skipped 1 Turn off the power supply Warning Do not use Power Supply without 3 3V monitoring watchdog which is standard feature in ATX Power Supplies Running the board without 3 3V connected will damage the board after a few minutes 2 Insert the DIMM DDR 184pin DRAM module s Be careful to push it in the slot s before locking the tabs For a list of approved DDR DRAM modules contact your Distributor or FAE list under preparation DDR333 DIMM 184pin DRAM modules are supported 3 Install the processor The CPU is keyed and will only mount in the CPU socket in one way Use the handle to open close the CPU socket Intel Pentium M and Celeron M processors Banias processors are supported 4 Use heat paste or adhesive pads between CPU and cooler and connect the Fan electrically to the FAN PROC connector 5 Insert all external cables for hard disk keyboard etc except for flat panel A CRT monitor must be connected in order to change CMOS settings to flat panel support To achieve UDMA 66 100 performance on the IDE interface 80poled UDMA cables
73. is supported USB Port 0 and 2 are supplied on the combined ETHER1 USBO USB2 connector USB Ports 1 and 3 are supplied on the FRONTPNL connector please refer to the FRONTPNL connector section for the pin out USB Port 2 supports USB Legacy mode 4 10 1 USB Connector 0 2 05 0 2 USB Ports 0 and 2 are mounted together with ETHER1 ethernet port Pull Pull Note U D loh lol Type Signal Signal Type loh lol U D Note PWR 5V SB5V GND 15K 0 25 2 IO USBO USBO 0 25 2 5V SB5V GND 0 25 2 0582 0582 0 25 2 Note 1 supply the USB devices on board fused with a 1 5A reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity In order to meet the requirements of USB v 1 1 standard the 5V input supply must be at least 5 00V Signal Description USBO USBO Differential pair works as Data Address Command Bus USB2 USB2 USB5V 5V supply for external devices Fused with 1 5A reset able fuse DVS 50580 1 0 Ca Kontron 886LCD M Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 43 of 80 4 11 Audio Connector 4 11 1 Audio Line in Line out and Microphone Audio Line in Line out and Microphone are available in the stacked audio jack connector Line in Left RING Line in Right SLEEVE GND
74. ld F1 General Help F10 Save and Exit Esc Exits the Menu 8 2 Main Menu Main Advanced PCIPnP Boot Security Chipset Power Exit System Overview Use ENTER TAB or SHIFT TAB to select AMIBIOS a field Version 08 00 10 Build Date 10 25 05 Use or to ID 886LCD23 configure system Time PCB TD 14 Serial 00374708 PCB ID 63650000 Processor Type Intel R Pentium R M Processor 1600 MHz lt Select Screen Speed 600MHz Select Item Change Field System Memory Tab Select Field Size 1016MB F1 General Help Speed 333MHz 10 Save and Exit ESC Exit System Time 10 18 15 System Date Mon 02 03 2006 V02 58 C Copyright 1985 2005 American Megatrends Inc Main Menu Selections You can make the following selections Use the sub menus for other selections Feature _ Options Description O System Time HH MM SS Set the system time System Date MM DD YYYY Set the system date DVS 50580 V1 0 C Kontron 886 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 57 of 80 8 3 Advanced Menu Main Advanced Boot Security Chipset Power Exit Advanced Settings Configure CPU Warning Setting wrong values in below sections May cause system to malfunction gt CPU Configuration gt IDE Configuratio
75. m hard disk Routed by the SiS630 chipset to PC AT bus interrupt CBLID This input signal CaBLe ID is used to detect the type of attached cable 80 wire cable when low input and 40 wire cable when 5V via 10Kohm pull up resistor DDREQ Disk DMA Request might be driven by the IDE hard disk to request bus master access to the PCI bus The signal is used in conjunction with the PCI bus master IDE function and is not associated with any PC AT bus compatible DMA channel DDACK Disk DMA Acknowledge Active low signal grants IDE bus master access to the PCI bus HDACT Signal from hard disk indicating hard disk activity The signal level depends on the hard disk type normally active low The signals from primary and secondary controller are routed together through diodes and passed to the connector FEATURE All of the above signals are compliant to 4 is A for primary and for secondary controller The pinout of the connectors are defined in the following sections DVS 50580 1 0 G Kontron 8s6LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 34 of 80 A 5 1 IDE Hard Disk Connector IDE P This connector can be used for connection of two primary IDE drives Pull Pull ES 112 cno PwR TBD 3 4 TBD S 516 Da TB pa 78 nao mD 10 DA Da
76. n gt LAN Configuration gt Floppy Configuration gt SuperlO Configuration gt Hardware Health Configuration gt Voltage Monitor lt Select Screen gt ACPI Configuration Select Item gt Remote Access Configuration Enter Go to Sub Screen gt USB Configuration F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc 8 3 1 Advanced settings CPU Configuration Advanced Configure advanced CPU settings Maximum CPU Speed is Module Version 11 05 set to maximum Minimum CPU Speed is Manufacturer Intel n 1 Brand String Intel Pentium R M processor 1600M MANU CQ controlled by Frequency 600MHz Operating syst m FSB Speed 400MHz Disabled Default CPU Cache L1 32 KB BREED Cache L2 1024 KB Intel R SpeedStep tm tech Automatic R Sp p tm ic lt Select Screen Select Item t Change Option Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Description Intel R SpeedStep tm tech Maximum Speed Select the operation mode of the CPU To Minimum Speed ensure full performance of the CPU use the Automatic Maximum Speed setting Disabled DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 58 of 80
77. nnn nnnm nannan nnaman nannamamma nanmanna nananana nana 57 8 3 1 Advanced settings CPU Configuration 57 8 3 2 Advanced settings IDE 58 DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 6 of 80 8 3 3 Advanced settings LAN 60 8 3 4 Advanced settings Floppy 61 8 3 5 Advanced settings SuperlO Configuration 62 8 3 6 Advanced settings Hardware Health Configuration 63 8 3 7 Advanced settings Voltage 64 8 3 8 Advanced settings ACPI 64 8 3 9 Advanced settings General ACPI 65 8 3 10 Advanced settings Advanced ACPI 66 8 3 11 Advanced settings Remote Access Configuration 67 8 3 12 Advanced settings USB 68 8 3 13 Advanced settings USB Mass Storage Device 69 84 PGIP P Men m 70 8 5 d c ee 71 8 5 1 Boot Boot Settings 71 8 6 Security
78. oduced or transmitted in any form or by any means electronically or mechanically for any purpose without the express written permission of KONTRON Technology A S Trademark Acknowledgement Brand and product names are trademarks or registered trademarks of their respective owners Disclaimer KONTRON Technology A S reserves the right to make changes without notice to any product including circuits and or software described or contained in this manual in order to improve design and or performance Specifications listed in this manual are subject to change without notice KONTRON Technology assumes no responsibility or liability for the use of the described product s conveys no license or title under any patent copyright or mask work rights to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified Applications that are described in this manual are for illustration purposes only KONTRON Technology A S makes no representation or warranty that such application will be suitable for the specified use without further testing or modification DVS 50580 V1 0 Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 3 of 80 Life Support Policy KONTRON Technology s PRODUCTS ARE NOT FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT EXPRESS
79. oller FF7FF800 FF7FF8FF OxFF Realtek 8169 Ethernet Controller FF7FFCO0 FF7FFCFF OxFF Realtek 8169 Ethernet Controller FF980000 FF9FFFFF Ox7FFFF 885GME Controller FFA7B000 FFA7BOOF OxF PCI System Peripheral FFA7B400 FFA7B7FF Ox3FF USB Controller FFA7B800 FFA7B8FF OxFF Realtek AC97 Audio FFA7BCOO Ox1FF Realtek AC97 Audio FFA7FCOO FFAFFFFF 0x803FF Ultra SATA Controller FFA80000 FFAFFFFF Ox7FFFF 885GME VGA Controller 00000 FFEFFFFF Ox3FFFFF Intel 82802 Firmware Hub Device FFF00000 FFFFFFFF 1 Mbyte Intel 82802 Firmware Hub Device 6 2 PCI devices Device Function Vendor ID Device ID IDSEL 6300ESB Device Function Host bridge 6300ESB I O Controller 6300ESB Controller 6300ESB Pci to Pci bridge 6300ESB VGA controller 6300ESB Display controller 6300ESB Pci to Pci bridge 6300ESB USB 6300ESB USB 6300ESB Watchdog timer 6300ESB APIC 6300ESB USB 6300ESB Pci to Pci bridge 6300ESB ISA Bridge 6300ESB IDE Controller 6300ESB IDE Controller 6300ESB SMBus 6300ESB Audio e O ojo A A A5 oo I o oj o 2 o PCI slot 1 PCI slot 2 PCI slot 3 PCI slot 4 RTL8110 Ethernet RTL8110 Ethernet N N IN gt O O O Value
80. onflict PCI I O conflict PCI ROM conflict PCI IRQ conflict PCI IRQ routing table error Halt on Invalid Time Date NVRAM Bad Static Resource Conflict PCI I O conflict PCI ROM conflict Options Auto adjust Boot Priority Yes No Description If Yes then eg USB devices will be placed first in the boot Device Priority Menu when booting Removable Devices 1st No Yes Should removable USB devices get first boot priority when inserted Force Boot Device Disabled Primary IDE Master Primary IDE Slave Secondary IDE Master Secondary IDE Slave Third IDE Master Forth IDE Master Network Does overwrite current boot setting Device must be in the boot priority menu though If the device fails to boot the system will not try other devices Hide Removable Devices No Execute Embedded Firmware DVS 50580 V1 0 Yes Disabled Enabled Hide Removable Devices in BBS POPUP menu F11 Execute OEM software if embedded into BIOS Default MemTest 86 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 73 of 80 8 6 Security Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Security Settings Install or Change the password Supervisor Password Installed User Password Installed Change Supervisor Password Change User Password Clear User Password Boot Sector Virus Protection Disabled
81. or the DVO port available on the AGP connector 4 4 1 CRT Connector CRT Pull loh lol ERR a E n wc _ j 7 mmm 2 12 pocpar 10 5605 ZT Fo 8 ana cnp PwR is EUH __ a vc 0 m 110 s 5 IO TBD 5608 Note 1 The 5V supply in the CRT connector is fused by a 1 1A reset able fuse Signal Description CRT Connector sen este e te OR Po 5 Own eshe tnpetenee DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 Public User Manual Date 2006 06 02 Page 28 of 80 4 4 2 LVDS Flat Panel Connector LVDS Note Max 0 5A Max 0 5A Max 0 5A Signal Signal Note PWR 0 5 Max 0 54 Max 0 5A Max 0 5A 4 7 3 3V 3 3V level GND PWR Max 0 5A GND PWR Max 0 5A LCDVCC Max 0 5A 3 3V level Max 0 5A Max 0 5A 060 LVDS ___ 1405 LVDS LVDS LVDSACLK LVDS _____ LVDS A3 LVDS 02 1 LVDS tps LVDS 82 tps VDD ENABLE OT 3 3V level GND PWR Max 0 5A DDC DATA 4 3 3V LVDS BCLK LVDS B3 0 5A 00 0 B N
82. power consumption of the 886LCD M Boards For additional details please refer to the Power Supply Characteristics document available from Kontron Technology The idle full power consumption of the 886LCD M is measured under 1 DOS prompt idle full CPU load 2 WindowsXP idle full CPU load 3 6 1 Test system configuration The following items were used in the test setup 1 886LCD M Flex board 710180 4500 with 256MB SDRAM 333MHz EZ128DDR16M168 333 INF 2 Pentium M 1600 400Mhz 1MB Cache CPU 3 Standard Pentium 4 active CPU cooler 4 PS 2 keyboard amp mouse 5 CRT 6 Primary Master HD Fujitsu MPG3102AT 10 24GB 7 PSU Antec 550W 8 Tektronix TDS 620B P6243 probes 9 Fluke Current Probe 80i 100S AC DC 10 Ethernet Ports 1 2 3 are enabled 10 100 1000MB LAN 3 6 2 Measured Power Consumption Net 886LCD M board 3x1GB LAN with Pentium M 1600 400MHz 1MB L2 Cache 256MB DDR RAM 333MHz Power State Net Current 1 Power W DOS FULL LOAD 5VDC 4 560A 22 8W 3 3VDC 2 568A 8 7W DOS IDLE 5VDC 4 028A 20 3W ACPI S1 3 3VDC 12VDC 5VDC 2 532A 0 424A 1 758A 8 6W 4 6W 8 8W ACPI S3 ACPI S4 ACPI S5 5VSB 0 892A 4 6W WINDOWS XP IDLE 5VDC 2 212A 11 1W WINDOWS XP FULL LOAD 3 3VDC 5VSB 5VSB 3 3VDC 5VDC 2 560A 1 007A 1 007A 2 720 4 704 8 8W 5 16W 4 95W 8 7W 23 7W DVS 50580 V1 0 3 3VDC 2 572A 8 7W
83. r CMOS position To clear all CMOS settings including Password protection move the CMOS_CLR jumper with or without power on the system for approximately 1 minute Alternatively if no jumper is available turn off power and remove the battery for 1 minute but be careful to orientate the battery corretly when reinserted 4 14 LPC connector unsupported Pull pe loh lol BEEN o 3 4 Peabo L 5 6 INT SERIQ 7 8 LPCAD2 r PC ROH o LPCAD3 DVS 50580 1 0 G Kontron 8s6LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 46 of 80 4 15 Front Panel connector FRONTPNL Pull usss ji 2 ia 3 us 516 75 EM c jo c v Pr 1214 sus teo C PR 5116 Pwen N EE AGND _ sp our SPKR OUT R Signa Description 5V supply for the USB devices on USB Port 1 and 3 is on board fused with a 1 5A USB13 5V reset able fuse The supply is common for the two channels SB5V is supplied during power down to allow wakeup on USB device activity USB1 USB1 USB3 USB3 Universal Serial Bus Port 1 Differentials Bus Data Address Command Bus Universal Serial Bus Port 3 Differentials Bus Data
84. r Manual Date 2006 06 02 Page 29 of 80 4 4 3 AGP DVO connector Note Type Signal PIN Signal 7 Type Note PWR 9 PWR GND GND PWR s 3 3V A9 3 3V PWR B10 10 B11 812 A12 B13 A13 814 14 815 15 ADD 102 817 A17 ADD 103 818 18 WR B19 19 ADD ID6 B21 A21 ADD 107 22 22 PWR B23 A23 PWR PWR B24 A24 PWR B25 A25 PWR B26 A26 DVOC 010 B27 A27 DVOC D11 B28 A28 PWR B4 B5 B7 B8 W B9 R R P PWI P B29 A29 B30 A30 B31 A31 PWR B32 A32 A33 A34 PWR A35 A36 A37 PWR A38 A39 A40 PWR A41 46 A48 PME A49 PWR 52 41 5 PWR 53 5 zs 56 DVOB D9 57 58 PWR 59 A61 PWR A62 A63 A64 PWR DVOB Vsync B65 A65 DVOB Hsync VREFCG B66 A66 VREFGC The buffers operate only in 1 5V mode not 3 3 V tolerant The interface supports 1 2 4 signaling and 2x 4x Fast Writes B33 B34 B35 B36 B37 B38 B39 B40 B41 B46 GPERR B48 B49 B50 1 5V B52 B53 B54 DVOB_D8 B56 B57 B58 B59 B60 B61 B62 DVOB DO B63 PWR B64 o gt gt gt PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR PWR o DVS 50580 1 0 C Kontron 386 Family always a Jump ahead KTD 00474 Public User Manual Date 2006 06 02 Page 30 of 80 Signal Description AGP Connector Signal Address
85. re the memory controller for optimal performance If non SPD memory is used the BIOS will attempt to configure the memory settings but performance and reliability may be impacted DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 3 4 System overview Public User Manual Date 2006 06 02 Page 14 of 80 The block diagram below shows the architecture and main components of the 886LCD boards The two key components on the board are the Intel 855GME and Intel 6300ESB ICH S Embedded Chipsets Components shown shaded are optional depending on board type 886LCD M Flex ATX or mITX and variants of the board Inte Processor M Banias amp Dothan LVDS Abt 1184 pins pins 008333 005333 EOC spat EOC spat VA 5 10100 2 evi 22 22 22 22 22 22 GE 1 320 32bit 3201 32bt 32bit Bot GE 33 EM CHS Mt ME Mc AG 2
86. rget Ready During PIPE and SBA Operation Not used while enqueueing requests via AGP SBA and PIPE but used during the data phase of PIPE and SBA transactions During FRAME Operation G_TRDY is an input when the GMCH acts as an AGP initiator and is an output when the GMCH acts as a FRAME based AGP target The assertion of G_TRDY indicates the target s ability to complete the current data phase of the transaction During Fast Write Operation In Fast Write mode G_TRDY indicates the AGP compliant target is ready to receive write data for the entire transaction when the transfer size is less than or equal to 32 bytes or is ready to transfer the initial or subsequent block 32 bytes of data when the transfer size is greater than 32 bytes The target is allowed to insert wait states after each block 32 bytes is transferred on write transactions STOP G_STOP Stop During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation G_STOP is an input when the GMCH acts as a FRAME based AGP initiator and is an output when the GMCH acts as a FRAME based AGP target G_STOP is used for disconnect retry and abort sequences on the AGP interface DEVSEL G DEVSEL Device Select During PIPE and SBA Operation This signal is not used during PIPE or SBA operation During FRAME Operation G_DEVSEL when asserted indicates that FRAME based AGP target device has decoded its address as the target of
87. rmation The BIOS enables applications such as third party management software to use SMBIOS The BIOS stores and reports the following SMBIOS information BIOS data such as the BIOS revision level Fixed system data such as peripherals serial numbers and asset tags Resource data such as memory size cache size and processor speed Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows require an additional interface for obtaining the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information The 886LCD M Boards supports reading certain MIF specific details by the Windows API Refer to the API section in this manual for details 7 2 Legacy USB Support Legacy USB support enables USB devices such as keyboards mice and hubs to be used even when the operating system s USB drivers are not yet available Legacy USB support is used to access the BIOS Setup program and to install an operating system that supports USB By default Legacy USB support is set to Enabled Legacy USB support operates as follows 1 When you apply power to the computer legacy support is disabled 2 POST begins 3 Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and configur
88. s power state before power loss occurred C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 77 of 80 8 9 Exit Menu Main Advanced PCIPnP Boot Security Chipset Power Exit Exit Options Exit system setup after saving the changes Save Changes and Exit Discard Changes and Exit F10 Key can be used Discard Changes for this operation Load Optimal Defaults Load Failsafe Defaults Halt on invalid Time Date Enabled Secure CMOS Disabled lt Select Screen Select Item Enter Go to Sub Screen Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Save Changes and Exit Ok Exit system setup after saving the changes Cancel Discard Changes and Exit Ok Exit system setup without saving any changes Cancel Discard Changes Ok Discards changes done so far to any of the setup Cancel questions Load Optimal Defaults Ok Load Optimal Default values for all the setup Cancel questions Load Failsafe Defaults Ok Load Failsafe Default values for all the setup Cancel questions Halt on invalid Time Date Enabled Shall the BIOS halt and wait for a keypress when the Disabled cmos is corrupted Secure CMOS Disabled Enable will store the current CMOS in the BIOS flash Enabled rom this will maintain the settings even if the battery is
89. s are dynamically selected BIOS Note All PCI slots for the 886LCD M boards supports PCI BUS Mastering DVS 50580 V1 0 RTL8110 Ethernet always Jump ahead Kontron 8861 0 Family 53 of 80 Date 2006 06 02 Page Public User Manual KTD 00474 Interrupt Usage 6 3 SOI8 y ui suonoejes uo GOYI VOUI 86 1015 Od uo snglNS Aq pesn eq pJeoquo pesn eq pesn eq 2 1 pesn eq e Aq pesn eq GSM pesn eq ulejs s punos 10 pesn eq 49 04 U09 xsippaeu Ajepuooes Aq pesn eq Joj oujuoo xsippueu pesn 10sse20Jd oo 40 yoddns z S d Aq WII pseoquo xsip 440 4 Aq pesn eq pesn eq p1eoquo q pesn eq jeues pesn eq Jeues pesn eq
90. tates i e Display Power Down Mode DPMS Clock is used to refresh video during S1 M Clock Chip is powered down in S1 M DPMS should come from a clock source that runs during S1 M and needs to be 1 5 V So an example would be to use a 1 5 V version of SUSCLK from ICH4 M Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 33 of 80 4 5 Parallel ATA harddisk interface Two parallel ATA harddisk controllers are available on the board a primary and a secondary controller Standard 377 harddisks or CD ROM drives may be attached to the primary and secondary controller board by means of the 40 pin IDC connectors IDE P and IDE S The secondary controller is shared between the IDE S connector and the IDE S2 connector which is intended for 272 harddisks The harddisk controllers support Bus master IDE ultra DMA 33 66 100 MHz and standard operation modes The signals used for the harddisk interface are the following Signal Description DA 2 0 Address lines used to address the registers in the IDE hard disk HDCS 1 08 Hard Disk Chip Select HDCSO selects the primary hard disk D 15 8 High part of data bus D 7 0 Low part of data bus IOR Read IOW Write IORDY This signal may be driven by the hard disk to extend the current I O cycle RESET Reset signal to the hard disk The signal is similar to RSTDRV in the PC AT bus HDIRQ Interrupt line fro
91. te 2006 06 02 Page 62 of 80 8 3 5 Advanced settings SuperlO Configuration Advanced Serial Portl Address Serial Port2 Address Serial Port2 Mode Parallel Port Mode Parallel Port Mode Parallel Port IRQ OnBoard Floppy Controller SIO Serial 1 Addresse ICH SIO Serial Port2 Addresse Configure Win627THF Super IO Chipset Disabled 3F8 IRQ4 2F8 IRQ3 ormal 378 Normal IRQ7 Disabled Disabled Enable onboard Floppy Controller for use at parallel port lt Select Screen Select Item t change option Fl General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature OnBoard Floppy Controller Options Disabled Enabled Description Enable or disable the Floppy Controller Serial Port1 Address Disabled 3F8 IRQ4 3E8 IRQ4 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Serial Port2 Address Disabled 2F8 IRQ3 2E8 IRQ3 3E8 IRQ6 3E8 IRQ10 2E8 IRQ11 Select the BASE addresse and IRQ The available options depends on the setup for the the other Serial Ports Serial Port2 Mode Normal IRDA ASK IR Select Mode for Serial Port2 Parallel Port Address Disabled 378 278 3BC Select the I O address for the LPT
92. tect if the system case has been opened This signal s status is readable so it may be used like when the Intruder switch is not needed EXTernal BATtery the terminal of an external primary cell battery can be connected EXT BAT to this pin The terminal of the battery shall be connected to GND etc pin 10 The external battery is protected against charging and can be used with or without the on board battery installed The external battery voltage shall be in the range 2 5 4 0 V DC Max load is 0 75A 1 5A lt 1 sec General Purpose Inputs Output These Signals may be controlled or monitored through GPIOO 7 the use of the KONTRON API Application Programming Interface available for Win98 WinXP and Win2000 FAN 3 speed control OUTput This analogue voltage output signal can be used to control the Fan s speed output has 16 values in the range from 0 5V For more information please look into the datasheet for the Winbond controller W83627 FANS Input OV to 5V amplitude Fan 3 tachometer input Max load is 0 75A 1 5A 1 sec Temperature sensor 3 input Recommended Transistor 2N3904 having emitter connected to GND pin 25 collector and basis shorted and connected to 23 Temp3 In Further a resistor 30 1 shall be connected between pin 23 24 Vref VREF Voltage REFerence reference voltage to be used with input
93. tem error where the result will be catastrophic If an agent does not want a non maskable interrupt NMI to be generated a different reporting mechanism is required SERR is pure open drain and is actively driven for a single PCI clock by the agent reporting the error The assertion of SERR is synchronous to the clock and meets the setup and hold times of all bused signals However the restoring of SERR to the deasserted state is accomplished by a weak pullup Same value as used for s t s which is provided by the system designer and not by the signaling agent or central resource This pull up may take two to three clock periods to fully restore SERR The agent that reports SERR s to the operating system does so anytime SERR is sampled asserted INTERRUPT PINS OPTIONAL Interrupts on PCI are optional and defined as level sensitive asserted low negative true using open drain output drivers The assertion and deassertion of INTx is asynchronous to CLK A device asserts its INTx line when requesting attention from its device driver Once the INTx signal is asserted it remains asserted until the device driver clears the pending request When the request is cleared the device deasserts its INTx signal PCI defines one interrupt line for a single function device and up to four interrupt lines for a multi function device or connector For a single function device only INTA may be used while the other three interrupt lines have no meaning
94. tivity to bring the system out from power saving states The supply is provided through a 1 1A resetable fuse 4 31 Stacked MINI DIN keyboard and mouse Connector MSE amp KBD Pull pores iil _ INI TBD 22 SVISBSV ___ __ _ KBDDAT TBD Signal Description Keyboard amp and mouse Connector MSE amp KBD see below 4 3 2 keyboard and mouse pin row Connector KBDMSE Pull Type loh lol U D KBDCLK toc 2 KBDDAT Signal Description Keyboard amp and mouse Connector KBDMSE Sigma Description MSCLK Bi directional clock signal used to strobe data commands from to the PS 2 mouse MSDAT Bi directional serial data line used to transfer data from or commands to the PS 2 mouse KDBCLK Bi directional clock signal used to strobe data commands from to the PC AT keyboard KBDDAT Bi directional serial data line used to transfer data from or commands to the PC AT keyboard DVS 50580 V1 0 C Kontron 886LCD M Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 27 of 80 4 4 Display Connectors The 886LCD board family provides onboard two basic types of interfaces to a display Analog CRT interface and a digital interface typically used with flat panels The digital interface to flat panels can be achieved through the onboard LVDS dual channel interface and
95. tri state capability TTL compatible LVDS Low Voltage Differential Signal PWR Power supply or ground reference pins loh Typical current in mA flowing out of an output pin through a grounded load while the output voltage is gt 2 4 V DC if nothing else stated lol Typical current in mA flowing into an output pin from a VCC connected load while the output voltage is lt 0 4 V DC if nothing else stated Pull U D On board pull up or pull down resistors on input pins or open collector output pins Note Special remarks concerning the signal The abbreviation TBD is used for specifications which are not available yet or which are not sufficiently specified by the component vendors DVS 50580 V1 0 Kontron 886 0 Family always Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 22 of 80 41 Connector layout 4 1 1 886LCD M Flex SATAO IDE_S2 IDE_S DDR1 DDRO SATA1 FRONTPNL 5 5 5 AGP DVO ATXPWR gt 2 INT FEATURE CDROM LPC lt gt COM2 Port2 x COM3 SIO Port1 SIO Port2 _ KBDMSE ETHER2 ETHER3 MSE PRINTER FLOPPY ETHER1 USBO USB2 DVS 50580 V1 0 Kontron 886 Family always Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 23 of 80 4 1 2 886LCD M ATX SATAO IDE_S2 IDE_S
96. tz nur durch den selben oder einen vom Hersteller empfohlenen gleichwertigen Typ Entsorgung gebrauchter Batterien nach Angaben des Herstellers ADVARSEL Eksplosjonsfare ved feilaktig skifte av batteri Benytt samme batteritype eller en tilsvarende type anbefalt av apparatfabrikanten Brukte batterier kasseres i henhold til fabrikantens instruksjoner VAROITUS Paristo voi r j ht jos se on virheellisesti asennettu Vaihda paristo ainoastaan laltevalmistajan suosittelemaan tyyppiln H vit k ytetty paristo valmistajan ohjeiden mukaisesti Kontron 386 Family always a Jump ahead 00474 1 Public User Manual Date 2006 06 02 Page 10 of 80 3 System specification 31 Component main data The table below summarises the features of the 886LCD M Flex 886LCD M ATX and 886LCD M mITX embedded motherboards Form factor 886LCD M Flex Flex ATX 190 50millimeters by 228 60millimeters 8861 ATX 190 50millimeters by 304 00millimeters 8861 mini ITX 170 18millimeters by 170 18millimeters Processor e Support for Intel Pentium M and Celeron M Processors in mPGA478 socket with 400 2 system bus Banias 0 13um and Dothan 0 09um family processors Flex and ATX 2x184pin DDR SDRAM Dual Inline Memory Module DIMM sockets 1x184pin DDR SDRAM Dual Inline Memory Module DIMM socket Support for DDR 266 333 PC2100 PC2700 Support for up to 2GB of system
97. ut will be identical to the pinout of Serial Com1 DVS 50580 V1 0 Kontron 386 Family always a Jump ahead KTD 00474 I Public User Manual Date 2006 06 02 Page 40 of 80 4 9 Ethernet connectors 886LCD M Flex 886LCD M ATX and 886LCD M mITX boards supports channels of 10 100 1000Mb Ethernet In order to achieve the specified performance of the Ethernet port Category 5 twisted pair cables must be used with 10 100MB and Category 5E 6 or 6E with 1Gb LAN networks The signals for the Ethernet ports are as follows Signal Description MDI 0 In MDI mode this is the first pair in 1000Base T i e the DA pair and is the transmit MDI O pair in 10Base T and 100Base TX In crossover mode this pair acts as the DB pair and is the receive pair in 10Base T and 100Base TX MDI 1 In MDI mode this is the second pair 1000Base T i e the BI DB pair and is the MDI 1 receive pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the DA pair and is the transmit pair in 10Base T and 100Base TX In MDI mode this is the third pair in 1000Base T i e the DC pair In MDI crossover mode this pair acts as the DD pair In MDI mode this is the fourth pair in 1000 i e the BI DD pair In crossover mode this pair acts as the pair Note Media Dependent Interface 4 9 1 Ethern
98. ve and Exit S M A R T Auto ESC Exit 32Bit Data Transfer Disabled Feature Options Not Installed Auto CDROM ARMD V02 58 C Copyright 1985 2005 American Megatrends Inc Description Select the type of device installed LBA Large Mode Disabled Auto Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads and Sectors Block Multi Sector Transfer PIO Mode Disabled Auto Select if the device should run in Block mode Selects the method for transferring the data between the hard disk and system memory The Setup menu only lists those options supported by the drive and platform DMA Mode Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMAS UDMA4 UDMAS Auto Disabled Enabled Selects the Ultra DMA mode used for moving data to from the drive Autotype the drive to select the optimum transfer mode Note To use UDMA Mode 2 3 4 and 5 witha device the harddisk cable used MUST be UDMA66 100 cable 80 conductor cable Select if the Device should be monitoring itself Self Monitoring Analysis and Reporting Technology System 32Bit Data Transfer DVS 50580 1 0 Disabled Enabled Select if the Device should be using 32Bit data Transfer G KTD 00474 Feature ATA PI 80Pin Cable Detection Public User Manual Options Host amp Device Host Device Kontron 886LCD M F
99. xit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc 8 7 1 Advanced Chipset Settings Intel Montara GML NorthBridge Configuration Chipset Configure advanced settings for NorthBrigde Select which graphics controller to use as Primary Video Device Auto the primary boot Graphics Mode Select Enabled 8MB device IGD Device 2 Function 1 Enabled lt Select Screen 11 Select Item Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit V02 58 C Copyright 1985 2005 American Megatrends Inc Feature Options Description Primary Video Device Internal Select which graphics controller to use as the External PCI primary boot device External AGP Auto Graphics Mode Select Disabled 1MB 4 Select the amount of system memory used by the 8 16MB 32MB internal graphics device IGD Device 2 Function 1 Disabled Setup the multimonitor function Enabled DVS 50580 V1 0 KTD 00474 Public User Manual Kontron 8861 Family always a Jump ahead Date 2006 06 02 Page 75 of 80 8 7 2 Advanced Chipset Settings SouthBridge Configuration Chipset Extended IOAPIC OnBoard AC 97 Audio OnBoard Amplifier E EJ FJ Du Enable Disable the ICHA IOAPIC function lt Select Screen 11 Select Item Ent
100. yte enables determine which byte lanes carry meaningful data The commands issued on the G_CBE signals during FRAME based AGP transactions are the same G_CBE command described in the PCI 2 2 specification During PIPE Operation When an address is enqueued using PIPE the C BE signals carry command information The command encoding used during PIPE based AGP is different than the command encoding used during FRAME based AGP cycles or standard PCI cycles ona PCI bus During SBA Operation These signals are not used during SBA operation Parity During FRAME Operation G_PAR is driven by the GMCH when it acts as a FRAME based AGP initiator during address and data phases for a write cycle and during the address phase for a read cycle G_PAR is driven by the GMCH when it acts as a FRAME based AGP target during each data phase of a FRAME based AGP memory read cycle Even parity is generated across G_AD 31 0 and G_CBE 3 0 During SBA and PIPE Operation This signal is not used during SBA and PIPE operation Hub Interface signals HL 10 0 Packet Data Data signals used for HI read and write operations HLSTB Packet Strobe One of two differential strobe signals used to transmit or receive packet data over HI HLSTB Packet Strobe Complement One of two differential strobe signals used to transmit or receive packet data over HI Clocks CLKIN Input Clock 66 MHz 3 3 V input clock from extern

User Manual for the Mother Boards: 886LCD-M/Flex 886LCD

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