Home

SAM9N12/CN11-EK User Guide

Contents

1. 1V8 220ohm at 100MHz A1V8 k 1 2 C126 C127 9 C128 e C129 sl C130 e C131 e C132 10uF 100nF 100nF 100nF TT 100nF 100nF 4 7uF GND ETH GND ETH L23 A3V3 2200hm at 100MHz 3V3 gt ge 1 2 C133 e C134 100nF 10uF A1V8 41V8 Nu L GND ETH GND ETH o Ka joo A3V3 4 D 0 15 unig gt Ree 5 die J00 0061 000 o e Bas 3 1 p TET O al 888 3 T ale ag so g 8 S 77 8 mm 4 KS SP 20 2 mx SD2 O SD3 SD4 SD5 D RX 3 SD6 RXP1 28 3 DMG Oo SD7 47 5 kr WY 1V8 SD8 RXM1 SI s T SD9 Y ve Pa ETH D10 SD10 6 RD RX ETH D11 34 R176 e R177 R178 e R179 ETH Di2 3a SDi 1V8 ETH D13 32 012 T 49 9R 1 49 9R 1 49 9R 1 49 9R 1 D 9 ETH Di4 31 SD13 le 75 75 E R180 R181 R182 ETH Di5 SD14 R183 7 75 4 DNP S47K Za7k E SD15 DNP dic WO eecs H Se WZ vi 10 FT 100nF n 5 KSZ8851 16MLL EESK L Bei g s s Lay jid um EED IO 1V8 KG GND ETH 8 1 ant mee T GND ETH 9 3V3 Lo R197 S PDi9 gt 124 CSN SIR 9 NWRE E 54 WAN 2 7 eios R184 Di NAD lt 4 RON PILEDO 1 PILED PiLEDO 2705 10 PD21 lt INTRN P1LED1 NN R186 5 Di 470R 22 R185 3 01K 196 P1LED1 12 R187 228 3 ISET MN i MN PD20 lt VN PME xy 24 R
2. ey oore 908 ii Bla po FER FLASH A3 mae DAI 58 FLASH_D2 FLASH A4 23 e GE 4i FLASH_D3 4 DDR2 AQ 18 FLASH Ag 2 5 004 45 FLASH DS DDR2_A2 M8 98 DDR2 DO FLASH A7 ag 45 DOS Cer FLASH_D6 An ppr2 spram DQO G2 DDR2 D1 FLASH A8 19 7 DQ6 53 FLASH D7 LE LAE DDR2 D2 FLASH A9 8 A8 DQ 35 FLASH D A2 DQ2 3 DDR2 D3 FLASH A10 7 9 DQ8 37 FLASH D9 A3 DQ3 Cp DDR2 D4 FLASH A11 ST Alo DQ9 45 FLASH D10 A4 DQ4 Hg DDR2 D5 FLASH A12 5 At DQ10 722 FLASH D11 AS DOS Ce DDR2 D6 FLASH A13 4 Al2 Dail Cas FLASH D12 AG DOG DDR2_D7 FLASH_A14 3 A13 DQ12 50 FLASH D13 A7 DQ Fog DDR2 D8 FLASH_A15 2 A14 DQ13 32 FLASH D14 A8 DQ8 DDR2 D9 FLASH A16 15 DQ14 FLASH D15 DDR2_At2 M2 9 Das Ce DDR2_D10 FLASH_At7 55 16 DQIS DDR2_A13 EC A10 DQ10 ps DDR2_D11 FLASH A18 18 217 DDR2 A14 ney An Dat pr DDR2 D12 FLASH A19 Tr 18 56 AI DQ12 pg DDR2 D13 FLASH A20 18 19 WAIT DDR2 A16 L2 DQ13 Cer DDR2_D14 FLASH AT Tr A20 46 BAO DQ14 DDR2 D15 FLASH A22 19 21 ADV DDR2 A18 r BA DMS FLASH_A23 gj 336 DDR2 A15 BA Ka ze 26 ij K9 At 27 H oT VDD 100nF 1v8 RFU2 voo H 100nF im 45 ck nc H3 VDD mg JOE E 100 44 Ka VDD L 100nF 4 MW RST HvB 4 DDR2 SDCKE gt CKE VDD 100nF 8 NOR NRSTT gt 53 Took 15 33 T J8 J MN WP VCC 38 f 4 DDR2 SDCK gt Sei CK VDDL 100nF veca 4 DDR2_NSDCK gt
3. 3V3 R15 47K a Se 3v3 SN74LVC1G32 5 AH I LCD DET 7 D1 43V3 5V_LCD L6 5V B PC25 VDDBU Je BAT54C T 2200hm at 100MHz T MN6 SF 2 1 4 1 ch 2 8 OUTA ENA e R16 vR 4 Y GND 3 TP13 3 015 7 2 R17 OR PCHi T E E LTN FLGA MW gt is 100nF fe cis S Kl 6 3 R18 OR PB8 TT 2 2uF S 2200hm at 100MHz T JONG Fes WW TE 1 2 5 OUTB ENB 4 R19 vR PB7 r SP2526A 2 T MN7A POWER 1V J2 VDDCORE ro PE VDDCORE 375 e C22 C23 C24 C19 1 N 2 R20 27R N17 VDDCORE Ces 100nF T 100nF T 100nF T 100nF Ae MN HDM VDDCORE C20 le C25 4 Eoo 3 am 5 R21 A ZR 33uF 100nF USBA i H10 VDDIOM VDDIOM Hg T 5 6 D2 D3 VDDIOM Hag d T L ae VDDIOM cas 021 oe Ini ni n L14 s VDDNF gt VDDNF pna 53 T VDDNF een USB 5V VDDNF d 4 VDDIOP1 e C28 el C29 C30 T 1 00nF 100nF 100nF pa aAA STR 5819 VDDIOP1 H 1 V5 5MLA0603 3037 Je 081 e C32 VDDIOP1 C33 C34 SS 10uF 100nF 10pF 100nF 100nF LL e voDioPo L I VDDIORO VDDIOPO C35 C36 R16 100nF 100nF d R17 DDM USB Micro B al S DDP 18 VDDPLL 10uH 150mA 1V pan D4 D5 D6 VDDPLL FEN TVS TVS TVS GNDPLL mm ve L9 1R E 10uH 150mA VDDANA q N 43V3 H Es V5 5MLA0603 _ oon Be Amt
4. DO 2 7 DDR2 DO EBI Di 3 g DDR2 Di EB D2 4 5 DDR2 DZ EBI D3 1 8 DDR2_D3 EBI D4 4 5 DDR2 D EBI Ds 2 7 DDR2 D5 EBI De 1 8 DDR2 D6 EBI D7 8 6 DDR2_D7 58 1 8 DDR2 D8 EBI Do 2 7 DDR2 DS FBI Dio 3 6 DDR2 D10 EBI Di1 4 5 DDR2 Di EB DIZ 1 8 DDR2 Diz EBLDIS 2 7 DDR2_D13 FBI Di4 4 5 DDR2 D14 EB Di5 3 6 DDR2 DIS DO 4 5 FLASH DO EBI Di 3 6 FLASH DI EBI D2 2 7 FLASH DZ EBI D3 1 8 FLASH D EB D4 T 8 FLASH D EB Ds 2 7 FLASH D5 EBI D 3 6 FLASH D EBI D7 5 FLASH 57 58 1 8 FLASH 58 EB Do 2 7 FLASH D9 FBI Dio 3 6 FLASH D10 EBI Di1 4 5 FLASH Di1 EB DIZ 1 8 FLASH DIZ EBI Di3 2 7 FLASH D13 EBLDi4 3 6 FLASH Di4 EBI Di5 5 FLASH Di5 EBI DO 1 8 ETH DO EBI Di 2 7 D1 EBD 3 6 52 EBI D3 4 5 ETH Da EBI D4 1 8 ETH D4 EBI DS 2 7 D5 EBI D 3 6 ETH 56 EBI D7 4 5 D7 58 1 8 ETH 58 EBI D9 2 7 ETH D9 FBI Dio 3 6 ETH Dio EBI Di1 4 5 ETH Di EBI DIZ 1 8 ETH Di2 EBLDi3 2 7 ETH Di3 EBLDi4 3 6 ETH Did EB Di5 4 5 ETH D15 DO 1 14A 8 NAND FSH DO EBI Di 2 7 NAND FSH Di EBID2 3 6 NAND FSH D2 EBI D3 4 5 NAND FSH D3 EBI D4 5 NAND FSH D EBI D5 3 amp NAND FSH D5 EB De 2 7 NAND FSH D6 EBI D7 1 8 NAND FSH D7 PDO NANDOE R48 oR PDT NANDWE R49 MVV oR PDZ NANDALE R50 V OR PDS NANDCLE R51 VOR PDA NANDCS EE PD5 NANDRIB R53 VV OR a gt NANDOE 6 NANDWE
5. 3V3 EBI DDR2 INTERFACE ul POWER 1V8 E LL tt ul E PIO 1V EBI DATA INTERFACE EBI FLASH INTERFACE Sheet 2 5 7 RES ARRAYS EBI ADAPTER 0 EBI ADDRESS INTERFACE EBI NANDFLASH INTERFACE HOST Kb DEVICE Sheet 6 INT ARM9 P INTERFACE rocessor EBI BUS INTERFACE Er er SAM9CN11 St Sheet 3 Ke LFBGA217 EBI ETH INTERFACE 84 Sn 2 ZG Fe eu M DBGU Sheet 9 Sheet 4 LCD INTERFACE 4 3 PIO 480x272 TFT PIO A D CONNECTOR TOUCH SCREEN 1 WRIE EEPROM ISI CAMERA INTERFACE PIO SERIAL Sheet 3 4 5 EEPROM ZIGBEE LINEOUT INTERFACE Fa SERIAL DATA FLASH CARD Sheet 8 READER Sheet 5 Sheet 7 PIO MUXING PIOA USAGE PIOA USAGE PIOB USAGE PIOB USAGE PIOC USAGE PIOC USAGE PIOD PIOD NOTE PAO TXDO PA16 MCI CDA PBO PB16 VBUS SENSE PCO LCDDATO PC16 LCDDAT16 PDO NANDOE PDie D26 PA1 RXDO PA17 MCI CK PB1 PB17 AD6 PC1 LCDDAT1 PC17 LCDDAT17 PD1 NANDWE PD17 D27 B PA2 ZB_IRQO PA18 MCI DAT PB2 ROM CODE PB18 ADIRG PC2 LCDDAT2 PC18 LCDDATIB PD2 NANDALE A21 PD18 D28 DNP means the component is not populated by default PA3 ZB IRQ1 PA19 MCI DA2 PB3 PB USER1 PC3 LCDDAT3 PC19 LCDDAT19 PD3 NANDCLE PD19 NCS2 PA4 One Wire PA20 MCI DA3 PB4 USER LED1 PC4 LCDDAT4 PC20 LCDDAT20 PD4 NANDCS PD20 D30 PA5 ZB RSTN PA21 SPI MISO PBS USER LED2 PC5 LCDDAT5 PC21 LCDDAT21 PD5 NWAIT PD21 D31 PAG ZB SLPTR PA22 SPli MOSI PB6 PWR LE PC6 LCDDA
6. PC9 LCDDAT9 R107 VVV 22R 27 R10 22 LCDDATiO PCiO PCT LCDDATI1 RIO 22H 29 MN L 5V_LCD J10 ESQ 120 33 L D oo PC16 R114 AA 228 Ein R115 22R LCDDATI7 7 PC18 LCDDATT8 RIV VV 22 Te Ri1GV VV 22R LCDDATi9 PCI9 PC20 LCDDAT20 22H cia PC2i PC22 LCDDAT22 RIGA ZAR he ECH LCDDAT23 98 ODDA TN RH A ER PS PC24 LCDDISP R119 AA 228 is Li PC26 PC27__ LCDVSYNG RI2I VN 22R is c LCDHSYNC PC29 LCDDEN R12 22H 19 LCDPCK PC30 MN 21 PB11 ADO XP R126 AA OR IT 33 BH AD1 XM PBi3 AD2 YP Ri28 YOR zr Md PBi5 ADA R130 NOR rie De 29 PA21 SPI MISO R131 oR rue PASS SPI SECH RSV VOR 51 BH a E137 VV OR Sem Ie PBO Ria VV Von 1 137 VDDANA m 439 HH TL R 10K 3 LCD DET TT PB2 1 3 NRST NRST 39 Ee R150 AA 100K wpppu WAKE UP A 2 B 4 gt WKUP 3 PB4 1 3 PB USER PB3 PA 0 31 5 8 PB 0 18 3 5 8 PC 0 31 3 5 AIMEL eg EE ROUSSET 1 SAM9N12 EK RevC BGA217 SERIAL INTERFACES This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings C pl nn eee NOR NAST PP EBI PP EEE EENES ers B5 NOV 11 XXX KX XXX XX p5 SEPT 11 XXX KX XXX XX A INIT EDIT PP _P0
7. C41 e20pF Ut um 8 EST Zen Ob i 16MHz e U16 VDDIOPO A C45 Je 20pF XOUT p VDDUSB ms GNDUSB 4 146 C47 e 15pF A4 VDDOSC 10uH 150mA 3V3 XIN32 Ed Le vbbosc H4 i DOON d R35 32 768 kHz 21048 E R29 Lon e 100K C50 le 15pF A3 T 100nl T 100n VDDIOPO AL XOUT32 SS C51 je 4 7uF IT a 1 VDDBU 1q D 54 JTAGSEL SIS ee SD1 4 3 R30 DNP 5 Lid oa E WWW NTRST VDDFUSE 10uH 150mA 3V3 VDDANA de Tia N16 T T 100 Ri2 TMS VDDFUSE 6 dek TCK GNDFUSE 12 11 R31 OR T14 5V H c ANN Ui4 RICK JP3 15 R33 OR TDO 2 5 7 MN d o R34 20 19 R13 4 7K 7 9 NRST gt NRST e AS TP16 O 7 WKUP WKUP D7 2 SHDN TI 85 SHDN ADVREF 45 EG A LM4040 3V VDDIOPO NI5 uo 1 056 VDDBU 100nF i uuu VDDBU VER 5 7 31 R36 gaasssss GNDBU SR 10K 1 ous 555556558888 een FSS E Ee L 1 1T 1 1 1 4 PC31 oo00000000000 SE in AIMEL PB7 EM D ROUSSET A INITEDIT PP 05 APR i2 PP 05 APR12 PB8 E MODIF DES DATE VER DATE pate SAM9CN11 EK SCALE 4 1 REV EP AT91SAM9CN11 BECH A 6 This agreement is our property Reproduction and publican without ur DEE to legal proceedings SAM9CN11 LBGA217 EBI B14 EBI_DO DO A14 EBI D1 Di Fora EBI_D2
8. C53 45V 100nF 100nF JP3 T 1R E C54 Je AUF T as TP16 D7 A2 e 055 2 2uF A 056 VDDBU 100nF De D5 el Ce AIMEL B nn eee NOR NAST PP EBI PP EEE EENES ers B5 NOV 11 XXX KX XXX XX B5 SEPT 11 X XXX XX XXX ROUSSET A INIT EDIT PP P0 AUG 11 L l MODIF DES DATE _SAM9N12 EK_RevC SCALE 4 4 BGA217 iL AT91SAM9N12 4 C This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings 2 1 EBI D 0 15 MN7F SAM9N12 LBGA217 EBI B14 EBI DO DDR2 D 0 15 6 DDR2 A 2 18 6 p Aid EBI Di lt _ gt D 0 15 6 gt A 2 18 6 C14 EBI D2 D2 D13 EBI_D3 D3 618 EBI_D4 EBI DO 2 BRB 7 DDR2 DO EBI A2 4 5 DDR2 A2 D4 873 EBI_D5 EBI_D1 3 AR 6 DDR2 D1 EBI_A3 3 B ISE 6 DDR2_A3 DS A13 6 EBI D2 4 BR 5 DDR2 D2 EBI 4 2 BRIS 7 DDR2_A4 D6 C12 EBI D7 EBI D3 1
9. 5012 49 98 1 4998156 499R1 mmm e cns pole T tour R180 lt R181 SR 182 5514 R183 P z DNP S4K Sam 8015 ebs ONE al on Hois er T m KSZ8 851 1 6MLL EESK Ly 19006 GNO ET Lin i x si E vd ox Em I o gu R196 7 GND 12 R197 3 W 9 ECN SR 9 NW RE L 5 WRN 2 E ES FRON PI LEDO T PILEDT PiLEDo 405 10 PD21 INTAN PI LED R186 uz BE zem MR n 3 E R 1874 4 228 pi Sg 2 oe x vs 3 28 3 ava TER 5 TTF MN 2008 og io B ve 4 Biz 1007 l 138 Riga 2222 22 e550 gt NO NOG WOW 247 8888 22 oss MHz cuo Eu 2 P F bett wa CA E 3 4 R189 Rigo anD Y er R R 7 GND Se GND EM NOR NRST SAM9N12 CN11 EK User Guide 4 13 11186A ATARM 29 Nov 12 4 3 15 Audio The SAM9N12 CN11 EK includes a WM8904 audio CODEC for digital sound input and output This interface includes features and audio jacks for m Line In J13 m Headphone output J15 m Microphone on board The SAM9N12 CN11 programmable clock output PCKO is used to generate the WM8904 master clock MCLK The bit clock is shared it can be the SSC Transmitter Clock TK or the Receiver Clock RK The default setting on SAM9N12 CN11 EK is TK and RK shorted together through R159 R160 Please note that try ing different ADC DAC rates would mean different RK TK rates this default setting can be modified The 0 ohm resistors R159 to R163 have been implemented to offer a disconnection poss
10. AIMEL eege 7 1 DM Board Schematics This section contains the following schematic m LCD Board SAM9N12 CN11 EK User Guide Section 7 DM Schematics 7 1 11186A ATARM 29 Nov 12 3V3 LCD ava a R5 QR DNP ud x R6 QR DNP 1 2 DI d S 1 VLED ze Rao 5 AK 15 zB IRQ1 5 MEB 2 VLED ax TWcko 7 BE Ce TWDO 2A30 a WEEDS l g 3 8 LCD H BE Green7 L DGND 77 2 Greens 14 VDD 5 RO R53 OR Redd 19mm 14 Green5 REDO Ce Ri R54 OR Redi 15 E Greend 12 REDI 7 R2 R55 OR Red2 17 wx 8 Buet RED Tg R3 R56 OR Red3 A Bue 19 xm 2 Biue2 REDE R4 R57 OR Red4 C20 Blues 21 m 22 Buet RED E10 R5 R58 OR Red5 100n Blues 23 AK 24 BlueS REDS 277 R6 R59 OR Red Biue 25 gg Green REDS R7 R60 OR Red7 Green SC mm 28 Green2 RETA EE GO R61 OR Green0 Green 29 m 30 PIN 40 oreo E Gt R62 OR Greent 15 G2 R63 OR Green2 TSM 115 01 L DV A GREEN2 ae G3 R76 OR Green3
11. BATTHRSV SZ C89 II PET vss2 PA17 CK R106 AA ED 100nF Ze SUE L AE PA16 CDA R110 27R 5 PA20 3 BRAK 6 CMD DI CD DAT3 CS PA19 DA2 4 BREED 5 Seen SD CARD SD CARD MN16 MAX3232CSE VDDIOPO 16 voc eu H d co TF 100nF VDDIOPO ci l Sy c2 4 D 094 1 R135 R136 E SR ER 45 S 100nF 8 GND Ce 7 Jd 14 St BED 72 TIIN TIOUT Fag 19 RIOUT RAIN 7 i Sy T2IN T2OUT 9 R2OUT 2 5 UART J12 PAS 38 RSTN R142 A OR 1 2 Ri43 AA OR ZB IROO PA2 PA3 ZB IROI BAN OR 3 4 RENN OR ZB_SLPTR PAG L13 PAB SP NPCSO RIAN WOR 5 8 RIAA OR SPI MOS PA22 PART SPI MISO RIEN OR 7 8 Ri OR SPI SPCK PA23 2 at 100MHz 43V3 9 10 1 2 e C95 le 096 _le c97 18pF T 22nF T 2 2uF ZIGBEE VDDANA E El 2 R151 A4 OR Analog input PB17 10K NN Analog input le 098 TT 10nF PA 0 31 5 8 199 ig Han H PA2 28 IRQO R89 AAN OR See 90 ZB IRON PAS PA31 TWCKO AWOR Tiani R92 NAN OR TWDO PA30 gleef Re3 AAN 22R LODDATT5 PCIS xp R94 MWA 22R LCDDATI4 PC14 13 ER 14 R95 MN 22R LCDDAT13 PC13 15 T 16 R96 ANN 22R LCDDAT12 PC12 la
12. Se G4 BIR Green E ul EG G5 R78 OR Green5 8 4 3 LCD 18 Schon 480 H xRGBx272 V 8 8 EE BO RET NAAR Blue i INTER Bi 82 U Buet 3V3 LCD res B2 R83 OR Blue F 24 R84 OR Blues at ene BLUES 25 B4 R85 OR Buet Redd 5 pa EL B5 R86 OR Bue Re 7 ana 3 BLUES 77 B6 RB7 VN OH Blueb R44 Rt ings BLUES 28 B7 RES OR Blue7 4 7K Rd idus DGND FER J i DISP 15 ad 16 I DOLK HE DSP VSYNC 47 BB 38 DISP Hap HEURE VDEN 15 29 25 HSYNC L VEYNC ava pagsara VSYNC 3 VDEN peii __TP_YU 23 29 24 jr me 813 P xR 25 25 NC 56 ADi IR 27 gg 28 Rig QR WIRE Pad Ve R89 OR TP gt Lag 1 SES R90 OR s TTP YD e SH oo LB 39 Rot OR TP XL DNP 1 Ba E 2 x H R GC 4 4 TED SELCONFIG R22 oR ao LCD DETECT R23 oR Ji 5 Y pae 1 a loo S TSM T20 01 L DV A D SV INTER 22uH A KR 880mA d rs 3V3 LCD 5V 217mA D1 T MN5 di c7 RB160M 60 Ti no OR ia FE z MODE VSS KEYO 18 m Am as cis R42 os LoD ter EE EE KEYO 92 R66 ATK DNP DNP DNP DNP DNP HLUD RESETA 4 RESET keve R68 AT c21 Z8 R00 5 SE keys 10 R69 ATK R75 R67 THEO e SoL V L LCDPWM KEYS KEYS QT1070 9010 VLED 10k R40 TWCKO Bley 8 10k 2x5 LEDs Back Light TWDO iE EN 7 5R ZP RESETE 13 CHANGE KEY6 ta RESET KEYS H KEY4 5 ETE E pm pet ar oe ej 7 5 NC4 KEY2 i ie Kev 4 KEY2 AZ 4 7k DNP ENG e 2 KEV RA 4 Tk DNP A Ke
13. m EBI D13 7 FLASH D13 RRS 7 FLASH A1 c9 EBI DOMO EBI D14 3 VRI FLASH _D14 PRQ 6 FLASH_A2 DOMO Cas EBI DOMI EBI D15 4 BRIN 8 FLASH D15 BRED 5 FLASH A3 er Les EBI DQs0 Rd 5 A7 EBI DOS EE DQS1 IG p p lt gt D 0 15 9 Rd RAS pg EBI CAS EBI DO 1 ABRIRA 8 ETH DO RIA 8 FLASH_A8 CAS EBLD1 2 REE AR 6 FLASH B10 EBL SDWE EBI D2 3 deu BREE 7 FLASH A10 SDWE 570 EBI_SDCKE EBI_D3 4 BRIO 5 ETH_D3 R325 FLASH A11 SDCKE 55 EBI SDA10 EBI D4 1 BROX 8 ETH_D4 DA 8 FLASH AT SDA10 ATO EBI_SDCK EBI D5 2 B IER 7 DS 5 FLASH A13 SDCK ag EBI NSDCK EBI D6 3 AYR 6 D6 Bob 7 FLASH_A14 SDCKN EBI_D7 4 BR HS D7 6 FLASH A15 B7 NCSO EBI D8 1 HAX 8 ETH_D8 R AK 8 FLASH A16 80 Br NCSI SDos gt NOSO 6 EBI De 2 ARS 7 ETH D9 PRAS 7 FLASH A17 NCS1 SDCS EBI_D10 3 BR 6 ETH D10 D 6 F A6 NWRE EBI D11 4 NAR 5 ETH_D11 RASA 5 FLASH_A19 NWRO NWRE Ce gt NWRE ai EBLD12 1 NAM 8 ETH_D12 BRERK_8 FLASH_A20 NWR1 NBS1 p7 EBI D13 2 ARIE 7 ETH D13 PD2 BR 6 FLASH A21 NWR3 NBS3 DQM3 EBI_D14 3 BR 6 ETH D14 PD3 BREE 7 FLASH A22 AR Deh 5 FLASH_A23 ie LET NRD NRD 69 EBI_D15 HS DIS lt gt NAND FSH D 0 7 6 EBI DO 1 ARRI4A 8 NAND FSH DO EBI Di 2 VRI 7 NAND FSH Di EBI D2 3 A NAND FSH DS EBI D3 RAS 5 NAND FSH D3 EBI D4 VRV 5 NAND FSH D4 EBI D5 3 R 6 FSH DE MN7E EBI_D6 2 B IER 7 NAND FSH 6 SAMONI2_LBGA217 PIOD EBI_D7 1 B IS 8 NAND FSH D7 PDO NANDOE PD1 NA
14. 11 E 1V8 GND ETH 7 Aa CMD R196 GND ETH K 8 R197 PDi9 gt 1 CSN 4 7K MARE 5 WRN 2 i P1LEDO D ND PILED PILEDI P1LEDO PD21 amp INTRN P1LED1 ger ftis 3 01K 1 P1LED1 R187 22R 3 EE PD20 TI MN PME ms x 24 ale 3V3 1V8 23 RSTN MN20 SN74LVC1G07 el C138 ae Sees Bg IH wc vec 100nF lt 47K 3888 22 NRST Da Ter megs re GND Y z GND NOR NRST lt GND ETH AIMEL KE ROUSSET SAM9N12 EK RevC BGA217 ETH This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings PP p5 NOV 11 XX XXX XX B EBI PP p5 SEPT 11 XXX XX XXX XX A INIT EDIT PP 20 AUG 11 XXX XX XXX XX IRE MODIF DES DATE VER DATE SCALE 1 1 REV SHEET 9 E 5 2 SAM9CN11 EK Schematics This section contains the following schematics Block Diagram Power Supply AT91SAM9CN11 EBI Interface PIO Interfaces DDR2 NAND Flash Serial Interfaces Audio ETH AMEL 5 2 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide
15. 5 1 SAM9N12 EK Schematics This section contains the following schematics Top Level Power Supply AT91SAM9N12 EBI Interface PIO Interfaces DDR2 NAND Flash Serial Interfaces Audio ETH SAM9N12 CN11 EK User Guide 5 1 11186A ATARM 29 Nov 12 gt Power supPL 3V3 POWER 1V8 PIO 1V Sheet 2 5 7 BI DDR2 INTERFACE EBI FLASH INTERFACE EBI ADAPTER EBI NANDFLASH INTERFACE INTERFACE EBI DATA INTERFACE RES ARRAYS EBI ADDRESS INTERFACE HOST ATMEL ARM9 Processor PIO AE SAM9N12 LFBGA217 ICE INTERFACE EBI BUS INTERFACE aM EBI ETH INTERFACE 10 100 FAST ETHERNET A LCD INTERFACE 4 3 480x272 PIO m CONNECTOR TFT TOUCH SCREEN 1 WRIE EEPROM CAMERA INTERFACE PIO SERIAL Sheet 3 4 5 EEPROM B INTERFACE rd SERIAL HPOUT DATA FLASH ISI a n CARD Sheet 8 S READER Sheet 5 Sheet 7 PIO MUXING NOTE PIOA USAGE PIOA USAGE PIOB USAGE PIOB USAGE PIOC USAGE PIOC USAGE PIOD PIOD D25 DNP i D27 DNE means the component Is not populated by default D28 ZB_IRQ1 MCI DA2 PB USER1 LCDDAT3 LCDDAT19 NANDCLE NCS2 One Wire DAS USER LED1 LCDDAT4 LCDDAT20 NANDCS D30 ZB RSTN SPI1 MISO USER LED2 LCDDAT5 LCDDAT21 NWAIT D31 ZB SLPTR SPI1_MOSI PWR LE LCDDAT6 LCDDAT22 D16 A MCI card detect SPI1 SPCK EN5V HOST LCDDAT7 C23 LCDDAT23 D17 SPI1 NPCSO PB8 OVCUR USB DRXD
16. 6 NANDALE 6 NANDCLE 6 NANDCS 6 NANDR B 6 DDR2 0 15 6 DDR2 A 2 18 6 EBI A2 4 5 DDR2 A2 D EBI A3 3 6 DDR2 A3 EBI A4 2 7 DDR2_A4 EBI A5 1 TE DDR2_A5 EBI A6 3 6 DDR2_A6 EBI_A7 4 5 DDR2 A7 EBLAS 2 7 DDR2 EBLAS 1 X 8 DDR2_A9 EBI A10 1 8 DDR2 A10 EBLATI 2 7 DDR2 ATT EBI_SDATO 3 6 DDR2 A12 EBI A13 4 5 DDR2 A13 EBI A14 1 8 DDR2 A14 EBI A15 2 7 DDR2 A15 EBI A16 3 6 DDR2 A16 EBI A17 4 5 DDR2 A17 EBI A18 R164 R DDR2 FLASH_D 0 15 6 i FLASH A 1 23 6 2 7 FLASH A1 EBI A2 3 6 FLASH_A2 EBI A3 4 5 FLASH A3 EBI A4 3 6 FLASH Ad EBI A5 4 5 FLASH A5 EBLAS 2 7 FLASH A8 9 EBI A7 1 8 FLASH A7 EBI AB 1 8 FLASH EBI A9 3 6 FLASH A9 EBI Ai 2 7 FLASH A10 EBLATI 4 5 FLASH_ATI EBI A12 1 8 FLASH A12 EBI A13 4 5 FLASH A13 EBI A14 2 7 FLASH A14 EBI A15 3 6 FLASH_A15 EBI A16 1 8 FLASH A16 EBI A17 2 7 FLASH_A17 EBI A18 3 6 FLASH A18 EBI A19 4 5 FLASH_A19 POTS 1 8 FLASH A20 PD2 3 6 FLASH A21 PDS 2 7 FLASH A22 POTS 5 FLASH A23 NAND FSH D 0 7 6 B EBI DOMO R37 10R EBI DOMI R38 MVV TOR gt DDR2 6 EBI DASO R39 MVV Tor gt DORA DOM 16 EBI DOS R40 NVV TOR 5 DDR2 DOSO 6 m MW DDR2 DOS 6 EBI RAS R41 10R EBI CAS Rag VV Tor E DERE RAS D E AN DD
17. CK AQ 30 e C68 e C69 VDDQ Ce EEN 32 CE 12 100nFT 100nF Bl VDDQ res 100nF 4 9 ND gt 14 OE VSS 4 DDR2 NCS gt 4 CS VDDQ Les 100nF 49 NWRE gt WER vss VDDQ Le 100nF 43 vss EA VDDQ 100nF 4 DDR2 CAS gt K7 CAS VDDQ ter 100nF DDR2 RAS gt RAS VDDQ Gs 100nF JP9 VDDQ Les 100nF 470 JS28F128P30TF75A 4 DDR2 SDWE gt WE VDDQ beg 100nF 4 Ncso gt db 919 AAA NOR F SH D VDDQ 100nF LA NP DDR2 DASI gt Ei UDQS vaer H Ubas A3 vss ds 4 NAND FSH D 0 7 vss 4 DDR2 DAS gt 7 Loos vss TS 21 toas vss DS H4 NAND FSH DO VSS P ee cay CLE 100 74 NAND FSH Di 83 4 NANDALE Bay ALE NAND FLASH won L NANO FSH DZ 4 DDR2 DOM gt 73 UDM VSSQ 4 NANDOE lt C7 RE wr2sr2cosamp O K5 NAND FSH D3 4 DDR2 Down gt LDM VSSQ 4 NANDWE CE eeh WE 1 03 K6 NAND FSH D VSSQ CE 1 04 ESH R74 470 J7 NAND FSH D5 VSSQ PD6 VDDNI RB GB poe VOS NAND FSH D A2 VSSQ 4 NANDR B 1 R75 370 R B 1 06 NAND FSH D7 Ea DEU VSSQ R76 470K WP c3 as 107 Ha ER R RFU2 VSSQ VDDN MW WP N C26 J3 R7 RFU3 vssa G5 N C27 55 P Ais RFU4 VSSQ 4 Lock N C28 JS ts vssa N C29 VSSDL R77 Ad N C30 res DNP S i NO N C31 DDR2 SDRAM CHE Nes Far ag 1 68 N C33 BT N C4 N C5 aE Nice N C34 HS 1V8 De N C7 N C35 Hp 57 N C36 HNZ Dg N Co N C37 Hag MN15 ES N C10 N C38 wig TT ia NL17SZ126 1V8 EA NEN moas T Amar Zen OE Nae log voel E
18. Clock speed 400 MHz PCK 133 MHz MCK Ports Ethernet USB RS232 JTAG Audio SD card 5V DC from connector B ly vol Gard suppl velage or 5V DC from Micro USB receptacle Temperature operating 10 C to 50 C storage 40 C to 85 C Relative humidity 0 to 90 non condensing Dimensions SAM9N12 CN11 EK 135 mm x 100 mm SAM9N12 CN11 DM 135 mm x 70 mm RoHS status Compliant 2 3 Electrostatic Warning The SAM9N12 CN11 Evaluation Kit is shipped in a protective anti static package The board system must not be subjected to high electrostatic potentials We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments offices with syn thetic carpet for example Avoid touching the component pins or any other metallic element on the board 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide AIMEL CO Section 3 Power Up 3 1 Power up the Board Unpack the board taking care to avoid electrostatic discharge Unpack the power supply select the right power plug adapter corresponding to that of your country and insert it in the power supply Connect the power supply DC connector to the board and plug the power supply to an AC power plug The board LCD should light up and display a graphic demo program Then click or touch icons dis played on the screen and enjoy the demo 3 2 Battery The SAM9N12 CN11 EK ships with
19. DTXD LCDDAT10 LCDPWM D20 SPIO MISO LCDDAT11 LCDVSYNC D21 A MEL SPIO MOSI LCDDAT12 LCDHSYNC D22 SPIO_SPCK LCDDAT13 LCDDEN D23 B NOR NRST EBI INIT EDIT MODIF DES L ENEN EE ee P5 NOV 11 XXX XX XXX XX C SPIO_NPCSO PB14 AD3 PCi4 LCDDATI4 PC30 LCDPCK PDi4 D4 pp ee LCDDATIS PC3i1 OVCURICD DAO TWCKO PB15 AD4 PC15 LCDDAT15 PC31 OVCUR LCD PD15 A20 SAM9N12 EK RevC j L SCALE TOP LEVEL This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings 8 7 6 5 3 4 8 2 1 FORCE POWER ON JP1 5V Lpp Q1 3 SHDN A USB_ 5V REGULATED 5V ONLY SW1 SW SLIDE 3 J1 F1 1 Jack 2 1mm SF1812 2A TP1 5V Q toi Los MN1 RT9018A VIN VOUT VDD no PGOOD aa 2 ZE EN ADJ 5V 3 MN2 LP38692MP 1 8 3 2 3v3 2 VDDIOPO 2200hm at 100MHz TP3 VDDIOP1 2200hm at 100MHz 1 2 Lom xi VDDANA 1V8 TP6 L4 VDDIOM 220ohm at 100MHz 1 2 QI B VDDNF e C9 220ohm at 100MHz TP8 10uF IH MN3 TP10 zii ADP1715ARMZ te C11 Je C144 12k 195 10uF 100nF VOUT 0 8V x Rtop Rbottom
20. PC 0 31 3 5 PB2 1 E 3 NRST ES gt NRST 39 PB3 R150 100K mo m DDBU WAKE UP z d E Ca gt WKUP 3 4 1 m 3 PBUSER reg E ES E ROUSSET INITEDIT PP 05 APR i2 PP 05 APR 12 ES MODIF DES DATE VER DATE ALE REV HEET SAM9CN11 EK SC 1 1 s SERIAL INTERFACES BECH A 2 Ths agreement is our propery Reproduction and publean witout our writen autharizaton sal expose fender legal proceedings 1 3 5 7 5 7 PB 0 18 PA 0 31 Li4 PB10 AUD 1V8 AVDD1V8 2200hm at 100MHz AUD 1V8 s T 1 2 d C99 C100 C101 100nF 10uF TF 100nF R192 oR P e 2 3 SS MW Be AGND AUDIO g 13 S R93 2R s 4 3V3 El d omd C103 d t 100nFT 100nF ER He C104 el C105 e C106 d C107 C108 i 220pF 220pF 1 5 10uF 100nF 4 7uF Sag iue HEADPHONE VW 20R 20R A AGND AUDIO SZ 1 AGND AUDIO ae MN17 id 3 S5 AGND AUDIO a a e PA31 TWCKO 2 a a aa 13 PAS0 TWDO ER Eri a PME x
21. gt gt NRST 283 xi R150 AN 100K ppp WAKE UP 4 23 b4 gt WKUP PB4 1 5 3 PB USER 4 b 1 PBS AIMEL SAM9N12 CN11 EK User Guide ey 4 17 11186A ATARM 29 Nov 12 4 3 21 Expansion Ports Most of GPIOs are led to expansion ports J5 J6 J7 LCD and touch screen connector include J9 and J10 to interface DM board Figure 4 26 PIO Expansion Ports 5V JPS 3V3 5V JP6 3V3 5V JP8 3V3 3 3 6 ES E Ba a 717 HM PC2 EH pe 177 HH KH PD6 E Be PD7 BESTEET RR PD8 85177 XX SS St BR KE PD10 pc8 21 BS E PD11 os HH EH Zeo sj HH RR PD13 POT PR PD14 piel 2 EE GE maj 31 RR PD18 PCi4T 534 X EH Pora 35 EE Ba PD20 D RR PD21 L3 Dz SS ou 5 Figure 4 27 LCD Expansion Ports 3V3 Jo all PA2 ZB IRQO R89 OR OR ZB IRQ1 PA3 PA31 R91 AAN OR 7 a 8 AAN PA30 9 m Le LCDDATI PC15 Sp 12 LCDDAT14 PC14 Slam 12 LCDDAT13 m LS LCDDAT12 XX LCDDATO PCO PC1 SIS LCDDAT2 PC2 LCDDAT3 AAA 228 mm be LC DDATA PC4 PC5 LCDDATS R10 22R 23 gg 24 LCDDAT6 PC6 PC7 LGDDAT7 25 gg 2 LCDDAT8 PC8 DCH LCDDATO R10 XX LCDDAT10 PC10 PC11 LCDDAT11 R109 ap 5V_LCD J10 ESQ 120 33 L D
22. 5 1 SAM9N12 EK Schematics ans sonen senseenserennseerserensensernennneeerenenneneernennseeennnenneens 5 1 5 2 SAMOSCNTI EK Schematics 2 teder adden Saa RE 5 2 Section 6 Display Module TAN EE EE eren denderen 6 1 6 1 Board e EEN 6 1 6 2 Equipment BCEE 6 1 63 Function ele 6 2 BUET TEE 6 2 6 3 2 TFT LCD with Touch Panel 6 2 033 BackLight 6 3 SEE QUOUGH EE 6 4 6 4 Section 7 Essen Me T Is 7 1 7 1 DM Board Schematics sneren nen enseeerenennseerensenseneeenennneenrenennnesennvensensennennnen 7 1 Section 8 Revisi n HEM E 8 1 1 2 AIMEL SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 8 Revision History Hen 8 1 AMEL SAM9N12 CN11 EK User Guide 1 3 11186A ATARM 29 Nov 12 AIMEL eege Section 1 Introduction 1 1 SAM9N12 CN11 Evaluation Kit This User Guide introduces the SAM9N12 and SAM9CN11 Evaluation Kits and describes their develop ment and debugging capabilities running on SAM9N12 and SAM9CN11 devices The Atmel SAM9N12 CN11 Evaluation Kit is a fully featured evaluation platform for the Atmel SAM9N12 and SAM9CN11 microcontrollers The evaluation kit allows users to extensively evaluate prototype and create application specific designs SAM9N12 CN11 Evaluation Kit consists of two boards m The Evaluation Kit EK board m The Display Module DM board 1 2 Use
23. AA OR NG H ONC3 FR z 6 GNC4 PBIB R78 AAA DNP PC28 han J VDDANA R66 M 470R D8 Blue NNN E R67 Ki 470R D9 Green PB5 NNN R68 X 100K NNN 1 R69 i ee D10 Red d AWN Q2 IRLML2502 LED 45V JS 433 i 3 9 ES J5 il ag 2 ETE PAO 5 mm LE 1 6 PAT 7 mm 8 IPA 9 10 PAi8 PA3 11 Rm 12 PA4 13 14 PA20 PAS 15 16 PAZt PAG 17 mpg 18 22 PA7 19 20 PA23 DN 21 mq L22 PA24 PA9 23 24 PA25 PAIO 25 ee 26 PA26 PAI 27 ee 28 PA27 PA12 29 m 30 PA28 PAIS 31 Spy 32 29 PAI4 33 ee 34 PA30 PAIS 35 36 PA31 EIS 37 38 39 EE 40 3V3 Be 1 3V3 5V JP6 3V3 1 3 a ES J6 est EIS PBO 5 aa 8 PB16 PBI 2 es 8 PB17 PB2 9 10 PB18 PB3 11 mm 2 PD6 gt PD 4 PB4 13 14 PD7 gt PD7 PB5 15 16 PDS EIS gt PDB o PBe 17 18 POS gt PD9 4 PB7 19 20 PD10 E S PDi0 4 Pes 21 mm 22 PDii S pot PB9 23 24 PD12 E S PDi2 4 PB10 25 26 PD13 m gt PD13 4 PBii 27 28 PDi4 EIS S PDi4 4 PBi2 29 30 PDi7 E S PD17 4 PBI3 31 32 PD18 m gt PD18 4 PBi4 33 34 PD19 PBi5 35 2
24. ATARM 29 Nov 12 SAM9CN11 EK Board Layout Figure 4 4 AAA 7 A d Le f n NM 4 3 Function Blocks 4 3 1 Processor The EK board is equipped with a SAM9N12 CN11 device in BGA217 package The processor runs at a nominal frequency of 400 MHz for the core and 133 MHz for the system bus 4 3 2 Clock Distribution The SAM9N12 CN11 EK board includes three clock systems Two of the clock systems are alternatives for the SAM9N12 CN11 main clock and one clock system is an oscillator used for the Ethernet controller chip AMEL 1s SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 Table 4 1 lists the main components associated with these clock systems Table 4 1 Main Components Associated with the Clock Systems QTY Description Component assignment 1 Crystal for Internal Clock 16 MHz Y1 1 Crystal for RTC Clock 32 768 kHz Y2 1 Crystal for Ethernet Clock 25 MHz Y3 4 3 3 Reset and Wake up Circuitry The reset sources for the EK board are m Power on reset m Push button reset PB2 m JTAG reset from an in circuit emulator JTAG interface is equipped on EK board To disable any bootable content in NAND Flash or DataFlash please refer to Push Buttons 4 3 4 Power Supplies The SAM9N12 CN11 EK board evaluation and development platform embeds all the necessary power rails required for the SAM9N12 CN11 processor and peripherals The SAM9N12 CN11 EK board can be supplie
25. BLA 8 DDR2_D3 EBI_A5 1 REX 8 DDR2_A5 D7 DiZ EBI D8 EBI D4 4 BRIN 5 DDR2 D4 EBI AG 3 N R 6 DDR2_A6 58 B12 EBI_D9 EBI_D5 2 WMRIBT7 DDR2_D5 EBI_A7 4 VRIS DDR2_A7 D9 rem EBI_D10 EBI_D6 1 BLA 8 DDR2_D6 EBI 8 2 VRIS 7 DDR2_A8 D10 rom EBI D11 EBI_D7 3 AR 6 DDR2_D7 EBI_AQ 1 D I 8 DDR2 A9 D11 Tate EBI_D12 EBI_D8 1 _BR4AY_8 DDR2_D8 EBI_A10 1 BR K 8 DDR2_A10 D12 BT EBI D13 EBI D9 2 BR 7 DDR2_D9 EBI A 2 B ISE 7 DDR2_A11 D13 AT EBI_D14 EBI_D10 3 BRAN DDR2_D10 EBI_SDA10 3 ARE 6 DDR2 Ai2 D14 EBI D15 EBI_D11 BRAN 5 DDR2_D11 EBI_A13 4 BRYSD 5 DDR2_A13 DIS EBI_D12 1 BRSAY_8 DDR2_D12 EBI A14 1 NMA 8 DDR2_A14 D17 EBI_D13 2 WRB 7 DDR2_D13 EBI A15 2 RRQ 7 DDR2 A15 AO NBSO 617 EBI A1 9 EBI_D14 KRD DDR2_D14 EBI A16 3 R 6 DDR2_A16 A1 NBS2 DQM2 NWR2 Ers EBLA2 LI EBI_D15 3 BREST DDR2 D15 EBI A17 VRI 5 DDR2 17 e B17 EBI A3 EBI A18 R64 OR DDR2_A18 A17 EBI A4 A4 e E EN E lt gt FLASH_D 0 15 6 FDi6 EBI A7 EBI DO 4 BRER 5 FLASH DO A7 EBI A8 EBI D1 3 BREA 6 FLASH D1 8 Gia EBI A9 EBI D2 2 D 7 FLASH D2 A9 C16 EBI A10 EBI D3 1 BLY 8 FLASH D3 A10 E14 EBI A EBI_D4 1 D I 8 FLASH D4 All 875 EBI A EBI D5 2 WBRIR7 FLASH D5 A12 Fais EBI_A13 EBI_D6 3 BR 6 FLASH D A13 675 EBI At4 EBI D7 4 BRADY 5 FLASH D7 A14 D15 EBI_A15 EBI_D8 1 BA 8 FLASH D8 A15 Ce EBI A16 EBI D9 2 MR 7 FLASH D9 E14 EBI AC EBI_D10 3 an 6 FLASH D10 A15 EBI A18 EBI D11 4 MR FLASH D11 CP A18 BA2 Dia EBI_A19 EBI_Di2 1 KR 8 FLASH D12 BR2QA 8 HAD 8
26. Rbottom 220ohm at 100MHz TPS AIMEL E ROUSSET SAM9N12 EK RevC j BGA217 POWER SUPPLY C pl nn eee NOR NAST PP EBI PP ae EEEN ee B5 NOV 11 XXX XX XXX XX X XXX XX p5 SEPT 11 X XXX XX XXX XX This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings INITEDIT PP PO AUG 11 XXX XX MODIF DES DATE SCALE 11 3 2 1 5V_LCD L 5V 220ohm at 100MHz OUTA IN USB Micro B 5 7 5 7 8 PC 0 31 PB O 18 V5 5MLA0603 4637 ENA FLGA e C14 3V3 5 R15 47K MN5 SN74LVC1G32 aH 3V3 100nF SAM9N12 LBGA217 POWER e C31 TT 10uF 100nF T 10pF 47K L7 3 R18 OR PBB8 2200hm at 100MHz ONO FERB MW 1 A 2 ame melt R19 pyy D I PB7 SP2526A 2 MN7A J2 USB AF 4 1 2 R20 2 NIZ aen le C25 coo R21 27R P17 100nF USB A D HDP 5 6 D2 D3 TVS Aa Tvs USB 5V OP OP NDIOP OM OM OM OM OM CORE GNDCORE GNDCORE GNDCORE lt ___ LCD_DET 7 VDDCORE VDDCORE VDDCORE VDDCORE VDDIOM VDDIOM VDDIOM VDDNF VDDNF VDDNF VDDIOP1 VDDIOP1 VDDIOPO VDDIOPO VD
27. SNN rims x Nc u E SV INTER 3V3 LCD 3V3 LCD 28 5 KEY MN3 SS LF vin vout as 4 KE 2 C10 R45 1 Cu ak SELCONFIG 10u Sen pri s MN2 C12 i C15 SPX3819 NCI NC6 MEL 10u 2 2y 500 capability ONE WIRE NC2 MS Al EET ca no lolo C13 T I nT DATA NC4 GND NC3 PET A INITEDIT PP_ 05 APR 12 PP 05 APR IZ EE DS2433S RE MODIF DES DATE VER DATE SAMSCN11 EK SCALE 1 1 REV SHEET LCD BOARD EECH A A ou en aaron aa 5 4 E 2 1 AIMEL Y Section 8 Revision History 8 1 Revision History Table 8 1 Change Request Comments Ref 11186A First issue SAM9N12 CN11 EK User Guide 8 1 11186A ATARM 29 Nov 12 AIMEL T O Headquarters Atmel Corporation 2325 Orchard Parkway San Jose CA 95131 USA Tel 1 408 441 0311 Fax 1 408 487 2600 Disclaimer The information in this document is provided in connection with Atmel products No license express or implied by estoppel or otherwise to any intellectual property right is granted by this document or in connection with the sale of Atmel products EXCEPT AS SET FORTH IN ATMEL S TERMS AND CONDI TIONS OF SALE LOCATED ON ATMEL S WEB SITE ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS I
28. a 3V coin battery This battery is not required for the board to start up The coin battery is provided for user convenience in case the user would like to exercise the date and time backup function of the SAM9N12 CN11 devices when the board is switched off 3 3 Sample Code and Technical Support After boot up designers can run sample code or their own application on the development kit Users can download sample code and get technical support from the Atmel web site http www atmel com 3 4 Recovery Procedure All boards of Evaluation Kit have passed strict test procedures before shipment The demo software boots from SPI DataFlash and stores the binary image in the NAND Flash If the contents of either of the Flash have been deleted follow the instructions below to recover it to the state as it was when shipped by Atmel Under the web page of SAM9N12 CN11 EK find the test package of AT91SAM9N12 CN11 EK_test_xx_public zip xx is the version number which is the file for Flash content burning A step by step instruction is available in name of SAM9N12 CN11_EK_Test_Software on how to recover the con tents and how to make test for each section of the boards SAM9N12 CN11 EK User Guide 3 1 11186A ATARM 29 Nov 12 AIMEL EE CO Section 43 Evaluation Kit Hardware 4 1 Board Overview This section introduces the Atmel SAM9N12 CN11 Evaluation Kit design It introduces system level con cepts such as power distribution memor
29. on the SAM9N12 CN11 EK board um D8 blue and D9 green LEDs are user defined and controlled by the GPIO m D10 red LED is a power LED indicating that the 3 3V rail is enabled It can also be controlled by the GPIO by default the GPIO is disabled and an on board pull up to 3 3V lights the LED Figure 4 23 LED VDDANA D8 Blue 4705 1 R67 D9 Green PB5 470R 4 R68 vi PB6 100K 1 R69 P i 470R D10 Red jl NNN a2 IRLML2502 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide 4 3 20 Push Buttons SAM9N12 CN11 EK has three mechanical push buttons for system application PB1 to PB3 and one for free use PB4 4 3 20 1 PB1 Output Enable Chip Select Access to the RomBoot 1 Press simultaneously the PBs OE CS and NRST 2 Release the PB NRST 3 Then release PB OE CS The program boots to the ROM code whatever the contents of the NAND Flash or serial DataFlash Please refer to SAM9N12 CN11 datasheet boot strategy for details Figure 4 24 PB1 VDDIOPO 1V8 N e 5 OE Dataflash DE Nandflash 4 3 20 2 PB2 NRST The NRST pin is bidirectional It is handled by the on chip reset controller and can be driven low to pro vide a reset signal to the external components or be asserted low externally to reset the microcontroller It will reset the core and the peripherals except for the backup region Figure 4 25 Push Button PB2 1 3 NRST je gt
30. registered trademarks or trademarks of Atmel Corporation or its subsidiaries ARM ARMGPowered logo Cortex and others are registered trademarks or trade Atmel Munich GmbH Business Campus Parkring 4 D 85748 Garching b Munich GERMANY Tel 49 89 31970 0 Fax 49 89 3194621 Technical Support AT91SAM Support Atmel technical support marks of ARM Ltd Other terms and product names may be trademarks of others Atmel Japan 9F Tonetsu Shinkawa Bldg 1 24 8 Shinkawa Chuo ku Tokyo 104 0033 JAPAN Tel 81 3 3523 3551 Fax 81 3 3523 7581 Sales Contacts www atmel com contacts 11186A ATARM 29 Nov 12
31. 1 2 3 PC16 LCDDAT16 R114 AA 22R 5 LCDDAT17 PC17 PC18 LCDDAT R1114 22R 7 LCDDATI PC19 PC20 LCDDAT20 R11 22R LCDDAT21 PC22 LCDDAT22 RUJ 22R 13 LC DDAT2 PC 23 PC24 LCDDISP R119 22R LCDPWM PC27 LCDVSYNC R121 22R 17 LCDHSY NC PC29 LCDDEN Dun 22R Ik 22R LCDPCK PC30 PB11 ADO XP R126 OR 23 AD1 XM PB12 PB13 Ap2 YP RIE 25 AD3 Y PB14 PB15 AD4 LR RI3ONNN 08 2 ONE WIRE PA21 SPl1 MISO 1 D I 31 SPI1 MOSI 22 PA23 SPI1 SPCK RI3S AA OR 33 SPI1_NPCS1 PAO PB9 R137 OR 35 LCD DETEC PBO R139 OR VD DANA NV 39 210K RIAN NN 4 18 EE SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 4 3 22 PIO Usage m PIO A Pin Assignment Table 4 3 PIO A Pin Assignment and Signal Descriptions Signal Alternate Periph A Periph B Periph C PAO TXDO SPI1 NPCS1 LCD connector PA1 RXDO SPIO NPCS2 PA2 RTSO ZB IRQO PA3 CTSO ZB IRQ1 PA4 SCKO One Wire PA5 TXD1 ZB_RSTN PA6 RXD1 ZB_SLPTR PA7 TXD2 SPIO NPCS1 MCI card detect PA8 RXD2 SPI1 NPCSO ZigBee PA9 DRXD DBGU PA10 DTXD DBGU PA11 SPIO MISO MCI DA4 Serial DataFlash PA12 SPIO MOSI MCI DA5 Serial DataFlash PA13 SPIO SPCK MCI DA6 Serial DataFlash PA14 SPIO NPCSO MCI DA7 Serial DataFlash PA15 MCI DAO MCI PA16 MCI CDA MCI PA17 MCI CK MCI PA18 MCI DA1 MCI PA19 MCI DA2 MCI PA20 MCI DA3 MCI PA21 TIOA
32. 2 36 PD20 gt PDI9 49 37 3938 PD LI me 43 tol EE Hio gt PD21 49 3V3 Be 3V3 5V JP8 3V3 1 3 a ES J7 SEE EIS PCO 5mm LE Jos PCT 7 mm 8 Jr PC2 9 10 PCi8 Pos 11 aa 12 PC19 PC4 13 m 14 PC20 PCS 15 ma 16 PCat PCE 17 mpg 18 P C22 D I 19 mpg 20 PC23 Pce 21 mq 22 PC24 PC9 23 m 24 PC25 PCIO 25 ee 26 PC26 PCI 27 oe 28 PC2r Pore 29 ee 30 PC28 PCIS 31 ee 32 PC29 PCI4 33 ee 34 5650 PCi5 35 36 PC31 EIS 37 38 39 22 4o 3V3 XX 3v3 nn ROUSSET A INIT EDIT PP 05 APR 12 PP 05 APR 12 EM _ MODIF DES DATE VER DATE 4 SCALE REV SHEET SAM9CN11 EK 1 1 5 PIO_INTERFACES A This agreement is our propery Reproduction and publication without our writen authorization shal expose offender to legal proceedings 1 4 FLASH D 0 15 4 FLASH A 1 23
33. 22 ISI D4 LCDDAT4 LCDDAT5 ISI D5 23 24 ISI D6 LCDDAT6 LCDDAT7 ISI D7 25 26 ISI D8 LCDDAT8 LCDDAT9 ISI D9 27 28 ISI D10 LCDDAT10 LCDDAT11 ISI D11 29 30 GND GND AIMEL 4 28 ae O SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 Figure 4 37 LCD Socket J10 Table 4 16 LCD Socket J10 Signal Descriptions LCD Pin Num Pin Num LCD 5V 5V_INTER 1 2 GND GND 5V 5V_INTER 3 4 GND GND LCDDAT16 5 6 LCDDAT17 LCDDAT18 7 8 LCDDAT19 LCDDAT20 9 10 LCDDAT21 LCDDAT22 11 12 LCDDAT23 GND GND 13 14 GND GND LCDDISP 15 16 LCDPWM LCDCSYNC 17 18 LCDHSYNC LCDDEN 19 20 LCDPCK GND GND 21 22 GND GND ADO XP TSC 23 24 TSC AD1 XM AD2 YP TSC 25 26 TSC AD3 YM AD4 LR TSC 27 28 ONE WIRE GND GND 29 30 GND GND SPI1 MISO 31 32 SPI1 MOSI SPI1 SPCK 33 34 SPI1 NPCS1 EN PWRLCD SELCONFIG 35 36 oo LCD_DETECT PD16 37 38 PD17 GND GND 39 40 GND GND AMEL SAM9N12 CN11 EK User Guide 4 29 11186A ATARM 29 Nov 12 4 4 10 IO Expansion Port Figure 4 38 IO Expansion Socket J5 Table 4 17 IO Expansion Socket J5 Signal Descriptions PIO Power Pin Num Pin Num Power PIO 3V3 or 5V 1 2 3V3 or 5V GND 3 4 GND PAO 5 6 PA16 PA1 7 8 PA17 PA2 9 10 PA18 PA3 11 12 PA19 PA4 13 14 PA20 PA5 15 16 PA21 PA6 17 18 PA22 PA7 19 20 PA23 DAG 21 22 PA24 PA9 23 24 PA25 PA10 25 26 PA26 PA11 27 28 P
34. 3 6 Battery Backup uic e nti iei va 4 8 i e 4 9 43 8 UART DBGU adeste D cree dervan adil 4 10 439 JTAG Interface teni tein ened 4 10 4 3 10 Serial Peripheral Interface SPI Controller nnen neren nennen ennen 4 11 4 3 11 Two Wire Interface TWI een 4 11 Lacu USB PONS 4 12 43 13 1 Wire EEPROM un Ee te boe 4 13 43 14 ETH on BB EE 4 13 SAM9N12 CN11 EK User Guide AIMEL 1 1 11186A ATARM 29 Nov 12 AIT 4 14 e e Date o E O 4 15 43 17 ZigBee eg 4 15 43 18 Analog Interface eec tee reete terere beites EE 4 16 43 19 LED ndicators eet rette esc 4 16 43 20 PUSH Buttons esci er eee RR Re TURNS KI SHREK SR XN MEERE dead deens 4 17 4 3 21 Expansion Ports n Ete ice eiii 4 18 43 22 PIOUSAGE EE 4 19 Deele LEE 4 23 441 Power SUDDIY a 4 23 44 2 JTAG ICE COnm CtOr 4 23 44 3 DBGU EE 4 24 44 4 USB MIGIOB Zeene eege ugeet 4 25 44 5 USB Type poft Dees rt Ete ceteri ir ieee Eege nine 4 25 446 SD Gard MCI E 4 26 4 4 7 Ethernet RJ45 Socket nne anonneerenensnnerenenannereeenannnevenenanneeeeenannneeeennn 4 27 448 Zigbee Socket JIP Lasse ed et et D a eek ra Peer 4 27 44 9 LGD SOCKk6t EE 4 28 4 410 IO Expansion Port tete reet deeg 4 30 Section 5 z Mee len PNIS e 5 1
35. 6 VDDIOPO 1 PAA SCKO Hir nas 6 OE Dataflash 0 vec PAS TXD1 l p5 pag PA14 2 PA17 PAG RXD1 R4 par e C58 E PA7ITXD2 SPIO NPCS1 Tg PAS 3 T00nF PATS PAB RXD2 SPI1 NPCSO HRs PAS PA20 PA9 DRXD HRe PAY PADI PA10 DTXD PA11 SPIO_MISO MCI DA4 L 5 PA12 SPI0_MOSI MCI_DA5 ys pa13 PA13 SPIO SPCK MCI DA6 H07 pam PA14 SPI0_NPCSO MCI_DA7 F7 PATS PA22 PA23 PA24 PA25 PA26 VDDIOPO PA15 MCI_DAO A7 PATS MN9 PA27 PATEMOL e Us PAI7 AT25DF321A VDDIOPO PA28 OK 8 PA18 SPIO MOSI R56 oR 5 PA29 Paame pas FTE PAT W SE 2 SPIO_SPCK PA20 MCI DA3 ne FASO f SCK PA21 TIOAO SPI1_MISO PA22 TIOA1 SPI1_MOSI E SPID NPCSO cs PA23 TIOA2 SPI1 SPCK HUTT PASI PA2A TCLKO TK ri5 pA25 F PA25 TCLK1 TF HS PASS PA26 TCLK2 TD Lea PA27 TIOBO RD 775 PASS PA28 TIOB1 RK rg Pass SERIAL DATAFLASH TP11 PA29 TIOB2 RF La PA3O TWDO SPI_NPCS3 449 AS 3V3 PA31 TWCKO SPI1_NPCS2 VDDIOPO VDDIOPO VDDIOPO R59 R60 gt R61 4 7K 4 7K me 10K a PB 0 18 3 7 8 AT24C512C SSHD T SAMONI2_LBGA217 PIOB PA31 TWCKO ec ao H PA30 TWDO 5 PBO RTS2 SDA PB1 CTS2 8 PB2 SCK2 re ES Le PBSISPI0_NPCS3 VDDANA C60 5 PD8 4 S BEE dan UE PB6 AD7 1 d PD11 4 PB7 AD8 PD12 4 PB8 AD9 R63 PD13 4 PB9 AD10 PCK1 10K PD14 H PB10 AD11 PCKO PD17 4 PB11 ADO
36. A27 PA12 29 30 PA28 PA13 31 32 PA29 PA14 33 34 PA30 PA15 35 36 PA31 GND 37 38 GND 3V3 39 40 3V3 AMEL 4 30 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide Figure 4 39 IO Expansion Socket J6 Table 4 18 IO Expansion Socket J6 Signal Descriptions PIO Power Pin Num Pin Num Power PIO 3V3 or 5V 1 2 3V3 or 5V GND 3 4 GND PBO 5 6 PB16 PB1 7 8 PB17 PB2 9 10 PB18 PB3 11 12 PD6 PB4 13 14 PD7 PB5 15 16 PD8 PB6 17 18 PD9 PB7 19 20 PD10 PB8 21 22 PD11 PB9 23 24 PD12 PB10 25 26 PD13 PB11 27 28 PD14 PB12 29 30 PD17 PB13 31 32 PD18 PB14 33 34 PD19 PB15 35 36 PD20 GND 37 38 PD21 3V3 39 40 3V3 AMEL SAM9N12 CN11 EK User Guide 4 31 11186A ATARM 29 Nov 12 Figure 4 40 IO Expansion Socket J7 Table 4 19 IO Expansion Socket J7 Signal Descriptions PIO Power Pin Num Pin Num Power PIO 3V3 or 5V 1 2 3V3 or 5V GND 3 4 GND PCO 5 6 PC16 PC1 7 8 PC17 PC2 9 10 PC18 PC3 11 12 PC19 PC4 13 14 PC20 PC5 15 16 PC21 PC6 17 18 PC22 PC7 19 20 PC23 PC8 21 22 PC24 PC9 23 24 PC25 PC10 25 26 PC26 PC11 27 28 PC27 PC12 29 30 PC28 PC13 31 32 PC29 PC14 33 34 PC30 PC15 35 36 PC31 GND 37 38 GND 3V3 39 40 3V3 4 32 AIMEL MEL 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide AIMEL eege Section 5 EK Schematics
37. AUG 11 MODIF DES DATE SCALE 1 1 l 2 1 L14 3 5 7 PB 0 18 lt n AUD 1V8 AVDD1V8 220ohm at 100MHz AUD V8 1 2 C99 C100 5 7 PA O 31 100nF EA R192 oR AGND_AUDIO 3V3 RR i el ong d C105 e C106 C107 _le C108 220pF 220pF 10uF 100nF T 4 7uF 5 R154 208 e AGND_AUDIO AGND_AUDIO MN17 IS AGND_AUDIO a E a o PA31 TWCKO 2 a a aa PA30 UND ERC A g g UE Q HPOUTR PB10 PCKO R1584 22B Bue PA24 TK R159 oR PA28 RK R160 MVV OR 29 PA25 TE RIGTVVVOR BELWGPIOS PA29 RF Ri62 VV OR 30 16 PA26 TD MN 32 SE LINEOUTL 1 PACT RD RIGS AA OR 31 ADCDAT LINEOUTR HE 1l4 epiowira LINEOUTFB ZZ AVDD1V8 WM8904 7 cevoD e C113 8 C142 2 2uF CPCA Jup GC IN1UDMICDAT L 0 IN1R DMICDAT2 AGND AUDIO CPGB AVDD ps 11 2200hm at 100MH 3V3 12 CPVOUTP i 19 tac CPVOUTN d MICVDD d a SA SA erem En 2 el oz _le c118 z a z So R168 T 100nF 4 7uF 3 6 2 22 x 2 2K AGND_AUDIO 7 i amp Ai a R191 AA OR AGND AUDIO 1 ES AGND AUDIO AGND AUDIO e C119 4 7uF C120_le _le C121 AGND AUDIO 1uF 1uF P L15 AUD 1V8 T 10uH 150mA T X Wow K R157 el C124 C125 ap 2 DNP DNP 220pF 220 sl omg T 4 7uF A AGND_AUDIO J13 HEADPHONE J15 L
38. D PA7 11 WP 12 GND 13 GND AMEL 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide 4 4 7 Ethernet RJ45 Socket Figure 4 34 Ethernet RJ45 Socket J16 RJ 45 Table 4 13 RJ45 Socket J16 Signal Descriptions 12345678 Pin Mnemonic Description 1 TX Differential output plus 2 TX Differential output minus 3 RX Differential input plus 4 Reserved 5 Reserved 6 RX Differential input minus 7 Reserved 8 Reserved 4 4 8 Zigbee Socket J12 Figure 4 35 Zigbee Socket J12 Table 4 14 Zigbee Socket J12 Signal Descriptions Signal Signal Function Name Port Pin Pin Port Name Function Reset RST 1 2 IRQO Interrupt Request Interrupt Request IRQ1 3 4 SLP_TR SLP_TR SPI chip select CS 5 6 MOSI SPI MOSI SPI MISO MISO 7 8 SCLK SPI CLK Power Supply GND GND 9 10 VCC VCC VCC SAM9N12 CN11 EK User Guide AMEL 4 27 11186A ATARM 29 Nov 12 4 4 9 LCD Socket Figure 4 36 LCD Socket J9 Table 4 15 LCD Socket J9 Signal Descriptions LCD ISI Pin Num Pin Num ISI LCD 3V3 3V3 1 2 GND GND VDDISI VDDISI 3 4 GND GND ZB IRQO ZB IRQO 5 6 ZB IRQ1 TWCKO TWCKO 7 8 TWDO GND GND 9 10 ISI MCK LCDDAT15 GND GND 11 12 ISI VSYNC LCDDAT13 GND GND 13 14 ISI HSYNC LCDDAT14 GND GND 15 16 ISI PCK LCDDAT12 GND GND 17 18 ISI DO LCDDATO LCDDAT1 ISI Di 19 20 ISI D2 LCDDAT2 LCDDAT3 ISI D3 21
39. D2 FD EBI D3 D Cts EBI D4 D Bis EBI D5 DS A13 EBI D D6 r5 EBI_D7 D pi EBI D8 D8 Bio EBI D D9 Cu EBI DIO D10 Cp EBI D11 D11 Cas EBI D12 D12 BH EBI D13 Bie Am EBI D14 214 co EBI_DI5 D17 AO NBSO Fe A1 NBS2 DAM2 NWR2 E1 BR AI 2 B7 EBAG AS A17 A4 AS E16 6 Ce A7 E15 8 Gi4 A9 C16 A10 F14 A11 Leg A12 Hag A13 A14 A15 baie A16 BAO HETT A17 BA1 L A18 BA2 Dix A19 pamo ee DOM HB8 DASO A7 DQS1 B9 EBI_RAS RAS B3 EBIERS cas 2 EBLCAS sowe L I EBI SDWE SDCKE HB5 SDA10 HNT SDCK Has SDCKN B7 NCS0 NCS0 Hie EET RGS spee gt NCSO Nos1 spcs 05 _EBLNCST_SDGS NWRO NWRE EMRE gt NWRE NWRI NBS1 57 NWR3 NBS3 DQM3 Rp HND 4 NRD ATSTSAMSONTT CI MN7E SAM9CN11_LBGA217 PIOD Hus ER PD1 NANDWE Hire ge PD2 A21 NANDALE irr PD3 A22 NANDCLE p16 PD4 NCS3 Ly PDS PDS NWAIT H45 PD6 D16 Hre EE POR PD7 017 Hag P07 PD8 D 18 Her POR PD9 D 19 krs 09 PD10 D20 Hke gt PD10 PD 11 021 HR ESS PD PD12 D22 Tg gt PD12 PD13 D23 Har gt PDI3 PD14 D24 5s ppig gt PD14 PD15 D25 A20 857 P018 PD16 D26 A23 eg PD17 D27 A24 rjg gt PD17 PD18 D28 A25 egg PDS PD19 D29 NCS2 qig H L PD19 PD20 D30 NCS4 L PD20 PD21 D31 NCS5 gt PD 1 AT91SAM9CN11 Cl EBI D 0 15 6 6 9 6 9
40. DAT7 TCLK4 LCD PC8 LCDDAT8 UTXDO LCD PC9 LCDDAT9 URXDO LCD PC10 LCDDAT10 PWMO LCD PC11 LCDDAT11 PWM1 LCD PC12 LCDDAT12 TIOA5 LCD PC13 LCDDAT13 TIOB5 LCD PC14 LCDDAT14 TCLK5 LCD PC15 LCDDAT15 PCKO LCD PC16 LCDDAT16 UTXD1 LCD PC17 LCDDAT17 URXD1 LCD PC18 LCDDAT18 PWMO LCD PC19 LCDDAT19 PWM1 LCD PC20 LCDDAT20 PWM2 LCD PC21 LCDDAT21 PWM3 LCD PC22 LCDDAT22 TXD3 LCD PC23 LCDDAT23 RXD3 LCD PC24 LCDDISP RTS3 LCD PC25 CTS3 EN5V_LCD PC26 LCDPWM SCK3 LCD PC27 LCDVSYNC RTS1 LCD PC28 LCDHSYNC CTS1 LCD PC29 LCDDEN SCK1 LCD PC30 LCDPCK LCD PC31 FIQ PCK1 OVCUR LCD SAM9N12 CN11 EK User Guide AMEL 4 21 11186A ATARM 29 Nov 12 m PIO D Pin Assignment Table 4 6 PIO D Pin Assignment and Signal Descriptions Signal Alternate Periph A Periph B Periph C PDO NANDOE NAND Flash PD1 NANDWE NAND Flash PD2 A21 NANDALE NAND Flash PD3 A22 NANDCLE NAND Flash PD4 NCS3 NAND Flash PD5 NWAIT PD6 D16 NAND Flash PD7 D17 NAND Flash PD8 D18 NAND Flash PD9 D19 NAND Flash PD10 D20 NAND Flash PD11 D21 NAND Flash PD12 D22 NAND Flash PD13 D23 NAND Flash PD14 D24 PD15 D25 A20 PD16 D26 A23 PD17 D27 A24 PD18 D28 A25 PD19 D29 NCS2 PD20 D30 NCS4 PD21 D31 NCS5 ETH INT AMEL 4 22 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide 4 4 Connectors 4 4 1 Power Supply Figure 4 28 Power Supply Connector J1 Table 4 7 Power Supply Connector J1
41. DPLL GNDPLL VDDANA GNDANA VDDUSB GNDUSB VDDOSC VDDFUSE GNDFUSE ADVREF VDDBU GNDBU GNDBU e 20pF et Oh 16MHz 1 VDDIOPO A C45 e 20pF U16 XOUT AE C47 15pF AA sanap R35 D sey 32 768 kHz 100K C50 e 15pF A3 VDDIOPO 4 dm d XOUT32 eo r co vopBu D B4 JTAGSEL od SD1 dede 50 ey PNP d E NTRST Tis ID Ria TMS ow TCK rv KI de TDO SEN R33 OR 7 9 NRST lt gt NRST Se 7 WKUP gt A5 wen 2 SHDN I BS SHDN VDDIOPO NIS uc R36 U15 p25 10K BMS PC31 JP4 PB7 PB8 i PB16 st I D8 D1 3V3 154 1V P10 ai ep EE G15 e C22 C23 C24 C19 C8 nek pem 100nF H10 R VDDIOM H9 H8 el C26 C21 C27 100nF 100nF 100nF L14 pa ime K14 gt gt gt VDDNF J14 VDDIOP1 C28 C29 C30 L4 p r400nF T 100nF T 100nF L3 el C33 el C34 T 100nF 100nF P12 VDDIOPO P C36 100nF T 100nF L8 VDDPLL 10uH 150mA 1 T16 x P14 e C38 R27 e C39 100nF 100nF L9 1R 10uH 150mA VDDANA gt 04 C40 Je 2 4 7uF e C42 R28 e 049 100nF 100nF iR C44 le 5 4 7uF T 3V3 R15 T17 L10 el C46 VDDOSC 10uH 150mA 3 8 T 100nF Rig NR il e C48 lt R29 C49 j 100nF 100nF iR C51 Je i 4 7uF L11 VDDFUSE 10uH 150mA 3V3 VDDANA N16 e NR M16 C52 R32
42. E HPOUTR H PB10 PCKO R58 Ay 228 BB Gt ied ril E PA24 TK R159 a4 2R PA28 RK R160V VV OR 29 PA25 TF RIG VOR BCLK GPIO4 d DS E LRCLK LINEOUTL 5 DACDAT mE RD RIGS An CE 31 ADCDAT LINEOUTR CJB i i MIC1 GPIO1 IRQ LINEOUTFB 1 2 EENS WM8904 Jen auio 7 cevpp 8 ceca t e INIL DMICDAT1 L NH WZ 10 INTR DMICDAT2 AGND AUDIO CPCB LAG 5 CPVOUTP e wh ae neat TOO 3V3 CPVOUTN E MICVDD e C115 Je C116 9 a 2 2uFT 2 2uF CPGND z 2 el c117 _le C118 am 100nF 4 7uF 8 96 Ss 8 pus xU a o lt 2 2 AGND AUDIO a See Ese f 8 8 S 5 8 WZ RIS 2R AGND AUDIO Aw AGND AUDIO AGND AUDIO 5 0119 TT 4 7uF C120 Je le C121 AGND AUDIO 1uF 1uF 5 R194 a4 2R 2 3 Sir A An uU m T R195 oR 4 NOOD MN R157 d R173 S R174 C124 ad C125 SE DNP PWP 220pF 220pF 1 5 el 109 LINE IN TT 4 7uF AGND AUDIO ET ROUSSET A INIT EDIT PP 05 APR 12 PP 05 APR 12 L r REM Mobi DES DATE VER DATE T ISCALE REV SHEET SAM9CN11 EK 1 1 8 AUDIO 1 Tagen ar rp ril d lon vou ou fie and oss order pal paras 1 4 5 4 6 4 6 4 5 4 5 3 7 6 L22
43. E R97 NNN 22H LCDDATO PCO PC LCDDATI R98 AAN 22R i9 BB 20 R99 WNW 22R LCDDAT2 C2 PC3 LCDDAT3 RIOD 2 zij BB 52 RINNAN 22R LCDDAT4 PCA PC5 LCDDAT5 BRION 22 23 gg 24 Ri ENNM 22 LCDDAT6 PCS PC7 LCDDAT7 EIN MME 25 BB 76 BIER LCDDATE PCS PCS LCDDATS RIAN 22R 27 EB 58 RI08 NN 22R LCDDATIO PCIO G PC11 LCDDAT11 R1 OR ANA 22R 29 T 30 I 45V LCD J10 ESQ 120 33 L D tB PC16 LCDDATI6 D 228 5 5 5 6 D 22 LODDATI7 Pe PC18 LCDDATI8 RIT ZAR RATE NW 22R LCDDATIS PCS PC20 LCDDAT20 BIZ 22R SJ 28 IO BUNN 22H LODDAT21 PE PC22 LCDDAT22 R113 22R 11 12 R11 22R LCDDAT23 PC23 d NNN 5 20 Ha Bun PC24 LCDDISP R119 22R 15 16 R120 22R LCDPWM PC26 PC27 LCDVSYNC RIZ V zom 17 BB 18 RIZ AN 28H LCDHSYNC PC FER 654 PC29 LCDDEN Ri24 V V 228 18 2 Ri25VV 2 LCDPCK PC30 NN Blag amp 228 PB11 ADO XP R128 AA 2R 1 23 BB aT RAZZ OR AD1 XM PB12 PBI3 AD2 VP R128V V VOR loo 55 DIEN OR ADS YM PB14 ADA 27 2 NE WI PBi5 AD4 LA RIGO OR 271 pa 58 RIZSN NN OR ONE WIRE PA4 PA21 8 1 MISO B1315 AA OR tar BB 327 B3 AA OR SPI MOS PA22 PA23 SPIT SPCK EEE MNM 33 BB 34 R34 OR SPI NPCST PAO PBS GA 35 BB 36 RISE OR LCD DETECT PBO RIS A ORI 37 BH 38 RIS NN OR PBI VDDANA l Loo 2 s RS R141 ale 3 LCD DET TI
44. FIQ PCK1 IRLML2502 ROUSSET 20 AUG 11 XXX KX XXX XX l I REV MODIE DES DATE VER DATE LED SAM9NT2 EK RevC SCALE 171 REV SHEET BGA217 ts C 5 PIO INTERFACES This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings 5 4 3 2 1 4 DDR2 D 0 15 4 DDR2 A 2 18 DDR2 SDRAM DQO DQ1 MT47H64M16HR DQ2 DQ3 DQ6 DQ7 DOS Dag DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 4 FLASH D 0 15 4 FLASH A 1 23 9 NOR NRST 4 A23 RFU1 57 RFU2 Tg CLK NC X RST 1V8 33 WP VCC VCCQ SR e C68 Je 069 CES OE vss is 100n 100nF WE VSS 731 VSS VPP JS28F128P30TF75A NOR FLASH DNP OE Nandflash 1 4 NAND FSH D 0 7 4 NANDR B 1V8 VDD 100nF VDD 100nF VDD 100nF K2 VDD 100nF 4 DDR2 SDCKE gt CKE VDD 100nF 4 DDR2 SDCK gt a CK VDDL 100nF 4 DDR2 5 29 7 CK VDDQ 100nF Lg VDDQ 100nF 4 DDR2_NCS1 gt CS VDDQ 100nF VDDQ 100nF L7 VDDQ 100nF 4 DDR2 CAS CAS VDDQ 100nF 4 DDR2 RAS gt RAS VDDQ 100nF vol VDDQ 100
45. I CK R10 27R 100nF 3 p M PA16 CDA R110 27R VSS RED CMD DI PA20 el MOIDA CD DAT3 CS PAIS DAZ 4 BEDS o 9 SD CARD 4 3 17 ZigBee Interface The EK board has a 10 pin male connector for the Atmel RZ600 ZigBee module DNP 0 ohm resistors have been implemented in series with the PIO lines that are used elsewhere in the design Thereby it enables their individual disconnection should a conflict occur in user application Figure 4 20 ZigBee PA5 ZB_RSTN R142 1j aw L5 R143 OR ZB IRQO PA2 PA3 ZB IROL R144NNN 3 4 RIAN c ZB SLPTR PAG PA8 SPl1 NPCSO Rae oR nm 6 PA22 L13 5 SPIT MOS PA2i SPI1 MISO RIAN OR Tu 8 Radon SPM SPCK PA23 220ohm at 100MHz 3 8 C95 le C96 1 C97 18pF 2 2nF 2 2uF ZIGBEE SAM9N12 CN11 EK User Guide AIMEL 4 15 11186A ATARM 29 Nov 12 4 3 18 Analog Interface The 3 0V voltage reference is based on an LM4040 Precision Micropower Shunt Voltage Reference This ADVREF level can be set as 3 0V or 3 3V via the jumper JP3 Figure 4 21 Analog Reference VDDANA ADVRE A2 2 7 A 10 kohm potentiometer VR1 is connected to AD6 port PB17 to implement an easy access to ADC programming and debugging or to implement an analog user control such as display brightness vol ume etc Figure 4 22 Potentiometer VDDANA input PB17 10nF 4 3 19 LED Indicators There are three LEDs for general purpose
46. INE IN AIMEL KE ROUSSET SAM9N12 EK RevC BGA217 AUDIO PP p5 NOV 11 XXX XX XXX XX B EBI PP p5 SEPT 11 XXX XX XXX XX A INIT EDIT PP 20 AUG 11 XXX XX XXX XX IRE MODIF DES DATE VER DATE SCALE 1 1 REV SHEET 8 E This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings 4 5 3 7 6 L22 1V8 220ohm at 100MHz A1V8 J 1 2 1 ed Se C129 hne pugne e C132 d 10uF T ET 100nF T 100nF 100nF T 4 7uF 7 li S E GND ETH GND Em L23 A3V3 220ohm at 100MHz 3V3 1 2 das kan 100nF 10uF A1V8 1V8 GND ETH GND ETH 4 D 0 15 gt unig 9 3 x RES amp A3V3 ine co o co ooo ES J00 0061 5 a x ales EO 5 48 op a8 a See US ensi i Lud DI 47 SC aS s S 1 5 A gt 2 TX 2 GE 55 A O ETH D4 43 505 ETH D5 42 GC ETH D6 EN 16 RX A3 ETH_D7 40 SDS m T O ETH_D8 39 oc KH 1V8 ETH D9 36 SS 1 A ETH D10 35 T SC ETH_D11 34 ae R176 5 3 R177 n R179 Se SI 49 9R 1 49 9R 1 49 9R 1 49 9R 1 D D D ETH Di4 31 8015 wid SEI Sag SR 30 5014 T 75 DNP 47K lt 47K SD15 l cias el C137 KSZ8851 16MLL E 100nF 100nF 5 EED 75
47. NCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDEN TAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice Atmel does not make any commitment to update the information contained herein Unless specifically provided otherwise Atmel products are not suitable for and shall not be used in automotive applications Atmel s products are not intended authorized or warranted for use International Atmel Asia Limited Unit 01 5 amp 16 19F BEA Tower Millennium City 5 418 Kwun Tong Road Kwun Tong Kowloon HONG KONG Tel 852 2245 6100 Fax 852 2722 1369 Product Contact Web Site www atmel com www atmel com AT91SAM Literature Requests www atmel com literature as components in applications intended to support or sustain life 2012 Atmel Corporation All rights reserved Atmel Atmel logo and combinations thereof QTouch and others are
48. NDWE PD2 A21 NANDALE Es GAS gg idR PD3 A22 NANDCLE nou aar OY Wg Le DDR2 DQMO 6 PD4 NCS3 Eel DAR LESS FS DDR2_DQM1 6 Be ier EBI_DQSO R39 ANN IOR S DDR2 DOSO 6 PD6 D16 pr 8 F DUS 5 DDR2 past 6 PD7 D17 PDO NANDOE R48 OR EBI RAS R41 10R TD gt gt DDR2 RAS 6 DG 8 PDT NANDWE R49 ANN OR NANDWE 6 EBLCAS Nw DDRZ CAS 6 PD2 NANDALE R50 V VOR GE oe PDS NANDGLE R51 AAA OR be NANDCLE 6 EBI SDWE R43 4 AA 10R DDR SDWE 6 PD12 D22 PD12 5 PPS men G div Ge Es NANDCS 6 EBI_SDCKE R44 AA FS DDR2 SDCKE 6 PD13 D23 PD13 5 POs NANDHIBI R53 AA 5 NANDR B 6 EBI SDCK R45 10R PD14 D24 SCH Je EBI NSDCK R46 VV V ron LL ED PD15 D25 A20 EBLNSDUS RIB AAA LOR SSS DDR2 NSDCK 6 PD16 D26 A23 EBI NOS1 5005 R47 10R PD17 D27 A24 PD17 5 See MA gt DDR2NCS 6 PD18 D28 A25 PD18 5 PD19 D29 NCS2 Geer me PD20 D30 NCS4 PD21 D81 NGSS post 59 EE A MEL C NOR met PP NOV B5 NOV 11 KX XXK XX B5 SEPT 11 XXX KX XXX XX ROUSSET A INIT EDIT PO AUG 11 XXX XX XXX XX IRE MODIF VER SAM9N12 EK_RevC SCALE 1 1 REV BGA217 LUI EBI INTERFACE S C This agreement Is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings E A a D 4 lt gt PA 0 31 7 8 MN7B SAM9N12_LBGA217 PIOA PAO TXDO SPI_NPCS1 L Ei PA1 RXDO SPIO NPCS2 J3 PAZ MN8 See P4 PAS NL17SZ12
49. O SPI1 MISO ZigBee PA22 TIOA1 SPI1 MOSI ZigBee PA23 TIOA2 SPI1 SPCK ZigBee PA24 TCLKO TK Audio PA25 TCLK1 TF Audio PA26 TCLK2 TD Audio PA27 TIOBO RD Audio PA28 TIOB1 RK Audio PA29 TIOB2 RF Audio PA30 TWDO SPI1 NPCS3 Audio amp LCD connector PA31 TWCKO SPI1_NPCS2 Audio amp LCD connector SAM9N12 CN11 EK User Guide AMEL 4 19 11186A ATARM 29 Nov 12 m PIO B Pin Assignment Table 4 4 PIO B Pin Assignment and Signal Descriptions Signal Alternate Periph A Periph B Periph C PBO RTS2 LCD connector PB1 CTS2 LCD connector PB2 SCK2 JUMPER to GND PB3 SPIO_NPCS3 PB USER1 PB4 USER LED1 PB5 USER LED2 PB6 AD7 PWR LED PB7 AD8 EN5V HOST PB8 AD9 OVCUR USB PB9 AD10 PCK1 LCD connector PB10 AD11 PCKO Audio PB11 ADO PWMO TSC PB12 AD1 PWM1 TSC PB13 AD2 PWM2 TSC PB14 AD3 PWM3 TSC PB15 AD4 TSC PB16 AD5 VBUS SENSE PB17 AD6 Analog input PB18 IRQ ADTRG LCDHSYNC 0R AIMEL 4 20 aay O SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 m PIO C Pin Assignment Table 4 5 PIO C Pin Assignment and Signal Descriptions Signal Alternate Periph A Periph B Periph C PCO LCDDATO TWD1 LCD PC1 LCDDAT 1 TWCK1 LCD PC2 LCDDAT2 TIOA3 LCD PC3 LCDDAT3 TIOB3 LCD PC4 LCDDAT4 TCLK3 LCD PC5 LCDDAT5 TIOA4 LCD PC6 LCDDAT6 TIOB4 LCD PC7 LCD
50. OOD 1 2 d or E 2 22 Ra 4 EN 66 ADJ L3 VDDANA sls EE 2200hm at 100MHz a 7 1 2 TP5 F 15pF 5 O 3 SHON gt ANN 4 E gt R5 10K 5V 3 4 PWR EN 1 R6 10K 45V MN2 1V8 TP6 VDDIOM LP38692MP 1 8 2200hm at 100MHz VIN 1 2 eels le C8 2 VDDNF TT 4 7uF 1 2 2 2 c9 2200hm at 100MHz TPS VEN amp nc GC 1 E 4 O A USB 5V REGULATED 5V ONLY swi TRIO Hv SWSLIDES MN3 ADP1715ARMZ El NS T 3V3 EN 4 Jack 2 1mm 4 SF1812 2A DC 5V 3 ef 2 2 Bib c11 le C144 O 3 NA T tok 10uFT 100nF e c10 le C147 E 10uF T 22pF CR 406 R13 R j 5V TT 88 47K 1 P VOUT 0 8V x Rtop Rbottom Rbottom ns gt ROUSSET A INIT EDIT PP 05 APR 12 PP 05 APR 12 Lt REM MOD DES DATE VER DATE SAM9CN11 EK SCALE 1 1 REV SHEET E A 2 POWER SUPPLY Kee CH EE ito uri aon di gn arl prd 8 7 6 4 3 2 1
51. PC4 LCDDAT4 TCLK3 PC5 LCDDATS5 TIOA4 PC6 LCDDAT6 TIOB4 PC7 LCDDAT7 TCLK4 PC8 LCDDAT8 UTXDO PC9 LCDDAT9 URXDO PC10 LCDDAT10 PWMO PC11 LCDDAT11 PWM1 PC12 LCDDAT12 TIOAS PC13 LCDDAT13 TIOBS PC14 LCDDAT14 TCLK5 PC15 LCDDAT15 PCKO PC16 LCDDAT16 UTXD1 PC17 LCDDAT17 URXD1 PC18 LCDDAT18 PWMO PC19 LCDDAT19 PWM1 PC20 LCDDAT20 PWM2 PC21 LCDDAT21 PWM3 PC22 LCDDAT22 TXD3 PC23 LCDDAT23 RXD3 PC24 LCDDISP RTS3 PC25 CTS3 PC26 LCDPWM SCK3 PC27 LCDVSYNC RTS1 PC28 LCDHSYNO CTS1 PC29 LCDDEN SCK1 PC30 LCDPCK PC31 FIQ PCK1 AT91SAM9CN11 CU PA 0 31 6 OE Dataflash PB 0 18 PC 0 31 7 8 3 7 8 3 7 gt Ho voc PB2 VDDANA S R63 10K JP7 e MN8 NL17SZ126 VDDIOPO 5 2 IN 4 _le c58 3 OUT 100nF GND VDDIOPO 3 R55 470K MN9 AT25DF321A VDDIOPO PA12 SPI0_MOSI R56 oR 5 8 PATT SPI0 MISO R57 VV oR 3 voc PAT PIO_SPCK R58 VVV OR 6 MH el C59 E SPD NN 4 SCK WP 100nF HOLD SPI0_NPCS0 d tas GND 4 SERIAL DATAFLASH Ten VDDIOPO VDDIOPO VDDIOPO L 3 R59 3 R60 3 R61 4 7K 4 7K 10K MN10 AT24C512C SSHD T PA31 TWCKO 1 6 1 4 SCL AO PA30 TWDO I Ek E y S 8 A3 S VDDIOPO voc R62 DNP C60 100nF le We VDDIOPO S R64 1 5K MN11 DS2431P 3 Not Hj PA4 R65
52. PWMO SERIAL EEPROM PD18 M PB12 AD1 PWM1 JP7 PD19 49 PB13 AD2 PWM2 PB2 2 PD20 49 PB14 AD3 PWM3 VDDIOPO PB15 AD4 AO PB16 AD5 PB17 AD6 e PB18 IRQ ADTRG EF MN11 S DS2431P NC1 PA4 R65 A OR a SB NC3 Zz 18 78 DNP PC28 IED gt PC 0 31 3 7 ONC4 Oa IW a SAM9N12 LBGA217 PIOC G2 PCO PCO LCDDATO TWD1 ET pei PC1 LCDDAT1 TWCK1 ig PCZ B PC2 LCDDAT2 TIOA3 PC3 LCDDAT3 TIOB3 15 1 WIRE EEPROM PCA LCDDATA TCLK3 73 pes PCS LCDDATS TIOM rie Pte PC6 LCDDATE TIOB4 Ha PG7 PC7 LCDDAT7 TCLK4 Lee peg PC8 LCDDAT8 UTXDO 75 P69 PC9 LCDDATS URXDO H4 P610 PC10 LCDDAT10 PWMO Rp PC11 LCDDAT11 PWM1 PC72 PC12 LCDDAT12 TIOA5 k3 PCTS VDDANA PC13 LCDDAT13 TI0B5 MT ped KR PC14 LCDDAT14 ITCLKS Ly PGTS EO D8 Blue PC15 LCDDAT15 PCKO PB4 PC18 LGDDAT16 UTXD1 Hie PC17 LCDDAT17 URXD1 Ni PETE PC18 LCDDAT18 PWMO R67 deg PC19 LCDDATI9 PWM1 Hys ie 470R BEE PC20 LCDDAT20 PWM2 p Pest nt PC21 LCDDAT21 PWM3 p3 psp D PC22 LCDDAT22 TXD3 L s R68 PC23 LCDDAT23 RXD3 Lee pas PC24 LCDDISP RTS3 PC25 ICTS3 L SES PC26 LCDPWM SCK3 Hr pess PC27 LCDVSYNC RTS1 Har Pos PC28 LCDHSYNC CTS1 N4 Pese 2 PC29 LCDDEN SCK1 LS peso I PC3O LCDPCK HUT pst A B L PP p5 NOV 11 XXX XX XXX XX C X ST EBI PP_P5 SEPT 11 XXX KX XXX XX A INIT EDIT PP PC31
53. R2 CAS 6 EBI SDWE R43 10R EBL_SDCKE Raa VVV Tor LIA SDWE 6 E ANN TS DDR2 SDCKE 6 EBI SDCK R45 10R EBL_NSDCK R46 EE LL d 6 EBI NOS1 SDCS D I yp 10R gt ore Nest 6 Eu 1 ROUSSET A INIT EDIT PP 05 APR T2 PP 05 APR T2 REM Mobi DES DATE VER DATE si ISCALE REV SHEET SAM9CN11 EK 1 1 4 EBI INTERFACE L A Tis geome osp Rain episke vr in analoge era ne 1 MN7B SAMSCNII LBGA217 PIOA PAO TXDO SPI1_NPCS1 PA1 RXDO SPIO_NPCS2 PA2 RTSO PA3 CTSO PA4 SCKO PAS TXD1 PA6 RXD1 PA7 TXD2 SPI0 NPCS1 PA8 RXD2 SPI1_NPCSO PA9 DRXD PA10 DTXD PA11 SPIO MISO MCI DA4 PA12 SPIO MOSI MCI DAS PA13 SPIO SPCK MCI DAG PA14 SPIO NPCSO MCI DA7 PA15 MCI DAO PA16 MCI CDA PA17 MCI CK PA18 MCI DA1 PA19 MCI DA2 PA20 MCI DA3 PA21 TIOAO SPI1_MISO PA22 TIOA1 SPI1 MOSI PA23 TIOA2 SPI1_SPCK PA24 TCLKO TK PA25 TCLK1 TF PA26 TCLK2 TD PA27 TIOBO RD PA28 TIOB1 RK PA29 TIOB2 RF PA30 TWDO SPI1_NPCS3 PA31 TWCKO SPI1_NPCS2 AT91SAM9CN11 Cl MN7C SAMICNI1_LBGAZ17 PIOB PBO RTS2 PB1 CTS2 PB2 SCK2 PB3 SPIO_NPCS3 PB4 PBS PB6 AD7 PB7 AD8 PB8 AD9 PB9 AD10 PCK1 PB10 AD11 PCKO PB11 ADO PWMO PB12 AD1 PWM1 PB13 AD2 PWM2 PB14 AD3 PWM3 PB15 AD4 PB16 AD5 PB17 AD6 PB18 IRQ ADTRG AT91SAM9CN11 Cl MN7D SAMSCNI1_LBGAZI7 PIOC PCO LCDDATO TWD1 PC1 LCDDAT1 TWCK1 PC2 LCDDAT2 TIOA3 PC3 LCDDAT3 TIOB3
54. S 3 p 150mA 2 E7 N C14 VOC G4 O C80 100nF cll 4 NANDCS DN 4 Eg N C15 vec Hag E C81 100nF 3 OUT Fa N C16 VEG Hi L 100nF GND Fa N C17 5 C85 100nF eal ye C19 avo D VDDIOPO 1V8 Fey N C20 cs 25 le C86 sl oan G3 N C21 VSS Lei 100nF G8 N C22 VSS x3 DDR VREF TP17 Lr Nicos vss El 0 Test Point R54 R156 L2 e ie est Point 2 10K iok N C25 VFBGA 63 ETT 5 OE_Dataflash 1 OE NAUEN eg ane Toor SRy St NAND FLASH D11 gt gt gt BAT54C m SAM9CN11 EK DDR2 NAND FLASH A INITEDIT PP 05 APR 12 PP 05 APR 12 EM MODIF DES DATE VER DATE SCALE 1 1 REV SHEET E 6 ei This agreements our propery Reproduction and publication without our writen authorization shal expose fender legal proceedings 1 VDDIOPO JP10 4 m Sb R83 pb 10K S 10K 68K 68 68K S 68K S 68K GENEE Up Touch Connector PA7 card detect 10 UP TOUCH nCD 12 m Sheni La WP Shell 4 PA18 DA 1 8 8 PA15 2 7 7
55. S Ya 3V3 1V8 23 d RSTN 4 pE 1 4 ee MN20 25 3 tpi SN74LVC1G07 ol C138 pigg pees 55 GE T H n c vec L 100E SR 8888 282 C139 25 ciao 2 22pF 22pF NRST DA vele ele Zi eun yH 7 L de pYA GND NOR NRST 1 1V8 0141 TT 10uF R189 R190 oR oR MW MW ER gt SE GND AIMEL ROUSSET A INIT EDIT PP 05 APR 12 PP 05 APR 12 EM _ MODIF DES DATE VER DATE 4 SCALE REV SHEET SAM9CN11 EK 1 1 9 ETH This agreement is our property Reproduction and publication without our uren authorization shal expose ofender to legal proceedings 1 AIMEL FEET CO Section 6 Display Module Hardware 6 1 Board Overview SAM9N12 CN11 DM board carries a 4 3 TFT LCD module with touch screen The DM board also carries four QTouch pads Figure 6 1 DM Board SAMS9CN11 DM RevA 6 2 Equipment List Here is the list of the DM board components One 4 3 TFT LCD module LCD Back light driver 3 3V regulator QTouch device 1 Wire device SAM9N12 CN11 EK User Guide 6 1 11186A ATARM 29 Nov 12 6 3 Function Blocks 6 3 1 3 3V Regulator The SAM9N12 CN11 DM board features its own LDO for local power regulation It accepts DC 5V power from a 500 mA power switch on the EK and outputs a regulated 3 3V to most other circuits on the board Figure 6 2 DM Board Power Suppl
56. SAM9N12 CN11 EK User Guide AIMEL 11186A ATARM 29 Nov 12 Section 1 IMO e BEE 1 1 1 1 SAM9N12 CN11 Evaluation kt 1 1 12 User Guide Cohtent nue ege eh ale ie eee 1 1 1 3 References and Applicable Documents 1 1 Section 2 18 Se 0 EEE EE EE 2 1 2 1 died 2 1 2 2 Evaluation Board Specifications 2 2 23 eere 2 2 Section 3 Power E 3 1 34 Poweruptine Board tnt 3 1 TN 3 1 3 3 Sample Code and Technical Support annen neren eenennerenenenennneerennenenneeevenvnerenneeeen 3 1 3 4 Recovery Procedure nene netten etnia tenen denk venen ERE ee aaa ERE 3 1 Section 4 Evaluation Kit Hardware iua eei tren uasa delen 4 1 41 Board eei anda ek eek du ede Duda ee 4 1 4 2 Equipment eC PH 4 2 4 2 1 Features D uiii Erud v acad dan 4 2 4 2 2 Interface Connechlon eee eene nennen nennen snnt 4 3 423 Configuration Anis eenn EET aaa RE o ead 4 3 43 let Ee CN 4 5 451 ee 4 5 4 9 2 Clock Distribution aie 4 5 4 3 8 Reset and Wake up Circuitry anneer eenenneerenneneneneerennenenenneennneenenn 4 6 4 3 4 Power Supplies enne nennen nnn nennen nnn sinet 4 6 43 5 4 7 4
57. Signal Descriptions Pin Mnemonic Signal description 1 Center 5V 2 Floating 3 GND 4 4 2 JTAG ICE Connector Figure 4 29 JTAG J4 Table 4 8 JTAG ICE Connector J4 Signal Descriptions Pin Mnemonic Signal Description VTref 3 3V power This is the target reference voltage It is used to check if the target has power to create the logic level reference for the input comparators and to control the output logic levels to the target It is normally fed from VDD on the target board and must not have a series resistor Vsupply 3 3V power This pin is not connected in SAM ICE It is reserved for compatibility with other equipment Connect to VDD or leave open in target system nTRST TARGET RESET Active low output signal that resets the target JTAG Reset Output from SAM ICE to the reset signal on the target JTAG port Typically connected to nTRST on the target CPU This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection GND Common ground SAM9N12 CN11 EK User Guide AMEL 4 23 11186A ATARM 29 Nov 12 Table 4 8 JTAG ICE Connector J4 Signal Descriptions TDI TEST DATA etd d seite ala JTAG data input of target CPU It is recommended that this pin is pulled to a 5 output line sampled defined state on the target board Typically connected
58. T6 PC22 LCDDAT22 PD6 D16 PA7 MCI card detect PA23 SPH SPCK PB7 ENSV HOST PC7 LCDDAT7 PC23 LCDDAT23 PD7 D17 PA8 SEI NPCSO PA24 TK PB8 OVCUR USB PC8 LCDDAT8 PC24 LCDDISP PD8 D18 PA9 DRXD PA25 TF PB9 PCS LCDDAT9 PC25 ENSV LCD PD9 919 PAio DTXD PA26 TD PBio PC10 LCDDAT10 PC26 LCDPWM PD10 D20 PA11 SPIO MISO PA27 RD PBii ADO PCii LCDDAT11 PC27 LCDVSYNC PD11 D21 A m L PA12 SPIO MOSI PA28 RK PB12 AD1 PC12 LCDDAT12 PC28 LCDHSYNC PD12 D22 PA13 SPIO SPCK PA29 RF PBi3 AD2 PC13 LCDDAT13 PC29 LCDDEN PD13 D23 PA14 SPIO_NPCSO PA30 TWDO PBi4 AD3 PC14 LCDDAT14 PC30 LCDPCK PDi4 D24 ROUSSET A INIT EDI PP 05 APR 12 PP 05 APR 12 PA15 MCI DAO PA31 TWCKO PBi5 AD4 PC15 LCDDATI5 PC31 OVCUR LCD PD15 A20 L REM MOD DES DATE VER DATE SAMSCN11 EK SCALE 4 1 REV SHEET 1 Block Diagram Kee CH A K TEE EE 8 7 6 5 4 3 2 1 MNI 3V3 2 i VDDIOPO FORCE 45V O RT9018A 2200hm at 100MHz POWER ON t 2 un x 1 E sl JP1 45V VDD 4 1 no 2 c1 sl 0 c4 sl 05 VDDIOP1 10uF 1uF 5 NC 10uF 1uF 2200hm at 100MHz Q1 PG
59. XX L I REM MODIF DES DATE VER DATE i SAM9N12 EK RevC SCALE 171 REV SHEET BGA217 6 _DDR2 NAND FLASH I C This agreement is our property Reproduction and publication without our written authorization shall expose offender to legal proceedings 1 PAZ VDDIOPO PA17 CK MCI CDA PA10 MCI DA3 VDDIOPO DTXD MN16 MAX3232CSE VDDIOPO 16 PAQ DRXD PAS ZB_RSTN R142 J8 SD PO9KC M1 Up Touch Connector UP TOUCH ncD Shell 1 Shell2 DAT1 RSV DATO DO vss2 CLK SCLK VDD CMD DI CD DAT3 CS DAT2 RSV SD CARD SD CARD OR ZB_IRQO PA2 OR ZB SLPTR PA6 SPI1 MOSI PA22 RIA A OR SPI SPCK PA23 L13 2200hm 100MHz 3V3 1 2 ZIGBEE VDDANA d C95 L 096 pa C97 2 2uF Analog input PB17 e VR1 10K 2 Ri STA OR 098 T PC3 LCDDAT3 R100 22R 21 PC5 LCDDAT5 R10 22R 23 PC7 LCDDAT7 R10 NNN 22R 25 NNM 22R LCDDAT8 J9 tss SR PA 78500 R89 AA OR a ZB_IRQ1 PA3 PA31__ TWCKO ROT ANA OR at TWD0 PA30 m LCDDAT15 PC15 mi LGDDAT14 PCi4 13 LCDDAT13 15 88 17 EB SR PC LCDDAT R98 22R aioe SR SR SR SR SR
60. d by either a USB connection via J3 or a 5V DC block through input J1 refer to usb schematic A manual power supply selection SW1 between the USB supply and the 5V power supply is provided to select the main power line Figure 4 5 Power Input REGULATED SV ONLY n MPITOP 2 1mm 1 AMEL 4 6 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide Connector J1 is provided for use with a DC adapter It is a 2 5 mm male power jack Table 4 2 below lists the DC adapter connector pinouts Table 4 2 Power Input Configuration PIN INPUT 1 Center Positive 2 No connection 3 Outside Ground 4 3 5 Power Rails The SAM9N12 CN11 EK Board contains three regulated power supplies m 3 3V DC supply m 1 8V DC supply m 1 0V DC core supply The outputs of these regulated power supplies are distributed as necessary to the circuits on boards The USB supplies and the 5V input DC block are further regulated to 3 3V The main 3 3V regulator is based on a RICHTEK RT9018A low dropout regulator providing a fixed output of 3 3V Its output is used for m VDDIOPO m VDDIOP1 m VDDANA m VDDOSC m VDDUSB m VDDFUSE When the 3 3V supply is present power LED D10 is lit Test points TP2 to TP5 are used to perform testing Figure 4 6 3 3V Supply TP1 MN1 3V3 2 Q Oo AIMEL SAM9N12 CN11 EK User Guide ey 4 7 11186A ATARM 29 Nov 12 The 1 8V DC core supply is based on an LDO LP38692MP IC It is powered by t
61. he 5V DC supply Its output is used for VDDIOM and VDDNF Test point TP6 is used to perform testing Figure 4 7 1 8V Supply L4 5V MN2 1V8 ue 4 LP38692MP 1 8 VDDIOM at 100MHz L5 4 7uF 2200hm at 100MHz A 2 VDDNF The 1 0V DC core supply is based on an LDO ADP1715AR It is powered by the output of the 3 3V CC supply Its output is used for VDDCORE and VDDPLL Test point TP10 is used to perform testing Figure 4 8 1V Supply 41V 3V3 C11 le C144 10uF 100nF 010 10uF 22pF EEE R13 4 3 6 Battery Backup VDDBU pin is powered from the 3 3V rail and a backup battery BT1 via a dual Schottky diode D1 Test point TP13 and jumper JP2 are used to perform testing Figure 4 9 Backup Battery VDDBU JP2 TP13 C16 100nF Note Test points TPn are provided for easy access to each of the regulated power lines SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 4 3 7 Memory 4 3 7 1 DDR2 SDRAM The SAM9N12 CN11 processor uses DDR2 SDRAM as the system memory The DDR2 interface uses 1 8V power The DDR2 chips and SAM9N12 CN11 processor are connected directly The interface is 1 8V provided by an on board voltage regulator VREF which is half the interface voltage or 0 9V is provided by a simple voltage divider of 1 8V m One 1 Gbit DDR2 SDRAM memory Micron MT47H64M16HR 8Meg 16 8 16 bits data interface connected to D 0 15 4 3 7 2 NAND FLASH The SAM9N12 CN11 EK has native supp
62. ibility freeing these dedicated PIO lines for other custom usages Figure 4 18 Audio CODEC PA31 PA30 PB10 PA24 PA29 PA26 4 14 L14 AUD 1V8 220phm at 100MHz 2 AVDD1V8 1 AUD 1V8 21 c99 co E I AGND_AUDIO C106 C107 10uF 100nF C108 4 7uF e AGND_AUDIO AGND_AUDIO KG AGND AUDIO TWCKO 2 TWDO SOAK SDA 28 PCKO R15 228 MELK TK R159 oR 29 BK BEES ME BCLK GPI04 BE RISAN R 30 oF LRCLK DACDAT ADCDAT UNEOUTR 1 GPIO1 IRQ LINEOUTFB 1 2 AVDD1V8 WM8904 AGND AUDIO 7 CPVDD C113 8 2 2uF FH IN1L DMICDATI 10 INTR DMICDAT2 AGND AUDIO oe 1 AVDD 2200hm at 100MHz 43 3 ul 1 2 a C115 C116 9 2 2 2uP T 2 2uF a el c117 C118 a 2 2 T 100nF TT 4 7uF lz 8 2 2K AGND AUDIO x S E x 8 a 5 R191 oR AGND AUDIO AGND AUDIO AGND AUDIO Kos us 10uH 150mA 4 7uF C120 C121 AGND AUDIO AUD 1V8 7 AGND AUDIO ATMEL SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 4 3 16 SD Card The SAM9N12 CN11 has a high speed Multimedia Card Interface MCI It is used as a 4 bit interface connected to an SD card slot Figure 4 19 SD Card VDDIOPO JP10 pt Sree Tres SRe4 R87 S R88 10K S10K 68 68K S 68K 3 usan Up Touch Connector PAZ MCI card detect 10 UP TOUCH ncD 12 11 Shell1 WP Shell2 FM PA18 MCI DA1 1 2 8 8 PA15 MCI DAO na 7 DAT1 RSV SC PA17 6 D VSS2 MC
63. igure 6 4 Back Light Control 5V_INTER 22uH ODD D1 VLED RB160M 60 60V 1A C9 VIN SW a LCDPWM OVE SHDN FB CP2123ST A1 300mv NED R40 10k 2 x5 LEDs Back Light ae 7 5R AMEL 6 3 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide 6 3 4 QTouch The SAM9N12 CN11 DM board carries a QTouch device piloted through a TWI interface It manages four Capacitive touch buttons directly printed on the PCB There are dual footprints for the QTouch device and SOIC is the default mounted one Figure 6 5 QTouch 3V3_LCD MN5 I a H wp vss His 2 13 R65 4 7k TWO MODE VSS H2 REE NNZ 7k 3V3_LCD RESET 4 SDA_ KEY 11 R68 4 7k egene BESEL_ KEY2 C21 ZB IR CREE CHANGE KEY3 SCL KEY4 3 T E X KEY6 KEYS X We o QT1070 SOIC Q a SCL 7 SDA 16 CHANGE KEY6 17 2 RESET KEY5 m 6 KEY4 YA X 7NC5 ae KEY3 3 KEY3 DC di KEY K4 A710 NC4 KEY2 4 KEY2 R72 NNATKDNP STB NC3 a KEY 5 KEYI R74 47k DNP XD INC2 B KEYO KEY K3 XJ NC gt x E Xn N E KEY K2 qe 6 3 5 1 Wire The DM board also uses 1 Wire device as soft label to store the information such as chip type manu facture name production date etc Figure 6 6 1 Wire on DM 3V3 LCD NC2 NC5 9 X ONE WIRE DATA NC4 5 X DS2433S AIMEL SAM9N12 CN11 EK User Guide 6 4 11186A ATARM 29 Nov 12
64. in UART TXD and RXD only is buffered through an RS232 transceiver MN16 and brought to the DB9 male connector J11 Figure 4 11 UART MN 16 MAX3232CSE VDDIOPO GND TH IN TOUT o T2IN JTAG Interface The SAM9N12 CN11 EK board includes a JTAG interface port J4 to provide debug level access to the processor The JTAG port is a 20 pin male connector This port provides the required interface for in cir cuit emulators such as ARM s Multi ICE Figure 4 12 JTAG VDDIOPO C4 e 20D U16 XOUT C47 le 15pF Med sann 2 R35 C 32 768 kHz 100K C50 le 15pF A3 i VDDIOPO XOUT32 voosu 1_q D 2 84 ITAGSEL SD1 T15 c ae 4 CS BEE NTRST TD 8 GE KS SE TMS SU S LIT aAA On TOK pA RTCK Un RTC DCH 7 9 NRST gt NRST Ka 7 WKUP gt A5 WKUP 2 SHON amp 1 85 SHDN AMEL SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 4 3 10 Serial Peripheral Interface SPI Controller The SAM9N12 CN11 serial processor provides two high speed Serial Peripheral Interface SPI control lers One port is used to interface with the on board serial DataFlash A 3 state buffer is in serial with DataFlash CS signal with PB1 to give a manually disable manner for DataFlash boot Figure 4 13 SPI DataFlash MN8 NL17SZ126 VDDIOPO 1 OE Dataflash L gt PA14 VDDIOPO e 059 100nF SPIO NPCSO 4 3 11 Tw
65. n 6 7 8 9 4 24 AIMEL SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 Table 4 9 DBGU Connector J11 Signal Descriptions Pin Mnemonic PIO Via translator Description 1 4 6 9 No connection 2 RXD Received Data PA9 RS232 serial data output signal 3 TXD Transmitted Data PA10 RS232 serial data input signal 5 GND Common ground 7 RTS Request To Send Not used 8 CTS Clear To Send Not used poe Shield 4 4 4 USB MicroB Figure 4 31 USB Device Micro B Connector J3 12345 Micro B Table 4 10 USB Device Micro B Connector J3 Signal Descriptions Pin Mnemonic Description 1 Vbus 5V power 2 DM Data minus 3 DP Data plus 4 ID On the go identification 5 GND Common ground 6 7 8 9 Shield Mechanical pins 4 4 5 USB Type A port Figure 4 32 USB Type A Port J2 SAM9N12 CN11 EK User Guide eee 4 25 11186A ATARM 29 Nov 12 4 4 6 Table 4 12 SD Socket J8 Signal Descriptions Table 4 11 USB Type A Port J2 Signal Descriptions Pin Mnemonic Description 1 Vbus 5V power 2 DM Data minus 3 DP Data plus 4 GND Common ground 5 6 Shield Mechanical pins SD Card MCI Figure 4 33 SD MMC Socket J8 Pin Function PIO 1 MCI DA3 PA20 2 MCI CMD PA16 3 GND 4 VDDIOPO 5 MCI CLK PA17 6 GND 7 MCI DAO PA15 8 MCI DA1 PA18 9 MCI DA2 PA19 10 MCI C
66. nF 4 DDR2 SDWE gt WE VDDQ 100nF VDDQ 100nF 4 DDR2 DSI OE pas VREF 8 bas VSS F7 VSS 4 DDR2 DQSO LDQS VSS E8 pas VSS VSS B3 4 DDR2 DQM1 SS UDM VSSQ 4 DDR2 DQMO gt LDM VSSQ VSSQ VSSQ VSSQ RFU1 VSSQ RFU2 VSSQ RFU3 VSSQ RFU4 VSSQ DORE NIS RFUS VSSQ VSSDL 1V8 Je 084 L12 TT 4 7uF 10uH 150mA 150mA 4 NANDCS DD VDDIOPO 1V8 R80 1 5K 1 DDR_VREF TP17 Test Point je PUO gt 10K gt 10K 5 OE Dataflash TT Eo N D11 BAT54C m MN15 NL17SZ126 oe voor ZIN 7 3 OUT NANDOE 4 4 4 4 NANDWE R74 SS 1 ALE MANO FLASH vor amp 1 urzorzeosaan VO2 ar WE 03 zu CE H 05 R B 1 06 107 Hag WP N C26 F3 N C27 CHE LOCK N C28 F5 N C29 He N C30 Fas N C1 N C31 HS B N C2 N C32 res N C3 N C33 N C4 N C5 L9 N C6 N C34 Ho N C7 N C35 N C8 N C36 FMa N C9 N C37 MG N C10 N C38 io Eg NC11 N C39 X STEE N C12 EY NC13 pa PN X E7 N C14 VCC Le J C80 100nF Eg N C15 VCC H8 rj C81 100nF FZ N C16 VCC J6 5 083 100nF SFA N C17 vee g 085 100nF F5 N C18 F6 N C19 om p Neag c5 3 N C21 VSS F7 beem cm N C22 VSS 73 xT N C23 VSS ka AFF N C24 VSS AT N C25 VEBGA 63 MT29F2G08ABDHC D NAND FLASH A AIMEL ee gt B PP 5 5 11 XXX IXX XXX XX ROUSSET A INIT EDIT PP P0 AUG 11 XXX XX XXX
67. o Wire Interface TWI The SAM9N12 CN11 processor has two full speed 400 kHz master slave I2C serial controllers The controllers are fully compatible with the industry standard 120 interfaces On the EK board TWIO port is used to interface with serial EEPROM QTouch device and audio CODEC interface SAM9N12 CN11 processor supports TWI EEPROM boot at the device address of 0x50 On board the EEPROM device address is 0x51 Customer needs to dismount R61 and mount R62 as 10 kohms if EEPROM boot is needed Figure 4 14 EEPROM VDDIOPO VDDIOPO VDDIOPO SAM9N12 CN11 EK User Guide AIMEL 4 11 11186A ATARM 29 Nov 12 4 3 12 USB Ports The SAM9N12 CN11 EK features two full speed OHCI USB ports Host full speed type A USB receptacle J2 m Device full speed micro B USB receptacle J3 SAM9N12 CN11 EK features USB power function from device port J3 SW1 functions as switch between USB supply and DC input jack J1 The USB host ports are equipped with 500 mA power switch for bus powered applications Figure 4 15 USB Port L6 a at 100MHz 4 C15 7 2 R17 OR PC31 FS L7 6 2200hm at 100MHz mr TPO 1 A 2 5 4 R19 OR PB7 SP2526A 2 J2 USB AF 4 1 2 R20 27R Ger 4 C20 C25 4 a 3 R21 AAN 218 33uF 100nF USB A 2 2 S D WE D3 E TVS TVS a I B22 AA 47K PB16 V5 5MLA0603 C37 C31 ek R23 i USB Micro B AIMEL SAM9N12 CN11 EK User Guide 4 12 11186A ATARM 29 No
68. ort for NAND Flash memory and implements an 8 bit NAND Flash with 2 Gbits in size m One 2 Gbits NAND Flash Micro MT29F2G08ABDHO 16 bits data interface connected to D 0 15 4 3 7 3 NOR FLASH The SAM9N12 CN11 EK provides an optional 128 Mbits of Flash memory using a chip select signal The Flash memory is used with the 16 bit port size um One reserved position for 128 Mbits NOR Flash Numonyx JS28F128P30TF75A Figure 4 10 External memory FLASH D0 13 OD FLASH A 1 20 DDR2 D 0 1863 DDR2 A2 BD con a2 Die L por D Ir Mr DAZ DRM DQ SERT Netra H DRE Da 9 DDEZA P en pone ate ted ag DU Ko ke N R 5 DDR2 sbck eL 2 ponz sock pH DDR2 NSDCKL 2 NCSO L8 NRD DDR2 NCSI gt NWRE L7 DR RJ DDR2 RAS Riss K3 DNP JS28F128P30TF75A NOR FLASH DNP DDR2 sowe CI Dor2 past E 3 om NAND FSH DID Dor2 paso TD ET B3 DDR2 DOM fm OOOO UM DDR2 DOM DI DDR2 A15 DDR2 SDRAM n TP17 Test Part NAND FLASH AMEL 11186A ATARM 29 Nov 12 SAM9N12 CN11 EK User Guide 4 3 8 4 3 9 4 10 A 3 state buffer is in serial with NAND flash s CE signal with PB1 to give a manually disable manner for NAND boot UART DBGU The Universal Asynchronous Receiver Transmitter features a two pin UART that can be used for com munication and trace purposes and offers an ideal medium for in situ programming solutions This two p
69. r Guide Content This guide gives details on how the SAM9N12 CN11 EK has been designed It is made up of 8 sections Section 1 Introduction including references applicable documents Section 2 Kit Contents Section 3 Power Up Section 4 Evaluation Kit Hardware Section 5 EK Schematics Section 6 Display Module Hardware Section 7 DM Schematics Section 8 Revision History 1 3 References and Applicable Documents The documents listed below should be referred for more information on the SAM9CN 1 1 EK Table 1 1 References and Applicable Documents SAM9N12 CN11 Datasheet www atmel com SAM9N12 CN11 EK User Guide 1 1 11186A ATARM 29 Nov 12 AMEL Section 2 Kit Contents 2 1 Deliverables The Atmel SAM9N12 CN11 Evaluation Kit contains the following items m Board One SAM9N12 CN11 EK board One SAM9N12 CN11 DM board m Power supply Universal input AC DC power supply with US Europe and UK plug adapters One 3V lithium battery type CR1225 m Cables One serial RS232 cable One micro A B type USB cable One RJ45 crossed cable m A Welcome letter Figure 2 1 Unpacked SAM9N12 CN11 EK SAM9N12 CN11 EK User Guide 2 1 11186A ATARM 29 Nov 12 Unpack and inspect the kit carefully Contact your local Atmel distributor should you have issues con cerning the contents of the kit 2 2 Evaluation Board Specifications Table 2 1 SAM9N12 CN11 Evaluation Kit Specifications Characteristics Specifications
70. st and Device ZigBee Add on Display Module TFT LCD module with touch screen QTouch elements for user QTouch K1 to K4 Audio CODEC with input stereo headphone and microphone On board power regulation and backup battery Two user LEDs and one power LED System buttons NRST WKUP OE_CS One user button 4 2 2 Interface Connection The SAM9N12 CN11 EK board includes hardware interfaces such as DC power supply J1 Backup battery Bt1 USB host type A connector J2 USB device micro B connector J3 One Ethernet 10 100 interface through an ETH controller J16 DBGU RX and TX only connected to a 9 way male RS232 connector J11 JTAG 20 pin IDC connector J4 SD connector J8 Headphone J13 line in J15 on board mic phone mic1 DM board connection for QTouch and TFT LCD display with touch screen and backlight J9 J10 ZigBee connector J12 Three IO expansion ports J5 J6 J7 Test points various test points are located throughout the board 4 2 3 Configuration Items SAM9N12 CN11 EK User Guide Power selection switch SW1 Push button NAND DataFlash OS_CS PB1 Push button NRST board reset PB2 Push button Wake up PB3 Push button PB_USER PB4 AMEL 4 3 11186A ATARM 29 Nov 12 Figure 4 3 SAM9N12 EK Board Layout 6 h ES CES EE JH 3 m E 3 r TN 1111111 AIMEL SAM9N12 CN11 EK User Guide 4 4 11186A
71. to TDI on target CPU on the rising edge of the TCK signal 6 GND Common ground JTAG mode set input of target CPU This pin should be pulled up on the target 7 GA MODE Typically connected to TMS on target CPU Output signal that sequences the target s JTAG state machine sampled on the rising edge of the TCK signal 8 GND Common ground TCK TEST CLOCK 9 dd OE JTAG clock signal to target CPU It is recommended that this pin is pulled to a Sy 9 defined state on the target board Typically connected to TCK on target CPU logic and control register access 10 GND Common ground Some targets must synchronize the JTAG inputs to internal clocks To assist in RTCK Input return meeting this requirement a returned and retimed TCK can be used to 11 test clock signal from dynamically control the TCK rate SAM ICE supports adaptive clocking which the target waits for TCK changes to be echoed correctly before making further changes Connect to RTCK if available otherwise to GND 12 GND Common ground TDO JTAG TEST DATA OUTPUT Serial 13 data input from the JTAG data output from target CPU Typically connected to TDO on target CPU target 14 GND Common ground 15 nSRST RESET Active low reset signal Target CPU reset signal 16 GND Common ground 17 RFU This pin is not connected in SAM ICE 18 GND Common ground 19 RFU This pin is not connected in SAM ICE 20 GND Common ground 4 4 3 DBGU Figure 4 30 DBGU Connector J11 c3 90000 anna
72. v 12 43 13 1 Wire EEPROM The SAM9N12 CN11 Evaluation Kit uses 1 Wire device as soft label to store the information such as chip type manufacture s name production date etc Figure 4 16 1 Wire 4 3 14 ETH on EBI VDDIOPO MN 11 DS2431 P The SAM9N12 CN11 Evaluation Kit uses EBl based 8 bit EMAC controller KSZ8851 to implement a 10 100 Ethernet access The board integrates an RJ45 connector with embedded transformer and two status LEDs For more information about the Ethernet controller device refer to the Micrel KSZ8851 manufacturer s datasheet Figure 4 17 Ethernet i22 sve 220 ohm at 100 MHz Aus T 1 2 T 012821 C127 C 12820129 130 Lota e c132 TO otter gain OE 100nF TOnF T 47u GND_ETH GND_ETH us AN3 ebm at mer am lers Jena TOnF mur 198 GND ETH GND amp z Ges amp Aava D 0 15 TT fii SCH 8 SES g gos a 8 add DIE o 28 S 19 DR 5 pus SDN ES 8 Sr DIE pane ap 8 20 2 hm DK S 502 Oo SD3 504 505 3 506 mei HE A E xe SD7 17 5 3 owe 558 RXMI ele 2m S 3010 R176 R177 R178 R179 o 5011 1V8 z
73. y 5V INTER 3V3 LCD VIN VOUT C12 C15 SPX3819 C11 100n 10u C13 2 2U 500mA capability 100n 6 3 2 TFT LCD with Touch Panel The SAM9N12 CN11 DM board features an LCD controller The 4 3 480x272 LCD provides the DM with a low power LCD display feature back light unit and a touch panel similar to that used on commer cial PDAs Graphics and text can be displayed on the dot matrix panel with up to 16 million colors by supplying 24 bit data signals 8 bit x RGB by default This allows the user to develop graphical user interfaces for a wide variety of end applications Warning Never connect disconnect the LCD display from the board while the power supply is on Doing so may damage both units AIMEL SAM9N12 CN11 EK User Guide 6 2 11186A ATARM 29 Nov 12 6 3 3 Figure 6 3 LCD with Touch Panel J1 Mi 3V3_LCD Redo Redi Red2 Red3 Red4 Red5 Gr Hed6 Redz Green0 PIN 40 Greeni Green2 Green3 n Green4 S Green5 S Green6 4 3 LCD E Green7 Bled 480 H xRGBx272 V e Buet 3V3 LCD Blue2 Bue PIN 1 Blue4 Blue5 Blue6 R44 Blue7 4 7K XR TP YD L pen TP YU H il a 5 z Vo Uo Back Light R42 C18 DNP DNP The back light voltage is generated from a CP2122ST boost converter It is powered directly by the DC 5 V from the EK board The back light level is controlled by a PWM signal generated from the SAM9N12 CN11 processor F
74. y and interface assignments The SAM9N12 CN11 EK board is built around on the integration of an ARM 926 based microcontroller BGA 217 package with on board SDRAM NAND Flash and a set of popular peripherals It is designed to provide a high performance processor evaluation solution with high flexibility for various kinds of applications Figure 4 1 SAM9N12 Board Architecture 1 00000000 L 00000000 00000000000000000000 DOTE r 00000000000000000000 L AT91SAM9N12 EK SAM9N12 CN11 EK User Guide 4 1 11186A ATARM 29 Nov 12 Figure 4 2 SAM9CN11 Board Architecture Ethernet RMIT RJ45 Serial Data ZigBee Flash E 00000000000000000000 00000000000000000000 n y m a 00000000000000000000 00000000000000000000 USB USB full USB full PIO powered spee speed HE14 AT91SAM9CN11 EK 4 2 Equipment List 4 2 1 Features List Here is the list of the EK board components m SAM9N12 CN11 microcontroller BGA 16 MHz crystal 32 768 kHz crystal m Memory 1 Gbit DDR2 memory 2 Gbits NAND Flash memory with chip selection control switch Optional NOR Flash 32 Mbits SPI serial DataFlash with chip selection control switch 512 Kbits serial EEPROM 1 Kbit 1 Wire EEPROM 4 2 AIMEL SAM9N12 CN11 EK User Guide 11186A ATARM 29 Nov 12 SD MMC interface Communication One Ethernet Physical Transceiver Layer with RJ45 connector UART DBGU port with level shifter IC JTAG ICE port USB Ho

Download Pdf Manuals

Related Search

Related Contents

  BRK electronic SA67B User's Manual    Manual Syngenta bangladesh  Projet pédagogique/ éducatif.  Communiqué de presse  Sandberg Bling Cover 4/4S Black+pink  Besta CD-608 Dictionary  direction for use MOTIVA  Maintien de la langue et de la culture d`origine. Comment  

Copyright © All rights reserved. Failed to retrieve file