Xilinx UG133 User's Manual
Contents
1. MicroBlaze Microcontroller Ref Des User Guide www xilinx com 1 UG133 January 7 2005 Additional Resources XILINX Additional Resources For additional information go to http support xilinx com The following table lists some of the resources available from this website You can also directly access these resources using the provided URLs Resource Description URL Tutorials Tutorials covering Xilinx design flows from design entry to verification and debugging http support xilinx com support techsup tutorials index htm Answer Browser Database of Xilinx solution records http support xilinx com xInx xil_ans_browser jsp Application Notes Descriptions of device specific design techniques and approaches http support xilinx com apps appsweb htm Data Sheets Device specific information on Xilinx device characteristics including readback boundary scan configuration length count and debugging http support xilinx com xlnx xweb xil_publications_index jsp Problem Solvers Interactive tools that allow you to troubleshoot your design issues http support xilinx com support troubleshoot psolvers htm Tech Tips Latest news design tips and patch information for the Xilinx design environment http www support xilinx com xInx xil_tt_home jsp Conventions This document uses the following conventions An example illustrates each conve2. JE debug_module Tue Aug 24 09 30 47 2004 Target Board Xilinx Spartan 3 Demo E Family spartan3 Device XC35200 Package FT256 Speed Grade 4 Processor Microblaze System clock frequency 50 MHz Debug interface XMD Debug with Stub On Chip Memory 16 KB Total Off Chip Memory 512 KB SRAM_256Kx32 512 KB ilmb dimb JHE dimb_entlr JHE ilmb_cntir F Inb_bram iE S232 J LEDs Bit JE LED_7SEGMENT ED DEEE E EEEE EEE E E E AHHH PHAR E E E E EEEE E E E E E E E PARAMETER VERSION 2 1 0 v Figure 2 2 Xilinx Platform Studio XPS Updating and Generation Hardware Files At this point XPS is open with the selected hardware application No modifications are needed to run this design All the hardware features and peripherals have been pre loaded and pre set The Hardware Application can run any number of Software Applications When the Base System Wizard is used to create a Hardware System it also will create a simple Software Application to test the selected Hardware features and peripherals To be sure that all the Hardware files have been created in XPS please select Tools gt Update Bitstream This will run any of the programs needed to generate the Hardware Application for this reference design The message panel should read Memory Initialization completed successfully Done MicroBlaze Microcontroller Ref Des Us
3. Xilinx Embedded Development Kit EDK tools It does this through examples which show how multiple software images can be run on a defined soft Microcontroller hardware configuration This guide show how an FPGA with a soft processor can be used the same way an engineer would select an off the shelf microcontroller This guide will provide examples of a number of different microcontroller configurations from which an engineer can choose The soft microcontroller features and peripherals in the FPGA may be used without modification or may be modified and customized using the Xilinx EDK Platform Studio tools This guide will cover the flow where multiple software images are load on an unmodified hardware configuration The MicroBaze Microcontroller is an integrated solution intended for implementation of an embedded controller in FPGA by a user without extensive knowledge of the Xilinx Embedded Development Kit EDK and the Xilinx Platform Studio XPS The solution offered in this document is a minimal implementation that can be expanded easily to include other peripherals and application software for different usage All the necessary documentation references HDL code sample codes software drivers and application software are included in the tools or provided with this design Guide Contents This manual contains the following sections Microcontroller Reference Design Overview MicroBlaze Microcontroller Reference Design Number 1
4. document Version Revision 7 22 04 1 0 Initial Xilinx release 8 27 04 1 1 Edited content imported new images 11 19 04 1 2 Reconfigured book added new chapter incorporated edits 11 30 04 1 3 Reformatted book to consist of chapters for Overview and RefDes1 1 7 05 1 3 1 Made minor non technical changes only UG133 v1 3 1 January 7 2005 www xilinx com MicroBlaze Microcontroller Ref Des User Guide About This Guide troduction eys netes ee te hee ee ed ie wh es Wee 1 Guide Content isi 62 6 5b atti gd ck bh ohana ded bh cela wheel nats hen TEENAA 1 Additional Resources 0 0 cece tenn eee ennene 2 Co venlons ersa ee te aro ate a aca he IE E antennas ee cerned ange 2 Typ gtaphical serri aire e Sake a adh bec a eee dha an a E Sly 2 Online DOCUMENT cm ie Sie tex ee tine gle n a tact te baw deepal bed Reread Mens eared 3 Microcontroller Reference Design Overview Introduction 0 cece cece cence eee eens ene eneeneeneeneee 1 MicroBlaze Microcontroller Reference Design Number 1 Reference Design Building Blocks 0 00 00 ccc eee 2 Application 4551 15 30015 nE E ASEE AE REEE E SS EE KE E EEE 2 Features in iinnceia agg malig win ale Sew ge Wel leon Wh Re eel knee eh ted nc a CR 3 Getting Started creteieiae tee ee Ee ae ees 4 System Requirements en coi cries kiiged el ene a E ele beled a aE a a Te aeaii de 4 Downloading the Reference Designs susunu rrn n rarrr
5. Communication MicroBlaze Microcontroller Ref Des User Guide www xilinx com 2 UG133 January 7 2005 Features Features XILINX e MicroBlaze Microprocessor 50 MHz on the Spartan 3 Starter Kit Board derived from the 50 MHz crystal on board Instruction cache and data cache options disabled 32 32 bit general purpose registers with 32 bit address and 32 bit data buses Single cycle execution Direct access to the register file using Fast Simplex Link FSL e Unified instruction and data BRAM into single memory for both instruction and data segments Dual port 16 KB internal blockRAM memory structure 2 cycle read access from BRAM via the Local Memory Bus LMB e RS232 UART Controller Pre configured for 57600 baud rate e General purpose input output ports GPIO 8bit GPIO configured as output ports to drive LED 12 bit GPIO configured as output ports to drive the 7 segment LEDs on the board 8 bit GPIO configured as input ports to read onboard dip switches 3 bit GPIO configured as input ports to read push buttons e JTAG_UART core with Xilinx Microprocessor Debugger XMD and GDB debugger to provide application software debugging capabilities XMD uses a JTAG_UART to communicate with xmdstub on the board xmdstub is an executable software loaded into local system memory at startup Supports run time control such as Run Single Step Breakpoint View Registers and View Memory as well as debu
6. Des User Guide www xilinx com 11 UG133 January 7 2005
7. LEMENT IS FREE FROM ANY CLAIMS OF INFRINGEMENT AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT THE ADEQUACY OF THE IMPLEMENTATION INCLUDING BUT NOT LIMITED TC ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FR FROM CLAIMS OF INFRINGEMENT IMPLIED WARRANTIES OF MERCHANTABILI AND FITNESS FOR PARTICULAR PURPOSE 7 Xilinx Xilinx EDK 6 3 EDK_Gmm 11 2 This file is a sample test application C xiling_projec ISTE TED Output A Wanings A Eros 7 Ready Figure 2 4 Software Selection with a BOOT loader Loading the microblaze_O_xmdstub Software Application To configure the hardware system and to load the software application into the Spartan 3 Evaluation Board using the Digilent JTAG3 cable perform the following steps 1 Connect the Digilent JTAG3 cable to the J7 header on the Spartan 3 Evaluation Board and connect the other end to the parallel port of the PC If using the Parallel Cable IV make sure that the status light is lit on the cable Connect the Serial cable to J2 on the Spartan 3 Evaluation Board and to the serial port of the PC On the PC using hyperterminal make certain that the bit rate is set for 57600 bps on the serial port Turn on the power on t
8. MicroBlaze Microcontroller Reference Design User Guide v1 3 1 UG133 v1 3 1 January 7 2005 XILINX 7 XILINX Xilinx and the Xilinx logo shown above are registered trademarks of Xilinx Inc Any rights not expressly granted herein are reserved CoolRunner RocketChips Rocket IP Spartan StateBENCH StateCAD Virtex XACT XC2064 XC3090 XC4005 and XC5210 are registered trademarks of Xilinx Inc The shadow X shown above is a trademark of Xilinx Inc ACE Controller ACE Flash A K A Speed Alliance Series AllianceCORE Bencher ChipScope Configurable Logic Cell CORE Generator CoreLINX Dual Block EZTag Fast CLK Fast CONNECT Fast FLASH FastMap Fast Zero Power Foundation Gigabit Speeds and Beyond HardWire HDL Bencher IRL J Drive JBits LCA LogiBLOX Logic Cell LogiCORE LogicProfessor MicroBlaze MicroVia MultiLINX NanoBlaze PicoBlaze PLUSASM PowerGuide PowerMaze QPro Real PCl RocketlO SelectlO SelectRAM SelectRAM Silicon Xpresso Smartguide Smart IP SmartSearch SMARTswitch System ACE Testbench In A Minute TrueMap UIM VectorMaze VersaBlock VersaRing Virtex Il Pro Virtex Il EasyPath Wave Table WebFITTER WebPACK WebPOWERED XABEL XACT Floorplanner XACT Performance XACTstep Advanced XACTstep Foundry XAM XAPP X BLOX XC designated products XChecker XDM XEPLD Xilinx Foundation Series Xilinx XDTV Xinfo XSI XtremeDSP and ZERO are trademarks of Xilinx Inc The Prog
9. at one time To select the desired application perform the following steps 1 Select the Application tab the XPS window 2 Right click on Project Calculator_App 3 Set Mark to Initialize BRAMs The Project Calculator_App will have a small green arrow appear to the left of the text 4 Confirm that Mark to Initialize BRAMs is not checked for the other projects and default applications The Graphic to the left of each other application should appear as a green arrow with a red X over it Verify that this is the case for microblaze_0_bootloop microblaze_0_xmdstub and Project TestApp If any are set please Right click and confirm that Mark to Initialize BRAMs is not checked If checked click to deselect it The green arrow should then appear with a red X MicroBlaze Microcontroller Ref Des User Guide www xilinx com 6 UG133 January 7 2005 Downloading the Design and Launching XPS EZ XILINX File Edit View Project Tools Options Window Help Daag cE Ge cf Me the Be A n xix aS So FS mo System Applications Joptons Symbols Right Click for Options amp Software Projects ok Default microblaze_0_bootloop ey Default microblaze_O_xmdstub Project TestApp Processor microblaze_O Executable C xilinx_projects mb_mce6 3 mt Compiler Options Sources file calc_main c This file contains an application example
10. e perform the following steps 1 Connect the Digilent JTAG3 cable to the J7 header on the Spartan 3 Evaluation Board and connect the other end to the parallel port of the PC If using the Parallel Cable IV make sure that the status light is lit on the cable 2 Connect the Serial cable to J2 on the Spartan 3 Evaluation Board and to the serial port of the PC On the PC using hyperterminal make certain that the bit rate is set for 57600 bps on the serial port 3 Turn on the power on to the Spartan 3 Evaluation Board In XPS to make sure that the ELF file is up to date use Tools gt Update Bitstream There may be a warning Processor microblaze_0 has XMDSTUB mode application but xmdstub elf is not marked for download do you want to continue Click YES 5 In XPS select Tools gt Download to download the new bitstream into the FPGA The xmd stub warning will appear again Please click YES Note Close all other XMD and GDB windows prior to downloading a configuration bits Running the Calculator_App program After the Calculator_App has been loaded the hyperterminal should show Simple Calculator App for Spartan 3 Starter Kit Push button to start math operation MicroBlaze Microcontroller Ref Des User Guide UG133 January 7 2005 www xilinx com 7 Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is XILINX The Calculator_App is a simple 3 function calculato
11. er Guide www xilinx com 5 UG133 January 7 2005 Downloading the Design and Launching XPS XILINX or if all files are up to date then it will say make Nothing to be done for init_bram Done Downloading Design Files to the FPGA The following two sections illustrate two methods of downloading a Software Application into the FPGA The first method is when the Software Application can be incorporated into the FPGA bitstream The second method illustrates loading a selected application into the FPGA using the GDB debugger for software development and debugging Selecting a Software Application to Run When the FPGA is Configured In this step the Software Application that will be loaded when the FPGA is initially loaded with a new bitstream will be selected Please select the XPS Software Application tab There are 3 options that can be selected when choosing the Software Application This first example will show how a Software Application can be initially added to the FPGA bitstream This will configure the MicroBlaze Microcontroller program and Data memory with the software application already pre loaded This means that as soon as the FPGA has been successfully configured the MicroBlaze Microcontroller Software Application will already be running on the MicroBlaze Microcontroller Hardware Application In this case although multiple software applications could overlap in the Bram only one software application can be selected
12. g parameters Note Interrupts are not used in this design For an example on how to use interrupts see the Microblaze design using an OPB interrupt controller and an OPB microprocessor debug module MDM reference design available on the Embedded Design Kit web site at http www support xilinx com ise embedded edk_examples htm For documentation on interrupts see the MicroBlaze Processor Reference Guide in the EDK documentation MicroBlaze Microcontroller Ref Des User Guide www xilinx com 3 UG133 January 7 2005 Getting Started Getting Started XILINX System Requirements The following software must be installed on your PC to utilize this reference design Windows 2000 SP2 Windows XP EDK 6 3 or later Must be the same version as ISE ISE 6 3i or later To download the completed reference design the following hardware is required Xilinx Spartan 3 Evaluation Board For information on the evaluation board see http www xilinx com products spartan3 s3boards htm Xilinx Parallel Cable used to program and debug the device Serial Cable for connection to the RS232 UART via HyperTerminal The next sections of this document will discuss Downloading the reference design and test application Launching Xilinx Platform Studios XPS Downloading the Reference Designs Go to the MicroBlaze lounge at http www xilinx com microblaze_mcu_refdes1 Download the reference design starting with the MB_MCU_RefDes1 zip archi
13. nrn rnrn nrrr nren 4 Downloading the Design and Launching XPS 00005 4 Updating and Generation Hardware Files 0 c eee eee eee 5 Downloading Design Files to the FPGA a a n 6 6 66 6 Selecting a Software Application to Run When the FPGA is Configured 6 Loading the Calculator_App Software Application 6 0000 e eee eee 7 Running the Calculator_App program 0 066 7 Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is Configured and the Processor is Running 8 Updating and Generation Hardware Files 0 00 8 Loading the microblaze_O_xmdstub Software Application 9 Loading the TestApp Software Application with XMD_STUB 10 Loading the Calculator_App Software Application with XMD_STUB 11 Additional MicroBlaze and EDK Information 04 11 UG133 January 7 2005 www xilinx com MicroBlaze Microcontroller Ref Des User Guide lt XILINX About This Guide Introduction This user guide contains information on how to integrate the stand alone prebuilt MicroBlaze Microcontroller reference design into an FPGA Although this design is targeted initially for the Xilinx Spartan 3 Starter Kit Board the design may be modified readily for any Xilinx or third party platform This guide is an aid in getting started and learning how to use the
14. ntion Typographical The following typographical conventions are used in this document Convention Meaning or Use Example Messages prompts and Courier font program files that the system speed grade 100 displays Courier bold Lateral a ends that you ngdbuild design name enter in a syntactical statement peeled that you select File gt Open Helvetica bold TORPA MENN Keyboard shortcuts Ctrl C MicroBlaze Microcontroller Ref Des User Guide www xilinx com 2 UG133 January 7 2005 Conventions XILINX Convention Italic font Meaning or Use Variables in a syntax statement for which you must supply values Example ngdbuild design name References to other manuals See the Development System Reference Guide for more information Emphasis in text If a wire is drawn so that it overlaps the pin of a symbol the two nets are not connected Square brackets An optional entry or parameter However in bus specifications such as bus 7 0 they are required ngdbuild option_name design name Braces A list of items from which you must choose one or more lowpwr on of Vertical bar Separates items in a list of choices lowpwr on of Vertical ellipsis Repetitive material that has been omitted IOB 1 Name IOB 2 Name QOUT CLKIN Repetitive material that has allow block block _ name Online Document Eine oab cli
15. o the Spartan 3 Evaluation Board MicroBlaze Microcontroller Ref Des User Guide UG133 January 7 2005 www xilinx com 9 Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is XILINX 4 In XPS to make sure that the ELF file is up to date please Tools gt Update Bitstream Note Close all other XMD and GDB windows prior to downloading a configuration bits 5 In XPS select Tools gt Download to download the hardware configuration and load xmdstub into the BRAM memory Note Close all other XMD and GDB windows prior to downloading a configuration bits 6 In XPS select Tools gt XMD to open an XMD utility XMD is a JTAG utility that can be used to download and debug software XMD is also a server for GDB the GNU debugging utility Loading the TestApp Software Application with XMD_STUB 1 In XPS select Tools gt Software Debugger to open the GDB interface Source Window Choose TestApp from the User Application window In GDB select the File gt Target Settings to display the Target Selection dialog box as shown in Figure 2 3 4 Configure the Target Selection dialog box to match Figure 2 3 then click OK In Source Window gt Run click RUN This will download the executable elf file located at TestApp directory into the device 6 InSource Window the user can select Continue Single Step Set Break Point and view source code registers and memory con
16. ootloop Project TestApp and Project Calculator_App If any are set please Right click and confirm that Mark to Initialize BRAMs is not checked If checked click to deselect it The little green arrow should then appear with a red X Ps Xilinx Platform Studio C odlinx_projects mb_mc 6 3 mb_mcu_Refdes1_6 3 system mp C odlinx_projects mb_mc 6 3 mb_mcu_Re DER oi Fie Edit View Project Tools Options Window Help Dw amp B al oe cS OO me the BA hn eS AL Jx System Applications Joptons Symbols Right Click for Options a Software Projects Default microblaze_O_bootloop EB JER m 0 Yen Project TestApp Processor microblaze_0 Executable C xilinx_projects mb_me6 3 mt Compiler Options Sources EB C xilinx_projects mb_mce6 3 mb_mceu_ Headers 5 ok Project Calculator_App Processor microblaze_0 Executable C xilinx_projects mb_mce6 3 mt Compiler Options F lt gt x Console Log zi PM_SPEC Xilinx path component is lt C Xilinx6_3 EDK Gmm10 1 gt Project Opened Eo H n mo Copyright c 2004 Xilinx Inc All rights reserved Inc XILINX IS PROVIDING THIS DESIGN CODE OR INFORMATION AS IS Ac COURTESY TO YOU BY PROVIDING THIS DESIGN CODE OR INFORMATION ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE APPLICATION OR STANDARD XILINX IS MAKING NO REPRESENTATION THAT THIS IMP
17. ow an example of how a Hardware Application can be initially loaded with a Stub program This will configure the MicroBlaze Microcontroller where it is waiting to be loaded with the actual Software Application Updating and Generation Hardware Files Please select the XPS software Application tab There are 3 options that can be selected when choosing the Software Application This example will show how a Software Application can be loaded after the FPGA is configured A Software Applications can be MicroBlaze Microcontroller Ref Des User Guide www xilinx com 8 UG133 January 7 2005 Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is 2 XILINX loaded and run and then a different Software Application can be loaded and run In this example the MicroBlaze processor must be loaded with a Software Application through the use of a stub program To select the stub application perform the following steps 1 Select the Application tab the XPS window 2 Right click on Default microblaze_0_xmdstub 3 Set Mark to Initialize BRAMs The Default microblaze_0_xmdstub will have a little Green Arrow appear to the left of the text 4 Confirm that Mark to Initialize BRAMs is not checked for the other projects and default applications The Graphic to the left of each other application should appear as a green arrow with a red X over it Verify that this is the case for microblaze_0_b
18. ps as been omitted loc1 loc2 locn The following navigation conventions are used in this document Convention Meaning or Use Example f See the section Additional Cross reference link to a Resources for details Blue text location in the current f document Refer to Title Formats in Chapter 1 for details Cross reference link to a See Figure 2 5 in the Virtex II Red text location in another document Handbook Blue underlined text Hyperlink to a website URL Go to http www xilinx com for the latest speed files MicroBlaze Microcontroller Ref Des User Guide UG133 January 7 2005 www xilinx com S7 XILINX Microcontroller Reference Design Overview Introduction When selecting an embedded microcontroller typically an engineer will list the required features and then select a stand alone off the shelf microcontroller or processor that has those features In most cases there are additional features or peripherals that are not need but are included non the less When using a Soft Processor in an FPGA an engineer has an opportunity to select from pre created microcontroller hardware images or modify and customize the features and peripherals This guide is provided as an aid in getting started and learning how to use the Xilinx Embedded Development Kit EDK tools It does this through examples which show how multiple software images can run on a defined soft microcontrolle
19. r The 3 right most push button switches are Add BTNO Sub BTN1 Mult BTN2 The left most push button switch BTN3 is a program reset which will clear the calculator program If the reset is pushed at this time then the FPGA will need to be re loaded The eight toggle switches directly under the 7 Segment display are divided into two 4 bit words When the Add Sub or Mult push button switches are pushed the selected calculator operation will be performed on the value of the toggle switches If the toggle switches are set to Sw7 off Sw6 off Sw5 off Sw4 off Sw3 off Sw2 off Swl off SwO off Where Word 1 is 0 and Word 0 is 0 Add 0 0 0 Sub 0 0 0 Mult 0 0 0 If the toggle switches are set to Sw7 off Sw6 off Sw5 off Sw4 ON Sw3 off Sw2 off Sw1 ON SwWO ON Where Word 1 is 1 and Word 0 is 3 Add 3 1 4 Sub 3 1 2 Mult 3 1 3 Each time one of the Push Button switches is pressed the result should be displayed in decimal on the 7 Seg display and it will also be sent to the hyperterminal through the UART The hyperterminal display should show 3 1 4 Push button to start math operation 3 1 2 Push button to start math operation 3 1 3 Push button to start math operation The next section will show how to load this same program after the FPGA has been configured Selecting a Software Application to be Loaded with a BOOT Loader after the FPGA is Configured and the Processor is Running This step will sh
20. r hardware configuration This guide show how an FPGA with a soft processor can be used the same way an engineer would select an off the shelf microcontroller This guide will provide examples of a number of different microcontroller configurations from which an engineer can choose The soft microcontroller features and peripherals in the FPGA may be used without modification or may be modified and customized using the Xilinx EDK Platform Studio tools This guide will cover the flow where multiple software images are loaded on an unmodified hardware configuration MicroBlaze Microcontroller Ref Des User Guide www xilinx com 1 UG133 January 7 2005 Reference Design Building Blocks XILINX MicroBlaze Microcontroller Reference Design Number 1 Reference Design Building Blocks The block diagram of the MicroBlaze Microcontroller used in this MicroBlaze Microcontroller Reference Design is shown in Figure 2 1 The design includes an Internal Block RAM memory an RS232 UART 4 GPIO blocks and a JTAG_UART used for software debugging This configuration utilizes approximately 50 of a Spartan 3 XC35200 device Clock MicroBlaze DOPB CPU Core Reset Interrupt B JTAG_UART JTAG Ports Dual Ported BlockKRAM BRAM xip312 Figure 2 1 MicroBlaze Microcontroller Block Diagram Application Some applications for the MicroBlaze processor include e Industrial Controller e Consumer Application e Office Automation e Data
21. rammable Logic Company is a service mark of Xilinx Inc All other trademarks are the property of their respective owners Xilinx Inc does not assume any liability arising out of the application or use of any product described or shown herein nor does it convey any license under its patents copyrights or maskwork rights or any rights of others Xilinx Inc reserves the right to make changes at any time in order to improve reliability function or design and to supply the best product possible Xilinx Inc will not assume responsibility for the use of any circuitry described herein other than circuitry entirely embodied in its products Xilinx provides any design code or information shown or described herein as is By providing the design code or information as one possible implementation of a feature application or standard Xilinx makes no representation that such implementation is free from any claims of infringement You are responsible for obtaining any rights you may require for your implementation Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of any such implementation including but not limited to any warranties or representations that the implementation is free from claims of infringement as well as any implied warranties of merchantability or fitness for a particular purpose Xilinx Inc devices and products are protected under U S Patents Other U S and foreign patents pending Xilinx Inc does no
22. t represent that devices shown or products described herein are free from patent infringement or from any other third party right Xilinx Inc assumes no obligation to correct any errors contained herein or to advise any user of this text of any correction if such be made Xilinx Inc will not assume any liability for the accuracy or correctness of any engineering or software support or assistance provided to a user Xilinx products are not intended for use in life support appliances devices or systems Use of a Xilinx product in such applications without the written consent of the appropriate Xilinx officer is prohibited The contents of this manual are owned and copyrighted by Xilinx Copyright 1994 2003 Xilinx Inc All Rights Reserved Except as stated herein none of the material may be copied reproduced distributed republished downloaded displayed posted or transmitted in any form or by any means including but not limited to electronic mechanical photocopying recording or otherwise without the prior written consent of Xilinx Any unauthorized use of any material contained in this manual may violate copyright laws trademark laws the laws of privacy and publicity and communications regulations and statutes UG133 v1 3 1 January 7 2005 www xilinx com MicroBlaze Microcontroller Ref Des User Guide MicroBlaze Microcontroller Ref Des User Guide UG133 v1 3 1 January 7 2005 The following table shows the revision history for this
23. tents 7 From Control Tag select Continue If the Spartan 3 Evaluation Board executes the application test program properly you will see flashing LEDs on the board in the Hyper Terminal 57600bps 8N1 Note Begin from step 2 to configure the device prior to loading a new application program and debugging Make certain to close all XMD and GDB windows Target Selection x xl Set breakpoint at maln iv layit Target Remote TCP XMD v lat al al Hostname lacalhost Set breakpoint at Port 1234 lt I Display Download Dialog M Use xterm as inferior s tty Figure 2 5 Target Selection for Software Debugger b More Options MicroBlaze Microcontroller Ref Des User Guide www xilinx com 10 UG133 January 7 2005 Additional MicroBlaze and EDK Information XILINX Loading the Calculator_App Software Application with XMD_STUB To download and execute the Calculator_App demonstration program repeat the procedure in section Loading the TestApp Software Application with XMD_STUB Start with step 1 and choose Calculator_App in step 5 instead of TestApp See Running the Calculator_App program Additional MicroBlaze and EDK Information Congratulations you have successfully integrated a MicroBlaze Microcontroller into an FPGA and executed software code For additional information on MicroBlaze and the EDK tools go to http support xilinx com MicroBlaze Microcontroller Ref
24. using the MicroBlaze Microcontroller system design template The application assumes t the Digilent Spartan 3 Starter Board Rev E or later The applic a sinple calculator that uses the slide switches and push buttons board as inputs and the LEDs and UART as outputs lt b gt pplication Details lt b gt The application is a simple calculator application that runs ont processor by downloading it to the Spartan 3 Starter Kit board s application makes use of the opb_gpio opb_uartlite and opb_emc The calculator uses one operator and two operands in the followin lt pre gt operand operator operand2 Headers Project Calculator_App eens 2 Processor microblaze_0 Executable C xilinx_projects mb_me6 3 mt Eight slide switches on the board are used as the two operands T Compiler Options pts switches SWO through SwW3_ are used as the binary representation cv Sources e gt i gt LA SE E SE SE SE SE SE SE SE RK KK KK RR KKK C ziling_projec Console Log PM_SPEC Xilinx path component is lt C Xilinx6_3 EDK Gmm10 1 gt Project Opened I I Output A Wamings A Emors Ready Figure 2 3 Software Selection when FPGA is Configured Loading the Calculator_App Software Application To configure the hardware system and to load the software application into the Spartan 3 Evaluation Board using the Digilent JTAG3 cabl
25. ve Downloading the Design and Launching XPS 1 Go to the MicroBlaze lounge at http www xilinx com microblaze_mcu_refdes1 and download the MB_MCU_RefDes1 zip archive On the target drive unzip MB_MCU_RefDes1 zip This will automatically create a subdirectory for the project MB_MCU_RefDes1 zip Assuming that the Xilinx Platform Studio XPS has been installed launch XPS at this time using Start gt Programs gt Xilinx Platform Studio gt Xilinx Platform Studio Once in XPS select the menu option File gt Open Project Using the browser navigate to where the project exists and double click on System xmp The system showing the prebuilt MicroBlaze Microcontroller Reference System configuration is shown in Figure 2 2 MicroBlaze Microcontroller Ref Des User Guide www xilinx com 4 UG133 January 7 2005 Downloading the Design and Launching XPS XILINX es Xilinx Platform Studio c mb_mcu_refdes1 c mb_mcu_refd BA File Edit View Project Tools Options Window Help a x Dak a amp Ba amp AY 2 Bef San AW a Ff 1 me the B A mn eit fo M a tu te x xl rene i z PEPEE E ETETE EEEE E EEEE EEEE EEEE SEE E EEE A ystem Applications Options Symbols Created by Base System Builder Wizard Right Click for Options E System BSP microblaze_0 Driver cpu_v1_O0_a Debug Peripheral debug_module OS standalone_v1_O0_a E Generated Header microblaze_0 i A mb_opb
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